APRIL 2010 IEEE MTT-V058-I04 (2010-04) [58, 4 ed.]

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APRIL 2010

VOLUME 58

NUMBER 4

IETMAB

(ISSN 0018-9480)

PAPERS

Linear and Nonlinear Device Modeling -Port T-Networks and Topologically Symmetric Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J. C. Rautio Nonlinear Dispersive Modeling of Electron Devices Oriented to GaN Power Amplifier Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A. Raffo, V. Vadalà, D. M. M.-P. Schreurs, G. Crupi, G. Avolio, A. Caddemi, and G. Vannini Accurate EM-Based Modeling of Cascode FETs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D. Resca, J. A. Lonac, R. Cignani, A. Raffo, A. Santarelli, G. Vannini, and F. Filicori Joint Mitigation of Power Amplifier and I/Q Modulator Impairments in Broadband Direct-Conversion Transmitters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . L. Anttila, P. Händel, and M. Valkama Comprehensive Noise Characterization and Modeling for 65-nm MOSFETs for Millimeter-Wave Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S.-C. Wang, P. Su, K.-M. Chen, K.-H. Liao, B.-Y. Chen, S.-Y. Huang, C.-C. Hung, and G.-W. Huang

N

Smart Antennas, Phased Arrays, and Radars A CMOS Integrated Analog Pulse Compressor for MIMO Radar Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S. M. Lee, T. Song, J. Park, C. Cho, S. An, K. Lim, and J. Laskar Bit Error Rate Performance Enhancement of a Retrodirective Array Over a Conventional Fixed Beam Array in a Dynamic Multipath Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . N. B. Buchanan and V. Fusco Design and Analysis of Swapped Port Coupler and Its Application in a Miniaturized Butler Matrix . . . . . . . . . Y. S. Jeong and T. W. Kim A -Band Two-Antenna Four-Simultaneous Beams SiGe BiCMOS Phased Array Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D.-W. Kang, K.-J. Koh, and G. M. Rebeiz

Ku

Active Circuits, Semiconductor Devices, and ICs On the Recovery Time of Highly Robust Low-Noise Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A. Liero, M. Dewitz, S. Kühn, N. Chaturvedi, J. Xu, and M. Rudolph Efficiency Enhancement of Class-E Power Amplifiers at Low Drain Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F. You, S. He, and X. Tang Low-Noise Amplifier Design With Dual Reactive Feedback for Broadband Simultaneous Noise and Impedance Matching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C.-T. Fu, C.-N. Kuo, and S. S. Taylor Investigations of AM, PM Noise, and Noise Figure in an SiGe-HBT Amplifier Operating in Linear and Nonlinear Regimes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . N. Garmendia and J. Portilla Design of an On-Chip Balun With a Minimum Amplitude Imbalance Using a Symmetric Stack Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H.-M. Hsu, J.-S. Huang, S.-Y. Chen, and S.-H. Lai Signal Generation, Frequency Conversion, and Control A Resistively Degenerated Wideband Passive Mixer With Low Noise Figure and High IIP2 . . . . N. Kim, V. Aparin, and L. E. Larson Wide-IF-Band CMOS Mixer Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P.-Y. Chiang, C.-W. Su, S.-Y. Luo, R. Hu, and C. F. Jou

705 710 719 730 740

747 757 764 771

781 788 795 807 814 820 831

(Contents Continued on Back Cover)

(Contents Continued from Front Cover) Millimeter-Wave and Terahertz Technologies Low-Noise Waveguide-Type NbN/AlN/NbN SIS Mixers Approaching Terahertz Frequencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W. Shan, M. Takeda, T. Kojima, Y. Uzawa, S. Shi, T. Noguchi, and Z. Wang Wireless Communication Systems Broadband Five-Port Direct Receiver Based on Low-Pass and High-Pass Phase Shifters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P. Pérez-Lara, I. Molina-Fernández, J. G. Wangüemert-Pérez, and A. Rueda-Pérez A 3–5-GHz UWB Front-End for Low-Data Rate WPANs in 90-nm CMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M. Cavallaro, G. Sapone, G. Giarrizzo, A. Italia, and G. Palmisano Low-Cost FPGA Implementation of Volterra Series-Based Digital Predistorter for RF Power Amplifiers . . . . . . . . . L. Guan and A. Zhu Linearization of Efficiency-Optimized Dynamic Load Modulation Transmitter Architectures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H. Cao, H. Mashad Nemati, A. Soltani Tehrani, T. Eriksson, J. Grahn, and C. Fager

841

849 854 866 873

Field Analysis and Guided Waves A New Type of Periodically Loaded Half-Mode Substrate Integrated Waveguide and Its Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . L.-S. Wu, X.-L. Zhou, W.-Y. Yin, C.-T. Liu, L. Zhou, J.-F. Mao, and H.-L. Peng An Automatically Tunable Cavity Resonator System . . . . . . . . . . . . . . . . . . . R. O. Ouedraogo, E. J. Rothwell, S.-Y. Chen, and B. J. Greetis Circular Waveguide With DB-Boundary Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I. V. Lindell and A. Sihvola

882 894 903

CAD Algorithms and Numerical Techniques Design of 3-D Periodic Metamaterials for Electromagnetic Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S. Zhou, W. Li, and Q. Li Krylov Acceleration Techniques for Time-Reversal Design Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I. Scott, A. Vukovic, and P. Sewell DC-Preserving Passivity Enforcement for S -Parameter Based Macromodels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D. Deschrijver and T. Dhaene Stability Analysis of Nonlinear Circuits Driven With Modulated Signals . . . . F. Ramírez, A. Suárez, I. Lizarraga, and J.-M. Collantes

910 917 923 929

Filters and Multiplexers UWB Bandpass Filter Using Cascaded Miniature High-Pass and Low-Pass Filters With Multilayer Liquid Crystal Polymer Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Z.-C. Hao and J.-S. Hong Miniaturized Transmission Lines Based on Hybrid Lattice-Ladder Topology . . . . . . . . . . M. Koochakzadeh and A. Abbaspour-Tamijani Corrugated Microstrip Coupled Lines for Constant Absolute Bandwidth Tunable Filters . . . . . . . . . . . M. A. El-Tanani and G. M. Rebeiz High-Selectivity Tunable Bandpass Filters With Harmonic Suppression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X. Y. Zhang and Q. Xue Balanced Bandpass Filters Using Center-Loaded Half-Wavelength Resonators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J. Shi and Q. Xue Inductance-Loaded Y-Shaped Resonators and Their Applications to Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . K. Song and Q. Xue

941 949 956 964 970 978

Packaging, Interconnects, MCMs, Hybrids, and Passive Circuit Elements An Experimental Technique for Characterizing Slow-Wave Characteristics of MIS-Like Transmission Lines Using Aqueous Dielectrics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T. Prodromakis and C. Papavassiliou A Design Method for Microstrip Directional Couplers Loaded With Shunt Inductors for Directivity Enhancement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S. Lee and Y. Lee A Phenomenological Investigation of Anomalous Performance in Flex Coaxial Cables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F. J. Villegas, M. Adams, P. Thompson, and C. Jackson Direct Synthesis of Passband Impedance Matching With Nonuniform Transmission Lines . . . . . . . . . . . . . . . . Y.-W. Hsu and E. F. Kuester Investigation of a Wideband 90 Hybrid Coupler With an Arbitrary Coupling Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . L. Chiu and Q. Xue Broadband Compact 180 Hybrid Derived From the Wilkinson Divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . N. Yang, C. Caloz, and K. Wu

1003 1012 1022 1030

Instrumentation and Measurement Techniques Broadband Time-Domain Measurement System for the Characterization of Nonlinear Microwave Devices With Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M. Abouchahine, A. Saleh, G. Neveux, T. Reveyrand, J.-P. Teyssier, D. Rousset, D. Barataud, and J.-M. Nebus Measuring and Reporting High Quality Factors of Inductors Using Vector Network Analyzers . . . . . . . . . . . . W. B. Kuhn and A. P. Boutz

1038 1046

MEMS and Acoustic Wave Components Distributed MEMS Tunable Impedance-Matching Network Based on Suspended Slow-Wave Structure Fabricated in a Standard CMOS Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S. Fouladi, F. Domingue, N. Zahirovic, and R. R. Mansour

1056

Biological, Imaging, and Medical Applications Subspace-Based Optimization Method for Reconstruction of 2-D Complex Anisotropic Dielectric Objects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . K. Agarwal, L. Pan, and X. Chen

1065

Information for Authors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1075

985 994

IEEE MICROWAVE THEORY AND TECHNIQUES SOCIETY The Microwave Theory and Techniques Society is an organization, within the framework of the IEEE, of members with principal professional interests in the field of microwave theory and techniques. All members of the IEEE are eligible for membership in the Society upon payment of the annual Society membership fee of $17.00, plus an annual subscription fee of $23.00 per year for electronic media only or $46.00 per year for electronic and print media. For information on joining, write to the IEEE at the address below. Member copies of Transactions/Journals are for personal use only. ADMINISTRATIVE COMMITTEE S. M. EL-GHAZALY, President L. BOGLIONE W. CHAPPELL M. GUPTA

R. SNYDER, President Elect

J. HACKER M. HARRIS J. HAUSNER

K. ITOH S. KOUL J. LASKAR

T. LEE J. LIN

M. MADIHIAN, Secretary A. MORTAZAWI V. J. NAIR

Honorary Life Members T. ITOH A. A. OLINER

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N. KOLIAS, Treasurer

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Distinguished Lecturers K. TOMIYASU L. YOUNG

A. CANGELLARIS S. GEVORGIAN F. ELLINGER F. GHANNOUCHI A. FERRERO S. LUCYSZYN

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B. PERLMAN (2009) J. MODELSKI (2008) J. S. KENNEY (2007)

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Associate Editors JEN-TSAI KUO Nat. Chiao Tung Univ. Taiwan email: [email protected] YOUNGWOO KWON Seoul Nat. Univ. Korea email: [email protected] JENSHAN LIN Univ. of Florida USA email: [email protected]

MAURO MONGIARDO Univ. of Perugia Italy email: [email protected] JOSÉ PEDRO Univ. of Aveiro Portugal email: jcp.mtted.av.it.pt ZOYA POPOVIC Univ. of Colorado, Boulder USA email: [email protected]

Editor-in-Chief, IEEE Microwave and Wireless Component Letters

RICHARD SNYDER RS Microwave Company USA email: [email protected] CHI WANG Orbital Sciences Corp. USA email: [email protected] KE-LI WU Chinese Univ. of Hong Kong Hong Kong email: [email protected]

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N -Port T-Networks and Topologically Symmetric Circuit Theory James C. Rautio, Fellow, IEEE

Abstract— -port Pi-networks can be extracted directly from -parameters. Likewise, two-port T-networks can be extracted directly from two-port -parameters. However, it appears that -port T-networks have not been previously identified for 2, a strange topological asymmetry in circuit theory. We introduce the general -port T-network and illustrate application by synthesis of an -port T-network lumped model from -parameters for a three-port microstrip via to ground on GaAs. The existence of the -port T-network partially relieves the noted circuit theory asymmetry; however, the T-network is structurally different from the Pi-network. We show that circuit theory becomes topologically perfectly symmetric under an appropriate change of variables when we consider -parameters and derive circuit theory from the electromagnetically symmetric form of Maxwell’s equations. The perfect topological symmetry requires both electric and magnetic (i.e., magnetic monopole) current. Practical application might be possible because effects identical to magnetic monopole current and charge have recently been experimentally observed and reported.

Fig. 1. (a) The Pi-network corresponds to Y -parameters and is easily generalized to N -ports. (b) The T-network corresponds to Z -parameters and generalization to N -ports appears to be previously unrecognized.

Index Terms—Circuit theory, compact modeling, magnetic current, model synthesis, Pi-network, symmetry, tee-network, T-network, -parameters, -parameters.

I. BACKGROUND

R

ECIPROCAL Pi-network lumped models [see Fig. 1(a)] correspond to -parameters (1)

with generalization of -port -parameters to -port Pi-networks straightforward. Lumped reciprocal two-port T-networks [see Fig. 1(b)] correspond to two-port -parameters (2) A generalization for -port -parameters and T-networks does not appear to have been previously identified. A limited three-port T-network is used to model a microstrip T-junction in [1]; however, that model cannot represent an arbitrary threeport -parameter matrix. A portion of a model for -conductor transmission lines [2] is functionally and topologically similar to an -port T-network; however, it is not identified as such. Manuscript received December 23, 2008; revised November 17, 2009. First published March 08, 2010; current version published April 14, 2010. The author is with Sonnet Software Inc., North Syracuse, NY 13212 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2041516

Fig. 2. (a) Three-port T-network corresponds to three-port Z -parameters and is easily generalized to N -ports. Other similar topologies are possible. (b) Resistive network approximates the ideal transformer in the limit as R goes to zero and is valid at all frequencies. The negative resistors are required. (c) Ideal transformer being modeled.

This study identifies the -port T-network topology (Fig. 2) that corresponds to -parameters. Application of the T-network is illustrated with a synthesized lumped model for a multiport via to ground. It is then noted that the T-network is topologically different from the Pi-network. This means circuit theory appears to have an inherent asymmetry in that neither the Pi-, nor the T-network can be derived from the other by a change of variables, by swapping current and voltage. In contrast, the complete form of Maxwell’s equations (which includes a fictional magnetic current) is perfectly symmetric in that a change of variables (i.e., swapping electric and magnetic field variables, etc.) yields the same set of equations. Circuit theory is a special case of Maxwell’s equations. Thus, swapping current and voltage should result in the same topology for Piand T-networks. We resolve this contradiction by showing that when circuit theory also includes this fictional magnetic current, Pi- and T-networks also have this same symmetry. This author is unaware of any prior work combining both electric and magnetic current in circuit theory.

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Fig. 3. Results for the T-network RLC lumped model for a three-port via to ground on GaAs (Fig. 4) synthesized from EM data are visually identical to the original EM data. Shown here are the isolation S -parameters.

II.

-PORT T-NETWORK MODELS

Fig. 2(a) shows a three-port model (not unique) corresponding to

(3) Extending the three-port T-network of Fig. 2 to -ports is ideal 1:1 transstraightforward requiring formers. We still refer to this topology as a T-network even ports though it no longer looks like a “T” because if any are terminated in open circuits, the remaining two ports form a T-network. and An exact transformer lumped model using only elements does not exist. Models are well known for two-port mutual inductors, e.g., [3] (T-model), in [4, Fig. 3] (Pi-model), and [5, Fig. 3(b)] (Pi-model). These models approximate ideal transformers in the limit as the inductance approaches zero. However, at low frequency and dc, the inductors in the model have low or zero reactance and the ideal transformer model fails due to numerical precision. At high frequency, the inductor reactances become large and the model fails because the inductor reactances must be small compared to the circuit impedances in which it is embedded. Typical applications of ideal transformers in modeling are presented in [1], [2], [4], [6], and [7]. An alternative model for an ideal four-port (each terminal is a port, all the ports have the same floating ground reference) transformer with series resistance, , is shown in Fig. 2(b). This model is valid as long as is small compared to the circuit impedances in which the transformer is embedded. Unlike a transformer model based on inductors, this model works at all frequencies, high and low, including dc. This model appears to be previously unreported. Note that the much more common two-port model for a transformer has the ground terminals for each port shorted together, contrary to the usual physical realization. , any two adjacent ports Note that for the special case of can be arbitrarily assigned the role of “primary” or “secondary” winding. Negative lumped elements are required for an

Fig. 4. Three-port microstrip via to ground on GaAs used in Fig. 3. Current distribution is shown with red (in online version) as high current and blue (in online version) as low current. Excitation is on port 1 (to the left).

four-port transformer model regardless of whether the resistive or the inductive model is used. In both cases, the transformer model is absolutely stable and passive. A two-port transformer model is not suitable here because both ground terminals of such a model are at the same potential. The object of generating an -port T-network is to double the solution space of an existing lumped model synthesis [5]. In [5], we extract the admittance of the various branches of a Pi-network from frequency-domain electromagnetic (EM) analysis1 generated -parameter data. A lumped model is then synthesized from the admittance data and an -port Pi-network model is formed. The synthesis finds the best model within the solution space. Usually the model is physically significant. For example, a model of a capacitor looks like a capacitor. The solution space for a two-port is over a quarter billion possible topologies because each of the three branches of the Pi- or T-network may be topologies. any of over 600 different Full details of the synthesis are provided in [5] and are not repeated here. However, even with a solution space of over a quarter billion possible topologies, there are still structures for which an adequate Pi-network model cannot be found. We have found that, in this case, we can sometimes realize a successful synthesis by including -port T-networks. -port T-networks double the solution space (to over 600 million topologies) and allow topologies to be synthesized for previously intractable structures. Fig. 3 shows results for a synthesized T-network model of a three-port microstrip via to ground on 100- m GaAs (Fig. 4). EM calculated and modeled results are visually identical for all nine complex -parameters. The average signal to error ratio (SER) (the magnitude of the vector difference between modeled and calculated compared to the calculated magnitude) is over 60 dB. The best Pi-network model SER is 20 dB less. Whether a Pi- or a T-network is superior (by whatever criteria are important to the designer) depends on the circuit being modeled and any specific design objectives. On occasion, it is possible to produce a better T-network model by inserting both a positive and an identical negative branch model and then combining two or more of the series impedances and synthesizing a branch model for the combined impedance. This was done 1[Online].

Available: http://www.sonnetsoftware.com

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-PORT T-NETWORKS AND TOPOLOGICALLY SYMMETRIC CIRCUIT THEORY

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ports. The transformer becomes an array of transformers with primaries connecting in parallel with the Pi-network ports and secondaries connecting in series (totem-pole style) with the T-network ports. In general, the transformation ratio is complex except at dc. Given a -parameter matrix (4), one can convert any port or ports from to , or from to by performing Gaussian elimination type of operations. Fig. 5. Two-port hybrid Pi–T-network corresponding to (4). Easily generalized to -ports, is a multiport Pi-network, is a multiport T-network, and is an array of transformers with, in general, a complex transformation ratio.

N

N

Y

Z

for several of the branches in the three-port via model. For example, the first branch of the port 1 series connection is actually , and an additional is inserted into the series connection. The synthesized model uses 69 lumped elements. In [2, Fig. 3(a)], a topology similar to the -port T-network is illustrated and used to model the series per unit length of a multiconductor transmission line. While similar to the additional transT-network described here ([5] requires formers), it is not identified as an -port T-network. Some of the transmission line models described in [2] (e.g., [2, Fig. 7]) can be synthesized using the techniques described portion is realized by in this paper. Specifically, the synthesizing an -port T-network for an -conductor shorted stub. The portion can be synthesized by synthesizing an -port Pi-network model [5] for an identical -conductor and are, in general, a funcopen-circuited stub. tion of frequency. The synthesized models of [5] are composed of lumped elements that are independent of frequency. A perfect open circuit is realized by terminating the stub in a perfect magnetic conducting wall. A perfect short circuit uses a perfect electric conducting wall. The two models are then combined, as illustrated in [2]. Using this approach, more general frequency-dependent branch models are possible; however, passivity and stability are not guaranteed without additional effort. Additional -conductor line models can be synthesized by using the technique of [5] to synthesize a -port Pi-network or -port T-network. the technique of this paper to synthesize a III. HYBRID NETWORKS In the same fashion we use T-networks above to enlarge the lumped model synthesis space, we can also use hybrid networks, networks that are a combination of Pi- and T-networks. In this case, we divide the -ports into two groups. The first group of ports is terminated with short-circuit terminations and the second group is terminated with open-circuit terminations. The corresponding -parameter [3] system of equations for the case of a two-port is (4) The hybrid matrix corresponds to a reciprocal system if it is antisymmetric as shown. The corresponding model is shown in Fig. 5. For the -port case, each current and voltage of (4) becomes a vertical vector and the elements of the matrix model of Fig. 5 becomes themselves become matrices. The a multiport Pi-network, the model becomes a multiport and T-network. The total number of ports is the sum of the

IV. FULLY SYMMETRIC CIRCUIT THEORY Section II illustrates practical application of -port T-networks. However, it does not remove the fundamental topological asymmetry in circuit theory. While we now have circuit -port topologies corresponding to -parameters (Pi-networks) and -parameters (T-networks), the two topologies are different. This is a fundamental theoretical quandary. This topological asymmetry is completely resolved if we invoke the mathematically symmetric form of Maxwell’s equations, specifically, the form that includes a fictitious (i.e., not seen in nature) flow of magnetic monopoles, the magnetic current. In the time–harmonic form [8], we have (5) (6) where is the electric field, is the magnetic field, is radian is the magfrequency, is permeability, is permittivity, netic current, and is the electric current. In a given material, the flow of electric conduction current is proportional to the -field. Symmetrically, the flow of magnetic conduction current is proportional to the -field. The constants of proportionality are the electric and magnetic conductivity, which form the constitutive relationships (7) (8) where (7) is the field equivalent of Ohm’s law. When magnetic conduction current is allowed, the intrinsic impedance of a medium is (9) where, for example, for free space. Maxwell’s [a equations have solutions for problems that include perfect electric conductor (PEC)] or that include [a perfect magnetic conductor (PMC)]. Within the framework of Maxwell’s equations, a perfect conductor can be either PEC or PMC, but it cannot be both because becomes indeterminate. In addition, a material that is a PMC always has zero tangential -field. This means that electric current cannot flow in it and it is necessarily an open circuit to electric current. Likewise, a PEC material always has zero tangential -field, and thus, is an open circuit for magnetic current. To map the symmetric Maxwell’s equations into symmetric circuit theory, we need four circuit theory variables (10)

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(11) (12) (13) where and are the electric voltage and current, and are the magnetic voltage and current, and and are infinitesimal lengths and areas. The paths and areas for the magnetic current and voltage integrals are exactly the same as for the electric currents and voltages. To illustrate the effect of including the magnetic conduction current, we solve a classic EM problem, current flowing at dc ) in a circular cylinder (a wire) of conductivity . (i.e., , the electric and With no magnetic conduction current, magnetic fields inside the cylinder are (14) (15) where the conductor lies along the -axis with radial coordinate and azimuthal coordinate and are unit vectors. When we allow a finite nonzero magnetic conductivity, the solution to Maxwell’s equations becomes (16) (17) where is the modified Bessel function of the first kind is the electric field in the center of the conof order . ductor. Electric and magnetic currents are found by application of (7) and (8). Notice that a -directed electric current induces a solenoidal -directed magnetic current. The magnetic field is zero in the center. Both the electric and magnetic field gradually increase with approaching the outer edge. In the limit, as approaches zero, (16) and (17) converge to (14) and (15). This solution assumes an electric current source placed on . Due to the symmetry of the ends of the wire generating Maxwell’s equations, we also find a solution, identical in form to that above, corresponding to a magnetic current source genby a change of variables. erating a -directed We can use electric current to generate magnetic voltage by splitting the cylinder in two along a plane containing the center (the -axis) of the cylinder. This interrupts the azimuthal magnetic current forming a magnetic voltage across the gap between the two half cylinders. Thus, as illustrated by the above three cases, a symmetric circuit theory model must allow for electric current generating electric voltage, magnetic current generating magnetic voltage, electric current generating magnetic voltage, etc. Loss in the conductor is [8] (18) with the integral taken over the volume of the conductor and the asterisk indicating complex conjugate. Application of this integral to the fields for the combined electric and magnetic con-

ductor (16) and (17) illustrate that the loss (and thus, electrical resistance) is increased by magnetic conductivity even though there is no magnetic source. If we apply (18) to the solution assuming a magnetic current source, we similarly find that the total loss is modified by the electric conductivity even though we have no electric source. Thus, the electrical aspects of a symmetric circuit theory model must be modified by magnetic conductivity, and the magnetic aspects must be modified by electrical conductivity. We now have sufficient information to form a topologically symmetric circuit theory model. First, in normal circuit theory, there are two variables associated with each port, electric voltage (10) and electric current (11). With magnetic current included, there are two additional variables, magnetic voltage (12) and magnetic current (13) for each physical port. We have both electric and magnetic voltage and current. To determine -parameters, we terminate all physical ports in electric short circuits (PEC). Next, we represent each of the physical ports with two ports in the circuit theory model, one to represent electric current and voltage, the other to represent magnetic current and voltage. Note that in using a PEC termination, we effectively short circuit the electric current ports and simultaneously open circuit the magnetic current ports. Remember, a PEC short circuit must simultaneously be a PMC open circuit if we are to remain within the framework of Maxwell’s equations. Evaluations of all electric and magnetic currents and voltages under these terminating conditions with appropriately applied magnetic and -port electric sources yields all needed information for a -parameter matrix (4) and its associated Pi–T model (Fig. 5). Note carefully that for this combined electric and magnetic current circuit model, all port voltages and currents on the right-hand side of Fig. 5 are magnetic voltages and currents. If we set all magnetic currents and voltages to zero, the model reduces to an electric current Pi-network. Alternatively, we can use PMC port terminations and all electric current ports are terminated in open circuits and all magnetic current ports are terminated in short circuits. Thus, the model of Fig. 5 combined with (4) yields a topologically identical model with electric current ports changed to magnetic current ports, and magnetic current ports changed to electric current ports. If we now set all magnetic currents and voltages to zero, we have an electric current T-network. Thus, a general circuit theory, incorporating both electric and magnetic current, is topologically symmetric. Regardless of whether we use PEC or PMC terminations to characterize an -port structure, the topology of the corresponding circuit is identical. The topological asymmetry we see in electric current circuit theory is because we live in a universe that favors electric monopoles. A circuit theory including both electric and magnetic current, as described in this section, is a peek into what circuit theory would look like if we were to live in a universe that gave equal stature to both electric and magnetic monopoles. If magnetic monopoles were favored, circuit theory would be exactly the same with only a change of variables. It was initially thought that this fully symmetric circuit theory would be a curiosity of no practical use. However, recently effects have been experimentally observed that are

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identical to the effects of magnetic charge and current [9]. Total magnetic charge is observed to be zero and it is emphasized that these observations cannot be deemed a discovery of magnetic monopoles. In addition, the magnetic current and charge are presently observed in materials that are electrical insulators. However, future work [10] will investigate magnetic current and charge in metals, which allow electric current to flow as well. If these metals do indeed also support magnetic current (which would, in turn, modify the electric current, as described above), and Maxwell’s equations apply, then the perfectly symmetric circuit theory reported here can be applied to model resulting structures.

V. CONCLUSION For what is possibly the first time, we describe the general -port T-network and demonstrate its utility in synthesizing a T-network model for a three-port microstrip via to ground. In doing so, we also introduce, again possibly for the first time, a 1: transformer model based on resistors, which is valid to dc. We also discuss -parameters and their associated hybrid Pi–Tnetwork. We then investigate the symmetric form of Maxwell’s equations (i.e., with fictional magnetic current included) and show that this leads to a topologically symmetric circuit theory, where - and -parameters (i.e., parameters evaluated using short/PEC or open/PMC circuit port terminations) each correspond to the same topology, demonstrating that a general circuit theory is, in fact, topologically symmetrical. This symmetry is present only if both electric and magnetic current are allowed, a situation which might soon actually be observed experimentally.

ACKNOWLEDGMENT The author acknowledges the most fruitful and thought provoking discussions with Dr. S. Arvas, Syracuse University, Syracuse, NY, for inspiring this work.

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REFERENCES [1] N. D. Codreanu, “Some investigations on a “hidden” discontinuity: T-branch,” in 24th Int. Electron. Technol. Spring Seminar, May 2001, pp. 133–136. [2] A. Dounavis, R. Achar, and M. S. Nakhla, “Efficient passive circuit models for distributed networks with frequency-dependent parameters,” IEEE Trans. Adv. Packag., vol. 23, no. 3, pp. 382–392, Aug. 2000. [3] M. E. van Valkenburg, Network Analysis, 3rd ed. Englewood Cliffs, NJ: Prentice-Hall, 1974. [4] K. Entesari and G. M. Rebeiz, “A differential 4-bit 6.5–10-GHz RF MEMS tunable filter,” IEEE Tran. Microw. Theory Tech., vol. 53, no. 3, pp. 1103–1110, Mar. 2005. [5] J. C. Rautio, “Synthesis of compact lumped models from electromagnetic analysis results,” IEEE Tran. Microw. Theory Tech., vol. 55, no. 12, pp. 2548–2554, Dec. 2007. [6] R. W. Jackson, “A circuit topology for microwave modeling of plastic surface mount packages,” IEEE Tran. Microw. Theory Tech., vol. 44, no. 7, pp. 1140–1146, Jul. 1996. [7] A. Kallio and T. Veijola, “Synthesis of reduced equivalent circuits for transmission lines,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 53, no. 10, pp. 2255–2264, Oct. 2006. [8] R. F. Harrington, Time–Harmonic Electromagnetic Fields. New York: McGraw-Hill, 1961. [9] S. T. Bramwell, S. R. Giblin, S. Calder, R. Aldus, D. Prabhakaran, and T. Fennell, “Measurement of the charge and current of magnetic monopoles in spin ice,” Nature, vol. 461, pp. 956–959, Oct. 15, 2009. [10] S. T. Bramwell, private communication. James C. Rautio (S’77–M’78–SM’91–F’00) received the B.S.E.E. degree from Cornell University, Ithaca, NY, in 1978, the M.S. degree in systems engineering from the University of Pennsylvania, Philadelphia, in 1982, and the Ph.D. degree in electrical engineering from Syracuse University, Syracuse, NY, in 1986. From 1978 to 1986, he was with General Electric, initially with the Valley Forge Space Division, and then with the Syracuse Electronics Laboratory. During this time, he developed microwave design and measurement software and designed microwave circuits on alumina and on GaAs. From 1986 to 1988, he was a Visiting Professor with Syracuse University and Cornell University. In 1988, he joined Sonnet Software Inc., Liverpool, NY, full time, a company he founded in 1983. In 1995, Sonnet Software Inc. was listed on the Inc. 500 list of the fastest growing privately held U.S. companies, the first microwave software company ever to be so listed. Today, Sonnet Software Inc. is the leading vendor of high-accuracy 3-D planar high-frequency EM analysis software. Dr. Rautio was an elected IEEE Microwave Theory and Techniques Society (IEEE MTT-S) Distinguished Microwave Lecturer (2005–2007), lecturing on the life of James Clerk Maxwell. He was the recipient of the 2001 IEEE Microwave Theory and Techniques Society (IEEE MTT-S) Microwave Application Award.

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Nonlinear Dispersive Modeling of Electron Devices Oriented to GaN Power Amplifier Design Antonio Raffo, Member, IEEE, Valeria Vadalà, Student Member, IEEE, Dominique M. M.-P. Schreurs, Senior Member, IEEE, Giovanni Crupi, Gustavo Avolio, Alina Caddemi, and Giorgio Vannini, Member, IEEE

Abstract—This paper presents a new modeling approach accounting for the nonlinear description of low-frequency dispersive effects (due to thermal phenomena and traps) affecting electron devices. The theoretical formulation is quite general and includes as particular cases different models proposed in the literature. A large set of experimental results, oriented to microwave GaN power amplifier design, is provided to give an exhaustive validation under realistic device operation. Index Terms—Field-effect transistors (FETs), microwave amplifiers, nonlinear distortion, nonlinear circuits, semiconductor device modeling.

I. INTRODUCTION

T

HE DESIGN of power amplifiers represents a fundamental topic for the microwave community, as clearly demonstrated by the increasing number of books [1]–[5] dedicated to this issue published in recent years. This is justified by the important role that power amplifiers play in microwave systems (e.g., satellite front-ends, base stations, mobile phones). The advent of GaN technology [6]–[8] has provided new stimuli in this design field foreseeing unbelievable performance in terms of power density, available power, drain efficiency, high-voltage, and high-temperature operation. A widely adopted tool for power amplifier design is represented by load–pull measurements [9]–[14], based on both passive or active load synthesis. Such a type of measurement system, being able to synthesize the optimum load and source conditions at the design frequency, supplies the designer with very useful information. Nevertheless, a model is needed for different reasons: simulating the device behavior at the intrinsic Manuscript received July 16, 2009; revised December 11, 2009. First published March 08, 2010; current version published April 14, 2010. This work was supported in part by the Italian Ministry of Instruction, University and Research (MIUR), the Research Foundation Flanders (FWO–Vlaanderen), IMT-ARSEL Project prot. RBIP06R9X5, and the CMOGAN Project through the contribution of the Italian Ministero degli Affari Esteri, Direzione Generale per la Promozione e la Cooperazione Culturale. A. Raffo, V. Vadalà, and G. Vannini are with the Department of Engineering, University of Ferrara, 44100 Ferrara, Italy (e-mail: [email protected]; [email protected]; [email protected]). D. M. M.-P. Schreurs and G. Avolio are with the Electronic Engineering Department, Katholieke Universiteit Leuven, B-3001 Leuven, Belgium (e-mail: [email protected]; [email protected]). G. Crupi and A. Caddemi are with the Dipartimento di Fisica della Materia e Ingegneria Elettronica, University of Messina, 98166 Messina, Italy (e-mail: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2041572

device ports to assess the actual load-line at the device resistive core (this is a fundamental issue, especially for high-efficiency amplifier classes), verifying process dispersion influence on device performance, investigating device stability, and wideband behavior, and so on. The identification of an electron device model, which aims to be a powerful design tool under different classes of amplifier operation, cannot neglect the dispersion presented by the electron device current/voltage characteristics related to traps and thermal effects [15]–[19]. These effects have to be accurately characterized, especially when new, and as consequence, immature technologies are considered (e.g., GaN and InP) since low-frequency (LF) dispersion unquestionably represents a bottleneck in device performance. Different models have been proposed by the microwave community in the last 20 years to correctly account for LF dispersion: from the simplest, and probably the first one, [20] proposed by Camacho-Penalosa (which adopts an RC network) to more complex models based on lookup-table approaches (e.g., [21] and [22]). The major problem related to the last mentioned approaches is that, despite the great level of accuracy obtainable, they are rarely used by designers due to the considerable simulation time required and convergence problems. As a matter of fact, models that are based on bias-independent parameters [23]–[29] represent the optimum compromise between accuracy and simulation time. Such a kind of description is typically based on simplifying approximations of the complex phenomena related to LF dispersion, as a consequence, it can be inadequate when new technologies (where dispersive effects play a major role) have to be investigated. In this paper, a very general analytical formulation will be introduced for the description of LF dispersion affecting microwave devices, which clearly demonstrates as different approaches [24]–[27] published in recent years, can be enhanced in order to obtain acceptable prediction capability also in the presence of strong dispersion. In particular, the proposed formulation, which is justified both by theoretical and empirical considerations, allows to identify a limited set of bias-independent parameters, which guarantees an excellent compromise between accuracy and simulation time. As a consequence, this modeling approach is particularly suitable for the design of power amplifiers based on the latest device technologies (e.g., GaN). This paper is organized as follows. Section II describes the theoretical model formulation and discusses the effects of the correction terms introduced. In Section III, a large variety of experimental results is provided to definitely validate the proposed approach. Finally, conclusions are drawn in Section IV.

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II. NONLINEAR MODELING OF LF DISPERSION A. Model Formulation When dealing with operating frequencies where the dynamic effects associated to charge storage variations and/or finite transit times can be neglected (i.e., LF dynamic regime), the vector of the instantaneous currents of a microwave field-effect transistor (FET) device (i.e., MESFET or HEMT) can be formulated as (1) where is the vector of the instantaneous voltages at the device and are state variables describing the device ports, while thermal and trap state, respectively. The thermal state influences the gate current as demonstrated by different papers devoted to the thermal resistance characterization (e.g., [30]), which exploit the gate I/V characteristic as a thermal sensor. On the other hand, the major influence of the trap and thermal states on the drain current has been widely discussed and demonstrated in the literature [15]–[29]. By considering microwave single- or two-tone1 device operation with frequency components lying above2 the cutoff frequencies of the LF dispersive effects, the device thermal and trap states can be considered as frozen to their average values since they cannot change according to instantaneous signal variations. In this operating regime, (1) can be rewritten as

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This paper is focused on the description of the device drain current, whereas the gate current dispersion will be neglected. Such an approximation is justified since the gate current thermal dependence does not greatly affect model prediction capability under typical power amplifier operation. As a matter of fact, to put in evidence such a dispersion, important variations of the case temperature (i.e., 40 C–50 C) and/or high dissipation bias conditions (e.g., setting the gate bias voltage at the forward conduction threshold of the gate/source diode and the drain bias in the saturation region) are needed: such operating voltage regimes are clearly not particularly interesting in power amplifier design. By considering (4), the drain current equation in (2) can be expressed as (5) The algebraic function can be defined in different ways, nevertheless, it has to satisfy some physical requirements. A most important one being that, under dc operation, it has to coincide with the device static characteristics . For such a reason, it is quite intuitive to adopt a formulation that describes the dynamic current deviations with respect to dc by modifying the device dc characteristic

(2) and represent average values. It has been widely where demonstrated, both by theoretical considerations [21]–[28] and experimental results [15], [16], that these two state variables, in the particular operation considered, can be assumed dependent of the average values of the voltages aponly on the vector plied at the device ports and on the average value of the channel temperature

(3) is the case temperature, is the thermal resistance, where is the average power dissipated, and is the instantaneous power. From the previous considerations, and considering (3), it follows that the trap and thermal state variables can be expressed as (4)

(6) where is the vector of the modified voltages, whereas the correction terms , , and , account for the drain current deviations related to LF dispersion. The particular expressions adopted to “modify” the dc characteristic are justified both by considering previous approaches [23]–[27] and by empirical observations; moreover, their validity is confirmed by the experimental results provided in the following. In particular, the formulation adopted for the modified allows to satisfy the physical constraint that, drain voltage under LF operation, the drain current has to be null when the instantaneous drain voltage is null. Moreover, the dependence on the case temperature (which is considered constant under device . operation) has been included only in the dc characteristic The correction terms can be conveniently expressed as a function of purely dynamic terms defined as the difference between the instantaneous values of the controlling electrical quantities and the corresponding average values

where the dependence of the trap state on the thermal state has also been accounted for [18], [23]. 1In the case of two-tone excitation, the tone spacing has to be greater than the

highest cutoff frequency associated to LF dispersive effects. 2Practically all of the models available in the literature do not deal with the problem of accurate modeling of the dynamic device response within the “trap bandwidth” and usually account for the transition between dc and LF operation above trap cutoff through a single time-constant RC network.

(7) with

(8)

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An analytical formulation of the functions can be obtained by adopting a Taylor expansion. By focusing on the 1-D case for functions the sake of simplicity, we can write for any of the

(9) As previously observed, under dc operation, the function has to coincide with the dc one in (6); this implies that, under dc have to be null. operation, the correction terms Such a condition can be easily imposed, without introducing equal to 0 in (9); thus, for the any approximation, by setting function reduces to multidimensional case, the generic Fig. 1. Schematic representation of the differences existing between dc and dynamic device characteristics.

(10) and, finally, the correction terms become

(11) coefficients are the bias-independent model where the parameters to be identified. Equation (6) and the correction terms (11) define a generalpurpose nonlinear model for dispersive effects, which satisfies physical and experimental evidence. It can be applied starting from any possible description of an electron device dc characteristics (e.g., analytical, lookup-table based, etc.). Different model formulations reduce to (6) and (11) under simplifying assumptions [24]–[27]. In the next paragraph, the effects of the correction terms (11) are analyzed in order to derive guidelines for the optimal choice of the model parameters. B. Correction Terms Effects The deviations existing between static and dynamic device output characteristics, measured at operating frequencies where the nonlinear dynamic effects associated to charge storage variations can be totally neglected, are schematically shown in Fig. 1. In this figure, the knee walkout (KW) of the dynamic characteristics, the negative slope (NS) of the dc characteristic in the

saturation region, and the saturation current collapse (CC)3 are put in evidence. All these effects globally contribute to decrease device performance under dynamic operation, and as a consequence, have to be correctly accounted for. The KW can be accurately predicted by modeling the different slopes shown by the dynamic characteristics in the linear region. Such a kind of discrepancy can be simply accounted for by a correction in the drain voltage dependence of the static in (6). It has been characteristic, i.e., by the correction term4 largely demonstrated (e.g., [16]–[18]) that the KW monotonically increases by increasing the drain bias voltage ; as a conhas to be necessarily considered. sequence, the contribution If a significant dependence on the gate bias voltage is present, should also be included. Since the correcthe contribution tion term only accounts for small deviations of the characteristic slope in the linear region, it is meaningless to exceed in its polynomial degree: a first-order expansion is typically adequate. When dynamic operation is considered, the device thermal state is defined by (3); thus, differently from the dc ones, the dynamic characteristics do not show any NS in the saturation region: this behavior can be accounted for through the multiplying . Since thermal effects are mainly responcorrection term has to be introsible for such a deviation, the contribution duced. It can be observed that dynamic characteristics measured under the same thermal state (e.g., under no power dissipation), but starting from different bias conditions, can show different slopes in the saturation region [15]–[17]. In this respect, it is necessary to also introduce the contributions deriving from the and . Since the correction term has only deviations to account for deviations related to the characteristic slope in the saturation region, also in this case, it is unfruitful to exceed in its 3The CC can be also defined with respect to a pulsed characteristic measured by exploiting a bias condition which guarantees both no power dissipation and channel formation (e.g., V V and V V), nevertheless the definition adopted here is more congruent with the model theoretical formulation. 4This term is conceptually similar to the effect of a parasitic drain resistance, which, causing a voltage drop, is able to modify the slope of the dc characteristics in the linear region.

=0

=0

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polynomial degree, and a first-order expansion can be adopted. It should be noticed that in [24] and [27] the authors obtained very good prediction capability without adopting such a term. This is coherent with the low-power device considered there, as can be seen looking at the dc characteristics, which do not show any NS. The CC essentially arises from the presence of surface trap states [16], [17] and is accounted for by the last correction term . Such a phenomenon is strongly dependent on both the bias condition and the device thermal state so all the -deviations have to be exploited. Moreover, due to its very complex behavior, when new device technologies are investigated, a highorder polynomial degree may be required. The theoretical formulation (6), (11) clearly shows that the mixed correction terms, arising from the mixed terms in the Taylor expansion, have to be accounted for too. These terms were completely and arbitrarily neglected in [26] and [27] and this is probably the reason why a high-order polynomial was necessary, in those particular cases, for the correction term . Nevertheless, careful considerations are needed before increasing the order of such a correction term since, beside becomes smaller the motivations previously discussed, if than 1, the drain current goes negative in correspondence of positive drain voltage values. Obviously such a behavior is completely unphysical under LF operation. As a matter of fact, it is strongly suggested to maintain the polynomial order of the as low as possible. correction term Since the theoretical formulation proposed here is based on bias-independent parameters, it could be easily identified, through least square algorithms, by exploiting LF small-signal measurements carried out under different bias conditions at a single frequency (e.g., 40 MHz) above the cutoff of LF dispersive effects (the measurement number depending on the number of parameters exploited). As a matter of fact, since the proposed approach is oriented to nonlinear amplifier design, it is preferable to base the identification procedure on large-signal measurements carried out under pulsed [15] and\or sinusoidal [31] excitations. III. EXPERIMENTAL RESULTS The presented model formulation was exploited to characterize the nonlinear dynamic behavior of a 0.7 800 m GaN HEMT device. As a first step, a suitable parasitic network was extracted by adopting a conventional technique based on “cold” V . scattering parameter measurements In the characterization phase, an LF time-domain load–pull measurement system based on sinusoidal excitations at 2 MHz [31] was adopted. Two 50- signal sources allow to impose the amplitudes of the incident-waves applied at the gate and drain ports and their relative phase. As previously said, the operating frequency has been chosen above the cutoff of LF dispersive effects, but low enough to neglect dynamic effects related to the device reactive parasitic elements and the high-frequency capacitive effects. Different papers (e.g., [14]) document the influence of dispersive phenomena (essentially related to thermal effects) at frequencies above the frequency exploited in this paper. Nevertheless, Fig. 2 reports measurements carried out

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Fig. 2. Measurements carried out at different frequencies to assess the correctness of the chosen characterization frequency (thin line: 2 MHz, thick line: 10 MHz, circles: 20 MHz). The waveform time scale has been properly normalized to fit two periods; moreover, a time shift has been introduced between waveforms to make the differences appreciable.

Fig. 3. Measurements performed on the GaN device-under-test (DUT) at 2 MHz, the two sets have the same drain bias condition (V = 25 V) and different gate bias values V = 2 V (continuous line) and V = 4 V (dotted line). Class-A operation: amplitude of the input incident signal A = 1 V, amplitude of the output incident signal 3:1 V A 11 V, relative phase 1 = 180 . Class-B operation: A = 2 V, 1:4 V A 9:8 V, 1 = 180 . The dc characteristic for v = 0 V is also shown.

0

0









at three different fundamental frequencies (2, 10, and 20 MHz) on the selected GaN device under class-A operation and 50loading condition. It is evident that no major deviations arise by changing the characterization frequency. This confirms the correctness of the chosen frequency (i.e., 2 MHz) to characterize dispersion effects and that negligible uncertainty is introduced by neglecting “faster dynamics” of LF dispersion.5 Fig. 3 shows two measurement sets carried out by means of the LF load–pull setup, starting from two different bias conditions V, V (corresponding to class-B operation) V, V (corresponding to class-A opand eration). For each set, the different load-lines were obtained by imposing constant amplitude of the gate incident signal (which is chosen to dynamically reach the device output characteristic V) and sweeping the amplitude of the drain incident at signal. The relative phase is maintained constant to 180 . The dc characteristic for V is also reported in order to put in evidence the CC. As can be clearly seen in Fig. 3, the device shows negligible dependence of the KW on the gate bias condition. 5This is also confirmed by the large number of papers devoted to GaN device characterization (e.g., [17]), which, for the LF characterization, adopt pulsed measurements setting the pulsewidth to 500 ns or more.

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TABLE I LF MODEL PARAMETERS FOR THE CONSIDERED 0.7-m GaN HEMT DEVICE

TABLE III MODEL PREDICTION OF THD (V

= 04 V, V = 25 V)

Fig. 5. Measurements (dotted line) performed on the GaN DUT are compared with model predictions (continuous line). Frequency of operation 2 MHz, strong V, V V), amplitude of the input pinchoff bias condition (V : V, amplitude of the output incident signal : V incident signal A : V, relative phase 1 . A

98

=35

= 07 = 180

= 30

11 

TABLE IV MODEL PREDICTION OF THE AVERAGE DRAIN CURRENT UNDER DYNAMIC OPERATION (V V, V V)

= 07

= 30

Fig. 4. Measurements (dotted line) carried out on the GaN DUT are compared with model predictions (continuous line). Frequency of operation 2 MHz, V, V V), amplitude of the input inciclass-B bias condition (V V, amplitude of the output incident signal : V A dent signal A . : V, relative phase 1

98

=2

= 04 = 180

= 25

14 



TABLE II MODEL PREDICTION OF THE AVERAGE DRAIN CURRENT V, V V) UNDER DYNAMIC OPERATION (V

= 04

= 25

TABLE V MODEL PREDICTION OF THD (V

= 07 V, V = 30 V)

Following the guidelines discussed in Section II, the formulation adopted for the considered case study is

(12)

where, for the gate voltage correction term , a second-order polynomial has been found adequate. Moreover, in the drain , the contribution deriving from the voltage correction term has been neglected accordingly to the negligible deviations dependence of the KW on the gate bias condition shown in Fig. 3. Although the correction technique presented here can be applied to any dc drain current description [27], in this paper,

RAFFO et al.: NONLINEAR DISPERSIVE MODELING OF ELECTRON DEVICES

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Fig. 6. Measured drain current (circles) and voltage (triangles) compared to V, V V, respective model predictions (continuous line). (a) V A : V, A : V, and 1 . (b) V V, V V, V, A V, and 1 . A

Fig. 7. Active load–pull measurements at 4 GHz. Measured drain current (circles) and voltage (triangles) compared to corresponding model predictions (con: V, V : j : . V, and Z tinuous line). (a) V : V, V V, and Z : j : . (b) V

a look-up-table approach has been used for the static characteristic with the specific aim of quantifying the level of accuracy achievable with the deviation model presented. In particular, this avoids introducing errors related to the static behavior approximation through analytical functions (e.g., smoothing functions and the absence of kink effects, which are instead present in the dc behavior, as shown in Fig. 3). Two sets of LF measurements were exploited in the identiV, V and fication phase (bias conditions: V V). The values obtained for the model parameters are reported in Table I. Fig. 4 compares the model prediction with one of the identification measurement sets, while in Table II, predicted values of the average drain current are listed. As is well known, it is very difficult to correctly estimate such a quantity, which is of critical importance in nonlinear amplifier design. A maximum deviation of 5% is observed here between measurements and predictions. In Table III, the predicted and measured values of total harmonic distortion (THD) are compared. Also in this case, the agreement is excellent. Identical results were obtained for the other measurement set exploited in the identification phase. The proposed approach was validated by carrying out several measurements under very different classes of operation to put in evidence the model accuracy. In Fig. 5, measurements and predictions carried out starting V, from a strong pinchoff quiescent condition ( V) are shown. Such a regime of operation strongly emphasizes the influence of trapping states. In fact, the very

important KW and CC are well evident. The excellent prediction capability of the developed formulation is also confirmed in Tables IV and V where the comparisons between measured and predicted values of the average drain current and THD are reported. In Fig. 6(a), the time-domain drain waveforms, for the V, particular case of output incident signal amplitude are shown: the 40% CC is correctly predicted by the proposed approach. Fig. 6(b) shows the time-domain drain waveforms for the V, V). Also in this class-A bias condition ( case, the high level of prediction accuracy is evident. In particular, in the knee region, the current sinking in correspondence to the voltage minimum peak is perfectly reproduced. In order to assess the accuracy level obtainable by the proposed approach under high-frequency operation, the identified LF model was embedded into a large-signal device model for microwave applications6 [32]. To this aim, bias- and frequencydependent -parameter measurements were carried out in the frequency range of 40 MHz–40 GHz by means of an Anritsu 37397D vector network analyzer. From a theoretical point of view, dispersion on capacitance should also be accounted for, nevertheless such a type of effect is of minor extent with respect to the dynamic deviations of the drain current. As a matter of fact, capacitance dispersion has been regularly neglected in electron device models oriented to power amplifier design [33], [34].

= 35 =1

=11 = 11

= 180 = 180

= 07 = 02

= 30 = 25

= 02 25

= 03 25 = 25

= 25 = 71 9 + 3 39 4

= 66 6 + 3 41 5

()

6It is worth noticing that, under high-frequency operation, the term p t has to be calculated by considering only the purely algebraic part of the drain current (6).

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Fig. 8. Third-order I/C versus output power measurements (symbols) carried out at 4 GHz and model predictions (continuous lines) obtained by the proposed V, V V, source impedance Z : j : and load impedance: (a) Z : j : and formulation. Bias condition V : j : . (b) Z

= 02 = 82 37 + 3 33 93

= 25

= 9 07 + 3 14 62

= 63 23 + 3 4 63

Fig. 9. Comparisons between load–pull measurements (symbols) carried out at 4 GHz and model predictions obtained by the proposed formulation (continuous lines) and a simplified one (dotted lines). Output power (circles), gain (triangles), average drain current (circles), and PAE (triangles). (a) and (b) Bias condition V, V V, source impedance Z : j : , and load impedance Z : j : . (c) and (d) Bias condition V V, V : j : , and load impedance Z : j : . V V, source impedance Z

= 02 = 35

= 25

= 4 56+ 3 8 11

= 11 19 + 3 11 73

The developed approach was validated by exploiting a time-domain load–pull system [13]. More precisely, an active load–pull setup, based on a large-signal network analyzer, has been employed for this study. The drain load was synthesized by sending toward the device output port a power wave, at the fundamental frequency of 4 GHz, with properly controlled amplitude and phase. Moreover, to cover a wide region of the DUT characteristic and synthesize loads close to the edge of the Smith chart, power amplifiers were inserted at the input and output device ports. Also in this context, the model predictions were found in good agreement with measurements under different bias conditions, as clearly shown in Fig. 7. Load–pull measurements were also carried out by exploiting a 4–26-GHz load–pull system [11], which enables device source

= 42 63+ 355 02

= 65 89 + 3 98 84

= 03

and load impedances at the fundamental frequency to be controlled. In particular, third-order intermodulation (IMD) measurements were performed at 4 GHz (tone spacing 10 MHz) under class A operation. In Fig. 8(a) and (b), the level of interferer to carrier ratio (I/C) is shown. The prediction accuracy clearly puts in evidence that the provided description is adequate to accurately model higher order partial derivatives of the nonlinear electrical variables. Single-tone measurements were also performed at 4 GHz choosing two typical operating conditions: class A [see Fig. 9(a) and (b)] and class AB [see Fig. 9(c) and (d)]. The good agreement obtained between model predictions and measurements for all the considered figures of merit [gain, output power, average drain current, and power-added efficiency (PAE)], as

RAFFO et al.: NONLINEAR DISPERSIVE MODELING OF ELECTRON DEVICES

TABLE VI SIMPLIFIED MODEL PARAMETERS FOR THE CONSIDERED 0.7-m GaN HEMT DEVICE

well as the fast simulation times, demonstrates the optimum compromise achievable by adopting the present formulation. In order to assess the accuracy improvement achieved by (12), Fig. 9 also shows the prediction results obtained through a simplified formulation where only the three correction terms reported in Table VI are considered. This formulation practically coincides with [25] that can be considered representative of models [23]–[27]. The two formulations show the same high accuracy level under small-signal condition. Nevertheless, under nonlinear operation, the improvement deriving from considering additional model parameters is well evident. IV. CONCLUSION A very general formulation has been discussed in this paper, which allows to correctly account for LF dispersion affecting FET electron devices. The proposed modeling approach has been validated under very different operations both at low and high frequencies, definitely demonstrating its validity for power amplifier design. REFERENCES [1] S. Marsh, Practical MMIC Design. Norwood, MA: Artech House, 2006. [2] M. Albulet, RF Power Amplifiers. Atlanta, GA: Noble, 2001. [3] S. C. Cripps, RF Power Amplifiers for Wireless Communication. Norwood, MA: Artech House, 1999. [4] S. C. Cripps, Advanced Techniques in RF Power Amplifier Design. Norwood, MA: Artech House, 2002. [5] F. Giannini and G. Leuzzi, Nonlinear Microwave Circuit Design. Chichester, U.K.: Wiley, 2004. [6] U. K. Mishra, P. Parikh, and Y.-F. Wu, “AlGaN/GaN HEMTs—An overview of device operation and applications,” Proc. IEEE, vol. 90, no. 6, pp. 1022–1031, Jun. 2002. [7] P. Colantonio, F. Giannini, R. Giofre, E. Limiti, A. Serino, M. Peroni, P. Romanini, and C. Proietti, “A C-band high-efficiency second-harmonic-tuned hybrid power amplifier in GaN technology,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 6, pp. 2713–2722, Jun. 2006. [8] M. Helaoui and F. M. Ghannouchi, “Optimizing losses in distributed multiharmonic matching networks applied to the design of an RF GaN power amplifier with higher than 80% power-added efficiency,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 2, pp. 314–322, Feb. 2009. [9] J. M. Cusak, S. M. Perlow, and B. S. Perlman, “Automatic load contour mapping for microwave power transistors,” IEEE Trans. Microw. Theory Tech., vol. 22, no. 12, pp. 1146–1152, Dec. 1974. [10] A. Ferrero and V. Teppati, “Accuracy evaluation of on-wafer load–pull measurements,” in Proc. IEEE 55th ARFTG Microw. Meas. Conf., Boston, MA, 2000, pp. 1–5. [11] “Focus Microwaves Data Manual,” Focus Microw. Inc., Montreal, QC, Canada, 1988. [12] M. N. Tutt, D. Pavlidis, and C. Tsironis, “Automated on-wafer noise and load pull characterization using precision computer controlled electromechanical tuners,” in Proc. IEEE 37th ARFTG Microw. Meas. Conf., Boston, MA, 1991, pp. 66–75.

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[32] G. Crupi, D. M. M.-P. Schreurs, D. Xiao, A. Caddemi, B. Parvais, A. Mercha, and S. Decoutere, “Determination and validation of new nonlinear FinFET model based on lookup tables,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 5, pp. 361–363, May 2007. [33] I. Angelov, N. Rorsman, J. Stenarson, M. Garcia, and H. Zirath, “An empirical table-based FET model,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 12, pp. 2350–2357, Dec. 1999. [34] M. Fernández-Barciela, P. J. Tasker, Y. Campos-Roca, M. Demmler, H. Massler, E. Sanchez, M. C. Curras-Francos, and M. Schlechtweg, “A simplified broadband large signal non quasi-static table-based FET model,” IEEE Trans. Microw. Theory Tech., vol. 48, no. 3, pp. 395–405, Mar. 2000.

Antonio Raffo (S’04–M’07) was born in Taranto, Italy, in 1976. He received the M.S. degree (with honors) in electronic engineering and Ph.D. degree in information engineering from the University of Ferrara, Ferrara, Italy, in 2002 and 2006, respectively. Since 2002, he has been with the Department of Engineering, University of Ferrara, where he is currently a Contract Professor of electronic instrumentation and measurement. His research activity is mainly oriented to nonlinear electron device characterization and modeling and circuit-design techniques for nonlinear microwave and millimeter-wave applications. Dr. Raffo is a member of the Italian Association on Electrical and Electronic Measurements. Valeria Vadalà (S’07) was born in Reggio Calabria, Italy, in 1982. She received the M.S. degree (with honors) in electronic engineering from the “Mediterranea” University of Reggio Calabria, Reggio Calabria, Italy, in 2006, and is currently working toward the Ph.D. degree at the University of Ferrara, Ferrara, Italy. She is currently with the Department of Engineering, University of Ferrara, and also collaborates with the Department of Electronics, University of Bologna. Her research interests include nonlinear electron-device characterization and modeling for microwave applications. Dominique M. M.-P. Schreurs (S’90–M’97– SM’02) received the M.Sc. degree in electronic engineering and Ph.D. degree from the Katholieke Universiteit (K.U.) Leuven, Leuven, Belgium. She is currently an Associate Professor with K.U. Leuven. She has been a Visiting Scientist with Agilent Technologies, Eidgenössische Technische Hochschule Zürich (ETH Zürich), and the National Institute of Standards and Technology (NIST). Her main research interests concern the (non)linear characterization and modeling of active microwave devices, and (non)linear hybrid and integrated circuit design. Dr. Schreurs serves on the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) Administrative Committee (AdCom). She is vice-chair of the IEEE MTT-S Technical Coordinating Committee, and past chair of the Technical Committee on microwave measurements (MTT-11). She also serves as education chair on the Executive Committee of the ARFTG organization, and was general chair of the 2007 Spring ARFTG Conference. She was also workshop coordinator of European Microwave Week (EuMW) and co-chair of the European Microwave Conference (EuMC) in 2008.

Giovanni Crupi was born in Lamezia Terme, Italy, in 1978. He received the M.Sc. degree (cum laude) in electronic engineering and Ph.D. degree from the University of Messina, Messina, Italy, in 2003 and in 2006, respectively. He is currently a Contract Researcher with the Dipartimento di Fisica della Materia e Ingegneria Elettronica, University of Messina, where he holds the course of “Optoelectronics.” Since 2005, he has been a repeat Visiting Scientist with the Katholieke Universiteit (K.U.) Leuven, Leuven, Belgium, and the Interuniversity Microelectronics Center (IMEC), Leuven, Belgium. His main research interests include small- and large-signal modeling of advanced microwave devices. Gustavo Avolio was born in Cosenza, Italy, in 1982. He received the MSc. degree in electronic engineering from the University of Calabria, Calabria, Italy, in 2006, and is currently working toward the Ph.D. degree at the Katholieke Universiteit (K.U.) Leuven, Leuven, Belgium. In January 2008, he joined the TELEMIC Division, K.U. Leuven. His research focuses on large-signal measurements and nonlinear modeling of advanced microwave devices. Alina Caddemi received the Electronic Engineering degree (with honors) and Ph.D. degree from the University of Palermo, Palermo, Italy, in 1982 and in 1987, respectively. In 1984, she joined the Electrical Engineering Department, University of Utah, Salt Lake City, as a Visiting Researcher. In 1985, she joined the Electrical and Computer Engineering Department, University of Colorado at Boulder, as a Visiting Researcher. From 1990 to 1998, she was with the Department of Electrical Engineering, University of Palermo, as an Assistant Professor. In 1998, she joined the University of Messina, Messina, Italy, as an Associate Professor of electronics. Her current research interests are in the field of temperature-dependent linear and noise characterization techniques for solid-state devices, cryogenic measurements and modeling of FETs and HEMTs, noise modeling of bipolar and FETs for hybrid microwave integrated circuit (HMIC) and monolithic microwave integrated circuit (MMIC) design, neural network and genetic algorithm modeling of devices, design and realization of hybrid low-noise circuits based on either conventional and superconductive materials, characterization, and modeling of thin-film sensors. Giorgio Vannini (S’87–M’92) received the Laurea degree in electronic engineering and Ph.D. degree in electronic and computer science engineering, from the University of Bologna, Bologna, Italy, in 1987 and 1992, respectively. In 1992, he joined the Department of Electronics, University of Bologna, as a Research Associate. From 1994 to 1998, he was with the Research Centre on Electronics, Computer science and Telecommunication Engineering, National Research Council (CSITE), Bologna, Itlay, where he was responsible for the Monolithic Microwave Integrated Circuit (MMIC) Testing and Computer-Aided Design (CAD) Laboratory. In 1998, he joined the University of Ferrara, Ferrara, Italy, as an Associate Professor, and since 2005, as a Full Professor of electronics. he is currently Head of the Engineering Department, University of Ferrara. During his academic career, he has been a Teacher of applied electronics, electronics for communications, and industrial electronics. He is a cofounder of the academic spin-off Microwave Electronics for Communications (MEC). He has coauthored over 170 papers devoted to electron device modeling, computer-aided design techniques for MMICs, and nonlinear circuit analysis and design. Dr. Vannini is a member of the Gallium Arsenide Application Symposium (GAAS) Association. He was the recipient of the Best Paper Award presented at the 25th European Microwave Conference and GAAS98 and GAAS2001 conferences.

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Accurate EM-Based Modeling of Cascode FETs Davide Resca, Member, IEEE, Julio A. Lonac, Rafael Cignani, Antonio Raffo, Member, IEEE, Alberto Santarelli, Member, IEEE, Giorgio Vannini, Member, IEEE, and Fabio Filicori

Abstract—Cascode field-effect transistors (FETs) are widely used in the design of monolithic microwave integrated circuits (MMICs), owing to their almost unilateral and broadband behavior. However, since a dedicated model of the cell is rarely provided by foundries, a suboptimal description built by replicating the standard foundry model for both the common source and common gate device is often adopted. This might limit the success of the MMIC design at the first foundry run. This paper describes an electromagnetic-based empirical model of cascode cells, covering topics from the formulation and identification procedures to the corresponding validation described in an exhaustive experimental section. A MMIC low-noise distributed amplifier case is then presented and the proposed model is used for circuit analysis and instability detection. Clear indication is provided about the improvement in the prediction of critical behaviors with respect to conventional modeling approaches. A cascode cell with a symmetric layout is also successfully modeled. Index Terms—Electromagnetic (EM) analysis, microwave fieldeffect transistors (FETs), monolithic microwave integrated circuits (MMICs), semiconductor device modeling.

I. INTRODUCTION

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IELD-EFFECT transistors (FETs) connected in a cascode configuration (cascode FETs) have widespread usage in monolithic microwave integrated circuits (MMICs), such as in gain controlled amplifiers, phase shifters, broadband power amplifiers, traveling-wave distributed amplifiers, and mixers [1]–[5]. A cascode cell is composed of a common source (CS) stage cascaded by a common gate (CG) stage. This is implemented either using a double-gate device or using two single-gate transistors. As is well known, the first successful design of MMICs requires empirical active device models, which must be accurate, computationally efficient, and easily identifiable. In the case of cascode FETs, the design of the circuit is complicated since the design kit provided by the foundries usually include neither the cascode FET model, nor a CG FET model. In the same way, Manuscript received July 28, 2009; revised October 13, 2009. First published March 08, 2010; current version published April 14, 2010. This work was supported by MEC s.r.l., carried out jointly with the University of Bologna and the University of Ferrara. D. Resca and J. A. Lonac are with Microwave Electronics for Communications, MEC s.r.l., 40123 Bologna, Italy (e-mail: [email protected]; [email protected]). R. Cignani, A. Santarelli, and F. Filicori are with the Department of Electronics, Computer Science and Systems (DEIS), University of Bologna, 40136 Bologna, Italy (e-mail: [email protected]; [email protected]; [email protected]). A. Raffo and G. Vannini are with the ENDIF, University of Ferrara, 44100 Ferrara, Italy (e-mail: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2041576

cascode or CG device samples to be characterized are not usually readily available, as it would be needed for the identification of many empirical models found in the literature [6]–[11]. As the only viable alternative, a cascode FET model is often built by exploiting the only resource available from the foundry, which is typically the CS FET model (direct -parameter measurements can also be used when a device sample is available). On this basis, a rough model of the CG device can be obtained by means of simple admittance matrix transformations [8], [12] or by simple rotation once the source electrode has been floated. The cascode cell model is then eventually obtained by interconnection of the CS and CG descriptions. However, this procedure was found not accurate enough since the extrinsic parasitic network identified for the CS FET (defined at the intrinsic gate–source and drain–source reference planes) could be very different from that of the CG FET in the cascode cell [13]. In turn, model inaccuracies of the CG stage affect the prediction accuracy of the whole cascode cell [13]. In order to overcome the above problems, an accurate EM-based empirical model of cascode FETs is proposed in this paper. In particular, Section II deals with model definition and identification procedures. In Section III, the proposed cascode FET model is applied to a conventional cascode cell layout. Its predictions are compared to both measurements and simulations obtained through a conventional modeling approach. A practical application to the analysis of a 0.8–20-GHz GaAs MMIC distributed amplifier based on six cascaded stages is discussed. Finally, an additional experimental validation is presented in Section IV, where the electromagnetic (EM)-based modeling approach is applied to a nonstandard cascode cell with symmetric layout. II. EM-BASED MODELING APPROACH The EM-based modeling methodology described in [14] has been successfully adopted in the past for the linear and nonlinear modeling of a single transistor. Despite its simplicity, the approach provides high prediction accuracy and scaling capabilities. According to this methodology, a general CS device, considered here as a reference sample, can be modeled by an equivalent two-port intrinsic device (EqID) connected to a linear distributed four-port passive network, which accounts for the extrinsic parasitics related to the metallization layout [14]. In particular, according to Fig. 1(c), the latter can be described by its such that [4 4] admittance matrix (1) where .

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Fig. 1. Single transistor EM-based empirical model. Device layout EM equivalent intrinsic devices, EIDs, are defined. simulation setup: (a) where (b) Empirical model (c) composed of a compact four-port distributed parasitic network connected to a single EqID.

N

Accordingly to [14], in order to identify the matrix, the device geometry is preliminary divided into a number of elementary intrinsic devices (EIDs) placed along the fingers. A single EID per finger is typically chosen, as shown in Fig. 1(a). The EIDs are then interconnected by a linear multiport “pasadmitsive distributed structure,” whose is directly obtained through accurate EM tance matrix simulations [15], [16]. This multiport description is eventually compacted into a four-port network by calculating the elements through closed-form linear combinations of the eleof . The main relationships are briefly recalled in ments of the Appendix for the sake of completeness. Two basic hypotheses are involved in this port compacting procedure, which are: 1) the EIDs are considered equal to each other (both from a geometrical and electrical point of view) and 2) the EIDs are considered equally excited. In particular, relative differences of both attenuation and delay of signals traveling across the device active region are assumed to be negligible. This has been proved quite reasonable in “well-designed” small/ medium size devices, since either nonuniform current densities along the fingers or strongly not-in-phase current combinations from different device fingers correspond to suboptimal device performance [14], [17]. A compact model is proposed in this work for the cascode FET [13]. In this case, two CS and CG stages are closely connected, as depicted, for instance, in Fig. 2, and act as a single functional cell. According to the same EM-based methodology, we propose to model the cascode cell by means of two EqIDs (i.e., EqID , EqID ), one for the CS and the other for the CG stage, connected to a linear distributed six-port passive network describing the extrinsic parasitics related to the metallization layout of the overall cell. According to Fig. 2(b), the admittance matrix of this six-port network is defined as

(2)

Fig. 2. Cascode transistor EM-based empirical model. Device layout EM sim+ ) EIDs are defined. (b) Empirical model ulation setup: (a) where ( composed of a compact six-port distributed parasitic network connected to two EqIDs one for the CS FET, and the other for the CG FET.

N

N

where . matrix, both the CS and CG In order to identify the device geometries may be preliminary partitioned into a number and of EIDs, respectively. These are placed along the layout fingers of both the CS and CG FETs. The EIDs are interconnected by a linear passive distributed structure, which is described in terms of a admittance matrix , which can still be obtained directly through EM simulation. The compacting procedure of the linear distributed multiport network into a minimal six-port one can be carried out by applying the same assumptions made for the single transistor in a local way, i.e., by considering the CS and CG stages one by one (EIDs inside the CS stage are equal and equally excited and similar conditions hold for the EIDs into the CG). According to this matrix can be identified on the basis of the criterion, the closed-form relationships in (3), shown at the bottom of the fol(with lowing page, where are the elements of the matrix . Analytical derivation is reported in the Appendix for the sake of completeness. The proposed model of the cascode FET is thus obtained according to the flowchart shown in Fig. 3(a)–(c). The procedure consists in three phases, which are: a) data acquisition for model identification through EM-simulations and measurements; b) data manipulation leading to the identification of the extrinsic and intrinsic parts of the model; and c) linear scaling of the intrinsic CS and CG elementary device models (if needed) and cascode cell model implementation. The three phases will be now described individually in more detail.

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Fig. 3. Flowchart describing the EM-based cascode model identification procedure.

A. Data Acquisition for Model Identification The cascode configuration consists of a CS FET cascaded with a CG FET, where the two devices may have different peripheries and may operate in different bias conditions. Let and be the number of gate fingers and the unit gatewidths of the CS FET and CG FET, respecand represent the selected quiescent tively. Let conditions of the CS and CG FETs, respectively, within the cascode cell. The following data are needed to identify the model proposed. • Single transistor representative of the foundry process (a conventional CS FET) to be treated as reference device or, m be at least, an empirical model of it. Let its periphery (not necessarily equal to that of the cascode CS and CG FETs thanks to the scaling capabilities offered by the EM-based model [14]). • Layout of the reference device. • Layout of the cascode cell. • Technological process parameters such as substrate/passivation oxide dielectric characteristics and metallization conductivities. The EM simulation of the reference device and the cascode cell passive structures are performed according to the setup of

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Figs. 1(a) and 2(a), respectively. “Internal” kind of ports (see Section III) offered by commercial EM simulators, are exploited to define the EIDs attachment points into the CS and CG regions. It is worth pointing out that these EM simulations have to be performed just once during the model identification phase and do not represent a limitation of the numerical efficiency of the final model. -parameters of the reference device are then measured (or simulated through the foundry model) for each bias condition . The loop in the bias conditions shown in Fig. 3 will cover the and of the CS and CG required quiescent conditions devices. represents According to Fig. 3, the admittance matrix descripthe multiport tion of the cascode cell interconnecting structure, the admittance is the multiport description of matrix the reference device interconnecting structure, while corresponds to the measured (or simulated) admittance matrix of the intrinsic reference device biased at the quiescent condition . Although the admittance matrices defined in the following are functions of frequency, explicit dependence notation will be omitted in the following for the sake of simplicity. B. Matrix Manipulation and De-Embedding The compact and admittance matrices, describing the reference device and cascode cell extrinsic parasitic networks, respectively, are identified in this phase on the basis and . Details of the multiport admittance matrices on the algebraic manipulations needed for these operations are given in the Appendix. Moreover, the reference device broadband -parameters (measured or simulated) are de-embedded from the extrinsic matrix. This leads to an parasitic network described by the intrinsic reference device described by the admittance matrix for each required bias condition . Details on the de-embedding procedure can also be found in the Appendix. C. EqID Scaling and Cascode Model Implementation The admittance matrices trinsic behavior of the

describe the strictly inm reference device. These

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data can be easily linearly scaled to obtain as follows:

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and

(4) The extrinsic and the intrinsic parts of the proposed cascode cell empirical model (see Fig. 2) have been identified so far. The model can be now easily implemented into any linear frequency domain simulator by circuit connecting the identified CS and CG EqIDs to the six-port distributed parasitic network described matrix. For the purpose of this work, the blocks of by the Fig. 2(b) are implemented through frequency-dependent lookup tables ( -parameter blocks, Touchstone file based). However, any available lumped equivalent circuit, describing either the extrinsic parasitic network (by using, for example, automated synthesis techniques [18]) and/or the intrinsic device (linear equivalent circuit or mathematical model [19]–[23]) could be adopted according to the designer preferences. The proposed procedure can be easily extended to the case of nonlinear modeling after indentifying the EqID frequency response over a dense grid of different bias conditions. III. MODEL VALIDATION: CONVENTIONAL CASCODE CELL In order to validate the EM-based modeling approach presented in Section II, a MMIC cascode cell based on the 0.25- m XKu pseudomorphic HEMT (pHEMT) 3MI GaAs process of Triquint Semiconductors has been considered. The EM simulator accuracy was first verified by simulating some passive test structures such as lines, capacitors, and inductors, by using the physical parameters available from the foundry manual. Good agreement between the simulated and measured behavior was obtained. No tuning of the parameters was needed in this phase. The cascode cell consists of two 150- m devices having and m. Both the CS and CG FETs are biased in the same class A operating V and mA (thus, according to condition, at ). The cell, whose layout the Section II notation, is shown in Fig. 4, was manufactured and fully characterized by means of -parameter measurements in the frequency range of 1.5–45 GHz. A reference device was chosen with and . Instead of experimentally characterize a device sample, we used the simulated -parameters of the available CS foundry model. This actually corresponds to the worst case where a designer does not have a device sample to be characterized. An EM simulation of the reference device was first carried out, leading to the distributed [10 10] matrix and to the compact [4 4] description of the extrinsic parasitic network. De-embedding of the small-signal parameter measurements from this distributed parasitic network under the two CS and CG bias conditions (equal in the present and . case) leads to the [2 2] matrices The whole cascode interconnecting structure was described , simulated through a by the distributed [18 18] matrix

Fig. 4. Layout of the cascode cell adopted in this work. The cascode cell comprehensive of the stabilizing network has dimension of 0.38 mm 0.42 mm.

2

commercial 3-D planar EM simulator [24], where a single EID per finger was considered. The compact [6 6] matrix was then obtained after applying the hypotheses of equal and equally fed EIDs within the cell. Circuit connection between the and the identified CS six-port extrinsic parasitic network completed the and CG frequency responses linear model of the cascode FET. It is worth mentioning that, owing to the peripheries of the device samples available for measurements, this particular experimental validation did not require any scaling at all. However, the scaling capabilities of the EM-based approach, within a certain range of peripheries, have been widely proven in [14]. As it is well known, EM simulations used in the identification phase described in Section II-A might take quite a long time. The minimum mesh cell dimension is indeed strongly related to the gate channel length and unit finger width in the actual application and it has to be defined in order to have the gate transmission line properly simulated. For example, a rectangular cell having dimensions 0.125 m 2.5 m was used for the device considered. This leads to a total number of meshes in the order of 15 000–20 000. EM simulation times are obviously platform dependent, but they typically are in the order of hours for a single frequency step on a medium power PC. However, extremely accurate models are obtainable in this case, as shown, is shown for instance, in Fig. 5, where the magnitude of versus frequency up to 45 GHz. Similar accuracy was found on the other parameters. In the effort of reducing the costs related to the meshing [25], one could be tempted by dropping some “big” structure from the EM simulation after replacement with equivalent lumped models or with dedicated EM simulation results. The cascode cell passive structure was thus re-simulated by dropping the via-hole and the large over-via capacitor, which grounds the gate of the CG FET at RF frequencies (see Fig. 4). They were replaced by lumped-circuit models in this case. A total number of meshes in the order of 6000 was obtained leading to a dramatic

RESCA et al.: ACCURATE EM-BASED MODELING OF CASCODE FETs

Fig. 5. Two different cascode cell models S 21 prediction compared to device measurements. The bias condition is for class-A operation: V = 6 V, I = 15 mA. Frequency range from 1.5 to 45 GHz. Crosses: device measurements. Line: EM-based model where the whole structure is EM simulated. Dots: EM-based model where the large structure has been cut away from the EM simulation.

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Fig. 7. Cascode-cell model S -parameters predictions compared to device measurements. The bias condition is for class-A operation: V = 6 V, I = 15 mA. Frequency range from 1.5 to 45 GHz. Crosses: device measurements. Lines: EM-based model. Dots: conventional model.

Fig. 8. Photograph of the manufactured low-noise wideband distributed amplifier. The manufactured MMIC LNA has a dimension of 4 mm 2 mm, while the die, which includes the CS FET, CG FET, and cascode cells used for the model validation, as well as other test structures, is 4 mm 4 mm.

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Fig. 6. Every EID attachment point is defined as a different group (i.e., group A and B in the figure) of floating co-calibrated ports [24]. Blue (in online version) depicts the global local ground (GLG) meshes used for the ports calibration procedure described in detail in [26].

reduction (about 90%) in the simulation time required to collect the data needed for the extrinsic parasitic network identification. Corresponding modeling results are also reported in Fig. 5, showing very good accuracy up to almost 30 GHz. Beyond that frequency, the coupling effects between the large structures and the remaining device metallization cannot be neglected anymore. Particular care must, therefore, be paid in EM-analysis simplification, depending on the particular application considered. Concerning the EIDs definition, floating co-calibrated internal ports available within the simulator were used in this work [24]. They allow to define the EID attachment points into the device passive structure without perturbing the simulation with their discontinuity. Details about the co-calibrated ports, the way to use them, and the way their discontinuities are de-embedded from the simulated response are clearly explained in [24] and [26]. Fig. 6 shows the subsections made by the EM simulator in the finger region of the device, where the floating co-calibrated ports are placed. In order to compare the predictive capabilities of the proposed model with other more conventional approaches, we also simulated the cascode-FET behavior by using a conventional CS device model. To this aim, the CS linear model provided by the foundry was modified in order to make the source floating (by de-embedding the via-hole inductance and resistance). The

2

source-floating model was then connected in the CG configuration following a standard CS stage. The other surrounding structures were taken into account through their design-kit circuit models. The cascode-FET models are compared to -parameter measurements up to 45 GHz in Fig. 7. A good agreement is achieved by means of the EM-based approach over the whole frequency range. Instead, by far, more inaccurate predictions are obtained with the conventional model. As a further example, we refer now to the case of a 0.8–20-GHz GaAs MMIC low-noise broadband distributed amplifier (LNA) based on six cascode FETs equal to the one presented in Fig. 4. The photograph of the distributed amplifier is shown in Fig. 8. As it is well known, the design of the gate and drain transmission lines is typically carried out on the basis of the cascode FET input and output capacitances [27]–[29], while the input and output conductance values strongly affect the stability of the overall amplifier. The two capacitances and are shown in Fig. 9. They are practically coincident with the input and output capacitances, respectively, due to the almost unilateral behavior of the cascode cell. The EM-based and conventional models are compared to measurements versus frequency in the figure. The corresponding capacitance values at the passband center frequency (useful for a first-guess gate and drain line design) are instead reported in and Table I. In addition, are shown in Fig. 10. It is clearly noticeable how, out of the

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Fig. 9. Cascode cell model predictions of its input (C ) and output (C ) capacitances compared to their measured values. The bias condition is for = 6 V, I = 15 mA. Frequency range from 1.5 class-A operation: V to 45 GHz. Crosses: device measurements. Lines: EM-based model. Dots: conventional model.

TABLE I ACTUAL AND PREDICTED VALUES OF C

AND

Fig. 10. Cascode cell model predictions of its input (G ) and output (G ) conductances compared to their measured values. The bias condition is for = 6 V, I = 15 mA. Frequency range from 1.5 class-A operation: V to 45 GHz. Crosses: device measurements. Lines: EM-based model. Dots: conventional model.

C

two models considered, the EM-based only predicts the critical between 15–30 GHz. slightly negative values of The MMIC LNA, realized after being designed by means of the conventional model, exhibits a spurious oscillation at 25 GHz. This was unfortunately not detected during the design phase when stability tests [30], [31] were performed in order to stabilize the amplifier. Thanks to the insertion into the elementary cascode cell of the stabilizing network, shown in Fig. 4, the amplifier should have been stable even when considering the whole statistical dispersion of process parameters. After an investigation made on the basis of measurements on both the final LNA and some other related circuit cutouts, we found that the differences between measurements and simulations of the entire amplifier were strongly dependent on the cascode cell model. In fact, a rather good agreement between measurements and simulations was found for the lumped and distributed passive structures, while on the other hand, the conventional active device model led to the major discrepancies highlighted in Figs. 7, 9, and 10.

Fig. 11. Ohtomo analysis [27] of the monolithic LNA (grey conventional model, black EM-based model).

Lately, the stability test described by Ohtomo [30] was repeated by using our EM-based model. As shown by the results reported in Fig. 11, a potential instability was detected at 25.28 GHz, which was completely missed by the conventional model. In successive tests made both experimentally and through simulations performed by means of the EM-based model, we found that the amplifier could be stabilized by slightly modifying the bias applied to each cascode cell (modified biases: V; mA, CG FET: V, CS FET:

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Fig. 12. Ohtomo stability analysis of the stabilized amplifier (EM-based model). Fig. 14. Layout of the designed symmetric cascode cell. This figure shows the detail of the long AB, which realizes the cascode connection. The cascode cell has a dimension of 0.28 mm 0.33 mm.

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Fig. 13. Magnitude of the S -parameters of the LNA in the stabilized configuration. Measurements (symbols) compared to the model predictions (lines): S 21: crosses and red line (in online verson). S 11: circles and blue line (in online version). S 22: diamonds and black line.

mA) at some expense of the unilateral cascode cell behavior and, thus, of the overall amplifier performances. The plot in Fig. 12 refers to the stability analysis made in the modified bias condition. The amplifier is now stable, and this was also confirmed by the experiments after measuring the LNA sample (see Fig. 13). These additional experimental results confirm that the EM-based model will be an extremely good tool for future designs.

The cell is supposed to work under the same bias condition as the other (both CS and CG FETs biased at V and mA, i.e., ). The identification procedure described in Section II was reand matrices describing peated. To this aim, the the intrinsic CS and CG FETs had not to be re-extracted since they are the same as in the previous case. The simulation of the new metallization structure corresponding to the symmetric layout of Fig. 14 had only to be carried out. According to the arguments discussed in Section III, the two large over-via capacitors were taken into account into the EM simulation of the cell to guarantee accurate predictions even at the higher frequencies. was obtained from the EM Thus, the [18 18] matrix simulation setup with a single EID per gate finger. The compact was then identified and used along with the [6 6] matrix and matrices to complete the linear available model. Full validation in terms of -parameters and input/output capacitance/conductance is reported in Figs. 15–17 and Table II. The conventional model provides quite more inaccurate results with respect to the EM-based model, as was expected. V. CONCLUSION

IV. SYMMETRIC-LAYOUT CASCODE CELL In order to assess the validity of the proposed approach, it has also been applied to the specifically designed symmetric-layout cell shown in Fig. 14. The long air bridge (AB) in this layout provides the cascode-like connection in a symmetric fashion by joining the drain of the CS FET to the source of the CG FET passing over its gate electrode. The cell was manufactured and fully characterized in terms of -parameters in the frequency range of [1.5–45 GHz]. It was then modeled by means of both the EM-based model and a conventional model, despite this, the latter is expected to introduce quite rough approximations. In fact, in order to provide the symmetry of the layout, both the source and gate layout of the CG stage are modified with respect to the conventional one.

An EM-based model of cascode FETs has been proposed in this paper. The extraction procedure presents the great advantage of being carried out on the basis of conventional -parameters of a single CS device belonging to the selected technological process. Standard information about the process, mostly deducible from GDSII device layouts, is needed for the setting of the EM simulations. The wide experimental validation provided shows dramatic improvements over standard modeling approaches based on commonly available foundry data. APPENDIX A In order to obtain the and admittance matrices, a procedure, which is consistent with the EqID concept defined in Section II, is briefly exposed here [14].

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Fig. 15. Symmetric cascode-cell model S -parameters predictions compared to V, device measurements. The bias condition is for class-A operation: V I mA. Frequency range from 1.5 to 45 GHz. Crosses: device measurements. Lines: EM-based model. Dots: conventional model.

=6

= 15

(

)

Fig. 17. Symmetric cascode cell model predictions of its input G and conductances compared to their measured values. The bias output G V, I mA. Frequency range condition is for class-A operation: V from 1.5 to 45 GHz. Crosses: device measurements. Lines: EM-based model. Dots: conventional model.

(

)

=6

= 15

TABLE II ACTUAL AND PREDICTED VALUES OF C

C

( )

Fig. 16. Symmetric cascode cell model predictions of its input C and output C capacitances compared to their measured values. The bias V, I mA. Frequency range condition is for class-A operation: V from 1.5 to 45 GHz. Crosses: device measurements. Lines: EM-based model. Dots: conventional model.

( )

AND

=6

= 15

The active regions of both the reference device (Fig. 1) and cascode cell (Fig. 2) are partitioned in a given number of twoport EIDs. Every EID is interconnected to each other through a -port network, which can be characdistributed passive admittance matrix. According terized by a to Section II, such a matrix is either the matrix of the ref, or the matrix of the caserence device, when , both obtained on the code cell, when basis of accurate EM simulations. A schematic representation - port parasitic description is shown in Fig. 18, of this are the phasors of extrinsic gate–source and where drain–source voltages and extrinsic gate and drain currents, respectively. Analogously, are the phasors of the EID voltages and currents.

Two basic assumptions are made, which are: 1) the EIDs are considered equal one to another and 2) they are equally excited. 2-port distributed parasitic network of Fig. 18 The two can then be compacted into either a four-port description of parasitic effects, in the case of the reference device, or into a six-port description of parasitic effects in the case of the cascode cell. A.

Identification (Reference Device,

According to Fig. 18, the two main assumptions are translated into the following relations:

(A.1)

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(A.4) and

(A.5)

Fig. 18. Distributed parasitic network (gray pattern) directly obtained from the EM simulation of the device passive structure (described by a 2n + 2 2n + 2 admittance matrix). Voltage and current phasors at the external gate and drain terminals and at the gate and drain EID terminals are also shown.

2

and

are the phasors of voltages and curwhere matrix of Fig. 2. The rents at the ports of the yet unknown latter can be eventually evaluated through (3), which is obtained on the basis of (A.4) and (A.5) after simple algebraic manipuare linear combinations of lations. Thus, the elements of of the the elements matrix representing the multiport EM description of the cascode cell passive structure. C. De-Embedding of

From

According to the matrix relations defined by (1), we have (A.2) are the phasors of voltages and curwhere matrix of Fig. 1. This rents at the ports of the yet unknown latter can be eventually evaluated on the basis of (A.1) and (A.2) after simple algebraic manipulation, through (A.3), shown at the are the elbottom of this page, where matrix. ements of the B.

Identification (Cascode Cell,

)

According to Figs. 2 and 18, the two main assumptions are applied locally to each active area corresponding to the CS and CG FETs. This leads to the following relations:

(A.6) where

(A.7) are the elements of the matrix. and and be the [2 2] matrices repLet resenting the measured extrinsic admittance and the unknown intrinsic reference device admittance such as (A.8) By substituting (A.8) into (A.6), after simple matrix manipulations, the unknown matrix is obtained through

(A.9)

(A.3)

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ACKNOWLEDGMENT The authors gratefully acknowledge Prof. V. A. Monaco, MEC s.r.l., Bologna, Italy, for supporting the research reported in this paper. REFERENCES [1] M. A. Masud and H. Zirath, “A 45-dB variable-gain low-noise MMIC amplifier,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 6, pp. 2848–2855, Jun. 2006. [2] P. S. Wu, H. Y. Chang, M. D. Tsai, T. W. Huang, and H. Wang, “New miniature 15–20-GHz continuous-phase/amplitude control MMICs using 0.18-m CMOS technology,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 1, pp. 10–19, Jan. 2006. [3] R. C. Liu, C. S. Lin, K. L. Deng, and H. Wang, “Design and analysis of DC-to-14-GHz and 22-GHz CMOS cascode distributed amplifiers,” IEEE J. Solid-Sate Circuits, vol. 39, no. 8, pp. 1370–1374, Aug. 2004. [4] W. Ko and Y. Kwon, “A GaAs-based 3–40 GHz distributed mixer with cascode FET cells,” in Proc. RFIC Symp., Jun. 2004, pp. 413–416. [5] S. De Meyer, A. Philippon, M. Campovecchio, C. Charbonniaud, S. Piotrowicz, D. Floriot, and R. Quéré, “Modelling of a 4–18 GHz 6W flipchip integrated power amplifier based on GaN HEMTs technology,” in Proc. Int. GAAS Symp., Paris, France, Oct. 2005, pp. 657–660. [6] C. Tsironis and R. Meierer, “Microwave wide-band model of GaAs dual gate MESFET’s,” IEEE Trans. Microw. Theory Tech., vol. MTT-30, no. 3, pp. 243–251, Mar. 1982. [7] C. Licqurish, M. J. Howes, and C. M. Swoden, “Dual-gate FET modelling,” presented at the IEE Microw. Devices, Fundam., Appl. Colloq., Mar. 1988. [8] P. B. Winson, L. P. Dunleavy, H. C. Gordon Jr, M. V. Calvo, and J. Sherman, “A novel algorithm for bias-dependent cascode FET modeling,” in IEEE MTT-S Int. Microw. Symp. Dig., Orlando, FL, May 1995, pp. 627–630. [9] W.-K. Deng and T.-H. Chu, “Elements extraction of GaAs dual-gate MESFET small-signal equivalent circuit,” IEEE Trans. Microw. Theory Tech., vol. 46, no. 12, pp. 2383–2390, Dec. 1998. [10] S. Bashirzadeh, A. Nabavi, and M. Fardis, “GaAs DGMESFET modelling using SGMESFET models,” in Proc. of IEEE Int. RF Integr. Technol. Workshop, Singapore, Dec. 2005, pp. 202–206. [11] A. Martin, T. Reveyrand, M. Campovecchio, R. Aubry, S. Piotrowicz, D. Floriot, and R. Quere, “Design method of balanced AlGaN/GaN HEMT cascode cells for wideband distributed power amplifiers,” Proc. Eur. Microw. Assoc., vol. 4, no. 12, pp. 261–267, Dec. 2008. [12] J. Gao and G. Boeck, “Relationship between common source, common gate, and common drain FETs,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 12, pp. 3825–3831, Dec. 2005. [13] D. Resca, J. A. Lonac, R. Cignani, A. Raffo, A. Santarelli, G. Vannini, and F. Filicori, “EM-based modeling of cascode FETs suitable for MMIC design,” in IEEE MTT-S Int. Microw. Symp. Dig., Boston, MA, Jun. 2009, pp. 981–984. [14] D. Resca, A. Santarelli, A. Raffo, R. Cignani, G. Vannini, F. Filicori, and D. M. M.-P. Schreurs, “Scalable nonlinear FET model based on a distributed parasitic network description,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 4, pp. 755–766, Apr. 2008. [15] A. Cidronali, G. Collodi, A. Santarelli, G. Vannini, and G. Manes, “A new approach to FET model scaling and MMIC design based on electromagnetic analysis,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 6, pp. 900–907, Jun. 1999. [16] A. Cidronali, G. Collodi, A. Santarelli, G. Vannini, and G. Manes, “Millimeter-wave FET modeling using on-wafer measurements and EM simulation,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 2, pp. 425–432, Feb. 2002. [17] D. Denis, C. M. Snowden, and I. C. Hunter, “Coupled electrothermal, electromagnetic, and physical modeling of microwave power FETs,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 6, pp. 2465–2470, Jun. 2006. [18] J. C. Rautio, “Synthesis of compact lumped models from electromagnetic analysis results,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 12, pp. 2548–2554, Dec. 2007. [19] W. R. Curtice, “A MESFET model for use in the design of GaAs integrated circuits,” IEEE Trans. Microw. Theory Tech., vol. MTT-28, no. 5, pp. 448–455, May 1980. [20] H. Statz, P. Newman, I. W. Smith, R. A. Pucel, and H. A. Haus, “GaAs FET device and circuit simulation in SPICE,” IEEE Trans. Electron Devices, vol. ED-34, no. 2, pp. 160–169, Feb. 1987. [21] A. Materka and T. Kacprzak, “Computer calculation of large-signal GaAs FET amplifier characteristics,” IEEE Trans. Microw. Theory Tech., vol. MTT-33, no. 2, pp. 129–135, Feb. 1985.

[22] D. E. Root, S. Fan, and J. Meyer, “Technology independent large-signal non quasi-static FET models by direct construction from automatically characterized device data,” in Proc. 21th Eur. Microw. Conf., Stuttgart, Germany, Oct. 1991, pp. 927–932. [23] F. Filicori, A. Santarelli, P. A. Traverso, A. Raffo, G. Vannini, and M. Pagani, “nonlinear RF device modelling in the presence of lowfrequency dispersive phenomena,” Int J RF Microw. Comput.-Aided. Eng., vol. 16, no. 1, pp. 81–94, Nov. 2005. [24] “Sonnet em User’s Manual,” Sonnet Softw., North Syracuse, NY, 2009, rel. 12. [25] J. C. Rautio, “Shortening the design cycle,” IEEE Microw. Mag., vol. 9, no. 6, pp. 86–96, Dec. 2008. [26] J. C. Rautio, “EM-component-based design of planar circuits,” IEEE Microw. Mag., vol. 8, no. 4, pp. 79–90, Aug. 2007. [27] R. Goyal, Monolithic Microwave Integrated Circuits: Technology and Design. Norwood, MA: Artech House, 1989. [28] K. B. Niclas, W. T. Wilser, T. R. Kritzer, and R. R. Pereira, “On theory and performance of solid-state microwave distributed amplifiers,” IEEE Trans. Microw. Theory Tech., vol. MTT-31, no. 6, pp. 447–456, Jun. 1983. [29] J. B. Meyer, S. N. Prasad, R. C. Becker, J. E. Nordman, and G. K. Hoehenwarter, “Mesfet distributed amplifier design guidelines,” IEEE Trans. Microw. Theory Tech., vol. MTT-32, no. 3, pp. 268–275, Mar. 1984. [30] M. Ohtomo, “Stability analysis and numerical simulation of multidevice amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 41, no. 6, pp. 983–991, Jun./Jul. 1993. [31] W. Struble and A. Platzker, “A rigorous yet simple method for determining stability of linear N -port networks,” in IEEE GaAs Integr. Circuit Symp. Dig., San Jose, CA, Oct. 1993, pp. 251–254.

Davide Resca (S’05–M’09) was born in Bologna, Italy, in 1979. He received the Laurea degree in electronic engineering from the University of Ferrara, Ferrara, Italy, in 2004, and the Ph.D. degree in electronics and computer science from the University of Bologna, Bologna, in 2007. Following a post doctorate grant from the Department of Electronics, Computer Science and Systems (DEIS), University of Bologna), in 2008, since 2009 he has been a MMIC Design Engineer with MEC s.r.l., Bologna, Italy. His research activity is mainly oriented to linear and nonlinear device modeling and circuit design techniques for nonlinear microwave and millimeter-wave applications.

Julio A. Lonac was born in La Plata, Argentina, on July 8, 1976. He received the M.S degree in electronics from the University of La Plata, La Plata, Argentina, in 2001, and the Ph.D. degree in electronics, informatics, and telecommunications from the University of Bologna, Bologna, Italy, in 2005. He was a Researcher involved with the ambit of the European project TARGET. He has collaborated as a MMIC Designer in the Italian Space Agency (ASI) and Argentinean Space Agency (CONAE) SAOCOM project. He is currently an MMIC Designer with MEC s.r.l., Bologna, Italy. His major field of study concerns the modeling and design of MMICs for telecommunication and radar applications.

Rafael Cignani was born in Ravenna, Italy, in 1975. He received the Laurea degree in telecommunications engineering from the University of Bologna, Bologna, Italy, in 2000, and the Ph.D. degree in information engineering from the University of Ferrara, Ferrara, Italy, in 2004. During his doctoral studies, he collaborated with the Department of Electronics, Computer Science and Systems (DEIS), University of Bologna. He is currently a Graduated Technician with the DEIS, University of Bologna. His research activity is mainly oriented to MMIC design and nonlinear circuit modeling and design techniques.

RESCA et al.: ACCURATE EM-BASED MODELING OF CASCODE FETs

Antonio Raffo (S’04–M’07) was born in Taranto, Italy, in 1976. He received the M.S. degree (with honors) in electronic engineering and Ph.D. degree in information engineering from the University of Ferrara, Ferrara, Italy, in 2002 and 2006, respectively. Since 2002, he has been with the Electronic Department, University of Ferrara, Ferrara, Italy, where he is currently a Contract Professor of electronic instrumentation and measurement. His research mainly concerns nonlinear electron device characterization and modeling and circuit-design techniques for nonlinear microwave and millimeter-wave applications. Dr. Raffo is a member of the Italian Association on Electrical and Electronic Measurements.

Alberto Santarelli (M’97) received the Laurea degree in electronic engineering and Ph.D. degree in electronics and computer science from the University of Bologna, Bologna, Italy, in 1991 and 1996, respectively. From 1996 to 2001, he was a Research Assistant with the Research Center for Computer Science and Communication Systems, Italian National Research Council, Bologna, Italy. Since 2001, he has been with the Department of Electronics, Computer Science and Systems (DEIS), University of Bologna, where he is currently an Associate Professor. His main research interests are electron device nonlinear modeling and circuit design for microwave applications.

Giorgio Vannini (S’87–M’92) received the Laurea degree in electronic engineering and Ph.D. degree in electronic and computer science engineering from the University of Bologna, Bologna, Italy, in 1987 and 1992, respectively. In 1992, he joined the Department of Electronics, University of Bologna, as a Research Associate. From 1994 to 1998, he was with the Research Centre on Electronics, Computer Science and Telecommunication Engineering, National Research Council (CSITE), Bologna, Italy, where he was responsible

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for MMIC testing and the CAD Laboratory. In 1998, he joined the University of Ferrara, Ferrara, Italy, as an Associate Professor, and since 2005, as a Full Professor of electronics. He is also currently Head of the Engineering Department, University of Ferrara. During his academic career, he has been a Teacher of applied electronics, electronics for communications, and industrial electronics. He is a cofounder of the academic spin-off Microwave Electronics for Communications (MEC). He has coauthored over 160 papers devoted to electron device modeling, computer-aided design techniques for MMICs, and nonlinear circuit analysis and design. Dr. Vannini is a member of the Gallium Arsenide Application Symposium (GAAS) Association. He was the recipient of the Best Paper Awards presented at the 25th European Microwave Conference, GAAS98, and GAAS2001 conferences.

Fabio Filicori received the Dr. Ing. degree in electronic engineering from the University of Bologna, Bologna, Italy, in 1974. In 1974, he joined the Faculty of Engineering, University of Bologna, as an Assistant Researcher, and then becoming an Associate Professor. In 1990, he became a Full Professor of electronics with the University of Perugia. In 1991, he rejoined the University of Ferrara, where he was Coordinator of the degree course in “Electronic Engineering.” He is currently a Full Professor with the University of Bologna, where he has been Coordinator of the Ph.D. course in “Electronics, Computer Science and Telecommunications.” He has been the Coordinator of research projects in electronic engineering promoted by the Ministry of University and Research. In 2007, he became a member of the Technology Commission, Italian Space Agency. He has authored or coauthored approximately 200 papers. His research concerns nonlinear microwave circuit design, electron device modeling, electronic measurements, and industrial electronics. Dr. Filicori has been a workpackage leader for the European NoE TARGET. He has been Technical Program Committee (TPC) chairman for the EUMIC Conference. He is a member of the Editorial Board for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES.

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Joint Mitigation of Power Amplifier and I/Q Modulator Impairments in Broadband Direct-Conversion Transmitters Lauri Anttila, Member, IEEE, Peter Händel, Senior Member, IEEE, and Mikko Valkama, Member, IEEE

Abstract—In this paper, we present a novel digital predistorter structure for joint mitigation of frequency-dependent power amplifier (PA) and in-phase and quadrature (I/Q) modulator impairments in direct-conversion radio transmitters. The predistorter is based on an extended parallel Hammerstein structure, yielding a predistorter that is fully linear in the parameters. In the parameter estimation stage, the indirect learning architecture is utilized. The proposed technique is the first technique in the literature to consider the joint estimation and mitigation of frequency-dependent PA and I/Q modulator impairments. Extensive simulation and measurement analysis is carried out to verify the operation and efficacy of the proposed predistortion structure. It is shown that the adjacent channel power ratio is increased by more than 20 dB in all experiments when using the proposed method, and that the performance of the reference techniques is clearly exceeded. Index Terms—Digital predistortion (PD), direct-conversion radio, in-phase and quadrature (I/Q) imbalance, I/Q modulator, local oscillator (LO) leakage, mirror-frequency interference (MFI), power amplifier (PA), spectral regrowth.

I. INTRODUCTION HE CURRENT trend in building low-cost, yet flexible and efficient, radio transceivers is to use the so-called direct-conversion radio architecture, which is based on complex in-phase and quadrature (I/Q) up-conversion and down-conversion [1]. There are, however, several practical implementation-related problems still ahead before the direct-conversion principle can be successfully deployed to process more complex wideband waveforms of future wireless systems [2]. These problems are stemming from imperfections and nonidealities of the used analog RF and baseband electronics, such as I/Q mismatch, oscillator phase noise, signal leakages in the local oscillator (LO) resulting in dc offsets and even-order nonlinear distortion, and power amplifier (PA) nonlinearities. The effects

T

Manuscript received July 28, 2009; revised December 06, 2009. First published March 15, 2010; current version published April 14, 2010. This work was supported by funding from the European Research Council under the European Community’s Seventh Framework Program (FP7/2007–2013)/ERC Grant Agreement 228044, by the Finnish Funding Agency for Technology and Innovation (Tekes), by the Academy of Finland, by the Technology Industries of Finland Centennial Foundation, and by the Graduate School GETA. L. Anttila and M. Valkama are with the Department of Communications Engineering, Tampere University of Technology, FI-33101 Tampere, Finland (e-mail: [email protected]; [email protected]). P. Händel is with the Signal Processing Laboratory, ACCESS Linnaeus Center, Royal Institute of Technology, 11428 Stockholm, Sweden (e-mail: [email protected]). Digital Object Identifier 10.1109/TMTT.2010.2041579

of these impairments are becoming more pronounced as higher order modulated waveforms and/or more wideband multichannel signals are used. In multiple-input multiple-output (MIMO) systems, the problems are expected to be even more severe since each antenna has its own radio transceiver, and thus, its own (independent) impairments [3]. Therefore, high-performance digital calibration and signal enhancement methods that are suitable for wideband signals will be needed in future wireless transceivers [2]. In transmitters, the PA is one of the key components, responsible for amplifying the transmitted signal such that it arrives at the receiver with an adequate power level. Amplifiers are inherently nonlinear devices, and with modern signal waveforms with high peak-to-average power ratio (PAPR), plenty of nonlinear distortion, both harmonic and intermodulation distortion (IMD), may be created [2], [4], [5]. In the frequency domain, this nonlinear distortion is seen as spectral regrowth, wherein a great deal of power can be leaked onto the adjacent channels. Further, generally the nonlinearities of PAs are not instantaneous, but have memory effects. Many types of PA linearizers—devices or techniques that aim at making the PA response linear—have been proposed and used in the past (see [4] for a review). From performance and flexibility points of view, adaptive digital predistortion (PD) is currently seen as the most promising linearization technique [5]. In this paper, when speaking of PD, we mean adaptive digital PD. Relative amplitude and phase mismatches between the I/Q signal branches of direct-conversion radios cause mirror-frequency interference (MFI) [2], [6]. In transmitters, depending on the spectral content of the low-frequency I and Q signals (baseband or low IF), MFI results in self-interference or adjacent channel interference. In addition to this problem, I/Q imbalance and LO leakage are known to cause extra IMD terms to appear at the PA output, as well as to cripple the performance of adaptive PA predistorters [7], [8]. Under I/Q imbalance and/or LO leakage, the PA predistorter coefficient estimates are heavily biased and PD can potentially make the spectral regrowth even worse. Some authors have previously considered these problems together. The techniques in [8]–[10] focus on I/Q modulator/demodulator errors only, not assuming any specific PA predistorter. In [11], a simple polynomial PA predistorter is added to complement the modulator predistorter. Unfortunately, due to the separate processing of the PA and modulator impairments, [8]–[11] require considerable extra RF hardware compared to pure PA PD in the form of either an RF switch or

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Fig. 1. General I/Q transmitter structure including the adaptive digital predistorter in serial configuration.

a second feedback loop. The methods in [12] and [13] are truly joint methods, i.e., they estimate all the impairments jointly, without the need for additional RF hardware. However, they only consider frequency-independent impairments. Furthermore, in [14], a Volterra-based predistorter was developed for nonlinear I/Q imbalance, but the sources of nonlinearity were in the baseband I/Q components and the PA was not included in the developments. Thus currently, there is no technique available for estimating and compensating frequency-dependent PA and I/Q modulator impairments jointly. Altogether handling of frequency-dependent RF impairments is seen critical for the emerging wireless systems like IMT-Advanced, in which radio bandwidths up to 100 MHz will be deployed [15]. This paper focuses on joint PA and I/Q modulator calibration in wideband direct-conversion transmitters, assuming frequency-dependent behavior for PA nonlinearities and modulator I/Q imbalance. The proposed technique is indeed the first technique that considers all the major analog impairments of a wideband direct-conversion radio transmitter in a joint manner, enabling one-step estimation of the predistorter parameters without any extra RF hardware. No specially designed training signals are needed in the parameter estimation stage, meaning that estimation can, in principle, be done during normal operation of the transmitter. Simulation and measurement analyses show superior performance compared with state-of-the art. The proposed technique can find applications especially in cellular base-stations, broadcast transmitters, and other high-performance RF signal generators. This paper is organized as follows. Section II introduces the novel predistorter structure for PA and modulator impairments, suitable for frequency-dependent calibration. Its computational requirements are also discussed. In Section III, a least squares (LS) parameter estimation technique for calculating the predistorter coefficients is proposed, utilizing the indirect learning architecture (ILA). The problem of measurement noise in ILAbased estimation, and properties of LS estimates are also discussed. Experimental results are presented in Section IV, and Section V presents conclusions. Notation: Vectors are in bold lower case and matrices in bold upper case. Complex-conjugation, matrix transpose, and conjugate transpose are denoted by , , and , respectively. . The statistical expectation operator is

II. PROPOSED JOINT PA AND I/Q MODULATOR PREDISTORTER STRUCTURE A general I/Q transmitter structure, including a principal digital predistorter in the serial configuration (e.g., as in [9]), is shown in Fig. 1. This structure compensates for the impairments in the reverse order that they appear, and is used as the starting point here. The PA predistorter is a parallel Hammerstein (PH) or memory polynomial predistorter with the static nonlinearities given by the polynomials (1) denoting the polynomial order, denoting the set with denoting the polynomial of used polynomial orders, and are weights [15]–[17], [19]. If all polynomial orders up to used in the predistorter, , and when only . Furthermore, odd orders are considered, in which orders only up to are retained is the subset of , in turn, are usually finite denoted by . The filters impulse response (FIR) filters, as is also assumed in this paper. The PH model has been shown to be a versatile tool for inverse, as well as direct, modeling of PAs [16], [17]. One may also note that direct and inverse PA models have similar properties [18]. The polynomial in (1) is of general nature, including both even and odd polynomial orders, and enabling the use of either ) or conventional polynomials (by setting some type of orthogonal polynomials. For the experiments in this paper, the statistically orthogonal polynomials (meaning ) for complex-valued that for circular zero-mean Gaussian signals from [19] are adopted. In are given this case, the polynomial weights for unit-variance as [19] (2)

where is the binomial coefficient. Other polynomials, orthogonal or not, can be used as well, but their numerical properties, and hence, their performance in fixed-point implementations, may be different. See, e.g., [19] for a discussion of the possible numerical difficulties encountered in PD parameter estimation.

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The I/Q modulator predistorter part in Fig. 1 is of the general , is filtering the original or two-filter type, where one filter, , is filtering the nonconjugate signal, and the other filter, conjugated signal. For more details on the used I/Q mismatch model, the reader is referred to [6], [9], and [10]. In general, for known I/Q imbalance and PA distortion characteristics, the serial pre-distorter depicted in Fig. 1 enables efficient digital pre-distortion. It is, however, problematic from a practical pre-distorter parameter estimation point of view. This is because the filters of the PA PD and I/Q PD are in cascade, making their joint estimation difficult. With the serial structure, one has to train the predistorters separately, requiring additional RF hardware compared to pure PA PD. In this paper, using Fig. 1 as a starting point, we propose a modified PD structure, which is completely parallel, enabling one-step joint estimation of all PD parameters using linear LS techniques, and without any extra RF hardware. A. Proposed Predistorter Structure First, with reference to Fig. 1, move the LO leakage compensator to the end of the PD chain and rename it . Then add the I/Q PD to each branch of the PA PD, as shown in Fig. 2(a) for with and with the th branch. Then merge to obtain

Fig. 2. Transforming a single branch of the joint PA and I/Q predistorter from the serial structure to the parallel structure.

(3a) (3b) as in Fig. 2(b). Finally, because , we arrive at the form in Fig. 2(c). The final structure in Fig. 2(c) allows us to split the predistorter into a nonconjugate and a conjugate PD, resulting in a parallel connection of two PH PDs with outputs Fig. 3. Proposed predistorter structure for the joint PD of PA and I/Q modulator impairments.

(4a)

(4b) and denote the imas also shown in Fig. 3. Here, pulse responses of and , respectively, and denotes convolution. Notice that, in (4b), the polynomial order is now changed to since, in general, the orders in (4a) and (4b) need not be the same. Finally, taking into account the dc offset compensator , we can write the output of the complete predistorter as (5) If , the final predistorter structure in Fig. 3 is, from an input–output point of view, equivalent to the original serial , the structure in Fig. 1. However, in the general case of derived structure indeed gives additional degrees of freedom in the predistorter design compared to the serial structure. The parallel structure can have different polynomial orders, as well as an amount of memory for the direct and conjugate signal terms. Since the conjugate signal due to I/Q imbalance is typically a

few tens of decibels below the direct signal, we could, for example, consider a fifth-order PD for the direct signal, but only a third-order PD for the conjugate signal, without significant loss in performance. The most important feature of the proposed PD structure is the fact that it is identifiable due to the linearity with respect to its parameters. Identifiability cannot be established with certainty for the serial structure without separate training and the additional RF hardware involved. B. Computational Aspects of the Proposed Structure The dimensionality of the predistorter is increased when transforming it from the serial to the parallel structure. In the serial structure, the number of complex-valued parameters is with denoting the FIR filter length denoting the set of used polynomial in the th PD branch, orders, and denoting the lengths of the I/Q PD filters. In the complex-valued parallel structure, parameters are needed, where is related to and by , and is the set of polynomial orders in the conjugate PD. (with As a numerical example, consider the case of odd orders only considered), and for the

ANTTILA et al.: JOINT MITIGATION OF PA AND I/Q MODULATOR IMPAIRMENTS

serial structure, and and for the equivalent parallel structure. The serial PD structure has 19 complex-valued parameters, while the parallel PD structure has 41 complex-valued parameters. The dimensionality is thus more than doubled. This difference can, to some extent, be alleviated by carefully selecting the predistorter and filter orders without affecting obtainable performance. Added dimensions mean extra calculations, both in the estimation and compensation stage. The dimensionality of the predistorter directly tells the number of complex-valued multiplications per sample done in the linear filters. In addition to this, the nonlinear part of the predistorter, meaning implementing the polynomials in (1), requires computations. In the proposed PD structure, the individual PH predistorters share the same basis functions (excluding complex conjugation, which is just a sign change) so no extra computations are involved in the nonlinear part of the new predistorter. If conventional , with odd orders up polynomials of the form real-valued multito , are used, both predistorters require plications per sample (maps to complex-valued multiplications). Using the general polynomials of (1), both PD strucreal multiplications, assuming are tures need real valued, as is usually the case. Overall, taking both the linear and nonlinear parts of the predistorters into account, the parallel structure requires about 1.5–2 times more complex-valued multiplications per sample compared to the serial structure. With the ever-increasing number crunching capabilities of transceivers, this difference can in no way be prohibitive. The number of floating point operations needed in the estimation stage, using conventional block LS algorithms, is proporwith denoting the number of estimated paramtional to eters [20]. Doubling the number of parameters would increase the computational load eightfold. On the other hand, the serial predistorter needs two training periods since the PA and I/Q predistorters need to be trained separately. As a whole, the parallel PD needs about four times more computations. Even though this is significant, its cost is still considered to be smaller than the cost of the extra RF hardware needed for the serial predistorter. It should also be kept in mind that estimation of the parameters is periodic or occasional and is, therefore, not a continuous load on the processing unit. From the overall transmitter operation point of view, the computations carried out by the predistorter itself are, therefore, more important. In general, expanding the dimensionality of an estimation problem may increase its noise sensitivity [21]. In this particular problem, however, noise is not a serious issue since all processing is done inside the transmitter. Even though some noise is present in the feedback signal, measurements have shown that feedback signal-to-noise ratios (SNRs) in excess of 40 dB are easily obtainable. The effects of additive noise on parameter estimation when utilizing the ILA will be discussed in more detail in Section III, and through a simulation example in Section IV. In summary, the selection between the serial and parallel structures comes down to weighing the additional RF hardware and engineering costs against the digital hardware or software costs. With the ever-increasing digital computing capabilities of transceiver processing units, fueled by Moore’s law, it is our firm belief that the cost advantage is on our side.

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Fig. 4. ILA operating principle.

III. PREDISTORTER PARAMETER ESTIMATION A. ILA In the parameter estimation stage, we utilize the ILA, whose principal (baseband equivalent) operation is illustrated in Fig. 4 [16], [23]. Here, denotes formally the PA nonlinear function, and is the estimate of the post-inverse of . Ideally, with denoting the intended (amplitude) gain of the amplifier. In short, the idea behind the ILA is to find the post-inverse of the PA nonlinear function and then, assuming that it equals the pre-inverse, use it as the predistorter. Thus, in PD techniques employing the ILA, it is implicitly assumed that the inverse of the PA is commutative. While the inverse of a general nonlinear function (if one exists) is not commutative, Schetzen showed in [22] that for an invertible Volterra nonlinearity, the th-order pre-inverse is equal to the post-inverse, thus giving a formal justification to the ILA principle. Even though in the ILA the th-order inverse technique is not explicitly employed, but an inverse that minimizes some error criterion (e.g., LS or mean square error) is calculated, we assume the commutativity result of [22] to hold, at least approximately. The available literature on the ILA (see, e.g., [16], [19], [23], and [24]), as well as our own results, all of which are based wholly on experimental results, support this. The basic theory of the ILA, as well as the commutativity of the inverse, are out of the scope of this paper, but form an interesting topic for further studies. For further discussion and details on indirect learning, the reader is directed to [16], [19], and [23], and the references therein. The most appealing feature of the ILA is that it enables the estimation of the predistorter coefficients directly without the need for finding and inverting a PA model, and if a suitable predistorter structure such as PH is used, by using plain linear LS techniques. Basic properties of linear LS, such as uniqueness of the solution when the data matrix is of full column rank [20] then apply to the PD estimation problem. This is not true for direct learning (PA model identification followed by predistorter learning) in general because the estimation problem is always nonlinear in the parameters. The adaptive algorithms used in direct learning (e.g., those in [25]) can, therefore, lock to local minima. In this paper, we define an ILA iteration as a single cycle of the following operations: (in the first • transmitting a predistorted signal of length ILA iteration the predistorter is turned off);

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• measuring the signal in the feedback loop and identifying the post-inverse of the PA; • plugging the post-inverse parameter estimates into the predistorter. An interesting feature of the ILA is that several such ILA iterations may be needed for the predistorter to fully converge, as noted, for example, in [19] and [24]. Typically, 1–3 iterations are needed. As far as we know, this phenomenon has never been given an explanation. An intuitive explanation follows. In the first iteration, with PD initially turned off, a signal with a certain PAPR and bandwidth is sent through the PA, exciting a certain input voltage range and bandwidth of the PA. In the second ILA iteration, with the first PD estimates plugged in, both the bandwidth and the PAPR of the signal are increased since the PD acts as an expander. If PA input power is kept constant, the predistorted signal then excites a wider input voltage range and a wider bandwidth of the PA, and therefore, delivers information about the PA’s characteristics from a wider range to the PD estimator. More accurate estimation of the PA inverse is then expected. ILA based predistorters with recursive estimation and continuous updating of the predistorter coefficients have been reported in [23] and [26]. Due to the feedback loop delay, careful control of the updating step size is paramount in order to avoid instability. Modifying the proposed block estimation structure to a recursive implementation is also possible, and forms another interesting direction for future studies.

B. LS Based Parameter Estimation With reference to Fig. 4, we denote the postdistorter input signal (the complex envelope of the scaled PA output) by , the postdistorter output signal by , and the training signal length and by . Assuming finite time spans for the filters denoted, respectively, by and , we can write the postdistorter output signal (3) in vector-matrix notation as

Above, the filter impulse response vectors are given as (7a) (7b) and the filter input vectors are obtained from (1) as

(8a) (8b) Notice that and are the linear filters of the predistorter, with and , while and , are the respective lengths polynomial filters. samples of the observed signal , Collecting a block of we can write the output vectors of the th nonconjugate and th conjugate predistorter branches as (9a) (9b) is the nonconjugate polynomial basis matrix of order Here, , given as (10), shown at the bottom of this page, and is the conjugate polynomial basis matrix of order , constructed in a has dimensions similar manner. The matrix , and similarly, has dimensions . We then add zero rows to the bottom of and to make them all of equal height. By collecting all the polynomial basis matrices into a single block matrix, and appending it with a vector of all 1’s, denoted by , to account for the LO leakage compensator, we obtain (11) Finally, stacking the filter impulse responses of (7a) and (7b) and the LO leakage compensator coefficient into a single vector as

(6) (12)

.. .

.. .

.. .

.. . (10)

.. .

.. .

.. .

.. .

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we can write the complete postdistorter output vector as (13) Using (7)–(13), and denoting the reference signal vector by , the LS estimation problem is constructed as finding that parameter vector , which minimizes the cost function , yielding the well-known LS solution [21]

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is defined the noisy data matrix, is where the ideal noiseless data matrix, and is the error matrix. The form of the error matrix is given in (A-6) for the simple case of and . Due to the nonlinearities in , the error term depends not (1) operating on the sum only on the additive noise, but also on . Multiplying (15) from , we obtain the left by

(14) In introducing (10), we implicitly assumed that outside the interval , even though this might not be the case in reality. This kind of data windowing, known as the autocorrelation windowing method, yields biased LS estimates for short observation blocks [21]. Therefore, to avoid the windowing-induced bias, we utilize the covariance windowing method in the actual estimation stage. The covariance windowing method makes no assumptions about the data outside the known interval. In practice, this is achieved by cutting and last rows out the first of , as well as the corresponding samples from the reference signal vector . Above, we have presented a novel predistorter structure for the joint compensation of PA and I/Q modulator impairments, and proposed a simple LS parameter estimation scheme based on the ILA. Next, we make a few brief notes about the performance of the proposed estimator when there is measurement noise present, and of general properties of the LS estimator. In Section IV, we then assess the performance of the proposed solution through extensive computer simulations and RF laboratory measurements and compare it with state-of-the-art reference techniques. C. Measurement Noise in Indirect Learning Thus far, we have assumed a completely noiseless scenario, which is rather plausible due to the transmitter internal processing. In practice, however, there is some inevitable noise in the feedback loop signal. Measurement noise in indirect learning-based estimation affects the solution differently than in direct learning because the former is an inverse-system identification problem, while the latter is a direct system identification problem. The trouble in indirect learning comes from the fact that the noise lies in the independent variables (data matrix ) instead of the dependent variables (here, the reference signal ). This type of an estimation problem is no longer an ordinary LS problem, but is known as the data least squares (DLS) problem [27] or the errors-in-variables model [28], and is known to cause coefficient bias. The form of the bias in high SNR is assessed next. Formally, the noise in introduced by making the substitution in (6), where is complex-valued circular white Gaussian noise with mean zero and variance . Under such measurement noise, we can write the postdistorter output vector formally as (15)

(16) . where Now, assuming that the noise level in the postdistorter is input is low compared to the signal level (high SNR), , and we can make the approximation much smaller than [29], where denotes an equality where only the dominant terms have been retained. Thus, the noisy LS solution becomes

(17) where the last term on the second line is ignored because it is smaller than the other terms due to second-order noise effects. The coefficient vector is, therefore, biased, with the bias consisting of a multiplicative term and an additive term. Also quite clearly, if noise is absent, (17) reduces to (14). The bias terms, as well as the more precise structure of the error matrix , will be analyzed in more detail in future work. A simulation example of the influence of noise on the proposed predistorter is provided in Section IV. D. Properties of the LS Based Estimator As stated earlier, the LS estimator has a unique solution given that the data matrix has full column rank [20]. Full rank is guaranteed with all practical communications waveforms. However, even if the data matrix is of full rank, the sensitivity of the solution can depend on the condition number of the data matrix. Condition number is a measure of the linear dependency of the columns of the data matrix, and is generally related to the power spectral density (PSD) of the used signal waveform, as well as the dimensionality of the problem [21]. If both the data matrix and the observation vector are perturbed by noise, then according to the perturbation analysis in [20], the error in the LS solution is proportional to the square of the condition number. Orthogonal polynomials, as discussed for example in [19], can alleviate the problem of LS solution misalignment by decreasing the condition number of the data matrix. Therefore, by use of orthogonal polynomials, the LS solution should be robust against measurement noise. Orthogonal polynomials will not solve the bias problem discussed earlier, but they should provide more

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consistent LS estimates, especially in fixed-point implementations. IV. SIMULATION AND MEASUREMENT EXAMPLES The reference techniques used in the simulations and measurements are the plain PH PD without I/Q mismatch compensation (see, e.g., [16]) and the memoryless joint PA/IQ PD from [12]. They represent state-of-the-art in the field. In all the cases, the feedback signal for parameter estimation purposes is always taken from the PA output (as in Fig. 1). The chosen figure-ofmerit is the adjacent channel power ratio (ACPR), which is defined as (18) denoting the PSD of the postdistorter input signal with , and and denote the frequency band of the (worse) adjacent channel and the desired channel, respectively. Equation (18) assumes that the desired channel and adjacent channel have equal bandwidths. It is worth noting that there is a difference in adjacent channel content between the direct-conversion and the low-IF transmitters; in direct-conversion, the adjacent channel power consists only of spectral regrowth due to PA nonlinearity, while in the low-IF case, it also includes the MFI resulting from I/Q imbalance, and possibly also the tone due to LO leakage.

Fig. 5. Output spectra of the PA with ideal linear amplification, the Wiener PA model without PD and with the proposed joint PA and I/Q predistorter. 16-QAM signal with root-raised cosine pulse and 22% roll-off. 5.000 samples used for coefficient estimation at each iteration.

A. Simulation Example 1—Direct-Conversion TX The PA is modeled by a Wiener nonlinearity, meaning that there is a linear time-invariant filter followed by static nonlinearity. The PA parameters are from [30], and have been reportedly extracted from a real class AB PA. The filter has transfer function , while the static nonlinearity is a fifth-order polynomial with complex-valued coeffi, , cients . and The I/Q imbalance parameters are as follows: gain imbalance 5%, phase imbalance 5 , and impulse response mismatch , which translate into frequency-dependent image rejection ratio (IRR) that is varying between 24–30 dB within the band. For more details on the I/Q mismatch model, refer to [10]. The PD consists of a ninth-order PD for the nonconjugate and a fifth-order PD for the conjugate signal. Both PDs are PH with branch filters of length five, and utilize the orthogonal polynomials from [19]. Including also the LO leakage compensator, there are altogether 41 complex-valued coefficients to estimate. At each ILA iteration, 5.000 samples are used for estimating the coefficients. The signal used in the simulations is a 16 quadrature amplitude modulation (16-QAM) single-carrier signal, oversampled eight times, with raised-cosine pulse shape, and 22% roll-off. The PA input power is backed off 2 dB from the PA’s 1-dB compression point. Fig. 5 shows the PSD of the PA output without PD, with the proposed PD structure, with the reference PD techniques, and with an ideal linear PA, averaged over 500 realizations. The

Fig. 6. ACPRs for the proposed and reference techniques in a direct-conversion transmitter.

proposed PD is able to reduce the adjacent channel interference significantly, and clearly outperforms the reference techniques. Fig. 6 shows the evolution of the ACPR with ILA iteration number for the different algorithms. It can be seen that the proposed PD converges at second ILA iteration. This observation is in line with the earlier discussion in Section III-A. B. Simulation Example 2—Low-IF TX In the second example, a low-IF 16-QAM signal is transmitted, and the PD is again trained with 5.000 samples at each iteration. Fig. 7 shows the PSD of the PA output without and with PD, averaged over 500 realizations. The operation of the I/Q imbalance and LO leakage compensators are now seen more clearly than in the previous example. The proposed PD is able to push the spectral regrowth, and mirror frequency interference and LO leakage considerably down. Fig. 8 shows the evolution of the ACPR, and again it takes two ILA iterations for the proposed PD to converge. Here, the PD is again ninth/fifth order with branch filter lengths of 5. Even better performance can be obtained by having a higher PD order, filter length 6, and by increasing the estimator block length, but

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Fig. 7. Output spectra of the PA with ideal linear amplification, the Wiener PA model without PD and with the proposed joint PA and I/Q predistorter. Compared with the plain PH PD [16] and the memoryless joint PA/IQ PD from [12]. 16-QAM low-IF signal.

Fig. 8. ACPRs for the proposed and reference techniques in a low-IF transmitter.

the current setup is considered to be a good tradeoff between performance, reliability, and complexity. C. Simulation Example 3—Effect of Measurement Noise Now, we repeat the simulation setup of the first example as a function of the in-band SNR, to find out how the ACPRs of the different predistorters behave with increasing measurement noise. ACPRs from the third ILA iteration are shown in Fig. 9. Decreasing the SNR has a clear detrimental effect on the obtainable performance. The effects in this particular example start to appear when SNR goes below 50–55 dB, but very good perfordB is still obtained with the proposed PD mance at 35–40 dB SNR. This is easily obtainable in a practical measurement scenario. D. Measurement Results Finally, results of laboratory measurements are presented. Here, a Rohde&Schwartz (R&S) SMJ vector signal generator acts as the transmitter, the amplifier under test is a Mini Circuits ZJL-3G , and R&S FSG spectrum/signal analyzer, equipped with a digital IF receiver inside, is used as the feedback loop re-

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Fig. 9. Effect of measurement noise on the ACPR provided by the proposed method and the reference techniques. Wiener PA model with IBO = 2 dB.

Fig. 10. Spectra of measured amplifier output signals. 16-QAM single-carrier signals with symbol rate of 7.68 MHz and eight times oversampling. PD orders are seventh/fifth. Frequencies refer to values around the used 2.1-GHz center frequency.

ceiver. Modulator I/Q imbalance (5% gain, 5 phase, frequency independent) and LO leakage are introduced to the signal inside the SMJ transmitter. All other processing is done in MATLAB on a PC. The first measurement example consists of a single-carrier 16-QAM signal with 50% excess bandwidth, symbol rate of 7.68 MHz, and eight-times oversampling. The carrier frequency is 2.1 GHz. The PA input back-off is about 2 dB. Predistorter is seventh/fifth order with filter lengths of 3, and it is trained with 20.000 samples at each ILA iteration. Fig. 10 shows the spectra of the complex envelope of the PA output without PD, with the reference techniques, and with the proposed PD structure after the second ILA iteration (two estimation cycles). Clear performance improvement over the uncompensated case and the reference techniques can be obtained with the proposed method. The new joint PA/IQ PD yields 20–25-dB lower interference levels in the adjacent channels compared to the “No PD” case, and 10–15 dB compared to the reference techniques. In the second example, the signal is an orthogonal frequencydivision multiplexing (OFDM) signal with 600 active subcarriers out of 1024, and with a spacing of 15 kHz, thus corre-

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APPENDIX Here, the form of the error matrix in (15) is given for the speand , assuming convencial case of tional polynomials. Altogether, there are four polynomial basis functions, given as (A-1a) (A-1b) (A-1c) (A-1d) The noisy postdistorter input signal is defined as (A-2) Fig. 11. Spectra of measured amplifier output signals. OFDM signals with 600 active subcarriers out of 1024, 15-kHz subcarrier spacing, and four times oversampling. PD orders are seventh/fifth. Frequencies refer to values around the used 1.9-GHz center frequency.

sponding to a 3GPP long-term evolution (LTE) downlink signal in 10-MHz mode [31]. In this example, due to the higher PAPR of the OFDM signal, the PA input back-off is 5 dB. The signal is oversampled four times and upconverted to 1.9 GHz for amplification and transmission. The predistorter is again seventh/fifth order with filter lengths of 3. Fig. 11 shows the measured amplifier output PSD without PD, with the reference techniques, and with the proposed PD, evidencing significant performance improvement also with measured OFDM waveforms. As can be seen in Figs. 10 and 11, there is still residual spectral regrowth that the predistorter cannot mitigate. There are several factors that contribute to this. First, there may be a model mismatch between the PD and PA. The PD model may not be able to grasp all the features of the PA nonlinearity due, for example, to insufficient memory or predistorter order, resulting in nonideal regrowth mitigation. Other factors that, in general, contribute to the residual out-of-band energy are the nonlinear orders higher than the predistorter order that are inevitably present at the PA output, changes in the PA’s characteristics that the PD is not able to follow (due to, e.g., temperature drift or change of power gain), measurement noise, and other nonidealities related to the measurement equipment (e.g., ADC nonlinear behavior) or subsequent processing (such as residual synchronization errors).

with denoting the ideal noiseless postdistorter input signal denoting the noise signal, which is assumed to be comand plex-valued circular white Gaussian with mean zero and vari, we obtain ance . Expanding the basis function

(A-3) where the third-order error term is defined as . Similarly, for the conjugate third-order basis function, we obtain (A-4) Now we can write the noisy data matrix as the noiseless data matrix is given as

.. .

.. .

, where

.. .

.. . (A-5)

and the error matrix is given as

.. .

.. .

.. .

.. .

(A-6)

V. CONCLUSIONS A new joint PA and I/Q modulator predistorter was proposed, which is suitable for mitigating frequency-dependent impairments, using only a single feedback signal from the PA output to digital baseband. The PD is completely parallel, consisting of two PH predistorters plus LO leakage compensation. The PD is linear in the parameters, thus allowing easy estimation of PD parameters with linear LS techniques. The simulation and measurement analyses show promising performance, clearly outperforming the current state-of-the-art. Future work includes investigating other PD types, as well as other learning strategies, analyzing the effects of measurement noise, and conducting more elaborate measurements with practical PAs and waveforms.

REFERENCES [1] P.-I. Mak, S.-P U, and R. P. Martins, “Transceiver architecture selection: Review, state-of-the-art survey and case study,” IEEE Circuits Syst. Mag., vol. 7, pp. 6–25, 2007. [2] G. Fettweis, M. Löhning, D. Petrovic, M. Windisch, P. Zillmann, and W. Rave, “Dirty RF: A new paradigm,” Springer Int. J. Wireless Infor. Netw., vol. 14, no. 2, pp. 133–148, Jun. 2007. [3] Y. Zou, M. Valkama, and M. Renfors, “Performance analysis of spatial multiplexing MIMO-OFDM systems under frequency-selective I/Q imbalances,” in Proc. Int. Wireless Commun. Mobile Comput. Conf., Leipzig, Germany, Jun. 2009, pp. 1381–1386. [4] A. Katz, “Linearization: Reducing distortion in power amplifiers,” IEEE Microw. Mag., vol. 2, no. 4, pp. 37–49, Dec. 2001.

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[5] W.-J. Kim et al., “Digital predistortion linearizes wireless power amplifiers,” IEEE Microw. Mag., vol. 6, no. 3, pp. 54–61, Sep. 2005. [6] M. Valkama, “Advanced I/Q signal processing for wideband receivers: Models and algorithms,” Ph.D. dissertation, Dept. Eng., Tampere Univ. Technol., Tampere, Finland, 2001. [7] J. K. Cavers, “The effect of quadrature modulator and demodulator errors on adaptive digital predistorters for amplifier linearization,” IEEE Trans. Veh. Technol., vol. 46, no. 2, pp. 456–466, May 1997. [8] J. K. Cavers, “New methods for adaptation of quadrature modulators and demodulators in amplifier linearization circuits,” IEEE Trans. Veh. Technol., vol. 46, no. 3, pp. 707–716, Aug. 1997. [9] L. Ding, Z. Ma, D. R. Morgan, M. Zierdt, and G. T. Zhou, “Compensation of frequency-dependent gain/phase imbalance in predistortion linearization systems,” IEEE Trans. Circuits Syst., vol. 55, no. 1, pp. 390–397, Feb. 2008. [10] L. Anttila, M. Valkama, and M. Renfors, “Frequency-selective I/Q mismatch calibration of wideband direct-conversion transmitters,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 55, no. 4, pp. 359–363, May 2008. [11] X. Huang and M. Caron, “Efficient transmitter self-calibration and amplifier linearization techniques,” in Proc. IEEE Int. Circuits Syst. Symp., New Orleans, LA, May 2007, pp. 265–268. [12] Y.-D. Kim, E.-R. Jeong, and Y. H. Lee, “Adaptive compensation for power amplifier nonlinearity in the presence of quadrature modulation/ demodulation errors,” IEEE Trans. Signal Process., vol. 55, no. 9, pp. 4717–4721, Sep. 2007. [13] D. S. Hilborn, S. P. Stapleton, and J. K. Cavers, “An adaptive direct conversion transmitter,” IEEE Trans. Veh. Technol., vol. 43, no. 2, pp. 223–233, May 1994. [14] H. Cao, A. S. Tehrani, C. Fager, T. Eriksson, and H. Zirath, “I/Q imbalance compensation using a nonlinear modeling approach,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 3, pp. 513–518, Mar. 2009. [15] Requirements for further advancements for evolved universal terrestrial radio access (E-UTRA) (LTE-advanced), Tech. Rep. TS 36.913, V8.0.1, 3GPP Tech. Specification Group Radio Access Network, Mar. 2008. [16] L. Ding, G. T. Zhou, D. R. Morgan, Z. Ma, J. S. Kenney, J. Kim, and C. R. Giardina, “A robust predistorter constructed using memory polynomials,” IEEE Trans. Commun., vol. 52, no. 1, pp. 159–165, Jan. 2004. [17] M. Isaksson, D. Wisell, and D. Rönnow, “A comparative analysis of behavioral models for RF power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 1, pp. 348–359, Jan. 2006. [18] M. Isaksson and D. Rönnow, “A parameter-reduced Volterra model for dynamic RF power amplifier modeling based on orthonormal basis functions,” Int. J. RF Microw. Comput.-Aided Eng., vol. 17, pp. 542–551, 2007. [19] R. Raich and G. T. Zhou, “Orthogonal polynomials for complex Gaussian processes,” IEEE Trans Signal Process., vol. 52, no. 10, pp. 2788–2797, Oct. 2004. [20] G. H. Golub and C. F. Van Loan, Matrix Computations, 3rd ed. London, U.K.: The Johns Hopkins Univ. Press, 1996. [21] S. Haykin, Adaptive Filter Theory, 4th ed. Upper Saddle River, NJ: Prentice-Hall, 2002. [22] M. Schetzen, “Theory of pth-order inverses of nonlinear systems,” IEEE Trans. Circuits Syst., vol. CAS-23, no. 5, pp. 285–291, May 1976. [23] C. Eun and E. J. Powers, “A new Volterra predistorter based on the indirect learning architecture,” IEEE Trans. Signal Process., vol. 45, no. 1, pp. 223–227, Jan. 1997. [24] D. R. Morgan et al., “A generalized memory polynomial model for digital predistortion of RF power amplifiers,” IEEE Trans. Signal Process., vol. 54, no. 10, pp. 3852–3860, Oct. 2006. [25] D. Zhou and V. E. DeBrunner, “Novel adaptive nonlinear predistorters based on the direct learning algorithm,” IEEE Trans. Signal Process., vol. 55, no. 1, pp. 120–133, Jan. 2007.

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[26] E. Abd-Elrady, L. Gan, and G. Kubin, “Distortion compensation of nonlinear systems based on indirect learning architecture,” in Proc. 3rd Int. Commun., Control, Signal Process. Symp., St. Julians, Malta, Mar. 2008, pp. 184–187. [27] R. D. DeGroat and E. M. Dowling, “The data least squares problem and channel equalization,” IEEE Trans. Signal Process., vol. 41, no. 1, pp. 407–411, Jan. 1993. [28] S. M. Schennach, “Estimation of nonlinear models with measurement error,” Econometrica, vol. 72, no. 1, pp. 33–75, Jan. 2004. [29] K. B. Petersen and M. S. Pedersen, The Matrix Cookbook 2008. [Online]. Available: http://matrixcookbook.com, version: Nov. 14, 2008. [30] L. Ding, Digital Predistortion of Power Amplifiers for Wireless Applications. Atlanta, GA: Georgia Inst. Technol., 2004. [31] Evolved universal terrestrial radio access (E-UTRA) and evolved universal terrestrial radio access (E-UTRAN); overall description; stage 2, Tech. Rep. TS 36.300, V1.0.0, 3GPP Tech. Specification Group Radio Access Network, Mar. 2007. Lauri Anttila (S’05–M’10) was born in Kankaanpää, Finland, on January 2, 1976. He received the M.Sc. degree in electrical engineering (EE) from the Tampere University of Technology (TUT), Tampere, Finland, in 2004, and is currently working toward the Ph.D. degree at TUT. He is currently a Researcher and postgraduate student with the Department of Communications Engineering, TUT. His main research interests are signal processing algorithms for flexible radio transceivers with a focus on RF impairment mitigation.

Peter Händel (S’88–M’94–SM’98) received the Ph.D. degree from Uppsala University, Uppsala, Sweden, in 1993. From 1987 to 1993, he was with Uppsala University. From 1993 to 1997, he was with Ericsson AB, Kista, Sweden. From 1996 to 1997, he was also with the Tampere University of Technology, Tampere, Finland. Since 1997, he has been with the Royal Institute of Technology, Stockholm, Sweden, where he is currently a Professor of signal processing. From 2000 to 2006, he worked part time with the Swedish Defence Research Agency. He is currently a Guest Professor with the University of Gävle, Gävle, Sweden. Dr. Händel has served as an associate editor for the IEEE TRANSACTIONS ON SIGNAL PROCESSING.

Mikko Valkama (S’00–M’02) was born in Pirkkala, Finland, on November 27, 1975. He received the M.Sc. and Ph.D. degrees (both with honors) in electrical engineering (EE) from the Tampere University of Technology (TUT), Tampere, Finland, in 2000 and 2001, respectively. In 2003, he was a Visiting Researcher with the Communications Systems and Signal Processing Institute, San Diego State University (SDSU), San Diego, CA. He is currently a Full Professor with the Department of Communications Engineering, TUT. Dr. Valkama was the recipient of the 2002 Best Ph.D. Thesis Award presented by the Finnish Academy of Science and Letters for his thesis entitled “Advanced I/Q signal processing for wideband receivers: Models and algorithms.”

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Comprehensive Noise Characterization and Modeling for 65-nm MOSFETs for Millimeter-Wave Applications Sheng-Chun Wang, Pin Su, Member, IEEE, Kun-Ming Chen, Kuo-Hsiang Liao, Bo-Yuan Chen, Sheng-Yi Huang, Cheng-Chou Hung, and Guo-Wei Huang, Member, IEEE

Abstract—Using an external tuner-based method, this paper demonstrates a complete millimeter-wave noise characterization and modeling up to 60 GHz for 65–nm MOSFETs for the first time. Due to channel length modulation, the channel noise continues to increase and remains the most important noise source in the millimeter-wave band. Our experimental results further show that, with the downscaling of channel length, the gate resistance has more serious impact on the high-frequency noise parameters than the substrate resistance even in the millimeter-wave frequency. Index Terms—Millimeter wave, MOSFET, noise, RF.

I. INTRODUCTION

W

ITH THE downscaling of channel length into deep-submicrometer regime, RF MOSFETs have become good choices for millimeter-wave applications [1]. Although RF noise characterization and modeling for deep-submicrometer MOSFETs have been widely studied, the operating frequencies were mostly limited to several gigaherz and may not be enough for millimeter-wave applications. Therefore, there is an urgent need to characterize and model the noise behaviors up to millimeter-wave frequencies. Although Waldhoff et al. [2] have shown noise parameters covering the millimeter-wave regime, their results were based on the F50 method [3] that may not be accurate enough due to its approximations for noise parameter extraction. In this paper, to more accurately obtain and model the millimeter-wave noise behaviors, the tuner-based method is used instead. With the help of tuner-based Auriga noise and scattering parameter measurement system [4], a complete

Manuscript received July 29, 2009; revised September 29, 2009. First published March 08, 2010; current version published April 14, 2010. This work was supported in part by the National Science Council of Taiwan. S.-C. Wang is with the Department of Electronics Engineering, National Chiao Tung University, Hsinchu 300, Taiwan, and also with National Nano Device Laboratories, Hsinchu 300, Taiwan (e-mail: [email protected]). P. Su is with the Department of Electronics Engineering, National Chiao Tung University, Hsinchu 300, Taiwan (e-mail: [email protected]). K.-M. Chen, K.-H. Liao, B.-Y. Chen, and G.-W. Huang are with the National Nano Device Laboratories, Hsinchu 300, Taiwan (e-mail: [email protected]; [email protected]; [email protected]; [email protected]). S.-Y. Huang and C.-C. Hung are with the United Microelectronics Corporation, Hsinchu 300, Taiwan (e-mail: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2041582

millimeter-wave noise characterization and modeling for MOSFETs fabricated in 65-nm technology can be achieved. Note that contrary to the in-situ tuner based technique [5], [6], the Auriga measurement system uses an external tuner to avoid the pre-design, characterization, and deembedding of the on-die tuner, and maintains reasonable measurement results. This paper is organized as follows. Section II describes the device geometries and de-embedding method used in this work. The noise equivalent circuit is also addressed. Section III shows the intrinsic noise sources and their gate length dependence. The modeling results and the impact of gate and substrate resistances on the noise parameters are discussed in Section IV. Finally, we will make conclusions in Section V. II. DEVICES AND EXPERIMENTS The devices used in this paper were fabricated by UMC 65-nm technology process and laid out in multifingers and multigroups structure with two sided gate access. The number of fingers and groups are eight and four, respectively, and finger length is 4 m, which might not be optimized for millimeter-wave applications. The scattering and noise , equivalent noise parameters (minimum noise figure , magnitude of optimum source reflection coeffiresistance , and phase of optimum source reflection coefficient cient ) from 18 to 60 GHz were measured using Auriga noise and scattering parameter measurement system, and the dummy OPEN and SHORT de-embedding technique was used to eliminate the parasitic contributions from the probing pads and metal interconnections [7]. The Auriga system was carefully calibrated and the accuracy of measurement results were confirmed by the widely used 18-GHz ATN noise and scattering parameter measurement system, as shown in Fig. 1. The good agreement between the extracted channel noise and its theoretical value for a cold device shown in Fig. 1(c) also validates measurement reliability. The equivalent circuit shown in Fig. 2 was used to characterize devices’ noise behaviors, and its small-signal model elements were carefully extracted using the approach presented in and phase delay are [8]. In this figure, the input resistance essential in describing the intrinsic small-signal behaviors when , and the operating frequencies approach cutoff frequency along with substrate resistance junction capacitance are used to model the RF substrate loss. In addition, the series inductances ( , , and ) are pronounced for the high-frequency operation. Therefore, these elements must be considered

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TABLE I EXTRACTED INTRINSIC SMALL-SIGNAL PARAMETERS THAT CAN BENEFIT THE CHARACTERIZATION OF THE NOISE PARAMETERS

Fig. 1. Broadband (1–60 GHz) noise parameters. (a) NF and R versus frequency plot. (b) 0 in a Smith chart. The data below 18 GHz were measured by an ATN system, while above were measured by an Auriga system. (c) Good agreement between extracted channel noise and its theoretical value for a cold device.

Fig. 3. Extracted: (a) S , (b) S , and (c) S lines show the frequency dependence. Fig. 2. RF noise equivalent circuit for bulk MOSFETs.

when it comes to millimeter-wave characterization and modeling. Table I shows the intrinsic small-signal parameters that

versus frequency. The solid

can benefit the characterization of the noise parameters. Besides, since the gate current is about or smaller than 1 nA, its 100 M and shot noise associated incremental resistance 10 A Hz are neglected in this model.

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Fig. 5. Noise factor

H

versus gate length.

U

Fig. 4. Short-circuited current (j j) gain, unilateral power gain ( ), and ) versus frequency. associated gain (

G

III. CHANNEL NOISE SOURCE CHARACTERIZATION AND MODELING Fig. 3 shows the extracted power spectral density (PSD) for channel noise , induced gate noise , and imaginary part of , , and , cross correlation component (denoted as respectively). To obtain these intrinsic PSDs, the noise contributions from the parasitic series and substrate components were is shown eliminated following the approach presented in [9]. and to be proporto be frequency independent, and and , respectively. These relations agree with the tional to van der Ziel model [10]. Besides, our extracted results coincide with the previous findings that with the channel length scaling, are expected to increase, while and are expected to decrease [9], [11] due to the smaller oxide capacitance coupling [12]. Note that due to the smaller power gain, and hence, the larger inaccuracy in noise measurement, the upper measurem ment frequency is limited to 40 GHz for the , unilateral power device. The short-circuit current gain gain , and associated gain versus frequency are also shown in Fig. 4 for the reader’s reference. can be expressed as [10], [12] Traditionally,

(1) J/K is the Boltzmann constant, where is the ambient temperature in kelvin, is the channel conductance at zero drain–source voltage, and is the noise factor. The extracted noise factor versus channel length is depicted in Fig. 5, which shows that continues to increase with decreasing channel length. Asgaran et al. [13] have developed an analytical expression based on the classical thermal noise theory with taking for the channel length modulation into account

(2) is the drain saturation voltage at which the carwhere riers start to travel with their saturation velocity, is the gate

Fig. 6. Extracted channel noises (symbols) and their theoretical values (lines) calculated using (2) versus drain current.

Fig. 7. Saturation voltage versus channel length.

overdrive voltage, and is the bulk charge coefficient. The approximation is especially valid for shorter devices with smaller . The extracted and modeled versus drain current for different channel sizes are shown in Fig. 6. In our experiunder a given gate bias were ments, the values for extracted by linear extrapolation in the output resistance versus extraction results are also drain bias plot [14], and the shown in Fig. 7. , According to this model [13], devices with smaller which means more channel length modulation in the channel, would exhibit larger channel noise. As shown in Fig. 7, since continuously decreases with downscaling channel would continue to increase, as length, one can expect that shown in Fig. 6. Since (2) was a purely thermal noise based

WANG et al.: COMPREHENSIVE NOISE CHARACTERIZATION AND MODELING FOR 65-nm MOSFETs

Fig. 8. Modeled: (a) NF , (b) R , (c) G eters are also shown in this figure.

, and (d) B

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versus frequency. The impact of S , gate resistance, and substrate resistance on these noise param-

model, the good channel noise modeling results also imply that the shot noise is not significant at 65-nm technology node, which agrees with the results shown in [15]. This also explains with the downscaling of the the increase of noise factor channel length. IV. NOISE PARAMETER CHARACTERIZATION AND MODELING Based on the equivalent circuit shown in Fig. 2, and the channel noises extracted in Section III, the noise parameters were simulated using Agilent Technologies’ Advanced Design System (ADS). Note that the noise sources associated with , and ) and substrate resistance series resistances ( , are considered as thermal noise, and their PSDs can be , where is the resistance value. In addiexpressed as tion, for simplification, we have neglected and , as in [16]. To validate the assumption for millimeter-wave modeling, are both the modeling results with and without considering shown in Fig. 8 for comparison. This figure shows that without , the errors are still within acceptable range, considering and m devices, and this especially for supports the approximation we used in the millimeter-wave m device is not modeling. Besides, since the suitable for millimeter-wave application due to its low cutoff and maximum oscillation frequency , as frequency and for this implied in Fig. 4, the larger errors in device may not be a concern for millimeter-wave applications.

A. Intrinsic Noise Parameters and Neglecting be expressed as follows:

, the intrinsic noise parameters can

(3)

(4)

(5)

(6) denotes the intrinsic part and K where subscript is the reference temperature. A good figure of merit (FOM) to judge the intrinsic noise . According to (3), performance is lower can lead to smaller , which can benefit the and input matching for circuit design. Fig. 9 depicts

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Fig. 9.

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 58, NO. 4, APRIL 2010

S

and R

Fig. 10. Extracted gate resistance (R ) versus channel length.

versus g .

versus for different channel lengths. It shows that with length scaling down, the increase of the channel noise tends to over, and in turn, degrades . whelm the increase of B. Impact of Gate Resistance on Noise Parameters It has been shown that the gate resistance has a significant impact on the noise parameters and cannot be ignored in deepsubmicrometer noise modeling [16], [17]. In fact, as the gate resistance exists, the total expressions for noise parameters have the following relations to the intrinsic ones: (7) (8)

(9) (10) These equations suggest that the gate resistance would highly increase equivalent thermal resistance and minimum noise figure. In addition, since the gate resistance is significant in shorter devices, as shown in Fig. 10, its impact on their noise parameters is expected to be more serious. This is also confirmed in Fig. 8, where a larger error can occur in the shorter device without considering the gate resistance. is comparable or even larger Note that for cases where than , as in [16], more accurate equations can be obtained by with in (7)–(10). Besides, the value of replacing can be changed as the used gate materials, number of gate fingers, and gate layout dependency. Therefore, the effect of on the noise parameters can be varied at different cases. C. Impact of Substrate Resistance on Noise Parameters Reference [18] has considered the effect of substrate resistance on high-frequency noise modeling. The modeling results without considering the substrate resistance are also shown , the in Fig. 8. This figure shows, however, as compared to has a much smaller influence on noise substrate resistance parameters. To explain this, one can find that at very high frequency, the drain-side noise current’s PSD can be approximated

Fig. 11.

R

and S

=S

versus gate length.

by , where is the noise current PSD for the substrate resistance. As shown in Fig. 11, based on the is about 1/10 of at the very high extracted values of , frequency and can be ignored. That is, in millimeter-wave frequencies, the overall noise performance would be mainly domand . inated by V. CONCLUSIONS We have demonstrated the millimeter-wave noise characterization and modeling for 65-nm MOSFETs based on the tuner method for the first time. Our experimental results show that with the continuous down scaling of channel length, the channel would remain the dominant noise source in the innoise trinsic part of the device, and can be predicted by the traditional also degrades thermal noise theory. The sharply increased . Finally, the millimeter-wave noise modeling is achieved. and With the help of circuit simulation, the impact of on the noise parameters has been examined. Compared to , is shown to have a more serious influence on the noise parameters, and needs to be included in the millimeter-wave noise modeling. ACKNOWLEDGMENT The authors would like to thank the United Microelectronics Corporation (UMC), Hsinchu, Taiwan, for providing the devices used in this study. The authors would also like to thank Dr. D. Wandrei, Auriga Microwave, Lowell, MA, for his technical support.

WANG et al.: COMPREHENSIVE NOISE CHARACTERIZATION AND MODELING FOR 65-nm MOSFETs

REFERENCES [1] C. H. Doan, S. Emami, A. Niknejad, and R. W. Broderson, “Millimeterwave CMOS design,” IEEE J. Solid-State Circuits, vol. 40, no. 1, pp. 144–155, Jan. 2005. [2] N. Waldhoff, C. Andrei, D. Gloria, F. Danneville, and G. Dambrine, “Small signal and noise equivalent circuit for CMOS 65 nm up to 110 GHz,” in Proc. 38th Eur. Microw. Conf., Oct. 2008, pp. 321–324. [3] G. Dambrine, H. Happy, F. Danneville, and A. Cappy, “A new method for on-wafer noise measurement,” IEEE Trans. Microw. Theory Tech., vol. 41, no. 3, pp. 375–381, Mar. 1993. [4] Semiconductor Device Thermal Noise Characterization Challenges. Lowell, MA: Auriga Meas. Syst., 2007. [5] Y. Tagro, D. Gloria, S. Boret, and G. Dambrine, “MMW lab in-situ to extract noise parameters of 65 nm CMOS aiming 70–90 GHz applications,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2009, pp. 397–400. [6] K. H. K. Yau, M. Khanpour, M.-T Yang, P. Schvan, and S. P. Voinigescu, “On-die source-pull for the characterization of the -band noise performance of 65 nm general purpose (GP) and low power (LP) n-MOSFETs,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2009, pp. 773–776. [7] G. Knoblinger, “RF-noise of deep-submicron MOSFETs: Extraction and modeling,” in Proc. Eur. Solid-State Device Res. Conf., 2001, pp. 331–334. [8] S. C. Wang, G. W. Huang, K. M. Chen, A. S. Peng, H. C. Tseng, and T. L. Hsu, “A practical method to extract extrinsic parameters for the silicon MOSFET small signal model,” in Proc. NSTI Nanotechnol. Conf., Boston, MA, 2004, pp. 151–154. [9] C. H. Chen, M. J. Deen, Y. Cheng, and M. Matloubian, “Extraction of the induced gate noise, channel noise and their correlation in sub-micron MOSFET’s from RF noise measurements,” IEEE Trans. Electron Devices, vol. 48, no. 12, pp. 2884–2892, Dec. 2001. [10] A. van der Ziel, Noise in Solid State Devices and Circuits. New York: Wiley, 1986. [11] A. J. Scholten, L. F. Tiemeijer, R. Langevelde, R. J. Havens, A. T. A. Z. van Duijnhoven, and V. C. Venezia, “Noise modeling for RF CMOS circuit simulations,” IEEE Trans. Electron. Devices, vol. 50, no. 3, pp. 618–632, Mar. 2003. [12] A. F. Tong, W. M. Lim, K. S. Yeo, C. B. Sia, and W. C. Zhou, “A scalable RF CMOS noise model,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 5, pp. 1009–1019, May 2009. [13] S. Asgaran, M. J. Deen, and C.-H. Chen, “Analytical modeling of MOSFET’s channel noise and noise parameters,” IEEE Trans. Electron Devices, vol. 51, no. 12, pp. 2109–2114, Dec. 2004. [14] J. J.-Y. Kuo, W. P.-N. Chen, and P. Su, “Investigation of analogue performance for process-induced-strained PMOSFETs,” Semicond. Sci. Technol., vol. 22, pp. 404–407, 2007. [15] J. Jeon, J. Lee, J. Kim, C. H. Park, H. Lee, H. Oh, H.-K. Kang, B.-G. Park, and H. Shin, “The first observation of shot noise characteristics in 10-nm scale MOSFETs,” in VLSI Technol. Symp., 2009, pp. 48–49. [16] J. Jeon, I. Song, I. M. Kang, Y. Yun, B.-G. Paark, J. D. Lee, and H. Shin, “A new noise parameter model of short-channel MOSFETs,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2007, pp. 639–642. [17] M. J. Deen, C. H. Chen, S. Asgaran, G. A. Rezvani, J. Tao, and Y. Kiyota, “High-frequency noise of modern MOSFETs: Compact modeling and measurement issues,” IEEE Trans. Electron Devices, vol. 53, no. 9, pp. 2062–2081, Sep. 2006. [18] C. Enz, “An MOS transistor model for RFIC design valid in all regions of operation,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 1, pp. 342–359, Jan. 2002.

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Pin Su (S’98–M’02) received the B.S. and M.S. degrees in electronics engineering from National Chiao Tung University, Hsinchu, Taiwan, and the Ph.D. degree in electrical engineering and computer sciences from the University of California at Berkeley. From 1997 to 2003, he conducted his doctoral and postdoctoral research in silicon-on-insulator (SOI) devices at the University of California at Berkeley. He was also one of the major contributors to the unified BSIMSOI model, the first industrial standard SOI MOSFET model for circuit design. Since August 2003, he has been with the Department of Electronics Engineering, National Chiao Tung University, where he is currently an Associate Professor. His research interests include silicon-based nanoelectronics, modeling and design for advanced CMOS devices, and device/circuit interactions in nano-CMOS. He has authored or coauthored over 90 research papers in refereed journals and international conference proceedings.

W

Sheng-Chun Wang received the B.S. and M.S. degrees in electrical engineering from National Cheng Kung University, Tainan, Taiwan, in 1999 and 2001, respectively, and is currently working toward the Ph.D. degree at Chiao Tung University, Hsinchu, Taiwan. In 2001, he joined the National Nano Device Laboratories, Hsinchu, Taiwan, as an Assistant Researcher. His current research interests focus on small-signal and noise characterization and modeling for RF CMOS devices.

Kun-Ming Chen received the M.S. degree and Ph.D. degree in electronics engineering from National Chiao Tung University, Hsinchu, Taiwan, in 1996 and 2000, respectively. In 2000, he joined the National Nano Device Laboratories, Hsinchu, Taiwan, as an Associate Researcher, and in 2007 became a Researcher. He has been engaged in research on the microwave device process and characterization.

Kuo-Hsiang Liao received the M.S. degree in electronic engineering from the National Changhua University of Education, Taiwan, Taiwan, in 2005. In 2005, he joined the National Nano Device Laboratories, Hsinchu, Taiwan, as an Assistant Researcher. He has been engaged in research on RF device characterization and modeling.

Bo-Yuan Chen was born in Miaoli, Taiwan, in 1980. He received the M.S. degree in materials science and engineering from National Dong Hwa University, Hualien, Taiwan, in 2006. In 2006, he joined National Nano Device Laboratories, Hsinchu, Taiwan, as an Assistant Researcher. He has been engaged in research on III–V compound semiconductors and RF device characterization.

Sheng-Yi Huang received the B.S. degree in electrical engineering from National Cheng Kung University, Tainan, Taiwan, in 2001, and the M.S. and Ph.D. degrees in electronics engineering from National Chiao Tung University Hsinchu, Taiwan, in 2003 and 2007, respectively. Since 2003, he has been with the Advanced Technology Development Division, United Microelectronics Corporation (UMC), Hsinchu, Taiwan, where he is involved with RF-related technologies. His current research focuses on advanced mixed-mode and RF CMOS design including device modeling, noise characterization, power behavior, and reliability studies.

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Cheng-Choug Hung received the B.S. and M.S.E.E. degrees in electrical engineering from National Cheng Kung University, Tainan, Taiwan, in 1996 and 1999, respectively. He is currently with the Advanced Technology Department, United Microelectronics Corporation (UMC), Hsinchu, Taiwan, as an RF Device Development Manager. His current responsibility and research focuses on RF CMOS technology characterization/delivery including active and passive devices.

Guo-Wei Huang (S’94–M’97) was born in Taipei, Taiwan, in 1969. He received the B.S. degree and Ph.D. degree in electronics engineering from National Chiao Tung University, Hsinchu, Taiwan, in 1991 and 1997, respectively. In 1997, he joined National Nano Device Laboratories (NDL), Hsinchu, Taiwan, where he is currently a Researcher and Manager of the High-Frequency Technology Division. Since August 2008, he has been an Adjunct Associate Professor with the Department of Electronics Engineering, National Chiao Tung University. His current research interests focus on characterization and modeling techniques of high-frequency devices, and characterization and verification of RF integrated circuits (RFICs)/monolithic microwave integrated circuits (MMICs).

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A CMOS Integrated Analog Pulse Compressor for MIMO Radar Applications Sang Min Lee, Student Member, IEEE, Taejoong Song, Student Member, IEEE, Jongmin Park, Student Member, IEEE, Changhyuk Cho, Member, IEEE, Sangjun An, Kyutae Lim, Member, IEEE, and Joy Laskar, Fellow, IEEE

Abstract—Conventional radar pulse compressors use either surface acoustic wave devices or fast convolution processing, but both solutions have significant drawbacks. To overcome these drawbacks, an integrated analog pulse compressor for a multiple-input multiple-output (MIMO) radar has been developed with an 0.18- m CMOS process using an arbitrary waveform generator, analog correlators, and analog-to-digital converters. The proposed scheme not only has advantages over conventional methods but also adds additional flexibility to the MIMO system. The die area is 5.67 mm2 , and the power consumption is 62.6 mW from the 1.8-V supply. Arbitrary waveforms such as the wavelet and the chirp signal have been demonstrated, and the average signal-to-noise ratio for the pulse compression is 18.09 dB. The identification of overlapping multiple chirp signals is successfully demonstrated. Index Terms—Arbitrary waveform generator (AWG), matched filter (MF), multiple-input multiple-output (MIMO) radar, pulse compressor.

I. INTRODUCTION

M

ULTIPLE-INPUT multiple-output (MIMO) radars, which utilize multiple transmitters to send independent waveforms, have been actively investigated as a next-generation radar technology [1], [2]. However, a MIMO radar demands excessive signal processing power, which is a major hurdle that must be overcome. One of the key building blocks of a MIMO radar is a pulse compressor, since a pulse compressor enables a radar to overcome fundamental tradeoffs. Radar range resolution, pulse width, and average transmitted power have a tradeoff since the range resolution is and the average transmitted power is , in which is the radar pulsewidth, is the speed of light, is the is the pulse repetition frepeak transmitted power, and quency. Therefore, for better (or smaller) range resolution, the pulsewidth should be minimized, and the peak power of the radar has to be increased to maintain the same average power. A pulse compressor, which allows high average transmitted

Manuscript received March 11, 2009; revised November 16, 2009. First published March 11, 2010; current version published April 14, 2010. S. M. Lee, T. Song, S. An, K. Lim, and J. Laskar are with the Georgia Electronic Design Center, Electrical and Computer Engineering Department, Georgia Institute of Technology, Atlanta, GA 30308 USA (e-mail: [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]). J. Park is with Qualcomm, San Diego, CA USA. C. Cho is with the Samsung Design Center, Atlanta, GA 30308 USA (e-mail: [email protected]). Digital Object Identifier 10.1109/TMTT.2010.2042641

power of a long pulse while maintaining high resolution of short pulses, is commonly implemented by a matched filter (MF), but requires significant signal processing power. A digital signal processor (DSP)-based pulse compressor [3] or a digital finite-impulse-response (FIR) filter implementation of an MF [4] consumes too much of power for itself or for the front-end analog-to-digital converter (ADC), and other approaches such as the surface acoustic wave (SAW)-device-based approach [5] do not have waveform flexibilities. To overcome the problems discussed above, an analog pulse compressor (APC) based on an analog MF has been suggested as a key block for the waveform diversity MIMO radar because it can utilize complicated waveforms such as wavelets over traditional chirp signals [6], [7]. Unlike conventional approaches, a fully integrated analog MF is implemented in a mixed-signal domain. Since this new implementation requires neither fast Fourier transform (FFT) nor inverse fast FFT (IFFT), speed and power requirements for the ADC and the DSP can be relaxed. When tuned for a similar probability of detection performance, the 4 4 MIMO radar system based on the proposed approach consumes about six times less power than the 4 4 DSP-based MIMO radar system and about four times less power than the DSP-based single-input single-output (SISO) radar system [7]. A random-access memory (RAM)-based arbitrary waveform generator (AWG) in the analog MF enables the dynamic change of waveforms, which depends on the environment [8]. By simply changing addressing and clocking schemes, the AWG can also change the waveform duration during operation, which enables multiresolution, flexible waveform signal processing. This approach combines both the flexibility of the digital system and the simplicity of the analog system. We have already demonstrated this approach by a multiresolution spectrum sensing (MRSS) chip [9], [10]. Since the fabrication process is also fully CMOS-compatible, silicon-on-chip (SOC) integration is possible, unlike the SAW-based MF. Even though various studies have suggested alternatives over a conventional MF (e.g., using capacitors as memory elements [11], [12], using a charge-transferring mechanism [13], an approach based on a floating-gate MOS [14], using a bank of digitally controlled transconductors along with capacitors [15], curconverter-based recycling inrent-mode operation [16], or a tegrator [17]), all of these approaches suffer from mismatches or difficulties with long pulses. A similar approach to this work has been implemented for an ultra-wideband (UWB) application [18], but the signal is restricted to a simple pulse. Since an MF is a quite general and powerful building block in the wide range of modern signal processing, the analog MF for pulse compression

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could be extended to various radar signal processing functions. Furthermore, the proposed APC could be a viable approach for elements) phased array [19]. a very large-scale (

then

II. BACKGROUND A filter whose impulse response is , in which is assumed to be confined to the time interval the signal , is called a matched filter to the signal and [20], [21]. The response of the MF attains a peak at to the arbitrary input signal at is

It is known that if signal is corrupted by an additive white Gaussian noise (AWGN) process with power spectral density W/Hz , the matched filter maximizes the output signal-to-noise ratio (SNR), and the maximum output SNR is given as

which is the maximum. Therefore, by finding the maximum of with respect to , can be estimated from (2) with the resolution of . In turn, the target distance can be estimated as from . Furthermore, is

where is the energy of the signal. Therefore, ] can ina long pulse compression time [large with long crease the SNR, but it may limit the bandwidth of radar tracking in radar applications, especially with dynamic targets. as a time-shifted replica of by , Let us consider , and as a sampled and delayed i.e., by sampling frequency and the delay of sequence of integer . In other words (3)

where

is defined as

If a function

is defined as (1)

and if an integer

can be found such that

(2)

where and denote an in-phase and quadrature-phase component, respectively. Since the analog MF in this work is for is already known. Therefore, radar applications, signal can be constructed by shifting sampled by an appropriate amount, and (3) can be calculated by the following procedure. . Step 1) Multiply an input signal with . Step 2) Integrate over time Step 3) Sample the integrator outputs at time . Step 4) Add sampled integrator outputs of the path and the path. of the transmitted Note that the known sampled sequence signal is used, but the input signal is not sampled, which precludes the necessity of a high-speed ADC. Moreover, the reference signal shifts instead of the input signal, and the reference code-shifting digital MF [4] uses a similar scheme.

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Fig. 1. MIMO radar architecture and APC block diagram. Fig. 2. System timing diagram.

III. ARCHITECTURE A. Block Diagram Fig. 1 shows a block diagram of an APC as a building block , and an for a MIMO radar. An input signal corresponds to of (1). The baseband and AWG signal corresponds to signals are received, and the correlation is performed by multiplying these signals with the signals generated from the AWG and then integrated. In order to make the waveforms for the separate and paths, the AWG is composed of 22-bit RAM, four 11-bit digital-to-analog converters (DACs), and two low-pass filters (LPFs). The RAM is configured as four banks of 256 22 bit so that the maximum signal length is 1024. It stores a digitized signal to be converted to an analog signal through the AWG. The 22-bit data of the RAM are read by two latch blocks for each and separately, which enable complementary and synchronized outputs for the DACs. The LPF eliminates the digital clock spurs, and the LPF is implemented as a sixth-order Chebyshev type-II configuration. The bandwidth is tunable from 1.67 to 5.18 MHz. Then, the outputs of the analog correlator are sampled by two 9-bit pipeline ADCs and sent to a field-programmable gate array (FPGA) for further signal processing. These functionalities can be configured through the on-chip serial bus interface, and the FPGA is integrated on a test board to emulate a DSP block. Differential signaling has been used throughout the circuit to reduce even-order harmonics and to increase a power supply rejection ratio (PSRR) and immunity from noise. The following is a summary of each block, the details of which will be explained in Section IV. • AWG: — maximum clock frequency: 38.4 MHz; — RAM: maximum data length of 1024 points with two 11-bit data for separate and signals; — DAC: 11-bit R/2R configuration;

•

•

•

•

— LPF: sixth-order Chebyshev type-II with tunable bandwidth; — waveform duration: 1, 2; — adjustable delay. Analog correlator: input signal; — analog multiplier: up to 500 mV — integrator: R/C controllable and resettable; — dc offset cancellation: 6-bit current DAC; ADC: — two 9-bit pipeline ADCs for separate and paths; — maximum sampling frequency: 30 MHz; — maximum input signal range: 2.8 V - . Clock control: — input clock frequency: 38.4 MHz; — clock divider (separate for AWG and ADC): 1, 2, 4, 8; Serial bus interface: — control registers: 18 8 bit.

B. Timing Control In Section II, the signal was assumed to be confined in the . If the entire time period of is time interval is pulse repetition scanned by increments of by 1, where frequency, then the total time to find will be iteration

(4)

has to span from 0 to . In this situation, it since could take considerable time to scan an entire time period. is scanned by In the proposed APC, the time period of repeating AWG signals, and the ADCs sample the signals synchronously with the AWG. Fig. 2 shows the system timing diagram, which illustrates this concept, assuming the chirp signals as the input and reference signals. The input return signals

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from the targets are assumed to be present at and , respectively. For clarity, only the -path signals are signals are shown even though both the and considered for the correlator output shown. The trigger input is synchronized with the transmission of the signal. When the trigger comes in, the AWG starts with certain delay parameter , which can be controlled over the serial interface. Since the AWG is RAM-based, as will be shown later, an AWG output synchronized with the trigger starting at arbitrary with a range can be generated. Then, this delayed AWG signal of is repeated until the next trigger comes in. The integrator output is sampled by the ADC at the end of period , and then the integrator is reset for the next integration cycle. . Since the signal reThe first case in Fig. 2 is when turn from the first target corresponds to the second sampling instance of the ADC, the second sample from the ADC will return the largest correlation value. However, the fourth sample, whose value is exaggerated about fourfold to highlight the difference with zero values in the figure, will be much smaller since the correlation value is small due to the time lag, and all other sam. ples will be zero. The second case in Fig. 2 is when In this case, the second sample from the ADC will yield a small correlation value unlike the first case due to the time lag, while the fourth sample will yield the highest correlation value, and all other samples will be zero. for Therefore, in the proposed APC, the total time to find multiple targets with the increment of by 1 is

Fig. 3. RAM and address generator of AWG.

Fig. 4. AWG timing diagram.

iteration (5) is only inversely proportional to in the Unlike (4), above equation except for the case when duty cycle approaches , and (5) approaches (4). Also, it one such that shows that careful tradeoffs among pulse length , sampling time , and pulse repetition frequency are required. Notice that (5) is the worst-case estimation. With a simple algorithm first, and only searching the insuch as searching with terval in which the signal return is higher than the threshold with could be much lower. half of the previous , the average IV. BUILDING BLOCKS A. AWG Fig. 3 shows a block diagram of the RAM and address generator in the AWG. In order to make the waveform in a row from the AWG, the digital data stored in the RAM are continuously accessed by the addresses generated in the address generator block. Among the total 10-bit addresses, 2-bit low-order addresses (LOaddr) are generated by a 2-bit counter, and 6-bit high-order addresses (HOaddr) for -decoders are generated in the embedded serial latch to reduce the power consumption in the address buffer blocks. The other 2-bit -addresses are generated by a 2-bit counter. In this way, a total of 1024 addresses are accessible. The duration of the waveform can be controlled by a

Fig. 5. Measurement of chirp I and Q signals generation in multiresolution.

clock frequency and duration control bits . This waveform flexibility can be adapted to the digitally controlled, multiresolution radar pulse-compression technique. Fig. 4 shows the timing diagram of the AWG when external and LOaddr is , so the address is HOaddr is . When the AWG_EN signal is enabled to a high state, this external address is loaded into the internal address generator of the AWG, and the internal address is incremented at every clock. After one period of the waveform is generated, the AWG repeats the waveform automatically.

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Fig. 8. Analog correlator schematic.

Fig. 6. Measurement results for the Daubechies wavelets.

Fig. 9. Analog correlator time-domain measurement results.

Fig. 10. ADC block diagram.

the entire waveform period with respect to the external trigger . signal. The step resolution of the waveform delay is B. Analog Correlator Fig. 7. Measurement results of arbitrary starting chirp waveforms with delay of: (a) 0T , (b) 1=4T , (c) 1=2T , and (d) 3=4T .

Fig. 5 demonstrates the multiresolution feature of the AWG with a chirp signal for both the and channels. For example, time period of 4.8 MHz and the case 1024/4.8 MHz 223 s. Both and can be is changed through the serial bus interface by changing the clock divisor and AWG duration control bits, respectively. The oscilloscope time scale per division is fixed to 20 s for all cases. The radar pulse compression uses chirp signals extensively since they can be generated easily [22]. Therefore, a chirp signal is used as a standard signal in this work, but the AWG allows other waveforms such as wavelets. As an illustration, Fig. 6 presents the measurement results for a Daubechies eighth-order wavelet at 37.5 kHz ( 38.4 MHz, with signal frequency ). The use of the pulse compression for identifying the distance requires the starting point of the waveform to be controlled and adjusted digitally, as explained in Section III-B. Fig. 7 shows the measurement results of the arbitrary starting point characteristic of the AWG. It shows that the AWG can gen, and of erate chirp waveforms with delays of

Fig. 8 shows the architecture of the analog correlator, which consists of a multiplier and an integrator for correlating the input baseband signal and the signal generated from the AWG [9]. The 6-bit current DAC is included to mitigate the undesirable dc offset by injecting a small amount of bias current to the input of the integrator. At the end of every pulse, a reset signal from the AWG initializes the integrator for the subsequent correlation operation. The gain and the dominant pole position of the integrator can be adjusted through the on-chip serial bus interface. The correlation operation is shown in Fig. 9 with the measurement results when the chirp signal from the AWG is synchronized with the input signal. The high output results show that two signals are aligned. The following ADC captures the buffered correlation output for further signal processing in a digital domain. Then, the AWG resets the integrator for the subsequent correlation operation on every cycle. C. ADC Fig. 10 shows the block diagram of a low-power differential pipeline ADC. All signal paths are differential, and the maximum sampling frequency is chosen as 30 MHz with enough margins for future extensions. The first block is a sample-and-

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Fig. 11. Measured output FFT spectrum of the ADC.

Fig. 13. Test environments.

Fig. 12. Die micrograph.

hold (S/H) stage, and eight pipeline stages follow. All of the digital outputs are merged by a digital correction block generating the final 9-bit output. The final output is available at the outside of the chip through a multiplexer. Each neighboring pair of stages, including the S/H stage, share a common operational amplifier (op amp) for power reduction, so only a total of four op amps are required. Two-stage op amps with a single-stack output stage are used to increase an output dynamic range, and dynamic comparators with complementary inputs are used to increase an input dynamic range [23]. Fig. 11 shows the FFT results of the ADC measurement. No window is used, but the signal generator clock is synchronized to the ADC clock for coherent sampling. A test input frequency of 2.7340 MHz was chosen as it prevents spectral leakage [24]. The effective number of bits (ENOBs) was 7.02 bit from 16 384-point FFT at 19.2 MS/s with an input signal level of 2.8 V - . In the above operating conditions, power consumption was 16.2 mW. The [25], in which figure of merit (FOM), defined as is the power consumption and is the sampling frequency, is 6.50 pJ/conversion-step. V. SYSTEM EVALUATION The APC was fabricated in an 0.18- m CMOS technology process. A die micrograph is shown in Fig. 12. The die size is 3.13 mm 1.81 mm. All of the blocks and pads are positioned carefully to ensure signal integrity and to minimize the coupling effects on analog signals from digital noise. To verify the MF functionality, we injected separate input signals for and paths from an external arbitrary function generator while loading the AWG with the 2 11-bit chirp signal. The final digital data from the ADC at 1.2 MS/s were gathered by the FPGA and sent to a computer. Since integrator outputs do

Fig. 14. (a) Input signals I and Q in a time-domain waveform. (b) Simulated MF response. (c) Measured MF response (average of 10) of a chirp signal.

not require a high sampling frequency, the ADC sampling frequency was reduced from its maximum to save power. As discussed in Section II, the ADC sampling frequency can be lowered even further to 38.4 MHz/1024 37.5 kHz, but oversampling was performed to ensure that the integrator output timing was aligned relative to the reset signal. However, only one ADC output per each integration cycle right before the reset was used for the analysis. Therefore, in the future the power consumption of the ADC can be lowered even further with a lower sampling frequency. The ADC outputs were gathered for multiple samples, as the timing diagram shows in Fig. 2, during the time pe. These steps were repeated while the FPGA shifts riod of the starting point of the AWG ( from Section III-B). Fig. 13 shows the test setup environments. Fig. 14 compares the measured matched filter response of a chirp signal with that of a simulation. Fig. 14(a) shows the time-domain waveform of the chirp signal used for these

LEE et al.: CMOS INTEGRATED ANALOG PULSE COMPRESSOR FOR MIMO RADAR APPLICATIONS

measurements. A 3-dB bandwidth is about 1.3 MHz with 38.4 MHz, . Fig. 14(b) shows the simulated matched filter response of the above chirp signal, and Fig. 14(c) shows the experimentally obtained response by incrementing by one each time. For convenience, we subtracted an offset from , which shifted the axis to match the measured response to the ideal one, and the sampled data were normalized to the maximum sampled value. The system clock was not synchronized with the clock of an external arbitrary function generator. 35-dB It can be observed that a noise dominates below a level. The following formulas are used to estimate an SNR and a dynamic range (DR) for the whole system:

dB

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Fig. 15. Multiple trials with a chirp signal.

(6)

dB

(7) is determined by the range of bins occupied by the where signal. This approach is similar to spectral estimation from FFT in ADC characterization [26]. The simulation indicates that the , so was used with main lobe occupies . Fig. 15 shows the measurement results from ten trials. The maximum SNR calculated as shown in (6) was 8.88 dB, and the maximum DR calculated as shown in (7) was 12.53 dB. These values include all of the noise and dynamic ranges of the entire system, i.e., degradation from the AWG, the analog correlator, and the ADC. The mean values of the SNR and the DR values for trials are derived from the following formulas:

dB

Fig. 16. (a) Input signals I and Q in a time-domain waveform. (b) Simulated MF response. (c) Measured MF response (average of 10) of an NLFM signal.

Since the ideal SNR and DR for a chirp signal calculated by (6) and (7) are only 9.30 and 13.26 dB, respectively, a nonlinear frequency modulation (NLFM) signal was used to better estimate system performance. The proposed APC can easily accommodate a complicated waveform such as an NLFM due to the AWG. Fig. 16 compares the measured MF response of an NLFM with that of a simulation. Fig. 16(a) shows the time-domain waveform of an NLFM signal [27] with the phase modulation as

(8)

dB

(9) The average SNR calculated from (8) was 8.26 dB, and the average DR calculated from (9) was 12.08 dB.

with 1.86 MHz, and 744 kHz. The main lobe , so the ideal SNR and DR for the occupies NLFM signal calculated by (6) and (7) are 27.2 and 28.5 dB, respectively. Fig. 16(b) and (c) shows the simulated MF response and the experimentally obtained response with the same experimental conditions as a chirp signal. The difference between the ideal response and the measured response is more pronounced than a chirp signal case. DC offsets of the integrators may be mainly responsible for the high baseline. Fig. 17 shows the measurement results from ten trials. The maximum SNR and the maximum DR as calculated by (6) and (7) were 18.96 and 22.69 dB, respectively, and the average SNR and the

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TABLE I POWER AND PERFORMANCE SUMMARY

Fig. 17. Multiple trials with an NLFM signal.

Fig. 18. Measured output signal and noise characteristics with an input power sweep.

value. The input amplitudes were increased by 0.2 dB increment. The maximum SNR measured as a difference between the to the output noise at the input is 32.69 dB, output and the DR from the input point to the last point where 0 dB is 28.20 dB. Obviously, these values are much higher than the system-level SNR and DR measured by using a chirp or an NLFM signal. Fig. 19 compares a measured pulse compressor response with that of a simulation in which multiple returns from targets are assumed to be present. Five overlapping chirp signal returns with bandwidth of 1.3 MHz and of 26.7 s centered at 13.39, 20, 58.65, 93.33, and 109.32 s are added with relative amplitudes of 1/2, 1/2, 1/2, 1/2, and 1/4, and injected into the APC, which is triggered at the same time as the signal starts. Fig. 19(a) shows that the first two and last two chirp signals overlap. Fig. 19(b) shows the simulation results, and Fig. 19(c) shows the experimentally obtained results by incrementing by one each time. The sampled data were normalized to the maximum sampled value. The comparison between the simulated and measured compression results clearly shows five distinctive pulses at corresponding times. The small peak at 80.13 s may have come from the integrator dead time during the reset interval. VI. CONCLUSION

Fig. 19. (a) Input signals I and Q. (b) Simulated MF response. (c) Measured MF response (average of 10) of multiple chirp signals.

average DR as calculated by (8) and (9) were 18.09 and 20.54 dB, respectively. Both numbers are much higher than numbers from a simple chirp signal. For an SNR and a DR estimation of the correlator alone, a chirp signal of period followed by an empty interval of was applied to the input. The output signal was measured as an integration value at the chirp signal interval with the lag for the maximum correlation value while the output noise was measured as an integration value at the empty interval. Fig. 18 compares the measured signal and the noise according to the different input is normalized to 0 level. The input signal level of 5 mV dB, and the output is normalized to 0 dB at the maximum output

To relax the requirements of speed and power for the ADC and the DSP, this research proposed a fully integrated analog pulse compressor in a mixed-signal domain using an analog correlator and an AWG and validated it with results from various measurements using chirp signals and a wavelet. In addition, it explained the detailed block specifications and the structures of the AWG, the analog correlator, and the ADC, and then performed the system evaluation using the proposed SNR and DR equations. The results of the evaluation showed that the proposed APC consumes approximately 62.6 mW when it is fully functional with a 1.8-V supply voltage, and the average SNR measured are 8.26 and 18.09 dB when a 1024-point chirp signal and a 1024-point NLFM signal were used. The SNR and the DR of the correlator were measured separately, and the system timing was verified using multiple chirp signals. Table I summarizes the power consumption and the performance of the APC.

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ACKNOWLEDGMENT The authors would like to thank Dr. C.-H. Lee and the Samsung Design Center, Atlanta, GA, for the measurement equipment and support for the preparation of the experimental prototype.

REFERENCES [1] E. Fishler, A. Haimovich, R. Blum, D. Chizhik, L. Cimini, and R. Valenzuela, “MIMO radar: An idea whose time has come,” in Proc. IEEE Radar Conf., Apr. 2004, pp. 71–78. [2] E. Fishler, A. Haimovich, R. Blum, L. Cimini, D. Chizhik, and R. Valenzuela, “Performance of MIMO radar systems: Advantages of angular diversity,” in Proc. 38th IEEE Asilomar Signals, Syst. Comput. Conf., Nov. 2004, pp. 305–309. [3] Z. Xinggan and Z. Zhaoda, “A pulse compression processor implementation with DSP for airborne pulse Doppler radar,” in Proc. 13th AIAA/IEEE Digit. Avion. Syst. Conf. , 1994, pp. 421–425. [4] S. Goto, T. Yamada, N. Takayama, Y. Matsushita, Y. Harada, and H. Yasuura, “A low-power digital matched filter for spread-spectrum systems,” in Proc. ISLPED, 2002, pp. 301–306. [5] D. W. Bakken and P. C. Meyer, “Sidelobe reduction in reflective s.a.w. pulse compressors without external filtering,” Electron. Lett., vol. 10, no. 14, pp. 278–279, Jul. 1974. [6] S. M. Lee, T. Song, J. Park, K. Lim, and J. Laskar, “Analog pulse compressor for radar system,” in Proc. EuRAD, Oct. 2008, pp. 364–367. [7] M. Lee, S. An, S. M. Lee, S. Suh, K. Lim, and J. Laskar, “Circuit level analysis of analog signal processing based MIMO radar system,” in Proc. IEEE Radar Conf., Apr. 2009, pp. 1–4. [8] J. R. Guerci, “Next generation intelligent radar,” in Proc. IEEE Radar Conf., Apr. 2007, pp. 7–10. [9] J. Park, T. Song, J. Hur, S. M. Lee, J. Choi, K. Kim, J. Lee, K. Lim, C.-H. Lee, H. Kim, and J. Laskar, “A fully-integrated UHF receiver with multi-resolution spectrum-sensing (MRSS) functionality for IEEE 802.22 cognitive-radio applications,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Tech. Dig., 2008, pp. 526–633. [10] J. Park, T. Song, J. Hur, S. M. Lee, J. Choi, K. Kim, K. Lim, C.-H. Lee, H. Kim, and J. Laskar, “A fully integrated UHF-band CMOS receiver with multi-resolution spectrum sensing (MRSS) functionality for IEEE 802.22 cognitive radio applications,” IEEE J. Solid-State Circuits, vol. 44, no. 1, pp. 258–268, Jan. 2009. [11] S. Nakamura and Y. Nagazumi, “A matched filter design by chargedomain operations,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, no. 5, pp. 867–874, May 2005. [12] M. A. R. Eltokhy, H. A. K. Mansour, E. M. Zieur, and H. Zaher, “A study on circuit design of integrated CMOS analog matched filter,” in Proc. MIXDES, Gdynia, Poland, Jun. 2006, pp. 218–222. [13] T. Nakayama, T. Yamasaki, and T. Shibata, “A low-power switchedcurrent CDMA matched filter employing MOS-linear matching cell and output A/D converter,” in Proc. IEEE ISCAS, 2005, pp. 5365–5368. [14] T. Yamasaki and T. Shibata, “A low-power floating-gate-MOS-based CDMA matched filter featuring coupling capacitor disconnection,” IEEE J. Solid-State Circuits, vol. 42, no. 2, pp. 422–430, Feb. 2007. [15] M. R. Zahabi, V. Meghdadi, J. P. Cances, and A. Saemi, “Mixed analog and digital matched-filter design for high rate WLAN,” in Proc. Global Telecommun. Conf. (GLOBECOM), Nov. 2007, pp. 310–314. [16] V. Srinivasan, G. Rosen, and P. Hasler, “Low-power realization of FIR filters using current-mode analog design techniques,” in Proc. 38th IEEE Asilomar Signals, Syst. Comput. Conf., Nov. 2004, pp. 2223–2227. [17] K. Iizuka, M. Miyamoto, Y. Ohta, T. Suyama, K. Hara, S. Kawama, H. Matsui, S. Azuma, S. Taguchi, Y. Fujimoto, and D. Senderowicz, “CDMA functional blocks using recycling integrator correlators-matched filters and delay-locked loops,” IEEE J. Solid-State Circuits, vol. 36, no. 3, pp. 385–397, Mar. 2001. [18] J. Ryckaert, M. Badaroglu, V. De Heyn, G. Van der Plas, P. Nuzzo, A. Baschirotto, S. D’Amico, C. Desset, H. Suys, M. Libois, B. Van Poucke, P. Wambacq, and B. Gyselinckx, “A 16 mA UWB 3-to-5 GHz 20 Mpulses/s quadrature analog correlation receiver in 0.18 m CMOS,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Tech. Dig., 2006, pp. 368–377.

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[19] S. Jeon, Y.-J. Wang, H. Wang, F. Bohn, A. Natarajan, A. Babakhani, and A. Hajimiri, “A scalable 6-to-18 GHz concurrent dual-band quadbeam phased-array receiver in CMOS,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Tech. Dig., 2008, pp. 186–605. [20] J. G. Proakis, Digital Communications, 4th ed. New York: McGrawHill, 2001. [21] B. R. Mahafza and A. Z. Elsherbeni, MATLAB Simulations for Radar Systems Design. Boca Raton, FL: Chapman & Hall/CRC, 2004. [22] M. I. Skolnik, Radar Handbook, 2nd ed. New York: McGraw-Hill, 1990. [23] S. M. Lee, T. Song, C. Cho, K. Lim, and J. Laskar, “Enhanced input range dynamic comparator for pipeline analogue-to-digital converter (ADC),” Electron. Lett., vol. 45, no. 14, pp. 728–730, Jul. 2009. [24] IEEE Standard for Terminology and Test Methods for Analog-to-Digital Converters, IEEE Standard 1241-2000, 2001. [25] R. H. Walden, “Analog-to-digital converter survey and analysis,” IEEE J. Sel. Areas Commun., vol. 17, no. 4, pp. 539–550, Apr. 1999. [26] R. Schreier and G. C. Temes, Understanding Delta-Sigma Data Converters. Piscataway, NJ: IEEE Press, 2005. [27] M. A. Richards, Fundamentals of Radar Signal Processing. New York: McGraw-Hill, 2005.

Sang Min Lee (S’96) received the B.S. and M.S. degrees in electrical engineering from Seoul National University, Seoul, Korea, in 1997 and 1999, respectively, and is currently working toward the Ph.D. degree at the Georgia Institute of Technology, Atlanta. From 1997 to 1998, he was a Graduate Student Researcher with the Automatic Control Research Center, Seoul National University, where he was involved with a war game simulation program, and he was a Junior Electrical Engineer with the HOW Corporation, Seoul, Korea, in 1999. In 2000, he joined Science and Engineering Services Inc., Columbia, MD, where he was a Senior Electrical Engineer in charge of electronics for several LIDARs and mass spectrometers. His current research interests include RF and analog circuit design with an emphasis on low-power A/D converters. Mr. Lee was a recipient of a Bronze Medal from the 5th Human Tech Thesis Prize sponsored by Samsung Electronics.

Taejoong Song (S’06) received the B.S. and M.S. degrees in electrical engineering from Hanyang University, Seoul, Korea, in 1995 and 1997, respectively, and is currently working toward the Ph.D. degree at the Georgia Institute of Technology, Atlanta. From 1997 to 2005, he was with Samsung Electronics Company, Ltd, Yongin, Korea, working on the development of embedded SRAM memory. In 2005, he joined the Microwave Applications Group (MAG), Georgia Institute of Technology. His research interest includes CMOS digital and analog circuit design, especially low-leakage and low-power circuit techniques.

Jongmin Park (S’06) received the B.S. degree (summa cum laude) in electrical engineering from Seoul National University, Seoul, Korea, in 2005, and the M.S. degree and Ph.D. degree in electrical and computer engineering from the Georgia Institute of Technology, Atlanta, in 2007 and 2009, respectively. In the summers of 2007 and 2008 and the spring and fall of 2009, he was an Intern with Qualcomm, San Diego, CA, where he was involved with the design of power detectors, advanced transmitter architecture, and advanced frequency synthesizer architecture. Since November 2009, he has been a Senior Engineer with Qualcomm, where he is involved in the design of freqeuncy synthesizers for celluar applications. His current research interests include CMOS RF and analog integrated circuit design, especially regarding frequency synthesizer design.

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Changhyuk Cho (S’99–M’06) received the B.S. degree in electrical engineering from Hong-ik University, Seoul, Korea, in 1996, and the M.S. degree and Ph.D. degree in electrical and computer engineering from the Georgia Institute of Technology, Atlanta, in 2002 and 2005, respectively. In 1999, he was with Texas Instruments Incorporated, Dallas, TX, where he designed and characterized low drop-out voltage regulators for wireless applications. From 2006 to 2008, he was with the Georgia Institute of Technology as a Post-Doctoral Research Engineer and was involved in various projects including a CMOS PA project. In 2008, he joined the Samsung Design Center, Atlanta, GA. His research interests are high-performance analog and mixed-signal circuit designs.

Sangjun An received the B.S., M.S., and Ph.D. degrees in electronics engineering from Yonsei University, Seoul, Korea, in 1993, 1995, and 1999, respectively. From 1999 to 2003, he was a Senior Engineer with Hynix Semiconductor, where he was involved with the wireless communication system silicon-on-chip (SOC) design. From 2003 to 2008, he was a Senior Engineer with Samsung Electronics, developing the network and printer controller system SOC design. In 2008, he joined the Microwave Application Group, Georgia Institute of Technology, Atlanta, as a Staff Engineer. His research interests include the SOC design for the wireless communication system, systematic verification, and the low-power system design.

Kyutae Lim (M’93) received the B.S., M.S. and Ph.D. degrees from Hanyang University, Seoul, Korea, in 1991, 1993, and 1996, respectively. From 1996 to 2000, he was with the Samsung Advance Institute of Technology, Ki-Heung, Korea, as a Member of Technical Staff. From 1998 to 1999, he was with the Communication Research Laboratory (currently NICT), Tokyo, Japan, as a Research Fellow. In January 2000, he joined the Microwave Application Group, Georgia Institute of Technology, Atlanta, as a Senior Research Engineer. Currently he is serving as Associate Director of Technology of Georgia Electronic Design Center (GEDC), Georgia Institute of Technology. His research interests include the cognitive radio wireless network and system, high-performance analog/mixed-signal circuit and system, electromagnetic theory and antenna system, and analog signal processing and circuit implementation for ultra-low power electronics. Since 2004, he has been involved in standardization organizations for developing new wireless communications, such as IEEE 802.22, IEEE 802.11, ECMA International. He has authored and coauthored over 120 refereed papers. Dr. Lim is a member of the IEEE Microwave Theory and Techniques Society (MTT-S), the IEEE Communication Society (ComSoc), the IEEE Antennas and Propagation Society (AP-S), the IEEE Solid-State Circuits Society, the IEEE Signal Processing (SP) Society, and the Technical Committee of Cognitive Network in ComSoc. He is currently serving as the Chairman of ECMA TC 48-TG 1, the disruptive wireless standard for the TV white space within European Computer Manufactures Association International. He has been serving as invited speakers and panelist for internationally recognized symposiums, workshops, tutorials, and the group of industries and government bodies for more than 30 times. He has been serving as the Technical Program Committees and Steering Committees for the Conferences including the International Microwave Symposium (served as TPC Vice-Chair), Globecom, the Vehicular Technology Conference, the Cognitive Radio Oriented Wireless Network Conference, the Wireless Communication and Network Conference, and the Workshop for Dynamic Spectrum Access.

Joy Laskar (S’84–M’85–SM’02–F’05) received the B.S. degree in computer engineering (summa cum laude) from Clemson University, Clemson, AL, and the M.S. and Ph.D. degrees in electrical engineering from the University of Illinois at Urbana-Champaign. Prior to joining the Georgia Institute of Technology, Atlanta, in 1995, he was a Visiting Professor with the University of Illinois at Urbana-Champaign and an Assistant Professor with the University of Hawaii at Manoa. At the Georgia Institute of Technology, he holds the Schlumberger Chair in Microelectronics in the School of Electrical and Computer Engineering. He is also the Founder and Director of the Georgia Electronic Design Center and has graduated 41 Ph.D. students since 1995. He has authored or coauthored more than 500 papers, several book chapters, and three books (with another book in development). He has given numerous invited talks, and he has more than 50 patents issued or pending. He and his research team have founded four companies to date: an advanced WLAN IC Company: RF Solutions, which is now part of Anadgics, a next-generation analog CMOS IC Company, Quellan, which is developing collaborative signal-processing solutions for the enterprise, video, storage and wireless markets, which is now part of Intersil, and two more companies which are part of the Georgia Institute of Technology’s Venture laboratory process. Dr. Laskar served as general chairman of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium 2008. He currently serves as an elected member of the IEEE MTT-S Administrative Committee, chair of the IEEE MTT-S Education Committee, and chair of the IEEE MTT-S Executive Committee.

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Bit Error Rate Performance Enhancement of a Retrodirective Array Over a Conventional Fixed Beam Array in a Dynamic Multipath Environment Neil B. Buchanan and Vincent Fusco, Fellow, IEEE

Abstract—In this paper, we provide experimental evidence to show that enhanced bit error rate (BER) performance is possible using a retrodirective array operating in a dynamically varying multipath environment. The operation of such a system will be compared to that obtained by a conventional nonretrodirective array. The ability of the array to recover amplitude shift keyed encoded data transmitted from a remote location whose position is not known a priori is described. In addition, its ability to retransmit data inserted at the retrodirective array back to a spatially remote beacon location whose position is also not known beforehand is also demonstrated. Comparison with an equivalent conventional fixed beam antenna array utilizing an identical radiating aperture arrangement to that of the retrodirective array are given. These show that the retrodirective array can effectively exploit the presence of time varying multipath in order to give significant reductions in BER over what can be otherwise achieved. Additionally, the retrodirective system is shown to be able to deliver low BER regardless of whether line of sight is present or absent. Index Terms—Bit error rate (BER), duplex wireless communication, multipath propagation, retrodirective array.

I. INTRODUCTION

R

ETRODIRECTIVE arrays [1]–[6] are known to have the ability to receive a pilot signal from a remote location, without a priori knowledge of its position and then retransmit it back in the same direction from which it was incident. This effect is made to occur automatically by sampling the incoming wavefront, conjugating its phase and retransmitting the phase conjugated signal from spatial positions close to, and corresponding with, the incident wavefront sampling points. Since the phases of the incident signal are now phase conjugated, the signal retransmitted from the array will self-steer along the direction of the incident wavefront back to the spatial position of the originating pilot tone, [1]. This operation is particularly useful when communication with a mobile platform is required. In this paper, it is our intention to present experimental results that show a retrodirective antenna transmitting duplex data to a remote target in the presence of significant levels of dynamically changing multipath reflections in the communication channel. Manuscript received April 27, 2009; revised October 29, 2009. First published March 08, 2010; current version published April 14, 2010. This work was supported by the U.K. Engineering and Physical Science Research Council under Grant EP/E01707X/1 and Grant EPD045835/1. The authors are with the Institute of Electronics, Communications and Information Technology (ECIT), Queen’s University Belfast, U.K. (e-mail: [email protected]). Digital Object Identifier 10.1109/TMTT.2010.2041518

We also show that the system can successfully operate irrespective of the presence, or absence, of line of sight (LOS). Very few studies investigating the effect of multipath reflections on retrodirective array behavior are available. Even fewer studies investigate the data transport characteristics of retrodirective arrays in these environments, and where these exist, they are confined to static situations. For example, in [7], all of the experiments were undertaken using a continuous wave (CW) carrier in order to assess the degree of fade compensation that could be achieved at 5.35 GHz. No attempt at data transport bit error rate (BER) characterization was made. In [8], the properties of a four-element retrodirective antenna array was evaluated for data rates of 1 Mb/s in a reflective environment using LOS and nonline of sight (NLOS) configurations. The phase conjugators used in this study were software based, and as a consequence, all experimentation was conducted under static multipath reflection conditions. In [9], a four-element software-based retrodirective array was examined for its ability to transmit two channels of multipath data in an NLOS environment, again under static multipath conditions. In this paper, we show for the first time the response of a retrodirective antenna operated in an environment where both static and/or time varying (dynamic) multipath reflection conditions exist with and without LOS present. The experiment is conducted using a ten-element retrodirective array, operating at 2.4 GHz, and transporting 20-Mb/s amplitude shift keyed (ASK) encoded data. The array employs a variation of a new type of precision real time analog phase conjugating architecture developed in [10] and [11]. Since, unlike previous software solutions, the architecture is completely analog, it can respond instantaneously to multipath induced changes occurring in its propagating environment. Until comparatively recently, classical practice in retrodirective antenna design required a local oscillator (LO) running at twice the incident RF frequency [1]. To overcome this problem, workers have produced variants of retrodirective architectures that use sub-harmonic mixers [5], [12]. These operate with an LO signal of a similar frequency to the RF signal, but are accompanied with high mixer conversion loss. Other architectures have been produced, which extract the LO directly from the RF signal [13], but still these require an internal multiply by two operation to produce twice the RF frequency to supply the LO. The phase conjugator circuit used in this paper, described in detail in [11], has the special feature that it does not require the additional RF to IF isolation circuitry normally associated with analog phase conjugation mixer units [11]. This is achieved at

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Fig. 1. Ten-element retrodirective array. (a) Retrodirective array with dual linear patch configuration. (b) Arrangement with separate vertically polarized TX/RX antennas.

the expense of using a modified in-phase and quadrature (IQ) single-sideband up-conversion architecture. II. RETRODIRECTIVE ARRAY PRINCIPAL HARDWARE CONFIGURATION A 10 1 element retrodirective array yielding retrodirective self-tracking properties in azimuth was used for this study [see Fig. 1(a)]. The array used the phase conjugation architecture described in [11]. The signal received by the retrodirective array is horizontally polarized, while the retransmitted signal from the array is vertically polarized. This is achieved through a single aperture comprised of dual linearly polarized microstrip . Dual linear polarization was patch elements spaced at chosen since only a simple antenna architecture is required to provide good isolation between transmit and receive. In some mobile communication scenarios where reflected linear vertical and linear horizontal signal polarizations are affected in a different manner, it would be advantageous to use vertical polarization for both transmit and receive. This can be accomplished either by using circulators, or the arrangement given in Fig. 1(b). Here, we can use the upper row for transmit and the lower row of -plane separated antennas (isolation 30 dB) for receive without the need for a circulator. For the experiments reported below, the propagation environment was reciprocal and the arrangement in Fig. 1(a) was used. The patch antennas were designed using Ansoft High Frequency Structure Simulator (HFSS) software, and the simulated and measured vertically polarized transmit patterns are shown in Fig. 2(a). The half power beamwidth (HPBW) of the simulated and measured patch pattern at the center of the array are in agreement, whereas the measured patterns of the elements at the edges of the array, i.e., 1 and 10, are broader due

Fig. 2. Radiation patterns of single patch and ten-element retrodirective array. (a) Measured and simulated single patch responses. (b) Measured retrodirective monostatic and conventional ten-element equi-power/equi-phase excited nonsteered array radiation patterns.

to ground plane edge diffraction effects. The measured HPBW of the retrodirective array monostatic pattern [see Fig. 2(b)] is 110 , which is almost identical to that predicted using an active pattern method [14] [dotted line, Fig. 2(b)]. Additionally Fig. 2(b) shows the gain response of a conventional ten-element equi-power/equi-phase excited fixed-beam array. The effective isotropic radiated power (EIRP) of both arrays is set to be identical at boresight. The phase conjugating unit used in the construction of the retrodirective array is shown in Fig. 3. Here, incoming amplitude shift keying (ASK) data can be picked off in the conventional way using an AM envelope detector positioned after the down-conversion stage. ASK can be encoded onto the retransmit signal by electronically enabling or disabling the output from the up-conversion modulator. A detailed description of the operation of the core phase conjugating unit in Fig. 3 and its advantages over the classical phase conjugating

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Fig. 4. 100-Mbit/s transmitted pulse signal and directly recovered signal (using a diode detector connected to the output of the phase conjugation unit). Fig. 3. IQ phase conjugation unit with data insertion/extraction.

mixer counterpart is given in [11]. Therefore, its operation is only briefly summarized here. Referring to Fig. 3, the incoming signal is passed through a down-converting mixer, which produces a 0.5-MHz IF. This is filtered and applied to a tracking phase-locked loop (PLL), which produces a constant power signal that is locked to the phase of the received 0.5-MHz IF. This constant power signal is applied to an IQ modulator through phase shifters with the result that the up-converted retransmit signal is the lower sideband, and thus, phase conjugated. The inclusion of the tracking PLL into the phase conjugating unit means that the conjugator circuit has high sensitivity, operating with signal levels as low as 120 dBm, with a 40-dB preamplifier used on the input. At this received signal level, the phase conjugation error was better than 11 , at 60-dBm input, the conjugation error is 1 . Even the worst case figure produced, of 11 , is more than adequate for the half power coverage of 55 of our ten-element retrodirective array. In [15], it was shown that a 75 usable coverage was possible for an eight-element array with phase imbalance of 10 , which is a coverage well in excess of our aforementioned 55 . III. EXPERIMENTAL RESULTS This section will report on the BER performance for ASK data encoded locally at the phase conjugating unit and retransmitted from it. This is followed by a discussion on the phase conjugator’s ability to recover ASK data from the received CW beacon signal necessary for retrodirective action to occur. The BER properties of the retrodirective antenna are then studied for LOS scenarios where appropriate range estimates for free space are made. Full duplex communication is also demonstrated. Results are then reported for a time varying multipath environment where periods of NLOS, as well as LOS, operation are experienced. Finally, the situation where LOS blockage exists is examined. These experiments are indicative of a wide range of real life communication scenarios. Comparison is made with reference to the same antenna array operated as a conventional fixed beam array in order to show how the retrodirective antenna is capable of producing a significant performance enhancement when compared to the basic array in the presence of multipath reflections.

Fig. 5. BER setup in anechoic chamber.

A. Phase Conjugating Unit BER Performance The architecture shown in Fig. 3 is capable of encoding ASK modulation onto the phase conjugated signal being retransmitted by the retrodirective array. Modulating the output signal of the AD8349 IQ modulator is straightforward since a digital signal can be applied directly to the “Output Enable” pin of the chip. This method of modulation is sufficiently fast to allow bit rates of up to 100 Mbit/s. Fig. 4 shows the pulse modulated RF signal produced at the output of the phase conjugation unit, and the resultant directly demodulated signal obtained by using a simple AM diode detector connected to the output of the phase conjugation unit. BER measurements were carried out by applying a 100-Mbit/s serial pseudorandom bit sequence (PRBS) data stream from a BER generator directly to modulation input of the IQ modulator. A variable attenuator was placed at the RF output of the IQ modulator, which was then fed to a high-sensitivity detector diode. This arrangement gave a BER of 10 for a received RF signal strength of 52 dBm. B. LOS BER Measurements: With Data Inserted at Retrodirective Array The setup of Fig. 5 was used within an anechoic chamber to prove that when using the retrodirective antenna array as an ASK transmitter, acceptable BERs could be achieved. As before, a PRBS data stream was applied to the IQ modulator circuit. This time the data rate was reduced to 1 Mb/s, this was necessary due to the bandwidth of the preinstalled cables in the chamber, which are designed to carry low-frequency signaling information only. The ASK signal was then received at the other end of the chamber using a 10-dB horn antenna, and fed directly to a diode detector. The horn was collocated with a small dipole,

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TABLE I FREE-SPACE RANGE ESTIMATES

During this two-way communication, neither signal appears to be having an adverse affect on the other with the BER remaining the same as was obtained for separate receive and transmit measurement. D. Dynamically Varying NLOS BER in a Multipath Environment

Fig. 6. Full duplex waveforms.

radiating an EIRP of 0 dBm, and acting as the beacon for retrodirection pointing activation. The measurement was carried out by increasing the setting of the variable attenuator in Fig. 5 until the measured BER dropped to 10 . This was chosen as a practical level of the BER that could be measured within a reasonable time for the data rate of 1 Mb/s. The attenuator setting then gives the increase in distance that would be permissible in order to obtain the same BER over an unobstructed free-space link. The resulting range estimates are shown in Table I as a function of the azimuthal position of the retrodirective array with respect to the receive antenna, which is fixed at the 0 boresight position. These azimuth positions were chosen to prove the high degree of coverage available from the retrodirective array (3-dB beamwidth of 110 , compared to 12 for a conventional array) before range is adversely affected. The use of a more sophisticated detection arrangement would further improve these range estimate results. C. Duplex Operation Referring to Fig. 5, an ASK transmit source at 100 kb/s was transmitted through the dipole with an EIRP of 0 dBm. With the retrodirective circuits in the array concurrently transmitting 1-Mb/s data, the AM demodulator circuit shown in Fig. 3 was able to successfully demodulate the incoming signal, thereby showing that duplex communication was occurring. During duplex operation, a system sensitivity reduction of only 1 dB was noted. Fig. 6 shows the demodulated waveforms obtained, here the top two traces are the transmitted signal from the dipole, and the demodulated 100-kb/s signal, recovered at the array’s internal demodulators. The bottom two traces are the 1-Mb/s signal transmitted by the array and subsequently demodulated.

The purpose of this experiment was to determine the effectiveness of using the retrodirective array in a multipath environment in order to prove that the retrodirective action can be used to provide a means for automatic mitigation of dynamic multipath effects. The rationale for this approach is that, in an environment exhibiting multipath propagation channels, the multipath signals incident upon the retrodirective array will cause the retransmitted signal from the retrodirective array to split in direct proportion to the number and relative intensity of the multipath signals received [16]–[18]. These will then be retransmitted exactly back along the incident ray trajectories of the incident multipath signals such that constructive interference occurs at the originating source. The proviso being that the channel temporal and spatial variation has not changed significantly over the time taken for the beacon signal to be received by and then retransmitted from the retrodirective array. Thus, an interesting possibility arises that, when LOS blockage occurs in a propagation space with multipath components, a situation automatically develops whereby any signal energy transported along the multiplicity of multipaths will automatically return along these paths and be constructively reassembled at the beacon location. This is unlike multiple input multiple output (MIMO) [19] in two respects since here we are using the multiple channels in order to carry with reduced BER data at a fixed capacity, i.e., we are not exploiting the multipath in the propagation channel in order to produce a means for increasing data rate. Also, unlike MIMO, the system presented here works in the presence and in the absence of LOS between the transmitter and receiver. To determine how well the retrodirective antenna can perform spatial/temporal adaptive channel compensation in real time, its performance when transmitting a 20-Mb/s data stream (here, the bit rate limit is set by portable BER equipment availability) toward a remote interrogating receiver was compared with what could be achieved with a conventional ten-element array with a fixed broadside radiation pattern (Fig. 2). The performance of the two systems was characterized in a multipath rich environment [see Fig. 7(b)]. These multipaths result from the scattering of the retrodirective array and beacon signals when operating in a room of conventional construction, i.e., concrete, metal beams, flooring laid over suspended metal floor panels, and filled with other reflective objects such as laboratory apparatus. In addition, the environment also had controlled moving occupancy, whereby a person was made to walk across the array, at a given distance from it, and at a fixed repetition rate [see Fig. 7(b) for details], while the room furnishing remains unaltered during the experiment. In the experimental setup of Fig. 7(a), the “target,” i.e., the location of where the data encoded at the retrodirective array is to be returned to, consists of a 2400.5-MHz source, which transmits the beacon carrier signal to the retrodirective array.

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Fig. 7. Setup for BER measurement. (a) BER measurement configuration. (b) Layout of multipath environment.

The retrodirective array returns an ASK signal at 2349.5 MHz back to the target. The target was co-located with respect to the beacon and at broadside with respect to the retrodirective antenna array. This return signal was then pulse modulated using a 20-Mb/s PRBS date stream from a BER tester. The pulse modulated signal was demodulated using a spectrum analyzer set to zero span and with resolution bandwidth of 50 MHz. The demodulated data appearing on the video output connector of the spectrum analyzer was then fed to the data input channel of the BER tester. Experimental results were produced for the setup of Fig. 7(a) and (b) with a person walking across the front of the array, parallel to it, and at a repetition rate of about 5 s per return trip across the room at distances 1.5 and 3 m from it. The room dimensions are approximately 8 m 5 m 3 m. Data recovery was not synchronized to the position of person moving. The signal returned back to the target by the retrodirective array is received by a horn antenna located monostatic fashion with respect to the originating source signal. The results in Fig. 8 show that for both the 1.5-m crossing point and 3-m crossing point that there is substantial reduction in the BER when the antenna is operating in retrodirective mode when compared to when data transmission is through the fixed

Fig. 8. BER results with a dynamic NLOS distortion (moving person) at 1.5 m and 3 m from array. (a) Moving person at 1.5 m from array. (b) Moving person at 3 m from array.

pointing array. Here, both arrays are set to give the same EIRP at boresight and 20 traverses of the LOS have occurred. When no person was present in front of the array, both retrodirective and standard array setups were able to transmit error free. The results in Fig. 8(a) show a significant reduction in BER between retrodirective and fixed beam array mode when the movement was 1.5 m away from the array. When the movement is 3 m from the array, the difference is less prominent. When the person was 1.5 m away from the array, a maximum BER of 2 10 was produced when using the retrodirective array and peaked at 4.25 10 for the fixed beam array. In the case of the person 3 m from the array, the difference was smaller with a maximum BER of 0.8 10 for retrodirective and 2.25 10 for the fixed beam array. As expected, BER peaks occur when the LOS is most blocked. These results suggest that the retrodirective array compensates for multipath and blockage effects in both near and far fields, with superior performance in the near

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In order to find out what was happening to the near-field response of the retrodirective array when the obstruction was positioned 1.5 m from it, we measured the bistatic response of the array by placing a small dipole carrying a low-level beacon signal a distance of 1.5 m from it. Fig. 10 shows the comparison between the near- and far-field bistatic responses. The near-field response indicates null filling, which means that the array will tend to be more receptive to multipath signals coming in from certain angles of incidence than would occur when operated in the far field. This means that the retrodirective array should be better at collecting multipath energy from a greater range of angles of arrival than would otherwise have been possible. IV. CONCLUSION

Fig. 9. BER results with a static NLOS distortion (stationary person) at 1.5 m from array.

The BER results presented in this paper show that the retrodirective array is able to operate both when LOS is present or when dynamically obstructed. It has been shown that the retrodirective array can in real time substantially mitigate the effect of a person walking across the LOS between the transmit and receive array. This is achieved by exploiting the retrodirective array’s capability to redirect energy back along incoming multipaths such that they will coherently recombine at the original source location. In effect, we have created a means for real time automatic compensation of spatial-temporal variations in the channel, as well as channel blockage. The consequence of this is that more robust communication in unfavorable propagation channels can be made using the principles elaborated in this paper. Indeed, it should be possible using the method suggested for some low-cost applications to remove the need for adaptive beam-steering solutions, which seek to search for the most favorable path between the transmit source and data receiver. The arrangement presented here, without further modification, would also permit duplex data transfer between both ends of the channel, an effect that could be exploited to allow a reverse channel from the receiver to the transmitter to be set up for control purposes. REFERENCES

Fig. 10. Near- and far-field bistatic retrodirective array responses.

field. Noteworthy of mention is the fact that since the phase conjugation is carried out by an analog-based solution, unlike those presented in [8], [9], the speed of response allows the retrodirective action to instantaneously compensate for moving objects, which are stirring the environments multipath. In order to compare the retrodirective array and fixed beam array performance further, the experimental results of Fig. 8(a) were re-measured, this time with the person standing still in the direct LOS between the beacon and retrodirective array. The static case has been previously presented in [8] and [9]. In our case, a person target standing in the LOS path will not be entirely stationary and there will be some leakage around the target. The results shown in Fig. 9 verify the ability of the retrodirective array to compensate for LOS blockage when alternative multipaths are present. Here, a BER peaking at 1.6 10 is obtained for the fixed beam array and 5 10 for the retrodirective case.

[1] C. Y. Pon, “Retrodirective array using the heterodyne technique,” IEEE Trans. Antennas Propag., vol. AP-12, no. 2, pp. 176–180, Mar. 1964. [2] S. L. Karode and V. F. Fusco, “Frequency offset retrodirective antenna array,” Electron. Lett., pp. 1350–1351, Jul. 1997. [3] L. D. DiDomenico and G. M. Rebeiz, “Digital communications using self-phased arrays,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2000, vol. 3, pp. 1705–1708. [4] R. Y. Miyamoto, Y. Qian, and T. Itoh, “An active integrated retrodirective transponder for remote information retrieval,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2000, vol. 3, pp. 1431–1434. [5] J.- Y.- Park and T. Itoh, “A 60-GHz 4th subharmonic phase-conjugated retrodirective array,” in 34th Eur. Microw. Conf., Oct. 2004, vol. 3, pp. 1277–1280. [6] L. Chiu, Q. Xue, and C. Chan, “A planar circular phase conjugated array with full scanning range,” in IEEE MTT-S Int. Microw. Symp. Dig., Atlanta, GA, Jun. 2008, pp. 599–602. [7] J. Tuovinen, G. S. Shiroma, W. E. Forsyth, and W. A. Shiroma, “Multipath communications using a phase-conjugate array,” in IEEE MTT-S Int. Microw. Symp. Dig., 2003, pp. 1681–1684. [8] A. Warrier, Z. Chen, and C. Loadman, “Experimental study of the retrodirective antenna array system in a multipath environment,” in 6th Ann. Commun. Netw. Services Res. Conf., May 5–8, 2008, pp. 449–452. [9] B. E. Henty and D. D. Stancil, “Multipath-enabled super-resolution for RF and microwave communication using phase-conjugate arrays,” Phys. Rev. Lett., vol. 93, 2004, Art. ID 243904.

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[10] V. F. Fusco and N. B. Buchanan, “Dual mode retrodirective/phased array,” IET Electron. Lett., vol. 45, no. 3, pp. :139–141, Jan. 2009. [11] V. Fusco and N. B. Buchanan, “High-performance IQ modulator-based phase conjugator for modular retrodirective antenna array implementation,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 10, pp. 2301–2306, Oct. 2009. [12] T. Brabetz, V. F. Fusco, and S. Karode, “Balanced subharmonic mixers for retrodirective array applications,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 3, pp. 465–469, Mar. 2001. [13] K. M. K. H. Leong, R. Y. Miyamoto, S.-S. Jeon, Y. Wang, and T. Itoh, “A frequency autonomous retrodirective array transponder,” in IEEE MTT-S Int. Microw. Symp. Dig., 2002, vol. 2, pp. 1349–1352. [14] B. Y. Toh, V. F. Fusco, and N. B. Buchanan, “Retrodirective array tracking prediction using active element characterisation,” Electron. Lett., vol. 37, no. 12, pp. 727–728, Jun. 2001. [15] B. Y. Toh, V. F. Fusco, and N. Buchanan, “Assessment of performance limitations of PON retrodirective arrays,” IEEE Trans. Antennas Propag., vol. 50, no. 10, pp. 1425–1432, Oct. 2002. [16] V. F. Fusco, “Response of retrodirective array in the presence of multiple spatially separated sources,” IEEE Trans. Antennas Propag., vol. 54, no. 4, pp. 1352–1354, Apr. 2006. [17] S. Karode and V. F. Fusco, “Use of an active retrodirective antenna array as a multipath sensor,” IEEE Microw. Guided Lett., vol. 7, no. 12, pp. 399–401, Dec. 1997. [18] V. F. Fusco and S. L. Karode, “Self-phasing antenna array techniques for mobile communications applications,” IEE Electron. Commun. J., vol. 11, no. 6, pp. 279–286, Dec. 1999. [19] “MIMO system technology for wireless communications,” in Electrical Engineering and Applied Signal Processing, G. Tsoulous, Ed. Bridgewater, NJ: Taylor & Francis, 2007.

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Neil B. Buchanan received the B.Eng. (Hons.) and Ph.D. degrees from the Queens University of Belfast (QUB), Belfast, U.K., in 1993 and 2000, respectively. He is currently a Senior Engineer with the High Frequency Electronics Group, QUB. His research interests include millimeter-wave monolithic microwave integrated circuit (MMIC) design, millimeter-wave oscillators, and self-steered antenna arrays.

Vincent Fusco (S’82–M’82–SM’96–F’04) received the Bachelors degree in electrical and electronic engineering (with first class honors), Ph.D. degree in microwave electronics, and D.Sc. degree (for his work on advanced front end architectures with enhanced functionality) from the Queen’s University of Belfast, Belfast, U.K., in 1979, 1982, and 2000, respectively. Since 1995, he has held a Personal Chair in High Frequency Electronic Engineering with the Queen’s University of Belfast. He has authored or coauthored 450 scientific papers in major journals and refereed international conferences. He authored two text books. His research interests include nonlinear microwave circuit design and active and passive antenna techniques. The main focus for his research is in the area of wireless communications. Prof. Fusco is a Fellow of the Royal Academy of Engineering and the Institution of Engineering and Technology (IET).

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Design and Analysis of Swapped Port Coupler and Its Application in a Miniaturized Butler Matrix Yae Suk Jeong and Tae Wook Kim, Member, IEEE

Abstract—This paper presents a novel size reduction technique for designing a Butler matrix using a new type of coupler. This coupler is half the length of a conventional coupler and has a swapped port characteristic wherein the locations of the isolation and coupled ports are switched. These features make the new coupler, called the “swapped port coupler,” effective for reducing the size of the Butler matrix. The behavior of the swapped port coupler was mathematically analyzed, and its design equation was derived. Furthermore, the proposed coupler was employed to design a miniaturized Butler matrix. The area of this Butler matrix was 70 70 mm2 , and its operating frequency was 1 GHz. When the area was normalized to the frequency, the area of the proposed Butler matrix was 10% of a conventional Butler matrix. Index Terms—Beamforming, Butler matrix, smart antenna, swapped port coupler, switched beam system.

I. INTRODUCTION

W

IRELESS communication technologies have emerged over a short period of time. However, as wireless technology advances, more complicated tasks are required of it. For instance, the wireless personal area network (WPAN) IEEE 802.15.3c [1] was developed to satisfy the increasing demand for wireless high-speed data transfer by using a millimeter wave. Its operating frequency of 60 GHz can provide transmission of a large amount of data in a short time. However, because 60 GHz is a high frequency, the wave experiences high propagation path loss [2] and the communication link might not be maintained when there is an obstacle along the line of sight (LOS). In addition, the increasing number of cellular phone users produces co-channel interference fading, which is the main cause of the degradation of the signal-to-noise ratio (SNR) and the limitation of cellular capacity. To solve these problems, many researchers have proposed a smart antenna, which is an array of antennas that can generate a high directivity beam and rotate its direction. In a millimeter-wave WPAN, a smart antenna can change the direction of the beam to evade obstacles along the LOS, and its high directivity beam provides robust communication under circumstances where co-channel interference exists [3].

Manuscript received June 11, 2009; revised October 11, 2009. First published March 08, 2010; current version published April 14, 2010. This work was supported by the National Research Foundation of Korea (NRF) under Grant 2009-8-1535 funded by the Korea Government. Y. S. Jeong was with the School of Electrical and Electronic Engineering, Yonsei University, Seoul 120-749, Korea. He is now with the School of Electrical Engineering, Georgia Institute of Technology, Atlanta, GA 30308 USA (e-mail: [email protected]). T. W. Kim is with the School of Electrical and Electronic Engineering Yonsei University, Seoul 120-749, Korea (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2041571

The principle of beamforming is based on feeding a signal into an array of antennas with equal power and phase difference. Many beamforming technologies have been reported. The active beamforming technique [4] uses a phase shifter in the local oscillator (LO) path to address the increased phase error in high-frequency environments. Another beamforming technique, the Rotman lens [5], uses the properties of the wave to produce the desired phase difference. The Butler matrix is a widely used beamforming technology characterized by its simdB plicity and low power loss [6]–[16]. It consists of four couplers, two crossovers, and two 45 phase shifters as shown. When a signal is excited on one input port while the others are terminated, the signal will go through the output antennas generating equal power with progressive phase shifts. If the signal is excited on other input port, it will generate a different progressive phase shift. The beam will be generated at different angles depending on which input is excited. However, the Butler matrix has area penalty because the of the 3-dB coupler is quite long, especially at length of low frequencies. This leads to an increase in cost and makes it harder to be implemented in applications where only a small area is available. Therefore, many papers have reported on the size reduction of the Butler matrix [10]–[15]. Quasi-lumped elements and their discontinuities were introduced [10] to reduce the required area. A coplanar waveguide (CPW) multilayer directional coupler was employed [11] to fabricate a Butler matrix. Reference [12] introduces a Butler matrix that is integrated on the chip. By employing a bifilar transformer coupler and reflection type phase shifter, the size of the Butler matrix was reduced and phase error can be minimized. The low-temperature co-fired ceramic (LTCC) process was employed in [13] to stack the layer of the Butler matrix and finally miniaturize its size. A suspended stripline coupler within a multilayer technology was reported [14]–[16] as a substitute for a branch line coupler in a coupled line coupler scheme. Even though various size reduction methods have been reported, they have two major disadvantages. First, the size of the coupler they are using is too large. Most of the Butler macoupler to divide the power and generate trix employs a length of the coupler remains too phase shift. However, the long to allow for miniaturization of the Butler matrix. Reference [17] reports a size reduction method of the coupler that utilizes capacitors and a high impedance line. However, its output port characteristic on the opposite side makes it hard for the Butler matrix to be implemented on a single layer, and its high impedance line introduce more losses as the size gets reduced more. The other is that most size reduction methods require a multilayer technology to reduce the number of crossovers. This will

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Fig. 2. Equivalent model of swapped port coupler. (a) Even mode. (b) Odd mode.

in (1) and (2): Fig. 1. Comparison between: (a) conventional coupled line coupler and (b) swapped port coupler.

(1) lead to an increase in production cost and complexity. Our proposed size reduction technique employing a swapped port coupler is free from these problems. As shown in Fig. 1(b), its length makes it effective for designing a Butler matrix for use in a more compact area. Its swapped port characteristic also makes it possible to implement on a Butler matrix without using multilayer technology. This will lead to reduction in costs and simplification of the design. To design a swapped port coupler, we first made a coupler with a very weak coupling factor. This allows less power to flow at the coupled port (Port 3). Next, by adding a capacitor between the two signal lines, a path is created between the isolation port (Port 4) and the thru port (Port 2) so that power at the thru port can flow through the isolation port. This causes the isolation port to act like a coupled port. From the mathematical analysis, we concluded that a swapped port characteristic is achieved when . the length of the swapped port coupler is In this paper, we provide a mathematical analysis of the swapped port coupler and its use in a miniaturized Butler matrix. Since the length of the swapped port coupler is half the length of a conventional coupler, the Butler matrix can be made in a more compact area. In Section II, the mathematical analysis of the swapped port coupler is presented. Using a throughout analysis, we were able to derive a design equation for the swapped port coupler. In Section III, the Butler matrix implemented with a swapped port coupler is presented. In Section IV, measurement results are discussed, followed by our conclusions in Section V.

II. MATHEMATICAL ANALYSIS OF SWAPPED PORT COUPLER The proposed swapped port coupler consists of a pair of casignal lines, as shown in Fig. 1(b). Since a pacitors and coupler has a symmetric structure, the normal mode theory can be employed to analyze the swapping port characteristics. The four ports can be simplified to a two-port problem in which the even- and odd-mode signals are fed to two colinear inputs. The schematics of the coupler in even and odd modes are shown in Fig. 2(a) and (b). Each structure has a different characteristic impedance of and electrical length of . The admittance parameter of each mode can be expressed as follows

(2) By converting these admittance parameters to scattering parameters following (3)–(6), the even and odd modes of and can be defined as follows: (3) (4) (5) (6) From normal mode theory, the scattering parameters of the swapped port coupler can be calculated using (7)–(10) as follows: (7) (8) (9) (10) We designed a coupler with a small voltage coupling factor. This will cause the coupler to send fewer signals to the coupled port and more signals to the thru port. As the characteristic impedance of the even and odd modes follow (11), the difference in the characteristic impedance will be negligible if the coupling factor is extremely small. Also, when the coupling factor is small, the electrical lengths of the even and odd modes can be assumed to be the same (12)

(11) (12)

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Under this assumption, the admittance parameters of the even and odd modes in (1) and (2) are the same, except for the capacitance. Applying this condition to (3) and (4), the scattering can be expressed as (13) and (14) as follows: parameters of (13)

(14)

If the electrical length of the coupler is , the numerator of the even mode of in (13) is 0, as follows in (15): if is

Fig. 3. Photograph of proposed swapped port coupler.

Following (10),

can be calculated as follows in (21):

(15) in (14) is 0 when The numerator of the odd mode of the capacitance has the value given by (16) as follows and the : electrical length is (16) is 0, the values of As both the even and odd modes of and is also 0. The magnitude of the signal at the coupled port is then the same as that of the input port. When the input impedance is matched perfectly, the signal will not flow into the coupled port. Adding this capacitance leads to different results at the thru port and isolation port. Calculating (5) and (6) under and , the the same conditions used for the analysis of will be expressed as follows in (17) even and odd modes of and (18):

(21) From this result, we can conclude that both and have equal magnitudes of 3 dB when converted to the decibel scale. We can also note that the swapped port coupler has a different phase characteristic compared to the coupled line coupler wherein the thru port leads the isolation port by 90 (22)

(17)

(18)

When follows:

is

, the odd mode of

becomes (19) as

(19)

Based on (8),

can be expressed as follows in (20):

The design equation for the swapped port coupler is described in (22). By placing a capacitor with a value of at each signal line, we can make a coupler that exhibits end of a swapped port performance. The behavior of the coupled port will be similar to that of an isolation port in a conventional coupler because less power will flow. The behavior of the isolation port will also be similar to that of the coupled port as more power will flow at the isolation port. To verify the equation, the swapped port coupler was implemented and its -parameter was measured. Fig. 3 shows a photograph of a swapped port coupler. It was integrated on an FR4 substrate, which has a thickness of 1.6 mm. A measured -parameter and theoretical -parameter was compared in Fig. 4. Although there is some discrepancy due to loss of the substrate, the measured data follows the theoretical value. III. BUTLER MATRIX IMPLEMENTATION

(20)

Using (22), the swapped port coupler was used to design a Butler matrix. However, as mentioned in Section III, modification was required to address the odd phase characteristics of the swapped port coupler. Figs. 1 and 5 show the odd output phase characteristics of the swapped port coupler. That is, the port that lags the other ports

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Fig. 4. Comparison between measured result and calculated data.

Fig. 6. Proposed Butler matrix structure.

TABLE I OUTPUT PHASE DIFFERENCE AND ESTIMATED BEAM PATTERN OF PROPOSED BUTLER MATRIX Fig. 5. Phase difference of output port in swapped port coupler.

by 90 in the conventional coupler, now leads by 90 . Since the output phase characteristics are different from the conventional coupler, the swapped port coupler cannot be employed directly. To solve this problem, the structure of the original Butler matrix must be modified. By moving the 45 phase shifter from its original position into the crossover, as in Fig. 6, the phase problem can be solved. Due to this modification, the generated beam direction will be different from the conventional Butler matrix. That is, the angle of the beam when input 1 is excited will be same as the angle when input 4 is excited on a conventional Butler matrix. It is summarized in Table I. The proposed Butler matrix is composed of four swapped port couplers, one crossover, and one crossover with a 45 phase shifter. To implement the swapped port coupler, a surface mounted device (SMD) capacitor was soldered at each end of signal line. A tandem connection (a cascaded connecthe tion of two swapped port couplers) was also used to form the crossover. To incorporate a 45 phase shifter into the crossover, we tuned the length of transmission line on the peripheral side so that phase difference of 45 can be achieved. Finally, a meander transmission line was employed to adjust the phase difference at the output. Fig. 7 shows a photograph of a fabricated Butler matrix implemented using a Teflon 10-mil substrate with a dielectric constant of 2.2. The overall area of the circuit was only 70 70 mm excluding the input/output (I/O) launch line.

IV. MEASUREMENT RESULT The Butler matrix was measured using an Agilent four-port network analyzer. As the Butler matrix has eight ports, the other four ports were terminated with 50 . Figs. 8 and 9 show the power measurement results at output port of the Butler matrix when a signal was fed into Port 1 and Port 2, respectively. The operating frequency was shifted to 980 MHz from 1 GHz due to process variation. When Port 1 was excited, the maximum insertion loss was 1.75 dB, and the minimum was 0.7 dB. When Port 2 was excited, the maximum insertion loss was 1.2 dB, and the minimum was 0.75 dB. The return loss was greater than 25 dB around the operating frequency. Figs. 10 and 11 show the phase measurement results at the output port when a signal was fed into Port 1 and Port 2, respectively. Moreover, its phase difference was shown at Fig. 12. The overall phase error was less than 8 . There are several possible reasons for this phase error. A phase shift caused by process variation can produce phase error as each block was optimized

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Fig. 10. Output phase measurement of the proposed Butler matrix when Port 1 was excited.

Fig. 7. Photograph of the proposed Butler matrix.

Fig. 11. Output phase measurement of the proposed Butler matrix when Port 2 was excited.

Fig. 8. Output power measurement of the proposed Butler matrix when Port 1 was excited.

Fig. 12. Phase difference between each outputs when Port 1 and Port 2 was excited.

Fig. 9. Output power measurement of the proposed Butler matrix when Port 2 was excited.

to 1 GHz. Moreover, capacitance variation in the SMD capacitor could result in phase error as the capacitance value is crucial in determining the operating frequency.

The measured power and phase output were used to analyze the array factor of the proposed Butler matrix. It was compared with ideal value in Fig. 13. Although there is little discrepancy due to loss of substrate, calculated array factor shows agreement with an ideal array factor. If port 1 is excited, the direction of generated beam will be 15 . If port 2 is excited, the direction will be 50 .

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operating frequency is needed for comparison with previous studies. The size factor equation was derived as follows: Size Factor

Area cm

Frequency GHz

(23)

Using (23), the area of the proposed Butler matrix was normalized and compared with other state-of-art Butler matrices in Table II. The proposed Butler matrix had the smallest size factor among the Butler matrices, having a size that was less than 10% of the conventional model. Moreover, its area can be reduced further by placing couplers in more compact arrangement or by employing a high impedance line instead of a 50- line. As the 8 8 Butler matrix is composed of 12 quadrature couplers, eight phase shifters, and 12 crossovers, we can also estimate its size as four times bigger than the proposed 4 4 Butler matrix. Therefore, the size of the 8 8 Butler matrix using the proposed method will be 196 cm . Compared to [18], which had a demonstrated 8 8 Butler matrix with a conventional method and had the size factor of nearly 8000, the proposed work has great size reduction. Fig. 13. Comparison between ideal and calculated array factor when: (a) port 1 was excited and (b) port 2 was excited.

TABLE II COMPARISON OF AREA AND TOPOLOGY OF PROPOSED BUTLER MATRIX AND OTHER BUTLER MATRICES

V. CONCLUSIONS A new size reduction technique for the Butler matrix has been presented in this paper. This method employs a new type of coupler, the swapped port coupler, to achieve size reduction. Since the length of the swapped port coupler is half the length of a conventional coupler, the Butler matrix can be fabricated in a more compact area. Moreover, its swapped port characteristic reduces processing cost because it does not use multilayer technology. The design equation of the swapped port coupler was derived, and an entire Butler matrix was implemented on a printed circuit board (PCB) and measured. With the swapped port coupler, we were able to design a Butler matrix with a small size, and with a good power distribution and phase difference. To the authors’ knowledge, this is the smallest Butler matrix fabricated on a PCB when the area is normalized with frequency. The proposed Butler matrix can be applied in many wireless applications, especially where a smart antenna is needed in a small area. ACKNOWLEDGMENT The author would like to thank M. K. Kang and S. K. Lee, both with Yonsei University, Seoul, Korea, for their support and useful discussions and Mr. K. I. Kang. Gigalane, Hwasung, Korea, for layout support. REFERENCES

Compared to other conventional Butler matrices, proposed work has relatively narrow bandwidth. Therefore, this can applied to provide smart antenna for the wireless local area network (WLAN) system, which has narrow bandwidth. As the bandwidth gets wider as operating frequency gets higher, we think that this can also bring a cost-efficient way to perform a beamforming for WPAN technology, which has 7 GHz of bandwidth on the operating frequency of 60 GHz. As the operating frequency increases, the area of the Butler matrix is reduced and normalization between the area, and the

[1] “IEEE 802.15 Working Group for wireless personal area networks (WPANs),” 2007. [Online]. Available: http://ieee802.org/15 [2] N. Kim, S. Lee, and J. Rieh, “A millimeter-wave LC cross-coupled VCO for 60 GHz WPAN application in a 0.13 m Si RF CMOS technology,” J. Semicond. Technol. Sci., vol. 8, no. 4, pp. 295–301, Dec. 2008. [3] S. Cui, A. J. Goldsmith, and A. Bahai, “Energy-efficiency of MIMO and cooperative MIMO techniques in sensor networks,” IEEE J. Sel. Areas Commun., vol. 22, no. 6, pp. 1089–1098, Aug. 2004. [4] A. Natarajan, A. Komijani, and A. Hajimiri, “A fully integrated 24-GHz phased-array transmitter in CMOS,” IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2502–2514, Dec. 2006. [5] L. Schulwitz and A. Mortazawi, “A new low loss Rotman lens design for multi beam phased arrays,” IEEE MTT-S Int. Microw. Symp. Dig., pp. 445–448, Jun. 2006.

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[6] J. Butler and R. Lowe, “Beam forming matrix simplifies design of electronically scanned antennas,” Electron. Design, pp. 170–173, Apr. 1961. [7] A. Denidni and T. E. Libar, “Wide band four-port Butler matrix for switched multibeam antenna arrays,” IEEE Proc. Pers., Indoor, Mobile Radio Commun., vol. 3, pp. 2461–2464, Sep. 2003. [8] H. Hayashi, D. A. Hitko, and C. G. Sodini, “Four-element planar Butler matrix using half-wavelength open stubs,” IEEE Microw. Wireless Compon. Lett., vol. 12, no. 3, pp. 73–75, Mar. 2002. [9] C. H. Tseng, C. J. Chen, and T. H. Chu, “A low-cost 60-GHz switchedbeam patch antenna array with Butler matrix network,” IEEE Antennas Wireless Propag. Lett., vol. 7, pp. 432–435, 2008. [10] C. W. Wang, T. G. Ma, and C. F. Yang, “A new planar artificial transmission line and its application to a miniaturized Butler matrix,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 12, pp. 2792–2801, Dec. 2007. [11] M. Nedil, T. A. Denidni, and L. Talbi, “Novel Butler matrix using CPW multilayer technology,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 1, pp. 499–507, Jan. 2006. [12] C. C. Chang, T. Y. Chin, J. C. Wu, and S. F. Chang, “Novel design of a 2.5-GHz fully-integrated CMOS Butler matrix for smart-antenna systems,” IEEE Trans Microw. Theory Tech., vol. 56, no. 8, pp. 1757–1763, Aug. 2008. [13] G. Tudosie, H. Barth, and R. Vahldieck, “A compact LTCC Butler matrix realization for phased array applications,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2006, pp. 441–444. [14] M. Bona, L. Manholm, J. P. Starski, and B. Svensson, “Low-loss compact Butler matrix for a microstrip antenna,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 9, pp. 2069–2075, Sep. 2002. [15] A. C. Chavez, I. L. Garro, J. M. Kim, and Y. K. Kim, “A novel wide-band Butler matrix for vehicle radars at 24 GHz,” Microw. Opt. Technol. Lett., pp. 7–10, Mar. 2008. [16] C. Collado, A. Grau, and F. D. Flaviss, “Dual band Butler matrix for WLAN systems,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 12–17, 2005, pp. 2247–2250. [17] S. S. Myoung and J. K. Yook, “A miniaturization method of parallel coupled-line filters using lumped capacitors and grounding,” Microw. J., vol. 48, no. 6, pp. 94–100, Jun. 2005.

[18] B. Piovano, L. Accatino, F. Muoio, G. Caille, and M. Mongiardo, “CAD and mechanical realization of planar, -band, 8 8 Butler matrices,” in Eur. Microw. Conf., Oct. 2002, pp. 1–4.

Ka

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Yae Suk Jeong was born in Daejeon, Korea, in 1984. He received the B.S. degree in electrical engineering from Yonsei University, Seoul, Korea, in 2009, and is currently working toward the Ph.D. degree at the Georgia Institue of Technology, Atlanta. His research interests are RF and microwave circuits and systems for wireless application.

Tae Wook Kim (S’02–A’02–M’06) was born in Seoul, Korea, in 1974. He received the B.S. degree in electrical engineering from Yonsei University, Seoul, Korea, in 2000, and the M.S. and Ph.D. degrees from the Korea Advanced Institute of Science and Technology (KAIST), Daejon, Korea, in 2002 and 2005 respectively. From July 2002 to December 2005, he was with Integrant Technology Inc. (now Analog Device), where he developed CDMA/personal communications system (PCS) mixers and low-noise amplifier (LNA) and CMOS mobile TV tuner integrated circuits (ICs). From January 2006 to July 2007, he was with Qualcomm Inc., Austin, TX, where he was involved with DVB-H and Media FLO chip design. Since September 2007, he has been with faculty of the School of Electrical and Electronics Engineering, Yonsei University, where he is currently an Assistant Professor. His research interests are in microwave, RF, and analog- and mixed-signal integrated circuits and system for wireless applications.

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A -Band Two-Antenna Four-Simultaneous Beams SiGe BiCMOS Phased Array Receiver Dong-Woo Kang, Associate Member, IEEE, Kwang-Jin Koh, Member, IEEE, and Gabriel M. Rebeiz, Fellow, IEEE

Abstract—This paper presents a -band SiGe BiCMOS phased array receive chip capable of forming four-simultaneous beams from two antenna inputs. The design is based on the all-RF architecture with 4-bit active phase shifters and 4-bit variable gain amplifiers in each channel. The four-beam chip results in a gain of 4–6 dB per channel at 13–15 GHz, a noise figure of 10–11 dB, a worst case input 1 dB of 14.3 dBm per channel (input third-order intercept point of 7 dBm), and an rms phase and gain error of 12 and 1.5 dB, respectively. A gain control 5 . The of 17 dB is also achieved with a phase change of four-beam chip was tested using two input signals and results in a gain of 9–11 dB at 13–15 GHz. The on-chip isolation between the channels has been fully characterized and is 40 dB at 13–15 GHz. The chips can operate over an instantaneous bandwidth of 1 GHz at any frequency from 13 to 15 GHz, and the four beams can be at the same frequency if required. With all digital control circuitry and electrostatic discharge protection 4.3 mm2 and for all I/O pads, the chip occupies an area of 2.4 consumes 520 mA at 3.5-V supply voltage. To our knowledge, this is the first demonstration of an all-RF phased array silicon chip capable of producing four-simultaneous beams from two different antennas or four-simultaneous beams of different polarizations from a dual polarization antenna. The application areas are in satellite communications and defense systems. Index Terms—Multibeam, phased array, phase shifter, SiGe BiCMOS.

I. INTRODUCTION

P

HASED arrays based on silicon RF integrated circuits (RFICs) are being developed as a lower cost solution due to their high integration density, yield, and functionality on a single chip. Recently, phased arrays based on all-RF phase shifting [1]–[10], IF or baseband phase shifting [11], [12], and local oscillator (LO) phase shifting [13], [14] have been realized in standard CMOS and SiGe technologies. The all-RF architecture has been demonstrated from - to -band using Manuscript received September 28, 2009. First published March 15, 2010; current version published April 14, 2010. This work was supported by the Defense Advanced Research Projects Agency (DARPA), Microsystems Technology Office (MTO), under a Space and Naval Warfare Systems Command (SPAWAR) Contract. D.-W. Kang and G. M. Rebeiz are with the Electrical and Engineering and Computer Science, University of California at San Diego, La Jolla, CA 92093 USA (e-mail: [email protected]; [email protected]). K.-J Koh was with the Electrical and Engineering and Computer Science, University of California at San Diego, La Jolla, CA 92093 USA. He is now with the Intel Corporation, Hillsboro, OR 97124-6497 USA (e-mail: kjinkoh@gmail. com). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2041586

Fig. 1. (a) Multibeam phased array receiver based on all-RF architecture, and (b) proposed single-chip two-antenna phased array receiver with 4 simultaneous beams.

single element or four, eight, or 16 elements on a single chip in transmit or receive configurations [2]–[5]. A four-element transmit/receive chip with 5-bit amplitude and phase control was also recently demonstrated at 36–38 GHz [1]. This not only reduces the number of chips to be assembled in the phased array, but also simplifies the digital control-line distribution in large arrays. A natural progression of this work is the integration of multiple simultaneous beams on a single chip. This has been demonstrated using GaAs chip-sets [15], and recently using the LO phase-shifting approach, but with some limitations—the beams could not all operate at the same frequency and had limited instantaneous bandwidths [16]. A phased array receiver capable of two-simultaneous beams was demonstrated using an SiGe process [17]. The multibeam design presents special challenges since high isolation is required between the beams. The beams should also be able to operate at different frequencies, or at the same frequency, and with a wide instantaneous bandwidth.

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Fig. 2. Block and circuit diagrams of LNAB, 1:4 distribution network, and the 0=

0 10-dB VGA.

Fig. 3. Circuit diagram of active phase shifter and active combiner.

In this paper, a two-antenna input phased array receiver capable of generating four-simultaneous beams is demonstrated in a SiGe BiCMOS process using the all-RF phase-shifting architecture. The chip can also be connected to a single antenna with two different polarization ports, therefore allowing the formation of four simultaneous beams each of a different polarization. The application areas are in low-cost phased array for / -band mobile satellite [18] and radar systems. Fig. 1(a) presents a generic rendering of a phased array with simultaneous beam capabilities and the corresponding layout of the silicon chip with two-antenna inputs. The input signal from each antenna is divided into four different paths (or channels) each with its own phase and amplitude control. The corresponding signals from each path are then added to synthesize the multiple simultaneous output beams. This is typically done in a multilayer beam-forming network, which occupies a lot of space in a phased array system. The interaction between the different paths (channels) should be ideally zero, and the phase and

Fig. 4. (a) Metal-stack layers of the Jazz Semiconductor SBC18HX process. (b) Crossover structure after the active combiner.

amplitude setting in one beam cannot affect the performance of the other beams. The silicon design integrates all these functions into a single chip while still maintaining excellent isolation between the output beams.

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Fig. 5. NF case studies for the two-antenna and four-beam receiver.

Section II presents the details of the proposed phased array system, specific building block designs, implementation details, and noise figure (NF) investigation. Section III presents singlechannel results and their comparison with simulations, presents , third-order intervariable gain amplifier (VGA) control, cept point (IP3), and NF, and characterizes the beam to beam coupling at the -parameter level. II. SYSTEM LEVEL AND BUILDING BLOCK DESIGN The operation of the chip is as follows [see Fig. 1(b)]: the input signal from each antenna is first fed to a low-noise active balun (LNAB) for differential signal processing. The LNAB is composed of a two-stage single-ended to differential converter. The signal is then split into four different paths using a differential splitter, and each path contains amplitude and phase control circuitry. The phase control is realized using vector modulation, commonly referred to as a phase interpolation technique [2]. The amplitude control is achieved using a 1-bit gain control in the signal splitting network and 3-bit gain control in the vector modulator (i.e, phase shifter). The signals from antenna 1 are then added to the corresponding signals from antenna 2 using on-chip differential active power combiners. The final “beam” outputs are single ended and this is achieved by internally terminating one port of the differential power combiners with 50 . This incurs a 3-dB penalty in the gain and output power, but eliminates active or passive baluns at the output ports, and therefore, ensures high isolation between the different output beams. A. RF Building Blocks The circuit level implementation is shown in Figs. 2 and 3. The LNAB is a two-stage emitter coupled amplifier with an

inductive load and de- resistors for wideband operation. The first stage provides low-noise amplification, input matching, and single-to differential signal conversion. The emitter length is chosen as 20.3 m emitter width m to of minimize base resistance. The following stage results in additional common-mode rejection and low-noise amplification. The output differential emitter follower drives a passive 1:4 differential network with a differential impedance of 100 . This network is implemented using the top metal layers as a ground–signal–signal–ground (GSSG) topology and is simulated as a five-port network using full-wave techniques. There are four crossovers that are implemented using metal 5 and metal 6 (Fig. 2). The crossover area is 12 10 m with a 2- m oxide gap. This results in a crossover capacitance of 2.2 fF and isolation over 40 dB at 13–15 GHz, and does not affect the differential operation. nH is placed at the output of A shunt inductor LNAB to tune out the large parastic capacitance of the 1:4 distribution network and the input stage of the following amplifier. The simulated differential load impedance at the output of the LNAB is 140 at 14 GHz. The LNAB consumes 25 mA and results in a simulated gain and NF of 10.2 and 4.6 dB, respectively, at 13–15 GHz, when loaded with 140 (i.e, not including the 1:4 distribution network loss). When it is loaded with the 1:4 distribution followed by the input impedance of the next stage, the simulated gain is 14 dB due to the increase in the load is 10 dB from 12 to 19 GHz. impedance. The simulated The 1:4 distribution network is connected to differential cascode amplifiers to result in high isolation between the four channels. Gain control is achieved by steering the bias current of the and , common-base amplifier in the cascode stage using

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Fig. 6. Microphotographs of: (a) single-element (2.4 1.1 mm ) and (b) two-antenna four beam (2.4 differential-line crossover so as to emulate the two-antenna four-beam chip.

and ensures minimal phase variation versus gain setting. The cascode amplifiers also show a high internal isolation so that 10 dB without one can implement a 1-bit gain control of 0 affecting the input impedance (and thus, the 1:4 power division ratio). The cascode stage is followed by a differential emitter follower with 4.5 mA of bias current per path so as to drive the all-pass in-phase/quadrature (I/Q) netlow-impedance 23 work. The simulated voltage gain is 5 15 dB at 14–15 GHz with a bias current of 17.4 mA. The NF referenced to the input of the VGA stage is 16 dB at 15 GHz when this stage is loaded with the input impedance of the following phase shifter. There is an option to shut off the entire RF path by turning off all the current sources in this stage ( off). This is necessary in dual-polarized systems so as to be able to synthesize a vertically or horizontally polarized signal in a specific beam. The overall gain and NF for LNA, 1:4 distribution network, 10-dB VGA result in 9.1 8.8 dB, 6.4 6.3 dB, and the 0 respectively, at 14–15 GHz for channel 1 and 4. The gain is 1 dB higher for channels 2 and 3 due to the additional length in the 1:4 distribution network. The simulated input is 19 dBm for channels 1 and 4 and 18 dBm for channels 2 is limited by the low load impedance, and 3. The input which is the input impedance of the quadrature all-pass filter (QAF). The phase shifter is based on a 0.18- m CMOS vector modulator with 4-bit DAC control. NMOS transistors are chosen for better linearity. The impedance of the QAF is

2 4.3 mm ). The single element contains a microstrip to

with a resonance frequency at 15 GHz designed to be 23 pH fF . This results in 3 of I/Q phase error under 100 fF of loading capacitance, which corresponds to the gate–source capacitance of the vector modulator MOSFETs [2]. The size of these transisis optimized for NF and linearity. A tors 2.5 5 dB using current 3-bit amplitude control 1.25 steering is achieved using PMOS loads and NMOS transistors tranoperating in the linear region. The NMOS sistors serve as digital switches and the PMOS transistors are scaled 2 and 4 larger than the for the 3-bit operation. Again, inductive loads are used with deresistors for wideband operation. The simulated maximum gain and NF is 2.3–1.7 and 9.7–10 dB, respectively, at 14–15 GHz. The phase shifter consumes 12 mA with a simulated rms phase and gain error of 5 , and 0.8 dB at 15 GHz, respectively. The gain error results from the amplitude mismatch (1.8 dB) resulting from the all-pass QAF and the quantization error of the 4-bit DAC. The simulated input IP3 of the vector modulator is 12 dBm at 15 GHz. The vector modulator output is connected to a differential active combiner. The common source stage is again implemented using NMOS transistors for better linearity. As mentioned above, this combiner is designed to result in a single-ended output with a high isolation between the different combiners. 1 dB This stage consumes 24 mA with a simulated gain of (one RF input with the other input terminated by 50 ) and

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5 dB (two RF inputs) at 14–15 GHz. Notice that the (power) gain increases by 6 dB when two inputs are present since this is a current summer and is an active combiner. This is in contrast to a passive Wilkinson combiner with a power gain of 3 dB when two inputs are present. The simulated NF of the active with two inputs combiner is 11 dB. The simulated output is 1.6 dBm at 15 GHz. A 50- microstrip line connects the active combiner output to the edge of the silicon chip. As shown in Fig. 4, this topology results in several crossovers in the layout and it is imperative to minimize the coupling between the different RF paths. This is done by: 1) using a single-ended output over differential transmission lines and 2) using a localized M4 shield between the two sets of lines. The simulated isolation between the differand the 50- single-ended line is ential line 60 dB at 13–15 GHz. Referring to Fig. 1(b), in order to ensure symmetry in the difference paths, the output crossovers are implemented in all paths even if some paths do not intersect an output microstrip line. The overall system gain and NF is 9.7 9.2 dB and 8–9 dB, respectively, at 14–15 GHz for channels 1 and 4. The gain can be controlled by 18 dB using 4 bits 2.5 5 10 dB. with levels of 1.25 B. Overall Linearity The simulated linearity of a single channel is limited by the QAF due to its low input impedance. The simulated input is 20 dBm at 15 GHz. When RF signals are present at both antenna ports, the input is 20.2 dBm (for each port), of 6 dBm at each beam output. resulting in an output This indicates that the output active combiner does not enter into compression even with two input signals, and the linearity is still limited by the VGA/QAF stage. C. NF Investigation In order to characterize the NF of an RF channel in the fourbeam chip, an -parameterr based SPECTRE noise simulation is done for the cases shown in Fig. 5. The simulated NF at 15 GHz of case 1 (8.06 dB) is almost same as that of case 2 (8.03 dB) and case 3 (8.15 dB). The slight difference is due to different impedances seen by the LNA and the output combiner. 11 dB and is due On the other hand, the NF of case 4 is to the additional noise from the second antenna input, which is added at the combiner. Note that a hot/cold load is not presented at antenna port 2. This is an unrealistic NF and should not be used. Case 5 represents an actual phased array system where two RF inputs are used and are added coherently using the active combiner. In this case, the simulated NF is 7.77 dB at 15 GHz. This NF is 0.3 dB less than case 1 since the gain is higher by 3 dB (3-dB loss at the external power divider, 6-dB gain at the active combiner). Practical on-chip NF measurements can be done using case 1 (single element), case 3, and case 4, but it is seen that case 4 results in a nonaccurate characterization of the system NF. D. Digital Control The 4-bit phase and amplitude data for each path are loaded on the chip by an enabling clock signal and address decoders. The DAC and encoding logic are implemented using 0.35- m

Fig. 7. Measured S -parameters of the single-element phased array for 16 phase states.

CMOS transistors. The phase and gain are set independently using a 9-bit digital data input (4-bit phase data, 4-bit VGA data, and 1-bit ON–OFF) to a shift register memory. A 3-bit data address is also required for the 3-to-8 decoder, which allocates an address to each register. The data is loaded by an enabling clock signal. The digital interconnection lines are realized with Metal 2 or Metal 3 for signal routing, and shielded by Metal 1 and Metal 4 ground planes to isolate the digital switching noise from and the analog paths. Metal 1 is also used for the digital (Metal 5) by the Metal 4 it is separated from the analog ground.

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Fig. 9. Measured: (a) input P and (b) input IP3 of single channel at and IP3 are 0.5 dB better at 14 GHz. 15 GHz. The input P



Fig. 8. Measured: (a) NF, (b) rms phase and gain errors, and (c) VGA gain control and associated change in phase shift at 14 GHz.

E. Chip Layout The two-antenna four-beam phased array chip is implemented using the Jazz Semiconductor SBC18HX process with of six metal layers. This process has 0.2- m SiGe HBT ( 155 GHz) and 0.18- m CMOS transistors ( of 50–60 GHz). The RF channels are isolated from each other using a ground metal barrier, which is composed of a via stack from Metal is moved to Metal 6. For 5 to Metal 1. In this region, added isolation, a differential topology is used, the two antenna inputs are placed on the opposite sides of the chip, and the four single-ended 50- output lines are placed far away from each other. A ground metal barrier (Metal 6–Metal 4) is also used between the output microstrip lines of “beam 2” and “beam 4” in order to reduce the coupling [see Fig. 6(b)]. Jazz Semiconductor electrostatic discharge (ESD) protection diodes were placed at the RF input and output ports (1.6 kV, 1.1 A) and larger ESD diodes are placed on the digital control ports (3 kV, 2 A). Standard Jazz Semiconductor transistor cells and models are used, and full electromagnetic modeling is done on all the inductors and transmission-lines using Sonnet.1 Over 100 pF of distributed de-coupling metal–insulator–metal (MIM) 1Sonnet,

version 11.52, Sonnet Software Inc., Syracuse, NY, 1986–2007

capacitors are placed on-chip between the VDD (Metal 5) and ground (Metal 4) to enhance the isolation between the channels. The chip dimensions are 2.4 1.1 mm (single-channel prototype) and 2.4 4.3 mm (two-antenna four-beam chip). The single-ended prototype contains a two-channel combiner with channel 2 input terminated in 100- differential. The simulated power consumption is 276 mW and 1.8 W, respectively, from a 3.5-V supply voltage. All RF pads (two input and four output pads) are designed for 150- m pitch ground–signal–ground (GSG) probes. All simulations include the pad capacitance and ESD effects. III. MEASUREMENTS The phased array chips were measured on-chip after a standard probe-tip short-open-load-thru (SOLT) calibration. The control inputs are supply voltage, address bits (3 bits), data bits (9 bits), and enabling clock signal to load the data to the registers. All measurements include the GSG pad capacitance and ESD effects. A. Single-Channel Phased Array (Reference Design) Fig. 7 presents the measured -parameters of the single-beam and chip over the 16 different phase states. The measured are 12.5 dB at 13–15 GHz. The measured gain is 4–6 dB lower than simulations depending on the frequency. The is 50 dB. measured reverse isolation The measured NF is 10–11 dB at 13.75–15 GHz and is 2 dB higher than simulated due to the lower channel gain 12 up [see Fig. 8(a)]. The measured rms phase error is to 15 GHz showing 4-bit performance over an instantaneous bandwidth of 2 GHz, i.e., the phase error is less than half of the least significant bit [see Fig. 8(b)]. The measured VGA [see

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Fig. 10. Measured S -parameters of four-beam phased array for 16 phase states. (a) Gain. (b) S and S .

Fig. 8(c)] shows 17.6 dB of gain variation with 4-bit control, which is very close to simulations. The VGA insertion phase changes only by 5 with gain control. Hence, the VGA can not only be used for amplitude control (low sidelobe arrays), but also to compensate for the 1.5-dB rms gain variation in the phase shifter without changing the phase. The measured input and input IP3 are 13.3 and 6 dBm, respectively, at 15 GHz at the maximum gain setting (Fig. 9). These are 6 dB better than simulated due to the lower measured gain. The discrepancy in gain, rms values, and NF is due to unexpected coupling between the 0.65-nH differential load inductor 10-dB VGA and the QAF inpresent at the output of the 0 ductors. This coupling was not modeled, and in hindsight, it would have been better to either separate these inductors by an

Fig. 11. (a) Experimental setup for input RF signals at both antenna ports. (b) Measured gain. (c) Relative phase response. (d) RMS phase and gain errors.

additional 100 m or to use two symmetrical inductors for the 0.65 nH in place of a single differential inductor. B. Two-Antenna Four-Beam Phased Array Fig. 10 presents the measured gain response for channels 1–4 for an input at antenna port 1 and with a 50- load at port 2. In these measurements, a single GSG probe was used for the

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Fig. 12. Measured isolation for an input at antenna 1 and only channel 1 turned on.

Fig. 13. Coupling characterization between two adjacent channels.

output port, and therefore, the nonmeasured channels were left open circuited, which presents a worst case condition in terms of coupling. The measurements result in very similar response between all beams over all phase states. The gain difference 0.5 1 dB between channels 1 and 4 is due to the length difference in the 50- output microstrip lines and the unequal loading effect by the 1:4 distribution network. The measured rms phase and gain errors for all channels are very similar to the single channel response and are not shown (within 1 and is the same as the single channel, but 0.1 dB). The measured the output for B1–B4 are slightly different due to the length difference among the output lines [see Fig. 10(b)]. The meaand input IP3 for a single channel is 12.3 2 sured input and 5 2 dBm, respectively, at 15 GHz for different phase settings (worst case is input of 14.3 dBm and IP3 of 7 dBm). Virtually identical measurements were achieved for channels 1–4 for an input at antenna port 2 and with a 50- load at antenna port 1. These measurements are not shown for brevity. Fig. 11(a) shows the experiment setup to measure the -parameters for input RF signals at both antenna ports. The gain is measured by de-embedding the coupler and cable losses. It is

Fig. 14. (a) Coupling measurement setup with ant.1 input only. (b) Measured phase and gain errors versus 180 to 180 phase change in  ; ;  constant . (c) Measured and fitted phase and gain errors versus the phase change at 14 GHz (fitted coupling vector magnitude, B=A : ).

(

=

)

0

+

= 0 0092

important to equalize the phase and cable loss between path1 and path2, and two 3.5-mm adaptors are added to path1 so as to compensate the time-delay difference between the two paths 100 ps . The finer phase adjustment is then done on-chip using the vector modulators. The measured gain increased by 5 dB over a single channel. The 1-dB discrepancy (5 dB instead of 6 dB) is due to different phase settings in the single-antenna case and the two-antenna experiment, leading to a 1-dB drop in the channel gains. The measured rms phase and gain 12 and 1 dB, respectively, for the two-antenna errors are

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Accurate characterization of the coupling is also obtained by measuring channel 1 at a fixed phase setting and changing the phase in channel 2 from 0 to 337.5 , as shown in Fig. 13. Every channel from antenna input 1 (or antenna input 2) contains the same signal as the desired path due to the input signal divider, and any leakage from an adjacent channel to the desired channel can significantly affect the output amplitude and phase. As shown in the vector representation of Fig. 13, the output , where signal can be expressed as and are the desired gain and phase, and and are the coupled gain and phase from the unwanted path. The maximum gain and occurs when . error is can be deThe voltage coupling vector magnitude rived as

and

(1)

The coupling phase is the sum of a fixed phase offset and a phase shift of the phase shifter. Therefore, the measured gain and phase at the output can be fitted using

(2)

Fig. 15. (a) Coupling measurement setup with ant.1 and ant.2 inputs. (b) Measured phase and gain errors versus 180 to 180 phase change in   ;  ;  constant . (c) Measured and fitted phase and gain errors versus the phase change at 14 GHz (fitted coupling vector magnitude, B=A : ).

( = 0 008

=

)

0

+

experiment [see Fig. 11(d)]. The linearity also can be measured is 14.6 1 dBm at 15 GHz using this setup and the input (at each port) over all phase states. The measured output is 5 dBm. C. On-Chip Coupling Measurements Fig. 12 presents the measured for each channel for an antenna 1 input and the VGA in channel 1 turned on (all other VGAs are off). All other channels not connected to the measured port are left open circuited. The measured isolation is 35 dB at 13–15 GHz ( 40 dB at 14–15 GHz). The same experiment was done on antenna 2 with similar results (not shown for brevity).

Fig. 14(a) shows the coupling measurement for an input at antenna 1 and the VGAs in antenna 2 are all off. The output of B2 is loaded by 50 , while the outputs of the B3 and B4 are left open circuited (a ground–signal–ground–signal–ground (GSGSG) probe used). The measured gain and phase deviation 0.1 dB and 0.5 , respectively, at 13–15 GHz for a are change of 0 to 337.5 [see Fig. 14(b)]. Fig. 14(c) shows that the measured gain and phase errors as a function of a change at 14 GHz, and are fitted using (2). The coupling vector magni40.7 dB . Similar experiments done with tude is and channel result B1 output and varying channel in 40.7 dB and 50.7 dB , respectively. These results are not shown for brevity. The results show that the channel-to-channel coupling is compatible with the straightforward measurements of Fig. 12. Fig. 15(a) presents a similar experiment, but with two antenna inputs. The measured coupling factor for an output at in both antenna paths is 0.008 42 dB B1 and varying [see Fig. 15(c)]. The measured coupling factors for an output at B1 and varying and are 0.0046 46.7 dB and 0.004 46.9 dB , respectively. Again, the coupling is very low. IV. CONCLUSION A -band two-antenna phased array receiver chip capable of simultaneous four beams has been demonstrated in a 0.18- m SiGe BiCMOS technology and successfully tested on-chip. The chip can be easily extended to eight simultaneous beams with little change in design or overall layout. Excellent beam-to-beam isolation was demonstrated using -parameters and a system level test. The design can be scaled to -band (35 GHz) or -band (60 GHz) using a similar architecture for complex communication systems.

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ACKNOWLEDGMENT The authors thank Dr. D. Howard, Jazz Semiconductor, Newport Beach, CA, for his continuous support. REFERENCES [1] D.-W. Kang, J.-G. Kim, B.-W. Min, and G. M. Rebeiz, “Single and -band transmit/receive phased-array silicon RFICs with 4-element 5-bit amplitude and phase control,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 12, pp. 3534–3543, Dec. 2009. -band 8-element phased[2] K. Koh and G. M. Rebeiz, “An - and array receiver in 0.18 m SiGe BiCMOS technology,” IEEE J. SolidState Circuits, vol. 43, no. 6, pp. 1360–1371, Jun. 2008. [3] T. Yu and G. M. Rebeiz, “A 4-channel 24–27 GHz CMOS differential phased-array receiver,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2009, pp. 455–458. [4] B.-W. Min and G. M. Rebeiz, “Single-ended and differential -band BiCMOS phased array front ends,” IEEE J. Solid-State Circuits, vol. 43, no. 10, pp. 2239–2250, Oct. 2008. [5] K. Koh, J. W. May, and G. M. Rebeiz, “A millimeter-wave (40–45 GHz) SiGe BiCMOS 16-element phased-array transmitter,” IEEE J. Solid-State Circuits, vol. 44, no. 5, pp. 1498–1509, May 2009. [6] I. Sarkas, M. Khanpour, A. Tomkins, P. Chevalier, P. Garcia, and S. P. Voinigescu, “ -band 65-nm CMOS and SiGe BiCMOS transmitter and receiver with lumped I-Q phase shifters,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2009, pp. 441–444. [7] M.-D. Tsai and A. Natarajan, “60 GHz passive and active RF-path phase shifters in silicon,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2009, pp. 223–226. [8] E. Cohen, C. Jakobson, S. Ravid, and D. Ritter, “A bidirectional TX/RX four element phased-array at 60 GHz with RF-IF conversion block in 90 nm CMOS process,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2009, pp. 207–210. [9] Y. Yu, P. Baltus, A. van Roermund, A. de Graauw, and E. Van der Heijden, “A 60 GHz digitally controlled RF-beamforming,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2009, pp. 211–214. [10] J. P. Comeau, M. A. Morton, W. L. Kuo, T. Thrivikraman, J. M. Andrews, C. M. Grens, J. D. Cressler, J. Papolymerou, and M. Mitchell, “A silicon–germanium receiver for -band transmit/receive radar modules,” IEEE J. Solid-State Circuits, vol. 43, no. 9, pp. 1889–1896, Sep. 2008. [11] S. Kishimoto, N. Orihashi, Y. Hamada, M. Ito, and K. Maruhashi, “A 60-GHz band CMOS phased array transmitter utilizing compact baseband phase shifters,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2009, pp. 215–218. [12] S. Raman, N. S. Barker, and G. M. Rebeiz, “A -band dielectriclens based integrated monopulse radar receiver,” IEEE Trans. Microw. Theory Tech., vol. 46, no. 12, pp. 2308–2316, Dec. 1998. [13] H. Krishnaswamy and H. Hashemi, “A fully integrated 24 GHz 4-channel phased array transceiver in 0.13 m CMOS based on a variable-phase ring oscillator and PLL architecture,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2007, pp. 124–125. [14] K. Scheir, S. Bronckers, J. Borremans, P. Wambacq, and Y. Rolain, “A 52 GHz phased-array receiver front-end in 90 nm digital CMOS,” in IEEE Int. Solid-State Cicuits Conf. Tech. Dig., Feb. 2008, pp. 184–185. [15] M. Chen, D. E. Riemer, D. N. Rasmussen, J. E. Wallace, H. J. Redd, R. C. Ettorre, D. B. Peterson, R. N. Bostwick, and G. E. Miller, “A 20-GHz active receive phased array antenna for navy surface ship satellite communications applications,” in IEEE AP-S/URSI Int. Symp., Jul. 1999, vol. 4, pp. 2310–2313. [16] S. Jeon, Y.-J. Wang, H. Wang, F. Bohn, A. Natarajan, A. Babakhani, and A. Hajimiri, “A scalable 6-to-18 GHz concurrent dual-band quadbeam phased-array receiver in CMOS,” IEEE J. Solid-State Circuits, vol. 43, no. 12, pp. 2660–2673, Dec. 2008. [17] D.-W. Kang, K.-J. Koh, and G. M. Rebeiz, “ / -band SiGe BiCMOS phased array chips with simultaneous 2- and 4-beam capabilities,” in Compound Semicond. IC Symp., Oct. 2009, pp. 155–158. [18] E. Lasse and W. Richards, “Connexion by boeing a satellite solution for in-flight aircraft,” in 22nd Amer. Inst. Aeronaut. Astronaut. Int. Commun. Satellite Syst. Conf., May 2004, pp. 2004–3188.

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Dong-Woo Kang (A’07) received the B.S., M.S., and Ph.D. degrees in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2001, 2003, and 2007, respectively. He is currently a Postdoctoral Research Fellow with the Department of Electrical and Computer Engineering, University of California at San Diego (UCSD), La Jolla. His research interests include CMOS/SiGe integrated circuits (ICs) for microwave and millimeter-wave phased-array systems. Kwang-Jin Koh (M’09) received the B.S. degree in electronic engineering (with first-place honors) from Chung-Ang University, Seoul, Korea, in 1999, the M.S. degree in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2001, and the Ph.D. degree in electrical and computer engineering from the University of California at San Diego, La Jolla, in 2008. His doctoral study included analog, RF, and millimeter-wave integrated circuits in silicon technologies focused on on-chip CMOS/BiCMOS phased array receivers and transmitter designs at 6–50 GHz. In 2008, he joined the Intel Corporation, Hillsboro, OR, where he has been involved in the design of voltage-controlled oscillators (VCOs) and phase-locked loops (PLLs) for frequency synthesis and high-speed serial input/output interface applications. From 2001 to 2004, he was with the Electronics and Telecommunications Research Institute (ETRI), Daejeon, Korea, where he was engaged in the research and development of RF and analog CMOS integrated circuits for wireless communication systems such as wideband code division multiple access (WCDMA), code division multiple access (CDMA), and wideband local area network (WLAN) 802.11 a/b/g systems. Dr. Koh was the recipient of the 2002 Best Paper Award presented by the IEEE Solid-State Circuits Society and IEEE Electron Device Society, Seoul Chapter. Gabriel M. Rebeiz (F’97) received the Ph.D. degree from the California Institute of Technology, Pasadena. He is currently a Professor of electrical and computer engineering with the University of California at San Diego (UCSD), La Jolla. Prior to this, he was with The University of Michigan at Ann Arbor from 1988 to 2004. He has contributed to planar millimeter-wave and terahertz antennas and imaging arrays from 1988 to 1996, and his group has optimized the dielectric-lens antennas, which is the most widely used antenna at millimeter-wave and terahertz frequencies. His group recently developed 6–18- and 30–50-GHz eight- and 16-element phased arrays on a single chip, making them one of the most complex RFICs at this frequency range. As a consultant, he developed the 24-GHz single-chip radar with USM/ViaSat, -, -, and -band phased arrays for defense applications, the RFMD RF microelectromechanical systems (MEMS) switch and the Agilent RF MEMS switch. He leads a group of 21 Ph.D. students and three post-doctoral fellows in the area of millimeter-wave RFICs, microwaves circuits, RF MEMS, and planar millimeter-wave antennas and terahertz systems. He is the Director of the UCSD/Defense Advanced Research Projects Agency (DARPA) Center on RF MEMS Reliability and Design Fundamentals. He authored RF MEMS: Theory, Design and Technology (Wiley, 2003). Prof. Rebeiz is a National Science Foundation (NSF) Presidential Young Investigator. He has been an associate editor of the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, and a Distinguished Lecturer for the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) and the IEEE Antennas and Propagation Society (IEEE AP-S). He was the recipient of a URSI Koga Gold Medal Recipient, an IEEE MTT-S Distinguished Young Engineer (2003), and the IEEE MTT–S 2000 Microwave Prize. He was also the recipient of the 1998 Eta Kappa Nu Professor of the Year Award, the 1998 Amoco Teaching Award given to the best undergraduate teacher at The University of Michigan at Ann Arbor, and the 2008 Teacher of the Year Award of the Jacobs School of Engineering, UCSD.

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On the Recovery Time of Highly Robust Low-Noise Amplifiers Armin Liero, Mike Dewitz, Silvio Kühn, Nidhi Chaturvedi, Jijun Xu, and Matthias Rudolph, Senior Member, IEEE

Abstract—Recently, GaN-based low-noise amplifiers (LNAs) were shown to provide high ruggedness together with low noise figure. Since no limiter is required to protect the input, these LNAs allow for simplified receiver architectures. This paper presents an in-depth analysis of the recovery time of a highly rugged LNA. Recovery time is measured in the time domain, and an analytical approximation is developed that allows to estimate and optimize recovery. A new measurement setup is established in order to determine the impact of the overdrive pulse on LNA gain. An -band LNA is shown as an example. It survives input overdrive powers of up to 46 dBm under pulsed and 40 dBm under continuous wave conditions, with a noise figure of 2.8 dB. Extremely short recovery times below were simulated and measured. Index Terms—Amplifier noise, integrated circuit noise, microwave field-effect transistor (FET) amplifiers, monolithic microwave integrated circuit (MMIC) amplifiers, noise, semiconductor device noise.

I. INTRODUCTION

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ITH regard to low-noise application, GaN technology is gaining increasing attention. The potential of GaN HEMTs to sustain high powers, and even to operate at high power levels while simultaneously providing low noise figures, can be exploited for receivers with improved performance and simplified architectures. Just to give two examples, highly rugged low-noise amplifiers (LNAs) can operate without an input protection circuit that always attenuates the signal and adds noise. Having a highly linear LNA reduces the requirements for the band-select filter, and thereby also enables reconfigurable receiver designs. The published monolithic GaN LNAs already show quite impressive performance. For example, at -band, noise figures as

Manuscript received May 11, 2009; revised November 23, 2009. First published March 08, 2010; current version published April 14, 2010. This work was supported by Nanowave Technologies Inc. A. Liero, S. Kühn, and N. Chaturvedi, are with the Ferdinand-Braun-Institut, Leibniz Insitut für Höchstfrequenztechnik (FBH), D-12489 Berlin, Germany (e-mail: [email protected]; [email protected]; [email protected]). M. Dewitz was with the Ferdinand-Braun-Institut, Leibniz Insitut für Höchstfrequenztechnik (FBH), D-12489 Berlin, Germany and also with HTW Hochschule für Technik und Wirtschaft Berlin, D-10315 Berlin, Germany. J. Xu is with Nanowave Technologies Inc., Etobicoke, ON, Canada M8W 4W3 (e-mail: [email protected]). M. Rudolph was with the Ferdinand-Braun-Institut, Leibniz Insitut für Höchstfrequenztechnik (FBH), D-12489 Berlin, Germany. He is now with the Ulrich-L.-Rohde Chair for RF and Microwave Techniques, Brandenburg University of Technology, D-03046 Cottbus, Germany (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2041519

low as 1.4–1.8 dB were presented [1], [2]. Published destruction powers of up to 46 dBm under pulsed conditions [3], and 38 dBm [4] under continuous wave (CW) exceed the values of GaAs-based LNAs significantly, which are typically around 20 dBm. Third-order intercept points as high as 38 dBm are also reported [5], which can even be increased to 43 dBm if larger transistors at lower frequency are used [6]. Especially for pulse-RADAR applications, it is required that the LNA provides a low noise figure and high ruggedness. The main cause of input overdrive in such a system is the coupling of the transmit signal to the receiver. Therefore, the LNA also needs to have a short recovery time, which means that the LNA is operable again immediately after the transmit pulse ended. In the targeted pulse RADAR system, the recovery is required to be faster than 1.5 s. In a traditional design, the LNA input would be protected through a fast switch. However, the switch needs to provide an insertion loss below 1 dB in order not to degrade the system performance. Omitting the switch, therefore, simplifies and potentially improves the RADAR system. However, recovery times of rugged GaN LNAs have been addressed in the literature thus far only in our previous paper [7]. This paper introduced a highly rugged and linear -band LNA that will also be used as an example in this paper. Recovery time was addressed regarding nonlinear simulation and measurement. In measurement, however, recovery time was estimated from the envelope signal, whereby most of the information contained in the RF signal was lost. In this paper, recovery time is investigated in more detail. Firstly, it is highlighted that the time required to decharge the input capacitances after overdrive mainly determines recovery time. An analytic approximation is derived that allows for estimating and optimizing recovery time. A new measurement system is also introduced that enables measurement of the time at a given frequency. Overdrive pulse and dependence of measurement signal are separated by filtering, and making use of the pulse-mode option of a Rohde & Schwarz ZVA8 network analyzer provides the true 8-GHz small-signal gain of the LNA as a function of time. An -band LNA monolithic microwave integrated circuit (MMIC) is taken as an example in this investigation [7]. Despite the fact that this LNA is designed using large devices and with the primary goal of achieving highest ruggedness, it shows very short recovery times. The MMICs were fabricated using the GaN process line of the Ferdinand-Braun-Institut, Berlin, Germany. Since the transistors were not optimized for optimum low-noise operation, the noise figure is around 2.8 dB over the 8–10-GHz band, at the upper edge of the average published noise figures [3], [5], [8], [9]. However, the LNA provides

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Fig. 1. Photograph of the robust

X -band LNA chip (from [7]). Fig. 2. Circuit schematic of the robust LNA (from [7]).

both highest linearity with an output third-order intercept point (OIP3) in the range of 38–40 dBm, and high ruggedness. The device withstood powers of 46 dBm in pulsed operation and 40 dBm in CW [7]. Recovery times were simulated, analytically estimated, and measured for the device and proved to be significantly shorter than the 200–300 ns typically required for pulsed-RADAR applications. These results prove that a high ruggedness design does not require a compromise regarding recovery time. II. GaN MMIC TECHNOLOGY The AlGaN/GaN HEMT epitaxial structure used for LNA fabrication was grown by MOCVD on 3-in semi-insulating SiC wafers. The MMICs fabrication is accomplished using an i-line stepper, except for the 250-nm T gates that are defined through e-beam lithography. Ohmic contacts are realized using Ti/Al/Mo/Au, a metallization scheme providing a contact resismm and a sheet resistance of 360 . Devices tance of 0.7 are isolated using an ion implantation process that yields high . HEMT unit cells typically provide resistances of 10 output powers of 5.8 W/mm, and 22 dB of linear gain at 2 GHz. Low gate leakage currents of 0.1 mA/mm were measured. These properties, together with high intrinsic transconductance and values of 330 mS/mm and cutoff frequencies around 50 and 100 GHz, respectively, make these devices good candidates for -band low-noise applications. The coplanar MMIC process provides all required passive elements such as spiral inductors, metal–insulator–metal (MIM) capacitors, and NiCr resistors. III. LNA DESIGN AND PERFORMANCE The LNA is designed as a two-stage amplifier in CPW technology [7]. A chip photograph is shown in Fig. 1. Fig. 2 presents the circuit schematic. -band power transistors with 12 125 m gatewidth are used for both stages. Short stub lines at the source of the first LNA stage improve noise and power matching. The gate bias is fed through a resistor, which ensures high robustness of the LNA [10]. The transistor models used in circuit design were extracted from measurement while models for the discontinuities of the passive structures are based on 3-D electromagnetic simulation. Measurements of -parameters and noise figure are shown in Figs. 3 and 4, respectively. Both stages of the LNA were V and a total drain current biased identically with of 300 mA. The LNA provides high and very flat gain around 18 dB over the whole band of 8–10 GHz. The noise figure is at

Fig. 3. S -parameters of the robust LNA, measured at V = 15 V, I = 300 mA. (): S measured pre-stress, ( ): S measured pre-stress, ( ): S measured pre-stress, (—): post-stress measurement (from [7]).

Fig. 4. 50- noise figure and NF of the robust LNA measured at V = 15 V and I = 300 mA. (00): NF measured pre-stress, (—): NF measured (from [7]). post-stress, (1 1 1) pre-stress NF

2.8 dB in the whole band. Fig. 4 also shows the minimum noise figure that is not much lower than the 50- noise figure of the LNA. This proves the effective noise matching. Although the noise figure is compromised by the choice of a power transistor operating in a bias point better suited for power applications, the measured noise figures compare well to the values given in the literature for highly rugged [3] or highly linear [5] LNAs. Intermodulation measurements at 8 GHz with the LNA biased at the same voltage and current as in the noise measurement have been carried out. Very high third-order intercept values of 37–40 dBm were found [7]. In order to assess the ruggedness of the LNAs, first destructive tests were carried out in order to determine the maximum input power ratings. The input power at 2 GHz was increased stepwise and switched off after each step in order to check if the LNA returns to its original bias point, and especially, whether the gate current has remained stable. A significant increase in

LIERO et al.: ON THE RECOVERY TIME OF HIGHLY ROBUST LNAs

gate current, even if the device is not fully destroyed, is considered to be destructive. In pulsed conditions, with a pulsewidth of 1 s and a repetition rate of 1 kHz, the LNA survived up to 46 dBm without visible damage. Under CW stress, the LNA survived up to 40 dBm before it was destroyed. To the best of the authors’ knowledge, these destruction powers were the highest reported in the literature thus far. Another sample of the LNA was then stressed with a pulsed input power of 40 dBm for several minutes. The device showed to be unaffected from the overdrive, which is proven by the post-stress -parameter and noise figure measurements shown in Figs. 3 and 4. IV. ESTIMATING THE RECOVERY TIME It has been shown that this type of rugged LNA takes advantage of the high gate breakdown voltages of GaN that reaches values of about 80 V [10]. Under input overdrive, high voltage peaks will reach the gate and eventually bias it periodically in the forward direction. As a consequence, a dc gate current shown in flows that yields a voltage drop over the resistor the circuit schematic of Fig. 2. This voltage lowers the internal with respect to the externally applied constant gate voltage voltage . Due to this feedback effect, the HEMT is pinched off under input overdrive. As has been shown in [10], the main reason for degradation is dc gate current. The total power dissipation in the device, on the other hand, is rather low since most of the incident power is reflected when the HEMT is pinched thus translates directly into higher robustoff. Increasing ness since GaN HEMTs can withstand the extremely high negative gate voltage swings that are inevitable to this approach. But what determines recovery time after the overdrive signal disappeared? The switching time of HEMT switches can be time constant given by the on-reapproximated by the sistance and off-capacitance [11]. Switching times as short as 3 ns are available, e.g., for the HMC232LP4 by Hittite, Chelmsford, MA. In case of GaN LNAs, the first assumption to be made is that small-signal and noise properties are back to normal instantaneously after the circuit reached its initial bias conditions. This is commonly assumed [12], [13] and also reasonable since in the absence of dispersion or memory effects, this is the basic common assumption in large-signal circuit simulation and analysis. It is, however, worthwhile to notice that also thermal time constants can play a role. In our analytical treatment, self-heating of the LNA will not be considered. It is assumed that these are properties of the LNA in general and not specifically linked to overdrive condition. However, the measurement performed later will reveal how thermal and electrical relaxation superimpose. Fig. 5 shows a transient simulation of an HEMT in a similar environment as in the LNA. The internal gate voltage is calculated while a 5-ns pulse at 6 GHz is applied to the input of the transistor. The gate voltage is considered to be the indicator for estimating recovery time. In the simulation, the gate dc feed resistance was varied from 1 to 8 k . It is clearly visible that higher resistances cause longer recovery times. In this respect, a tradeoff exists between the highest ruggedness that requires high resistance values and fast recovery. Therefore, in the present design, the resistance was reduced to 500 , which

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Fig. 5. Simulated voltage V at the gate of the first stage, applying a 5-ns pulse of 43.5 dBm at 6 GHz to the LNA. Parameter is the gate dc feed resistor R k , k , k , k (cf. Fig. 2) (from [7]).

1 2 4 8

=

is the minimum value that is possible without compromising noise figure or small-signal parameters. From the simulation, a recovery time below 10 ns is expected. It is, therefore, assumed that the bias conditions, namely, the and , determine whether the LNA is difference between in normal operation or not. This simplifies the analysis of recovery time a lot. It is only required to determine a rather slow transient on the bias lines. In principle, the microwave signals do not even need to be considered at all, which enables to analytically estimate the electrical recovery time. Under overdrive, the dc gate current shifts the internal gate and charges accumulate within the respective cavoltage pacitances. The time constant associated with the discharging of the capacitances determines the recovery time. The capacitances in question are the input capacitance of the field-effect transistor (FET) and the serial and parallel capacitances along the input signal line. The very large dc blocking capacitance beis fortunately not affected since it stays at all the hind time. Therefore, only the smaller capacitances along the input line and the FET input must discharge through the respective reand the source sistances. These resistances are, in our case, resistance that is assumed, in our case, to be 50 . Recovery time can, therefore, be determined in the following ways. • Apply a microwave overdrive signal to the LNA input in as the signal is switched transient simulation. Monitor off (see Fig. 5). • Mimic the feedback effect by forcing the flow of current using a current source in parallel to the FET through relaxes to input. Simulate in the time domain how after the current source is switched off. • Analytically calculate how responds to a step in relying on a simplified equivalent circuit, as shown in Fig. 6. The second and third options investigate the circuit performance without even applying an RF signal at all. Only the envelope signal is regarded. This simplification is justified for the linear part of the circuit, but not necessarily for the FET. Since the FET nonlinear input capacitance plays an important role, it must be checked what its effective value under realistic conditions is. This effective input capacitance can significantly deviate from the static value. The third analytical approximation finally requires simplification of the circuit in order to obtain a clear result. It might

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Fig. 6. Equivalent circuit to estimate the recovery time, valid at the envelope frequency.

be safe in most cases to neglect the matching inductances since their values are low enough to be of almost no influence at the to be deterenvelope frequencies. The transfer function , i.e., the dominant time mined is given by constants of the impedance are to be found. It is determined at the port of the current source in Fig. 6, which means that it is the parallel connection of the FET input impedance and source and matching network. for the simplified input network can be given to be (1) (2) with the further approximation that gate bias voltage during recovery therefore reads

. The

(3) where represents the recovery time is the externally applied gate bias voltage, and constant, is the dc gate current that was flowing under overdrive condition. It can therefore be concluded that, in order to reduce recovery time, smaller transistors providing lower input capacitances should be favored. Blocking and matching capacitances also should be reduced as far as should be as low as possible. possible. This requires to find a compromise since high values are imperative for high ruggedness. of The three approaches to determine recovery time are compared in Fig. 7. It shows the transient of the gate voltage returning from the high negative value during overdrive to the quiescent bias after the overdrive signal was switched off. The values are the voltage offset to the quiescent value being normalized to 1 in case of overdrive and 0 once the quiescent bias is reached. The results were also normalized to account for the fact that only the full transient simulation allows to deterunder overdrive. The other two mine the absolute value of methods are only applicable to approximate the transit time. The circuit under investigation is very close to the LNA pF, and a 12 125 m shown in Fig. 1 with k . HEMT. The parameter is the value of For the analytical estimation, the effective input capacitance of the HEMT was determined through a nonlinear simulafF was obtained tion under overdrive condition. k , dBm. The value reduces to for fF for k and dBm. The curves

Fig. 7. Recovery of the internal gate voltage V of an LNA after overdrive ; ; ; k . This figure shows signal was switched off. Parameter is R the voltage offset caused by the overdrive, it is normalized between 1 (overdrive condition) and 0 (normal bias). Transient simulation applying an overdrive , transient simulation of envelope only by forcing an equivalent RF signal , and analytical approximation through (3) (—). gate current

=1 2 4 8

0

( ) ( )

shown in Fig. 7 show no significant differences. This provides evidence that the approximations are valid, and especially, that the overall recovery time is easily estimated through the input time constant. network’s Furthermore, it can be shown that it is feasible to obtain very short recovery times given the circuit topology proposed in [10] for high ruggedness. In case of the LNA under investigation with an of 500 , recovery times clearly below 10 ns are expected, but even given the large size of the HEMT, a multiple value would still yield recovery times below 50 ns. of the V. MEASURING THE RECOVERY TIME While simulation of the recovery time is quite straightforward, measurement is more involved. Since the intrinsic gate voltage is not available for time-domain measurement, one needs to rely on measurements of the LNA output power. A common way to characterize the recovery properties of LNAs is to inject a two-tone signal. One represents the small signal to be detected, while high-power pulses of the blocking signal are superimposed at the other frequency. These two signals are added through a directional coupler and fed to the LNA input. At the output of the LNA, the blocking signal is filtered out while the small-signal power is detected, and measured in the time domain using an oscilloscope. This setup was employed in [12] and [13]. In our previous study [7], both signals were detected and measured through an oscilloscope. Therefore, also the output power due to the blocking signal was visible. These systems basically measure the output power of the device as a function of time. The underlying assumption is that if the LNA is in a certain small-signal condition, it will show its typical noise performance for that bias point. The effects causing noise performance degradation, like a shift in bias point or increased channel temperature, will always impact noise and small-signal properties. This has also been tested in [12] by comparing measurement of noise and small-signal power. The measurement setup employed in this study is shown in Fig. 8. It is based on a Rohde & Schwarz network analyzer ZVA8 that allows for measurement of -parameters as a function of time. This allows to determine the impact of an over. The small-signal measurement frequency is drive pulse on set to 8 GHz. The overdrive pulses at 2 GHz are generated by a Rohde & Schwarz SMIQ vector signal generator and subsequently amplified to a power level of 39 dBm. These pulses are

LIERO et al.: ON THE RECOVERY TIME OF HIGHLY ROBUST LNAs

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Fig. 8. Measurement setup.

fed to the LNA input with a 1-Hz repetition rate through a directional coupler. At the output of the LNA, the signal is attenuated and a YIG filter prevents the overdrive pulses from reaching the ZVA8. Overdrive and measurement frequency are separated in order to allow for simple protection of the measurement equipment. In RADAR applications, the signals would be at the same frequency. However, as discussed in [10], the first stage of the LNA is pinched off under overdrive,. It thereby provides high mismatch at both frequencies. Therefore, the 2-GHz pulses provide a good approximation of the 8-GHz case. The time-depenmeasurement is synchronized with the overload pulses, dent and the result is averaged over 25 events. However, the measurement bandwidth is limited to 30 MHz by the ZVA8, which sets an upper limit to the time resolution. For comparison, the overload pulses delivered to the LNA were measured directly using a detector and an oscilloscope. These latter measurements are not calibrated in magnitude. measured by the ZVA8, the values are When plotted with scaled accordingly as a visual guide. The black lines in Fig. 9 show the measured response of on a 250-ns RF pulse. For comparison, the dashed curve in Fig. 9(a) shows the envelope signal of the overdrive pulse applied to the input of the LNA. This curve has been scaled and is therefore given in arbitrary units. However, it provides information on the rise and fall times of the overdrive pulse . In Fig. 9(b), a in comparison to the time dependence of dashed curve is inserted that provides the impulse response of an ideal single-pole 30-MHz low-pass system in order to highlight the limitation in resolution due to the measurement system bandwidth. It is clearly visible that rise and fall times of the LNA are shadowed by the response times of the measurement system. LNA recovery can therefore be assumed to be significantly shorter than the 30-ns measurement resolution. In fact, from the analytical estimation, one would expect a recovery time of around 10 ns. Furthermore, it can be observed that the LNA gain is degraded during overdrive to a certain extent, but the LNA is still operational. Therefore, even with an input power of 39 dBm, the first stage of the LNA is not fully pinched off. The impact of overdrive pulse length on recovery time is is given as black shown in Fig. 10. Again, the response of curves. The dashed curve in Fig. 10(a) represents the shape of the overload pulse envelope appropriately scaled and given in against time for arbitrary units together with the measured continuously degrades over a 3- s pulse. It is observed that the time the overdrive is applied and does not immediately recover, as in case of the 250-ns pulse. Instead, two time constants

Fig. 9. Measured response of LNA S on 250-ns overdrive pulse (solid lines). Also shown (dashed curves) are: (a) scaled envelope of the overdrive pulse in arbitrary units and (b) ideal response of a 30-MHz low-pass system.

seem to be present: the short one and a much longer one. It is reasonable to assume that LNA self-heating during overload is the reason for the longer time constant. Self-heating and thermal relaxation is assumed to occur according to an exponential law. Fig. 10(b) provides further evidence that LNA self-heating is measurethe reason for the longer recovery time. It shows ments performed with different overdrive pulse lengths (broken lines). The solid lines in the figure show the fitting of the re. In all cases, spective ideal exponential law to the measured a time constant of 2.7 s is applied. Independent of the pulse degrades according to the same exponential law duration, until the pulse ends. Afterwards, slow relaxation governed by the 2.7- s time constant is observed. Therefore, we conclude that the measured LNA, as expected from analysis, shows a recovery time constant that is significantly below the margin of 200–300 ns that is typically required for RADAR applications. On the other hand, self-heating during overdrive shows to have a significant impact on LNA performance. In our case, a thermal time constant of 2.7 s is found. This means that thermal issues can only be neglected as long as the overdrive pulse is significantly shorter or the overdrive power is lower. However, it must be pointed out that the LNA was measured on-wafer, i.e., by no means in a thermally optimized setup. Good thermal management lowering the thermal resistance of the device will reduce the impact of dissipated power on the LNA’s internal temperature. Finally, it should be easily possible to improve the situation by increasing the value . With higher feedback resistance, the HEMT of the first of stage will be operated at higher negative bias voltages during overdrive. This results in more overdrive power being reflected at the input thereby reducing the power handled in the device.

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A highly robust and highly linear monolithic integrated -band GaN low-noise MMIC amplifier is used as an example in this study. It has shown to survive extremely high input powers of up to 46 dBm in pulsed and 40 dBm in CW mode, and to provide an OIP3 above 38 dBm. The noise figure over the 8–10-GHz band is around 2.8 dB with a gain of about 18 dB. Our measurement verifies that the recovery time of the LNA is below 30 ns, which is the resolution of the measurement system. It is thereby significantly shorter than the 200–300 ns usually required for pulsed RADAR applications. ACKNOWLEDGMENT The authors would like to thank IHP Innovations for High Performance Microelectronics, Frankfurt (Oder), Germany, especially Falk Korndörfer and Christian Wipf, for noise measurements. REFERENCES Fig. 10. Measured response of LNA S on 250-ns–3-s overdrive pulses. (a) Solid line: LNA response to 3-s overdrive pulse. Dashed line: scaled envelope of the overdrive pulse in arbitrary units. (b) Dashed curves: measured response of LNA S on pulses of different duration. Solid curves: ideal thermal relaxation with a time constant of 2.7-s time constant for the different pulse lengths.

As the analysis of the electrical recovery suggests, there is still enough headroom for higher resistance values without ruining the recovery properties of the LNA.

VI. CONCLUSIONS This paper presents a detailed investigation of the factors determining recovery time of highly robust LNAs. Recovery time is analytically investigated. It is shown to be determined by time constant given by the capacitances of the input the matching network in parallel with the HEMT input capacitance and by the gate dc feed resistance. The investigation thereby enables easy estimation and optimization of LNA recovery time. The analysis is carried out comprehensively backing up the analytical approximation with different nonlinear transient circuit simulations. Recovery time is also investigated experimentally. A new dedicated measurement system is set up that is capable of meaas a function of time with a bandwidth of suring the LNA 30 MHz. Overdrive pulses of different duration are applied to the LNA input at 2 GHz and 39 dBm. The small-signal measurement frequency, on the other hand, is set to 8 GHz. The measurements provide evidence that the estimated and simulated recovery times are realistic. Furthermore, the measurements reveal the impact of LNA self-heating during overload pulses. This needs to be accounted for by properly specifying maximum pulse length, thermal management, or LNA design.

[1] D. Krausse, R. Quay, R. Kiefer, A. Tessmann, H. Massler, A. Leuther, T. Merkle, S. Müller, C. Schwörer, M. Mikulla, M. Schlechtweg, and G. Weimann, “Robust GaN HEMT low-noise amplifier MMICs for X -band applications,” in Eur. Gallium Arsenide and Other Semicond. Appl. Symp., 2004, pp. 71–74. [2] P. Schuh, H. Sledzik, R. Reber, A. Fleckenstein, R. Leberer, M. Oppermann, R. Quay, F. van Raay, M. Seelmann-Eggebert, R. Kiefer, and M. Mikulla, “GaN MMIC based T/R-module front-end for X -band applications,” in Proc. Eur. Microw. Integr. Circ. Conf., 2008, pp. 274–277. [3] M. Micovic, A. Kurdoghlian, H. P. Moyer, P. Hashimoto, A. Schmitz, I. Milosavljevic, P. J. Willadsen, W.-S. Wong, J. Duvall, M. Hu, M. Wetzel, and D. H. Chow, “GaN MMIC technology for microwave and millimeter-wave applications,” in IEEE Compound Semicond. Integr. Circuit Symp., 2005, pp. 173–176. [4] M. V. Aust, A. K. Sharma, C. Y.-C., and M. Wojtowicz, “Wideband dual-gate GaN HEMT low noise amplifier for front-end receiver electronics,” in IEEE Compound Semicond. Integr. Circuit Symp., 2006, pp. 89–92. [5] G. A. Ellis, J.-S. Moon, D. Wong, M. Micovic, A. Kurdoghlian, P. Hashimoto, and M. Hu, “Wideband ALGaN/GaN HEMT MMIC low noise amplifier,” in IEEE MTT-S Int. Microw. Symp. Dig., 2004, pp. 153–156. [6] S. Cha, Y. H. Chung, M. Wojtowicz, I. Smorchkova, B. R. Allen, J. M. Yang, and R. Kagiwada, “Wideband ALGaN/GAN HEMT low noise amplifier for highly survivable receiver electronics,” in IEEE MTT-S Int. Microw. Symp. Dig., 2004, pp. 829–832. [7] M. Rudolph, M. Dewitz, A. Liero, I. Khalil, N. Chaturvedi, Ch. Wipf, R. M. Bertenburg, J. Miller, J. Würfl, W. Heinrich, and G. Tränkle, “Highly robust X -band LNA with extremely short recovery time,” in IEEE MTT-S Int. Microw. Symp. Dig., 2009, pp. 781–784. [8] R. S. Schwindt, V. Kumar, O. Aktas, J.-W. Lee, and I. Adesida, “Temperature-dependence of a GaN-based HEMT monolithic X -band low noise amplifier,” in IEEE Compound Semicond. Integr. Circuit Symp., 2004, pp. 201–204. [9] J. P. B. Janssen, M. van Heijningen, G. Provenzano, G. C. Visser, E. Morvan, and F. E. van Vliet, “X -band robust ALGaN/GaN receiver MMICs with over 41 dBm power handling,” in IEEE Compound Semicond. Integr. Circuit Symp., 2008, pp. 1–4. [10] M. Rudolph, R. Behtash, R. Doerner, K. Hirche, J. Würfl, W. Heinrich, and G. Tränkle, “Analysis of the survivability of GaN low-noise amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 1, pp. 37–43, Jan. 2007. [11] M. Kameche and N. V. Drozdovski, “GaAs-, InP- and GaN HEMTbased microwave control devices: What is best and why?,” Microw. J., pp. 164–178, May 2005. [12] J. Gallimore, “Noise figure recovery measurement,” IEE Microw. Develop., Fundamen. Appl. Colloq., pp. 8/1–8/4, Mar. 1988. [13] J. Looney, D. Conway, and I. Bahl, “An examination of recovery time of an integrated limiter/LNA,” IEEE Microw. Mag., vol. 5, no. 1, pp. 83–86, Mar. 2004.

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Armin Liero received the Dipl.-Ing. degree in communication engineering from the Technische Universität Ilmenau, Ilmenau, Germany, in 1979. From 1979 to 1989, he was responsible for design and development of the microwave area of Electron Paramagnetic Resonance Spectrometers. Since 1989, he has collaborated on the development of a high-speed digital oscilloscope. In 1995, he joined the Max-Born-Institut, Berlin, Germany, and was responsible for the RF portioin of synchronization of LASERS (MBI) and linear accelerators (DESY Hamburg). In 2002, he joined the Ferdinand-Braun-Institut, Leibniz Insitut für Höchstfrequenztechnik (FBH), Berlin, Germany. His current research is focused on microwave design techniques, packaging, and measurements of high-power transistors.

Mike Dewitz, photograph and biography not available at time of publication.

Silvio Kühn received the Dipl.-Ing. degree in computer engineering from the Berlin Institute of Technology, Berlin, Germany, in 2006, and is currently working toward the Ph.D. degree at the Ferdinand-Braun-Institut, Leibniz Insitut für Höchstfrequenztechnik (FBH), Berlin, Germany. In 2006, he joined the Ferdinand-Braun-Institut, Leibniz Insitut FBH, as a Scientist, where he is currently involved in the investigation of microwave excited microplasmas for low-pressure and atmospheric pressure application. His focus is on the description of electrical properties of plasmas and the design of high-efficiency oscillators for excitation purposes.

Nidhi Chaturvedi received the Master degree in electronics from Banasthali University, Banasthali Vidyapith, India, in 1998, and the Dr.-Ing. degree from the Berlin Institute of Technology, Berlin, Germany, in 2007. From 1999 to 2001, she was with the Council of Scientific and Industrial Research (CSIR), Pilani, India, where she was involved with the n design and development of GaAs MESFET and WDM devices based upon silica on silicon technology. Since 2001, she has been with the Ferdinand-Braun-Institut,

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Leibniz Insitut für Höchstfrequenztechnik (FBH), Berlin, Germany. Her research activities involve fabrication and characterization of AlGaN/GaN HEMTs and MMICs.

Jijun Xu was born in Nanjing, China, in 1971. She received the B.Sc. degree in electrical engineering from the Huazhong University of Science and Technology, Wuhan, China, in 1994, and the M.Sc. degree in electrical engineering from the École Polytechnique de Montreal, Montreal, QC, Canada. From 1994 to 1998, she was with the Nanjing Electrical Technology Research Institute, Nanjing, China. She is currently an RF Design Engineer with Nanowave Technologies Inc., Toronto, ON, Canada.

Matthias Rudolph (M’99–SM’05) received the Dipl.-Ing. degree in electrical engineering from the Berlin Institute of Technology, Berlin, Germany, in 1996, and the Dr.-Ing. degree from the Darmstadt University of Technology, Darmstadt, Germany, in 2001. In 1996, he joined the Ferdinand-Braun-Institut, Leibniz Insitut für Höchstfrequenztechnik (FBH), Berlin, Germany. In October 2009, he became the Ulrich-L.-Rohde Professor for RF and Microwave Techniques with the Brandenburg University of Technology, Cottbus, Germany. He has authored or coauthored over 50 publications in refereed journals and conferences. He authored Introduction to Modeling HBTs (Artech House, 2006). His research focuses on modeling of FETs and HBTs and on the design of power amplifiers, broadband amplifiers, and LNAs. Dr. Rudolph was the program chair of European Microwave Week 2007, chair of the German Microwave Conference 2010, and electronic submissions chair of European Microwave Week 2010.

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Efficiency Enhancement of Class-E Power Amplifiers at Low Drain Voltage Fei You, Member, IEEE, Songbai He, Member, IEEE, and Xiaohong Tang, Member, IEEE

Abstract—In this paper, the output power, phase response, and drain efficiency of a class-E power amplifier with shunt capacitance, composed of nonlinear and linear capacitance, is analyzed to manifest the cause of efficiency degradation at low drain dc supply voltage ( dc ). Analysis also shows that the drain efficiency at low dc can be improved by reducing the on-duty ratio; a simple efficiency enhancement method with gate dc bias voltage adjustment is proposed. Numerical and simulated results are given in comparison to show the validity of the theoretical analysis and the proposed method. An experimental class-E amplifier, designed at 100 MHz, is measured; the drain efficiency declines by 14% at 0.8 V dc compared to the highest efficiency. With the optimized gate dc bias voltage, the 7.5% drain efficiency improvements and 9.26-dB dynamic range extension are measured at low dc in the experiment. Index Terms—Class-E power amplifier, efficiency enhancement, MOSFET, nonlinear output capacitance, polar transmitter.

I. INTRODUCTION

T

HE POLAR transmitter is an architecture that can simultaneously offer both high efficiency and high linearity. This transmitter recombines the separated amplitude and phase signals to form complex signals. Switch-mode amplifiers with supply modulation can be used to improve the efficiency of this transmitter [1], [2]. The class-E amplifier is a switch-mode amplifier, which can offer 100% drain efficiency in theory [3], [4]. In the polar transmitter, a class-E amplifier is used to amplify the constant-envelope phase modulated signal. The amplitude information is recovered through drain supply modulation circuits, according to the linearity between the output voltage and the drain dc [5]. Problems exist, however, in the amsupply voltage plitude modulation process: decline in average efficiency for the low power mode is one of them. The peak average power ratio (PAPR) of the broadband modulated signals, such as quadrature phase-shift keying (QPSK), quadrature amplitude modulation (QAM), and orthogonal frequency division multiplexing (OFDM), is about 6 dB, with the possibility of even higher outcomes [6]. The power control range of a transmitter is usually higher than 30 dB. Therefore, power amplifiers will frequently Manuscript received May 12, 2009; revised November 04, 2009. First published March 08, 2010; current version published April 14, 2010. This work was supported by the Hi-tech Research and Development Program of China under Grant 2007AA01Z283. The authors are with the School of Electronic Engineering, University of Electronic Science and Technology of China, Chengdu, Sichuan 611731, China. (email: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2041520

. Thus, it is difficult to keep the system effioperate at low ciency high enough in the whole dynamic range, including the low power mode. , the drain As observed from the measured results at low efficiency of the class-E amplifier is usually lower than that in region. For example, the efficiency degradation can the high be found in the measured results of LDMOS and CMOS class-E amplifiers [7]–[9]. The measurements of the polar transmitter also support this conclusion [10], [11]. The efficiency degradation is usually ascribed as the increased switch loss due to the on . In theory, though, if the load resistance of a transistor at low resistance is fixed, the effects of the switch loss will not change much. Some methods were proposed to solve this problem [12], [13], such as high-impedance load termination, at low power mode. The voltage-dependent parameter is assumed to be the . major factor of drain efficiency degradation at low The voltage-dependent nonlinear transistor output capaciis presented in this paper. In [14], the nonlinear tance was introduced in the analysis of a class-E amplifier. The design of an optimum class-E amplifier with linear and nonlinear capacitance was discussed in most of the related literatures , however, has [15]–[17]. The amplifier performance at low not been sufficiently studied. In [18], for example, only the effects on output voltage were discussed. In [10], the effects of nonlinear output capacitance on the efficiency degradation were mentioned, but no analysis was given. In order to solve this problem, in [19], the method for efficiency enhancement was proposed, considering the nonlinear capacitance. The purpose of this paper is to study amplifier performance at , including output power, phase response, and drain eflow ficiency. This paper is organized as follows. Section II analyzes the cause of efficiency degradation and the related amplifier per, considering the nonlinear . Numerical formance at low results are given to verify the analysis. In Section III, the efficiency enhancement method, with gate dc bias adjustments, is proposed and analyzed. In Section IV, an experimental example is given to show the feasibility of the analysis and proposed efficiency enhancement method. Conclusions are given in Section V. II. ANALYSIS OF THE CAUSE OF EFFICIENCY DEGRADATION AT LOW A. Analysis of the Effects of the Nonlinear Transistor Output Capacitance As mentioned in Section I, the measured drain efficiency at low drain voltage is usually lower than the optimal value. Voltage-dependent measured results show that the cause is

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where . The load resistance and are determined when and the output power is . From [17], is given by (4)

Fig. 1. Analytical model of a class-E amplifier with nonlinear output capacitance C and linear external capacitance C .

related to voltage dependent parameters. For a MOSFET transistor, the drain–source capacitance is a nonlinear parasitic component, which is dependent on the voltage stress [17]. It is known that the MOSFET transistor contains a p-n juncsattion body diode; the parasitic drain–source capacitance isfies the following nonlinear voltage dependent relation:

are complicated and can be found The expressions of and in [20] for more detail. In this paper, they are obtained using numerical methods. From [17], the drain voltage can be expressed as (5) where is the dc supply current . The Fourier relation of the dc and fundamental component of is satisfied. The dc component can be obtained as

(1) (6) where is the instantaneous drain–source voltage, is the . is the built-in measured parasitic capacitance when potential of the body diode, and is the grading coefficient of the diode junction, which is assumed to be 0.5 in this paper. is dependent on . From (1), it can be concluded that The equivalent linear capacitance of is usually adopted in the design of a class-E amplifier [16], [17]. The fictional equivalent capacitance for zero voltage switching (ZVS) operation varies at . In this case, the ZVS condition different dc supply voltage is not satisfied anymore. The amplifier performance will then degrade. The relevant results will be shown in this section. Due to the nonlinear equation (1), the explicit results are difficult to obtain. In this paper, the analysis is conducted based on the results presented in [17] and [20]. Only the numerical results, with shunt capacitance composed of both linear and nonlinear components, are given to show the intrinsic cause and the behaviors of the amplifier performance degradation. The analytical model of the class-E amplifier is shown in is the intrinsic nonlinear capacitance of the MOSFET Fig. 1. is the external linear shunt capacitance. In the transistor and following analysis, the class-E amplifier is assumed to have been at the specific dc optimally designed for 0.5 on-duty ratio and output power , considering and supply voltage according to the theories in [17] and [20]. In the following analysis, the amplifier performance is studied under the condiand the on duty ratio already tion that the dc supply voltage deviate from the nominal values. It is assumed that the output voltage is purely sinusoidal

is the transistor on resistance. where The fundamental cosinusoidal component of phase of , is zero, i.e.,

(7) The fundamental sinusoidal component of , is equal to , i.e.,

, with phase of

(8) or changes to a value different from the original and If 0.5, respectively, the optimal ZVS switch condition is not satisfied any more. The drain efficiency will, therefore, be lower; this is mainly caused by the energy dissipation during the OFF–ON switch transition instant. The power conservation relation can be obtained as

(9)

(2) where is the angular time, is the output phase. The node voltage , which is shown in Fig. 1, can be obtained as

, with

where

, (10)

(3)

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TABLE I DESIGNED COMPONENT VALUES OF THE CLASS-E AMPLIFIER AT 2, 4, V, P W, AND 6 MHz, RESPECTIVELY. V Q ;D : . THE TRANSISTOR IS IRF510

= 10

=05

= 20

=4

which is the transistor output capacitance at the OFF–ON transition instant. Combining (5)–(10), the operations of the class-E amplifier or can be determined. The unknown at different and can then be obtained. The computation of the three parameters can be conducted using numerical integration and optimization tools in MATLAB; the results are given in Section II-B to manifest the amplifier performance. B. Numerical Results of the Amplifier Performance as a Function of From (1), the nonlinear output capacitance of the transistor changes with the reduction of drain dc supply voltage . decreases rapidly from as increases. This is , which is usually much lower than especially true at low . If the voltage deviation is significant, the nominal voltage the ZVS condition of the class-E amplifier cannot be kept espe. The degradation of the amplifier performance cially at low is shown in the numerical results in the following paragraph. For convenience and comparison, the transistor used in this example is IRF510. It is known, for this transistor, that pF, V, and [17]. The passive components of the class-E amplifier are designed for 4-W output power at three different frequencies: 2, 4, and 6 MHz, respectively, V, . The designed component values are when listed in Table I. In the following paragraphs, the amplifier performance is shown using both numerical results and harmonic balance (HB) simulated results for comparison. The HB simulated results are obtained in Agilent Technologies’ Advanced Design System (ADS) using the transistor’s SPICE model. are The results of the magnitude of the output voltage shown in Fig. 2. In the numerical results, the linearity and mag. The HB simulated nitude of are not strongly affected by is also slightly freresults follow the same trail, except that quency dependent; this dependency is not found in the numerical results. The reason for this is, most likely, that the amplifier performance is also affected by other frequency-dependent parasitic components such as lead inductance and gate–drain capacitance. These factors are not included in the theoretical analysis. The output phase and drain efficiency are highly depenand the frequency. The numerical results of and dent on are, respectively, shown in comparison to the HB simulated re, espesults in Fig. 3. It can be concluded that changes with V. This is because increases rapidly cially when in this region. In a similar way, also declines rapidly when V. This becomes worse at higher frequencies due to

Fig. 2. Numerical and HB simulated results of V at 2, 4, and 6 MHz. The class-E amplifier is designed to offer 4-W output power at 20-V drain dc supply. D : .

= 05

. The performance degradation of the frequency-dependent and is frequency and voltage dependent, as shown in the numerical and simulated results. The difference of the maximal between the numerical and HB simulated results, shown in Fig. 3(b), is caused by other nonidealities at high frequency. In order to compare the effects of the on-resistance and the switch loss on drain efficiency, the energy dissipation caused by the two factors are listed in Table II for the amplifier designed at 6 MHz. From Table II, it can be observed that the proportion of and during the OFF–ON tranthe power loss dissipated in desition instant becomes more and more significant when creases. The proportion of the loss in is only small amount; however, the main cause of the efficiency degradation can be asand due to the non-ZVS switching cribed as the loss in operations. The amplifier performance degradation causes some important issues if a polar transmitter is designed with the class-E amplifier. Some of them are listed as follows. 1) Nonlinear voltage-dependent causes phase distortions to the phase modulated signal amplified by the class-E amplifier. 2) If the polar transmitter is designed for the signals of high can cause low average efPAPR, degraded at low ficiency. If the polar transmitter operates at a low power is biased low for a majority of the time so the mode, overall system efficiency will degrade further. In Section III, an efficiency enhancement method is proposed to solve the second problem according to the gate dc bias adjustments. III. EFFICIENCY ENHANCEMENT METHOD AT LOW DRAIN VOLTAGE As analyzed in Section II, the drain efficiency of a class-E , amplifier is affected by the nonlinear , especially at low which is far away from the optimally designed drain voltage. A simple and effective form of efficiency enhancement is re. In [21], quired to improve the amplifier’s efficiency at low

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TABLE II ENERGY DISSIPATION OF THE ON-RESISTANCE AND THE SWITCH LOSS CAUSED BY SHUNT CAPACITANCE, NORMALIZED BY DC INPUT POWER. THE AMPLIFIER IS DESIGNED TO OFFER 4-W OUTPUT POWER AT 20-V DRAIN DC SUPPLY AT 6 MHz,D :

=05

Fig. 4. Numerical results of the optimized drain efficiency and corresponding : . The on duty ratio D in comparison with the drain efficiency of fixed D class-E amplifier is designed to offer 4-W output power at 20-V drain dc supply at 6 MHz.

=05

Fig. 3. (a) Numerical and HB simulated results of . (b) Numerical and HB simulated results of  . The class-E amplifier is designed to offer 4-W output : . power at 20-V drain dc supply. D

=05

the maximum frequency of a class-E amplifier with nonlinear output capacitance for 100% drain efficiency was anaby adopting relyzed. The method of improvements on duced on duty ratio was proposed. The relation between the optimal operations of a class-E amplifier and the reduced on duty ratio was implied. A possible solution for efficiency enhancement at low drain voltage can also be implemented in a similar way. The following study of the optimally adjusted on duty ratio . can be verified as an efficiency enhancement method at low The class-E amplifier is assumed to be designed at a nominal ; the amplifier performance, at low drain dc supply voltage with different , can be obtained by solving (5)–(10). A numerical example is given here; the class-E amplifier is designed at 6 MHz using MOSFET to offer 4-W output power at 20 V transistor IRF510. Compared to the original values, the numerical results of the optimized drain efficiency with duty ratio adjustments are shown in Fig. 4. The optimized on duty ratio offers the highest

drain efficiency; results show that the drain efficiency can be with reduced . improved by approximately 10% at low The magnitude and phase of the output signal are affected by the optimized ; the results are shown in Fig. 5. and , with optimized , are both reduced and distorted when compared to the original values. The magnitude and phase distortions are harmful to the linearity of a polar transmitter. The distortions, which inherently exist whether duty ratio adjustments are done or not, can easily be linearized by digital predistortion method in the baseband processing unit. The cost on the baseband algorithm can be traded in order to obtain the improved average drain efficiency and extended signal dynamic range. The on duty ratio of a power amplifier with a MOSFET transistor is determined by the gate dc bias voltage. If the input driving signal is sinusoidal, the definition of the state of turn on can be defined as the range of , which satisfies the following equation: (11) where is the amplitude of the input signal, is the angular is the gate dc bias voltage, and is the turn-on time, threshold voltage. There are two ways to change the on duty

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Fig. 6. Schematic of the measured class-E power amplifier. The parasitic : ;R resistance of the inductors are listed here, R : ;R : .

01

= 06

= 15

=

Fig. 5. Numerical results of V and , with optimized on duty ratio D , in comparison with those of fixed D : . The class-E amplifier is designed to offer 4-W output power at 20-V drain dc supply at 6 MHz.

=05

ratio to optimize the drain efficiency, which are: 1) adjustand 2) adjustments on when . Duty ments on , can be done by ratio variations, counting adjustments on biasing two distinct gate dc bias voltage: one is normally biased for high and the other is biased at a voltage lower at for low . This setting can simplify the on duty ratio than adjustment circuits. Furthermore, decreasing the input power is beneficial to improving the power-added efficiency (PAE); deis a method related to some other limitations, such creasing as insufficient driving power for switch mode operation of the class-E amplifier. For simplicity, only the method of on duty ratio adjustment with optimized gate bias voltage for efficiency enhancement will be discussed and verified by experimental results in Section IV.

Fig. 7. Photograph of the measured class-E power amplifier.

IV. EXPERIMENTS LDMOS transistors are widely used in power amplifiers at microwave frequencies for commercial applications such as communication base-station transmitters. The output capacitance of the LDMOS transistor is also nonlinear, similar to a general MOSFET transistor. In [22]–[24], the output capacitance is measured, estimated, or modeled in the same way as the characteristic of the MOSFET transistor. In [25], the simple depletion capacitance model is defined for an LDMOS transistor, with the expression is just the same as in (1). It is reasonable to measure a class-E power amplifier designed with an LDMOS transistor to study the effects of nonlinear output capacitance and also to verify the proposed efficiency enhancement method. In this experiment, the class-E power amplifier is designed with an LDMOS transistor MRF21010, which was obtained from the Freescale Company, Austin, TX. This amplifier is iniat 100 tially designed to offer 5-W output power for 15 V MHz. Since the nonlinear output capacitance is not available from the vendor, the initial design is done according to the theoretical equations for linear output capacitance [4]. The final in the circuits are then optimized considering the nonlinear Agilent Technologies’ ADS. The schematic and a photograph of the amplifier are shown in Figs. 6 and 7, respectively.

Fig. 8. Measured and simulated results of the output power, drain efficiency, and gain of the class-E power amplifier as a function of input power. V : V, f V, V MHz.

15

=33

= 100

=

The performance of this class-E amplifier is first measured under the initially designed conditions. The drain dc supply voltage is 15 V; the gate dc bias voltage is selected to be 3.3 V, which is just above the turn-on threshold of the transistor. In the measurements, this amplifier offers an output power of 36.2 dBm (4.17 W), drain efficiency of 83.6%, PAE of 82.6%, and 19.2-dB gain at an input power level of 17 dBm. The measured and simulated results of the output power, drain efficiency and gain of this amplifier as a function of input power are shown in Fig. 8. The results show that the measured and simulated results match well under the same conditions. The amplifier performance, as a function of drain dc supply voltage, with and without gate dc bias adjustments, is studied in this experiment. Here, we give both the simulated and measured and also results to manifest the efficiency degradation at low

YOU et al.: EFFICIENCY ENHANCEMENT OF CLASS-E POWER AMPLIFIERS

Fig. 9. Simulated results of the output power and the drain efficiency with fixed gate dc bias voltage (V ) in comparison with those with optimized gate dc bias voltage. The optimized gate dc bias voltage is also shown in this figure scaled up by ten times. The input power is 15 dBm, f = 100 MHz in the simulations.

to verify the feasibility of the proposed efficiency enhancement method. The simulated results of the output power and drain efficiency with fixed gate dc bias voltage in comparison to those with optimized gate dc bias voltage are shown in Fig. 9. From the results, V; the the drain efficiency begins to decrease when variation trend is the same as that shown in Fig. 4. The nonlinear output capacitance is clearly the main cause as the conclusions made in the analysis. With the efficiency enhancement method, of the class-E amplifier is adjusted the gate dc bias voltage to obtain the maximal drain efficiency. The simulated results , namely, by deshow that can be improved by decreasing creasing the on duty ratio. The optimized drain efficiency is apV. proximately 6% higher than the original value when The drain efficiency improvement is supposed to be much more V, but the precise value is unavailable due to the when abnormal increase of the drain efficiency. This is caused by the feedthrough of the input signal [26]. In Fig. 9, the feedthrough V. is significant if The feedthrough of the input driving signal is caused by the gate–drain capacitance; this capacitance is not included in the analysis of this paper. The gate–drain capacitance is nonlinear and dependent on the gate–drain voltage [27]; it can, therefore, affect the amplifier performance like the nonlinear output capacitance. The gate–drain capacitance is usually low when compared to the transistor output capacitance; the gate–drain capacitance of the LDMOS transistor MRF21010, for example, is about 1 pF. In some cases, the effects of the gate–drain capacitance can be neglected; on the other hand, because the driving power of the class-E switch-mode amplifier is usually high, the feedthrough is comparatively stronger than the desired output power at low drain voltage. The feedthrough strongly affects the linearity of the dc supply modulation of the class-E amplifier and must be taken into consideration for low power operation mode. From the simulation results and the following measured results, though, the feedthrough can be neglected for moderate output power. The drain efficiency degradation in this range is mainly caused by the transistor output capacitance; the effects of the gate–drain capacitance are, therefore, not included. For precise analysis, especially at the very low drain voltage, the

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Fig. 10. Measured results of the output power and the drain efficiency with fixed gate dc bias voltage (V ) in comparison with those with optimized gate dc bias voltage. The optimized gate dc bias voltage is also shown in this figure scaled up ten times. The input power is 15 dBm, f = 100 MHz in the simulations.

gate–drain capacitance cannot be neglected, as shown in the simulations and measurements of this experiment. Corresponding measured results for these findings are shown in Fig. 10. The optimized is approximately 7.5% higher than the original value. The feedthrough of the input signal is also V. The optimized signal dynamic significant when % extends from 22.7 to 31.96 dB (counting range of up to the output power at 20 V ) and 9.26-dB improvements are obtained. The measurements verify that the method can be beneficial for efficiency enhancement of decreasing at a low power mode. In practical designs, though, the components and circuits used for gate dc bias adjustment also consume power and may decrease the system’s overall efficiency. This factor limits the application of this method. The efficiency enhancement method assisted by decreasing the input power, the second method mentioned in Section III, can be used to improve PAE, and thus, reduce the feedthrough of the input drive. V. CONCLUSION The efficiency degradation at low drain voltage for a class-E power amplifier designed with a MOSFET transistor has been analyzed by taking nonlinear transistor output capacitance into consideration. Theoretical analysis and numerical results have shown that the ZVS condition of a class-E amplifier, designed at a nominal drain dc supply voltage, is no longer satisfied in a polar transmitter in which the drain dc supply voltage is variable due to the amplitude modulation and the power control. The degraded drain efficiency is mainly caused by the energy during the OFF–ON transition instant. Furdissipated on thermore, the efficiency enhancement method, found in the analysis and numerical results of the effects of duty ratio variations, are proposed by adjusting the gate dc bias voltage. The validity of the analysis and feasibility of the efficiency enhancement method are verified by an experimental LDMOS class-E power amplifier designed at 100 MHz. This amplifier manifests efficiency degradation at the low drain voltage ( 6 V); approximately 7.5% drain efficiency improvements and a 9.26-dB dynamic range extension are obtained with the gate dc bias adjustments method.

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REFERENCES [1] J. N. Kitchen, C. Chu, S. Kiaei, and B. Bakkaloglu, “Combined linear and delta-modulated switch-mode PA supply modulator for polar transmitters,” IEEE J. Solid-State Circuits, vol. 44, no. 2, pp. 404–413, Feb. 2009. [2] A. Shameli, A. Safarian, A. Rofougaran, M. Rofougaran, and F. De Flaviis, “A two-point modulation technique for CMOS power amplifier in polar transmitter architecture,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 1, pp. 31–38, Jan. 2008. [3] C. T. Chen, C. J. Li, T. S. Horng, J. K. Jau, and J. Y. Li, “Design and linearization of class-E power amplifier for nonconstant envelope modulation,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 4, pp. 957–964, Apr. 2009. [4] A. Grebennikov and N. O. Sokal, Switch Mode RF Power Amplifiers. Oxford, U.K.: Newnes, 2007. [5] M.-C. Lee, T.-W. Kwak, B.-K. Choi, and G.-H. Cho, “A 4-W master–slave switching amplitude modulator for class-E1 EDGE polar transmitters,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 55, no. 5, pp. 484–488, May 2008. [6] J. Groe, “Polar transmitters for wireless communications,” IEEE Commun. Mag., vol. 45, no. 9, pp. 58–63, Sep. 2007. [7] A. Ådahl and H. Zirath, “An 1 GHz class E LDMOS power amplifier,” in 33rd Eur. Microw. Conf., Munich, Germany, 2003, pp. 285–288. [8] H. Lee, C. Park, and S. Hong, “A quasi-four-pair class-E CMOS RF power amplifier with an integrated passive device transformer,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 4, pp. 752–759, Apr. 2009. [9] J. M. Jang, H. T. Lee, C. K. Park, and S. C. Hong, “A class-E CMOS RF power amplifier with cascaded class-D driver amplifier,” Microw. Opt. Technol. Lett., vol. 50, no. 2, pp. 470–473, Feb. 2008. [10] I. Kim et al., “High-efficiency hybrid EER transmitter using optimized power amplifier,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 11, pp. 2582–2593, Nov. 2008. [11] J. N. Kitchen, I. Deligoz, S. Kiaei, and B. Bakkaloglu, “Polar SiGe class E and F amplifiers using switch-mode supply modulation,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 5, pp. 845–856, May 2007. [12] C. Park, J. Han, H. Kim, and S. A. H. S. Hong, “A 1.8-GHz CMOS power amplifier using a dual-primary transformer with improved efficiency in the low power region,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 4, pp. 782–792, Apr. 2008. [13] D. H. Lee, C. Park, J. Han, Y. Kim, S. Hong, C.-H. Lee, and J. Laskar, “A load-shared CMOS power amplifier with efficiency boosting at low power mode for polar transmitters,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 7, pp. 1565–1574, Jul. 2008. [14] M. J. Chudobiak, “The use of parasitic nonlinear capacitors in class-E amplifiers,” IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 41, no. 12, pp. 941–944, Dec. 1994. [15] M. A. Y. Medina, D. Schreurs, and B. Nauwelaers, “RF class-E power amplifier design based on a load line-equivalent capacitance method,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 3, pp. 206–208, Mar. 2008. [16] H. Zhang, X. K. Ma, S. C. Wong, and C. K. Tse, “Analysis and design of class E power amplifier with nonlinear parasitic capacitance at any duty ratio,” Microw. Opt. Technol. Lett., vol. 49, no. 4, pp. 920–923, 2007. [17] T. Suetsugu and M. K. Kazimierczuk, “Analysis and design of class E amplifier with shunt capacitance composed of nonlinear and linear capacitances,” IEEE Trans. Circuits Syst. I: Reg. Papers, vol. 51, no. 7, pp. 1261–1268, Jul. 2004. [18] T. Suetsugu and M. K. Kazimierczuk, “Output characteristics of class E amplifier with nonlinear shunt capacitance versus supply voltage,” in IEEE Int. Circuits Syst. Symp., New Orleans, LA, 2007, pp. 541–544. [19] K. Y. Kim, J. H. Kim, S. M. Park, and C. S. Park, “Parasitic capacitance optimization of GaAs HBT class E power amplifier for high efficiency CDMA EER transmitter,” in IEEE Radio Freq. Integr. Circuits Symp., Honolulu, HI, 2007, pp. 733–736. [20] T. Suetsugu and M. K. Kazimierczuk, “Comparison of class-E amplifier with nonlinear and linear shunt capacitance,” IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 50, no. 8, pp. 1089–1097, Aug. 2003. [21] A. Mediano, P. Molina-Gaudo, and C. Bernal, “Class E amplifier design equations for maximizing the frequency utilization of a device,” in IEEE MTT-S Int. Microw. Symp. Dig., 2007, pp. 11–14.

[22] L. Vestling, J. Ankarcrona, and J. Olsson, “Analysis and design of a low-voltage high-frequency LDMOS transistor,” IEEE Trans. Electron. Devices, vol. 49, no. 6, pp. 976–980, Jun. 2002. [23] R. Gaddi, P. J. Tasker, and J. A. Pla, “Direct extraction of LDMOS small signal parameters from off-state measurements,” Electron. Lett., vol. 36, no. 23, pp. 1964–1966, 2000. [24] F. M. Rotella, G. Ma, Z. Yu, and R. W. Dutton, “Modeling, analysis, and design of RF LDMOS devices using harmonic-balance device simulation,” IEEE Trans. Microw. Theory Tech., vol. 48, no. 6, pp. 991–999, Jun. 2000. [25] C. Fager, J. C. Pedro, N. B. de Carvalho, and H. A. Z. H. Zirath, “Prediction of IMD in LDMOS transistor amplifiers using a new largesignal model,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 12, pp. 2834–2842, Dec. 2002. [26] S. Hietakangas, T. Rautio, and T. Rahkonen, “Feedthrough cancellation in a class E amplified polar transmitter,” in Eur. Circuit Theory Design Conf., Seville, Spain, 2008, pp. 591–594. [27] D. Navarro et al., “Circuit-simulation model of gate–drain-capacitance changes in small-size MOSFETs due to high channel-field gradients,” in Int. Simulation Semicond. Processes Devices Conf., Kobe, Japan, 2002, pp. 51–54. Fei You (S’07–M’10) was born in Chongqing, China, in 1982. He received the Bachelor’s degree in electronic engineering and Ph.D. degree in circuits and systems from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 2004 and 2009, respectively. He is currently a Lecturer with the School of Electronic Engineering, UESTC. His research interests include high-efficiency power amplifier design and its application in linearization transmitters. His research plan is to build a digital polar transmitter for broadband communication systems. The design method of class-E power amplifiers at the microwave band, high-efficiency broadband dc modulators, and the digital predistortion linearization method for digital polar transmitters are his current key research areas.

Songbai He (M’08) was born in Sichuan, China, in 1972. He received the Bachelor’s, Master’s, and Ph.D. degrees in electronic engineering from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 1995, 1998, and 2003, respectively. In 2004, he visited Chiba University, Chiba, Japan, where he was involved with research on high-efficiency switch-mode power amplifiers. In 2005, he returned to UESTC, where he is currently an Associate Professor. His current research on broadband highefficiency linear transmitters is supported under the Hi-tech Research and Development Program of China. His research interests include RF/microwave circuits and systems, frequency synthesis, wireless communication, and nonlinear dynamic systems.

Xiaohong Tang (M’08) was born in Chongqing, China, in 1962. He received the Bachelor’s degree in electromagnetic and microwave technology and Ph.D. degree in electromagnetic and microwave technology from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 1983 and 1990, respectively. Since 1998, he has been a Professor with UESTC. His research interests include microwave/millimeter-wave frequency synthesis, microwave/millimeter-wave hybrid integrated circuits, millimeter-wave radars, RF front-ends of communication systems, and electronic magnetic field theory.

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Low-Noise Amplifier Design With Dual Reactive Feedback for Broadband Simultaneous Noise and Impedance Matching Chang-Tsung Fu, Member, IEEE, Chien-Nan Kuo, Member, IEEE, and Stewart S. Taylor, Fellow, IEEE

Abstract—The simultaneous noise and impedance matching (SNIM) condition for a common-source amplifier is analyzed. Transistor noise parameters are derived based on the more complete hybrid- model, and the dominant factors jeopardizing SNIM are identified. Strategies for narrowband and broadband SNIM (BSNIM) are derived accordingly. A dual reactive feedback circuit along with an LC-ladder matching network is proposed to achieve the BSNIM. It includes a capacitive and an inductive feedback, where the former utilizes the transistor parasitic gate-to-drain capacitance and the latter is formed by transformer coupling. This circuit topology has been validated in 0.18- and 0.13- m CMOS technologies for a 3–11-GHz ultra-wideband (UWB) and a 2.4–5.4-GHz multistandard application, respectively. The 3–11-GHz UWB low-noise amplifier is detailed as a design example. Index Terms—Broadband input matching, capacitive feedback, low-noise amplifier (LNA), low power, noise optimized design, simultaneous noise and impedance matching (SNIM), transformer feedback, ultra-wideband (UWB).

I. INTRODUCTION

A

LOW-NOISE amplifier (LNA) in a wireless receiver is expected to have high gain and low noise figure (NF) for a sufficient signal-to-noise ratio to demodulate signals. Among various MOSFET LNA circuit topologies, the common-source (CS) based amplifier is generally preferred, as it has better noise performance within limited power consumption. It is especially popular for extreme applications in which ultra-low power or very high frequency is demanded. It is well known that gain and noise performance of a linear two-port amplifier can be optimized by fulfilling the condition of simultaneous noise and impedance matching (SNIM) at the input [1], [2]. SNIM is a

Manuscript received July 16, 2009; revised November 11, 2009. First published March 15, 2010; current version published April 14, 2010. This work was supported jointly by the National Science Council, Taiwan, under Grant NSC 98-2220-E-009-064, the MediaTek Center, National Chiao-Tung University (NCTU), and the Industrial Technology Research Institute Joint Research Center. C.-T. Fu was with the Department of Electronic Engineering, National ChiaoTung University, Hsinchu, 300 Taiwan. He is now with the Intel Laboratory, Intel Corporation, Hillsboro, OR 97124 USA (e-mail: [email protected]; [email protected]). C.-N. Kuo is with the Department of Electronic Engineering, National ChiaoTung University, Hsinchu 300, Taiwan (e-mail: [email protected]). S. S. Taylor is with the Intel Laboratory, Intel Corporation, Hillsboro, OR 97124 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2041570

Fig. 1. SNIM approaching for a CS LNA.

condition that the input impedance and the conjugate of of the entire amthe noise optimized source impedance plifier are simultaneously matched to the source impedance , i.e., , as shown in Fig. 1. As such, the NF of . the amplifier approaches the minimum NF The concept of SNIM was first brought up in [2] with a complete two-port analysis on feedback amplification, yielding a series of matrices suitable for computer-aided design in which the design is accomplished by an iterative graphical maneuver on a Smith chart. However, since limited circuit insight can be directly obtained from such an approach [2]–[6], optimization methods by analyzing simplified transistor noise models were proposed [7]–[14], in which most of them are specifically for the inductive source degenerated CS amplifier. While van der -tomisZiel’s analysis is widely adopted to explain the match of a MOS transistor, it was found, however, that induced gate noise is not the dominant cause of this mismatch. The noise from gate resistance was mentioned, but not included in SNIM analysis. Hence, there is a gap between the analysis and practical design that relies on iterative steps to resolve. At this point the approaches by [7] and [8] provide more consistent results with simulation. For a broadband SNIM (BSNIM) LNA design, frequency dependency of the noise parameters should be considered. and derived in the literatures have Whereas the different frequency dependency, BSNIM seems difficult to achieve. This is observed in the broadband amplifier realized by employing a multiorder LC matching network [15], of which the noise performance is still band-limited. In 2006, two ultra-wideband (UWB) LNAs utilizing distinct transformer feedback structures were reported [16], [17], both showing a broadband noise performance. In [16], we demonstrated the first BSNIM LNA by employing a dual reactive feedback topology. We infer the work in [17] might also achieve BSNIM as two reactive feedback paths are employed in the first stage, although this was not discussed. To the best of the authors’

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knowledge, an effective BSNIM LNA design approach has not been revealed yet. In this paper, we provide a design approach for a BSNIM LNA in CMOS based upon transistor noise parameter analysis and provide an example. It is the theoretical extension of our earlier papers [16], [18]. Starting in Section II, we first analyze the practical mechanisms jeopardizing the ideal SNIM condition inside a CMOS transistor, including the effects of the gate resistance, gate-to-drain capacitance, and induced gate noise. Based on the derived four noise parameters, the strategies to achieve SNIM are proposed for both narrowband and broadband applications as design guidelines. In Section III, a dual reactive feedback amplifier with an LC ladder matching network achieving BSNIM is introduced as a solution. Section IV demonstrates the design example of an UWB LNA implemented in a TSMC 0.18- m CMOS process [16], along with the experiment results. Section V summarizes and concludes this paper. In the Appendix, the noise analysis to obtain the input-referred noise sources for noise parameters is presented. The effect of noise contributed by the succeeding stages following an LNA is also briefly discussed in the Appendix. II. SIMULTANEOUS NOISE AND INPUT MATCHING: ANALYSIS AND SOLUTION In traditional microwave theory, a CS amplifier can be designed to be either gain optimized by impedance matching or noise optimized by noise matching [1]. Whereas the latter is more critical in an LNA design, input impedance matching is necessary to minimize the variation in the voltage standingwave ratio (VSWR) with transmission line length, and the accompanying variation in gain and linearity. However, as shown later, SNIM is not “gain optimized” since it can only be achieved by employing feedback techniques with the gain somewhat reduced. This may not be a practical problem as modern scaled technology usually has adequate or excess gain. The approach for SNIM optimizes the noise performance first, and then designs with feedback for a small input reflection. The gain response is typically dominated by the output network of a CS amplifier and has limited correlation with SNIM. The development of BSNIM design requires an accurate derivation of input-referred noise sources for the noise parameters. In this paper, it is obtained with the developed analysis technique, as in the Appendix. After the noise parameter equations are obtained, a simplification is made and validated and , the strategies for numerically. By comparing BSNIM is derived. A. Mismatch Between

and

Fig. 2. Noise model employed for transistor noise analysis.

Fig. 3. Ideal case of a CS amplifier satisfying SNIM condition at all frequency.

is the drain-to-source channel conductance with Here, . is the intrinsic gate-to-source capacitance via zero is the extrinsic parasitic gate-to-source the channel, and . and capacitance from metal overlap, roughly equal to constitute . The noise contribution of is conditionally ignored here and will be discussed in the Appendix. and in (1) and (2) are derived as 2/3 and 4/3, respectively, for long and are introduced channel MOS transistors [9]. Since by the same channel resistance, they are partially correlated to each other with the correlation factor defined as (3)

where is derived as for long channel devices and the . imaginary unit comes from the capacitive coupling by and in Fig. 2 decide the sign of the The directions of is the associated noise source of gate correlation factor. , whose value is resistance (4) The metal overlap parasitic capacitances such as and are included in this model for analysis. and of a CS amplifier is The mismatch between well known. To identify the factors causing this mismatch, we start with the ideal case that always meets the SNIM condition, . Consider the ideal hybrid- model of a MOS i.e., and a noiseless transistor, shown in Fig. 3, which includes gate resistor . By applying the noise analysis technique in the of this ideal transistor can be shown to be Appendix, (5)

of a CS MOS Amplifier

The noise model employed for the transistor noise analysis is shown in Fig. 2, in which is the channel thermal noise and is the induced gate noise. Their values are formulated as (1) (2)

and

is (6)

Obviously is equal to at all frequency. Therefore, and can both be tuned and matched to in Fig. 1 simultaneously with a lossless matching network to meet the SNIM condition.

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The third factor is the induced gate noise. Consider the noise , as shown in Fig. 4(c). , , and model with are ignored. The derived is approximately as

(10) It is beneficial to define the output noise contribution ratio of to as (11) in (10) can then be simplified as (12) Fig. 4. Simplified MOS transistor noise models testing effects of: (a) associated noise of gate resistance, (b) C , and (c) the induced gate noise.

In practice, as shown in Fig. 2, and are found to differ from each other by three major factors, referred to as -todiscrepancy factors, which are: 1) independent noise sources at the gate; 2) gate-to-drain capacitance; and 3) induced gate noise. Effects of these three factors can be observed individually by the three test cases, as shown in Fig. 4. The first factor is the independent noise source at the gate . Using the port. Typically, this is the gate resistance noise is signifinoise model shown in Fig. 4(a), the analysis of cantly changed to be

with the corresponding , equal to By comparing this , the induced gate noise is found to reduce the effective capacitance of and introduces a frequency-dependent real . part on With all of the three factors considered, it can be shown that

(13) where

(14) and

(7)

(15)

where . In comparison to (5), the noise source increases the real part of with a frequency-dependent term, larger than . This factor is found to be and thus makes -todiscrepancy in most CMOS the primary factor in LNA design. The noise from a nonideal input matching network also has the same effect. The second factor results from parasitic feedback via gate-to. Consider the simplified transistor noise drain capacitance model with , as shown in Fig. 4(b). In comparison with , the the ideal case in Fig. 3 with changes due to the effect of feedback such inclusion of that

With typical device parameters in 0.18- m CMOS techand are about and , nology, respectively. More than 99.5% of comes from the can be approximated as second term in (13). Hence,

(8) Via feedback, the loading impedance affects signifimpacts only by its loading effect icantly. In contrast, itself) such that (

(16) where the effect of the induced gate noise, represented by in the above equations, can be ignored. From (16), has a . frequency-independent quality factor equal to Hence, on the Smith chart, the curve roughly follows the constant- contour, different from the behavior of a physical RC network. The other noise parameters are easily obtained. The -parameter representation of the noise factor is (17) Here,

and

are

(9) The change of loading impedance

has no effect on

.

(18)

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Fig. 5. Equation verification of Z and the analysis of discrepancy factor effects on Smith chart. Frequency swept from 1 to 20 GHz with 1-GHz step.

and

(19) Equation (19) corresponds to Fukui’s empirical equation of [19]. We can see not only introduces -todiscrepancy, but also increases . is identified as a dominant noise contributor to an LNA. On the other hand, is derived as (20) The accuracy of (13)–(15) was verified with several test cases by MATLAB and Agilent ADS. The calculated ( -parameter ) agrees closely with the simulated . Representative of results are plotted in Fig. 5. In this test case, the component parameters in the model of Fig. 2 were extracted from a 0.18- m NMOS transistor operated in strong inversion in the saturation region. These were applied to (13) and the model in Fig. 2 for is the calculation and simulation, respectively. Noise from not included in the test case. The simulation result employing the foundry noise model is also included as a reference. Different test conditions are applied to analyze the effect of different factors. As can be seen, the calculation result fits the simulation results very curve behaves as a constant- curve, showing a well. The , not matched to the strongly frequency-dependent curve. dominates the real part discrepancy, whereas induced has a marginal effect on . gate noise Different values of are applied in Fig. 5 to show the effect feedback on . It can be observed that is sigof because of feedback, nificantly affected by a resistive is also slightly affected, as predicted by (20). In while addition, if a reactive is applied, a capacitive provides an

results additional noiseless resistance, whereas an inductive in positive feedback, causing an unstable resonance. The former can be utilized for BSNIM as described in Section II-B. With approximate equations (16), (18), and (19), one can quickly evaluate transistor noise parameters of sufficient accuracy by ac simulation or vector network analyzer (VNA) measurement results. and in (16) and (20), respectively, By comparing their differences are summarized as follows. makes • For the real part, the noise contributed by much larger than by a frequencydependent amount. , the feed• For the imaginary part, with a resistive smaller than . When repback makes resented by a series capacitance, the equivalent series cais larger than that in . pacitance in An important insight, if noise from the succeeding stages is feedback changes only by its loading ignored, is that due to feedback, as shown in effect, whereas it changes (8) and (9). The same phenomenon applies to other lossless feedback topologies such as source inductive degeneration [14]. and Hence, one can manipulate the difference between with lossless feedback to achieve SNIM. Another important consideration is the gain of the CS amplifier. If it is not sufficiently high, the noise parameters will be significantly affected by the noise of succeeding stages. As as well as , and shown in the Appendix, this increases and . Care should be reduces the discrepancy between taken, noting that lower gain may degrade noise performance while satisfying the condition for SNIM. B. Strategies to Achieve BSNIM -todiscrepancy identified, With the mechanism of strategies to achieve BSNIM for minimized NF can be pursued. is smaller than , the difference can be Since compensated by introducing a noiseless resistance with a reactive feedback technique. It is critically important to minimize induced by and the the series capacitance expansion of . From (20), it is necessary to meet the following real part of condition: and

(21)

The proposed SNIM strategy first matches to the source with the loading effect of the feedback compoimpedance nents included, but without feedback loop gain, then to adjust to without affecting and the loop gain to match . Consider the source inductive degenerated LNA as an exto , make and combine ample. When matching to the gate matching the inductance of the source inductor inductor such that the loading effects of and are and feedback are equal to included, but the loop gain of and increase , with reduced correzero. Then adjust to . spondingly, to adjust the feedback loop gain to match The loop gain adjustment does not affect and . For a narrowband LNA at frequency , the design criteria for SNIM are summarized as follows. 1) Apply the smallest channel length for the best transistor increases roughly with performance. From (19),

FU et al.: LNA DESIGN WITH DUAL REACTIVE FEEDBACK FOR SNIM

, which can usually be minimized with the shortest channel length. should be as small as possible to avoid 2) The real part of increasing the difference between and . This difference introduces a frequency offset between the impedance and noise matching. 3) Given a specified drain current, co-design the transistor match to the size and matching network to make at with the loading effect of feedsource impedance back components included. to match without adding noise and 4) Increase changing with appropriate lossless feedback. A well-known feedback technique is inductive source degeneration. For a prescribed dc drain current (power constraint), is adjusted by varying the transistor size. If the transistor size increases, decreases, and decreases. is increased, From (16) and (19), decreases, but increases. increase is generally insignificant comNonetheless, the pared to the noise factor improvement from noise matching.1 , this adjustment leads to an exFor applications of tremely low transistor current density (biasing at weak inversion), which may increase sensitivity from process variation and degrade linearity. In this case, an external capacitor in parallel to lower is an alternative choice. This with the transistor slightly, but helps maintain noise matching with increases a transistor in moderate inversion. and need to be For broadband applications, both over the entire bandwidth. A broadband response close to requires a high-order input matching network. Equation (16) and (20) show that the frequency dependencies of and are different. Hence, the reactive feedback, as deby a frequencyscribed in 4) above, needs to increase dependent amount. This can be realized by employing multiple close to in difreactive feedback to make ferent frequency regions. Consequently, the design criteria for BSNIM are proposed as follows. 1) Same as above 1) in narrowband cases. or employ a capacitive . 2) Minimize 3) With the drain current specified, the transistor size is of the transistor close to the chosen to make at the center frequency of the source impedance passband. Apply a high-order input matching network (typically a ladder LC network structure) to make close to over the entire band. to match by employing multiple re4) Increase active feedback. While multiple reactive feedback is necessary for BSNIM, the loop gain actually results in a higher order impedance function of than that of such that and behave differently with frequency. Nevertheless, this difference can be accommodated with a high-order input matching network if both and are designed close to in the passband. The procedure described above enables a BSNIM LNA design, which provides power-efficient noise performance. In

G

1If a large amount of dc power is applied such that the in (20) is very small, the noise matching is less critical for noise performance [6]. However, this is not the power efficient case that the SNIM approach strives for.

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Fig. 6. Proposed BSNIM amplifier.

Section III, an exemplary dual reactive feedback technique is proposed as a BSNIM solution, which has been demonstrated to be effective for broadband LNA design from 3 to 11 GHz (fractional bandwidth larger than 130%). In comparison to the area-saving, but power-hungry, resistive/source-follower feedback amplifier [20]–[23], an SNIM/BSNIM LNA saves a considerable amount of power. III. PROPOSED BSNIM AMPLIFIER As discussed above, a BSNIM LNA necessitates a high-order matching network and multiple reactive feedback networks. The proposed BSNIM solution is an LC-ladder matching network [24] along with a dual reactive feedback topology, composed of capacitive shunt feedback and inductive series feedback, as shown in Fig. 6. The LC-ladder matching network and the dual reactive feedback are co-designed following the BSNIM design criteria in Section II-B. Each feedback network attains SNIM in different frequency regions for BSNIM. They at the are seamlessly combined by employing an inductor transistor drain port to obtain different loading conditions for each feedback structure. To quantitatively illustrate the design concept, a 3.1–10.6-GHz UWB LNA designed in 0.18- m CMOS is employed as an example. A. Proposed Dual Reactive Feedback Topology The proposed dual reactive feedback structure and the LC ladder input matching network results in , represented by the equivalent circuit, as shown in Fig. 7. The -tomatching bandwidth is extended by the second-order bandpass LC-ladder structure. The choice of component values follows the guideline as (22) where is located at 5.76 GHz, the geometric mean of 3.1 and 10.6 GHz in this design. Bandwidth expansion is determined by the L/C ratios, where the preliminary values can be obtained by traditional filter design such as a Chebyshev filter. Slight trimming of LC values can compensate for the frequency depen. For the optimal broadband matching result, dency of is, in general, designed slightly less than to make the curve circling the Smith chart center over the entire passband. and also takes into account the gain reThe design of sponse, as will be described later. While broadband noise matching is achieved, the input by the proposed dual reactive impedance is also matched to feedback circuit, as shown via the dashed-line box of Fig. 6. A similar circuit structure was demonstrated with broadband

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Fig. 7. Equivalent-circuit presentation of Z

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to the circuit in Fig. 6. Fig. 9. Gain response of the circuit with dual reactive feedback in Fig. 6. The low-frequency gain is suppressed by L and the high-frequency gain is enhanced by L .

Fig. 8. Input impedance changed among the two feedbacks with frequency. (a) Capacitive shunt feedback in lower frequency region. (b) Inductive series feedback in higher frequency region.

input impedance matching [25]. In contrast to [25], the proposed approach here utilizes each reactive feedback in different frequency regions. This configuration can minimize the differand over a wide frequency ence between range, and therefore enable BSNIM. In the frequency region series resonance frequency, the much lower than the tank behaves like a capacitor to the transistor. can be represented by the equivalent circuit shown Hence, in Fig. 8(a), where

gain is approximately zero. The series inductive feedback is sigis the dominant noiseless nificant under this condition and resistance in this frequency region. of the transistor is inversely proporAs shown in (16), tional to frequency. Its variation is larger than 70% over the match with entire frequency range of interest. To make , is designed to be about half of , accommovariation. In practice, the dating the required branch in Fig. 8(a) has a low- property such that the capacitive feedback is active over a larger portion of the frequency range. , and is made in consideration of The choice of , , making close to over the entire frequency results in two resonance frequencies with range. In practice, the transistor circuit. At low frequencies, and constitute a resonance tank with the resonance frequency of (26) For the inductive feedback, the resonance frequency is located at a higher frequency (27) turns out to be an Therefore, the frequency dependence of . In this design and are order higher than that of located at 5 and 9 GHz, respectively. As to the choice of , it is to accommodate the inductive feedback expected to tune out

(23) (24) and (25) Two noiseless resistances can be found: from the series , and from the shunt capaciinductive feedback of with . Since in (25) is usually tive feedback of , the branch of dominates the input much larger than impedance in this frequency region such that is the noiseto match with . less resistance contributing to resoIn the higher frequency region close to the can nance, the output appears as a short circuit at the drain. be represented by the equivalent circuit, as shown in Fig. 8(b). branch becomes open because the feedback loop The

(28) As the input matching is sensitive to the output impedance with feedback, the proposed BSNIM amplifier is not unconditionally stable. An unwanted resonance could occur whereas behaves inductive at frequency higher than . This can be network controlled by making a quality factor of is the effective output resislower than a certain value. Here, tance of the transistor to be discussed in Section III-B. Meanwhile, a good output-to-input isolation should be provided in the succeeding stage for good overall stability. To meet this requirement, we employ a cascode amplifier as the second stage, as will be shown in Section IV. B. Gain Response As mentioned in Section II-A, a sufficiently high gain over the entire band is necessary to reduce the noise contribution of succeeding stages. The proposed BSNIM amplifier is expected

FU et al.: LNA DESIGN WITH DUAL REACTIVE FEEDBACK FOR SNIM

Fig. 10. Equivalent circuit for gain derivation at f

801

.

to fulfill this gain requirement. This design concept is shown in Fig. 9. The gain response is mainly shaped by the drain network in Fig. 6 as the input network is a broadband structure. Based (the gray curve in Fig. 9), on the low-pass response by creates series gain peaking at the frequency

Fig. 11. (a) Inductive source degeneration feedback can be substituted by the transformer feedback. (b) Their equivalent circuit for input impedance.

(29) which is higher than in (27). The voltage gain at this frequency can be derived with the circuit approximation, as shown is the effective output resistance of the tranin Fig. 10, where as sistor at frequency higher than (30) The gain in the lower out-of-band frequency is suppressed by the input shunt inductor . As a result, a gain peak is formed at the lower band edge. The magnitude of this peak is designed close to the peak gain at the higher band edge such that the expected gain response is the solid curve in Fig. 9. With this design , which is deapproach, the voltage gain is determined at signed at 11 GHz. The gain response of this amplifier is composed of the two gain peaks at both band edges. If a flat gain over a very wide bandwidth is desired, an additional mid-band gain peak by the next stage is necessary to compensate the mid-band sag. This case applies to our 3–11-GHz UWB LNA. On the other hand, if the required bandwidth is moderate, such as the 2–6-GHz application in [18], a flat gain response is obtainable by this stage itself as the two gain peaks can be designed fairly close to each other. C. Transformer for Inductive Series Feedback The proposed dual reactive feedback amplifier, as shown in Fig. 6, requires four inductors that may occupy a large die area. To reduce the inductor number and die area, transformer feedback is proposed to replace the three inductors , , and , and as shown in Fig. 11(a). With transformer feedback, overlap, sharing the same die area with mutual inductance to constitute a transformer. The mutual inductance senses the drain current and contributes series voltage feedback at the in an input similar to the series-series feedback function of inductive source degenerated amplifier. By neglecting the feedback effect and the transformer feed-forward coupling at the frequency of interest, the input impedance can be approximately represented by the equivalent circuit, as shown in Fig. 11(b), in and which (31)

Fig. 12. Proposed dual reactive feedback amplifier with transformer feedback.

which provides the wanted noiseless resistance similar to in (23). The above assumption is valid for the general source inductive degenerated amplifier design. This transformer feedback topology is also beneficial in that the transistor source is connected to ground directly. This allows the amplifier to be implemented with a CMOS inverter structure, which employs both NMOS and PMOS to reuse drain current for high transconductance. The final schematic diagram of the proposed BSNIM amplifier is shown in Fig. 12. Here, the mutual inductance is represented by the coupling factor with the . relation is generally much smaller than and , the couSince pling factor is much smaller than 1. Design simulations show that the optimal value is slightly less than 0.2. Possible layout schemes that facilitate a weakly coupled transformer include common-centric coils and overlapped coils, as shown in Fig. 13. Generally, the common-centric coils have a better quality factor, but occupy more die area. In the design example in Section IV, the common-centric coil was adopted for better performance. IV. DESIGN EXAMPLE: 3–11-GHz UWB LNA A design example of a 3–11-GHz UWB LNA employing the proposed BSNIM amplifier is shown in Fig. 14 [16]. In this prois self-biased totype design, the inverter amplifier of plays the role of with a 10-k feedback resistor. in Fig. 12. between and further increases the gain peak at the higher band edge. The body of is biased to its and provide voltage gain source with a 10-k resistor. with a low- peak at the center frequency to compensate the and constitute the mid-band gain dip by the first stage.

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Fig. 13. Possible layout schemes of a weak coupling transformer. (a) Commoncentric coil. (b) Overlapping coil.

Fig. 15. On the left is the simulated S and S of the designed UWB LNA. The bold face section of each curve represents the results in frequency range from 3 to 11 GHz. On the right is the result without L and C .

Fig. 14. 3–11-GHz UWB LNA as a design example of the proposed BSNIM amplifier.

TABLE I DEVICE VALUES OF THE 3–11-GHz UWB LNA

Note: The values here are of the practical devices, which in some degree deviate from the theoretical values with the device parasitic effects.

output buffer and the 0.1-nH output inductor improves the 50output match. The detailed design parameters of the devices are listed in Table I. Simulation were performed with Agilent Technologies’ and of the LNA is Advanced Design System (ADS). shown on the Smith chart on the left side of Fig. 15. On the and to show right side of Fig. 15 is the result without how the dual reactive feedback enables BSNIM. can be observed to decrease as the frequency increases. At appears close to low frequencies, the plot shows that over a large frequency range, but begins to deviate around 7.5 GHz. The resonance due to the transformer feedback helps reduce this deviation. As shown in the plot, however, the improvement is limited to a small frequency region up to 11 GHz. and in the higher frequency region are slightly larger than the expected because of the parasitic and , the order capacitance of . With the addition of and both of matching network is increased such that move toward the center of Smith chart, achieving broadband matching. With this high-order matching network, the noise

Fig. 16. Gain response trimming in the second stage. a: High-band expansion by L . b: Mid-band compensation by L and R . The bold black curve is the expected result.

matching and input matching performance are also robust with process variations. The second stage of the LNA is a CS–common gate (CG) cascode amplifier providing output-to-input isolation for the good circuit stability. It also compensates the LNA gain for a flat further peaks the gain response at the in-band response: higher band edge with series peaking, and and provide low- shunt peaking at mid-band, as shown in Fig. 16. The third stage is an output buffer. This LNA was designed in a TSMC 0.18- m CMOS process with aluminum metal. It was designed to achieve 15-dB return loss, 4-dB maximum in-band NF, 10-dB power gain with less than 0.5-dB in-band variation, and 0.1-ns maximum group-delay variation while consuming 10 mW of power from a 1.5-V supply. The broadband noise performance is mainly limited by the input matching network where the resistive losses . substantially increase Figs. 17–20 show the simulation and measurement results. Also included are the post-layout simulation results with the transistor model in the slow–slow (SS) corner, which are found closer to the measured results. Fig. 17 shows the measured and from an ATN NP-5 noise parameter analysis system. Both have good in-band matching to 50 . Fig. 18 shows the . The measured closely matches simulapower gain tions with a transistor model from the SS corner, but is about 5-dB lower than that in the typical–typical (TT) corner. The NF are shown in Fig. 19, where and circuit minimum NF in the passband. The measured the NF is very close to in-band NF is less than 5 dB. Fig. 20 shows the noise param. As can be observed in Figs. 19 and 20, the broadband eter noise matching maintains the NF even as varies. The mea-

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in Table II. The simulation and measurement results validate the proposed BSNIM solution. V. CONCLUSION

Fig. 17. Measured and simulated S

Fig. 18. Measured and simulated model of the SS corner.

S

and S

.

. The simulation is with the transistor

The SNIM technique is important for power-efficient noise performance of an LNA. A successful approach for broadband simultaneous noise and impedance matching (BSNIM) on a CS -toamplifier has been demonstrated. The root causes of discrepancy of a MOS transistor were analyzed and the SNIM/ BSNIM design criteria were proposed. Reactive feedback to and are essential for SNIM. equalize the real part of The proposed BSNIM technique employs dual reactive feedbacks and an LC ladder matching network to accommodate a wide bandwidth. Band handover between the two reactive feed. Transformer back paths is facilitated by a drain inductor feedback is employed to provide the same series-series feedback with a reduced die area. The design example of a 3–11-GHz UWB LNA shows a robust BSNIM condition is achieved for an application having over 130% fractional bandwidth. The noise contribution of the nonideal input matching network is found to be as significant as that of the transistor. The low NF up to 11 GHz is maintained on a 0.18- m CMOS process. Another design example in 0.13- m CMOS [18] also shows the benefit of low power and low noise employing the proposed BSNIM technique. APPENDIX

Fig. 19. Measured and simulated NF and NF transistor model of the SS corner.

. The simulations are with the

The input-referred noise sources are obtained by calculating the corresponding output noise voltages for a short-circuited input and the open-circuited input cases, and then divide them by the signal gain to obtain the input-referred voltage and current noise sources, respectively [26]. This method, however, makes the equations very complicated, making the effects of , as well as the correlation of equivdevice components on alent noise sources, confusing. The noise analysis developed in this study includes noise model simplification and the equivalent noise source conversion. The model simplification is for a CS amplifier with noiseless feedback networks, as illustrated in Fig. 21(a), in which and contribute no noise. is the equivalent voltage noise source at the gate representing the noise contribution from and , where the latter is a drain-referred noise current source of the succeeding stages,2 including the noise by . is equal to (A1)

Fig. 20. Measured and simulated R .

sured third-order intermodulation intercept point (IIP3) is about 12 dBm. Linearity is degraded by the voltage gain of the first (Fig. 14). The power consumption stage driving the gate of without the output buffer is 9 mW from a 1.5-V supply. The performance is summarized and compared with other UWB LNAs

Here, is equal to , where is the equivalent feedback transimpedance of the total feedbacks from to gate voltage via and . With drain current , the noise model in Fig. 21(a) can be simplified to the and model in Fig. 21(b) by simply observing that load the transistor gate, where is in series and is in 2By the two-port noise theory, noise contribution of the succeeding stages can be represented as a pair of correlated voltage and current noise sources at output of the CS-Amp. With the given output impedance (Z and C ), the two noise sources can be further merged as one current noise source i .

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TABLE II COMPARISON OF BROADBAND LOW-NOISE CS AMPLIFIER

Differential LNA.

Fig. 21. Developed simplification technique for noise parameters derivation. (a) General case for the CS amplifier with lossless feedback networks. (b) Equivalent circuit for noise analysis.

parallel with . This is based on the principle that the equivalent input referred noise sources of a feedback amplifier are equal to those of same amplifier with the feedback loop opened [26]. In our derivation of the input-referred voltage and current noise sources with the input shorted and opened, respectively, this simplification is valid with the condition that and , which is usually satisfied. With this simplified model, the derivation of input referred noise sources can simply start from the input of the voltage-conin Fig. 21(b). When this model is trolled current source, i.e., plays the role applied to the transistor noise model in Fig. 2, , is equal to 0, and is not included. The effect of of will be discussed at the conclusion of this Appendix. Note that the equivalent circuit in Fig. 21(b) is only for noise analysis and should not be used for input impedance analysis. When referring these noise sources in Fig. 21(b) to the input, the equivalent noise source conversion, a derivative concept from the equivalent noise four-poles [27], can be applied. As after shown in Fig. 22(a), the shunt current noise source in series with the input port has input-rea passive device and a series ferred noise sources including the original

Fig. 22. Two elementary cases of equivalent noise sources conversion over passive devices: (a) in series and (b) in parallel to the input port.

voltage noise source fully correlated to , whereas the remains unchanged at the series voltage noise source can be input. The total input-referred voltage noise source obtained by combining and . Note that the direction of the noise sources in Fig. 22 carries the correlation information between noise sources. In comparison with [27], the opposite direction of current sources is adopted such that the correlation is resistive. factor is positive when and should be combined by employing the 3-D vector operation, as shown in Fig. 23. Assume any vector along is uncorrelated to , then the direction of unit vector can be seen as a combination of two orthogonal vectors: one along and the other on the -plane, a complex plane perpendicular to . Any complex vector on the -plane is fully corre. Here, is defined as the direction in phase with lated to

FU et al.: LNA DESIGN WITH DUAL REACTIVE FEEDBACK FOR SNIM

Fig. 23. 3-D vector operation to combine the two partially correlated voltage noise sources in Fig. 22(a).

. The correlation factor between and is equal to , in which is the absolute value of the corand relation factor and is the phase difference between , as shown in Fig. 23. In Fig. 23, all the ’s and are and , the on the -plane. After the vector addition of total input-referred noise voltage can be obtained with the equal to , where is the phase correlation to and . difference between The equivalent noise source conversion for a passive device in parallel with the input port can be derived in the same manner and as shown in Fig. 22(b). The noise contribution from in Fig. 22 can be included in and , respectively. By alternately applying conversions as in Fig. 22(a) and (b), the input referred noise sources can be obtained. Noise parameters , (or , ), and can be derived with such as the two-port noise theory introduced in [1]. The effect of on noise parameters depends on the feed. The more back, as shown in (A1) with feedback, represented by the larger , results in the lower gain of LNA and the less attenuation of noise from the succeeding . One can replace in stages, yields to the larger (13)–(19) with to include into the noise parameters. It is found that both and increase and , and decrease . The dereduces the discrepancy between and crease of . We observe that feedback loop gain affects noise parameters only when is included in the analysis because is outside the feedback loop. Nonetheless, if the CS amplifier has sufficiently high gain such that the effect of is negligible compared to , the loop gain has almost no effect on the noise parameters. ACKNOWLEDGMENT The authors wish to thank the National Center for High-Performance Computing (NCHC), Hsinchu, Taiwan, for software support, the Chip Implementation Center (CIC), Hsinchu, Taiwan, for software support and chip fabrication and the Radio Frequency Technology Center (RFTC), National Nano Device Laboratory (NDL), Hsinchu, Taiwan, for measurement. REFERENCES [1] G. Gonzalez, Microwave Transistor Amplifier. Englewood Cliffs, NJ: Prentice-Hall, 1984.

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[2] J. Engberg, “Simultaneous input power match and noise optimization using feedback,” in Proc. Eur. Microw. Conf., 1974, pp. 385–389. [3] C. R. Poole and D. K. Paul, “Optimum noise measure terminations for microwave transistor amplifiers,” IEEE Trans. Microw. Theory Tech., vol. MTT-33, no. 11, pp. 1254–1257, Nov. 1985. [4] G. N. Link and V. S. R. Gudumetla, “Analytical expressions for simplifying the design of broadband low noise microwave transistor amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 43, no. 10, pp. 2498–2501, Oct. 1995. [5] B. K. Ko and K. Lee, “A new simultaneous noise and input power matching technique for monolithic LNA’s using cascode feedback,” IEEE Trans. Microw. Theory Tech., vol. 45, no. 9, pp. 1627–1630, Sep. 1997. [6] L. Boglione, R. D. Pollard, and V. Postoyalko, “Optimum noise–source reflection-coefficient design with feedback amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 45, no. 3, pp. 402–407, Mar. 1997. [7] H. Fukui, “Design if microwave GaAs MESFET’s for broad-band lownoise amplifiers,” IEEE Trans. Microw. Theory Tech., vol. MTT-27, no. 7, pp. 643–650, Jul. 1979. [8] S. S. Taylor, “On the optimum width of GaAs MESFETs for low noise amplifiers,” in IEEE RFIC Symp. Dig., 1998, pp. 139–142. [9] A. van der Ziel, Noise in Solid-State Devices and Circuits. New York: Wiley, 1986. [10] D. K. Shaeffer and T. H. Lee, “A 1.5-V, 1.5-GHz CMOS low-noise amplifier,” IEEE J. Solid-State Circuits, vol. 32, no. 5, pp. 745–759, May 1997. [11] D. K. Shaeffer and T. H. Lee, “A 1.5-V, 1.5-GHz CMOS low-noise amplifier,” IEEE J. Solid-State Circuits, vol. 40, no. 6, pp. 1397–1398, Jun. 2005. [12] D. K. Shaeffer and T. H. Lee, “A 1.5-V, 1.5-GHz CMOS low-noise amplifier,” IEEE J. Solid-State Circuits, vol. 41, no. 10, pp. 2359–2359, Oct. 2006. [13] J.-S. Goo, H.-T. Ahn, D. J. Ladwig, Z. Yu, T. H. Lee, and R. W. Dutton, “A noise optimization technique for integrated low-noise amplifiers,” IEEE J. Solid-State Circuits, vol. 37, no. 8, pp. 994–1002, Aug. 2002. [14] T.-K. Nguyen, C.-H. Kim, G.-J. Ihm, M.-S. Yang, and S.-G. Lee, “CMOS low-noise amplifier design optimization techniques,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 5, pp. 1433–1442, May 2004. [15] A. Bevilacqua and A. M. Niknejad, “An ultrawideband CMOS lownoise amplifier for 3.1–10.6-GHz wireless receivers,” IEEE J. SolidState Circuits, vol. 39, no. 12, pp. 2259–2268, Dec. 2004. [16] C.-T. Fu and C.-N. Kuo, “3 11-GHz CMOS UWB LNA using dual feedback for broadband matching,” in IEEE RFIC Symp. Dig., 2006, pp. 67–70. [17] M. T. Reiha and J. R. Long, “A 1.2-V reactive-feedback 3.1–10.6 GHz low-noise amplifier in 0.13-m CMOS,” IEEE J. Solid-State Circuits, vol. 42, no. 5, pp. 1023–1033, May 2007. [18] C.-T. Fu, C.-L. Ko, C.-N. Kuo, and Y.-Z. Juang, “A 2.4–5.4-GHz wide tuning-range CMOS reconfigurable low-noise amplifier,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 12, pp. 2754–2763, Dec. 2008. [19] H. Fukui, “Optimal noise figure of microwave GaAs MESFET’s,” IEEE Trans. Electron Devices, vol. ED-26, no. 7, pp. 1032–1037, Jul. 1979. [20] J. Borremans, P. Wambacq, and D. Linten, “An ESD-protected DC-to-6 GHz 9.7 mW LNA in 90 nm digital CMOS,” in IEEE ISSCC Tech. Dig., 2007, pp. 422–423. [21] R. Ramzan, S. Andersson, and J. Dabrowski, “A 1.4 V 25 mW inductorless wideband LNA in 0.13 m CMOS,” in IEEE ISSCC Tech. Dig., 2007, pp. 424–425. [22] B. G. Perumana, J.-H. C. Zhan, S. S. Taylor, and J. Laskar, “A 12 mW, 7.5 GHz bandwidth, inductor-less CMOS LNA for low-power, lowcost, multi-standard receivers,” in IEEE RFIC Symp. Dig., 2007, pp. 57–60. [23] T. Chang, J. Chen, L. A. Rigge, and J. Lin, “ESD-protected wideband CMOS LNAs using modified resistive feedback techniques with chip-on-board packaging,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 8, pp. 1817–1826, Aug. 2008. [24] A. Ismail and A. A. Abidi, “A 3–10-GHz low-noise amplifier with wideband LC-ladder matching network,” IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2269–2277, Dec. 2004. [25] R. Hu, “Wide-band matched LNA design using transistor’s intrinsic gate–drain capacitor,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 3, pp. 1277–1286, Mar. 2006. [26] P. R. Gray, P. J. Hurst, S. H. Lewis, and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 4th ed. New York: Wiley, 2001, ch. 11.



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[27] H. Rothe and W. Dahlke, “Theory of noisy fourpoles,” Proc. IRE, vol. 44, no. 6, pp. 811–818, Jun. 1956. Chang-Tsung Fu (S’00–M’09) received the B.S. degree in communication engineering, and the M.S. and Ph.D. degrees in electrical engineering from National Chiao Tung University, Hsinchu, Taiwan, in 1996, 2001, and 2009, respectively. His doctoral research concerned broadband low-noise amplification theory and circuit techniques for RF front-ends. In 2006, he was with the Intel Corporation, Hillsboro, OR, as an Intern, during which time his research was focused on CMOS WiFi T/R switch design. He is currently with the Intel Laboratory, Intel Corporation, as a Research Scientist dedicated to pathfinding wireless front-end design in advanced CMOS technology.

Chien-Nan Kuo (S’93–M’97) received the B.S. degree in electronic engineering from National Chiao Tung University, Hsinchu, Taiwan, in 1988, the M. S. degree in electrical engineering from National Taiwan University, Taipei, Taiwan, in 1990, and the Ph.D. degree in electrical engineering from the University of California at Los Angles (UCLA), in 1997. In 1997, he joined ADC Telecommunications, San Diego, CA, as a Member of Technical Staff with the Mobile System Division, where he was involved in wireless base-station design. In 1999, he joined Broadband Innovations Inc.

In 2001, he joined the Microelectronics Division, IBM. In 2002, he joined the faculty of National Chiao Tung University, Hsinchu, Taiwan, as an Assistant Professor. His research interests include reconfigurable RF circuit and system integration design, low-power design for the application of wireless sensor networks, and development of circuit-package co-design in the system-in-package (SiP) technique. Dr. Kuo was the recipient of the Best Paper Award presented at the 13th IEEE International Conference on Electronics, Circuits, and Systems in 2006.

Stewart S. Taylor (S’74–M’77–SM’99–F’08) received the Ph.D. degree in electrical engineering from the University of California at Berkeley, in 1978. He is a Senior Principal Engineer with the Intel Laboratory, Intel Corporation, Hillsboro, OR, where he has been since January 2003. His current research focus is on radio architecture and circuit design that leverages the strengths and compensates for the weaknesses of CMOS technology. Prior to joining the Intel Corporation, he was with Tektronix, TriQuint, and Maxim. He has taught part-time at Portland State University, Oregon State University, and the Oregon Graduate Institute for 30 years, and has served on the graduate committees of seven Ph.D. students. He has authored or coauthored over 50 publications. He holds 51 patents with 17 pending. Dr. Taylor served on the Program Committee of the International Solid-State Circuits Conference for ten years, chairing the Analog Subcommittee for four years. He was the conference program chair in 1999. He was an associate editor of the IEEE JOURNAL OF SOLID-STATE CIRCUITS. He was the recipient of the IEEE Third Millennium Medal for Outstanding Achievements and Contributions from the IEEE Solid-State Circuits Society.

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Investigations of AM, PM Noise, and Noise Figure in an SiGe-HBT Amplifier Operating in Linear and Nonlinear Regimes Nagore Garmendia and Joaquín Portilla, Member, IEEE

Abstract—A study of amplitude modulation (AM) and phase modulation (PM) noise has been carried out in an SiGe bipolar amplifier, operating in small- and large-signal conditions. Experimental and simulation results show that the evolution of flicker noise and white noise contributions versus carrier power is different in the AM and PM noise spectra. This indicates that specific mechanisms are involved in the conversion processes, thus producing AM and PM noise. The degradation of white noise, introduced by the amplifier as a function or carrier power, has been studied and characterized through the effective noise figure (NF) obtained from the white noise portion of the AM and PM spectra. As expected, the results show that white noise only produces identical contributions to AM and PM noises if the amplifier is operating in a small-signal regime. The effective NF in large-signal conditions needs to be determined from both the AM and PM noise spectra. An expression compatible with the standard IEEE definition of NF is proposed to extract the effective NF from the AM and PM noise spectra. Index Terms—Amplifier, amplitude modulation (AM) noise, bipolar transistor, flicker noise, noise figure (NF), nonlinear noise, phase modulation (PM) noise, white noise.

I. INTRODUCTION

OISE IN microwave amplifiers results in a limiting factor of sensitivity and resolution in communication, measurement, radio navigation, and other electronic systems. In most cases, the noise figure (NF) [1] is the only parameter employed to characterize the amplifier noise, but this only gives a measure of the white noise added by the amplifier when it is working under small-signal conditions. However, receivers must face a broad range of incoming signal power levels, which produces overdriving receiver desensitization [2], [3] and a degradation of noise performances. Amplitude modulation (AM) and phase modulation (PM) noises introduced by the amplifier depend on the carrier level [4]–[7], both in the near carrier (flicker) and white regions of the spectra. In particular, evolution with carrier

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Manuscript received June 16, 2009; revised October 01, 2009. First published March 15, 2010; current version published April 14, 2010. This work was supported in part by the Spanish Government under Project TEC2006-11077 and by The University of the Basque Country (GIU05/40). The authors are with the Electricity and Electronics Department, University of the Basque Country, 48080 Bilbao, Spain (e-mail: [email protected]; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042649

power of white noise added by the amplifier can experiment important changes, which can be quantified and compared to the linear case through the derivation of an effective or large-signal NF. This has been done by several authors from PM measurements as, for instance, in [4]–[8], and more recently, in [9]. This paper focuses on the characterization by measurements and simulations of AM and PM noise in an SiGe-HBT amplifier as a function of the carrier power and on the study of the effective NF derived from AM and PM noise spectral densities. Two specific measurement systems suitable for obtaining the amplifier AM and PM noise spectra have been employed. Measurement and simulation results are reported showing that AM and PM noise are only identical in the white noise region of the spectra and only if the amplifier is working under small-signal conditions. Under such conditions, the NF extracted from AM or PM noise spectra are coincident with the standard NF, obtained from standard characterization techniques, such as the -factor [10] or cold source [11]. Measurements and simulations show that the evolution with carrier level of both flicker and white noise contributions are different for the AM and PM cases. This indicates that the nonlinear mechanisms, which produce converted AM and PM noises, are particular to each kind of noise. As a consequence, as we will see later on, even in the white noise region, the effective or large-signal NF would be evaluated by taking into account not only the PM white noise contribution, as it has been usually done up to now, but also AM white noise. This paper is organized as follows. In Section II, the PM and AM noise measurement systems employed in this work are described. In Section III, PM and AM noise spectral density measurements of an SiGe-HBT amplifier are reported as a function of the input power level up to the 3-dB gain compression point. In Section IV, simulation results are employed to analyze and discuss the AM and PM noise evolution with the carrier in both the flicker and white regions of the spectra. Finally, in Section V, effective NF is calculated from AM and PM spectra as a function of carrier power, and the results are discussed. An expression, compatible with the standard IEEE definition of the NF, is proposed in order to extract the effective NF from the AM and PM noise spectra. II. PM AND AM NOISE MEASUREMENT SYSTEMS Two measurement systems have been implemented in order to study the evolution of both AM and PM noise in the presence of carrier signal under linear and nonlinear regimes, including flicker and white noise contributions.

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Fig. 1. Schematic diagram of the measurement system for the characterization of the amplifier PM noise spectrum.

Fig. 2. Schematic diagram of the measurement system for the characterization of the amplifier AM noise spectrum.

A schematic of the measurement system used to study the PM noise introduced by the device-under-test (DUT) as a function of the input carrier level is shown in Fig. 1. The system is able to provide the complete spectrum of the amplifier, including the flicker and white noise regions. When there is a phase difference of 90 between the two signals coming into the mixer, the system acts as a phase detector. The desired phase difference is obtained tuning the phase shifter. The differences between the phase fluctuations in the signals at the mixer input appear as voltage variations at the mixer output [12]–[14]. The doublebalanced mixer notably reduces the AM noise introduced by the system blocks, as well as it avoids AM to PM conversion in its own mixing process [12], [14]. On the other hand, the influence of the AM to PM conversion that takes place in the DUT itself can be diminished if two identical DUTs are simultaneously tested, one in each branch of the system [8], [13]. The overall system then provides a measure of the PM noise of two identical DUTs. It is assumed that their noise contributions are uncorrelated and identical. Anyway, it would be possible to determine the noise of each amplifier by measuring three equal DUTs in all pair combinations (1 versus 2, 1 versus 3, and 2 versus 3) with measurement system of Fig. 1. Finally, the LNA connected at the mixer output is included to improve the sensitivity of the measurement system. In order to study the AM noise power spectrum in the presence of the signal carrier, we have employed the measurement system of Fig. 2 [14], [15]. In the AM measurement system, the two signals at the mixer input are in phase. In this case, the double-balanced mixer acts as an amplitude detector since the mixer output voltage is proportional to the amplitude fluctuations of the signals coming into the mixer. In this configuration, the suppression of phase fluctuations can be higher than even 90 dB [14]. It is important to notice that, in this case, the AM noise from the signal source is not eliminated by the system itself so depending on the DUT and source AM noise levels, the amplifier AM noise measurements could be contaminated by the source AM noise [13], [16]. If necessary, an amplitude limiter can be introduced between the source and DUT, although in some cases,

Fig. 3. PM noise spectrum of DUT1 at different input signal levels.

the DUT itself acts as a limiter as it is driven into compression [13], [16]. III. PM AND AM NOISE POWER SPECTRUM MEASUREMENTS The PM and AM noise measurements of an SiGe-HBT amplifier are reported in this section. Measurements have been performed at 1-GHz frequency carrier for different input signal levels, driving the amplifier from the linear to nonlinear regime until a 3-dB gain compression level. The amplifier has a smallsignal gain of 20.6 dB and an NF of 1.7 dB at 1 GHz. The NF values have been measured by using the standard technique -factor [10]. Fig. 3 shows the experimental DUT PM noise spectral densities as function of input carrier level obtained with the system of Fig. 1. AM noise spectral density measurements of the DUT, obtained employing the measurement system of Fig. 2, are shown in Fig. 4. Moreover, both Figs. 3 and 4 include the measured PM and AM noise characteristics in each case of the system noise floor (see curve (7) in Figs. 3 and 4). These curves report the measured noise spectra when DUTs are removed from the system of Figs. 1 and 2. Although the AM and PM system noise floor have been characterized for different signal power levels, only the measured worst case for each system is shown. Measured AM and PM noise spectral densities show, as typical (see, for instance, [6] and [17]), flicker noise, in which the characteristic, and a white noise region noise level follows a at a given offset from the carrier. Note that in some curves of Fig. 4 there is a region in the flicker noise portion of the spectra patin which the measurements do not follow the typical tern. In this case, bumps appear as a consequence of the limitations of the own measurement system noise floor, principally due to the source AM noise. Some measurements, at low input power levels, are partially contaminated, but for highest power levels, when the amplifier operates under compression conditions [curves (4)–(6)], the amplifier flicker noise can be correctly determined for all ranges of frequencies offset from carrier. It is important to note that this fact does not impact the conclusions inferred from the noise behavior in the clean portions of the spectra. We have avoided in this set of measurements the

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Fig. 6. Evolution with carrier power of AM white noise (80–180 kHz) and PM white noise (200–300 kHz).

Fig. 4. AM noise spectrum of DUT1 at different input signal levels.

Fig. 5. Evolution with carrier power of AM and PM flicker noise @ 70-Hz offset from carrier frequency.

Evolution with carrier power of white AM and PM noises are presented in Fig. 6. The curves represent the white noise level measured in the flat region of spectra of Figs. 3 and 4. In this particular case, the white noise level is determined in the band of 200–300 kHz for the PM case, and 80–180 kHz for the AM case. The highest offset frequency of the measurement bandwidth is limited by the LNA gain-bandwidth product of the measurement system. For each DUT, LNA configuration is adjusted to optimize the system sensitivity and to guarantee the correct determination of the DUT white noise level. It can be observed that the absolute levels of AM and PM white noise are only similar when the DUT is working under small-signal conditions; i.e., when the nature of white noise produced by the amplifier is essentially additive. In Section IV, we will discuss these aspects in more detail. IV. ANALYSIS BY SIMULATION OF AM AND PM NOISE

use of a limiter since the limiter itself also injects noise into the system, which cannot be removed neither. The transition frequency between flicker and white noise portions of the AM and PM spectra, so-called corner or knee frequency, depends on several factors, such as the device technology, bias point, input power level, etc. [5], [7], [18]. In the measurements of Figs. 3 and 4, we can see that the corner frequency, in both the AM and PM spectra for the same input power level, is not necessarily the same. In general, for a given DUT, the levels of AM and PM flicker noise, both in linear and nonlinear regimes, can be very different [19], [20]. Absolute AM and PM flicker noise levels, measured at an offset of 70 Hz from carrier frequency, are represented in Fig. 5 as a function of input power. Measurements show that AM and PM flicker noise levels are different in the overall range of input power. The converted flicker noise increases with the power level and start to saturate under hard compression conditions. The relative increase of AM noise with input power is more important than in PM noise. Despite the fact that the amplifiers produce more PM flicker noise level, the AM flicker noise is not negligible in this case with regard to the PM values [21]. In any case, results indicate that the conversion mechanisms involved in the production of flicker AM and PM noises are particular to each kind of noise.

In this section, we study the evolution with the carrier level of AM and PM noise by means of simulations results obtained using the conversion matrix technique [22]. This approach is perfectly suitable to analyze the noise behavior in amplifiers in the presence of a carrier signal. The models provided by the manufacturers of the different components of the amplifier have been employed in the simulations. In particular, the transistor , shot, model is a typical nonlinear SPICE model including noise is and thermal noise sources [23]. In particular, the modeled through a current generator placed between the base and emitter of the intrinsic transistor. Simulation results showing the evolution with carrier power of AM and PM white noise spectra are presented in Fig. 7. It can be observed, as in measurements of Fig. 6, that absolute white noise levels are identical in AM and PM under a linear regime, but not in a nonlinear regime. Under strong gain compression, white noise stops rising and saturates, as in the AM case, or even decreases, as in the PM case. At highest input powers, it can be noticed that the levels in experimental data are quite lower compared to those obtained from simulations. It is important to note that the model employed in our simulations is a standard one, and moreover, that development of nonlinear models of bipolar devices including noise sources is an active research area [24]–[27]. A recent work showed that conventional models

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contrast with purely random additive noise, which contributes equally to AM and PM. Device and circuit parameters determine different levels for converted flicker and converted white noise contributions to AM and PM noises. V. EFFECTIVE NF

Fig. 7. Simulated AM and PM white noise as a function of carrier power.

NF is usually determined using well-known techniques such as -factor [10] or cold source [11] and gives a measure of the white noise added by the amplifier under linear operating conditions. On the other hand, AM and PM noise spectra measurements provide a more complete picture of the amplifier noise behavior, including flicker and white noise contributions. In particular, as far as the white noise region is concerned, the noise levels of the AM or PM spectra can be employed to obtain the standard NF. Several authors [4]–[9], [21] have determined the standard NF in the white region of the PM noise spectrum. At a given offset from the carrier frequency, where the noise is white, the NF can be obtained from the PM power spectrum from (1)

Fig. 8. Simulated AM and PM flicker noise at a frequency offset of 70 Hz as a function of carrier power.

not considering the correlation between shot noise sources can result in an overestimation of noise results [27]. With regard to the flicker noise portion of the spectrum (Fig. 8), it can be observed that, as carrier power increases, AM and PM flicker noise levels grow (as shown in Fig. 5 measurements). Under high compression, the noise levels saturate (AM case) or even decrease slightly (PM case), just as in the white noise case. Simulated flicker noise levels are, in this case, lower than the measured ones for both kinds of noise (AM and PM). Concerning the differences between measurements and simulations of the flicker noise spectra, it has to be considered that such a simple model, such as the employed model for flicker noise, is only able to qualitatively follow the complex noise up-conversion that takes place in the amplifier. In summary, both measured and simulated data show that AM and PM noise only have similar levels in the white region of the spectra and only if the amplifier works under a linear regime. It is important to note that, under such particular conditions, white noise is mainly additive and distributes equally between the carrier AM and PM noises (see, for instance, [5] and [17]). Nevertheless, as the amplifier is driven into compression, the evolution of white noise levels with carrier power is different for AM and PM noise, indicating that the involved conversion processes are particular to each case. On the other hand, flicker noise exhibit different levels for AM and PM cases even under a small-signal regime. This fact also confirms that the noise conversion processes are singular for AM and PM noises, in

where is one-half of the double-sideband (DSB) PM noise level in the white noise region of the spectrum expressed in is the amplifier input power in dBm, dBc/Hz units [28], refers to the amplifier NF in dB, and 177 is half of the room-temperature thermal noise per Hz, expressed in dBm. Expression (1) implicitly assumes that random white noise contributes equally to AM and PM noises. Therefore, in the same way, a similar expression can be employed to relate standard NF and white AM noise power spectrum (2) where the only difference with regard to (1) is , which represents one-half of the DSB AM noise determined in the white noise region of the spectrum and expressed in dBc/Hz [28]. As far as the amplifier is working in small-signal regime, (1) and (2) are coherent with the definition of standard NF, and the resultant NF is independent on the input power even if appears explicitly in such expressions. The fact is that and represent the ratio of a given noise power level, which remains constant under the linear operating regime, with regard to a carrier power (which can take any value). Independently of other considerations, it results from the definition of and that . they are functions of Expression (1) has been employed by several authors to evaluate an effective or large-signal NF with the aim of studying the degradation of amplifier performances with the carrier level (as, for instance, in [4]–[9]). Therefore, (1) and (2) let us study the effective NF behavior in the presence of the carrier as a function of the input power level from, respectively, PM and AM noise contributions. As we will see, the NF values obtained in such a way, from AM and PM, are only coincident when the amplifier is operating in small-signal conditions. Table I summarize the AM and PM white noise levels measured as a function of input signal level, i.e., and in dBc/Hz. It also includes the effective NF calculated using (1) and (2). White noise levels are taken from the flat region in AM and PM measured spectra, which is between 200–300 kHz for the

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TABLE I SUMMARY OF MEASUREMENTS OF AM AND PM WHITE NOISE AND EFFECTIVE NF FOR DUT1

PM spectra and between 80–180 kHz for the AM spectra in our case. Results in Table I show that effective NF, computed from both AM and PM white noise, remains constant under the linear regime and their values are coincident, within measurement accuracy, with the standard NF obtained using the -factor technique [10]. However, as the amplifier is driven into compression, effective NF increases considerably, up to more than 10 dB under 3-dB gain compression conditions. Moreover, effective NF values obtained from AM and PM measurements are significantly different. The problem of using (1) and (2) is that they implicitly consider that the “added” white noise contributes equally to AM and PM noise, independently of the carrier level. The fact is that “added” white noise is composed of additive and converted noise contributions. On the other hand, the mechanisms of noise conversion are specific to the modulation under consideration: AM or PM noises, as seen in Figs. 5–8. As a consequence, only under the linear regime can the converted white noise be neglected and white noise can be considered as purely additive. Additive white noise results in identical and uncorrelated AM and PM noises [17]. Let us define an effective NF, resulting from AM and PM contributions in the white noise region, as (3) represents the total white noise power per unit bandwidth available at the output port when the noise temperature of its is the portion of that input termination is 290 K. is generated by the input termination at temperature . Note and are functions of . is the result of AM that and PM noise contributions, and can be expressed as (4) where and represent the noise power obtained per unit bandwidth from, respectively, PM and AM spectra, expressed in linear units. is the normalized correlation factor between AM and PM noises. By the way, it can be noted that (4) is also valid in the flicker noise region near the carrier, where is mainly noise power. Effective NF of (3) can be rewritten as (5) where represent the total white noise power per unit band) with respect to the carwidth available at the output port ( rier power, and is expressed in dBc/Hz.

Fig. 9. Effective NF (dB) obtained from simulated PM, AM, and total white noise power.

It has to be noted that effective NF in (3) and (5) is, in particular, equivalent to the standard NF IEEE definition, as far as the amplifier is working under small-signal conditions. In such a case, white noise equally contributes to AM and PM noise and AM and PM noises are uncorrelated. Moreover, the correlation between AM and PM noise is usually neglected, even in the nonlinear regime. This is because it is usually assumed that it is small enough in the white noise region. Such an assumption is quite reasonable if one of the two contributions is less important than the other one, as is normally the case in microwave oscillators in which AM noise is often very small with respect to PM noise levels [17]. We have studied this point in more detail by simulations in our particular amplifier. Simulation results are shown in Fig. 9, corresponding to effective NF evaluated from (1), (2), and (5). The estimation of an effective NF from AM and PM results, but considering that correlation factor is negligible, is also included [see curve (4)]. This result is practically coincident with effective NF obtained from (5), thus indicating that correlation has a negligible effect in this particular case, even when the amplifier is working in compression. It can be observed that values are coincident in the linear regime. However, under large-signal conditions, the effective NF obtained from only AM or PM measurements result, respectively, underestimated or overestimated. The same applies for the effective NF values obtained from measurement data (Fig. 10). In Fig. 10, effective NF obtained from expressions and (1) and (2) show different values as the carrier power increases. Fig. 10 also shows effective NF computed from (5) (the correlation factor has been neglected) and, finally, standard NF, measured using the -factor approach, which has been included for reference. Conversion processes produce higher levels of PM than AM noise in our amplifier, as it has being observed in measurement and simulation results. Therefore, if (1) is used to obtain the effective NF, this results in an overestimated result. The opposite effect, an underestimation, appears when we use (2) to calculate the effective NF in the nonlinear regime, while the AM white noise is lower than the PM one. As a final remark, note that it is difficult to directly characterize the overall white noise power because the noise from the signal source and the noise floor of the measurement system will contaminate the measurement. On the other hand, if the

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Fig. 10. Effective NF (dB) obtained from measured PM and AM noise. Standard NF level is also included for reference.

amplifier is characterizsed without using a carrier signal, but driven it into compression by increasing the power of a white noise source at the input (as an extension of a typical NF measurement), the resultant white noise at the output will be composed of additive and converted noise contributions, but it will also contain intermodulation products. This is a result of the white noise components present at the input and passing through the amplifier nonlinearities. In this case, it is not possible to be talking about an effective NF, but other figure of merit, including added noise, but also intermodulation distortion of the input signal, must be considered, as in [29]. VI. CONCLUSION AM and PM noise, including flicker and white noise contributions, has been studied by measurements and simulations in an SiGe-HBT amplifier operated under small- and large-signal conditions. Simulations and measurements show that AM and PM noises are only coincident in the white noise region of the spectra, far enough from carrier frequency, and only under the linear regime when the white noise can be considered as purely additive. The AM and PM flicker noise levels are different even under small-signal working conditions. It has been also shown that as carrier power increases, driving the amplifier into compression, AM and PM white noise levels are different. This is due to the fact that the conversion noise mechanisms are particular for AM and PM noise. In our case, the tested bipolar amplifier produces higher levels of converted PM than AM noise. On the other hand, measurements and simulations have confirmed that the standard NF can be obtained from the white region of the PM or AM noise spectra. An important degradation of the amplifier effective NF in the nonlinear regime has also been demonstrated from measured and simulated results. Finally, as input power increases, the amplifier effective NF has to be obtained from the total white noise power, which is the result of white AM and PM noise contributions. In other cases, an effective nonlinear NF can be either underestimated or overestimated if it is only obtained from AM or PM measurements. REFERENCES [1] “Description of the noise performance of amplifiers and receiving systems,” Proc. IEEE, vol. 51, no. 3, pp. 436–442, Mar. 1963.

[2] R. G. Meyer and A. K. Wong, “Blocking and desensitization in RF amplifiers,” IEEE J. Solid-State Circuits, vol. 30, no. 8, pp. 944–946, Aug. 1995. [3] V. Aparin and L. E. Larson, “Analysis and reduction of cross-modulation distortion in CDMA receivers,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 5, pp. 1591–1602, May 2003. [4] A. Haiti, D. A. Howe, F. L. Walls, and D. Walker, “Noise figure vs. PM noise measurements: A study at microwave frequencies,” in Proc. IEEE Int. Freq. Control Symp., May 2000, pp. 516–520. [5] D. A. Howe and J. R. Ostrick, “100-GHz cooled amplifier residual PM and AM noise measurements, noise figure, and jitter calculations,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 11, pp. 2235–2242, Nov. 2003. [6] G. Cibiel, L. Escotte, and O. Llopis, “A study of the correlation between high-frequency noise and phase noise in low-noise silicon-based transistor,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 1, pp. 183–190, Jan. 2004. [7] O. Llopis, L. Escotte, S. Gribaldo, and C. Chambon, “Nonlinear noise measurement of microwave amplifiers HF noise parameters and residual phase noise,” presented at the IEEE Int. MTT-S Symp. Workshop, Jun. 2007. [8] N. Garmendia and J. Portilla, “Study of PM noise and noise figure in low noise amplifiers working under small- and large- signal conditions,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2007, pp. 2095–2098. [9] M. Jancovic, J. Breithbarth, A. Brannon, and Z. Popovic, “Measuring transistor large-signal noise figure for low-power and low phase-noise oscillator design,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 7, pp. 1511–1515, Jul. 2008. [10] “Measurement accuracy—The Y -factor method,” Agilent Technol., Santa Clara, CA, Appl. Note 57-2, 2004. [11] V. Adamian and A. Uhlir, “A novel procedure for receiver noise characterization,” IEEE Trans. Instrum. Meas., vol. IM-22, no. 2, pp. 181–183, Feb. 1973. [12] A. L. Lance, W. D. Seal, and F. Labaar, “Phase noise and AM noise measurements in the frequency domain,” Infrared Millim. Waves, vol. 11, pp. 239–289, 1984. [13] G. K. Montress, T. E. Parker, and M. J. Loboda, “Residual phase noise measurements of VHF, UHF, and microwave components,” IEEE Trans. Ultrason. Ferroelect. Freq. Control, vol. 41, no. 5, pp. 664–679, Sep. 1994. [14] F. L. Walls and E. S. Ferre-Pikal, “Measurement of frequency, phase noise and amplitude noise,” in IMS Wiley Encyclopedia of Electrical and Electronic Engineers. New York: Wiley, 1999, vol. 12, pp. 459–473. [15] E. S. Ferre-Pikal, “PM and AM noise measurement techniques,” presented at the Int. Freq. Control Symp. Tutorials, Jun. 2002. [16] G. Cibiel, M. Régis, E. Tournier, and O. Llopis, “AM noise impact on low level phase noise measurements,” IEEE Trans. Ultrason. Ferroelect. Freq. Control, vol. 49, no. 6, pp. 784–788, Jun. 2002. [17] B. Schiek, I. Rolfes, and H. J. Siweris, Noise in High-Frequency Circuits and Oscillators. Hoboken, NJ: Wiley, 2006. [18] M. C. D. Aramburu, E. S. Ferre-Pikal, F. L. Walls, and H. D. Ascarrunz, “Comparison of 1=f PM noise in commercial amplifiers,” in Proc. IEEE Int. Freq. Control Symp., May 1997, pp. 470–477. [19] F. L. Walls, E. S. Ferre-Pikal, and S. R. Jefferts, “1=f PM and AM noise in amplifiers and oscillators,” in Proc. ICTF, Feb. 2001, pp. 226–240. [20] F. L. Walls, E. S. Ferre-Pikal, and S. R. Jefferts, “Origin of 1=f PM and AM noise in bipolar junction transistor amplifiers,” IEEE Trans. Ultrason. Ferroelect. Freq. Control, vol. 44, no. 2, pp. 326–334, Mar. 1997. [21] F. G. Ascarraunz, E. S. Ferre, and F. L. Walls, “Investigations of AM and PM noise in X -band devices,” in Int. Freq. Control Symp., 1993, pp. 303–311. [22] V. Rizzoli, F. Mastri, and D. Masotti, “General noise analysis of nonlinear microwave circuits by the piecewise harmonic-balance technique,” IEEE Trans. Microw. Theory Tech., vol. 42, no. 5, pp. 807–819, May 1994. [23] P. Antognetti and G. Massobrio, Semiconductor Device Modeling With Spice. New York: McGraw-Hill, 1993. [24] J. C. Nallatamby, M. Prigent, M. Camiade, A. Sion, C. Gourdon, and J. J. Obregon, “An advanced low-frequency noise model of GaInP–GaAs HBT for accurate prediction of phase noise in oscillators,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 5, pp. 1601–1612, May 2005.

GARMENDIA AND PORTILLA: INVESTIGATIONS OF AM, PM NOISE, AND NF IN SiGe-HBT AMPLIFIER

[25] G. Niu, “Noise in SiGe HBT RF technology: Physics, modeling, and circuit implications,” Proc. IEEE, vol. 93, no. 9, pp. 1583–1597, Sep. 2005, Invited paper. [26] P. A. Traverso, C. Florian, M. Borgarino, and F. Filicori, “An empirical bipolar device nonlinear noise modeling approach for large-signal microwave circuit analysis,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 12, pp. 4341–4352, Dec. 2006. [27] M. Rudolph, F. Korndörfer, P. Heymann, and W. Heinrich, “Compact large-signal shot-noise model for HBTs,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 1, pp. 7–14, Jan. 2008. [28] IEEE Standard Definitions of Physical Quantities for Fundamental Frequency and Time Metrology—Random Instabilities, IEEE Standad 1139-1999, Mar. 1999. [29] P. M. Lavrador, N. B. de Carvalho, and J. C. Pedro, “Evaluation of signal-to-noise and distortion ratio degradation in nonlinear systems,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 3, pp. 813–822, Mar. 2004. Nagore Garmendia received the Electronic Physics degree and Ph.D. degree in electronics from the University of Basque Country (UPV/EHU), Bilbao, Spain, in 1999 and 2009, respectively. From 2000 to 2004, she was with Alcatel Espacio, Madrid, Spain, where she was involved in several projects related to transmitters for satellite communications. For four years, she was with the Electricity and Electronics Department, University of the Basque Country, as Researcher. In 2008, she joined the RF Group, European Spallation Neutron

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Source (ESS) Bilbao Consortium. Her research interests include noise in nonlinear microwave circuits and measurements techniques.

Joaquín Portilla (M’94) was born in St. Gilles-Croix de Vie, France, on May 23, 1967. He received the Electronic Physics degree from the University of Cantabria, Santander, Spain, in 1990, and the Ph.D. degree in electrical engineering from IRCOM, University of Limoges, Limoges, France, in 1994. From 1994 to 1997, he was with the Communications Engineering Department, University of Cantabria, where he was involved in the design of hybrid and monolithic microwave circuits for communication systems. In 1997 and 1998, he was with the Instituto de Física de Cantabria (IFCA), Santander, Spain, where he was involved in the analysis and design of low-noise circuits and receivers for microwave remote sensing. In 1998, he joined the Electricity and Electronics Department, University of the Basque Country, Bilbao, Spain, as an Associate Professor, where he is currently engaged in the analysis and design of RF and microwave circuits and systems.

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Design of an On-Chip Balun With a Minimum Amplitude Imbalance Using a Symmetric Stack Layout Heng-Ming Hsu, Member, IEEE, Jhao-Siang Huang, Szu-Yuan Chen, and Szu-Han Lai

Abstract—This study develops a compact balun layout to minimize amplitude imbalance. Three baluns with different metal layers are fabricated using 0.13- m CMOS technology and their imbalance performance evaluated. Measurement made using eight metal layers in coil windings at a particular layout reveal that the proposed device exhibits minimal amplitude and phase imbalance of 0.2 dB and 0.5 with a chip outer dimension of 100 m. Index Terms—Balun, couple line, imbalance, on-chip.

layers fabricated in 0.13- m CMOS technology. The proposed layout is designed to minimize imbalance and occupy a chip area of only 100 m . Measurements indicate that amplitude and phase imbalances of 0.2 dB and 0.5 are achieved. The layout was analyzed to elucidate the performance of the proposed design. A coupled line theory is developed to calculate even- and odd-mode capacitances. II. LAYOUT DESIGN FOR PROPOSED BALUN

I. INTRODUCTION

W

ITH THE rapid growth of wireless communication, the demand for portable RF integrated circuit (RFIC) products has motivated increasing research into on-chip components. The balun transforms signals between balanced and unbalanced ports during circuit operation. Generally, analog/RF circuits require balanced inputs and/or outputs to reduce noise, suppress harmonic signals, and increase their dynamic range. Therefore, a balun is an important component in analog/RF circuits to perform the functions of phase shift, power division, and push–pull, among others [1], [2]. The research of baluns is an essential work to design a state-of-art circuit for analog/RF applications. Marchand first proposed a balun based on a transmission line with a length of a quarter-wavelength line to realize unbalanced outputs [3], [4]. The implementation of a quarter-wavelength line into an integrated circuit (IC) chip at 5 GHz, however, was difficult. The planar transformer was developed, therefore, to produce balun behavior [5], [6]; the planar structure required a large chip area. Most recently, the spiral-Marchand configuration was proposed [7]; it also consumes a large chip area because of its planar layout. To overcome these issues, this study presents a novel balun. The proposed device employs magnetic coupling among three coil windings in a stack layout. These coils utilize eight metal

Manuscript received November 05, 2009; revised January 06, 2010. First published March 08, 2010; current version published April 14, 2010. This work was supported by the National Science Council, Taiwan, under Grant NSC-982220-E-005-001. The authors are with the Department of Electrical Engineering, National Chung-Hsing University, Taichung 402-27, Taiwan (e-mail: hmhsu@nchu. edu.tw; [email protected]; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2041590

Fig. 1 displays a 3-D diagram of the proposed balun that yields two symmetric outputs, high coupling, and a small chip area. The balun has three terminals: black, white, and gray colors are used to represent the coils in port 1, port 2, and port 3, respectively. Notably, the left and right sections of the layout are symmetrical about the ground node. The proposed device was fabricated using 0.13- m CMOS technology. Therefore, the input terminal (coil-1) begins from the P terminal using a half-coil in the M-8 layer, some of the coil is intertwined with port 2 (coil-2) from the topmost layer (M-8) to the bottommost layer (M-1), and the coil then returns from the M-1 layer, as shown in Fig. 1(b). The proposed layout comprises two sections: section-A on the left side and section-B on the right side providing symmetrical outputs, as illustrated in Fig. 1(b). The input coil enters section-B from section-A. Notably, the current direction in coil-2 and coil-3 opposes that in coil-1, providing a 180 phase difference between the two corresponding output terminals. These two outputs are symmetrical in a line through the ground node. When coil-1 enters section-B in the return layer, both coil-1 and coil-3 rise from M-1 to M-8 with windings similar to those in the above procedure. Finally, coil-1 ends at the P-terminal, as presented in Fig. 1(a). To conveniently elucidate the performance of the device, Fig. 1(c) depicts the equivalent circuit of the proposed balun. , , and represent the self-inductances in port 1, port 2, and port 3, respectively. and denote the mutual inductances between port 1 and port 2, and port 1 and port 3, respectively. It should be noted that the corresponding dot and inductances opposes each symbols between the other and maintain a 180 phase difference between the two output terminals. The input excitation (port 1) feeds from the primary coil, denoted by the P and P-nodes, is a differential signal. The output terminals (port 2 and port 3) are represented by the S and T nodes; their common node is represented by a ground in Fig. 1(c).

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The phase imbalance usually represents the difference of two output phases. To conveniently evaluate the value in a balun deis characterized using the phase vice, the phase imbalance difference to subtract 180 degrees

(2)

To examine the balun imbalance comprehensively, the evenand odd-mode capacitances used in couple line are employed. The three-port -parameter for balun characterization is derived in terms of admittance. After a lengthy manipulation [8], the insertion loss of two output signals ( and ) can be derived from even- and odd-mode admittances (3) (4) where represents the characteristic admittance, and are expressed as even-mode and odd-mode mittances of the following forms:

and ad-

(5) Substituting (3)–(5) into (1) yields the amplitude imbalance using the expression for the magnitude scale

(6) Fig. 1. (a) 3-D diagram of proposed balun. Black, white, and gray colors represent primary, secondary, and tertiary coils, respectively. (b) Layout of return layer in proposed balun. Arrows indicate direction of current flow in these three coils. Outer dimension (O.D.), inner dimension (I.D.), and metal width (W) are shown in this graph. (c) Equivalent circuit of proposed balun.

where is defined as the coupling factor in couple line theory [8]. Apparently, the large coupling factor expresses the small amplitude imbalance in this formula. IV. EXPERIMENTAL RESULTS

III. CHARACTERIZATION OF AMPLITUDE IMBALANCE To characterize the balun performance, the amplitude imbalance is expressed in terms of the insertion loss of two and ) on logarithmic or magnitude scales outputs (

dB

magnitude

(1)

Three devices with different return layers are implemented to investigate the device performance. The return layer employs the M-1, M-3, and M-5 films, denoted , , and , respectively. Additionally, the values of the metal width (W), inner dimension (I.D.), and outer dimension (O.D.) retain identical values in the three baluns to compare performance impartially. The layout parameters are, therefore, designed as m, m, and m in the devices. All devices were fabricated using 0.13- m CMOS tech. It uses nology. Fig. 2 presents a die photograph of device

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Fig. 4. Magnitude and phase imbalances of BL device.

+

Fig. 2. Die photograph of BL device. P and P- represents port 1; S ground represents port 2, and T and ground represents port 3.

+

Fig. 3. Measurement of magnitude and phase of S devices.

and S

in BL

+ and

TABLE I PERFORMANCE COMPARISON OF BALUNS HEREIN AND IN THE REPORTED LITERATURE

 BL

four GSG pads to equip the proposed balun. The measurement is made using a four-port Agilent E8362B network analyzer and a probe station. The -parameters were obtained by applying the de-embedding procedure to remove the undesired pads and interconnection parasitics. To eliminate the connecting line between the device and probing pad, the two-step de-embedding procedure is adopted to obtain the intrinsic device behavior [9]. and for Fig. 3 depicts the magnitude and phase of devices. It indicates that the device has an insertion loss of 7.3 dB and a phase difference of 180 within a frequency range up to 11 GHz. The figure reveals a little noticeable insertion loss of this balun. The goal of the device design is to minimize the chip area. The large loss is then predictable because of the adoption of a narrow piece of metal (5 m) and a long coil (eight metal layers) within a chip area of 100 m . Fig. 4 depicts the magnitude and phase imbalances of these values in these devices are less than baluns. Clearly, the 0.35 dB. In particular, the denotes the lowest imbalance, with a value of less than 0.2 dB in the range from 0.1 to 11 GHz. values of these baluns are within and are repreThe sented in the right axis of Fig. 4.

The excellent and values result from the compact layout design with symmetrical output signals. Table I compares the balun performance herein with the reported works. The balun in this work yields excellent amplitude and phase imbalances within a small chip area. Notably, the chip area is an essential consideration during the integration of on-chip passive device into the RF circuit, especially when implemented in nanometer CMOS technology. V. ANALYSIS OF EVEN- AND ODD-MODE CAPACITANCES To evaluate admittances in (6), the equivalent capacitances in even and odd modes are calculated from the device cross section. Fig. 5 presents the metal layers of section-A for the device. The black and white colors represent the primary and secondary coils, respectively. Two kinds of capacitors are classified between the primary and secondary coils. The first is the same layer capacitor , where – refers to the number of metal , where layers. The second is the different layer capacitor, – denotes the number of metal layers. Fig. 5 depicts the capacitors that correspond to identical and different layers. To

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Fig. 6(a) displays the equivalent capacitor in even-mode excitation. Since the primary coil is excited by a differential signal, the center point (H-point) can be treated as the point of zero voltage in the return layer. From point A to point B is only capacitor . At point B, the capacitor comprises and capaccapacitor is connected in itors in parallel. At point C, the series with the capacitor at point B. Using a similar procedure, (7) yields the capacitance of the equivalent capacitor from point A to point H as follows:

(7)

Fig. 5. Equivalent capacitors of section-A in BL device. Points A–H indicate the corresponding metal layers of primary coil.

In odd-mode excitation, the electric field has an odd symmetry at the center point. Hence, a null voltage exists between primary and secondary coils, producing a ground point at the middle of the overlap capacitor in the same metal layer. The resulting capacitance is twice that of the overlap capacitor. Since the ground is at the middle point of the overlap capacitor, the and different layer total capacitor includes the same layer . Fig. 6(b) displays the equivalent capacitor in oddmode excitation. From point A to point B, the capacitor consists and capacitors in parallel. From point B to point of , and capacitors in C, the capacitor consists of parallel. Using a similar scheme, the capacitor from point A to point H is calculated as

(8)

Fig. 6. (a) Even-mode capacitor of section-A in capacitor of section-A in BL device.

BL

device. (b) Odd-mode

TABLE II EVEN- AND ODD-MODE CAPACITANCES, COUPLING FACTOR, AND AVERAGE AMPLITUDE IMBALANCES OF PROPOSED DEVICES

calculate the capacitance between the primary and secondary coils, the primary coil is adopted as a reference coil. Hence, denote the locations of the the corresponding letters M-8–M-1 layers in the primary coil. In even-mode excitation, the electric field has an even symmetry at its center point. This leads to an open circuit at the same metal layer between primary and secondary coils. The equivalent capacitance, therefore, does not involve capacitors.

Since the layout is symmetrical at the center point of the return layer, the capacitance in section-B equals that in section-A. Therefore, the total capacitance is that of these two sections in parallel. Finally, the total capacitances in the even and odd device are and , respectively. modes for the Since the layouts of and devices are identical to device, the calculation of even- and odd-mode that of the device. The capacitances is similar to those of layouts vary in the location of the return layer. Using the and devices previous method, the ground points of are point F and point D, respectively, as shown in Fig. 5. Consequently, the corresponding capacitances of the and devices can be calculated by the preceding approach. Last the associated capacitances of these baluns are acquired from the process parameters of 0.13 m technology (http://www.umc. com). Table II presents the calculated capacitances of these dedevice has vices in even and odd modes. Apparently, the not only the lowest even-mode capacitance, but also the highest odd-mode capacitance; this is because of the bottommost return layer (M-1) in this device. The characteristic impedance of a device is calculated [8], where and represent the phase by velocity and capacitance, respectively. Based on the assumption

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that the quasi-TEM wave is excited in this frequency range, the phase velocity is identical in even- and odd-mode excitations. and The relationship between the coupling factor and values is derived using the following analytical formula:

(9) The advantage of the analytical form is that it can help to characterize the amplitude imbalance using the even- and odd-mode and values capacitances. Substituting the calculated into (9) yields the coupling factor (C), which is also listed in Table II. The proposed layout configuration yields a high C value; the C value of the devices herein is at least 0.944. In particular, device has the highest C value, 0.984, as indicated in the Table II. This result is predictable because eight metal layers were was small because of the connected capacitors used. The was high because of the shunt connection in series; the of eight metal layers in the device. A comparison of imbalances of the proposed baluns in Fig. 4 indicates has the smallest average imbalance, 0.163 dB, in that this experiment. The measurements demonstrate the feasibility of characterization on the proposed baluns using couple line theory.

[3] N. Marchand, “Transmission-line conversion transformers,” Electronics, vol. 17, pp. 142–145, 1944. [4] Z.-Y. Zhang, Y.-X. Guo, L.-C. Ong, and M.-Y. W. Chia, “A new planar Marchand balun,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2005, pp. 1207–1210. [5] J. Wang, W. J. Zhang, and Z. P. Yu, “The design of a planar-spiral transformers balun used in RF/MW based on 0.13 m CMOS process,” in Int. Microw. Millimeter Wave Technol. Conf., Apr. 2007, pp. 1–4. [6] J. R. Long, “Monolithic transformers for silicon RF IC design,” IEEE J. Solid-State Circuits, vol. 35, no. 9, pp. 1368–1382, Sep. 2000. [7] Q. Sun, J. Yuan, V. Vo, and A. Rezazadeh, “Design and realization of spiral Marchand balun using CPW multilayer GaAs technology,” in Proc. 36th Eur. Microw. Conf., 2006, pp. 68–71. [8] D. M. Pozar, Microwave Engineering, 3nd ed. New York: Wiley, 2005. [9] C.-H. Chen et al., “A general noise and S -parameter deembedding procedure for on-wafer high-frequency noise measurement of MOSFETs,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 5, pp. 1004–1005, May 2001. [10] W.-Z. Chen, W.-H. Chen, and K.-C. Hsu, “Three-dimensional fully symmetric inductors, transformer, and balun in CMOS technology,” IEEE Trans. Circuits Syst., vol. 54, no. 7, pp. 1413–1423, Jul. 2007. [11] I. C. H. Lai and M. Fujishima, “An integrated 20–26 GHz CMOS up-conversion mixer with low power consumption,” in Proc. 32nd Eur. Solid-State Circuits Conf., 2006, pp. 400–403. [12] K. Liu, R. Emigh, and R. C. Frye, “Small form-factor integrated balun with complex impedance matching,” in IEEE MTT-S Int. Microw. Symp. Dig., 2008, pp. 1239–1242. [13] M. Shimozawa, K. Itoh, Y. Sasaki, H. Kawano, Y. Isota, and O. Ishida, “A parallel connected Marchand balun using spiral shaped equal length coupled lines,” in IEEE MTT-S Microw. Symp. Dig., 1999, pp. 1737–1740.

VI. CONCLUSIONS This study develops a magnetic coupled layout that minimizes amplitude imbalance of an on-chip balun. Three baluns were fabricated using 0.13- m CMOS technology. Measurements demonstrate that a particular layout yields amplitude and phase imbalances achieve to the values of 0.2 dB and 0.5 and has chip outer dimension of 100 m. The behavior of the proposed device was characterized using the couple line theory. The analysis of layout capacitance to calculate the coupling factor is consistent with the measured amplitude imbalance of the proposed devices. Results of this study provide a valuable reference for the design of on-chip baluns used in wireless products. ACKNOWLEDGMENT The authors would like to thank the National Chip Implementation Center (CIC), Hsin-Chu, Taiwan, for chip measurement. The authors also acknowledge T. Knoy, The Chinese On-Line Writing Laboratory, Hsin-Chu, Taiwan, nd express their appreciation for his editorial assistance. REFERENCES [1] H.-K. Chiou and T.-Y. Yang, “Low-loss and broadband asymmetric broadside-coupled balun for mixer design in 0.18-m CMOS technology,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 4, pp. 835–848, Apr. 2008. [2] S.-C. Tseng, C.-C. Meng, C.-H. Chang, C.-K. Wu, and G.-W. Huang, “Monolithic broadband Gilbert micromixer with an integrated Marchand balun using standard silicon IC process,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 12, pp. 4362–4377, Dec. 2006.

Heng-Ming Hsu (M’03) received the Ph.D. degree in electrical engineering from National Taiwan University, Taipei, Taiwan, in 2003. In 1996, after serving in the Chinese Air Force, he passed the national examination for civil servant and then joined a government organization, Taipei Rapid Transit Corporation, Taipei, Taiwan. In 1997, he was with Research Development, Taiwan Semiconductor Manufacturing Company (TSMC), Hsin-Chu, Taiwan, where he was responsible for the mixed-signal/RF program of the Communication Technology Division. During his time with TSMC, he devoted himself to the research of integrated devices in bulk silicon for RF application, includes active devices (RF CMOS and power CMOS) and passive devices (inductors, transformers, capacitors, varactors, transmission lines, etc.). With TSMC, he pioneered RFCMOS device characterization and participated in the setup and development of silicon RF devices from 0.25-, 0.18-, 0.13-m, and 90-nm technologies. Since August 2003, he has been with the faculty of the Department of Electrical Engineering, National Chung-Hsing University, Taichung, Taiwan. From August 2003 to January 2007, he was an Assistant Professor, and is currently an Associate Professor. He holds six U.S. and four Taiwan patents. His current research interests include the development of RF device and circuit design applied to wireless communication using CMOS technology.

Jhao-Siang Huang received the B.S. degree in electronic engineering from Hua Fan University, Taipei, Taiwan, in 2008, and is currently working toward the M.S. degree in electrical engineering at National Chung Hsing University, Taichung, Taiwan. His research concentrates on the characterization of RF CMOS transformer.

HSU et al.: DESIGN OF ON-CHIP BALUN WITH MINIMUM AMPLITUDE IMBALANCE

Szu-Yuan Chen received the B.S. degree in electrical engineering from Feng Chia University, Taichung, Taiwan, in 2007, and the M.S. degree in electrical engineering from National Chung Hsing University, Taichung, Taiwan, in 2009. He is currently fulfilling his military obligation. His research is focused on the CMOS balun.

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Szu-Han Lai received the M.S. degree in electrical engineering from National Chung Hsing University, Taichung, Taiwan, in 2008. He is currently involved with research on CMOS transformers.

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A Resistively Degenerated Wideband Passive Mixer With Low Noise Figure and High IIP2 Namsoo Kim, Member, IEEE, Vladimir Aparin, and Lawrence E. Larson, Fellow, IEEE

Abstract—A CMOS mixer whose linearity is maintained for ) a wide frequency range is presented. Transconductance ( boosting methods, such as input cross-coupling, current reuse complementary input, and back gate connection, are used to improve overall gain and noise performance. A source-degenerated passive mixer is used to improve noise figure (NF) by increasing the equivalent mixer output impedance. The operating frequency is from 1.55 to 2.3 GHz. The measured performance shows less than 9.5 dB double-sideband (DSB) NF, more than 22-dB voltage gain, better than +50 dBm uncalibrated IIP2 , and higher than +7 dBm of IIP3 , while consuming only 10 mW from a 2-V supply. A 0.18- m Si CMOS process with metal–insulator–metal capacitors is used. Index Terms—CMOS, code-division multiple access (CDMA), degenration, linearity, noise figure (NF), passive mixer, Volterra series analysis.

I. INTRODUCTION MOS processes have been scaled to shorter gate lengths to improve overall area and power consumption, while . Even though a achieving higher unity gain frequency shorter gate length is helpful for better RF performance, it noise) [1]–[4]. Especially introduces more flicker noise ( for narrowband wireless systems, such as cellular systems, the noise seriously degrades noise figure (NF) performance. There have been some efforts to improve noise performance of active mixers [5]–[7]. A pMOS switching pair, rather than an nMOS switching pair, is reported in [5]. A method of flicker noise cancellation is introduced in [6]. Another way to noise is by adopting longer channel length demitigate noise is inversely proportional to the channel vices, since length [8]. However, using nonminimum-channel-length fieldeffect transistors (FETs) will introduce other problems. The parasitic capacitance associated with the gate will be increased, degrading RF gain and noise performance [9]. noise contribution is to have The best way to alleviate the zero dc current flowing in the switching core [10]. This leads to a passive mixer application. There are several drawbacks to the use of a passive mixer. The well-known characteristic of poor thermal noise performance is the main concern [11].

C

Manuscript received May 15, 2009; revised December 07, 2009. First published March 25, 2010; current version published April 14, 2010. This work was supported by the University of California (UC) at San Diego’s Center for Wireless Communications and by a UC Discovery Grant. N. Kim and L. E. Larson are with the Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA 92093 USA (e-mail: [email protected]; [email protected]). V. Aparin is with Qualcomm Inc., San Diego, CA 92121 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042644

Fig. 1. Conventional passive mixer.

This paper describes wideband operation of a passive mixer with low NF and highly linear performance, while consuming 10 mW from a 2-V supply. Section II reviews the conventional passive CMOS mixer architecture and related issues. Section III introduces and analyzes an improved resistively degenerated passive mixer topology. Section IV describes individual block design. Section V presents measured results. Section VI concludes this paper. II. CONVENTIONAL CMOS PASSIVE MIXER DESIGN There have been many publications using a passive mixer architecture to avoid noise issues [12]–[19]. The most common CMOS passive mixer architecture employs a “current input and current output” approach, with a transimpedance amplifier (TIA) output stage to provide a low impedance at the mixer output, as shown in Fig. 1[16]. This approach will exhibit a high NF due to conversion loss and well-known TIA noise amplification [12], i.e.,

(1) where is the TIA output noise voltage due to the noise generated by the TIA, is the input-referred TIA noise voltage, is the feedback resistance of the TIA stage, and is the equivalent mixer output resistance. As can be seen from (1), needs to be as high as possible to reduce noise amplification of the TIA input-referred noise. The mixer equivalent circuit, used to calculate , which is a function of the switched-parasitic capacitance and mixer turn-on resistance, is shown in Fig. 2. When the mixer switch is operating, the time-domain response of an input voltage step on the parasitic capacitances would be

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Fig. 3. Proposed resistively degenerated passive mixer.

Fig. 2. Equivalent circuit for R

calculation for a dual-channel mixer.

and the charge stored on the parasitic capacitances will be

(3) is the parasitic capacitance from the output stage of where the preceding stage, is the parasitic capacitance from the mixer cores, is the turn-on resistance of each mixer FET, is the capacitance multiplication factor, which is two for a single-channel and four for a dual-channel ( and ) in a doubly balanced mixer, and is a resistance multiplication factor (two), which is coming from two series switches in the switched capacitor. The capacitance multiplication factor arises from the parallel connection of the FETs in the doubly-balanced mixer. For an mixer, there are four parallel connections. From (3), the equivalent mixer output resistance, which can be expressed as a switched-capacitor resistance [20], is given by

• A smaller resistance results in a larger overall chip area, since the TIA feedback capacitance needs to be increased to maintain the same pole location. • A larger capacitance will require a higher output current from the TIA, since the current requirement is proportional to the capacitance. • A smaller resistance leads to a lower gain from (5). Therefore, designing a very low-noise TIA stage would be challenging, while simultaneously maintaining low power consumption and a small die area using the conventional approach. Section IV presents an improved mixer approach that minimizes this limitation. III. RESISTIVELY DEGENERATED PASSIVE MIXER To avoid TIA noise amplification, the previous section showed that it is essential to obtain a high mixer output impedance. However, the output impedance of the mixer is limited by the operating frequency and parasitic capacitance, from (4). The proposed improved passive mixer with added resistance is shown in Fig. 3. The difference between the conventional and proposed passive mixer is illustrated in Fig. 4. A. Increased Output Impedance

(4) For example, with 500 fF of total parasitic capacitance and 2-GHz operation, would be 250 for a doubly balanced mixer in a dual-channel application. The mixer voltage gain can be estimated by

The proposed passive mixer can provide a higher equivalent mixer resistance by separating the parasitic capacitance of the stage and mixer core. Then the equivalent resistance can be modified from (4) to be

(5)

(6)

is the transconductance of the preceding stage and where is the switching efficiency. For example, to obtain 25–35 dB of gain with 20 mS of transconductance, is calculated to be 2–5 k and the TIA noise will be amplified by a factor of 80–440 from (1). This factor could be reduced by moving to a smaller value of , but this is problematic because of the following reasons.

As can be seen from (6), the equivalent mixer output resistance is increased by inserting . Usually, the parasitic capacitance from the preceding stage is larger than the mixer , since the size of the mixer core is relacore parasitic tively small compared with the stage due to speed considcan be boosted if the effect of can erations. Therefore, be minimized. Assuming the time constant formed by and

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Fig. 5. Simulated and calculated proposed mixer output impedance and noise amplification factor ratio at 2 GHz.

Fig. 4. Difference between conventional and proposed mixers. (a) Conventional passive mixer and (b) its equivalent circuit. (c) Source-degenerated passive mixer and (d) its equivalent circuit.

is larger than the LO period, and (6) can be approximated by

can be neglected Fig. 6. Equivalent circuit diagram for IM calculation. (a) Full mixer model. (b) Simplified equivalent circuit.

(7) The noise amplification factor ratio can be defined as the ratio of the proposed mixer’s TIA noise amplification factor compared to that of the conventional mixer, i.e.,

(8)

Simulated and calculated results for the mixer output impedance and the TIA noise amplification factor ratio are shown in Fig. 5. A 3.5-k feedback resistance value is used to calculate . As expected from (7), and shown in Fig. 5, the output impedance of the proposed passive mixer saturates at value determined by (7) when is increased. The decreases rapidly with increasing , and reaches a limit when 500 . B. Improved

Performance

Another issue is that the RF current from the preceding stage cannot be split with perfect balance between the two paths of the mixer, due to mismatches in the mixer cores. This effect will cause strong second-order distortion in passive mixers [21]. By adding , the current split can be better balanced (improving the second-order distortion), since a polysilicon resistor can be made with a large aspect ratio and excellent matching, which will reduce the overall resistance mismatch. Therefore, the total resistance seen by the RF source at the mixer input

. The variation of the total would be proportional to resistance can be smaller than a conventional passive mixer if . A simplified first-order equivalent circuit used to calculate the product is shown in Fig. 6. In Fig. 6(a), the model assumes an ideal switch for the passive mixer, with turn-on resistance followed by a weakly nonlinear conductance, where the nonlinearity coefficient can be considered only up to third order [22]. The output drain-to-source conductance and parasitic capacitance models the output of the stage. The FET mismatch between the two paths is modeled as a [21] and the degeneration turn-on resistance difference resistor mismatch is . There is another nonlinear effect due to the finite rise and fall time difference, and the nonideal duty-cycle of the LO [21]. However, for this simplified analysis, an ideal 50% duty cycle nonoverlapping rectangular waveform is assumed. Using Fig. 6(a), it can be shown that the leaked direct distortion at , due to the mismatch, dominates the frequency-translated at and . Based on this, along with the assumption of a nonoverlapping rectangular LO waveform, the nonlinear model of the passive mixer for a single side (positive or negative) can be modeled as in Fig. 6(b), where the nonlinear conductance is modeled as a voltage-controlled current source. The linear degeneration resistance can be combined with the nonlinear coefficient of the switch to be expressed as (9)

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The mismatch between the positive and negative sides of the mixer can be modeled by (10a) (10b) and output current can The nonlinear voltage be expressed as a Volterra Series, which is a function of the input current [22]

(11a) (11b) where and are the Laplace transforms of the th-order Volterra kernels. For the calculation, only the second-order Volterra kernel needs to be calculated. Using the nodal equation and excitation method in [22], and assuming and , the second-order Volterra kernels for each mixer branch are

(12a)

(12b) From (12), the differential second-order Volterra kernel (which determines the ) is given by (13), shown at the bottom of this page. This result can be used to predict the improvement as a function of and a given mismatch. The prein as a function of dicted and simulated improvement of is plotted in Fig. 7. The turn-on resistance mismatch is assumed mismatch is to be 1% for median device size [23], and the assumed to be 0.1%. As can be seen, the trends in the calculated improvement in (13) agree well with the trends in the simulated improvement and clearly demonstrates the improvement with the new approach, when the degeneration resistance in is larger than 400 . C. Limitation of Using Large Degeneration Resistance Even though the degeneration resistance is helpful for improving NF and performance, the value of degeneration resistance cannot be increased indefinitely due to following reasons.

Fig. 7. Calculated and simulated IM improvement as a function of 2 GHz.

R

at

• The signal path gain will decrease with larger , since stage will the RF current entering the mixer from the be decreased, due to higher mixer input impedance . • The extra resistor in the RF path can generate a large signal swing at the mixer input and degrade linearity. • The degeneration resistor itself generates additional thermal noise, with a larger resistance value. value based on the preTherefore, there is an optimum stage output impedance and the mixer core turn-on ceding resistance. The design procedure to choose the optimum value will be discussed in Section IV. IV. MIXER DESIGN The complete simplified mixer schematic is shown in Fig. 8. It consists of an input transconductance stage, the resistively degenerated passive mixer core, and a TIA. A. Transconductance Stage The transconductance stage converts the RF input voltage to current. Due to the wideband (1.55–2.2 GHz) operation requirement, the input stage is designed with a common gate (CG) topology. The CG input stage can provide wideband operation, due to its resistive input impedance, but there is an NF penalty. To improve the NF performance of the CG stage, the cross-coupled method is used [24]. However, the cross-coupled method can boost the by only a factor of two at best. The can be boosted further with a current reuse complementary input stage and back-gate connection, as shown in Fig. 9. Transistor and provide transconductance and input matching, and are input pFET transistors, which provide additional transconductance without consuming extra

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Fig. 11. Calculated and simulated NF of transconductance stage at 2 GHz.

Fig. 8. Simplified schematic diagram of the mixer.

tion from the input to the gate of the nFET and pFET and is given by

(15) If is zero, becomes positive, which means that the gate voltage will have a portion of the source voltage superimposed on it, which will degrade the transconductance. However, asis very large, then and is suming

(16) It is clear from (16) that the transconductance and input capacitance is increased by a factor of two. The total transconductance of the stage is therefore Fig. 9. Simplified schematic of the transconductance stage.

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Fig. 10. Equivalent schematic of the transconductance stage used to calculate input impedance and effective transconductance.

With the assumption of infinite and , the can be three times the conventional CG stage [25]. Neglecting the FET gate-induced noise for FETs and assuming an input-matching condition of , the NF of the proposed transconductance stage can be expressed as (18)

current, is an input cross-coupling capacitor, is a self-bias resistor for the pFETs, and is the bias choke inductor. The half equivalent circuit of the stage is shown in Fig. 10. From Fig. 10, it can be shown that the input impedance of the proposed stage is

where is bias-dependent constant, which is usually 2/3 for is drain–source conductance long-channel device [2], and at . Equation (18) can be modified further, if , to yield (19)

(14) where is the transconductance of the nFET, is the gate-to-source capacitance of the nFET, is the gate-tosource capacitance of the pFET, is the coupling capacitance from the negative input side, and is the voltage transfer func-

The calculated and simulated noise figure of transconductance stage is depicted in Fig. 11, where is used to account for the short-channel device effect [2]. As can be seen, the calculated and simulated values agree well and the noise factor of the CG transconductance stage can be significantly improved.

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The coupling capacitor at the output of the stage is used to block any low-frequency components and low-frequency noise from the transconductance stage from reaching the mixer core. B. Mixer Core Stage performance compared Due to the superior noise and with the conventional mixer, as explained in Section III, the resistively degenerated passive mixer is used as the mixer core structure. Thanks to the use of a triple-well process, the back-gate of the switching core is biased at the same voltage as the source node to minimize the body effect. As mentioned in Section III, the degeneration resistance value needs to be optimized for best NF and gain performance. The overall gain , from the transconductance of the mixer, as a function of stage input to the TIA output is

Fig. 12. Calculated and simulated total gain and noise factor ratio of the mixer at 2 GHz.

(20) where is the output impedance of the transconductance stage at the input frequency with parasitic capacitance , which is assumed to be 80% of total parasitic capacitance, and the factor of four comes from the four parallel connections of the passive mixers in an I/Q doubly balanced mixer. , which is the ratio of The noise factor ratio the mixer noise factor with and without degeneration resistance) of the complete mixer, is derived in Appendix A and is given by is defined (21), shown at the bottom of this page, where by

(22) In the derivation of (21), the noise contribution of the switch core is ignored due to a small average turn-on resistance [26]. The overall gain and noise factor ratio, with various values of , are plotted in Fig. 12 with simulated values for comparis between 300 and 600 , ison purpose. The optimal where the NF is minimized but the gain is still acceptable. The performance of the mixer switching core itself is simulated and the result is shown in Fig. 13, which demonstrates the improvement with the added degeneration resistance. A degeneration resistance of 600 was chosen, based on simulation results. The simulated noise contributions with and without the 600 of degeneration resistance are shown in Fig. 14. As can be seen, the noise contribution of the TIA stage is reduced to less than 35% of the total, compared to 70% without the degeneration resistance. The total integrated output noise voltage over 1-MHz

Fig. 13. Simulated R at 2 GHz.

IIP

performance of mixer switch core as a function of

bandwidth is 6.8 10 V without degeneration resistance and 1 10 V with degeneration resistance, respectively. C. Transimpedance Stage The TIA stage serves as a mixer load, current-to-voltage converter, and anti-aliasing filter for the following stage. The active-RC TIA stage will provide a very low impedance at the mixer output, so that nearly all of the current from the mixer core flows into the feedback RC. This ensures highly linear mixer operation, since the mixer encounters a small voltage swing [13]. However, this assumption is only true when the operational transconductance amplifier (OTA) has sufficient gain at the highest possible frequency. The noise from the TIA stage also has to be small, so as to not corrupt the overall NF of the mixer, as explained in previous sections. The flicker noise from the TIA is the dominant noise contributor in narrowband communication systems. Therefore, the area of the TIA input FETs needs to be large. But this requirement will increase the input

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Fig. 14. Simulated noise contribution from TIA, mixer switch, source resisstage with and without 600 detance (R ), matching components, and generation resistance at 2 GHz.

G

Fig. 16. Calculated TIA transfer function with the

C

value of 1–3 pF.

Fig. 15. Effect of the OTA nonideality on TIA transfer function. (a) Nonideal TIA model including finite gain, input parasitic capacitance, and finite output impedance. (b) Two-stage OTA equivalent circuit.

parasitic capacitance. The TIA transfer function can be derived from Fig. 15. In Fig. 15(a), we have

Fig. 17. Chip microphotograph.

(23a) (23b) is the input parasitic capacitance of the OTA, is where the output impedance of the OTA, is the feedback impedance of TIA, and is the OTA open-loop voltage gain. The OTA is assumed to be a compensated two-stage amplifier, where is the compensation capacitance and is shown in Fig. 15(b). The output impedance of the OTA is

Fig. 18. Receiver block diagram; shadowed area is this design.

(24) and . By inserting (24) and (23b) into (23a), the TIA transfer function is

different values of . It is shown that increasing moves the out-of-band peaking to a lower frequency and reduces filtering. This could be a significant problem depending on the application. For most cellular applications, gain peaking above 100 MHz is tolerable, since the Tx leakage will be at an offset of 45 or 80 MHz, for cellular and PCS bands, respectively.

(25) The calculated and simulated transimpedance of the TIA are plotted in Fig. 16 as a function of the input frequency, with

The downconverter was fabricated in a 0.18- m Si CMOS 5M1P process, and a chip microphotograph is shown in Fig. 17. The downconverter is part of a direct-conversion receiver

where

V. MEASURED RESULTS

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Fig. 22. Measured IM power from

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032 to 024 dBm at 2 GHz.

Fig. 19. Measured input-matching condition.

Fig. 23. Measured IIP performance over operation bandwidth.

Fig. 20. Measured and simulated gain and NF performance.

Fig. 24. Measured IM and fundamental tone power from at 2 GHz.

030 to 012 dBm

Fig. 21. Measured uncalibrated IIP performance over operation bandwidth.

system with an inter-stage SAW filter between the LNA and the mixer. The block diagram of the receiver is shown in Fig. 18. All of the measurements are done at the mixer input port, since the LNA can be bypassed. The input-matching condition is measured with a network analyzer and is shown in Fig. 19.The matching is done with single series inductor for each positive and negative input. As can be seen, the 10 dB input-matching bandwidth is from 1.35 to 2.3 GHz. The difference between the measured and simulated result is due to

the higher parasitics of the test socket. To measure multiple devices, the evaluation board adopted a test socket, which has larger parasitic inductance and capacitance compared to a solder down board. The gain and NF performance are measured from 1.55 to 2.3 GHz. The noise performance is measured using the excess noise ratio (ENR) method [27]. The ENR used in the measurement was 20 dB and the output noise power spectrum is measured at baseband with a vector signal analyzer (VSA). The measured noise performance shows less than 9.5 dB of DSB NF across the band. A large-signal noise figure, or so-called blocking noise figure, is defined as the noise

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TABLE I MEASUREMENT RESULTS AND COMPARISON

figure in the presence of a large blocking/jammer signal. The noise performance in this situation is usually dominated by reciprocal mixing [1]. The close-in jammer signal at the mixer input can be as large as 16 dBm in a CDMA system, since the jammer level at the LNA input is 30 dBm with 15 dB of LNA power gain, followed by 1-dB loss in the SAW filter [28]. With the assumption of 75 dBc of integrated phase noise from the VCO and a 16-dBm jammer, the large-signal noise figure of the mixer can be calculated as

(26) where is the large-signal noise figure, is Boltzmann’s constant, is absolute temperature, is bandwidth (1.23 MHz in a CDMA system), is the noise figure of the mixer, is the integrated phase noise, and is the jammer power. From (26), it can be shown that the large-signal noise figure is 22 dB with 16 dBm of jammer power, 75 dBc of integrated phase noise, and 0-dB mixer NF .Even with 15 dB of mixer NF, which is increased from the original NF due to the jammer, it will affect the large-signal NF by 0.8 dB only. The large-signal NF was measured, and no outstanding NF degradation was observed. The noise corner frequency of the mixer is approximately 50 kHz. Gain is measured with a single tone input at 150-kHz (IF) offset from the LO frequency and is greater than 22 dB. The measured gain and NF performances are shown in Fig. 20 along with simulated results. The agreement between measured and simulated NF is excellent from 1.75 to 2.2 GHz. At the low and high frequency edges, the deviation becomes larger due to the additional parasitic effects from the socket. The gain agreement between measured and simulated values is excellent. The measured performance across the band is shown in Fig. 21. Two 30-dBm input tones at 5- and 5.21-MHz offset from the LO frequency are used. The resulting component will be at 210 kHz. The performance over the band (from 1.55 to 2.3 GHz) is greater than 50 dBm without calibration for more than five measured devices. Each device is presented with different markers in Fig. 21. The solid line presents a reference 60 dBm . As can be seen, the designed mixer shows better than 60 dBm of uncalibrated performance for U.S.

PCS band (1.93–1.99 GHz) and IMT band (2.11–2.17 GHz). In performance is reported for the an earlier paper [20], the power with input power swept U.S. PCS band only. The from 32 to 24 dBm at 2-GHz LO frequency is measured and shown in Fig. 22. Again, seven different devices are measured, and each device is depicted with different lines in Fig. 22. performance is measured and shown to be better The than 7 dBm over the band. Two 30-dBm inputs at 1.25- and 2.05-MHz offset from the LO frequency are used. The resulting component will be at 450 kHz, which is in-band. The results over the band are shown in Fig. 23. The measured power and P1 dB performances at 2 GHz are measured and shown in Fig. 24. The P1 dB is 12 dBm. The mixer starts to show heavily nonlinear behavior at 18 dBm of input power. The residual side-band (RSB) performance, representing the I and Q channel balance, is measured and is better than 35 dB. The performance summary for the mixer is summarized and compared with the references in Table I. The current consumption is 5 mA for both I/Q channels including the TIA stage from a 2–V power supply. VI. CONCLUSION An improved resistively degenerated wide-bandwidth (1.55–2.2 GHz) passive downconverter is introduced and analyzed. The circuit includes an input transconductance stage, a resistively degenerated passive mixer, and a TIA. The complementary input boosting method is used in addition to cross-coupled inputs to increase the effective . A degeneration resistance is added to a conventional passive mixer, and we demonstrate that this leads to improved NF and performance. The analytical results show good agreement with simulated results, and design guidelines are proposed for minimizing noise and distortion in the circuit. Thanks to the proposed architecture, the fabricated passive mixer shows a low noise figure of less than 9.5 dB with more than 50 dBm of uncalibrated performance. APPENDIX The noise equivalent circuit to calculate the noise factor of the passive mixer including TIA noise is shown in Fig. 25. The noise from the transconductance stage is assumed to be the same for both conventional and degenerated passive mixers. The

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ACKNOWLEDGMENT The authors wish to acknowledge the assistance and support of Qualcomm Inc. and the University of California at San Diego’s Center for Wireless and Communications and its member companies. Fig. 25. Simplified noise equivalent circuit.

REFERENCES

represents the source and input-referred transconductance noise. The output noise due to can be expressed as (27) where is given by (20). at the output is The TIA noise (28) Assuming that , which is the case here since 30 and 600 , the noise contribution due to can be ignored. The noise current from and are given by (29a) (29b) and the transimpedance stage is given by (30) The noise factor without the degeneration resistance is

(31) and the noise factor with degeneration resistance is given by (32), shown at the top of this page. The noise factor ratio is defined as and is given by (33), shown at the top of this page.

[1] B. Razavi, RF Microelectronics. Englewood Cliffs, NJ: Prentice-Hall, 1998. [2] T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits. Cambridge, U.K.: Cambridge Univ. Press, 1998. [3] B. Razavi, “Design considerations for direct-conversion receivers,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 44, no. 6, pp. 428–435, Jun. 1997. [4] A. Abidi, “Direct-conversion radio transceivers for digital communications,” IEEE J. Solid-State Circuits, vol. 30, no. 12, pp. 1390–1410, Dec. 1995. [5] D. Manstretta, R. Castello, and F. Svelto, “Low 1=f noise CMOS active mixers for direct conversion,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 48, no. 9, pp. 846–850, Sep. 2001. [6] H. Darabi and J. Chiu, “A noise cancellation technique in active RF-CMOS mixers,” IEEE J. Solid-State Circuits, vol. 40, no. 2, pp. 2628–2632, Dec. 2005. [7] T. Melly, A. Porret, C. Enz, and E. Vittoz, “An analysis of flicker noise rejection in low-power low-voltage CMOS mixers,” IEEE J. SolidState Circuits, vol. 36, no. , pp. 102–109, Jan. 2001. [8] A. van der Ziel, Noise in Solid State Devices and Circuits. New York: Wiley, 1986. [9] D. Shaeffer and T. Lee, “A 1.5 V, 1.5-GHz CMOS low noise amplifier,” IEEE J. Solid-State Circuits, vol. 32, no. , pp. 745–759, May 1997. [10] H. Darabi and A. Abidi, “Noise in RF-CMOS mixers: A simple physical model,” IEEE J. Solid-State Circuits, vol. 35, no. , pp. 15–25, Jan. 2000. [11] J. Crols and M. Steyaert, “A 1.5 V highly linear CMOS downconversion mixer,” IEEE J. Solid-State Circuits, vol. 30, no. 7, pp. 736–742, Jul. 1995. [12] W. Redman-White and D. Leenaerts, “1=f noise in passive CMOS mixers for low and zero IF integrated receivers,” in Proc. 27th Eur. Solid-State Circ. Conf., 2001, pp. 18–20. [13] R. Bagheri, A. Mirzaei, S. Chehrazi, M. Heidari, M. Lee, M. Mikhemar, W. Tang, and A. Abidi, “An 800-MHz-6-GHz software-defined wireless receiver in 90-nm CMOS,” IEEE J. Solid-State Circuits, vol. 41, no. , pp. 2860–2876, Dec. 2006. [14] S. Zhou and M.-C. Chang, “A CMOS passive mixer with low flicker noise for low-power direct-conversion receiver,” IEEE J. Solid-State Circuits, vol. 40, no. , pp. 1084–1093, May 2005. [15] B. Cook, A. Berny, A. Molnar, S. Lanzisera, and K. Pister, “Low-power 2.4-GHz transceiver with passive Rx front-end and 400-mV supply,” IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2757–2766, Dec. 2006. [16] J. Zhan, B. R. Carlton, and S. S. Taylor, “Low-cost direct conversion RF front-ends in deep submicron CMOS,” in Proc. IEEE RFIC Symp., 2007, pp. 203–205. [17] F. Behbahani, Y. Kishigami, J. Leete, and A. Abidi, “CMOS mixers and polyphas filters for large image rejection,” IEEE J. Solid-State Circuits, vol. 36, pp. 873–887, Jun. 2001.

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[18] T. Nguyen, V. Krizhanovskii, J. Lee, S. Han, S. Lee, N. Kim, and C. Pyo, “A low power RF direct-conversion receiver/transmitter for 2.4GHz-band IEEE 802.15.4 standard in 0.18-m CMOS technology,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 12, pp. 4062–4071, Dec. 2006. [19] M. Valla, G. Montagna, R. Castello, R. Tonietto, and I. Bietti, “A 72-mW CMOS 802.11a direct conversion front-end with 3.5 dB NF and 200-kHz 1=f noise corner,” IEEE J. Solid-State Circuits, vol. 40, no. 4, pp. 970–977, Apr. 2005. [20] N. Kim, V. Aparin, and L. Larson, “A resistively degenerated wideband in : m dBm passive mixer with low noise figure and CMOS,” in Proc. IEEE RFIC Symp., 2008, pp. 185–188. [21] D. Manstretta, M. Brandolini, and F. Svelto, “Second-order intermodulation mechanisms in CMOS downconverters,” IEEE J. Solid-State Circuits, vol. 38, no. 3, pp. 394–406, Mar. 2003. [22] S. Maas, Nonlinear Microwave Circuits. Norwood, MA: Artech House, 1988. [23] C. Galup-Montoro, M. Schneider, H. Klimach, and A. Arnaud, “A compact model of MOSFET mismatch for circuit design,” IEEE J. Solid-State Circuits, vol. 40, no. 8, pp. 1649–1657, Aug. 2005. [24] W. Zhuo, S. Shekhar, S. Embabi, J. Gyvez, D. Allstot, and E. SanchezSinencio, “A capacitor cross-coupled common-gate low-noise amplifier,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 52, no. 12, pp. 875–879, Dec. 2005. [25] S. Wang, A. Niknejad, and R. Brodersen, “Design of a sub-mW 960-MHz UWB CMOS LNA,” IEEE J. Solid-State Circuits, vol. 41, no. 1, pp. 2449–2456, Nov. 2006. [26] N. Poobuapheun, W.-H. Chen, Z. Boos, and A. Niknejad, “A 1.5 V 0.7–2.5-GHz CMOS quadrature demodulator for multiband direct-conversion receivers,” IEEE J. Solid-State Circuits, vol. 42, no. 8, pp. 1669–1677, Aug. 2007. [27] W. Mumford and E. H. Scheibe, Noise Performance Factors in Communication Systems. New York: Horizon, 1967. [28] CDMA 2000 Standard TIA/EIA IS-2000 Series Rev. A, TR45.5, 2000.

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Namsoo Kim (M’09) was born in Seoul, Korea, in 1970. He received the B.Sc. degree in semiconductor science from Dongguk University, Seoul, Korea, in 1998, the M.E. degree in electrical engineering from the Information and Communication University (now the Korea Advanced Institute of Science and Technology), Daejon, Korea, in 2000, and is currently working toward the Ph.D. degree in electrical engineering at the University of California at San Diego, La Jolla. From 2000 to 2001, he was involved in the design and testing of CMOS radio-frequency integrated circuits (RFICs) in the MicroElectronic Research Center, Electronic and Telecommunication Research Institute. From 2001 to 2002, he was with Ashvattha Semiconductor, where he designed SiGe BiCMOS RFICs for GSM receiver systems. Since 2002, he has been with Qualcomm Inc., San Diego, CA, designing RFIC products for CDMA systems.

Vladimir Aparin received the Diploma of EngineerPhysicist degree (with honors) in electronics and automatics from the Moscow Institute of Electronic Engineering (MIEE), Moscow, USSR, in 1989, and the Ph.D. degree in electrical engineering from the University of California at San Diego, La Jolla, in 2005. From 1987 to 1992, he was involved in the design and testing of high-speed analog and digital GaAs integrated circuits (ICs) in the device modeling and characterization at MIEE. From 1992 to 1996, he was with Hittite Microwave Corporation designing GaAs and Si BiCMOS radio-frequency ICs (RFICs) for communication systems. Since 1996, he has been with Qualcomm Inc., San Diego, CA, designing RFIC products for CDMA systems. He is a coauthor of nine patents and many technical papers.

Lawrence E. Larson (S’82–M’86–SM’90–F’00) received the B.S. and M.Eng. degrees from Cornell University, Ithaca, NY, in 1979 and 1980, respectively, and the Ph.D. degree from the University of California at Los Angeles (UCLA), in 1986, all in electrical engineering. From 1980 to 1996, he was with Hughes Research Laboratories, Malibu, CA, where he directed the development of high-frequency microelectronics in GaAs, InP, and Si/SiGe and MEMS technologies. In 1996, he joined the faculty of the University of California at San Diego (UCSD), La Jolla, where he is the Inaugural Holder of the Communications Industry Chair. He is currently chair of the Electrical and Computer Engineering Department. During the 2000–2001 academic year, he was on leave with IBM Research, San Diego, CA, where he directed the development of RF integrated circuits (RFICs) for third-generation (3G) applications. He was a Visiting Professor with the Technical University of Delft, Delft, The Netherlands, during the 2004–2005 academic year. He has authored or coauthored over 250 papers and holds 35 U.S. patents. Dr. Larson was the recipient of the 1995 Hughes Electronics Sector Patent Award for his work on RF MEMS technology. He was corecipient of the 1996 Lawrence A. Hyland Patent Award of Hughes Electronics for his work on lownoise millimeter-wave high electron-mobility transistors (HEMTs), the 1999 IBM Microelectronics Excellence Award for his work in Si/SiGe HBT technology, and the 2003 Custom Integrated Circuits Best Invited Paper Award.

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Wide-IF-Band CMOS Mixer Design Pei-Yuan Chiang, Chao-Wei Su, Sz-Yun Luo, Robert Hu, and Christina F. Jou

Abstract—A wide-IF-band transistor mixer has been designed using a 0.13- m RF-CMOS process where its RF frequency is 8.7–17.4 GHz, local oscillator (LO) fixed at 17.4 GHz, and IF up to 8.7 GHz. Proper layout arrangement for the Marchand balun has been discussed and then implemented; the output amplitude and phase imbalance are less than 0.5 dB and 1 measured in the RF bandwidth. Related theories for the core mixing circuit are explored extensively and verified through simulation; broad bandwidth of the resistive double-balanced mixer is then confirmed in the IF aspect. The designed mixer has more than 10-dB conversion gain, matched RF, IF, and LO ports, and good port isolation over the intended wide bandwidth. The input-referred P1 dB is 17.5 dBm at 9 GHz and 16 dBm at 13 GHz. The third-order input intercept point is 6 dBm at 9 GHz and 5 dBm at 13 GHz. The noise figure is 7 dB at 9 GHz and 12.6 dB at 13 GHz. The power consumption is 40 mW for this 1.3-mm2 mixer chip. Index Terms—Conversion matrix, Marchand balun, wideband mixer.

I. INTRODUCTION N DEVELOPING the millimeter-wave array for efficient and accurate detection of the anisotropy of cosmic microwave background radiation across the -band, the front-end receivers of the array are preferred to be wideband [1]. As for the system shown in Fig. 1, the incoming 78–113-GHz radio-astronomical signals will first be cryogenically amplified and down-converted to quasi-dc–34.8 GHz. Four adjacent bands of 8.7 GHz each can then be separated and extracted simultaneously using power dividers, bandpass filters, and low-pass filters, amplifiers, and three mixers of wide IF bandwidth. For example, the first such wide-IF-band mixer needs to have its RF cover 8.7–17.4 GHz, local oscillator (LO) frequency fixed at 17.4 GHz, and IF equal to dc–8.7 GHz; the second and third mixers will have the same 8.7-GHz IF bandwidth, but with RF of 17.4–26.1 and 26.1–34.8 GHz, respectively. In terms of absolute or the more restricting relative IF bandwidth, it seems resistive diode mixers made of compound semiconductors can best fulfill this wideband requirement while keeping low power consumption. Successfully delivering though they have been,

I

Manuscript received July 16, 2009; revised September 19, 2009. First published March 08, 2010; current version published April 14, 2010. This work was supported in part by the National Science Council, R.O.C., under Contract NSC 97-2221-E-009-179 and Contract NSC 98-2627-E-002-004. P.-Y. Chiang, C.-W. Su, and C. F. Jou are with the Institute of Communication Engineering, National Chiao Tung University, Hsinchu, Taiwan 300 (e-mail: [email protected]). S.-Y. Luo was with the Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan 300. He is now with the Walsin Technology Corporation, Taoyuan, Taiwan 326 (e-mail: syluo@passivecomponent. com). R. Hu is with the Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan 300 (e-mail:RobertHuRobertHu@gmail. com). Digital Object Identifier 10.1109/TMTT.2010.2041575

Fig. 1. Schematic of the wideband receiver. The incoming 78–113-GHz signal will be cryogenically amplified, down-converted, and split into four adjacent bands. The wide-IF-band mixer used for band 2 needs to have both its RF and IF bandwidth equal to 8.7 GHz at least, and LO fixed at 17.4 GHz. Also shown is a photograph of our designed wide-IF-band mixer using commercial 0.13-m RF-CMOS process.

these diode mixers nonetheless have discernible conversion loss, moderate port isolation, and poor input matching for all three RF, IF, and LO ports. On the other hand, transistor mixers made of silicon-related processes continue pushing their operating frequencies and promise further integration with other circuits like amplifiers, oscillators, and even antennas [2]–[7]. All this, therefore, prompts us to the challenge of designing a well-performing wide-IF-band transistor mixer using a commercial RF-CMOS process. Since most of the transistor mixers tend to have their wideband proclamation illustrated by shifting the LO frequency across the intended RF frequency range while keeping the IF bandwidth relatively small, these mixers are, in fact, of wide RF band, but narrow IF band; therefore, not all the design techniques for mixers can be freely adopted here. For instance, to boost the conversion gain of a double-balanced mixer and suppress the unwanted common-mode signals, a differential-pair with current source and active load can be used in the IF stage. With increasing IF frequency, however, this approach starts losing its appeal, as the output impedance of

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Fig. 2. Broadside-coupled Marchand balun with extra connecting line between the spirals. Port 1 is the input; port 2 and port 3 are the output. The existence of this extra connecting line will affect the output amplitude and phase imbalance.

both the current source and active load diminish rapidly with increasing frequency. Likewise, to obtain large conversion gain in the case of narrow IF band, a finite drain–source bias voltage is opted for the core mixing transistors. In this paper, we are going to demonstrate that the zero- , i.e., resistive bias scheme can simply be used for achieving wide IF bandwidth, even though this peculiar bias scheme is originally proposed for its high linearity [8], [9]. To simplify the circuit analysis and design, the proposed mixer is divided into three parts. The first is the input RF circuit where the incoming 8.7–17.4-GHz signal will be amplified and transformed into its differential-mode counterpart by a passive wideband balun. The second is the core mixing circuit where the resistive double-balanced circuit configuration is employed. Here we will focus on the derivation of the closed-form expression for the mixing circuit’s conversion resistance, as the mathematics involved can best illustrate the wide-IF-band property of this mixer. The third is the output IF circuit where the differential-mode IF signal of dc–8.7 GHz will be merged and amplified. Layout and measured results of the mixer are then presented and compared, whenever possible, with the simulated ones. Though initiated by our own scientific mission, knowledge, and experience gained in designing this wide-IF-band mixer will be invaluable for the further development of wideband surveillance and communication industries in the near future.

Fig. 3. Proposed broadside-coupled Marchand balun with no connecting line between the spirals. Port 1 is the input; port 2 and port 3 are the output.

Fig. 4. Measured and simulated results of our proposed 8.7–17.4-GHz balun, where the solid curves are the measured results and the dotted curves are the simulated counterparts. (a) Output magnitude imbalance. Also shown is the photograph of the fabricated balun. (b) Output phase imbalance. (c) Magnitude of S in decibels. The measured and simulated S curves are not shown here since they are inseparable from their respective S curves. (d) Output port isolation, i.e., magnitude of S , in decibels.

II. WIDE-IF-BAND MIXER DESIGN the corresponding signal loss and phase delay, and define , we then have

A. Input RF Circuit Design The most critical component in the input RF circuit of a double-balanced mixer is the balun that converts the single-ended signal into its differential-mode counterpart, and here we use the Marchand balun, which, ideally, can have and expressed as its (1) where is the coupling coefficient of the constituting coupled lines [10]–[12]. By setting , there will be . In the layout arrangement shown in Fig. 2, an extra connecting line needs to be used to form a complete balun. If we designate the transmission coefficient of this additional nonreflective line segment as , which takes into account

as

(2) Thus, with nonunitary , the two output signals are no longer of equal magnitude and 180 out-of-phase. On the other hand, if the layout for the balun is arranged such as that shown in Fig. 3, then the extra connecting line can be almost omitted and the performance is expected to be improved. Now we are ready to have the proposed balun configuration fabricated using a commercial 0.18- m RF-CMOS process. The output magnitude and phase imbalance of the balun are shown in Fig. 4, where the solid curves are the measured results, and the

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TABLE I BALUN COMPARISON

Fig. 5. Schematic of the input RF circuit where the input transistor stage can attain wideband input matching. The LC tank of the differential pair resonates at around 17 GHz.

dashed curves are their simulated counterparts. Here, the output magnitude imbalance in decibels is defined as the absolute value , and the output phase imbalance in degree of [13]. The is defined as the absolute value of cm in the simulation, and each substrate loss is assumed 10 of the four-and-one-quarter-turn spirals has 18- m inner radius, 6- m linewidth, and 2- m line separation. In the intended 8.7–17.4-GHz frequency range, the measured output magnitude and phase imbalance are less than 0.5 dB and 1 , respectively. Also shown in this figure are the measured and simulated and , i.e., output port isolation. With the proper de-embedding procedure for removing the impacts of the RF pads and surrounding ground metals, the difference between measurement and simulation in the output magnitude imbalance can be minimized. Measured results of different baluns with similar operating frequency as ours are listed in Table I. Though our balun has only comparable or slightly better amplitude imbalance Mag , our phase imbalance Phase outperforms the other four. Capable of generating the differential-mode signal needed for the double-balanced mixer, the remaining concern of this balun is its loss; an amplifier can, therefore, be added in front of it. In Fig. 5, the input RF circuit starts with a single-stage transistor, which can easily achieve a wideband input matching by fine tuning both its source inductor and loading impedance [17], and it will provide the voltage gain to compensate for the insertion loss of the following Marchand balun. As explained, this balun converts the RF signal into its differential-mode counterpart, which will then be fed into the differential pair for amplification and further suppression of the residual common-mode signals at 17 GHz. The resistive drain bias scheme is preferred over the active load for its reliable high-frequency performance.

Fig. 6. Modeling of the resistive transistor used in the double-balanced mixer. (a) Transistor’s equivalent circuit when zero-V is applied. (b) Values of C , C , and C versus the applied gate voltage. (c) Channel conductance G versus the applied gate voltage where the solid line is derived using the S -parameters at each bias point, while the overlapping dotted curve is extracted from the transistor’s dc characteristics, i.e., I–V curve. (d) LO-modulated channel conductance versus the LO phase where the solid curve is from the simulation, while the dotted curve is calculated using the Fourier series G , G , and G . The dc bias for the gate is 0.5 V, and the gate voltage swing due to the applied LO is 0.4 V.

B. Core Mixing Circuit The double-balanced circuit configuration is used in designing our core mixing circuit so that good port isolation and conversion efficiency can be achieved [18], [19]. To maintain minimal frequency dependency, and thus make feasible of the four the wideband performance, the bias voltage constituting transistors are all set to zero. Fig. 6(a) shows the transistor’s equivalent circuit under this bias scheme, which is with small parasitic mainly a variable resistor capacitors , , and [20]. Fig. 6(b) displays the values of these parasitics versus the applied gate voltage. Value of the under different is dominating channel conductance shown in Fig. 6(c) where the solid curve is derived using the simulated -parameters at different gate bias voltage, while the dotted curve is extracted from the transistor’s dc characteristics, i.e., I–V curve. With 0.4-V gate voltage swing, i.e., will vary between 0.5 0.2 V, the channel conductance 0.31–13.28 mS. Mathematically, the LO-modulated in the time domain can be expressed as (3) is the dc channel conductance, is responConceptually, is for sub-harsible for the fundamental-frequency mixing, ’s are known, we can monic mixing, and so on. Once the

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Fig. 7(c), where the two opposite source currents are coming from the RF differential pair and the two loading voltages are and , respectively. Here it is reasonassigned as able assuming that the two common source nodes of transistors are virtual ground for LO and IF signals, and the two common drain nodes of the four transistors are virtual ground for RF and LO signals. Therefore, the corresponding one-transistor equivalent circuit can be constructed as that shown in Fig. 7(d), where

(5) The four large are used to keep the drain and source of the mixing transistors dc grounded, and thus, can be omitted in our analysis. brings upon the current that First, the source current flows through the variable resistor (6)

Fig. 7. Schematic of the core mixing circuit. (a) Conversion resistance R of a mixer can be defined as V =I , where V is the IF component of V , and I is the RF component of I . (b) Double-balanced mixer is made of four resistive transistors whose dc bias voltage V is maintained at zero by having the connected to ground. Also included in the schematic large 2-k resistors R are the current source I , source impedance Z , and loading impedance Z . (c) Rearranged schematic of the double-balanced mixer. (d) Equivalent onetransistor circuit.

readily obtain the corresponding ’s through matrix transformation. Fig. 6(d) shows the channel conductance swing due to the applied LO in two cycles. The solid curve is the simulated result; the overlapping dashed curve is its calculated counterpart . using the fitted For a double-balanced mixer, as shown in Fig. 7(a), we asout of the RF differential pair is transsume that the current formed by the mixer into the voltage , which, in turn, drives and the IF differential pair, and both the source impedance are frequency dependent. Apparently, a loading impedance proper measure of the mixer’s efficiency in this case will be the , which is defined as conversion resistance (4) is the IF component of the loading voltage , and where is the RF component of the source current . Intuitively, we can see that the larger the conversion resistance, the better the mixer’s efficiency. Knowing conversion resistance, the corcan be readily obtained responding voltage conversion gain . Fig. 7(b) shows the circuit arrangement of as the double-balanced mixer, and it can be rearranged as that of

Here we assume that this variable resistor is dominated by its dc value; therefore, in the quasi-linear situation where only one frequency, either RF or IF, is involved, we can have replaced by . Though seemingly too bold an assumption, this will nevertheless help us understand the basic principle of mixing. Now is ready to generate the IF voltage this RF current across the variable resistor, as (7) and we have (8) therefore, (9) Thus, from this mathematical formulation, we can see that large values of and are desired, and will be the upper limit of any available . Appealing though it is, we still want to compare this seemingly trivial mathematics with results derived using other formal methods such as the conversion matrix technique [21]–[26]. In doing so, we hope that our intuitive approach can help reveal the underlying meanings of the more complicated formulations. and curUsing the conversion matrix technique, the voltage on the variable resistor can be arranged as rent

(10)

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Fig. 8. Conversion resistance R of the double-balanced resistive mixer for two different gate voltage swings. (a) In the case of 0.4 –V gate voltage swing for each mixing transistor, the solid curve is the simulated result, dashed curve 1 is calculated using (9), dashed curve 2 is from (15), and dashed curve 3 is by (16). The source impedance Z is 200 ; the loading impedance Z is the impedance of a 125-fF capacitor. The LO responsible for gate voltage swing is fixed at 17.4 GHz. (b) Case with 1.4 –V gate voltage swing for each mixing transistor.

where verting mixer. Since able resistor, we have

Fig. 9. Conversion resistance R for different bias voltage V . The number next to each curve indicates the corresponding V . All the gate bias is fixed at 0.5 V, with 0.4-V gate voltage swing. The source impedance Z is 200 ; the loading impedance Z is the impedance of a 125-fF capacitor. The LO responsible for gate voltage swing is fixed at 17.4 GHz.

for this lower sideband down-conis equal to in this vari-

(11) where the effect of the image (IM) signal is temporarily neglected. As is equal to at the source , we can have the corresponding matrix expressed as

(12) Likewise, since there is

is equal to

at the loading

Fig. 10. Schematic of the output IF circuit. The LC tank of the differential pair resonates at around 8.7 GHz, and thus allows it to suppress the unwanted common-mode signals at high frequency, while the following in-cascade transistors will inhibit the low-frequency common-mode signals. An output gain stage is also added.

,

(13) Since the source voltage is the same as the loading voltage plus the voltage across the variable resistor, we then have

(14)

Fig. 11. Characteristic of the in-cascade transistors. (a) Schematic where the two transistors are identical. (b) Simulated CMRR where curve 1 is with the in-cascade transistors only; curve 2 is that of the total IF circuit, i.e., differentialpair plus in-cascade. The intended IF frequency range is dc–8.7 GHz.

(15)

When the IM signal is taken into consideration, we can have the expression of the conversion resistance revised as

i.e.,

and this term in the denominator will make calculated using conversion matrix different from our intuitively best and are very large, will be guess. Still, when both . close to

(16)

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Fig. 12. Schematic of the wide-IF-band mixer. Both the source and drain voltage of the four mixing transistors have been lifted to V (= 0:5 V), and the gate voltage to V (= 1 V), thus the dc-blocking capacitors between the mixing circuit and the IF stage can be removed. The units for resistance, capacitance, and inductance are ohms, picofarads, and nanohenries, respectively.

Fig. 14. Conversion gain of the mixer. (a) Measured 9- and 13-GHz conversion gain with different LO power. (b) Conversion gain versus RF frequency with the power of 17.4-GHz LO fixed at 5 dBm. The solid curve is the measured result, while the dashed curve is the simulated counterpart. In the 8.7–17.4-GHz RF band, the conversion gain is larger than 10 dB. Fig. 13. Photograph of the wide-IF-band mixer. It is made of 0.13-m RF-CMOS process and takes an area of 0:94 1:38 = 1:3 mm .

2

where the source impedance is assumed to be resistive and the matrix comes from the fitted matrix, i.e., (17) Fig. 8(a) shows the values of derived by using these three is assumed 200 (two 100different approaches, where resistors in series) and is the impedance of the 125-fF capacitor (two 250-fF capacitors in series). The solid curve comes from the simulation; dashed curve 1 is calculated using (9), dashed curve 2 is using (15), and dashed curve 3 is calculated using (16). The gate voltage swing is 0.4 V, i.e., 0.5 0.2 V, for each mixing transistor. Fig. 8(b) shows the corresponding values

of when the gate voltage swing is 1.4 V, i.e., 0.5 0.7 V, for each mixing transistor. As mentioned at the beginning of this section, the adoption allows the mixing transistors to be modeled as of zerovariable resistors with minimal frequency dependency, and thus extends the mixer’s bandwidth. Fig. 9 shows the simulated for different (and ) where the LO is fixed at 17.4 GHz and the bias-T’s (not shown) are assumed ideal. It is true that if the IF bandwidth is a mere hundreds of megahertz, a large should be applied, as the conversion resistance can now easily reach 100 and more. When IF bandwidth increases, will make however, the large frequency dependency of this large choice less and less appealing, and the solution can be using some frequency compensation techniques [27], or (and too), or both. In our case simply adopting a small can easily reach of 8.7-GHz IF bandwidth, the use of zero-

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Fig. 15. Linearity of the mixer at 9 and 13 GHz. (a) Solid curves 1 and 2 are the measured fundamental-frequency and two-tone third-order intermodulation output with two slightly different RF signals centered around 9 GHz; the dotted lines are used to obtain the intercept point. At 9 GHz, the input referred P1 dB is 17.5 dBm and the IIP3 is 6 dBm. (b) Corresponding curves for 13-GHz RF, where the the input referred P1 dB is 16 dBm and the IIP3 is 5 dBm.

0

0

0

Fig. 17. Measured noise figure and gain of the mixer versus the incoming RF frequency. (a) Noise figure measured using noise figure analyzer. It is 7 dB at 9 GHz, and 12.6 dB at 13 GHz. (b) Corresponding gain.

0

Fig. 16. Input reflection coefficient and port isolation. (a) Input reflection coefficients of the RF, LO, and IF ports. The solid curves are the measured results; the dotted curves are their simulated counterparts. All the three ports have small input reflection coefficients in their respective bandwidth. (b) Measured RF-IF, LO-RF, and LO-IF port isolation.

Fig. 18. Measured IF output spectrum with two 9 and 9.375 GHz.

030-dBm input RF signals of

a good overall mixing performance while allowing a small system voltage and low power consumption. C. Output IF Circuit At the output of the mixing circuit, both the differential-mode IF signal and the unintended common-mode RF leakage (and other spurious common-mode ones) can be detected; therefore, how to reach a high common-mode rejection ratio (CMRR) from dc to more than 8.7 GHz will be the focus in designing our IF circuit. The problem with passive IF balun is that it takes too much chip area for effectively covering the entire IF frequency range; worst still, we would like the lowest frequency to start from zero. As shown in Fig. 10, an active balun made of a differential pair followed by two identical transistors in cascade is then used to render a large CMRR over the whole IF band tank’s resonance frequency, the dif[28]. By fine tuning the ferential-pair could provide a good CMRR at around 8.7 GHz; at much lower frequency, it is the two in-cascade transistors that eliminates the common-mode signals because, as shown in Fig. 11(a), there is now (18)

Fig. 19. Measured IF output spectrum with two 16 and 16.375 GHz.

030-dBm input RF signals of

with , and being neglected. Thereexists for differential-mode input, but is zero for fore, the common-mode one when the frequency is close to zero. Fig. 11(b) shows the simulated CMRR. Curve 1 is with the in-cascade transistors only, where the CMRR can reach 38 dB at very low frequency, but it decreases steadily as frequency increases. Curve 2 is the CMRR with the complete IF stage (differential pair plus in-cascade) where the differential-pair helps increase the CMRR to 44 dB at 8.7 GHz, thus broadens the IF bandwidth in this respect. Of course, a differential pair with a high-impedance current source can also be used to get

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TABLE II MIXER COMPARISON

a good CMRR, but now the system voltage increased from 1.5 to at least 2 V.

needs to be

III. MEASURED RESULTS OF THE 8.7–17.4-GHz MIXER Figs. 12 and 13 show the schematic and photograph of the mixer fabricated using commercial 0.13- m RF-CMOS process. By lifting the source and drain biases of the four of the IF mixing transistors from zero to the gate bias differential pair, the dc blocking capacitors between the mixing core and the output IF stage can be removed to increase the mixer’s conversion efficiency. The LO balun has also been optimized at 17.4 GHz. Among the four dc bias pads in this is for the active transistors’ drain mixer, the system voltage is for their gate bias (0.5 V and bias (1.5 V and 26 mA), are for the core mixing negligible current), and the two transistors’ gate bias (1 V and negligible current). This mixer takes an area of 1.3 mm and has a total power consumption of around 40 mW. Fig. 14(a) shows the mixer’s conversion gain at both 9 and 13 GHz for 30-dBm RF input, where the 17.4-GHz LO power is sweeping from 20 to 10 dBm. As long as LO is larger than 5 dBm, a large and almost constant conversion gain can be obtained. Fig. 14(b) shows the mixer’s conversion gain versus RF frequency, with the 17.4-GHz LO fixed at 5 dBm. The solid curve is the measured result, and the closely following dotted curve is the simulated counterpart where all the metal ground has been taken into consideration. Conversion gain larger than 10 dB can be achieved in the 8.7–17.4-GHz RF frequency range. Though there is an equalizer for each IF band in our receiver array, flat conversion gain will be among the top priorities in our next design iteration. Fig. 15 shows the measured fundamental frequency and the two-tone third-order intermodulation output signals for both 9- and 13-GHz RF input signals. The input referred P1 dB is 17.5 dBm at 9 GHz, and 16 dBm at 13 GHz. The third-order input intercept point (IIP3) is 6 dBm at 9 GHz, and 5 dBm at 13 GHz, and it can be improved by employing the technique of multiple gated transistors [29], [30]. Fig. 16(a) shows the return loss of the RF, IF, and LO ports where the testing power is set to 30 dBm; all ports have return loss better than 10 dBm in their respective frequency

range (RF: 8.7–17.4 GHz, IF: dc–8.7 GHz, LO: 17.4 GHz). Fig. 16(b) shows the measured LO-IF, LO-RF, and RF-IF port isolation. The 35-dB LO-IF isolation at 17.4 GHz indicates that a low-pass or notch filter may be needed to further suppress the 17.4-GHz residual LO signal at the IF port. However, given the large separation of the LO frequency and IF band, designing this 17.4-GHz filter will be straightforward. The LO-RF port isolation is better than 35 dB at 17.4 GHz. Regarding the RF-IF port isolation, though nothing to do with the mixing process itself, the adding of an ideal amplifier into the mixer circuit does decrease its measured RF-IF port isolation while increasing its overall conversion gain by the same amount. Therefore, a more adequate measure should be adding the conversion gain in decibels to the RF-IF port isolation in decibels. In this respect, our mixer is better than other wide-IF-band mixers by at least 10 dB. By incorporating high-impedance current sources in both the RF and IF differential pairs, further improvement of RF-IF port isolation can be expected, though at the cost of larger system voltage. At this moment, the 10-dB conversion gain and 20-dB RF-IF port isolation of our mixer means the intended down-converted signal will always be 30 dB larger than the leakage one if their corresponding RF power are the same, and that is more than enough for our application. Fig. 17 shows the measured noise figure and gain of the mixer using a noise figure analyzer. The noise figure is 7 dB for 9-GHz RF, and it is 12.6 dB for 13-GHz RF. Fig. 18 shows the measured output spectrum where the two 30-dBm input RF signals of 9 and 9.375 GHz are injected into the mixer and down-converted to the two intended IF signals. The very small 375-MHz spurious signal is due to the self mixing of the two intended IF signals at the output-stage common-source transistor, and it can be suppressed if that transistor is removed or replaced by a more robust circuit. Fig. 19 shows the measured results where the two 30-dBm input RF signals are at 16 and 16.375 GHz. A comparison with other mixers is tabulated in Table II. IV. CONCLUSION In this paper, a comprehensive analysis of the mixer has been carried out, which explains why the resistive double-balanced

CHIANG et al.: WIDE-IF-BAND CMOS MIXER DESIGN

mixer is preferred for wide-IF-band applications. The mathematical formulation for calculating the core mixing circuit’s conversion resistance is then derived, which allows a better understanding of the underlying principles of mixing. Using a commercial 0.13- m RF-CMOS process, an 8.7–17.4-GHz mixer where its RF bandwidth equal to its IF bandwidth is then designed and characterized. ACKNOWLEDGMENT The authors wish to thank Prof. T.-H. Chiueh, National Taiwan University, Taipei, Taiwan, and Dr. D.-G. Niu, Chung Shan Institute of Science and Technology, Longtan, Taiwan, for the discussions on the wideband receiver. The authors thank the Chip Implementation Center of the National Science Council, Taiwan, for the assistance on circuit implementation and measurements. Suggestions from Prof. Y. Kwon, Seoul National University, Seoul, Korea, Prof. V. Krozer, Technical University of Denmark, Lyngby, Denmark, and the anonymous reviewers of this paper are appreciated. REFERENCES [1] N. R. Erickson, R. M. Grosslein, R. B. Erickson, and S. Weinreb, “A cryogenic focal plane array for 85–115 GHz using MMIC preamplifiers,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 12, pp. 2212–2219, Dec. 1999. [2] C. H. Chen, P. Y. Chiang, and C. F. Jou, “A low voltage mixer with improved noise figure,” IEEE Microwave Wireless Compon. Lett., vol. 19, no. 2, pp. 92–94, Feb. 2009. [3] Z. H. Hsiung, H.-I. Wu, and C. F. Jou, “A folded current-reuse downconverter mixer for ultra wide-band applications,” in Proc. Asia–Pacific Microw. Conf., 2007, pp. 1–4. [4] A. Babakhani, X. Guan, A. Komijami, A. Natarajan, and A. Hajimiri, “A 77-GHz phase-array transceiver with on-chip antennas in silicon: Receiver and antennas,” IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2795–2806, May 2008. [5] A. Natarajan, A. Komijami, X. Guan, A. Babakhani, and A. Hajimiri, “A 77-GHz phase-array transceiver with on-chip antennas in silicon: Transmitter and local LO-path phase shifter,” IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2807–2819, May 2008. [6] E. Laskin, P. Chevalier, A. Chantre, B. Sautreuil, and S. P. Voinigescu, “165-GHz transceiver in SiGe technology,” IEEE J. Solid-State Circuits, vol. 43, no. 5, pp. 1087–1100, May 2008. [7] M. C. Chen, H. S. Chen, T. C. Chen, and C. N. Kuo, “A CMOS up-conversion mixer with wide IF bandwidth for 60-GHz applications,” in IEEE Silicon Monolithic Integr. Circuits RF Syst. Top. Meeting, Jan. 2009, pp. 1–4. [8] S. A. Maas, “A GaAs MESFET mixer with very low intermodulation,” IEEE Trans. Microw. Theory Tech., vol. MTT-35, no. 4, pp. 425–429, Apr. 1987. [9] S. A. Maas, “Novel single device balanced resistive HEMT mixers,” IEEE Trans. Microw. Theory Tech., vol. 43, no. 12, pp. 2863–2867, Dec. 1995. [10] N. Marchand, “Transmission-line conversion transformers,” Electronics, vol. 17, no. 12, pp. 142–145, Dec. 1944. [11] S.-C. Tseng, C. Meng, C.-H. Chang, C.-K. Wu, and G.-W. Huang, “Monolithic broadband Gilbert micromixer with an integrated Marchand balun using standard silicon IC process,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 12, pp. 4362–4371, Dec. 2006. [12] K. S. Ang and I. D. Robertson, “Analysis and design of impedancetransforming planar Merchand baluns,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 2, pp. 402–406, Feb. 2001. [13] Y. J. Yoon, Y. Lu, R. C. Frye, M. Y. Lau, P. R. Smith, L. Ahlquist, and D. P. Kossives, “Design and characterization of multilayer spiral transmission-line baluns,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 9, pp. 1841–1847, Sep. 1999.

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[14] M. C. Tsai, “A new compact wideband balun,” in IEEE MTT-S Int. Microw. Symp. Dig., 1993, vol. 1, pp. 141–143. [15] K. Nishikawa, I. Toyoda, and T. Tokumitsu, “Compact and broad-band three dimensional MMIC balun,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 1, pp. 96–98, Jan. 1999. [16] W. Z. Chen, W. H. Chen, and K. C. Hsu, “Three-dimensional fully symmetric inductors, transformer, and balun in CMOS technology,” IEEE Trans. Circuit Syst. I, Reg. Papers, vol. 56, no. 7, pp. 1413–1423, Jul. 2007. [17] R. Hu, “Wide-band matched LNA design using transistor’s intrinsic gate-drain capacitance,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 3, pp. 1277–1286, Mar. 2006. [18] B. Gilbert, “The MICROMIXER: A highly linear variant of the Gilbert mixer using a bisymmetric class-AB input stage,” IEEE J. Solid-State Circuits, vol. 32, no. 9, pp. 1412–1423, Sep. 1997. [19] A. Verma, K. K. O, and J. Lin, “A low-power up-conversion CMOS mixer for 22–29-GHz ultra-wideband applications,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 8, pp. 3295–3300, Aug. 2006. [20] F. Ellinger, “26.5–30-GHz resistive mixer in 90-nm VLSI SOI CMOS technology with high linearity for WLAN,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 8, pp. 2559–2565, Aug. 2005. [21] R. A. Pucel, D. Masse, and R. Bera, “Performance of GaAs MESFET mixers at band,” IEEE Trans. Microw. Theory Tech., vol. MTT-24, no. 6, pp. 351–360, Jun. 1976. [22] D. N. Held and A. R. Kerr, “Conversion loss and noise of microwave and millimeter-wave mixers: Part 1—Theory,” IEEE Trans. Microw. Theory Tech., vol. MTT-26, no. 2, pp. 49–55, Feb. 1978. [23] A. R. Kerr, “Noise and loss in balanced and subharmonically pumped mixers: Part 1—Theory,” IEEE Trans. Microw. Theory Tech., vol. MTT-27, no. 12, pp. 938–943, Dec. 1979. [24] K. Kanazawa, M. Kazumura, S. Nambu, G. Kano, and I. Teramoto, “A GaAs double-balanced dual-gate FET mixer IC for UHF receiver front-end applications,” IEEE Trans. Microw. Theory Tech., vol. MTT-33, no. 12, pp. 1548–1554, Dec. 1985. [25] S. A. Maas, Microwave Mixers, 2nd ed. Norwood, MA: Artech House, 1992. [26] Y. Kwon, D. Pavlidis, P. Marsh, G. I. Ng, and T. L. Brock, “Experimental characteristics and performance analysis of monolithic InPbased HEMT mixers at -band,” IEEE Trans. Microw. Theory Tech., vol. 41, no. 1, pp. 1–7, Jan. 1993. [27] T. K. Johansen, J. Vidkjaer, and V. Krozer, “Analysis and design of wide-band SiGe HBT active mixers,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 7, pp. 2389–2397, Jul. 2005. [28] H. Ma, S. J. Fang, F. Lin, and K. S. Tan, “A high performance GaAs MMIC upconverter with an automatic gain control amplifier,” in 19th Annu. Gallium Arsenide Integr. Circuit Symp., Oct. 1997, pp. 232–235. [29] J. H. Lepoff and A. M. Cowley, “Improved intermodulation rejection in mixers,” IEEE Trans. Microw. Theory Tech., vol. MTT-14, no. 12, pp. 618–623, Dec. 1966. [30] T. W. Kim, B. Kim, and K. Lee, “Highly linear receiver front-end adopting MOSFET transconductance linearization by multiple gated transistors,” IEEE J. Solid-State Circuits, vol. 35, no. 1, pp. 223–229, Jan. 2004. [31] A. Verma, L. Gao, K. K. O, and J. Lin, “A -band down-conversion mixer with 1.4-GHz bandwidth in 0.13- m CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 8, pp. 493–495, Aug. 2005. [32] Y. Imai, S. Kimura, Y. Umeda, and T. Enoki, “A DC to 38-GHz distributed analog multiplier using InP HEMT’s,” IEEE Microw. Guided Wave Lett., vol. 4, pp. 399–401, Dec. 1994. -band [33] C. J. Trantanella, “Ultra-small MMIC mixers for - and communications,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2000, vol. 2, pp. 647–650. [34] C. Trantanella, M. Shifrin, and B. Bedard, “Low cost, plastic encapsulated mixers for -band applications,” in 20th Annu. Galliun Arsenide Integr. Circuit Tech. Symp. Dig., Nov. 1998, pp. 131–134. [35] W. Durr, U. Erben, A. Schuppen, H. Dietrich, and H. Schumacher, “Low-power low-noise active mixers for 5.7 and 11.2 GHz using commercially available SiGe HBT MMIC technology,” Electron. Lett., vol. 34, no. 21, pp. 1994–1996, Oct. 1998. [36] K. Osafune and Y. Yamauchi, “20-GHz 5-dB-gain analog multipliers with AlGaAs/GaAs HBT’s,” IEEE Trans. Microw. Theory Tech., vol. 42, no. 3, pp. 518–520, Mar. 1994.

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Pei-Yuan Chiang was born in Taichung, Taiwan, in 1983. He received the B.S. and M.S. degrees from in communication engineering from National Chiao Tung University, Hsinchu, Taiwan, in 2006 and 2008, respectively. His current research focuses on RF and millimeterwave integrated-circuit design.

Chao-Wei Su was born in Tainan, Taiwan, in 1985. He received the B.S. degree in electrical engineering from National Cheng Kung University, Tainan, Taiwan, in 2007, and the M.S. degree from the Institute of Communication Engineering, National Chiao Tung University, Hsinchu, Taiwan, in 2009. His current research interests are in the area of microwave and millimeter-wave circuits including lownoise amplifiers, mixers, and multipliers.

Sz-Yun Luo was born in Chiayi, Taiwan, in 1980. He received the B.S.E.E. degree from Yuan Ze University, Taoyuan, Taiwan, in 2005, and the M.S.E.E. degree from National Chiao Tung University, Hsinchu, Taiwan, in 2007. His master’s research concerned different active and passive circuit design using RF-CMOS process. He is currently with the Walsin Technology Corporation, Taoyuan, Taiwan, where he is engaged in the design of filters and power amplifier modules. His research interest is RF and microwave circuit design.

Robert Hu received the B.S.E.E. degree from National Taiwan University, Taipei, Taiwan, in 1990, and the Ph.D. degree from The University of Michigan at Ann Arbor, in 2003. From 1996 to 1999, he was with Academia Sinica, Taipei, Taiwan, where he was involved with millimeter-wave receivers. From 1999 to 2003, he was with the California Institute of Technology, Pasadena, where he was involved with millimeter-wave wideband receivers. He is currently with the Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan. His research interests include microwave and millimeter-wave electronics.

Christina F. Jou was born in Taipei, Taiwan, in 1957. She received the B.S., M.S., and Ph.D. degrees in electrical engineering from the University of California at Los Angeles (UCLA), in 1980, 1982, and 1987, respectively. Her doctoral thesis concerned the millimeter-wave monolithic Schottky diode-grid frequency doubler. From 1987 to 1990, she was a member of the Technical Staff of the Microwave Products Division, Hughes Aircraft Company, Torrence, CA, where she was responsible for microwave device modeling. In 1990, she joined National Chiao Tung University, Hsinchu, Taiwan, where she is currently an Associate Professor of communication engineering. Her current research is the development of microwave/RF active circuits and microelectromechanical systems (MEMS) devices.

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Low-Noise Waveguide-Type NbN/AlN/NbN SIS Mixers Approaching Terahertz Frequencies Wenlei Shan, Member, IEEE, Masanori Takeda, Takafumi Kojima, Yoshinori Uzawa, Shengcai Shi, Member, IEEE, Takashi Noguchi, and Zhen Wang

Abstract—In this paper, we present the development of low-noise waveguide mixers with NbN/AlN/NbN tunnel junctions at a frequency approaching 1 THz. The mixer was designed to be compatible with MgO substrate. Mixers of the presented design demonstrated much improved receiver sensitivity. This improvement is attributed to the reduction in signal dissipation in waveguide and leakage into an intermediate frequency port by adopting a full-height waveguide and an effective RF choke filter, respectively. Two types of tuning circuits, namely parallel-connected twin-junction (PCTJ) and half-wavelength self-resonance distributed junction (DJ), are designed and evaluated. Both theoretical and experimental results show that the PCTJ design is superior to the DJ design in terms of gain and sensitivity due to smaller loss in the tuning circuit. Index Terms—Full height waveguide, MgO substrate, NbN/AlN/NbN SIS mixer, noise temperature, RF choke filter, waveguide–microstrip transition.

I. INTRODUCTION IOBIUM NITRIDE (NbN) tunnel junctions are potentially applicable to low-noise frequency-mixing up to 2.6–2.8 THz, determined by a gap voltage as high as 5.3–5.6 mV [1], [2]. The large gap voltage results in a favorable wide bias region and causes the mixer to be less affected by the Josephson effect [3]. Thanks to the relatively high Tc of NbN (15–16 K), a stable performance against temperature vibration can be expected when a 4-K closed-cycle cryocooler is used for laboratory experiment or practical application [4]. Additionally high-quality crystalline NbN film of perfect surface smoothness can grow on MgO substrate at ambient temperature [5]. This allows us to fabricate low-leakage tunnel junctions [6] and to realize lower RF loss than low-resistivity normal metal film

N

Manuscript received June 08, 2009; revised October 19, 2009. First published March 08, 2010; current version published April 14, 2010. This work was supported in part by the Bairen Project of the Chinese Academy of Sciences. W. Shan and S. Shi are with the Purple Mountain Observatory, Chinese Academy of Sciences, Nanjing 210008, China. M. Takeda is with the Graduate School of Science and Technology, Shizuoka University, Shizuoka 432-8011, Japan. T. Kojima is with the National Astronomical Observatory of Japan, Tokyo 181-8588, Japan, and also with the Graduate School of Science, Osaka Prefecture University, Osaka 599-8531, Japan. Y. Uzawa and T. Noguchi are with the National Astronomical Observatory of Japan, Tokyo 181-8588, Japan. Z. Wang is with the Kansai Advanced research Center, National Institute of Information and Communications Technology, Kobe 651-2492, Japan. Digital Object Identifier 10.1109/TMTT.2010.2042643

up to about 1 THz [7]. For the aforementioned reasons, NbN SIS mixers, incorporated with NbN or normal metal microstrip tuning circuits, can potentially achieve good performance at frequencies up to 1 THz. Because of this, they are attractive in the applications of radio astronomy and atmosphere spectroscopy. An effort to develop NbN SIS mixers has been made both on waveguide and quasi-optical designs in a wide frequency range [8]–[14]. Below Nb gap frequency (700 GHz), low as it is, the noise is still higher than that achieved by Nb SIS mixers by a factor of two to four. This can be attributed to a relatively larger leakage current of NbN tunnel junctions, since leakage current results in the loss of high nonlinearity of quasi-partial tunneling onset and excessive shot noise. At frequencies beyond 700 GHz, where film loss tends to be pronounced in Nb SIS mixers, NbN mixers of quasi-optical designs have provided quantum-efficient sensitivity comparable to that achieved by the state-of-the-art Nb/Al O/Nb mixers incorporating tuning microstrip lines made of NbTiN ground plane and Al wiring [15], [16]. Waveguide NbN mixers, however, showed slightly higher noise than quasioptical mixers by a factor of two [14]. Since it is preferable for many practical applications to use horn antennas that generate a well-controlled beam pattern, improving the performance of low-noise waveguide-type NbN SIS mixers with horn antennas is of great interest. There are two possible reasons for the difference in sensitivity between waveguide and quasi-optical types at a frequency approaching 1 THz, given here. 1) As a rule, waveguides with reduced height are adopted. At THz frequencies, waveguides of reduced height may suffer from transmission loss that can be considerably high. 2) NbN films of low resistivity are only available on MgO substrate, while growth on quartz results in poor film quality [17]. Since the high dielectric constant of MgO causes the conventional design of RF choke filters to become less effective, leaking of signal to an IF port leads to reduction in sensitivity. In this paper, a new design aimed toward solving the above problems is proposed. By adopting a full-height waveguide–microstrip transition on MgO substrate, into which a resonance choke filter is integrated, we have dramatically improved the performance. The measured, uncorrected double sideband (DSB) receiver noise is as low as 250 K at 820 GHz at an ambient temperature of 4.2 K, which is comparable to that achieved by using the best NbN quasi-optical SIS mixers.

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(a)

(b)

Fig. 1. Schematic plot of the electric field patterns of: (a) the fundamental and (b) the second modes in a shielded microstrip line.

II. DESIGN OF THE SIS MIXER

Fig. 2. Two simplified choke filter designs. (a) Filter with transverse resonators. (b) Filter of the conventional design.

A. RF Choke Filter and Waveguide–Microstrip Transition Design Down-converted IF signals propagate to the IF port through a choke filter that prevents the RF signal from leaking out. The choke filter of a standard approach is incorporated with a series of high–low impedance lines, with lengths close to the quarter wavelength of the fundamental mode of the shielded microstrip line at RF center frequency. The choke filter becomes less effective if high-order modes are propagative, as signal leaking caused by high-order modes to the IF port will obviously make an additional loss. In particular, special attention should be paid to the second transmission mode, i.e., the first high-order mode, since its cutoff frequency is relatively low. Fig. 1 depicts the fundamental and the second modes in a shielded microstrip line. The cutoff frequency of the second mode depends on the efof the transmission line. This fective dielectric constant is determined by the dielectric constant of the substrate, strip is , the higher width, and chip thickness. The smaller the the cutoff frequency of the second mode will be. As a result, to make use of MgO substrate with larger permittivity than quartz, a thinner thickness is needed to prevent high-order mode propby means of agation. It is not expedient, however, to reduce using an extremely thin chip for the sake of reliable mounting. In this study, we adopted the chip size of 80 m in width and 30 m in thickness. In this case, the cutoff frequency of the second mode of a 65- m-wide microstrip line, which is supposed to be the low-impedance section of a conventional choke filter, will be much lower than the working frequencies in this study (780–950 GHz). As a solution, for better rejection of the RF signal, a pair of quarter-wavelength open-ended branches is used as a substitute for the low-impedance section in conventional design. This filter design is not new and can, in fact, be found in [18] and many recent works [19], [20]. Its advantage in blockage of high-order mode transmission, however, has not been revealed. Fig. 2 shows a simplified model of this design on a 30- m-thick substrate, together with conventional design, for comparison. To enhance bandwidth, the open-ended branches are bifurcated in the end. This transverse microstrip line section is stimulated in an even-symmetrical manner by the fundamental mode and

Fig. 3. Schematic drawing of the current distribution on a transverse resonator. (a) The case when it is stimulated by the fundamental mode. (b) The case when it is stimulated by the second mode.

in an odd-symmetrical manner by the second mode, as illustrated in Fig. 3. In both cases, it only conducts the local fundamental mode and forms a transverse resonator, thus realizing low impedance at the joint if the length of each branch is around a quarter wavelength at the center frequency of the mixer. The performance of the resonance filter, shown in Fig. 2(a), is compared with that of a conventional design, shown in Fig. 2(b), by using an EM simulator with the results plotted in Fig. 4. We find that this resonance choke filter suppresses both the fundamental mode and the second mode better than the conventional design by comparing the transmission coefficient in both cases. The derivative discontinuities, appearing at about 920 GHz of the fundamental mode transmission coefficient in both cases, reflect the onset of the third mode; this does not considerably affect the performance. We also noted that the propagation properties of the shielded microstrip line are influenced by the gap between the substrate and ground. In the practical mixer mounting, due to the substrate bending from its internal stress, the appearance of a small gap of several micrometers is unavoidable. This of the microstrip small gap can, however, help to reduce the line and thus make the choke filter more efficient. In a waveguide SIS mixer, the SIS tunnel junction couples the LO and signal from the waveguide through a waveguide–microstrip transition. Waveguide loss, increasing with the increase of frequency, plays an important part in receiver sensitivity at THz range. Waveguides with reduced height, which are

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inductive part is helpful in achieving high mixer gain, in spite of a slight degradation of the LO coupling efficiency. B. Mixer Tuning Circuit Design

Fig. 4. Transmission coefficients of both the fundamental and the second modes of the two choke filters shown in Fig. 2.

Fig. 5. Design of a full-height waveguide–microstrip transition. The cross-sectional dimensions of the chip and the waveguide are 80 m 30 m and 304 m 152 m, respectively. The tuning circuit is illustrated in enlarged views. The probe impedance is plotted in a Smith chart normalized to 15 .

2

2

widely used in waveguide mixer designs, will obviously bring about more serious problems. We therefore need a full-height waveguide–microstrip transition that allows for the use of a full-height waveguide and that also can provide broadband performance. The desired waveguide–microstrip transition in full-height waveguide has been designed and tested in our previous work [21]. We developed this design by combining the RF choke-filter introduced above; the configuration is shown in Fig. 5. With intensive numerical simulation, the probe impedance was optimized to be as weakly frequency-dependent as possible by adjusting the taper angle and the length of the first section of choke-filter. For the sake of machining simplicity, a waveguide backshort cavity is not used and the probe is placed close to the waveguide end to achieve low impedance, which is desirable for coupling of SIS junctions. The impedance of probe feed has a real part of 15 as well as an imaginary part varying with frequency. According to simulation results, this

We have designed two tuning circuits, namely, parallel-connected-twin-junction (PCTJ) and half-wavelength self-resonance distributed junction (DJ), whose compactness and relatively wider RF bandwidth are suitable for THz applications. The PCTJ is comprised of two parallel-connected SIS junctions at the two ends of an inductive NbN/MgO/NbN microstrip line, which compensates for the geometric capacitance of SIS tunnel junctions at a desirable frequency [22], [23]. The half-wavelength DJ is essentially similar to the PCTJ, since the active areas for mixing are located at the two ends of a long junction with the quasi-particle tunneling transmission line in the center area, acting as tuning inductance [12], [24]–[26]. The principles of NbN tuning circuit designs are basically the same as those already applied to Nb/Al O/Nb SIS mixers. Some distinctive differences stemming from the larger gap voltage of NbN SIS junctions and longer penetration depth of NbN films deserve a clarification. 1) PCTJ Design: The SIS tunneling junctions in this study are formed by epitaxial NbN/AlN/NbN trilayers. Compared with Nb/Al O/Nb SIS junction, the NbN SIS junction has higher gap voltage and larger specific capacitance [27]. This suggests that, to achieve the same RF bandwidth, by a factor NbN PCTJs must have a larger current density of 2–3 because the tuning circuit quality factor is proportional . However, the increase of will result in the to rise of leakage current and, thus, lead to the rise of the shot noise. Given the difficulty of the fabrication of low-leakage NbN SIS junctions with high current density, we have to find a compromise between RF bandwidth and sensitivity. In this study, we adopted a moderate junction current density of about 15 kA/cm to ensure a relatively low leakage current. By observing Fiske steps in the – curve [13], the corresponding is estimated to be 130 fF/ m . The junction quality factor, which is the ratio of resistance at 4 mV and the normal resistance, was measured to be as good as 10 or better at 4.2 K. The nominal junction size is 1 m in diameter, realizing a resistance suitable to directly couple the waveguide–microstrip transition without an impedance transformer; the transmission loss can therefore be minimized. To realize a center frequency of approximately 850 GHz, the distance between two junctions of the PCTJ is approximately 3 m, which is much shorter than the Nb PCTJ at this frequency. This is because of larger penetration depth of the NbN film, which is approximately 200 nm at 4.2 K [5]. The tuning circuit, which is composed of two SIS junctions and an inductive tuning microstrip line, forms a resonator to tune out the junction capacitance. A portion of the electromagnetic energy in the resonator will dissipate in the junctions and the lossy microstrip line. The latter causes signal loss and deteriorates the mixer sensitivity. To clarify its impact, we calculated the factor of the tuning circuit, the ratio of energy store, and dissipated in a circle. As mentioned above, the factor can be divided into two parts. One part is expressed by , which takes into account the quasi-particle tunneling, where

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W

W

Fig. 7. Schematic cross-sectional view of a DJ. and are the barrier width and the width of overhanging part of wiring, respectively.

Fig. 6. Approximation of the LO voltage distribution along a half-wavelength distributed junction at center frequency. The simulations are performed with the junction divided into three, five, seven, and nine subsections.

and are angular frequency, normal resistance, and capacitance of a single junction, respectively. The other part representing the dissipation loss in tuning inductance can be written . If (which is usually true for in the form of THz SIS mixers), then can be expressed by (1) in which and , respectively, stand for characteristic impedance and the imaginary part of the propagation constant is the sum of insulator of the tuning transmission line, is the tuning thickness and two times of penetration depth, length, and is the RF surface resistance of NbN thin film. factor is a combination of and , i.e., The overall . When , the transmission loss can , be neglected. It can be seen from (1) that the reduction of which is equivalent to the increase of current density, is helpful not only to broaden RF band but also to increase conversion efficiency. Since this improvement in conversion efficiency partly makes up for the rise of leakage current, we can expect good results for a relatively leaky NbN SIS mixer with high current density. 2) DJ Design: A half-wavelength DJ can be regarded as the merging of two junctions of a PCTJ to form one long one that self-resonates at a desired frequency. Such a scheme has been fully studied both theoretically [25] and experimentally [12], [24], [26]. We followed the theoretical approach introduced in [25] to optimize the mixer design. The long junction is uniformly divided into a number of sections connected in chain. Each section is then modeled by a lumped junction (without capacitance) in parallel with a conventional superconducting microstrip line. Based on this circuit model, the LO distribution can be calculated by solving a nonlinear equation numerically. Fig. 6 shows an example of the approximation of LO voltage distribution along the DJ, which corresponds to various division numbers ranging from 3 to 9. The portions at both ends of the DJ are normally pumped, while those in the center are under-pumped and, thus, almost inactive for mixing effect. Compared with the tuning microstrip line in PCTJ, the quasi-

particle tunneling transmission line suffers a larger loss. This loss is due to the leakage current and quasi-particle tunneling in the under-pumped region, thus causing the degradation of tuning circuit efficiency. The accurate modeling of the quasi-particle tunneling transmission line, the geometric structure of which is shown in Fig. 7, is essential for the correct determination of the tuning length and embedding impedance. It is worth noting that, unlike the electric field that is closely confined within the junction barrier, the magnetic field spreads peripherally due to a long penetration depth of NbN film (about 200 nm), which is much thicker than the barrier. As a result, emphasis should be put on the significance of the fringing effect of the magnetic field. The charand propagation constant determined acter impedance and parallel admittance of unit by the serial impedance length are calculated by (2) and (3) To involve the fringing effect,

and

can be written as (4)

and (5) is the fringing factor, and are the surwhere is the width face resistance of the strip and ground plane, of junction barrier, and and are the tunneling admittance and junction capacitance of unit length of the transmission line. The fringing factor , which is calculated by means of numerical simulation [28], turns out to be a typical value of around 2 when the penetration depth of NbN is set at approximately 200 nm. Along with the established circuit model and Tucker theory [3], we simulated the performance of DJs to find out the desirable embedding impedance. For example, the mixing conversion gain of the tuning circuit design is simulated at 865 GHz, with a parametric sweeping of the embedding impedance over most of area of Smith chart; the results are shown in Fig. 8(a). We find that the inductive part is beneficial to the elevation of conversion gain and that the mixer is unconditionally stable at this frequency. For comparison, the same calculation was apand center frequency, as shown plied to a PCTJ of identical in Fig. 8(b). The maximum gain of the PCTJ appears to be 2 dB

SHAN et al.: LOW-NOISE WAVEGUIDE-TYPE NbN/AlN/NbN SIS MIXERS APPROACHING TERAHERTZ FREQUENCIES

Fig. 8. Simulated DSB mixer gain of (a) a DJ mixer and (b) a PCTJ mixer as a function of embedding impedance at center frequency (865 GHz). The Smith chart is normalized by 15 .

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Fig. 9. Comparison of a PCTJ and a DJ in terms of the measured DSB receiver noise and conversion gain as a function of LO frequency.

higher than that of the DJ. This is understandable, since there is a larger loss in the tuning microstrip line of DJs. III. MEASURED PERFORMANCE OF DJ AND PCTJ MIXERS A number of batches of DJ and PCTJ mixers were fabricated with the technique characterized by selective NbN etching and selective insulator deposition [14]. A low dc resistivity of NbN cm measured at room temfilm, which is typically about 60 perature, indicates rather good film quality. The average quality factor of DJs of about 15 is slightly better than that of PCTJs (about 10). The difference in quality is due to the quality deterioration in small junctions. This size-dependent effect might be ascribed to the undercut, which is formed in the process of reactive ion etching of NbN. The undercut may prevent the insulator, deposited afterwards, from perfectly sealing the junctions; this leads to tiny conducting channels between the wring layer and the base electrode. Since this leakage current occurs around junction edges, smaller junctions, which have larger ratio of the perimeter and the area, suffer poorer quality compared with bigger ones. The mixing performance was examined in a 4-K close-cycled cryogenic Dewar with the measurement setup described in [21]. Curves plotted in Fig. 9 represent the uncorrected receiver noise and gain of two typical devices as a function of LO frequency: a PCTJ (nominal tuning length is 2.8 m) and a DJ (junction length is 3 m). The current densities of both devices are similar (17 and 13.5 kA/cm , respectively) and their center frequencies almost coincide with each other. We can now focus on the differences caused mainly by the tuning circuits. As seen in Fig. 9, the DSB conversion gain of the PCTJ mixer is approximately 2–4 dB higher than that of the DJ mixer; accordingly, the DSB receiver noise of the PCTJ mixer is also lower. This difference has been well predicted by theoretical results. The – curves, with and without pumping, as well as the IF responses corresponding to cold and hot loads, are presented in Fig. 10 at frequencies of 830 and 837 GHz, respectively. An uncorrected receiver noise of about 280 K for the PCTJ mixer has been obtained. This is the best result that has been achieved thus far with NbN waveguide mixers and is comparable to the best result achieved with quasi-optical NbN mixers at this frequency. Due to the limited current density (ranging from 5 to 15 kA/cm ), an individual device covers only part of the

Fig. 10. Pumped and unpumped I –V curves and the IF responses corresponding to hot and cold loads of the PCTJ and DJ mixers shown in Fig. 9.

interested frequency band. Because of this, a number of DJ mixers of various junction lengths, ranging from 2.4 to 3.4 m, were measured to investigate the dependence of minimum noise temperature on frequency; the results are shown in Fig. 11. Although some of these DJ mixers are incorporated with polycrystalline NbTiN wiring layer, their performance shows little difference from that of NbN junctions. The minimum uncorrected receiver noise remains around eight times the quantum limits up to 880 GHz and tends to become larger with the increase of frequencies. This tendency is attributed to the degradation of RF resistance of NbN film. IV. ANALYSIS AND DISCUSSION The effect of film loss on mixing performance can be estimated from the factor of the tuning circuit. The factor

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Fig. 11. DSB receiver noise of DJ mixers measured over a wide frequency range. Lines with closed circles are the results of all NbN junctions. As for those with open circles, devices incorporating NbTiN wiring layer were used.

can be obtained by calculating the ratio of the center frequency and 3-dB RF gain bandwidth. Taking, for example, the specific PCTJ and DJ mixers in Fig. 9, their factors are found to be factor is a combina13.4 and 11.4. Given that the overall and , which, respectively, represents the loss of tion of quasi-particle tunneling and that of the tuning microstrip line, indicates the efficiency we can readily know that , of the tuning circuit. To accurately estimate the value of the junction capacitance was determined by fitting the measured mixer conversion gain as a function of frequency. We then man’s of 14.3 for PCTJ and 18.6 and DJ. Conaged to obtain the 213 and 29 or 16 and 1.6 for PCTJ sequently, the and DJ were respectively calculated. It is worth noting that the PCTJ tuning circuit is of much higher efficiency than that of the suggests that the DJ tuning circuit. Additionally, surface resistance of NbN film is very low at this frequency. Another issue of interest is whether the waveguide–microstrip transition can reproduce theoretically predicted impedance. The work in [29] and [30] provides a technique for retrieving the embedding impedance by curve-fitting the measured pumped – curves. Since the dependence of pumped – curve on embedding impedance is weak, however, the fitted impedance has rather large uncertainties. As an example, the distribution of fitting residuals at 820 GHz are plotted in a space, the Smith chart, shown in Fig. 12(a). In the 2-D is shown, defined in [31] as . value of Here, is the sum of squared errors defined in [29], is the best-fit divided by squared standard deviation ; can be used as the minimum value. A contour of constant boundary of the confidence region [31]. The 1- confidence region appears to extend widely in a certain direction, but concentrates within a narrow range in the perpendicular direction on the Smith chart. We also found that the 1- confidence regions corresponding to different frequencies differ in orientations, as shown in Fig. 12(b). If we assume that the probe impedance does not change rapidly with frequency, as predicted in the numerical simulation, the overlapping region should be the most possible position where the embedding indicated impedance is located. The impedance value 15 by the overlapping region agrees with reasonable accuracy with the simulation results shown in Fig. 5 if the uncertainties of junction parameters are taken into consideration.

Fig. 12. (a) Confidence region (see detail in text) in Y space calculated at 820 GHz. Contours of 2.3, 6.2, and 13 correspond to normal 1- , 2- , and 3- distribution, respectively. (b) Orientation of 1- confidence region varies with frequency and the overlapping region is the most possible position where the actual embedding impedance is located. The Smith charts are normalized by 15 .

Compared with our previous work with the NbN PCTJ waveguide mixer [14], this work demonstrates improved sensitivity. We believe that the improvement is due mainly to two factors: 1) reduction of transmission loss of the waveguide by using a full-height waveguide and 2) reduction of signal leakage to the IF port by applying a high-efficiency choke filter. More experiments need to be conducted, however, to decide which factor contributes more to the improvement in sensitivity. By comparison, the effects of other changes in design or parameter are relatively minor. The film or junction quality in the new design does not considerably surpass that of the previous one; this indicates that they have made little contribution to the performance improvement. In this design, we avoid using the quarterwavelength microstrip line impedance transformer between the bow-tie antenna feed and the tuning structure. This must have made some contribution to the reduction in signal transmission loss. However, since we can know from the -factor analysis that the film loss at this frequency is still small, this contribution should not be significant. V. CONCLUSION In this paper, we have demonstrated low-noise waveguide NbN SIS mixers at a frequency approaching 1 THz. High sensitivity is attributed to the efforts to minimize the signal loss in the waveguide mounting structure by adopting full-height waveguide and also a highly efficient RF choke filter on MgO substrate. Design techniques are presented for NbN PCTJ and DJ tuning circuits with emphasis on the impact of the distinctive features of NbN SIS mixers, namely the high energy gap of NbN SIS junction and long penetration depth of NbN film. By means of -factor analysis, we verified that the surface resistance of NbN film is rather low at measured frequencies. It was also confirmed that the PCTJ mixers are superior in sensitivity to DJ mixers, which suffers from a larger loss in tuning circuit. ACKNOWLEDGMENT The authors would like to thank to Dr. M. Kroug, National Astronomical Observatory of Japan, Tokyo, Japan, for fabricating some of the devices and for valuable discussions on fabrication.

SHAN et al.: LOW-NOISE WAVEGUIDE-TYPE NbN/AlN/NbN SIS MIXERS APPROACHING TERAHERTZ FREQUENCIES

REFERENCES [1] W. C. Danchi and E. C. Sutton, “Frequency dependence of quasi-particle mixers,” J. Appl. Phys., vol. 60, no. 11, pp. 3967–3977, Dec. 1987. [2] D. Winkler and T. Claeson, “High-frequency limits of superconducting tunnel junction mixers,” J. Appl. Phys., vol. 62, no. 11, pp. 4482–4498, Dec. 1987. [3] R. Tucker and M. J. Feldman, “Quantum detection at millimeter wavelengths,” Rev. Mod. Phys., vol. 57, no. 4, pp. 1055–11113, Oct. 1985. [4] J. Li, M. Takeda, Z. Wang, S. C. Shi, and J. Yang, “Low-noise 0.5 THz all-NbN superconductor-insulator-superconductor mixer for submillimeter wave astronomy,” Appl. Phys. Lett., vol. 92, 2008, Art. ID 222504. [5] Z. Wang, A. Kawakami, Y. Uzawa, and B. Komiyama, “Superconducting properties and crystal structures of single-crystal niobium nitride thin films deposited at ambient substrate temperature,” J. Appl. Phys., vol. 79, no. 10, pp. 7837–7842, May 1996. [6] Z. Wang, A. Kawakami, Y. Uzawa, and B. Komiyama, “NbN/ AlN/NbN tunnel junctions fabricated at ambient substrate temperature,” IEEE Trans. Appl. Supercond., vol. 5, no. 2, pp. 2322–2325, Jun. 1995. [7] A. Kawakami, M. Shigehito, Y. Uzawa, and Z. Wang, “Estimation of surface resistance for epitaxial NbN films in the frequency range of 0.1–1.1 THz,” IEEE Trans. Appl. Supercond., vol. 13, no. 2, pp. 1147–1150, Jun. 2003. [8] W. R. McGrath, J. A. Stern, H. H. S. Javadi, B. D. Hunt, and H. G. LeDuc, “Performance of NbN superconductive tunnel junctions as SIS mixers at 205 GHz,” IEEE Trans. Magn., vol. 27, no. 2, pp. 2650–2653, Mar. 1991. [9] H. G. LeDuc, A. Judas, S. R. Cypher, B. Bumble, B. D. Hunt, and J. A. Stern, “Submicron area NbN/MgO/NbN tunnel-junctions for SIS mixer applications,” IEEE Trans. Magn., vol. 27, no. 2, pp. 3192–3195, Mar. 1991. [10] A. Karpov, B. Plathner, J. Blondel, M. Schicke, K. H. Gundlach, M. Aoyagi, and S. Takada, “Noise and gain in frequency mixers with NbN SIS junctions,” IEEE Trans. Appl. Supercond., vol. 7, no. 2, pp. 1077–1080, Jun. 1997. [11] Z. Wang, Y. Uzawa, and A. Kawakami, “High current density NbN/ AlN/NbN tunnel junctions for submillimeter wave SIS mixers,” IEEE Trans. Appl. Supercond., vol. 7, no. 2, pp. 2797–2800, Jun. 1997. [12] Y. Uzawa, A. Kawakami, M. Shigehito, and Z. Wang, “Performance of all-NbN quasi-optical SIS mixers for the terahertz band,” IEEE Trans. Appl. Supercond., vol. 11, no. 1, pp. 183–186, Mar. 2001. [13] A. Kawakami, Y. Uzawa, and Z. Wang, “Development of epitaxial NbN/MgO/NbN superconductor-insulator -superconductor mixers for operations over the Nb gap frequency,” Appl. Phys. Lett., vol. 83, no. 19, pp. 3954–3956, Nov. 2003. [14] M. Takeda, Y. Uzawa, A. Kawakami, Z. Wang, and T. Noguchi, “Waveguide-type all-NbN SIS mixers on MgO substrates,” in Proc. 15th Int. Symp. Space Terahertz Technol., Northampton, MA, Apr. 27–29, 2004, pp. 84–90. [15] J. Zmuidzinas, J. W. kooi, J. Kawamura, G. Chattopadhyay, B. Bumble, H. G. LeDuc, and J. Stern, “Development of SIS mixers for 1 THz,” in Proc. SPIE, Kona, HI, Jul. 1998, vol. 3357, pp. 53–62. [16] B. D. Jackson, G. Lange, G. Lange, T. Zijstra, M. Kroug, T. M. Klapwijk, and J. A. Stern, “Niobium titanium nitride-based superconductorinsulator-superconductor mixers for low-noise terahertz receivers,” J. Appl. Phys., vol. 97, no. 11, 2005, Art. ID 113904. [17] B. Plathner, M. Schicke, T. Lehnert, and K. H. Gundlach, “NbN–MgO–NbN junctions prepared on room-temperature quartz substrates for quasi-particle mixers,” IEEE Trans. Appl. Supercond., vol. 7, no. 2, pp. 2603–2606, Jun. 1997. [18] E. R. Carlson, M. V. Schneider, and T. F. McMaster, “Subharmonically pumped millimeter-wave mixers,” IEEE Trans. Microw. Theory Tech., vol. MTT-26, no. 7, pp. 706–712, Jul. 1978. [19] A. Navarrini and B. Lazareff, “275–370 GHz DSB and SSB waveguide mixers employing a tuned Nb/Al-AlO /Nb SIS tunnel junction.” ALMA Memo 351, 2001. [Online]. Available: http://www.alma.nrao. edu/memos/html-memos/abstracts/abs351.html [20] R. Monje, V. Belitsky, C. Risacher, V. Vassilev, and A. Pavolotsky, “SIS mixer for 385–500 GHz with on-chip LO injection,” in Proc. 18th Int. Symp. Space Terahertz Technol., Pasadena, CA, Mar. 21–23, 2007, pp. 44–49. [21] W. L. Shan, S. C. Shi, T. Matsunaga, M. Takizawa, A. Endo, T. Noguchi, and Y. Uzawa, “Design and development of SIS mixers for ALMA band 10,” IEEE Trans. Appl. Supercond., vol. 17, no. 2, pp. 359–362, Jun. 2007.

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[22] J. Zmuidzinas, H. G. LeDuc, J. A. Stern, and S. R. Cypher, “Two-junction tuning circuits for submillimeter SIS mixers,” IEEE Trans. Microw. Theory Tech., vol. 42, no. 7, pp. 698–706, Jul. 1994. [23] T. Noguchi, S. C. Shi, and J. Inatani, “Parallel connected twin SIS junctions for millimeter and submillimeter wave mixers: Analysis and experimental verification,” IEICE Trans. Electron., vol. E78-C, pp. 481–489, 1995. [24] E. C. Tong, R. Blundell, B. Bumble, J. A. Stern, and H. G. LeDuc, “Quantum limited heterodyne detection in superconducting nonlinear transmission lines at sub-millimeter wavelengths,” Appl. Phys. Lett., vol. 67, pp. 1304–1306, Aug. 1995. [25] E. C. Tong, L. Chen, and R. Blundell, “Theory of distributed mixing and amplification in a superconducting quasi-particle nonlinear transmission line,” IEEE Trans. Microw. Theory Tech., vol. 45, no. 7, pp. 1086–1092, Jul. 1997. [26] E. C. Tong, R. Blundell, K. G. Megerian, J. A. Stern, and H. G. LeDuc, “A 650 GHz fix-tuned waveguide SIS distributed mixer with no integrated tuning circuit,” IEEE Trans. Microw. Theory Tech., vol. 13, no. 6, pp. 680–683, Jun. 2003. [27] Z. Wang, H. Terai, A. Kawakami, and Y. Uzawa, “Characterization of NbN/AlN/NbN tunnel junctions,” IEEE Trans. Appl. Supercond., vol. 9, no. 2, pp. 3259–3262, Jun. 1999. [28] S. C. Shi, W. L. Shan, and J. Li, “Theoretical simulation of the mixing performance of distributed superconducting tunnel junction arrays at 1.2 THz,” IEICE Trans. Electron., vol. E90-C, no. 3, pp. 556–565, 2007. [29] A. Skalare, “Determining embedding circuit parameters for DC measurements on quasi-particle heterodyne mixers,” Int. J. Infrared Millimeter Waves, vol. 10, pp. 1339–1353, 1989. [30] C. A. Mears, Q. Hu, and P. L. Richards, “Numerical simulation of experimental data from planar SIS mixers with integrated tuning elements,” IEEE Trans. Mag., vol. 25, no. 2, pp. 1050–1053, 1989. [31] W. H. Press, S. A. Teukolsky, W. T. Vetterling, and B. P. Flannery, Numerical Recipes in C, The Art of Scientific Computing, 2nd ed. Cambridge, U.K.: Cambridge Univ. Press, 1992, pp. 689–699.

Wenlei Shan (M’07) was born in Xi’an, China, in 1972. He received the B.Sc. and Ph.D. degrees in electronic science and technology from Nanjing University, Nanjing, China, in 1995 and 2000, respectively. He joined Purple Mountain Observatory, Chinese Academy of Sciences (CAS), Nanjing, China, in 2000 as a Research Fellow. In 2001, he participated in the B-SMILES project carried out by the Communication Research Laboratory of Japan, developing a 600–720-GHz SIS receiver system. From 2003, as a Foreigner Researcher, he joined the Atacama Large Millimeter/Submillimeter Array (ALMA) Group, National Astronomical Observatory of Japan, Tokyo, Japan, where he was responsible for the design and development of low-noise and wideband SIS mixers for ALMA band 8 and 10 under a collaborative agreement between PMO and NAOJ on ALMA-oriented research and development. In 2006, he joined Purple Mountain Observatory, CAS, as a Senior Researcher. He has been developing a 3 3 focal plane array receiver at 3-mm waveband for the Delinha 13.7-m telescope in China.

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Masanori Takeda was born in Hiroshima, Japan, in 1973. He received the B.S. and M.S. degrees in electrical engineering from Yamanashi University, Kofu, Japan, in 1995 and 1997, respectively, and the Ph.D. degree from the Graduate University for Advanced Studies, Kanagawa, Japan, in 2002. He performed researched at the National Institute of Information and Communications Technology from 2001 to 2009 and at the National Astronomical Observatory of Japan, Tokyo, Japan, for eight months in 2009. He joined the Graduate School of Science and Technology, Shizuoka University, Shizuoka, Japan, in 2009, where he is currently an Assistant Professor. His current research interests include terahertz technologies, submillimeter-wave circuits, and semiconductor and superconducting devices.

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Takafumi Kojima received the B.S. and M.S. degree in physics from the Osaka Prefecture University, Osaka, Japan, in 2005 and 2007, respectively, where he is currently working toward the Ph.D. degree. He is a Research Assistant with the National Astronomical Observatory of Japan, Tokyo, Japan. He has been engaged in SIS mixer and receiver development for band-10 of the Atacam Large Millimeter/ Submillimeter Array. His research interests include superconducting devices and their applications to microwave technology.

Yoshinori Uzawa was born in Tokyo, Japan, on October 29, 1966. He received the B.E. degree in electronics from the Nagaoka University of Technology, Nagaoka, Japan, in 1989, and the M.E. and Ph.D. degrees in applied electronics from the Tokyo Institute of Technology, Tokyo, in 1991 and 2000, respectively. From 1991 to 2005, he was with the National Institute of Information and Communications Technology, where he worked on the development of quasi-optical submillimeter-wave receivers with NbN SIS junctions. He is currently an Associate Professor with the National Astronomical Observatory of Japan, Tokyo, and is the leader of the Atacama Large Millimeter/Submillimeter Array (ALMA) band-10 receiver development. His research interests are in the area of superconducting electronics.

Shengcai Shi (M’97) was born in Nanjing, China, in January 1965. He received the B.S. degree in electronic engineering from Southeast University, Nanjing, China, in 1985, the M.S. degree in electronic engineering from the Graduate School of the Chinese Academy of Sciences (CAS), Beijing, in 1988, and the Ph.D. degree in radio astronomy from the Graduate University for Advanced Studies, Kanagawa, Japan, in 1996. He was with Nobeyama Radio Observatory, National Astronomical Observatory of Japan, Tokyo, Japan, from 1992 to 1998. Since 1998, he has been a Professor and the head

of the Millimeter- and Submillimeter-Wave Laboratory, Purple Mountain Observatory, CAS, where he is leading the development of millimeter- and submilllimeter-wave superconducting receivers for radio astronomy. His current research interests include superconducting device and detector technology, Gaussian optics and quasi-optical system design, and 3-D electromagnetic problems.

Takashi Noguchi was born in Saitama, Japan, on April 3, 1952. He received the B.S., M.S., and Ph.D. degrees in applied physics from Tohoku University, Sendai, Japan, in 1976, 1978 and 1981, respectively. In 1981, he joined the Central Research Laboratory, Mitsubishi Electric Corporation, where he was engaged in the research and development of superconducting devices for analog applications. He left Mitsubishi Electric Corporation in 1991 to join the Nobeyama Radio Observatory, National Astronomical Observatory of Japan (NAOJ), Tokyo, Japan, where he was involved with the research and development of low-noise SIS mixers for millimeter- and submillimeter-wave receivers. In 2005, he joined the Advanced Technology Center, NAOJ, where he is in charge of development and production of SIS junctions for millimeter- and submillimeter-wave receivers of Atacama Large Millimeter Array (ALMA). His current research interest is the development of high-sensitivity superconductive detectors at submillimeter wavelengths.

Zhen Wang received the Ph.D. degree in electrical engineering degree from Nagaoka University of Technology, Nagaoka, Japan, in 1991. He is currently the Group Leader of the Nano ICT Group, National Institute of Information and Communications Technology, Kobe, Japan. His research interests include superconducting devices and physics, superconducting SIS terahertz mixers and photon detectors. Dr. Wang is member of the Japan Society of Applied Physics and the Institute of Electronics, Information and Communication Engineers (IEICE), Japan.

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Broadband Five-Port Direct Receiver Based on Low-Pass and High-Pass Phase Shifters Pablo Pérez-Lara, Íñigo Molina-Fernández, J. Gonzalo Wangüemert-Pérez, and Antonio Rueda-Pérez

Abstract—A simple five-port direct receiver achieving broadband performance and high local oscillator to RF isolation is presented. The new circuit comprises three power detectors exhibiting high series impedance, four resistors, and two low-pass and two high-pass phase shifters. It is shown that the phase-shift networks can be designed to optimize receiver operation over a theoretical decade bandwidth. A 300-MHz–2.7-GHz prototype is built and measured to prove feasibility of this proposal. Index Terms—Diode detector, direct conversion receiver, five-port receiver, homodyne detection, phase shifter, six-port receiver. Fig. 1. Block diagram of the proposed new FPDR.

I. INTRODUCTION

T

HE SIX-PORT technique was first used in the 1960s as an ingenious way of building low-cost microwave and millimeter-wave network analyzers [1]. Later, in the 1990s, a six-port direct receiver (SPDR) architecture was proposed for mass-market production of wireless transceivers [2]. The main advantages of this technology lie in its wideband nature and inherent robustness to some typical issues that affect the performance of homodyne receivers, such as dc offsets, in-phase/ quadrature (I/Q) imbalances, flicker noise, and even-order distortion [3], [4]. In the last years, broadband SPDR designs have been presented for applications demanding a large RF bandwidth, e.g., multiband radios [5], [6] or ultra-wideband (UWB) systems [7]. A SPDR achieving high local oscillator (LO)-RF isolation and ease of implementation in monolithic microwave integrated circuit (MMIC) technology was proposed by the authors in [8] and [9]. Great simplification of the passive circuitry of the receiver was attained by means of differential detection and the high series impedance of the four diode detectors, resulting in a six-port junction made of only four low-pass 60 phase shifters. The RF bandwidth of this SPDR was mainly limited by the phase difference between the LO and RF waves reaching two of the diode detectors, which moved away from the optimum Manuscript received April 02, 2009; revised October 27, 2009. First published March 08, 2010; current version published April 14, 2010. This work was supported in part by the Junta de Andalucía under Project 3SUPER3 and by AT4 Wireless under Contract 806/59.2568. P. Pérez-Lara is with AT4 Wireless, 29590 Málaga, Spain (e-mail: [email protected]). I. Molina-Fernández, J. G. Wangüemert-Pérez, and A. Rueda-Pérez are with the Departamento de Ingeniería de Comunicaciones, ETSI Telecomunicación, Universidad de Málaga, 29071 Málaga, Spain (e-mail: imf, [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2041517

(120 ) at the edges of the band leading to some reduction of the receiver dynamic range [9]. With the aim of overcoming this bandwidth restriction, this paper presents a new broadband five-port direct receiver (FPDR) that uses two low-pass and two high-pass phase shifters to keep the phase difference between the LO and RF waves at the input of the detectors within proper limits. This circuit shares the advantages of the structure implemented in [8], such as LO to RF isolation, but achieves operation over a wider band. Furthermore, since the receiver is a five-port (rather than a six-port), it requires three ADCs instead of four and allows simplification of the RF and baseband circuitry [10]. A prototype working in the 300-MHz–2.7-GHz frequency range is built and measured to show the validness of the proposed approach. II. NEW FPDR The proposed new FPDR is shown in Fig. 1. It comprises two low-pass and two high-pass phase shifters matched to impedance, four resistors, and three power detectors , , and . The detectors are made of typical microwave diodes exhibiting high series impedance [8], and thus: 1) high isolation is obtained between LO and RF ports and 2) as an approximation, the effect of the detectors on the rest of the RF circuitry can be neglected to explain the operation of the receiver. Since the phase shifters connected to the receiver input ports resistors, good return loss are expected are matched by the and RF waves, at both LO and RF ports. The LO which are ideally locked to the same center frequency , go through the phase shifters to reach the power detectors. The outputs of the three detectors are, therefore, given by

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(1) (2) (3)

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where are the gains of the power detectors and and are the frequency responses from the receiver input ports to the outputs of the high-pass and low-pass phase shifters, respectively. Equations (1)–(3) can be rewritten as (4) is the LO amplitude, where complex envelope of the RF signal, and

is the

(5) (6) (7) (8) (9) (10) can be calculated from the outputs The complex envelope as follows: of the detectors (11) and depend on and and can In (11), the constants be found through calibration using the power readings obtained for four signal standards (SSs) [11], [12]. The sensitivity of the receiver performance to nonideal power measurement (caused by noise and detectors nonlinearity) is affected by the value of the constants defined above [1]. Hence, this dependence must be studied in order to obtain proper specifications to design the phase shifters. Under power measurement can be obuncertainties, the nonideal complex envelope tained by means of (12) are the power measurement errors. For the sake of where are random, simplicity, in this analysis, it is assumed that uncorrelated, and have the same rms value . Therefore, can be calculated from (11) and (12) the rms signal error as (13) where operator error gain given by

denotes expectation and

is the

(14) is scaled by , which must In (13), the term thus be minimized for optimal receiver operation. This objecand tive can be fulfilled by means of: 1) maximization of

Fig. 2. Simulation of the dependence of

G (f ) with the phase of q .

2) choice of an adequate configuration. With regard to the and proposed FPDR, the study of the relation between can be simplified, since from (8)–(10), it can be seen that ideally: 1) inside the passband of the phase shifters; 2) ; . Therefore, only the phase of needs to and 3) has been simulated be taken into account. Consequently, and plotted in Fig. 2. versus From Fig. 2, it is clear that the optimal phase of is 120 , as previously reported in [1]. Furthermore, to avoid amplificadB), the tion of power measurement errors (i.e., receiver phase shifters should be designed to achieve (15) In this study, (15) is chosen as the main design goal to be fulfilled by the five-port circuitry in order to minimize degradation of the receiver bit error rate (BER). Such a requirement could be met with low-pass phase shifters (ideally exhibiting linear phase-frequency characteristic in the passband) only over 2.3:1 frequency ratio (see Fig. 3). On the other a 158 70 hand, the advantage of using both low-pass and high-pass phase shifters, as in Fig. 1, comes from the fact that (15) can be satisfied over a much broader band due to the resulting nonlinear phase-frequency characteristic of and . This is illustrated in and Fig. 4. To obtain this graph, the responses of a three-section low-pass phase shifter and a two-section highpass phase shifter, respectively (see Fig. 5), have been simulated. The number of sections and the cutoff frequency of the unit cells were chosen to optimize return loss and phase response. In Fig. 4, it is shown that the phase of decreases from to a minimum of around 158 at normalized frequency [tracking the phase of ], and then goes up to 80 at 158 again at [following ]. Hence, the condition given by (15) would be ideally fulfilled over more than a decade, which is a significant improvement over a receiver implemented with low-pass phase shifters only.

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Fig. 5. (a) Three-section low-pass phase shifter. (b) Two-section high-pass phase shifter.

Fig. 3. Ideal phase response T versus normalized frequency of a low-pass to f : . phase shifter. Equation (15) is satisfied only from f

=1

=23

Fig. 6. Photograph of the FPDR prototype including baseband amplifiers.

Fig. 4. Ideal phase response of the FPDR phase shifters and phase of q versus normalized frequency. Circles: low-pass phase shifter. Squares: high-pass phase shifter. Line: phase of q .

III. PROTOTYPE IMPLEMENTATION AND MEASUREMENT A prototype has been built on a 1.6-mm FR4 substrate using commercial off-the-shelf surface mount components. The detectors are based on the HSMS-2850 zero-bias Schottky diode from Avago Technologies, San Jose, CA, using the same topology than in [8]. The FPDR includes the baseband circuitry required to amplify the outputs of the three power detectors, as seen in Fig. 6. Taking into account the results obtained in Section II, the phase shifters are implemented using the structures shown in Fig. 5, ideally targeting a decade bandwidth from 300 MHz to 3 GHz. In Fig. 7, the measured -parameters of the receiver are represented. Return losses are better than 12 dB at LO and RF ports. LO to RF isolation decreases from 45 dB at 300 MHz to nearly 15 dB at 3 GHz due to the parasitic parallel capacitor of the

Fig. 7. Measurement of the S -parameters of the FDPR prototype. Line: return loss at LO port. Circles: return loss at RF port. Squares: LO to RF isolation.

diodes that tends to reduce the series impedance of the detectors as frequency increases.

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Fig. 9. Measured insertion loss of the high-pass phase shifter.

Fig. 8. q parameters of the FPDR prototype. Solid lines: measurement. Dashed lines: simulation. (a) Phase. (b) Amplitude.

The parameters of the FPDR prototype are plotted in Fig. 8. Good agreement exists between simulated and measured values GHz, in the 300-MHz–2-GHz frequency range. Beyond and values depart from simulation. This is the measured partially caused by the notch of the high-pass phase shifter at 2.9 GHz shown in Fig. 9, which can be explained by parasitics that were not taken into account during simulation. Due to this notch, the receiver is usable from 300 MHz to a maximum RF frequency of 2.7 GHz rather than 3 GHz, which means 9:1 bandwidth.

IV. RECEIVER PERFORMANCE The BER achieved by the FPDR prototype is measured in this section. During the tests, two signal generators provided the LO and modulated RF signals, respectively.

Fig. 10. BER measurement versus RF input power and carrier frequency. : GHz. White circles: f : GHz. Dashed line: Squares: f f : GHz. Black circles: f : GHz. Line: f : GHz.

=15

= 0 36

=21

= 09 =27

The outputs of the detectors were linearized by means of a lookup table and linear interpolation, as in [9]. The LO power was chosen to be 20 dBm because it provided the best results. Equation (11) was used to calculate the I and Q components and were of the received signal. The calibration constants found with the four SS method [11], [12]. Three symbols of a quadrature phase-shift keying (QPSK) modulated signal plus (i.e., no RF input signal) were used as calibration standards. The receiver BER is measured versus RF input power for a 16 quadrature amplitude modulation (16 QAM) input signal at five different frequencies and is represented in Fig. 10. The data rate was limited to 1 MBd by the data acquisition hardware. At and GHz, 40-dB dynamic range is achieved at . With regard to and GHz, the dynamic range is 30 dB. As seen in Fig. 10, this reduction of

PÉREZ-LARA et al.: BROADBAND FPDR

dynamic range is due to degraded performance of the receiver beyond 5-dBm input power at these frequencies. This can be explained by the high imbalance between the amplitudes of constants and (Fig. 8) that makes the receiver more sensitive to departure from quadratic law experimented by the power deGHz tectors. In Fig. 10, this effect is more evident at GHz for 5-dBm input power due to the higher than at imbalance observed in Fig. 8. Despite the degradation of demodulation performance at frequencies beyond 2 GHz caused by imbalances between ports 3 and 5, the implemented prototype has achieved 40-dB dynamic over 5:1 bandwidth (0.3–1.5 GHz) and range at 30 dB over the whole 9:1 operation bandwidth (0.3–2.7 GHz). These results are a great improvement over the receiver presented in [8] and [9], which achieved 30-dB dynamic range over its 3:1 operation bandwidth (0.8–2.4 GHz) and 39 dB at the center frequency of 1.6 GHz for the same 1-MBd symbol rate. V. CONCLUSION In this paper, a new five-port receiver exhibiting high isolation between the LO and RF ports has been presented. The proposed circuit makes use of both low-pass and high-pass phase shifters to achieve a theoretical decade bandwidth, which is a great improvement over previous six-port receivers based on low-pass phase shifters. A prototype working in the 0.3–2.7-GHz frequency range has been built and measured. BER measurements have been made obtaining excellent performance over the whole operation bandwidth. These results have been compared with those obtained by six-port receivers made of low-pass phase shifters to show the advantages of the proposed new receiver. REFERENCES [1] G. F. Engen, “The six-port reflectometer: An alternative network analyzer,” IEEE Trans. Microw. Theory Tech., vol. MTT-25, no. 12, pp. 1075–1080, Dec. 1977. [2] J. Li, R. G. Bosisio, and K. Wu, “A six-port direct digital millimeter wave receiver,” in IEEE MTT-S Int. Microw. Symp. Dig., May 23–27, 1994, vol. 3, pp. 1659–1662. [3] B. Razavi, “Design considerations for direct-conversion receivers,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 44, no. 6, pp. 428–435, Jun. 1997. [4] J. Li, R. G. Bosisio, and K. Wu, “Computer and measurement simulation of a new digital receiver operating directly at millimeter-wave frequencies,” IEEE Trans. Microw. Theory Tech., vol. 43, no. 12, pp. 2766–2772, Dec. 1995. [5] X. Z. Xiong and V. F. Fusco, “Wideband 0.9 GHz to 5 GHz six-port and its application as digital modulation receiver,” Proc. Inst. Elect.. Eng.—Microw., Antennas, Propag., vol. 150, no. 4, pp. 301–307, Aug. 2003. [6] F. R. De Sousa and B. Huyart, “A novel RF front-end architecture for multi-band transceivers,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 6–11, 2004, vol. 2, pp. 1281–1284. [7] N. Seman, M. E. Bialkowski, S. Z. Ibrahim, and A. A. Bakar, “Design of an integrated correlator for application in ultra wideband six-port transceivers,” in IEEE AP-S Int. Antennas Propag. Symp., Jun. 1–5, 2009, pp. 1–4. [8] P. Perez-Lara, I. Molina-Fernandez, J. G. Wanguemert-Perez, A. Gonzalez-Salguero, and J. A. Medina-Rodriguez, “Novel wideband sixport receiver structure,” in Eur. Microw. Conf., Oct. 9–12, 2007, pp. 1030–1033.

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[9] P. Perez-Lara, I. Molina-Fernandez, J. G. Wanguemert-Perez, A. Gonzalez-Salguero, and J. A. Medina-Rodriguez, “Wideband homodyne six-port receiver with high LO-RF isolation,” IET Proc. Microw., Antennas, Propag., vol. 3, no. 5, pp. 882–888, Aug. 2009. [10] K. Mabrouk, B. Huyart, and G. Neveux, “3-D aspect in the five-port technique for zero-IF receivers and a new blind calibration method,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 6, pp. 1389–1396, Jun. 2008. [11] Y. Xu and R. G. Bosisio, “On the real-time calibration of six-port receivers (SPRs),” Microw. Opt. Technol. Lett., vol. 20, no. 5, pp. 318–322, Mar. 1999. [12] P. Perez-Lara, I. Molina-Fernandez, J. G. Wanguemert-Perez, and R. G. Bosisio, “Effects of hardware imperfection on six-port direct digital receivers calibrated with three and four signal standards,” Proc. Inst. Elect. Eng.—Microw., Antennas, Propag., vol. 153, no. 2, pp. 171–176, Apr. 2006. Pablo Pérez-Lara was born in Antequera, Spain, in 1980. He received the Ing. Tel. degree from the Universidad de Málaga, Málaga, Spain, in 2004, and is currently working toward Ph.D. degree at the the Universidad de Málaga. From 2004 to 2005, he was with ETSI Telecomunicación, Universidad de Málaga, as an Assistant Researcher. Since 2005, he has been with AT4 Wireless, Málaga, Spain, as an RF and Microwave Engineer. His main research interests focus on the development of wideband RF frontends for software-defined multiband and multistandard transceivers.

Íñigo Molina-Fernández received the Ing. Tel. degree from the Universidad Politécnica de Madrid, Madrid, Spain, in 1989, and the Ph.D. degree from the Universidad de Málaga, Málaga, Spain, in 1993. Since 1989, he has been with ETSI Telecomunicación, Universidad de Málaga, as an Assistant Professor, and currently as an Associate Professor. His research interest is in the area of optical and microwave communications, where he has led several projects regarding simulation of optical integrated devices and prototyping of microwave/millimeter-wave systems.

J. Gonzalo Wangüemert-Pérez was born in Las Palmas de Gran Canaria, Spain, in 1968. He received the Ing. Tel. degree from the Universidad Politécnica de Madrid, Madrid, Spain, in 1992, and the Ph.D. degree from the Universidad de Málaga, Málaga, Spain, in 1999. Since 1993, he has been with ETSI Telecomunicación, Universidad de Málaga, as an Assistant Professor, and currently as an Associate Professor. His research interests focus on the development of numerical techniques to be applied in the analysis and design of optical devices.

Antonio Rueda-Pérez was born in Alhaurín el Grande, Spain, in 1983. He received the Ing. Tel. degree from the Universidad de Málaga, Málaga, Spain, in 2008. Since 2008, he has been with ETSI Telecomunicación, Universidad de Málaga, as an Assistant Researcher. His main research interest is in the area of wideband microwave circuits on plastic substrates and low-temperature co-fired ceramic (LTCC).

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A 3–5-GHz UWB Front-End for Low-Data Rate WPANs in 90-nm CMOS Marco Cavallaro, Giuseppina Sapone, Member, IEEE, Guido Giarrizzo, Alessandro Italia, and Giuseppe Palmisano, Senior Member, IEEE

Abstract—A 3–5-GHz ultra-wideband front-end for low-data rate wireless personal area networks is presented in this paper. The circuit, fabricated in a 90-nm CMOS technology, includes a Gaussian-envelope carrier-based transmitter, a direct-conversion down-converter, and an LO frequency synthesizer. A highly accurate Gaussian pulse shape is achieved by using a nonlinear pulse-forming approach, which provides a spectral efficiency of 38%. Moreover, a side-lobe rejection higher than 27 dB is reached without external filters. The transmitter achieves a peak pulse repetition frequency of 500 MHz supporting both pulse-position modulation and binary phase-shift-keying modulation schemes. It includes a baseband digital modulator, which implements spreading and time-hopping functions, and can be easily programmed to support different data rates, mean pulse repetition frequencies, and modulation timing parameters. The down-converter exploits a single-ended low-noise amplifier to avoid the off-chip wideband balun and minimize power consumption. It provides a 29-dB conversion gain and 5.2-dB noise figure while drawing only 8 mA. Operating from a 1.2-V supply, the overall front-end dissipates 42 pJ/pulse in RX mode and 56 pJ/pulse in TX mode. Index Terms—CMOS integrated circuits, low-power circuits, transceivers, ultra-wideband (UWB), UWB pulse generators, wireless personal area networks (WPANs).

I. INTRODUCTION N THE last few years, the increased demand for industrial, vehicular, residential, and medical applications has generated a strong interest in low-data rate wireless personal area networks (WPANs). The IEEE 802.15.4a standardization committee has defined a new standard for these low-power short-range wireless applications [1], intended as an alternate PHY layer for the existing IEEE 802.15.4 [2]. Ultra-wideband (UWB) communication has been recognized as the suitable technology for the LR-WPANs since it provides several advantages over narrowband systems such as localization capabilities, robustness against multipath fading, high user capacity, and low power consumption [3], [4]. The standard defines a UWB physical layer, which operates in the 3–5-GHz and 6–10-GHz frequency bands. The protocol employs an impulse radio-based signaling scheme and the data bits are represented by a sequence of pulses (burst), which have a maximum pulse

I

Manuscript received July 28, 2009; revised January 02, 2010. First published March 01, 2010; current version published April 14, 2010. M. Cavallaro, G. Sapone, A. Italia, and G. Palmisano are with the Dipartimento di Ingegneria Elettrica Elettronica e dei Sistemi, Facoltà di Ingegneria, Università di Catania, Catania I-95125, Italy (e-mail: [email protected]; [email protected]; [email protected]; [email protected]). G. Giarrizzo is with STMicroelectronincs, Catania I-95121, Italy (e-mail: [email protected]). Digital Object Identifier 10.1109/TMTT.2010.2042653

repetition frequency (PRF) of 500 MHz. The data modulation technique is a combination of both pulse-position modulation (PPM) and binary phase-shift-keying (BPSK) modulation schemes. The signal bandwidth is approximately 500 MHz. A wider bandwidth is provided by some optional channels. The time-hopping technique is employed to ensure interference rejection for multi-user access. In this paper, a UWB front-end for LR-WPAN applications is presented. The front-end operates in the 3–5-GHz frequency band supporting a maximum PRF of 500 MHz and both PPM and BPSK modulation schemes. It takes advantage of a carrier-based transmitter and a direct-conversion down-converter, thus becoming highly flexible and suitable for different UWB standards. Thanks to the adopted circuit solutions, the front-end exhibits excellent performance along with low power consumption. The transmitter makes use of a mixed-signal pulse-forming approach, which provides high spectral efficiency and side-lobe rejection without requiring an external filter or balun. It allows an accurate, programmable, and process-independent control of the UWB pulse bandwidth. The down-converter avoids the RF external balun and achieves a power consumption as low as 9.6 mW by exploiting a two-stage single-ended low-noise amplifier (LNA). Finally, the front-end integrates a very low-power LO frequency synthesizer, which draws only 5.5 mA from a 1.2-V supply voltage. This paper is organized as follows. In Section II, UWB transceiver architectures are discussed and the proposed solution is presented. The transmitter and the down-converter implementations are detailed in Sections III and IV, respectively. The LO frequency synthesizer is described in Section V. Section VI presents the front-end experimental results, and Section VII concludes the paper. II. UWB TRANSCEIVER ARCHITECTURES The design of UWB transceivers for low-data-rate WPANs poses several challenges, since it must address the requirements of low power consumption, high performance, and flexibility. The choice of the proper transceiver architecture is crucial to trade off performance and low power consumption. In particular, the UWB pulse-generation technique is the key factor to fulfill the application requirements. UWB pulse generators are usually implemented using a carrier-less or a carrier-based approach. The analog carrier-less architectures suffer from different drawbacks [6]–[8]. They are typically implemented using discrete components, are not Federal Communication Commission (FCC) mask-compliant, and exhibit high power consumption. On the other hand, the digital carrier-less architectures guarantee low complexity, high integration level, and low power consumption [9]–[13]. However, the spectrum of the generated

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CAVALLARO et al.: 3–5-GHz UWB FRONT-END FOR LOW-DATA RATE WPANs IN 90-nm CMOS

UWB pulse exhibits high side-lobes. Therefore, the transmitter provides poor spectral efficiency and usually requires an offchip filter to meet FCC mask specifications [14]. The strong dependence of the pulse characteristic from process and temperature variations represents a further drawback. Finally, these architectures provide low flexibility since their use is limited to single-channel UWB applications. Most of the above-mentioned drawbacks can be overcome by using a delay-locked loop (DLL) [11] or a phase-locked loop (PLL) [15] at the expense of a significant increase in power consumption and loss of architecture simplicity. In the carrier-based architectures [5], [16]–[26], the UWB pulse is generated by multiplying an envelope signal with a sinusoidal carrier. Therefore, both bandwidth and central frequency of the UWB pulse can be separately and accurately controlled by adjusting the pulse envelope and the carrier frequency. As a consequence, the carrier-based architecture is able to support single-channel and multichannel applications along with multiband operation, thus resulting in flexibility and suitability for different UWB standards. The accuracy of the pulse envelope shape affects power consumption, circuit complexity, and performance [13], [17]–[22]. The rectangular envelope can be easily implemented by using a low-complexity low-power digital circuit [17]. However, the achievable spectral efficiency, defined as the ratio of the transmitted pulse power to the allowed power in the 3–5-GHz band, is limited to 13% and the theoretical side-lobe rejection is lower than 15 dB. Better performance could be achieved with more complex digital envelope pulse generators, which approximate a raised-cosine envelope shape by means of an -step staircase waveform [19], [26]. However, this technique limits the achievable performance since an accurate approximation requires complex high-speed digital circuits, which significantly increase the power consumption or limit the pulse duration. Excellent performance can be achieved by using an analog pulse envelope generator [5], [21], [22]. In particular, the use of a Gaussian envelope generator maximizes both side-lobe rejection and spectral efficiency of the UWB pulse. However, a high-performance carrier-based architecture requires analog wideband RF circuits and high-frequency digital circuits. Therefore, a strong design effort must be carried out to address the low-power constraint of the application. Moreover, because of the leakage of the sinusoidal carrier at the transmitter output, the accomplishment of the FCC mask requirement is not trivial [5], [15], [25]. For the implementation of UWB receivers, noncoherent demodulation schemes, such as transmitted reference (TR) and energy detection (ED) receivers provide low complexity avoiding the use of a LO carrier signal as local [27], [28]. Indeed, the incoming signal pulse is correlated with itself in the ED or with a delayed transmitted reference pulse in the TR. As a drawback, the noise of the reference pulse affects the receiver sensitivity [28]. Moreover, these solutions exhibit low bandwidth efficiency. Carrier-based receivers provide better performance at the expense of additional circuit complexity. This approach requires an LO reference that can be generated by a free-running oscillator [29]. A direct-conversion approach can be exploited by making use of a high-speed analog–digital converter (ADC)

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Fig. 1. Block diagram of the UWB Front-end.

(500 MS/s) that samples the down-converted UWB signal. As an alternative, the quadrature analog correlation (QAC) technique performs an analog baseband correlation of the down-converted signal. In this case, a low-power ADC with a sampling rate equal to the pulse rate (several Mpulse/s) is adequate. While the direct-conversion receiver provides better bit-error-rate (BER) performance and gives high flexibility, the QAC architecture saves power consumption since it avoids the use of high-speed ADCs [29]. The flexiblility and bandwidth efficiency of carrier-based receivers can be further improved by taking advantage of a PLL and phase-recovery digital baseband circuits. However, the target of low power consumption becomes more difficult to achieve due to the increased circuit complexity. The block diagram of the proposed front-end is shown in Fig. 1. It integrates a transmitter, a down-converter, and an LO frequency synthesizer. The transmitter adopts a carrier-based architecture [5] and makes use of an improved mixed-signal nonlinear pulse-forming technique to generate a highly accurate Gaussian pulse envelope. It is composed of a baseband digital modulator, a UWB pulse generator, and an output buffer. The receiver section integrates a down-converter. The circuit includes a two-stage single-ended LNA and a double-balanced provides on-chip I/Q mixer. An integrated transformer single-ended-to-differential conversion of the RF signal. The proposed down-converter is compatible with both carrier-based direct conversion and QAC architectures. The down-converter is the most challenging RX building block, since both input matching and noise performance have to be met at a low current budget. The LO frequency synthesizer is implemented by means of a programmable integer- PLL. Using a 31.2-MHz reference, the PLL synthesizes the LO carrier between 3.494–4.493 GHz in 499.2-MHz steps. It also provides a fixed 499.2-MHz clock signal for the baseband digital modulator. The receiver LO interface includes a 2 order poly-phase filter, which generates

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Fig. 2. Functional timing chart of the transmitter.

the I/Q LO signals. Each quadrature path comprises a differential amplifier to enhance the receiver LO signal. A differential amplifier is also used for the transmitter LO signal. III. TRANSMITTER The core of the transmitter is the pulse-forming circuit, which is composed by a nonlinear ramp generator and a pseudo-Gaussian pulse generator. The latter includes a pulse envelope generator (PEG) and an analog multiplier. The PEG is triggered by a trapezoidal wave produced by the ramp generator. The analog multiplier, driven by the modulated LO signal, up-converts the pseudo-Gaussian pulse envelope to the desired center frequency. The BPSK modulator changes the LO signal phase according to the baseband data. It includes a switch to reduce the LO leakage at the TX output when no pulses are generated. The output buffer enhances the signal power level and provides differential-to-single-ended conversion with broadband matching. The transmitter includes a baseband digital modulator, which allows both IEEE 802.15.4a preamble and symbol data to be generated. It sets the modulation parameters (e.g., data rate, PRF, and burst structure) and performs spreading and time-hopping functions. The functional timing chart of the transmitter is described in Fig. 2. In the dashed box, the temporal relation between the ramp generator output signal and the output UWB pulse characteristics is highlighted.

Fig. 3. Schematic of the UWB pulse generator.

A. UWB Pulse Generator The circuit schematic of the pseudo-Gaussian pulse generator is shown in Fig. 3. The PEG consists of two cross-coupled - ) differently biased through differential pairs ( , resistors , the unbalancing circuit composed of . The biasing produces an offset voltage and current sources . The pulse envelope generator output curequal to rent is

(1) Then, the output current is the difference between the current and - . By exploiting the of differential pairs large-signal model of the source-coupled MOS pair, the transfer characteristic of the PEG be written by (2), shown at the bottom and have the known meaning, of this page, where is the maximum (minimum) value of the is the and tail ramp generator output, and current. and are given by (3) (4)

(2)

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Fig. 6. Detailed block diagram of the ramp generator. Fig. 4. Input–output characteristic of the PEG.

and regarddrain voltages of current mirrors less of the PEG input signal. Therefore, the currents in and are accurately set to , where is the current mirror ratio. The analog multiplier ), is implemented by means of a folded Gilbert quad ( which allows 1.2-V supply voltage operation. It performs the up-conversion of the generated pulse envelope to the RF carrier. B. Ramp Generator

Fig. 5. Mismatch effects of PEG tail current sources on the UWB pulse.

The output current along with and are plotted in Fig. 4. By applying a positive (negative) linear ramp at the input of the PEG, both differential pairs switch. However, due ( - ) switches beto the unbalancing biasing, pair ( - ). Therefore, the resulting current of the fore cross-coupled structure rises and falls, approximating a current pulse with a Gaussian shape. However, unlike a Gaussian shape, there are not asymptotic tails. As highlighted in Fig. 2, the pulse duration is fixed by the rising/falling time of the ramp generto ator output defined as the time needed to transit from (or vice versa). No further effect is produced at the output . Since the of the PEG if the ramp voltage goes beyond PEG works in large signal condition, the tail currents of the differential pairs are differently modulated because of the MOS channel-modulation effect. This produces both an asymmetry in the pulse envelope and an LO ringing at the TX output, as is shown in Fig. 5. To overcome these drawbacks, a bias control circuit was included to guarantee accurate tail currents in dynamic conditions. and The circuit consists of the differential pair replicas , and the feedback resistors . It sets equal the

To achieve a pulse envelope very close to a Gaussian shape, a nonlinear ramp generator was adopted. The nonlinearity of the ramp is used to compensate for the envelope pulse tail clipping and - . due to the square-root characteristic of This allows a high improvement in the spectral efficiency with respect to the case of linear ramp [5], [22]. A detailed block diagram of the ramp generator is shown in Fig. 6. The ramp generator mainly consists of a six-stage shift register, a nonlinear digital–analog converter (DAC), and a low-pass filter (LPF). The rising/falling edges of the PPM signal are delayed by the shift register and combined by the DAC to produce a staircase waveform smoothed by the LPF. A bandwidth control circuit supervises the ramp generator core function. It uses a high-frequency reference clock signal allowing an accurate and process-independent control of the pulse bandwidth. Finally, a synchronization circuit manages the baseband PPM-BPSK signals to guarantee a robust data transmission at high PRFs and enable the LO switch during the pulse generation. Fig. 7 highlights the advantage of the adopted solution through the comparison of the simulated pulse spectrum with nonlinear and linear ramp generator. Moreover, the dependence of the UWB pulse on temperature and process variations is shown in Figs. 8 and 9. Thanks to the adopted mixed-signal pulse-forming, the Gaussian envelope shape of the UWB generated pulse is slightly affected by temperature and process variations. C. BPSK Modulator The schematic of the BPSK modulator is shown in Fig. 10. It is made up of a multiplexer and a switch. The multiplexer is ), driven implemented by a transconductance stage (

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Fig. 10. Schematic of the BPSK modulator.

Fig. 7. Simulated spectrum of the UWB pulse for linear and nonlinear ramp.

Fig. 11. Simplified schematic of the output buffer.

controlled by the synchronization circuit of the ramp generor ator, steers the tail current enabling transistors . Resistor increases the switch linearity. Fig. 8. Simulated UWB pulse versus temperature.

D. Output Buffer

Fig. 9. Montecarlo simulation of generated UWB pulse.

by the LO, and a Gilbert quad mixer ( ), which is con) trolled by the BPSK baseband signal. The switch ( prevents the multiplexer output from driving the pulse generator during the idle time interval, thus reducing the LO leakage at the TX output. It employs a current steering topology to guar, antee high-speed operation. The differential pair

A simplified schematic of the output buffer is shown in Fig. 11. The buffer is composed of a driver and eight shunt-connected transconductance stages. A 50- load resistor guarantees broadband output matching whereas performs an ac coupling with the antenna. Each transconductance stage is made up of a pMOS differential stage with a nMOS , which provides differcurrent mirror active load, ential-to-single-ended conversion. A second gain stage, i.e., the , delivers the output current to common-source transistor is accurately set by the the 50- load. The bias current in and that perform a pseudo-mirror feedback resistors and . At the operating frequency, castructure with opens the feedback loop and sets the load resistance pacitor . Indeed, to preserve of the differential stage to the value of broadband operation, a well-controlled load is mandatory. The use of shunt-connected transconductance stages increases by the dominant pole frequency of the buffer, since it a factor is produced by resistance and the gate–source capacitance . On the other hand, the pole frequency at the of transistor output of the driver stage decreases by the same factor. Since this last pole is at higher frequency, a tradeoff exists in the , which optimizes number of transconductance stage

CAVALLARO et al.: 3–5-GHz UWB FRONT-END FOR LOW-DATA RATE WPANs IN 90-nm CMOS

Fig. 12. Simplified block diagram of the baseband digital modulator.

Fig. 13. Schematic of the down-converter.

the buffer cutoff frequency at the cost of a slightly higher power consumption. Finally, it is worth noting that the circuit does not require external components and is very suitable for scaled CMOS technologies, which impose low-voltage operation. E. Baseband Digital Modulator The baseband digital modulator performs the mapping of input data bits into a data symbol, which consists of a burst of UWB pulses modulated using both BPSK and PPM techniques. The baseband digital modulator can be properly configured to address the IEEE 802.15.4a PHY frame generation and modulation requirements. It is also potentially open to comply with customized protocols. As shown in the simplified block diagram in Fig. 12, the circuit includes a preamble generator, a data generator, and a multiplexer. For setup configuration and data storage purposes, an external interface of 13 input bits and two output bits is used. The baseband digital modulator was properly designed to guarantee high flexibility. Indeed, the system is able to generate preamble codes with a length capacity of 31/127 for ranging functionality. The symbol structure (i.e., the burst sequence and the symbol duration) of the transmitted data can be easily programmed. The modulator implements the scrambling function to support the multi-user access by means of the time-hopping technique. At the same time, it provides pseudorandom pulse-position displacement and the spreading of the polarity, thus allowing a smoothing effect on the output signal spectrum. IV. DOWN-CONVERTER The simplified schematic of the down-converter is shown in Fig. 13. The two-stage LNA employs a single-ended topology to avoid the external balun and minimize power consumption [30]. The first stage is made up of a current-reuse PMOS/NMOS and implemented pair with gate and source inductances

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Fig. 14. Simplified equivalent lumped model of the down-converter input-matching network.

by means of bonding wires to save silicon area. Bypass capac, and perform the ac coupling between tranitors and , thus obtaining a common-source-like consistors is included to bias trannection. A dc-feedback amplifier and to set accurately the bias current in the second sistor . Bonding wire inductances and provide stage 50- broadband matching. The lack of common-gate transisand causes the Miller effect on the tors in series with gate–drain capacitances and reduces reverse isolation. However, the proposed LNA configuration takes advantage of the Miller effect to perform input matching, as will be explained later. On the other hand, stability was carefully considered and a robust performance was guaranteed with respect to impedance variaand . tions at the drain of A simplified equivalent lumped model of the input-matching and network is sketched in Fig. 14, where transistors are in a shunt connection. If the gate resistance of and is minimized by a proper layout strategy, the model shows a good fitting with simulated results. The broadband matching capability is provided by properly setting the lower and the higher resonance frequencies of the input network. The lower resoand the equivnance frequency is produced by inductors , where , alent capacitance represents the equivalent input capaciand and . Thanks to the tance due to the Miller effect on , the lower resonance frequency is dominant contribution of and hence a lower current achieved despite smaller value of consumption with respect to usually adopted nMOS commonsource solutions [5], [29]. Therefore, the power-constrained simultaneous noise/input matching [31] can be addressed without increasing the transistor width or adding gate–source capacitance. As a result, either high power consumption or degradation of gain and noise figure performance is avoided. Inductor and the equivalent shunt capacitance at the source nodes provide the higher resonance frequency of the matching network. The second stage employs a transformer-loaded cascode topology. It improves both LNA gain and reverse isolation. The implements transformer-based reactive network a resonant load, which boosts the LNA gain at high frequency, thus compensating for the single-pole low-pass behavior of the is input stage, which is around 4 GHz. The shunt resistor used to broaden the operating bandwidth. A pMOS transistor shunts implementing a single-bit gain control. The variable-gain functionality is required since the UWB receiver manages signals with a large dynamic range. Transformer was properly designed by using an interleaved two-turn

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Fig. 15. Layout of the down-converter transformer.

Fig. 17. Schematic of the charge pump.

Fig. 16. Block diagram of the LO frequency synthesizer.

symmetrical structure, as shown in Fig. 15. Each winding has a width of 6 m and is composed of a stack of three Cu metal layers plus a top Al layer. Transformer substrate losses were reduced by means of a conductive patterned ground shield. The primary and the secondary coils were designed to provide inductance values of 2.2 and 2 H, respectively, with quality factor of 12 and 14 at 4 GHz. The magnetic coupling coefficient is as high as 0.8. Since the LNA adopts a single-ended topology, extensive postlayout EM simulations were carried out to estimate layout parasites, especially in both the supply and ground paths. The on-chip ground reference of the LNA was implemented by means of a low-resistive/low-inductance ground plane, by exploiting multilayer metal patterns. This approach is of primary importance to reduce the on-chip ground impedance. Moreover it makes possible a controlled implementation of by means of down-bonding wire. To the source inductance improve stability of the LNA, the ground reference of the first and second stage was separated. The double-balanced mixers make use of a voltage-to-current ( – ) converter, made up of the pseudo differential pair and a Gilbert quad ( ). The secondary winding of transdrives the – converter and provides its input bias former with the center tap. The Gilbert quad is resistively voltage allow the optimization of the current in the loaded. Resistors switching transistors and in the – converter independently.

Fig. 18. Schematic of the LC-VCO.

This technique also has an advantage at the output swing, since is reduced. the voltage drop across the load resistances V. LO FREQUENCY SYNTHESIZER The block diagram of the LO frequency synthesizer is shown in Fig. 16. It is implemented by means of a programmable PLL, which is composed of a phase-frequency integerdetector (PFD), a charge pump, a loop filter, an LC-VCO, and a programmable frequency divider. By using two-bit channel-selection digital word (B0, B1), the PLL synthesizes the LO carrier between 3.494–4.493 GHz in 499.2-MHz steps from a 31.2-MHz reference. It also generates the 499.2-MHz clock for the baseband modulator. A. PFD and Charge Pump The PFD was implemented by means of well-known threestate with a delay circuit in the reset path to eliminate the dead zone problem. Fig. 17 shows the charge pump schematic. The circuit adopts a source-switching topology [15], which guarantees high speed while avoiding high current spikes at the output. To minimize the current variation over the output voltage swing, a low-voltage cascode structure was employed for the current , and were used for replica mirrors. Transistors

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Fig. 19. Block diagram of the programmable divider.

Fig. 20. Block diagram of the multimodulus prescaler.

Fig. 22. Measured output UWB pulse (2-MHz PPM-BPSK baseband data, 3.993-GHz LO). (a) Time-domain measurement. (b) Frequency-domain measurement.

Fig. 23. Time-domain measurement of a 500-Mpulses/s burst (2-ns width pulses, 3.993-GHz LO).

Fig. 21. Chip micrograph.

biasing to guarantee the same bias condition when the charge pump is turned on. B. VCO Among the PLL building blocks, the VCO is the most challenging circuit since it has an inherent power-hungry nature. Moreover, it is extremely difficult to obtain a wide tuning range along with low power consumption. The CMOS technology

Fig. 24. Down-converter S .

scaling is further complicating the design of wideband VCOs. Indeed, the reduced device length results in a lower supply

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Fig. 28. Baseband envelope pulse shape at the down-converter output with a 3.996-GHz 10-mV TX pulse at the down-converter input. Fig. 25. Down-converter conversion gain.

Fig. 29. PLL phase-noise measurement.

Fig. 26. Down-converter DSB noise figure.

Fig. 30. VCO tuning range.

Fig. 27. Conversion gain versus input power at low gain setting (f 20 MHz).

=

voltage, which in turn limits the tuning control voltage and hence the maximum achievable tuning range. Moreover, short-channel effects reduce the transistor transconductance, thus a higher bias current is required to fulfill the start-up condition. The schematic of the proposed LC-VCO is diagrammaed in Fig. 18. The VCO employs a fully differential nMOS cross-coupled topology. The LC tank consists of a differen, N+POLY/N-WELL MOS varactors tial spiral inductor , and two switched metal–insulator–metal (MIM) capac. The MOS varactors provide continuous itors fine-frequency tuning whereas switched capacitors, which are controlled by the two-bit channel-select word, set the coarse tuning steps. To maximize the capacitance tuning range

Fig. 31. PLL output spectrum.

, the varactors were connected using ac coupling and proper biasing. The VCO was with MIM capacitors designed by adopting a methodology, which provides simultaneous optimization of phase noise and tuning range with the constraint of minimum power consumption [32].

CAVALLARO et al.: 3–5-GHz UWB FRONT-END FOR LOW-DATA RATE WPANs IN 90-nm CMOS

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TABLE I SUMMARY OF FRONT-END MEASURED PERFORMANCE AND COMPARISON WITH THE STATE-OF-THE ART

C. Programmable Divider The block diagram of the programmable divider is shown in Fig. 19. The circuit includes a source-coupled logic (SCL) high-frequency prescaler featuring a programmable 7/8/9 modulus, an SCL/CMOS logic level converter, and a CMOS divide-by-16 circuit. B0 and B1 drive a decoder, which provides the proper digital word to set the prescaler modulus. The multimodulus prescaler generates at its output a fixed 499.2-MHz clock signal used for the baseband digital modulator. Low-swing SCL logic is adopted for the multimodulus prescaler to avoid the use of critical high-frequency power-hungry rail-to-rail CMOS converter and VCO buffers. The SCL/CMOS logic level conversion is performed at the output of the prescaler at 500 MHz with a considerable saving of power consumption. The SCL multimodulus prescaler achieves very low power consumption since it makes use of an optimized architecture, which requires only four D-type repflip-flops. As shown in Fig. 20, flip-flops resent an embedded structure, which implements both 3/4 and 4/5 dividers. The proper divider structure is selected by the control modulus signals (C0, C1). A 7(9)-modulus divider is implemented by enabling the 3/4(4/5)-modulus topology and as modulus control signal. The exploiting the output of 8-modulus divider is implemented by disabling both feedback paths. VI. EXPERIMENTAL RESULTS Fig. 21 shows the chip micrograph of the front-end, which occupies a total area of 3.3 mm including bond pads. The front-end was fabricated in a 90-nm CMOS technology by STMicroelectronics. It was packaged in a 40-pin LPCC package with an exposed bottom metal pad and assembled in a FR4 test board with 400- m-thick substrate. The supply voltage was set to 1.2 V.

Fig. 22 shows the measured output signal of the transmitter with a 2-MHz PPM-BPSK baseband data and a 3.993-GHz LO signal. Fig. 22(a) was carried out using an oscilloscope with 20-Gsamples/s sampling rate and 6-GHz bandwidth. It shows a zoom of one transmitted pulse to highlight the extremely accurate Gaussian envelope. As a consequence, the proposed circuit achieves the spectral efficiency of the ideal gaussian shape, which is 38%. Moreover, the pulse spectrum does not show side lobes and hence the circuit provides a side-lobe rejection better than 27 dB, improving the performance of 22 dB reported in [5]. The pulse amplitude is 200 mV on the 50- load with an LO ringing level lower than 3 mV . Thanks to the LO switch and the PEG bias control circuit, the LO leakage improvement is better than 10 dB with respect to the previous works [5], [22]. The simulated LO input signal amplitude is 600 mV . Therefore, the LO feedthrough is around 45 dB. The spectrum of the output signal was measured with the Agilent E4440A spectrum analyzer. It is compliant with FCC mask in the 3–5-GHz band, as shown in Fig. 22(b). The pulse duration and the 3-dB bandwidth are 2.8 ns and 628 MHz, respectively. Fig. 23 reports a 500-Mpulses/s burst. Due to BPSK modulation, the output pulses are 180 phase-shifted one to each other. The overall transmitter draws a bias current of 21 mA. The meaof the down-converter is plotted in Fig. 24. is sured lower than 10 dB over the whole operating frequency range. The measured conversion gain for the three supported channels is shown in Fig. 25. The down-converter achieves a conversion gain of 29.5 dB with a variation over the 3.25–4.75-GHz band lower than 4 dB. In Fig. 26, the double-sideband noise figure (DSB-NF) of the down-converter is reported as a function of the baseband frequency for all the supported channels. By integrating the output power noise, the noise figure is 5.2 dB (worst case CH3). The increase in the noise figure at lower frequencies is due to the small MOS transistors of the mixer, which are used to minimize the LO buffer power consumption.

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A 27-dBm input 1-dB compression point was meaof sured at high-gain setting, while the circuit achieves a 18 dBm by reducing the LNA gain, as reported in Fig. 27. Fig. 28 demonstrates that the pulse envelope is correctly recovered at the down-converter output when a TX pulse is sent to the down-converter input. The down-converter draws only 8 mA. Fig. 29 shows the measured phase noise of the PLL at 4.494 GHz with a 100-kHz loop bandwidth. The phase noise is 122.4 dBc/Hz at a 3-MHz frequency offset. Fig. 30 reports the measured VCO tuning range. The circuit exhibits a wide tuning range of 37% from 3.2 to 4.6 GHz with a tuning voltage ranging from 0 to 1.2 V. The measured spur rejection is 69 dBc as shown in Fig. 31. Thanks to the proposed solution for the prescaler and an accurate design of both programmable divider and LC-VCO, the overall PLL draws a current as low as 5.5 mA. The overall front-end consumes 42 pJ/pulse in RX mode and 56 pJ/pulse in TX, including the PLL power consumption. The front-end performance is summarized and compared with the state-of-the art in Table I. VII. CONCLUSION A 3–5 GHz UWB front-end for LR-WPAN applications has beenpresentedinthispaper.Thecircuithasbeendesignedandimplemented using a 90-nm CMOS technology with a 1.2-V supply voltage. It integrates a Gaussian-envelope carrier-based transmitter, a down-converter, and a low-power LO frequency synthesizer. Thanks to the adopted architecture and circuit solutions, the UWB front-end exhibits excellent values of performance parameters along with high flexibility and low complexity. ACKNOWLEDGMENT The authors would like to thank A. Castorina for the support in the measurements and R. Guerra for the logistic assistance in the chip fabrication. The authors would also like to thank G. Zanti and C. Lombardo at STMicroelectronics for the circuit assembly. REFERENCES [1] Wireless Medium Access Control (MAC) and Physical Layer (PHY) Specifications for Low-Rate Wireless Personal Area Networks (WPANs), Amendment 1: Add Alternate PHYs, IEEE Standard 802.15.4a, Aug. 2007. [2] Wireless Media Access Control (MAC) and Physical Layer (PHY) Specifications for Low-Rate Wireless Personal Area Networks (WPANs), IEEE Standard 802.15.4, 2006. [3] M. Z. Win and R. A. Scholtz, “Impulse radio: How it works,” IEEE Commun. Lett., vol. 2, no. 2, pp. 36–38, Feb. 1998. [4] R. J. Fontana, “Recent system applications of short-pulse ultra-wideband (UWB) technology,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 9, pp. 2087–2104, Sep. 2004. [5] M. Cavallaro, A. Italia, G. Sapone, and G. Palmisano, “A 3–5 GHz low complexity ultra wideband CMOS RF front-end for low data rate WPANs,” in Proc. Eur. Solid State Circuits Conf., Sep. 2008, pp. 438–441. [6] J. Han and C. Nguyen, “Ultra-wideband electronically tunable pulse generators,” IEEE Microw. Wireless Compon. Lett., vol. 14, no. 3, pp. 112–114, Mar. 2004. [7] H. Kim, D. Park, and Y. Joo, “Design of CMOS Scholtz’s monocycle pulse generator,” in Proc. IEEE Ultra Wideband Syst. Technol. Conf., Nov. 2003, pp. 81–85. [8] Y. Zheng, H. Deng, and Y. P. Xu, “A novel CMOS/BiCMOS UWB pulse generator and modulator,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2004, vol. 2, pp. 1269–1272. [9] K. Marsden, H.-J. Lee, D. S. Ha, and H.-S. Lee, “Low power CMOS re-programmable pulse generator for UWB systems,” in Proc. IEEE Ultra Wideband Syst. Technol. Conf., Nov. 2003, pp. 443–447.

[10] H. Kim and Y. Joo, “Fifth-derivative gaussian pulse generator for UWB system,” in IEEE Radio Freq. Integr. Circuits Symp. Dig., Jun. 2005, pp. 671–674. [11] T. Norimatsu, R. Fujiwara, M. Kokubo, M. Miyazaki, A. Maeki, Y. Ogata, S. Kobayashi, N. Koshizuka, and K. Sakamura, “A UWB-IR transmitter with digitally controlled pulse generator,” IEEE J. SolidState Circuits, vol. 42, no. 6, pp. 1300–1309, Jun. 2007. [12] D. D. Wentzloff and A. P. Chandrakasan, “A 47 pJ/pulse 3.1-to-5 GHz all-digital UWB transmitter in 90 nm CMOS,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2007, pp. 118–119. [13] M. Fujishima, W. Badalawa, A. Oncu, and T. Wang, “22–29 GHz CMOS pulse generator for ultra-wideband radar applications,” IEEE J. Solid-State Circuits, vol. 42, no. 7, pp. 1464–1471, Jul. 2007. [14] “Revision of Part 15 of the Commission’s Rules Regarding Ultra Wideband Transmission Systems: First Report and Order,” FCC, Washington, DC, Tech. Rep. 02 48, Apr. 2008. [15] M. Demirkan and R. R. Spencer, “A pulsed-based ultra-wideband transmitter in 90-nm for WPANs,” IEEE J. Solid-State Circuits, vol. 43, no. 12, pp. 2820–2828, Dec. 2009. [16] S. Lida et al., “A 3.1 to 5 GHz CMOS DSSS UWB transceiver for WPANs,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2005, pp. 214–215. [17] I. Gresham and A. Jenkins, “A fast switching, high isolation absorptive SPST SiGe switch for 24 GHz automotive applications,” in Proc. Eur. Microw. Conf., Oct. 2003, pp. 903–906. [18] J. Ryckaert, C. Desset, A. Fort, M. Badaroglu, V. DeHeyn, P. Wambacq, G. VanderPlas, S. Donnay, B. VanPoucke, and B. Gyselinckx, “Ultra-wideband transmitter for low-power wireless body area networks: Design and evaluation,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, no. 12, pp. 2515–2525, Dec. 2005. [19] J. Ryckaert, G. Van der Plans, V. De Heyn, C. Desset, B. Van Poucke, and J. Craninckx, “A 0.65-to-1.4 nJ/burst 3-to-10 GHz UWB all-digital TX in 90 nm CMOS for IEEE 802.15.4a,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2007, pp. 120–121. [20] D. D. Wentzolff and A. P. Chandrakasan, “A 3.1–10.6 GHz ultra wideband pulse-shaping mixer,” in IEEE Radio Freq. Integr. Circuits Symp. Dig., Jun. 2005, pp. 83–86. [21] M. Cavallaro, T. Copani, G. Girlando, and G. Palmisano, “Novel pulse generator for ultra-wide-band modulating systems and modulating systems using it,” U.S. Patent 0171474, Jun. 28, 2007. [22] M. Cavallaro, E. Ragonese, and G. Palmisano, “An ultra-wideband transmitter based on a new pulse generator,” in IEEE Radio Freq. Integr. Circuits Symp. Dig., Jun. 2008, pp. 43–46. [23] Y. Zheng et al., “A 0.18 m CMOS UWB dual-band transceiver,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2007, pp. 114–115. [24] Y. Zheng et al., “A 0.18 m CMOS 802.15.4a UWB transceiver for communication and localization,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2008, pp. 118–119. [25] R. Xu, Y. Jin, and C. Nguyen, “Power-efficient switching-based CMOS UWB transmitter for UWB communications and radar systems,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 8, pp. 3271–3277, Aug. 2004. [26] P. P. Mercier, D. C. Daly, and A. P. Chandrakasan, “An energy-efficient all-digital UWB transmitter employing dual capacitively-coupled pulse-shaping drivers,” IEEE J. Solid-State Circuits, vol. 44, no. 6, pp. 1679–1688, Jun. 2009. [27] R. Hoctor and H. Tomlinson, “Delay-hopped transmitted-reference RF comunications,” in Proc. IEEE Conf. Ultra Wideband Syst. Technol., May 2002, pp. 265–269. [28] F. S. Lee and A. P. Chandrakasan, “A 2.5 nJ/bit 0.65 V pulsed UWB receiver in 90 nm CMOS,” IEEE J. Solid-State Circuits, vol. 42, no. 12, pp. 2851–2859, Dec. 2007. [29] J. Ryckaert, M. Verhelst, M. Badaroglu, S. D’Amico, V. De Heyn, C. Desset, P. Nuzzo, B. Van Poucke, P. Wambacq, A. baschirotto, W. Dehaene, and G. Van der Plas, “A CMOS ultra-wideband receiver for low-data-rate communication,” IEEE J. Solid-State Circuits, vol. 42, no. 11, pp. 2515–2527, Nov. 2007. [30] G. Sapone and G. Palmisano, “A 90-nm CMOS two-stage low-noise amplifier for 3–5-GHz ultra-wideband radio,” in IEEE Radio Freq. Integr. Circuits Symp. Dig., Jun. 2008, pp. 489–492. [31] C. W. Kim, M. S. Kang, P. T. Anh, H. T. Kim, and S. G. Lee, “An ultra-wideband CMOS low noise amplifier for 3–5-GHz UWB system,” IEEE J. Solid State Circuits, vol. 40, no. 2, pp. 544–547, Feb. 2005. [32] C. Stagni, A. Italia, and G. Palmisano, “Wideband CMOS LC VCOs for IEEE 802.15.4a applications,” in Proc. IEEE Eur. Microw. Integr. Circuits Conf., Oct. 2008, pp. 246–249.

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Marco Cavallaro received the Laurea and Ph.D. degrees in electronics engineering from the University of Catania, Catania, Italy, in 2005 and 2009, respectively. From 2005 to 2009, he was with the Radio Frequency Advanced Design Center, a joint research center supported by the University of Catania and STMicroelectronics, Catania, Italy. Since 2009, he has been with STMicroelectronics as a Consultancy Contractor, where he is involved in the design of a low-power subgigahertz transceiver for wireless sensors networks. His research was focused on UWB transceiver architectures and design of related building blocks, especially impulse generation circuits and high-speed digital circuits.

Giuseppina Sapone (S’05–M’09) received the Laurea and Ph.D. degrees in electronics engineering from the University of Catania, Catania, Italy, in 2003 and 2008, respectively. Since 2004, she has been with the Radio Frequency Advanced Design Center, a joint research group supported by the University of Catania and STMicroelectronics, Catania, Italy, where she was involved in the design and development of RF circuits for 3–10-GHz ultra-wideband applications. She is currently a Post-Doctoral Researcher with the University of Catania. Her current research interests include millimeter-wave integrated circuit design for communications, automotive radars, and imaging applications.

Guido Giarrizzo received the Laurea degree in electronic engineering from the University of Catania, Catania, Italy, in 1991. From 1993 to 1997, he was with Corimme, a Research Consortium between STMicroelectronics and the University of Catania, where he was involved on research on fuzzy logic. He joined STMicroelectronics, Catania, Italy, in 1997, where he was involved with the development of microcontrollers. His interests include FPGA programming and digital ASIC design. Currently, he is involved in the design of digital baseband circuits for ultra-low-power transceiver for wireless sensor networks.

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Alessandro Italia received the Laurea degree in electronic engineering and Ph.D. degree in electronics and automation engineering from the University of Catania, Catania, Italy, in 2002 and 2006, respectively. Since 2002, he has been with the Radio Frequency Advanced Design Center, which is a joint research center between the University of Catania and STMicroelectronics, Catania, Italy, where he was involved in the design and development of RF transceivers for cellular and WLAN applications. In 2006, he joined the Faculty of Engineering, University of Catania, as a Researcher Associate He has authored or coauthored more than 20 publications in journals and conferences. His current research interests include the design of low-power wideband RF circuits for WPAN applications and ultralow-power RF circuits for wireless sensor network.

Giuseppe Palmisano (SM’09) received the Laurea degree in electronics engineering from the University of Pavia, Pavia, Italy, in 1982. From 1983 to 1991, he was a Researcher with the Department of Electronics, University of Pavia, where he was involved in CMOS and BiCMOS analog integrated circuit design. In 1992, he was a Visiting Professor with Universidad Autonoma Metropolitana UAM), Mexico City, Mexico, where he taught a course on microelectronics for Ph.D. students. In 1993 and 2000, he joined the Faculty of Engineering, University of Catania, Catania, Italy, as an Associate Professor and a Full Professor, respectively, teaching microelectronics. Since 1999, he has been leading the Radio Frequency Advanced Design Center, a joint research center supported by University of Catania and STMicroelectronics, Catania, Italy. He has designed several innovative analog integrated circuits and systems within the framework of national and European research projects and in collaboration with electronics industries. He is a coauthor of more than 200 papers in international journals and conference proceedings, a book on current operational amplifiers, and several international patents. His current research interest lies in the design of RF and microwave integrated circuits for wireless communications.

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Low-Cost FPGA Implementation of Volterra Series-Based Digital Predistorter for RF Power Amplifiers Lei Guan, Student Member, IEEE, and Anding Zhu, Member, IEEE

Abstract—This paper presents a low-complexity and low-cost hardware implementation of a Volterra series-based digital predistorter (DPD). This is achieved by introducing two novel model complexity reduction techniques into the system, namely, lookup table assisted gain indexing and time-division multiplexing for multiplier sharing. Experimental results show that this novel DPD implementation uses much less hardware resources, but still maintains excellent performance compared to conventional approaches. Index Terms—Linearization, lookup table (LUT), power amplifier (PA), predistorter, Volterra series.

I. INTRODUCTION

W

ITH THE goal of simultaneously achieving high efficiency and high linearity, digital predistortion techniques along with methods for memory effect compensation have been proposed to linearize RF power amplifiers (PAs). Examples include techniques based on memory polynomials [1], [2], Hammerstein and Wiener models [3], augmented Wiener model [4], nonlinear auto-regressive moving average (NARMA) model [5], etc. The principle of the digital predistorter (DPD) is simple: a nonlinear distortion function is built up within the digital domain that is the inverse of the distortion function exhibited by the amplifier. A highly linear and low distortion system can be achieved in principle when these two nonlinear systems, the DPD and PA, are combined in series. An attraction of this approach is that the nonlinear PA can be linearized by a standalone add-on block, freeing vendors from the burden and complexity of manufacturing complex analog/RF circuits [6]. Previously, an efficient DPD for RF PAs was proposed in [7]. This DPD approach is derived from the dynamic deviation reduction-based Volterra series [8], which allows simultaneous compensation for nonlinear distortion and memory effects with

Manuscript received October 26, 2009; revised January 12, 2010. First published March 08, 2010; current version published April 14, 2010. This work was supported by the Science Foundation Ireland under the Principal Investigator Award Scheme. The authors are with the School of Electrical, Electronic and Mechanical Engineering, University College Dublin, Dublin 4, Ireland (e-mail: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2041588

a small number of parameters. Based on the th-order post-inverse theory, the parameters of this DPD can be directly estimated from the measured input and output of the PA with a simple offline characterization process. This eliminates the requirement for real-time closed-loop adaptation, and removes the necessity to implement the parameter estimation algorithms in real digital circuits, which significantly reduces system complexity and implementation cost. Experimental results showed that this truncated Volterra DPD model can achieve superb performance in linearizing various types of RF PAs. However, only the model structure and system characterization methodology were introduced in [7], The DPD algorithm was just implemented in a software environment, e.g., MATLAB, and important issues related to practical hardware implementation were not discussed. Although it may look straightforward, different methodologies or implementation structures will lead to very different results in terms of complexity and cost from the viewpoint of hardware implementation. In this paper, we present a low-complexity and low-cost solution for hardware implementation of this advanced DPD technique using real digital circuits. This is achieved by introducing two novel model complexity reduction techniques in the system, namely, the lookup table (LUT) assisted gain indexing and time-division multiplexing for multiplier sharing. Since the field programmable gate array (FPGA) has many advantages in digital signal processing, including high density integration, parallel operation mechanisms, high-speed processing (DSP), and flexible implementation, the FPGA has become one of main choices for implementing baseband DPDs for RF PAs. In this study, we illustrate how to implement the proposed Volterra DPD model on FPGA chips, but the proposed technique is not solely limited to FPGAs. The same structure can also be readily implemented in other types of digital circuits, e.g., general DSP chips or application-specific integrated circuits (ASICs). This paper is organized as follows. In Section II, we briefly reintroduce the proposed Volterra DPD system. Section III presents details of hardware implementation of the DPD. The experimental results are given in Section IV with a conclusion presented in Section V. II. DPD ALGORITHM With the rapid development in DSP techniques, most predistorters today are implemented in the digital baseband. In these systems, the original baseband signals are first predistorted by

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GUAN AND ZHU: LOW-COST FPGA IMPLEMENTATION OF VOLTERRA SERIES-BASED DPD FOR RF PAs

Fig. 1. Block diagram of digital predistortion.

a digital predistortion unit and then passed through a digital-toanalog converter (DAC), up-converted to RF frequency, and finally passed to the PA. In order to extract and update the coefficients of the DPD, a small fraction of the transmit signal is fed back and transferred to baseband via a down-converter and an analog-to-digital converter (ADC). The model parameter extraction unit compares the input and the output captured data, and extracts the coefficients for the DPD. This model extraction unit is normally only operational during the initial setup of the system or whenever the characteristics of the system are changed. The block diagram of a baseband digital predistortion system is illustrated in Fig. 1. In [7], the dynamic deviation reduction-based Volterra model is used for constructing the DPD function. For instance, the firstorder dynamic truncation of the Volterra model can be written as

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posed DPD structure must be implemented in transmitters with very low cost. However, direct implementation of the DPD function, i.e., (1), requires a large number of multipliers and adders to construct the nonlinear and memory terms. For example, 60 . This number multipliers will be needed when become larger. Since the increases significantly when and multiplier is one of the most complex and expensive components in FPGA hardware,1 the large number of multipliers required dramatically increases system complexity and the final cost of the DPD system. III. NEW DPD IMPLEMENTATION In this paper, we seek an alternative and efficient way to implement this Volterra DPD, as discussed in the following. A. LUT-Assisted Gain Indexing From (1), we can see that the number of multipliers required mainly results from the generation of the power and the memory terms, and their multiplications with the coefficients. However, if we rewrite (1) as

(2) where (3)

(1) and are the input and the output in-phase/ where is the comquadrature (I/Q) envelopes, respectively; represents the complex plex Volterra kernel of the DPD, returns the magnitude. is the conjugate operation, and order of nonlinearity and represents the memory length. Only odd-order nonlinearities are included in this baseband representation in (1), i.e., is an odd number, since the effects from even-order kernels can be omitted in a band-limited modulation system. The implementation of this DPD system mainly includes two parts, which are: 1) the DPD unit, which predistorts the input I/Q signal and 2) the parameter extraction unit, which is used to initialize and update the coefficients. In [7], by employing the th-order post-inverse theory [9], the coefficients of the DPD can be estimated from the measured input and output of the PA with an offline characterization process. The model extraction unit can thus be implemented in a software environment, which can be embedded in general DSP circuits in the system. Although both units, the DPD and parameter extraction, must be implemented efficiently in the system, the most critical part centers on implementing DPD unit itself. Since real-time online signal processing is required, the DPD unit must be implemented in high-speed digital hardware circuit, e.g., FPGAs or ASICs. As price pressures become ever more demanding, in order to make it feasible and competitive in the market, the pro-

(4) we can find that, for a given memory tap and can be considered as a constant complex gain to or , respectively, while or depends only since on polynomial power terms of or is a constant for each power term after model extraction or in time-invariant operations when is fixed. Furthermore, in a real system, even if the individual samples of the and are randomly generated, the range of signal the input signal is normally known in advance. This means that , it is possible to calculate the high-order power terms of and thus, the values of and in advance, and store them in a table and retrieve them later. For example, if the is normalized maximum value of the input magnitude to unity and the LUT size is 1024, the interval value for the and LUT, , will be 1/1024. A set of values of for each interval can be calculated in advance. For example, can be obtained by adding all power terms for and multiplying with the coefficients together for each given interval values, as shown in Fig. 2. In the same way, similar and , tables can be built for different memory taps for . These values can then be retrieved where is directly from the tables when a specific input value of given. Using this approach, only two LUTs are required 1[Online].

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Fig. 2. Example of LUT contents.

for the whole system, and this number no longer increases with the nonlinear order since all higher order terms can be built in one table, no matter how many orders there are. , only the memory terms One may note that from (2), for are separated out and all other terms are built into the LUT; while is also left outside the table along with the for is a conjugated memory terms. This is because the input complex number including I and Q values, but the LUT address is generated from the magnitude only, with the same magnitude can have different values since value, the power term may have different phases for each sample, which leads that one address can correspond to multiple output values. To avoid must be left outside the LUT for , this problem, although this requires two more multipliers to implement the system. This LUT mapping approach is more efficient than a direct polynomial-based implementation of (1) since it no longer requires multiplication between input samples to produce the power terms. This structure also eliminates the requirement for building separate tables for each nonlinear power terms, as is the case in traditional LUTs [10]–[12]. Consequently, the hardware resource requirement for the DPD is significantly reduced. Furthermore, unlike most conventional LUT-based DPDs where the gain values are often obtained directly through curve fitting between input and output data, which often leads to low accuracy, in this approach, an analytical function-based model, i.e., the truncated Volterra series, is employed to represent the characteristics of the DPD and a least squares algorithm is utilized to extract the coefficients. This allows us to accurately control the nonlinear order and the memory length to be compensated for, and guarantees high accuracy in the model and , extraction. Although during the calculation of high precision signal processing is required to produce accurate results, e.g., producing high-order power terms, this does not affect the final LUT structure because the intermediate values are calculated offline in a software environment and they are not and are stored in the LUTs. Only the final results of stored in the LUTs. The precision requirement for these final values are much lower than that required for the intermediate terms, and therefore, they can be easily scaled to suit a small LUT size, significantly saving memory storage in the DPD chip. In summary, this proposed approach takes advantages of the best features of both analytical function- and LUT-based solutions, which are: 1) high accuracy in model extraction is

Fig. 3. DPD implementation example.

maintained by using an analytical function-based DPD model, while 2) complexity and cost in hardware implementation is reduced by the LUT. The next step of the implementation is to include the memory , and the terms left outside the terms, i.e., LUTs, . One solution is to multiply the values retrieved from the LUTs with these terms by using multipliers. For example, an implementation of the first part of the output is shown in Fig. 3. This is similar to the “Basic Predistortion Cell” structure proposed in [13], but only one address index is needed to retrieve the values from LUTs in this case because the power terms in all LUTs are the same, in other words, they all . Multiple coonly depend on the instantaneous samples ordinate rotation digital computers (CORDICs) [14] are, therefore, avoided, which can further save hardware resources. B. Time-Division Multiplexing for Multiplier Sharing Compared to direct analytical function based DPDs or conventional LUT approaches, the complexity and cost of the implementation shown in Fig. 3 have been dramatically reduced. However, this structure is not the simplest one because a large number of multipliers are still involved, and this number will increase with the memory length. To further reduce the complexity, time-division multiplexing can be employed as described below. In Fig. 3, multipliers are operated in parallel and each operation occupies an entire time slot. However, if we convert the parallel operation to a serial operation (for example, by using a multiplexer), all multiplication operations can be conducted in a serial way with one multiplier. The time sequence of these operations is shown in Fig. 4. Transforming from parallel to serial processes, the time duration for each operation becomes shorter, which requires that the original data must be up-sampled and the signal processing needs to be conducted in a higher speed. The block diagram is shown in Fig. 5, where the of this implementation of original data are up-sampled first and a multiplexer is then used

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Fig. 4. Time sequence view of multiplication operations.

Fig. 6. Proposed DPD implementation. Fig. 5. DPD implementation using multiplexing.

to redistribute the data for conducting the multiplication operations serially. At the end of operations, the output data are recombined and down-sampled back to the original sampling rate to produce the final output. The details of each composite block are given as follows. 1) Input Up-sampling: this block increases the operation frequency by a factor of with data repeating units, i.e., the input data are repeated times at a higher sampling rate. 2) Input Magnitude Calculation: The CORDIC algorithm [14] is used to calculate the magnitude of input complex I/Q data, and this is used in conjunction with a chip-selection (CS) signal as the address for the LUTs. 3) LUT Mapping: Separated LUTs are mapped into different parts of a standalone RAM on board so that indexing the contents is easier; the LUTs parts are indexed with the magnitude of respective input signals and the multiplexed CS signal. This saves the hardware cost for implementing addressing buses. Each LUT contains two parts: one for storing the real part of the coefficients and the other for the imaginary part. 4) Data Multiplexing: This part contains a multiplexer with a delay units, and each delay unit selection signal CS and delays time cycles, This structure converts parallel multiplications using multiple multipliers to serial operations sharing only one multiplier. 5) Complex Multiplication (CM): The symbol in Fig. 5 represents the CM, which is used to conduct multiplication between the output of MUX and the value retrieved from LUTs. 6) Output Accumulation (ACC): This block is used to implement the ACC operation, which is used to compensate for the memory effects distortion.

7) Output Down-sampling: Not all the results obtained from the accumulator are useful for producing the final output of the DPD; some values are just the intermediate processing results, which can be discarded. The output is only time cycle in the serial data obtained from every sequences. Thus, a down-sampling block is employed to conduct such “selection.” , can be implemented The second part of the DPD, using a similar structure as in Fig. 5, and with another two comterm. Combining the two plex multipliers to include the parts, and , together with proper delays to compensate processing delays between two branches, we can form the final structure of the DPD, as shown in Fig. 6. In this structure, only four complex multipliers are required in total, and the number of multipliers used does not increase with the memory length or the nonlinearity order . This significantly reduces the cost of the system, especially for the systems with long-term memory effects or high-order nonlinearities. Furthermore, in [7], in order to further reduce the system complexity, under-sampling and interpolation were used. The original input and output signals are sampled with a low sampling rate (lower than the Nyquist rate) at the model extraction stage, while the input signal is then up-sampled and the parameters are interpolated by inserting zeros to avoid aliasing effects at the implementation stage. As such a case, the DPD function (1) becomes

(5)

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where is the over-sampled input and the new output of the DPD. is the ratio of the sampling rate required for DPD output signal reconstruction versus that of the under-sampled model extraction data. Equation (5) can be easily implemented with the same structure as Fig. 6, where only the duration of the time delay in each delay unit of the multiplexers needs to be to . This proposed structure changed from can also be easily adopted to implement the memory polynomial or other truncated Volterra-series-based DPD models, although that is outside the scope of this paper. IV. RESULTS In order to validate the proposed DPD implementation, an experimental test bench was set up in which the RF chain is the same as that presented in [7], where the baseband I/Q signal is first modulated to a digital IF and then converted to the analog domain and up-converted to the RF band, and finally sent to the PA. To capture the output data, the output of the PA was first down-converted to the IF band, and then converted to the digital domain and finally demodulated to the baseband. The core digital predistortion function was implemented on a Xilinx Virtex-4 XC4VSX35 FPGA chip and the model parameter extraction was conducted in MATLAB.

Fig. 7. Sample waveform errors in the time domain.

A. System Performance Evaluation The performance of this truncated Volterra-series-based DPD model has already been tested and presented in [7]. To avoid repetition, in this paper, we only focus on evaluating the accuracy of the hardware-implemented DPD compared to the software-implemented one in [7], i.e., comparing the output predistorted by the hardware DPD with the one produced by the software DPD when given with the same input. To facilitate this comparison, the same PA and signal source were used as in [7], where a high-power gallium–nitride (GaN) amplifier was operated at 1.94 GHz, and excited by a wideband code division multiple access (WCDMA) signal with a chip rate at 3.84 MHz and with 9.57-dB peak-to-average power ratio (PAPR). The WCDMA I/Q samples were recorded with a low sampling rate at 15.36 MHz for parameter extraction, and the input signal was then over-sampled by a factor of four to a sampling rate at 61.44 MHz in the final system to avoid aliasing. Equation (5) with was implemented on the FPGA board. The nonlinearity order was chosen as 7 and memory length . There were 32 parameters in total. It required four complex multipliers [one for and three for ] and nine and four for ) to implement the DPD LUTs (five for function of (5). The size of the LUTs was 1024, and each LUT had 32-bit storage capacity, in which low 16 bit was for the real part values and high 16 bit for the imaginary part. The import and export dual data port RAMs were 32 bit in width and 8640 in size. For system validation, the data processed by the FPGA was captured from the hardware platform and compared with the results produced in the ideal software environment MATLAB. 2000 samples per set and 20 sets of independent data samples were recorded and compared. The normalized mean square errors (NMSEs) are depicted in Fig. 7, where we can see that the average error is around 66 dB. This indicates that the FPGA hardware implementation produced a very high precision for

Fig. 8. Spectra plots of the system with and without DPD.

the signals. We then passed the predistorted signal through the whole RF chain. As expected, with the DPD, the nonlinear distortion was almost completely removed. The adjacent channel power ratios (ACPRs) in both the first and second adjacent channels were reduced to under 60 dBc and the normalized root mean square error (NRMSE) was reduced to 1.8%. The output spectrum of the PA was almost identical with that produced by the software-implemented DPD, as shown in Fig. 8. Tests with other PAs and signals also produced similar results, as presented in [7]. B. Comparison of Different Implementations For comparison, two other DPD structures were also implemented, which were: 1) Scheme 1 (S1) is the direct structure, in which the DPD function is directly implemented by using the multipliers and adders and 2) Scheme 2 (S2) is the structure, as shown in Fig. 3, in which the coefficients and nonlinear power terms are built into LUTs while the memory terms are implemented by using multipliers. The proposed structure in which the coefficients and nonlinear power terms are built into LUTs

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TABLE I HARDWARE UTILIZATION COMPARISON

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compared to conventional approaches. The benefit of the proposed approach will become more evident when the FPGA implementation is transformed to standalone integrated circuits or ASICs for mass production. V. CONCLUSION

TABLE II FPGA RESOURCE UTILIZATION COMPARISON

while the memory terms are implemented by using shared multipliers with time-division multiplexing is referred to as Scheme 3 (S3). The hardware utilization for different nonlinear orders and memory lengths for three schemes above are shown in Table I, and the LUT represents complex multipliers, twowhere input adders, and LUTs, respectively. It can be clearly seen that the cost of Scheme 1 is highest and its complexity significantly increases with the nonlinear order or the memory length. The number of multipliers is reduced in Scheme 2, but it increases with the memory length. Scheme 3 uses much fewer resources and the number of multipliers is the same for all systems with different nonlinear orders and memory lengths, which provides significant benefit when the nonlinear order and the memory length increase. The resource utilization difference between three schemes becomes more evident when implementing this DPD on an FPGA board. Table II shows the Xilinx FPGA resource utilization in implementing the three schemes for the nonlinear order and memory length . It can be seen that the proposed scheme use much fewer resources on the board, especially the DSP48 slices, which are dedicated high-performance signal-processing blocks. By employing multiplexers and conducting serial operations, times the system clock in the proposed scheme must be higher than those in the parallel processing, such as in Scheme 1 and 2. This does not create a problem for digital circuits since the clock rate of digital chips is continuously pushing higher, for example, 600-MHz signal processing capability is currently available in Xilinx Virtex-6. The price of such chips is continuously falling. However, although significant improvements have been made over the last decades, the complex multipliers are still complicated to implement, requiring dedicated DSP slices and occupying a large area of silicon chip. The number of these special designed DSP units, e.g., DSP48, is limited on FPGA boards. Therefore, by employing the LUT and multiplexing combined approach, the implementation structure of the DPD is much simpler and the overall cost will be much lower

A new technique for implementing Volterra series-based DPDs for RF PAs has been proposed in this paper. By combining LUT and multiplication, together with time division multiplexing, the hardware resource required by the implementation is significantly reduced, and therefore, the cost of the system is dramatically lowered. This DPD can be easily implemented on programmable FPGA boards or made as a standalone integrated circuit chip, and used for linearizing various types of RF PAs. Due to the very simple structures involved, this digital IC can be made at very low cost in a single unit; however, by adding such a linearization module, the PA in the transmitter can be driven to saturation to produce much high power, but without introducing severe distortion. Compared to conventional transmitters employing linear amplifiers, this saturated nonlinear PA plus DPD structure can be much more power efficient and a great deal less expensive to implement, which is very attractive for future wireless communications. REFERENCES [1] J. Kim and K. Konstantinou, “Digital predistortion of wideband signals based on power amplifier model with memory,” Electron. Lett., vol. 37, no. 23, pp. 1417–1418, Nov. 2001. [2] L. Ding, G. T. Zhou, D. R. Morgan, Z. Ma, J. S. Kenney, J. Kim, and C. R. Giardina, “A robust digital baseband predistorter constructed using memory polynomials,” IEEE Trans. Commun., vol. 52, no. 1, pp. 159–165, Jan. 2004. [3] V. J. Mathews and G. L. Sicuranza, Polynomial Signal Processing. New York: Wiley, 2000. [4] T. Liu, S. Boumaiza, and F. M. Ghannouchi, “Pre-compensation for the dynamic nonlinearity of wideband wireless transmitters using augmented Wiener predistorters,” in Proc. Asia–Pacific Microw. Conf., Suzhou, China, Dec. 2005, vol. 5, pp. 4–7. [5] G. Montoro, P. L. Gilabert, E. Bertran, A. Cesari, and D. D. Silveira, “A new digital predictive predistorter for behavioral power amplifier linearization,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 6, pp. 448–450, Jun. 2007. [6] P. B. Kennington, High Linearity RF Amplifier Design. Norwood, MA: Artech House, 2000. [7] A. Zhu, P. J. Draxler, J. J. Yan, T. J. Brazil, D. F. Kinball, and P. M. Asbeck, “Open-loop digital predistorter for RF power amplifiers using dynamic deviation reduction-based Volterra series,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 7, pp. 1524–1534, Jul. 2008. [8] A. Zhu, J. C. Pedro, and T. J. Brazil, “Dynamic deviation reductionbased Volterra behavioral modeling of RF power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 12, pp. 4323–4332, Dec. 2006. [9] M. Schetzen, The Volterra and Wiener Theories of Nonlinear Systems, reprint ed. Malabar, FL: Krieger, 2006. [10] P. Jardin and G. Baudoin, “Filter lookup table method for power amplifier linearization,” IEEE Trans. Veh. Technol., vol. 56, no. 3, pp. 1076–1087, May 2007. [11] P. L. Gilabert, A. Cesari, G. Montoro, E. Bertran, and J.-M. Dilhac, “Multi-lookup table FPGA implementation of an adaptive digital predistorter for linearizing RF power amplifiers with memory effects,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 2, pp. 372–384, Feb. 2008. [12] L. Rexberg, “Power amplifier pre-distortion,” U.S. Patent 2006/ 0133536, Jun. 22, 2006. [13] A. Cesari and P. L. Gilabert, “A FPGA based digital predistorter for RF amplifiers with memory effects,” in Proc. 2nd Eur.. Microw. Integrated Circuits Conf., Munich, Germany, Oct. 2007, pp. 135–138. [14] Y. H. Hu, “CORDIC-based VLSI architectures for digital signal processing,” IEEE Signal Process. Mag., vol. 9, no. 3, pp. 17–34, Jul. 1992.

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Lei Guan (S’09) received the B.E. and M.E. degrees in electronic engineering from the Harbin Institute of Technology, Harbin, China, in 2006 and 2008, respectively, and is currently working toward the Ph.D. degree at University College Dublin, Dublin, Ireland. He is currently with the RF and Microwave Research Group, University College Dublin. His research interests include linearization and system-level modeling of RF/microwave PAs with emphasis on digital predistortion and FPGA hardware implementation based on Volterra series. He also has interests in wireless system design and DSP.

Anding Zhu (S’00–M’04) received the B.E. degree in telecommunication engineering from North China Electric Power University, Baoding, China, in 1997, the M.E. degree in computer applications from the Beijing University of Posts and Telecommunications, Beijing, China, in 2000, and the Ph.D. degree in electronic engineering from University College Dublin (UCD), Dublin, Ireland, in 2004. He is currently a Lecturer with the School of Electrical, Electronic and Mechanical Engineering, UCD. His research interests include high-frequency nonlinear system modeling and device characterization techniques with a particular emphasis on Volterra-series-based behavioral modeling for RF PAs. He is also interested in wireless and RF system design, DSP, and nonlinear system identification algorithms.

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Linearization of Efficiency-Optimized Dynamic Load Modulation Transmitter Architectures Haiying Cao, Student Member, IEEE, Hossein Mashad Nemati, Student Member, IEEE, Ali Soltani Tehrani, Student Member, IEEE, Thomas Eriksson, Jan Grahn, Senior Member, IEEE, and Christian Fager, Member, IEEE

Abstract—In this paper, a detailed linearization procedure for dynamic load modulation (DLM) transmitter architectures is proposed for the first time. Compared with the conventional single-input/single-output digital predistortion (DPD) approach used with traditional power amplifiers (PAs), the proposed linearization scheme is based on a regular memory DPD in combination with an efficiency-optimized static one-to-two mapping inverse model, which constructs the predistorted input signals to the DLM transmitter. The time-alignment issue, which is very important to this dual-input architecture, is also considered. The proposed technique is demonstrated by a 1-GHz 10-W LDMOS PA that employs a varactor-based tunable matching network. A normalized mean square error of 35 dB, and adjacent channel leakage ratio of 43 dBc is achieved, with an average power-added efficiency of 53% for a single-carrier WCDMA signal with 7-dB peak-to-average ratio. Finally, it is shown that the time-alignment sensitivity is relaxed when the proposed linearization scheme is used. This means that the overall complexity of the transmitter implementation can be reduced. Index Terms—Digital predistortion, dynamic load modulation (DLM), efficiency, linearization, power amplifier (PA), transmitter.

I. INTRODUCTION IGH-EFFICIENCY and highly linear RF power amplifiers (PAs) are critical in modern wireless communication systems, for which reduced power consumption and less distortion are essential requirements. In order to have high efficiency, the PAs need to work in the compression region, where they show strongly nonlinear behavior. Further, spectral efficiency and higher data rate are important concerns in wireless applications that imply the use of advanced modulation schemes, such as orthogonal frequency-division multiplexing (OFDM). Usually, when employing such modulation schemes, the modulated

H

Manuscript received October 30, 2009; revised January 24, 2010. First published March 25, 2010; current version published April 14, 2010. This work was carried out at the GigaHertz Centre under a joint project supported in part by the Swedish Governmental Agency for Innovation Systems (VINNOVA), Chalmers University of Technology, Ericsson AB, Infineon Technologies Austria AG, and NXP Semiconductors BV. H. Cao, H. Meshad Nemati, J. Grahn and C. Fager are with the Department of Microtechnology and Nanoscience, Chalmers University of Technology, Göteborg SE 412 96, Sweden (e-mail: [email protected]; [email protected]; [email protected]; christian.fager@chalmers. se). A. Soltani Tehrani and T. Eriksson are with the Department of Signals and Systems, Chalmers University of Technology, Göteborg SE 412 96, Sweden (e-mail: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042654

signals have high peak-to-average ratio (PAR). In this case, traditional PAs have to work in back-off most of the time, which results in very low average efficiency. Thus, there is a strong need to investigate alternative transmitter architectures where high average efficiency can be achieved while still maintaining good linearity by employing advanced linearization techniques. Several linearization techniques and transmitter architectures have been proposed in recent years. Digital predistortion (DPD) [1], feedback, and feed-forward [2] are examples of linearization techniques. Envelope elimination and restoration (EER) [3], envelope tracking (ET) [4], Doherty amplifiers [5], and varactor-based dynamic load modulation (DLM) [6] are examples of transmitter architectures. Among these techniques, Doherty amplifiers and dynamic supply modulation architectures such as EER and ET have attracted the most attention, and promising results have been published [7]–[10]. A Doherty amplifier with 53% power-added efficiency (PAE) for a single-carrier WCDMA signal having 11.5-dB PAR is reported in [7]. An ET transmitter with 58% PAE for a 6.6-dB PAR WCDMA signal is reported in [10]. They are the best corresponding results for Doherty amplifiers and ET transmitter architectures to date. On the other hand, few results regarding a linearized high-power, high-frequency operation of varactor-based DLM transmitter appear in the literature despite its high potential for wideband applications [6]. Recently, we have proved the feasibility of high-efficiency, high-power DLM transmitter architecture at 1 GHz [11], [12]. In [11], a circuit design procedure is presented where a modular design approach is proposed. The efficiency improvements in back-off are investigated only by static measurements. The dynamic tunability of the architecture is then shown in [12], where an efficiency-optimized quasi-static inverse model is used based on [13]. High average efficiency is demonstrated for a reduced bandwidth single-carrier WCDMA signal in [12]. However, since only a quasi-static model was considered, the linearity performance is not good enough for most wireless applications. Further, the question whether it is possible to remove any residual distortions caused by the varactors still remains unanswered. The time alignment between the baseband control signal and the RF input signal is also important for the linearization work of the DLM transmitter architectures as presented in [14]. In this paper, we investigate the linearity of DLM transmitters in detail and propose a dedicated DPD-based linearization scheme which allows simultaneously high efficiency and low distortion to be achieved. In particular, the issue of time alignment between the RF input and baseband control signals of the

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Fig. 2. Dual-input quasi-static model for the DLM architecture.

Fig. 1. General transmitter architecture for DLM.

DLM network is carefully studied and compensated for. Experiments are performed on a DLM transmitter demonstrator consisting of a 1-GHz high-power LDMOS PA [15] and a tunable varactor-based matching network (VMN) [11]. Single-carrier WCDMA signals with different PARs are used in the experiments. Experimental results show that the proposed linearization scheme can effectively suppress the distortion, without degrading the PAE. Moreover, the time alignment is less sensitive when employing the proposed linearization scheme. To the authors’ best knowledge, the results achieved in this paper represent the state of the art for DLM transmitter architectures reported so far. From a linearization perspective, DLM and ET/EER transmitters have similar block diagrams with both RF and baseband control inputs. The time-alignment and linearization problems are therefore very similar in nature. Although focusing on DLM transmitters, the linearization scheme proposed in this paper will therefore be applicable for all of these transmitter architectures. This paper is organized as follows. First, in Section II, the background of the DLM transmitter architecture is presented. The combined time-alignment and linearization scheme is proposed in Section III. The experimental results are given in Section IV, and, finally, conclusions are drawn in Section V. II. BACKGROUND A general block diagram for a DLM transmitter is shown in Fig. 1. The baseband control signal is applied to a tunable matching network in order to control the load impedance of the PA output. The load impedance locus is selected to provide good dynamic range and high efficiency [11]. The phase information is passed with the RF input signal. Note that the baseband control signal should be carefully controlled together with the RF input signal to assure the highest efficiency. Finding the optimum input signals of the two branches is therefore an essential step. In [12], a quasi-static inverse model, as shown in Fig. 2, is used to construct the RF input and baseband control signals. By performing static measurements with the high-power amplifier in [15] and the VMN in [11], all combinations of the input signal and the baseband control signal are found. Fig. 3 shows the gain and the PAE versus the output power for three different baseband control voltages of the DLM architecture. As a reference, Fig. 3 also includes the measurements of the PA only, i.e., without the VMN connected. From Fig. 3, it is noticed that the VMN has little influence on the peak output power and the peak PAE. The PAE can, however, be improved in back-off if appropriate baseband control voltage is selected. With the goal of achieving the highest efficiency, optimum combinations of the input signal and the baseband control

Fig. 3. Gain (dashed lines) and PAE (solid lines) versus output power. Thin lines show results for DLM architecture with different control voltages v . The results for PA only are included as a reference and are shown with thick lines.

Fig. 4. Efficiency-optimized control functions constructed from static measurements.

signal given a desired output signal can be obtained. The resulting efficiency-optimized relationships between the desired output signal , RF input , and the baseband control signal may be expressed by (1) (2) (3) , , and are the optimum control funcwhere tions. Note that can be seen as a static AM/AM correction. Following the procedures described in [13], the RF input and baseband control signals for the DLM architectures can be constructed. The control functions obtained for the DLM transmitter used in this work is shown in Fig. 4. It should be noted that the minimum baseband control voltage is set to be 8 V due to hardware limitations. Below this limit, only the RF input voltage is controlled. From the experimental results in [12], it was demonstrated that significantly improved PAE could be obtained with the quasi-static inverse model approach. However, the time misalignment of the baseband control signal and the RF input

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Fig. 5. Time-alignment algorithm for DLM transmitter architectures. d

and d

signal was not carefully estimated, which is one dominant source of unwanted distortion of the output signal. Also, the linearity of the transmitter architecture in [12] still does not satisfy wireless communication standards requirements. Thus, finding solutions for these problems is the main topic of this paper and will be presented in the following sections.

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denote the physical delays in the architecture.

order to further minimize the distortion resulting from the time misalignment, sinc interpolation is applied to find the fractional delay. This algorithm was proposed for DLM architectures in [14], and the block diagram for the algorithm is shown in Fig. 5. It can be summarized in the following steps. by cross correlation Step 1) Estimate the integer delay (4)

III. TIME ALIGNMENT AND DIGITAL PREDISTORTION As shown in Fig. 1, the DLM transmitter architecture requires two synchronized signals for its operation: an RF input signal and a baseband VMN control signal . Clearly, any time mismatch between these two signals will create distortion of the output signal . The time-alignment issue in DLM transmitter architectures is analogous to the case in EER and ET, which has been studied in [8] and [16]. It was shown that, even for a delay of less than one integer sample between the two signal branches, the in-band and out-of-band distortion can be very severe. In [9], a thorough analysis was performed for ET, and an adaptive time-alignment algorithm was proposed, assuming that perfect DPD was performed. With the algorithm, the delay is estimated by correlating the amplitude of the input and the output signals of the ET transmitter. Their experimental results show that the time alignment is very important to the system performance, and it is an essential step before applying DPD. Therefore, in order to avoid any distortion resulting from time misalignment and study the feasibility of the proposed linearization scheme for the DLM transmitters, accurate time alignment for the RF and baseband input signals is necessary.

where (5) Step 2) Use sinc interpolation to reconstruct the continuoustime signal from the discrete-time signal, with the integer delay removed as follows:

(6) where denotes the RF signal with the integer delay shifted and is the sampling period. Step 3) Resample the continuous-time signal and calculate the discrete-time cross-correlation function as follows:

A. Time-Alignment Algorithm The time-alignment problem is very similar in ET and DLM architectures, the main difference being that the baseband control signal is now connected to an electronically tunable matching network at the output of the PA instead of the dynamic drain voltage in ET architectures. In this paper, we will intentionally delay one of the signals to compensate for the different delays of the RF and baseband control signals that occur in the practical implementation of the DLM architecture. Actually, many methods exist for time-delay estimation [17], [18]. In this study, we have used a method where the integer relative time delay between the RF and baseband control signals is first estimated by cross correlation. In

(7) Step 4) The fractional delay is then estimated by interpolating the cross-correlation function

(8)

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Using the aforementioned time-alignment method, the compensated delay is estimated to be 5.891 baseband samples, corresponding to 19.17 s. In this case, the NMSE is 27.6 dB and the PAE is around 39.8%. Clearly, proper time alignment is needed to achieve high linearity and efficiency. However, the linearity achieved is normally still not satisfactory for the requirements of most applications. Therefore, the time-alignment algorithm can be seen as an essential step before applying more advanced linearization and DPD techniques. However, the effect of time misalignment is affected by the specific DPD method used and will therefore be further investigated in Section IV. Fig. 6. NMSE and PAE for different relative delays between the RF and base30.72 MHz. band control signals. Sampling frequency

=

B. DPD Scheme

Fig. 7. Output signal power spectrum for different relative delays (samples).

where denotes the Hanning window function with length . Step 5) The compensated delay is finally expressed by (9) The measurement setup presented in the next section is used to evaluate the effect of different relative time delays on the DLM transmitter performance. The RF and baseband control input signals are constructed by the quasi-static inverse model in [12] with a sampling rate at 30.72 MHz. In Fig. 6, the PAE and the normalized mean square error (NMSE) versus the relative time delay is shown. It is noticed that the NMSE is greatly affected by the time alignment. The results also show that the PAE is improved if accurate time alignment is performed. Fig. 7 shows spectrum of the output signal and can be used to evaluate the out-of-band distortion when different relative time delays are used. Compared with no time alignment, the largest improvement is more than 20 dB. Even with a small time-delay difference—less than one integer sample delay—the out-of-band distortion can be degraded more than 5 dB.

A dedicated DPD method for ET transmitters was recently presented in [19]. The method uses decomposed piecewise Volterra series and allows distinct characteristics at different input signal amplitudes to be modeled accurately. For the DLM transmitter architectures, however, linearization may become more complicated, since both the PA and the tunable matching network contribute with nonlinear effects. As a basis for the DPD linearization, both dynamic supply modulation and DLM transmitter architectures use optimized control of the RF input and baseband control signals. The reason for this is that both architectures depend on the interaction between these two signals. Therefore, as discussed in Section II, by only changing the RF input and disregarding the baseband control input, high efficiency cannot be obtained. The quasi-static inverse model presented in [12] represents such a “matched” combination of the RF and baseband control signals for DLM transmitters. As previous results shown in [12], with the quasi-static inverse model, the output of the DLM transmitter still exhibits a significant amount of distortion. A more advanced linearization scheme including memory is therefore needed, since memory effects generated in the PAs, the VMN, and their interaction can not be compensated for by a simplified quasi-static inverse model. Also, memory effects are more pronounced when more wideband signals are used. In order to achieve both good linearity and high efficiency at the same time, we propose a linearization scheme combining a regular single-input/single-output memory DPD with an efficiency-optimized static inverse model in this paper, as shown in Fig. 8. Thus, the principle is that the static inverse model ensures the transmitter is operated at high efficiency while the memory DPD eliminates the residual nonlinear memory effects. The single-input/single-output memory DPD used in this work is the dynamic deviation reduction (DDR)-based Volterra series [20], since it has previously been proven capable to model higher nonlinear order and longer memory depth with reasonable complexity. The efficiency-optimized static inverse model is derived from a simple polynomial model based on off-line static measurements and has very low complexity. Based on the th-order inverse theory [21], the regular memory DPD is constructed by the DDR-based Volterra series [20]. The first-order dynamic low-pass equivalent format of the DDR-based Volterra series is first given in [22]. Based on this,

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Fig. 8. Linearization scheme proposed for DLM transmitter architectures.

the second-dynamic-order DDR-based Volterra model can be written as

with (13) where represents the th iteration, is the step size, and denotes the error between the postdistorted and the predistorted signal . In order to find the final predistorted RF input signal and its corresponding baseband control signal, the input signal, which is also the desired output signal, is first fed into the DPD. The predistorted output signal can then be written as (14)

(10) and denote the where denotes the conjugate operation, input signal sample with delay , and the output signal sample, respectively, is the nonlinear order, and is the memory depth. To estimate the model coefficients , the least squares error (LSE) method [23] can be applied here, since the model is linear in terms of coefficients. The estimated is finally written as (11) In practice, measurement noise and nonstable nonlinear behavior due to temperature drift, for example, can bias the solution slightly. Also, in the DLM transmitter architectures, the internal delay difference in the device-under-test (DUT) needs to be compensated for, as mentioned earlier in this section. Therefore, in general, iteration is needed to find the optimal model coefficients for the memory DPD. In this work, a Gauss–Newton algorithm is used for the iteration [24], as shown in Fig. 8. Finally, the model coefficients can be written as (12)

Next, the predistorted output signal is used with the efficiency-optimized static inverse model in (1) and (2) to finally generate the RF input signal and the baseband control signal as (15) (16) (17) and the baseband control signal However, the RF signal cannot be directly uploaded to the measurement setup, since they are still not time synchronized. The time-alignment algorithm presented in the previous section is therefore finally used to estimate the relative time-delay difference between the signals. The resulting delay is added to the path with smaller time delay before uploading the signals and then fixed for all subsequent measurements. IV. EXPERIMENTAL RESULTS In order to evaluate the linearization scheme described in Section III, single-carrier WCDMA signals with 7- and 11-dB PARs are used. The experimental setup used for the measurements is shown in Fig. 9. The DLM transmitter DUT consists of a high-power, 1-GHz, class-J PA [15] and a VMN [11]. The time-aligned complex baseband input signal is uploaded to an Agilent E4438C vector signal generator which is used as an RF modulator, and

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Fig. 9. Measurement setup for the DLM transmitter architecture.

the time-aligned baseband control signal is uploaded to a Tabor Electronics WW2572A arbitrary waveform generator. An Agilent 54845A digital storage oscilloscope is used as the measurement receiver, and it captures the RF output signal and sends it back to the computer, where it is numerically down-converted to baseband I/Q data. All devices are connected by general-purpose interface bus and triggered in synchronization. In order to decrease the noise variance and enhance the dynamic range of the signal, a statistical averaging technique is used [25]. A high-speed operational amplifier is also used with the arbitrary waveform generator in the measurement setup to produce the needed voltage swing of 8–23 V to the VMN (see Fig. 4).

Fig. 10. Normalized gain performance of DLM transmitter architecture with quasi-static inverse model and the proposed scheme with a WCDMA input signal having 11-dB PAR.

A. Linearization Results In the experiments, we compare the linearization performance of the proposed linearization scheme with the static inverse model and the quasi-static inverse model for DLM transmitters. The static inverse model is derived from the static measurements (see Fig. 4). The quasi-static inverse model is basically the static inverse model but also includes the phase information of the RF input signal. The proposed linearization scheme combines a memory DPD with the static inverse model, as described in Section III and Fig. 8. First, an 11-dB PAR single-carrier WCDMA signal is tested. The behavioral model selected for the DPD is the DDR-based Volterra series [20] with nonlinear order 7, memory depth 4, and dynamic order 2, which yields 130 complex coefficients. In the experiment, as we notice, the DPD converges very quickly, and the results with two or more iterations are almost the same as those with one iteration. The following experimental results are therefore shown after one iteration for the DPD. Fig. 10 shows the AM/AM distortion for the 11-dB PAR single-carrier WCDMA signal. With the quasi-static inverse model, which has the AM/AM and AM/PM correction, nonlinear distortion can only be compensated for to a certain limit. This is apparent from the residual distortion seen at both low and high amplitudes in the figure. Applying the proposed linearization scheme, which includes a memory DPD, we observe very good performance at the measured output signal, having a residual gain variation within 0.1 dB. From Fig. 11, the phase distortion is shown to be very strong in the measured output signal, and it goes up to almost 25 without AM/PM correction applied for the RF input signal. With the AM/AM and AM/PM correction, the phase distortion

Fig. 11. AM/PM performance of DLM transmitter architecture with static inverse model, quasi-static inverse model, and the proposed scheme with a WCDMA input signal having 11-dB PAR.

is reduced to approximately 8 . For the proposed scheme, the residual phase distortion can be limited to approximately 2 , which is a large improvement compared with the quasi-static inverse model. Fig. 12 shows the output signal power spectra for different distortion compensation methods, including the linearization result with PA only as a reference. Note that, in order to make a fair comparison between the PA only and DLM architectures cases, the average output power is selected to be the same for both architectures. The DPD used for PA only is the DDR-based Volterra inverse model with the same orders as in the proposed linearization scheme. It is important to notice that the linearization performance of the DLM is similar to that of PA only. In other words, the VMN in the DLM architecture does not add any severe nonlinear effects, which cannot be compensated for with the proposed method. Compared with the quasi-static inverse model, the out-of-band distortion of the measured output signal for the proposed scheme has been improved by more than

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Fig. 12. Output signal spectra of DLM transmitter architecture having a WCDMA input signal having 11-dB PAR.

Fig. 13. Normalized gain performance of DLM transmitter architecture with quasi-static inverse model and the proposed scheme with a WCDMA input signal having 7-dB PAR.

10 dB. It should be mentioned that these linearization results are close to the noise floor of the measurement setup used. When a signal has a high PAR, as in the above case, the PA has to be operated most of the time in a large back-off, which results in relatively low PAE. In the next case, a lower PAR (7 dB) single-carrier WCDMA signal is tested with the proposed linearization scheme using the same order of the DPD as in the 11-dB PAR case. From this experiment, we can evaluate the amount of efficiency improvement that can be achieved with the linearized DLM architecture and compare it with the case of PA only. Figs. 13–15 show the performance of the quasi-static inverse model and the proposed linearization scheme for a 7-dB PAR WCDMA signal. Compared with the 11-dB PAR case, stronger memory effects occur at the high output power levels. From Fig. 13, it can be also noticed that the quasi-static inverse model cannot effectively compensate for the distortion since power expansion is observed at low power levels while compression occurs at high power levels. Fig. 14 shows that the phase distortion with the static inverse model is very strong and almost 30 . With AM/PM correction, it is still more than 10 . However, the proposed scheme can suppress the phase distortion to almost 4 . From Fig. 15, it is shown

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Fig. 14. AM/PM performance of DLM transmitter architecture with static inverse model, quasi-static inverse model, and the proposed scheme with a WCDMA input signal having 7-dB PAR.

Fig. 15. Output signal spectra of DLM transmitter architecture with a WCDMA input signal having 7-dB PAR.

that the out-of-band distortion for the linearization scheme is also very similar to the PA only case, and it has improved almost 15 dB compared with the quasi-static inverse model. Table I summarizes the performance for both 11- and 7-dB PAR WCDMA signal cases with different DPD methods. The NMSE improvement is more than 10 dB for the comparison between the proposed linearization scheme and the quasi-static inverse model. For the PAE comparison between the DLM transmitter architectures and PA only, the DLM architecture with the proposed linearization scheme shows 11% and 15% improvement for the 11- and 7-dB PAR WCDMA signals, respectively. The linearization performance of the DLM architecture is comparable to that of the PA only, with almost the same output power. B. Sensitivity of Time Delay to the Proposed Linearization Scheme In [9], it shows that the linearity is very sensitive to the time misalignment for ET architectures. The results presented with the quasi-static inverse model in Section III came to the same conclusion, and fractional delay estimation was needed in that case.

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TABLE I SUMMARIZED PERFORMANCE FOR DLM TRANSMITTER WITH DIFFERENT PREDISTORTION METHODS

Fig. 16. Time-delay sensitivity of the DLM architecture with and without the proposed linearization scheme.

Here, we investigate if the proposed linearization scheme, which includes a nonlinear memory DPD, is capable of partially compensating for the effects of time misalignment, thus allowing for a more rough integer-sample time-delay synchronization. Fig. 16 shows the measured adjacent channel leakage ratio (ACLR1) with and without the proposed linearization scheme for different relative time delays between the RF and baseband control signals. Without the proposed linearization scheme means, in this case, only the quasi-static inverse model is used. It can be seen that, when the time delay is between five to eight samples, the proposed linearization scheme can indeed compensate for some of the distortion resulting from the time misalignment. This means that the time alignment sensitivity can be significantly reduced when the proposed linearization scheme is used. Although the estimated fractional time delay still yields the best linearization result, with the proposed linearization scheme, acceptable results can be obtained even with a simplified integer-sample time-delay alignment. This allows for significant reduction of the transmitter implementation complexity. V. CONCLUSION This paper presented, for the first time, a method for simultaneous efficiency optimization and linearization of DLM transmitters. The method was based on a combination of a dual-input static inverse model, which ensures high-efficiency operation, with a memory DPD for compensation of residual nonlinear memory effects. The resulting predistorted RF and baseband control input signals are used with a dedicated time-alignment algorithm to mitigate the different delays in the measurement system. The experimental results showed very promising performance for the DLM transmitter architecture. Compared with

the PA only, the DLM transmitter architecture improves the PAE by 11% and 15% for 11- and 7-dB PAR WCDMA signals, respectively. With the proposed linearization scheme, the ACLR for the DLM architectures is similar to the PA only, which implies that the distortion arising from the interaction of the PA and VMN in the DLM architecture can be compensated for. Further on, the proposed linearization scheme can also compensate for some of the distortion arising from time misalignment, thus reducing the overall complexity of the transmitter implementation. The proposed linearization scheme is suitable for all dualinput transmitter architectures, in particular ET/EER. It is easy to implement and can be further investigated for different PAs and more wideband signals.

REFERENCES [1] S. C. Cripps, RF Power Amplifiers for Wireless Communications, 2nd ed. Norwood, MA: Artech House, 2006. [2] P. B. Kenington, High Linearity RF Power Amplifier Design. Norwood, MA: Artech House, 2000. [3] F. H. Raab, B. E. Sigmon, R. G. Myers, and R. M. Jackson, “L-band transmitter using Kahn EER technique,” IEEE Trans. Microw. Theory Tech., vol. 46, no. 12, pp. 2220–2225, Dec. 1998. [4] F. H. Raab, P. Asbeck, S. Cripps, P. B. Kenington, Z. B. Popovic, N. Pothecary, J. F. Sevic, and N. O. Sokal, “Power amplifiers and transmitters for RF and microwave,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 3, pp. 814–826, Mar. 2002. [5] M. Iwamoto, A. Williams, P. Chen, A. G. Metzger, L. E. Larson, and P. M. Asbeck, “An extended Doherty amplifier with high efficiency over a wide power range,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 12, pp. 2472–2479, Dec. 2001. [6] F. H. Raab, “High-efficiency linear amplification by dynamic load modulation,” in IEEE MTT-S Int. Microw. Symp. Dig., Jan. 2003, pp. 1717–1720. [7] M. J. Pelk, W. C. E. Neo, J. R. Gajadharsing, R. S. Pengelly, and L. C. N. de Vreede, “A high-efficiency 100-W GaN three-way Doherty amplifier for base-station applications,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 7, pp. 1582–1591, Jul. 2008. [8] D. Rudolph, “Kahn EER technique with single-carrier digital modulations,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 2, pp. 548–552, Feb. 2003. [9] F. Wang, A. H. Yang, D. F. Kimball, L. E. Larson, and P. M. Asbeck, “Design of wide-bandwidth envelope-tracking power amplifiers for OFDM applications,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 4, pp. 1244–1255, Apr. 2005. [10] D. Kimball, M. Kwak, P. Draxler, J. Jeong, C. Hsia, C. Steinbeiser, T. Landon, O. Krutko, L. Larson, and P. Asbeck, “High-efficiency linear amplification by dynamic load modulation,” in Proc. Compound Semicond. Integr. Circuit Symp., Oct. 2008, pp. 1–4. [11] H. M. Nemati, C. Fager, U. Gustavsson, R. Jos, and H. Zirath, “Design of varactor-based tunable matching networks for dynamic load modulation of high power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 5, pp. 1110–1118, May 2009. [12] A. Soltani, H. M. Nemati, H. Cao, T. Eriksson, and C. Fager, “Dynamic load modulation of high power amplifiers with varactor-based matching networks,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2009, pp. 1537–1540.

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[13] H. M. Nemati, C. Fager, U. Gustavsson, and H. Zirath, “An efficiency optimized controlling scheme for dynamic looad modulation of power amplifiers,” in Proc. 38th Eur. Microw. Conf., Oct. 2008, pp. 583–586. [14] H. Cao, A. Soltani, H. M. Nemati, C. Fager, T. Eriksson, and H. Zirath, “Time alignment in a dynamic load modulation transmitter architecture,” in Proc. 39th Eur. Microw. Conf., Oct. 2009, pp. 1211–1214. [15] H. M. Nemati, C. Fager, M. Thorsell, and H. Zirath, “High-efficiency LDMOS power-amplifier design at 1 GHz using an optimized transistor model,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 7, pp. 1647–1654, Jul. 2009. [16] F. H. Raab, “Intermodulation distortion in Kahn-technique transmitters,” IEEE Trans. Microw. Theory Tech., vol. 44, no. 12, pp. 2273–2278, Dec. 1996. [17] A. S. Wright and W. G. Durtler, “Experimental performance of an adaptive digital linearized power amplifier,” IEEE Trans. Veh. Technol., vol. 41, no. 4, pp. 395–400, Nov. 1992. [18] J. Sala and H. Durney, “Coarse time delay estimation for pre-correction of high power amplifiers in OFDM communications,” in Proc. Veh. Technol. Conf., Sep. 2002, pp. 2313–2317. [19] A. Zhu, P. J. Draxler, C. Hsia, T. Brazil, D. F. Kimball, and P. M. Asbeck, “Digital predistortion for envelope-tracking power amplifiers using decomposed piecewise Volterra series,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 10, pp. 2237–2247, Oct. 2008. [20] A. Zhu, J. C. Pedro, and T. J. Brazil, “Dynamic deviation reductionbased Volterra behavioral modeling of RF power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 12, pp. 4323–4332, Dec. 2006. [21] M. Schetzen, The Volterra and Wiener Theories of Nonlinear Systems. Malabar, FL: Krieger, 2006. [22] A. Zhu, P. J. Draxler, J. J. Yan, T. J. Brazil, D. F. Kimball, and P. M. Asbeck, “Open-loop digital predistorter for RF power amplifier using dynamic deviation reduction-based Volterra series,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 7, pp. 1524–1534, Jul. 2008. [23] E. Aschbacher and M. Rupp, “Modelling and identification of a nonlinear power-amplifier with memory for nonlinear digital adaptive pre-distortion,” in Proc. 4th IEEE Signal Process. Workshop Signal Process. Adv. Wireless Commun., Jun. 2003, pp. 555–559. [24] L. Allower and K. Georg, Computational Solution of Nonlinear Systems of Equations. Providence, RI: Amer. Math. Soc, 1990. [25] C. Fager and K. Andersson, “Improvement of oscilloscope based RF measurements by statistical averaging techniques,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2006, pp. 1460–1463. Haiying Cao (S’10) received the B.E. degree in communication engineering from Beijing University of Posts and Telecommunications, Beijing, China, in 2005, the M.Sc. degree in communication engineering from Chalmers University of Technology, Göteborg, Sweden, in 2007, and is currently working toward the Ph.D. degree at Chalmers University of Technology. His research interests include advanced digital signal processing in wireless communication systems, behavioral modeling for RF PAs, and nonlinear system identification algorithms.

Hossein Mashad Nemati (S’07) was born in Tehran, Iran, in 1980. He received the B.Sc. degree in telecommunication engineering from the Amirkabir University of Technology, Tehran, Iran, in 2004, the M.Sc. degree in microwave electronics from the Chalmers University of Technology, Göteborg, Sweden, in 2006, and is currently working toward the Ph.D. degree at the Microwave Electronics Laboratory, Chalmers University of Technology. His research interests are high-efficiency PAs and transmitter architectures.

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Mr. Mashad Nemati was the recipient of the 2008 Outstanding Achievement Award of the Student High Efficiency Power Amplifier Design Competition of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS).

Ali Soltani Tehrani (S’09) received the B.Sc degree in communication engineering from K.N. Toosi University of Technology, Tehran, Iran, in 2005,and the M.Sc degree in communication engineering from Chalmers University of Technology, Göteborg, Sweden, in 2007, and is currently working toward the Ph.D. degree at Chalmers University of Technology. His research interests currently include utilizing signal processing techniques for hardware impairments, PA behavioral modeling and linearization, and high-efficiency transmitter architectures.

Thomas Eriksson was born in Skövde, Sweden, on April 7, 1964. He received the M.Sc. degree in electrical engineering and Ph.D. degree in information theory from Chalmers University of Technology, Göteborg, Sweden, in 1990 and 1996, respectively. He was with AT&T Laboratories–Research from 1997 to 1998, and in 1998 and 1999 he was working on a joint research project with the Royal Institute of Technology and Ericsson Radio Systems AB. Since 1999, he has been an Associate Professor with Chalmers University of Technology, and his research interests include communication, vector quantization, speaker recognition, and system modeling of nonideal hardware components.

Jan Grahn (S’84–M’96–SM’05) received the Ph.D. degree in solid-state electronics from the Royal Institute of Technology (KTH), Stockholm, Sweden, in 1993. After completing his doctoral work, his research at KTH was focused on SiGe HBT technology, where he was responsible for the development of a 60-GHz process. In 2001, he joined Chalmers University of Technology, Göteborg, Sweden, where his main interest is focused on narrow-bandgap HEMT technology for low-noise/low-power applications. He is also heading the GigaHertz Centre, a joint research and innovation center between Chalmers University of Technology and industrial partners in microwave technology. he has authored or coauthored around 100 refereed papers in international scientific journals and at international conferences.

Christian Fager (S’98–M’03) received the M.Sc. and Ph.D. degrees in electrical engineering and microwave electronics from Chalmers University of Technology, Göteborg, Sweden, in 1998 and 2003, respectively. Currently, he is a Project Leader with the GigaHertz Centre, Microwave Electronics Laboratory, Chalmers University of Technology. His research interests are in the areas of large signal transistor modeling and high-efficiency PA architectures. Dr. Fager was the recipient of the Best Student Paper Award at the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS) in 2002.

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IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 58, NO. 4, APRIL 2010

A New Type of Periodically Loaded Half-Mode Substrate Integrated Waveguide and Its Applications Lin-Sheng Wu, Student Member, IEEE, Xi-Lang Zhou, Wen-Yan Yin, Senior Member, IEEE, Chun-Tian Liu, Liang Zhou, Member, IEEE, Jun-Fa Mao, Senior Member, IEEE, and Hong-Li Peng

Abstract—A new type of half-mode substrate integrated waveguide (SIW) periodically loaded with different lumped elements and structures is proposed in this paper. The propagation constants, Bloch impedances, and voltage distributions of the Floquet TE-modes are all characterized by solving the eigenvalues of the generalized transmission matrix of a single period. Several typical capacitor-loaded, inductor-loaded, corrugated, and electromagnetic-bandgap (EBG)-loaded half-mode SIWs were fabricated to demonstrate their modal dispersion behavior. The measured and simulated -parameters, group delays, and simulated electric field distributions in these novel structures are presented, with good agreements obtained for all samples. In particular, their unique controllable cutoff frequencies, multiple bandgaps, and separated monomode regions are also illuminated numerically and experimentally. To further show their applications, a tunable phase shifter is developed using a varactor-loaded structure, with its 3-dB bandwidth of 50% and a maximal tunable range of 88 . In addition, a bandpass filter based on EBG-loaded half-mode SIW is also realized and presented with its special characteristics. It demonstrates that the filter has a sharp upper slope side and a good performance of spurious suppression. Index Terms—Bandpass filter, electromagnetic bandgap (EBG), half-mode substrate integrated waveguide (SIW), periodically loaded structure, tunable phase shifter.

I. INTRODUCTION UBSTRATE integrated waveguides (SIWs) [1]–[3] have drawn much attention in the design of microwave and millimeter-wave components in the past decade, due to their several attractive advantages, such as high -factor, high-power handling capability, low loss, low cost, and easy integration with other planar circuits. Further, in order to improve the performance of conventional SIWs, several modified structures, such as ridge and folded structures, are presented [4]–[6]. The half-mode SIW is one of the modifications and occupies the half area of conventional ones with wide monomode bandwidth. For

S

Manuscript received August 14, 2009; revised December 11, 2009. First published March 29, 2010; current version published April 14, 2010. This work was supported by the National Basic Research Program of China under Grant 2009CB320204 and by the National Natural Science Foundation of China under Grant 60821062. L.-S. Wu, X.-L. Zhou, C.-T. Liu, L. Zhou, J.-F. Mao, and H.-L. Peng are with the Center for Microwave and RF Technologies (CMRFT), Shanghai Jiao Tong University, Shanghai 200240, China (e-mail: [email protected]). W.-Y. Yin is with the Center for Microwave and RF Technologies (CMRFT), Shanghai Jiao Tong University, Shanghai 200240, China, and also with the Center for Optics and EM Research, Zhejiang University, Hangzhou 310058, China (e-mail: [email protected]; wyyin @zju.edu.cn). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042832

passive components, it has been successfully applied to the design of couplers, bandpass filters, and power dividers, among others [7]–[10]. On the other hand, we notice that a periodically loaded fullmode SIW has been proposed in [11] recently, in which an artificially integrated synthetic rectangular waveguide is built up by introducing two parallel periodical units at its top and bottom surfaces. Therefore, the slow-wave modes can be supported with particular cutoff frequencies in such a multilayer structure. Because the half-mode SIW has an open side, it is easy to be loaded with other elements. Thus, we can use the structure to build up a periodically loaded integrated waveguide on a singlelayer substrate. However, to the best of our knowledge, only a few studies are reported on the periodically loaded half-mode SIWs [12], and no theoretical method has been developed to describe the guided-mode characteristics. In this paper, a new type of periodically loaded half-mode SIW is proposed. The propagation constants of the Floquet TE-modes in the waveguides are determined by the eigenvalues of the generalized transmission matrix of a single period, with its equivalent Bloch impedances also defined. Then, a set of capacitor-loaded and inductor-loaded half-mode SIWs were fabricated to validate our model, where the loading are all realized by surface-mounting lumped elements on the top metal plane of waveguides. Avoiding the use of surface-mounted elements, a corrugated half-mode SIW and an electromagnetic bandgap (EBG) structure loaded one are presented, with their modal dispersion features demonstrated numerically and experimentally. Further, a tunable phase shifter is proposed using a varactor-loaded half-mode SIW, with its 3-dB bandwidth of 50% and a maximal tunable range of 88 . Finally, a bandpass filter based on EBG-loaded half-mode SIW is also developed, with its sharp upper slope side and good spurious suppression performance. II. MODELING AND ANALYSIS A periodically loaded half-mode SIW is shown in Fig. 1(a), where the loaded equivalent susceptance can be replaced by some lumped elements or other compact structures. The conductor, dielectric, and radiation losses of this structure are assumed to be very small and they are neglected. The periodic array of metallic via-holes can be equivalent to an electric wall, and the width of the equivalent waveguide is denoted by [13]. As shown in Fig. 1(a), since or , most of the lower order guided modes are -modes, with their wave numbers given by

0018-9480/$26.00 © 2010 IEEE

(1)

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where (7c) (7d)

Fig. 1. (a) 3-D view and (b) equivalent model with a single period of a periodically loaded half-mode SIW.

Thus, the propagation constants of the Floquet modes in such a periodically loaded structure can be calculated numerically, when the relationship between and is known. The boundary conditions of the transverse electric and magnetic fields at are given by (8) (9)

The longitudinal magnetic fields in the structure can be expanded into

where is the Dirac function, and the effect of loaded susceptance is modeled as a voltage-controlled current source. From (8), we have (10)

(2) Substituting (3) and (4) into (9), it results in and , , , and are the lonwhere gitudinal magnetic fields at , , , and , respectively, which are shown in the equivalent model with a single period in Fig. 1(b), and and are the longitudinal magnetic components propagating along the directions of and , respectively. Then, the transverse electric and magnetic fields are derived by

(11) Thus, we obtain

(3) (12) (4)

where inate

. Further, substituting (10) into (12) to elim, we have

is the propagation constant corresponding to . where The generalized incident, reflection, and total waves can be defined as (5a)

By selecting the first

(13) modes appropriately, (13) is rewritten

as

(5b) (14)

(5c) As the length of a single period in Fig. 1(a) is denoted by , we have (6)

where and ;

is also a

. Similarly, substituting (10) into (12) to eliminate obtain

where is the propagation constant of the Floquet mode propagating along the -direction. According to Fig. 1(b), we can easily obtain (7a) (7b)

is an matrix, , matrix, with its element given by , we

(15) Thus, we have

(16)

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IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 58, NO. 4, APRIL 2010

where

, is the identity matrix of order , and is the generalized transmission matrix of the waveguide shunted with a susceptance . Based on (6), (7), and (16), we finally obtain

(17) and the real and imaginary parts of propagation constant are given by (18) where is the eigenvalue of the generalized transmission matrix of a single period. Simultaneously, the field distributions of the Floquet modes can be determined by the eigenvectors of , at and the transmitted power can be calculated by

0

Fig. 2. Normalized constants of p and p as functions of frequency, with ; red and blue (in online version): p 5 mm. Gray and black curves: C 0.47 pF; magenta and cyan (in online version): C 1 pF; gold and C green (in online version): C 2 pF.

= =

=0

=

=

III. CAPACITOR- AND INDUCTOR-LOADED HALF-MODE SIWS A. Capacitor-Loaded Half-Mode SIW

(19) Following the classical definitions in rectangular waveguide, the -direction on the top metal total current, flowing along the plane of waveguide, is determined by (20) and the voltage at

is calculated by (21)

Similar to that in the rectangular waveguide, the voltage of the Floquet mode is defined as the maximal voltage with respect to the -axis, i.e., (22) It is well known that the definitions of current and voltage are not unique for non-TEM modes, and it is not necessary that should represent the power carried by the mode [14]. Then, the equivalent Bloch impedance is defined by the voltage and current as (23) Note that there are many different definitions of characteristic impedance for a non-TEM mode, and the definition given here is only one of them. Several different definitions have been used in other substrate-integrated-waveguide cases [15], [16].

According to the above mathematical treatment, a set of capacitor-loaded half-mode SIWs will be investigated at first. For an ideal capacitor-loaded case, the loaded susceptance in , where is the periodically Fig. 1(a) is given by mm, the normalized attenuation load capacitance. As and phase constants of and are plotted in Fig. 2 for different values of , with , 25 mm, 1 mm, 2 mm, and 1 mm. The case of means no loading. The following results have been found. 1) As the operating frequency approaches zero, all of the attenuation constants with different load capacitances are the same as those with no loading. 2) The cutoff frequencies of the Floquet modes decrease with increasing load capacitance. 3) The dominant Floquet mode can only propagate within a frequency range, and its upper cutoff frequency also decreases with increasing load capacitance. In Fig. 2, the lower and upper cutoff frequencies of the dominant Floquet mode with 2 pF are obtained by 1.13 and 3.00 GHz, respectively. The cutoff frequency of the second Floquet mode is 3.76 GHz. Then, a bandgap appears from 3.00 to 3.76 GHz. However, if 1 pF, both the upper cutoff frequency of the dominant Floquet mode and that of the second one are equal to 4.14 GHz. This means that no bandgap will appear, and the energy can be transmitted in a monomode region from the lower cutoff frequency 1.38 GHz of the dominant Floquet mode to the cutoff frequency 7.08 GHz of the third mode in such a periodically loaded structure. Because the propagating modes below and above 4.14 GHz are different, we can define it as the conversion frequency in the very wide monomode region. When the value of is smaller than 1 pF, there will be a frequency range where both the dominant and the second Floquet modes can be propagation modes. When 15 mm, the normalized phase constants of nonattenuating Floquet modes are plotted in Fig. 3 for different values of . The of the waveguide with no loading is also plotted for comparison. The following results are found.

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Fig. 4. Phase constants as functions of frequency, with C p 5 mm; dark gray: p 10 mm; light gray: p 15 mm.

=

=

=

= 1 pF. Black:

=

Fig. 3. Normalized phase constants p as functions of frequency, with p 15 mm, within: (a) 0 to 10 GHz and (b) 10 to 15 GHz. Black: C 0; blue (in online version): C 0.25 pF; cyan (in online version): C 1 pF; red (in 4 pF. online version): C

= =

=

=

1) The plane is divided into many regions by the curves without loading, as marked from I to IX in Fig. 3. The curve, corresponding to each mode with loading, is restricted only within one region. Thus, there are several bandgaps. 2) The operating frequency of a nonattenuating Floquet mode may decrease with increasing , this means that the Floquet wave propagates backward, i.e., the periodically loaded structure works in the left-handed mode at that time. 3) Corresponding to the same Floquet mode, the curve with large load capacitance is always on the left of the curve with the small one. When 1 pF, the phase constants of nonattenuating Floquet modes are plotted in Fig. 4 for different values of . It is shown that the cutoff frequencies of the first two Floquet modes increase with increasing , which is resulted from the reduction of the load capacitance per unit length, i.e., . More bandgaps will be expected with wider bandwidth when the period is increased. In order to validate our analysis, three half-mode SIWs loaded with different capacitors and periods were fabricated on a substrate with 2.65 and 1 mm, as shown in Fig. 5. All the capacitors are surface-mounted over an etched slot located between the top metal plane of the waveguide and a metal plate short-circuited by the metallic via-hole array. For measurement, the samples are all connected with two transitions between the microstrip and half-mode SIW, where the dimensions are optimized and given in Fig. 5. It should be pointed out that the simulated and measured -parameters will be affected by the discontinuities of transitions, the parasitic parameters of lumped capacitors, and the short-circuited via-holes. The simulated measured transmission parameters and the Bloch impedances obtained from (23) of the first sample with

Fig. 5. Photograph of the capacitor-loaded half-mode SIW samples.

0.47 pF and 5 mm are plotted in Fig. 6(a) and (b), respectively. Its lower cutoff frequency is about 1.6 GHz, which well agrees with the predicted in Fig. 2. The ripples are shown from 3 to 4.5 GHz in the simulated and measured frequency responses. This is mainly contributed by the mismatch between the quasi-TEM mode of the transitions and the dominant Floquet one. A narrow stopband appears near in Fig. 2. It means that 4.7 GHz, which corresponds to the waveguide is no more working in monomode above this frequency, and the loss of mode conversion will arise. It should also be pointed out that the capacitances are with tolerance, so some ripples are observed only in the measured frequency response above 5 GHz. On the other hand, Fig. 6(b) shows that the Bloch impedance of the dominant Floquet mode is about 20 from 2 to 5.5 GHz, and that is the reason why we select the microstrip-to-substrate-integrated-waveguide transition with a large width to match the low impedance. The measured transmission parameters and the calculated Bloch impedances with 1 pF but for different periods are plotted in Fig. 7(a) and (b), respectively, with the following results. 1) The lower cutoff frequencies of the dominant Floquet mode with 5 and 15 mm are equal to 1.4 and 1.7 GHz, respectively, when the Bloch impedances are both infinite. 2) Although the structure with 5 mm always works in monomode within the frequency range of interest, a narrow bandgap is still observed near the conversion frequency . The reason is that the Bloch impedances corresponding to the dominant and the second Floquet modes are equal to zero and infinity at , respectively.

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=

Fig. 7. Capacitor-loaded half-mode SIWs with C 1 pF, p (a) Measured transmission parameter. (b) Bloch impedances.

=

= 5, and 15 mm.

=

Fig. 6. Capacitor-loaded half-mode SIW with C 0.47 pF and p 5 pF. (a) Simulated and measured transmission parameters. (b) Bloch impedances.

Under such circumstances, the waveguide and the transitions are in a serious mismatching, which also introduces some ripples, as shown in Fig. 7(a). 3) The measured bandgap with 15 mm is located around 4 GHz, which is slightly lower than what we expected. This may be caused by the tolerance of the loaded capacitors. The capacitor-loaded half-mode SIW provides a wide and deep bandgap, though the period number is small. B. Inductor-Loaded Half-Mode SIW We further consider the case of inductor-loaded half-mode SIWs, where the loaded susceptance is equal to , and is the periodically load inductance. Fig. 8 shows the comparisons of propagation constants up to 5 GHz between the waveguide loaded with inductors and without loading. The parameters are given as 1.0 5.1 nH, and 15 mm. The following points can be noted. 1) The cutoff frequency increases with decreasing the load inductance. 2) The inductor-loaded half-mode SIW can afford larger attenuation than that in the no-loading case. 3) The attenuation at a certain frequency below the cutoff frequency increases with decreasing the load inductance. Therefore, the inductor-loaded half-mode SIW can be utilized to implement a tunable cutoff attenuator by shunting an inductor with a varactor. As shown in Fig. 9(a), an inductor-loaded half-mode SIW was fabricated. Fig. 9(b) shows the measured and simulated

Fig. 8. Normalized constants of p and p as functions of frequency, with p 15 mm. Solid line: no loading; dashed line: L 5.1 nH; dotted line: L 1 nH.

= =

=

-parameters. The layout is very similar with the capacitorloaded one in Fig. 5(c) except that the lumped capacitors are replaced by inductors, with their inductances of 5.1 nH and the self-resonant frequency of 5.8 GHz. It is evident that the simulated -parameters show close agreements with the measured ones.Fig. 9(b) shows the high-pass performance as we expected. However, the cutoff frequency of the high-pass structure with finite length is hard to be localized accurately only by its -parameters. It is easily understood that the group delay will reach its maximum at the cutoff frequency because the group velocity is close to zero there. In other words, we can capture the cutoff frequency from the measured results by (24) where is the frequency-dependent group delay. Thus, the measured cutoff frequency is identified as 2.26 GHz, which is very close to our modeled value shown in Fig. 8.

WU et al.: NEW TYPE OF PERIODICALLY LOADED HALF-MODE SIW AND ITS APPLICATIONS

Fig. 12. Measured and simulated SIW.

Fig. 9. Inductor-loaded half-mode SIW. (a) Photograph. (b) Measured (solid line) and simulated (dashed line) S -parameters and group delay.

887

S -parameters of the corrugated half-mode

via-holes are replaced by quarter-wavelength open stubs and arranged in a corrugated pattern on the edges of the waveguide. The idea is also used in half-mode SIWs, as depicted in Fig. 10. The loaded susceptance is calculated by

(25)

Fig. 10. Photograph of the corrugated and the EBG-loaded half-mode SIWs.

Fig. 11. Normalized constants of SIW as functions of frequency.

0p and p in the corrugated half-mode

IV. CORRUGATED AND EBG-LOADED HALF-MODE SIWS A. Corrugated Half-Mode SIW The half-mode SIW can also be loaded with other compact microwave structures. A corrugated and an EBG-loaded samples, are modeled and fabricated without any surface-mounted components, as shown in Fig. 10. The corrugated SIW [17] was proposed to facilitate shunt connection of active components with SIWs, where the metallic

where is the velocity of light in free space, , , and are the length, characteristic impedance, and effective relative permittivity of the open stub, respectively, is the equivalent additional line length for the open-circuit microstrip discontiis the equivalent step capacitance [18]. Then, the nuity, and frequency response can be numerically predicted. The normalized attenuation and phase constants obtained from (17) and (18) in the corrugated structure are plotted in Fig. 11, with the following results. 1) The lower cutoff frequency of the dominant mode is reduced by loading the open stubs, because they are showing capacitive at low frequencies. 2) There is a bandgap between the passbands of the dominant and the second Floquet modes, so each of the first two modes can be guided in monomode within a certain frequency range. 3) Since the upper cutoff frequency of the second mode is smaller than the cutoff frequency of the fourth one, there is a narrow frequency range, therefore only the energy corresponding to the third mode can be transmitted. The measured and simulated -parameters of the fabricated sample are plotted in Fig. 12 with good agreement obtained. However, it should be understood that the transmission performance of the corrugated structure is not good from 5.6 to 7.3 GHz and above 9 GHz, because at least two Floquet modes are excited at the same time. Thus, the operation beyond the monomode passbands, as indicated in Fig. 11, is not preferred. It is also found that the measured frequency of the first bandgap in Fig. 12 is higher than the modeled one in Fig. 11. Since the periodical open stubs also compose a periodic structure themselves, some energy propagates within the region of stubs along the longitudinal direction of waveguide. Thus, the approximation of distributed elements to lumped susceptances will introduce some error into our modeled results, which is the main reason of the bandgap deviation.

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Fig. 15. Normalized constants of SIW as functions of frequency.

Fig. 13. Simulated electric field distributions in the corrugated half-mode SIW at: (a) 2.5, (b) 5.0, (c) 7.8, and (d) 9.1 GHz.

Fig. 14. Voltage distributions of the first four Floquet modes over the cross section of the corrugated half-mode SIW.

In order to get clear view inside the corrugated structure, we use a 3D-FEM simulator [Ansoft High Frequency Structure Simulator (HFSS)] to predict the electric field distributions at 2.5, 5.0, 7.8 and 9.1 GHz, as shown in Fig. 13(a)–(d). These frequencies are located at the first three monomode bands and a multimode band, respectively. According to (21), the voltage distributions of the first four Floquet modes over the cross section at these four frequencies are shown in Fig. 14. It is understood that the loaded open stub is capacitive within the dominant monomode band, while it is inductive within the second one. Therefore, the electric field distribution at 2.5 GHz is similar to that of the capacitor-loaded half-mode SIW, and the electric field distribution at 5.0 GHz is similar to that of the inductor-loaded one. Differing from the first two modes, the maximal electric field and voltage of the third mode over the cross section is located at the middle of the waveguide part at 7.8 and 9.1 GHz approximately. The two nonattenuating Floquet modes at 9.1 GHz have very different voltage distributions, as shown in Fig. 14. Therefore,

0p and p in the EBG-loaded half-mode

a complex electric field distribution is observed in Fig. 13(d). This means that both the third and fourth Floquet modes can be excited in the waveguide. Also, we note that the maximal voltage of the third mode at 9.1 GHz is located at the position where the voltage of the fourth mode is close to zero. B. EBG-Loaded Half-Mode SIW We further replaced the lumped capacitors in Fig. 5 with several capacitive patches, as shown in Fig. 10(b). Compared with the surface-mounted capacitors, the patches will provide bespoke capacitances with high precision. However, the loaded patches will also introduce some parasitic effects and finally behave as EBG resonators. To fast capture the frequency characteristics of the EBG-loaded half-mode SIW, only the dominant resonance of the EBG unit will be considered here. After the equivalent and inductance of an EBG unit are series capacitance extracted using the full-wave EM simulation, the propagation constants of the guided modes can be determined by the loaded susceptance . The phase and attenuation constants of the EBG-loaded structure are plotted in Fig. 15, with 1.0 pF and 0.4 nH. The measured and simulated -parameters are shown in Fig. 16. A bandgap and two monomode regions can be seen in Figs. 15 and 16. Their locations and bandwidth can be controlled by tuning the geometrical parameters of the EBG-loaded structure. A bandgap deviation between the measured and modeled results is found, and the reason is similar to that in the corrugated case. V. APPLICATIONS A. Tunable Phase Shifter Implemented With Varactor-Loaded Half-Mode SIW Phase shifters are important components for various applications. A substrate integrated ferrite toroidal phase shifter was proposed in [19], and a reciprocal substrate-integrated-waveguide phase shifter can be realized by combining a waveguide portion of the line with a post-based technique [20]. Further, it will be very valuable to develop a tunable substrate-integratedwaveguide phase shifter. As indicated above, the cutoff frequency and phase constant of the waveguide can be controlled by the periodically loaded

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Fig. 17. Layout of the tunable phase shifter integrated with varactor-loaded half-mode SIW.

Fig. 16. Measured and simulated S -parameters of the EBG-loaded half-mode SIW.

capacitors. One can integrate a tunable phase shifter with a varactor-loaded half-mode SIW using the following procedure. Step 1) Select the varactor properly, according to its tuning , operating frequency, parrange of capacitance asitic parameters, size, and cost. Step 2) Select the substrate and fabrication technology. are determined. Then, , , and Step 3) Design the dc bias network. Note that the varactor to should be connected in series with a capacitor provide the load capacitance . Step 4) Select the period properly. As shown in Fig. 4, more and wider bandgaps will be expected with larger . Thus, a small is preferred. However, note that the spacing between two loaded varactors should be sufficiently large to place their dc bias networks. Step 5) Plot the figure as Fig. 2 using our proposed method in Section II with and . To keep an enough tuning range, a large initial value of , for example, 3 pF, is considered. Step 6) Change the value of , and the interested frequency range should be within both the monomode region of the dominant mode with the maximal load capacitance and that with the minimal one. Step 7) In some cases, no matter what value is set to be, the first bandgap with the maximal load capacitance always locates in the interested frequency range. must be reduced, and go back to Step 6). Then, Step 8) After determining and , the normalized phase constant of the dominant mode is obtained from (18) for the minimal and maximal value of , respectively, denoted by and . Each period will provide a certain tuning range of . In other words, the range of phase shift is proportional to the number of period. Then, one can decide how many varactors should be used, according to the specified tunable range of phase shift. However, note that more varactors introduce more insertion losses. Step 9) Optimize the whole structure. Fig. 17 shows the layout of a phase shifter fabricated on a substrate with and 1 mm. The dc bias network of

Fig. 18. DC bias network used in the phase shifter.

each pair of loaded varactors is shown in Fig. 18, with two Infivaries neon BB857 silicon tuning diodes. The capacitance from 6.6 to 0.55 pF, when changes from 1 to 25 V. The series inductance is 0.6 nH. Then, its frequency characteristics are predicted by the method proposed above. The magnitude and phase of the measured transmission parameter with different values of are plotted in Fig. 19(a) and (b), respectively. According to the explanation in Section III-A, the following results are found. 1) The lower cutoff frequency of the dominant Floquet mode in the varactor-loaded structure increases with increasing the bias voltage . 2) The phase shift decreases with increasing . 3) The central frequency of the bandgap above the dominant mode passband increases and its bandwidth decreases, when increases. 4) When the bias voltage is sufficiently high, the bandgap will be vanished. All of the phenomena are similar with those observed in the capacitor-loaded half-mode SIWs, except the parasitic effects of the surface-mounted components, metal patches, and shortcircuited vias considered. In Fig. 19, it is also found that the insertion loss of the tunable phase shifter with changing the bias voltage is better than 3 dB from 1.23 to 2.04 GHz. In other words, it has a central frequency of 1.635 GHz and a 3-dB bandwidth of 50%. The tunable ranges of the phase shift at 1.23, 1.635 and 2.04 GHz, as plotted in Fig. 20, are equal to 44 , 46 and 88 , respectively. It has been found that the tunable range can be increased by increasing the operating frequency. Thus, a tunable phase shifter can be built up by periodically mounting varactors on the waveguide, with its advantages of reciprocity, symmetry, light weight, and small size.

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(lower) cutoff frequencies of the Floquet modes. Then, (17) can be written as

(26) where is the identity matrix of order nontrivial solutions for , we obtain

. To have

(27) When substituting the geometrical parameters and load capacitance into (27), the (lower) cutoff frequencies of first two Flo, quet modes are just determined by the first two zeros of which are plotted in Fig. 21(a) and (b) as functions of and , respectively. Similarly, the upper cutoff frequency of the dominant Floquet mode is determined by the first zero of , where is given by Fig. 19. Measured transmission parameter for different values of magnitudes and (b) phases.

V

: (a)

(28)

Fig. 20. Phase shift as a function of V

for different frequencies.

B. Bandpass Filter Implemented With EBG-Loaded Half-Mode SIW In Fig. 16, a sharp and deep bandgap is observed above the passband of the dominant Floquet mode. This implies that bandpass filters with sharp upper slope side can be realized using the EBG-loaded half-mode SIWs. The structure will provide a passband between the lower and upper cutoff frequencies of its dominant Floquet mode, and the first spurious response will appear at the cutoff frequency of the second Floquet mode. For simplicity, an ideal capacitor-loaded half-mode SIW is considered. It is easy to understand that the eigenvalue of the generalized transmission matrix is equal to 1 at the

The calculated upper cutoff frequency is plotted in Fig. 21(c) as a function of and . The design procedure of a bandpass filter based on EBGloaded half-mode SIW is as follows. Step 1) Plot the figures as Fig. 21, with the preset parameters of substrate and geometry. and are corresponding to the selected substrate. is determined by the fabrication technology, and is usu. To make a compact configuraally set to be tion, a small is preferred, such as 5 to 10 mm. Step 2) When the design specifications of central frequency and bandwidth are given, the lower and upper passband edges of the filter are also determined. Then, and are two curves denoted by obtained from Fig. 21(a) and (c) to meet the specifications of the lower and upper passband edges, reof spectively. The intersection point and is just the initial solution of the width of waveguide and the load capacitance . And the first spurious response is also predicted from Fig. 21(b) simultaneously. Step 3) Extract the size of an EBG element by full-wave simulations. The equivalent input susceptance of the element should be equal to . Step 4) If the width of EBG element is close to or even larger than it, the period should be increased to ensure that the unwanted direct coupling between two adjacent elements is small enough, and then go back to Step 1). If not, go to Step 5).

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Fig. 22. Layout of the bandpass filter based on EBG-loaded half-mode SIW.

Fig. 21. Calculated cutoff frequencies of a capacitor-loaded half-mode SIW as functions of w and C , with  3:0, h = 1 mm, p = 2 mm, d = 1 mm, and p = 6 mm. (a) Lower cutoff frequency of dominant Floquet mode. (b) Cutoff frequency of second Floquet mode. (c) Upper frequency of dominant Floquet mode.

=

Step 5) Select the filter order properly, since more elements introduce sharper slope sides together with larger size and insertion loss. Step 6) Optimize the dimensions of waveguide and transitions. A narrowband bandpass filter with three elements, so-called “third-order,” was designed and fabricated to validate our idea. The layout is shown in Fig. 22, with its geometrical parameters also given. The substrate is selected to be Taconic TSM-30, with , , and 1.016 mm. It was designed with symmetric topology. Each loaded EGB unit consists of a narrow strip and a square patch. The narrow strip with a width of 1 mm is introduced to load each EBG unit approximately at a certain point on the top metal plane of the waveguide. However, the side lengths of square patches are optimized to be different from one another so as to improve the in-band return loss.

Fig. 23. Measured and simulated S -parameters of the third-order bandpass filter within: (a) a narrow frequency range and (b) a wide frequency range.

In our measurements, the filter is connected with two 50- microstrip lines through a pair of tapered transitions of the same dimensions. The third-order bandpass filter was designed with a central frequency of 3.45 GHz and a bandwidth of 300 MHz. The total size of the sample with two transitions is 21.4 mm 11.9 mm. Since a conventional substrate integrated square cavity with the same substrate and resonant frequency will occupy the area of 35.5 mm 35.5 mm, the proposed filter is compact. The -parameters of a narrow frequency range and a wide one are plotted in Fig. 23(a) and (b), respectively. A reasonable agreement is obtained between the measured results and the simulated ones. It is found that the central frequency is 3.42 GHz, and the 1-dB bandwidth is about 280 MHz. The deviations between the measured and simulated responses are mainly due to the fabrication tolerances. The measured insertion loss is 1.7 dB at the central frequency, and the in-band return loss is better than 24 dB. In particular, the upper side slope of the passband is about 0.2 dB/MHz, which is superior

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for a conventional direct-coupled third-order bandpass filter with the design specification. There is a very weak spurious response around 7.2 GHz in Fig. 23(b). It is caused by the lower part of the structure in Fig. 22(a), which is also a half-mode SIW with its width of 6.0 mm. When the lower side of the substrate is plated with solder, this spurious response will be eliminated. It is also found that the first obvious spurious response appears above 11 GHz, which is larger than 3.2 times the central frequency. Therefore, both the sharpness of the upper slope side and the spurious suppression characteristics can be obtained by implementing the narrowband bandpass filter with an EBG-loaded half-mode SIW. VI. CONCLUSION A new type of half-mode SIW is proposed in this paper, which are assembled with different lumped elements or units periodically. The modal characteristics, i.e., the propagation constants, Bloch impedances, and voltage distributions of the Floquet TE-modes, are all captured accurately by solving the eigenvalue problem of the generalized transmission matrix of a single period. Our developed method has been successfully demonstrated in the realization of some typical capacitor-loaded, inductor-loaded, corrugated, and EBG-loaded half-mode SIWs. Further, a tunable phase shifter was designed and fabricated using a varactor-loaded waveguide, with its 3-dB bandwidth of 50% and a maximal tunable range of 88 . A bandpass filter, with sharp upper slope side and good spurious suppression characteristics, was realized using the EBG-loaded structure. According to our studies, more applications of periodically loaded half-mode SIWs will be expected in the development of new microwave components and circuits. ACKNOWLEDGMENT The authors would like to thank Taconic Advanced Material Company Ltd., Suzhou City, Jiangsu Province, China, for providing TSM-30 substrates in the fabrication of filters. REFERENCES [1] A. Piloto, K. Leahy, B. Flanick, and K. A. Zaki, “Waveguide filters having a layered dielectric structures,” U.S. Patent 5382931, Jan. 17, 1995. [2] H. Uchimura, T. Takenoshita, and M. Fujii, “Development of a laminated waveguide,” IEEE Trans. Microw. Theory Tech., vol. 46, no. 12, pp. 2438–2443, Dec. 1998. [3] D. Deslandes and K. Wu, “Integrated microstrip and rectangular waveguide in planar form,” IEEE Microw. Guided Wave Lett., vol. 11, no. 2, pp. 68–70, Feb. 2001. [4] Y. Rong, K. A. Zaki, M. Hageman, D. Stevens, and J. Gipprich, “Low-temperature cofired ceramic (LTCC) ridge waveguide bandpass chip filters,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 12, pp. 2317–2324, Dec. 1999. [5] N. Grigoropoulos, B. S. Izquierdo, and P. R. Young, “Substrate integrated folded waveguides (SIFW) and filters,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 12, pp. 829–831, Dec. 2005. [6] L.-S. Wu, X.-L. Zhou, and W.-Y. Yin, “Evanescent-mode bandpass filters using folded and ridge substrate integrated waveguides (SIWs),” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 3, pp. 161–163, Mar. 2009. [7] B. Liu, W. Hong, Y.-Q. Wang, Q.-H. Lai, and K. Wu, “Half mode substrate integrated waveguide (HMSIW) 3-dB coupler,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 1, pp. 22–24, Jan. 2007.

[8] Y.-Q. Wang, W. Hong, Y.-D. Dong, B. Liu, H.-J. Tang, J.-X. Chen, X.-X. Yin, and K. Wu, “Half mode substrate integrated waveguide (HMSIW) bandpass filter,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 4, pp. 265–267, Apr. 2007. [9] X.-C. Zhang, J. Xu, Z.-Y. Yu, and Y.-L. Dong, “C -band half mode substrate integrated waveguide (HMSIW) filter,” Microw. Opt. Tech. Lett., vol. 50, no. 2, pp. 275–277, Feb. 2008. [10] Z.-Y. Zhang and K. Wu, “Broadband half-mode substrate integrated waveguide (HMSIW) Wilkinson power divider,” in IEEE MTT-S Int. Microw. Symp. Dig., Atlanta, GA, Jun. 2008, pp. 879–882. [11] H.-S. Wu and C.-K. C. Tzuang, “Artificially integrated synthetic rectangular waveguide,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 9, pp. 2872–2881, Sep. 2005. [12] C.-L. Zhong, J. Xu, Z.-Y. Yu, M.-Y. Wang, and J. H. Li, “Half mode substrate integrated waveguide broadband bandpass filter using photonic bandgap structures,” in Int. Microw. Millimeter Wave Conf. Tech. Dig., Nanjing, China, Apr. 2008, pp. 22–24. [13] Q.-H. Lai, C. Fumeaux, W. Hong, and R. Vahldieck, “Characterization of the propagation properties of the half-mode substrate integrated waveguide,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 8, pp. 1996–2004, Aug. 2009. [14] R. E. Collin, Field Theory of Guided Waves. New York: McGrawHill, 1960. [15] D. Deslandes and K. Wu, “Analysis and design of current probe transition from grounded coplanar to substrate integrated rectangular waveguides,” IEEE Trans. Microw. Theroy Tech., vol. 53, no. 8, pp. 2487–2494, Aug. 2005. [16] Y. Ding and K. Wu, “Substrate integrated waveguide-to-microstrip transition in multilayer substrate,” IEEE Trans. Microw. Theroy Tech., vol. 55, no. 12, pp. 2839–2844, Dec. 2007. [17] D.-G. Chen and K. W. Eccleston, “Substrate integrated waveguide with corrugated wall,” in Proc. Asia–Pacific Microw. Conf. Dig., Hong Kong, Dec. 2008. [18] K. C. Gupta, R. Garg, I. J. Bahl, and P. Bhartia, Microstrip Lines and Slotlines, 2nd ed. Norwood, MA: Artech House, 1996. [19] W.-Q. Che, E. K.-N. Yung, and K. Wu, “Millimeter-wave ferrite phase shifter in substrate integrated waveguide (SIW),” in IEEE AP-S Int. Antennas Propag. Symp. Dig., Columbus, OH, Jun. 2003, pp. 887–890. [20] K. Sellal, L. Talbi, T. A. Denidni, and J. Lebel, “Design and implementation of a substrate integrated waveguide phase shifter,” IET Microw. Antennas Propag., vol. 2, no. 2, pp. 194–199, Mar. 2008.

Lin-Sheng Wu (S’09) received the B.S. and M.S. degrees in electronic engineering, and electromagnetic fields and microwave techniques from Shanghai Jiao Tong University, Shanghai, China, in 2003 and 2006, respectively, and is currently working toward the Ph.D. degree at Shanghai Jiao Tong University. His research interests include novel techniques for microwave integration, microwave and RF components, intelligent information processing, and passive localization.

Xi-Lang Zhou received the B.S. degree in electronic engineering from Shanghai Jiao Tong University (SJTU), Shanghai, China, in 1978. From August 1978 to January 1981, he was a Lecturer with the Applied Mathematics Department of SJTU. He became an Assistant Professor, Associate Professor, and Professor with the Center for Microwave and RF Technologies, SJTU in 1986, 1992, and 1998, respectively. He has been engaged in and has participated in many research programs in the fields of radar, microwave and millimeter-wave techniques, remote sensing, and microstrip antennas. He has authored or coauthored more than 100 papers in journals and written ten books/book chapters in the areas of electromagnetic fields and microwave techniques, microstrip antennas, and millimeter-wave techniques and applications. His research interests include radar signal processing, electromagnetic fields and microwave techniques, microwave sensors, microstrip antennas, electromagnetic compatibility (EMC), RF identification (RFID), smart antennas, and multiple-input multiple-output (MIMO) systems.

WU et al.: NEW TYPE OF PERIODICALLY LOADED HALF-MODE SIW AND ITS APPLICATIONS

Wen-Yan Yin (M’99–SM’01) received the M.Sc. degree in electromagnetic field and microwave technique from Xidian University (XU), Shaanxi, China, in 1989, and the Ph.D. degree in electrical engineering from Xi’an Jiaotong University (XJU), Xi’an, China, in 1994. From 1993 to 1996, he was with the Department of Electronic Engineering, Northwestern Polytechnic University (NPU). From 1996 to 1998, he was a Research Fellow with the Department of Electrical Engineering, Duisburg University, granted by the Alexander von Humblodt-Stiftung of Germany. Since December 1998, he has been a Research Fellow with the Monolithic Microwave Integrated Circuit (MMIC) Modeling and Packing Laboratory, Department of Electrical Engineering, National University of Singapore (NUS), Singapore. In March 2002, he joined Temasek Laboratories, NUS, as a Research Scientist and the Project Leader of high-power microwave and ultrawideband electromagnetic compatibility (EMC)/electromagnetic interference (EMI). In April 2005, he joined the School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University (SJTU), Shanghai, China, as a Chair Professor in Electromagnetic Fields and Microwave Techniques (until 2007). He is currently the Director of the Center for Microwave and RF Technologies, SJTU. Since 2009, he has been Qie Shi Chair Professor at Zhejiang University (ZJU), working in the Center for Optics and Electromagnetic Research, Department of Optical and Electrical Information. As a lead author, he has authored more than 150 international journal articles including 15 book chapters. One chapter, “Complex Media,” is included in the Encyclopedia of RF and Microwave Engineering (Wiley, 2005). He is a reviewer of international journals including Radio Science, the Proceedings of the Institution of Electrical Engineers—H: Microwave, Antennas, and Propagation. His main research interests are in electromagnetic characteristics of complex media and their applications in engineering, EMC, EMI, and electromagnetic (EM) protection, on-chip passive and active MM (RF) IC device testing, modeling, and packaging, ultra-wideband interconnects and signal integrity, and nanoelectronics. Prof. Yin is the technical chair of Electrical Design of Advanced Packaging and Systems (EDAPS’06), technically sponsored by IEEE CPMT Subcommittee. He is a reviewer of six IEEE TRANSACTIONS. He was the recipient of the Best Paper Award of the 2008 APEMC and 19th International Zurich Symposium on EMC in Singapore.

Chun-Tian Liu was born in 1984. He received the B.S. degree from the University of Science and Technology of China in 2007 and is currently working toward the M.S. degree at Shanghai Jiao Tong University, Shanghai, China. His research interests now focus on signal integrity and power integrity problems in high-speed circuits.

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Liang Zhou (M’10) received the B.Sc. degree from Zhongnan University, China, in 2001, and the M.Sc. and Ph.D. degrees from the University of York, York, U.K., in 2003 and 2005, respectively. In 2005, he joined Motorola, as a Senior RF Engineer, where he was involved with linear power amplifiers (LPAs) for third–generation (3G) basestation transceivers. He has been a Visiting Scholar with the Massachusetts Institute of Technology, Cambridge, in 2007. He joined the Center for Microwave and RF Technologies, Shanghai Jiao Tong University, Shanghai, China, as an Assistant Professor in 2006, where his research mainly focuses on microwave and millimeter-wave active and passive components and devices.

Jun-Fa Mao (M’92–SM’98) was born in 1965. He received the B.S. degree in radiation physics from the University of Science and Technology of National Defense, Changsha, China, in 1985, the M.S. degree in experimental nuclear physics from the Shanghai Institute of Nuclear Research, Shanghai, China, in 1988, and the Ph.D. degree in electronic engineering from Shanghai Jiao Tong University (SJTU), Shanghai, China, in 1992. From 1994 to 1995, he was a Visiting Scholar with the Chinese University of Hong Kong, Hong Kong, and a Postdoctoral Researcher with the University of California at Berkeley, from 1995 to 1996. He has been a Professor with the Center for Microwave and RF Technologies, SJTU, since 1992. He was a Topic Expert of the High-Tech Program of China during 2001–2003 and an Associate Dean of the School of Electronic, Information and Electrical Engineering, SJTU, from 1999 to 2005. His current research interests include the interconnect problem of high-speed integrated circuits, microwave components, and circuits. He has authored or coauthored more than 200 papers. Dr. Mao is a Cheung Kong Scholar of the Ministry of Education, China, an Associate Director of the Microwave Society of China Institute of Electronics, and the 2007–2008 Chair of the IEEE Shanghai Section. He was the recipient of the National Natural Science Award of China in 2004 and the First-Class Natural Science Award of Shanghai in 2005.

Hong-Li Peng received the B.S., M.S., and Ph.D. degrees in electronic engineering from Xidian University, Xi’an, Shaanxi, China, in 1988, 1991, and 2005, respectively. From 1991 to 1999, he was with the National Telemeter Center, Xi’an, China, designing antennas and circuits for the microwave transceivers. From 1999 to 2008, he was a Senior Researcher with ZTE, Shanghai, China, for wireless systems research, where he contributed over seven standardized patents and over 15 journal papers. He is currently an Associate Professor with the Center for Microwave and RF Technologies, Shanghai Jiao Tong University, Shanghai, China. His research focuses on MIMO systems, wireless channel modeling, passive circuits, and subsystem integration.

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An Automatically Tunable Cavity Resonator System Raoul O. Ouedraogo, Student Member, IEEE, Edward J. Rothwell, Fellow, IEEE, Shih-Yuan Chen, Member, IEEE, and Brian J. Greetis, Student Member, IEEE

Abstract—A tunable cavity resonator is described that uses a feedback control system to alter its resonant characteristics in response to changes in its environment, without changing the physical dimensions of the resonator. Tuning wires inserted into the cavity are connected or disconnected to the cavity wall under the control of a binary algorithm that searches for desirable operating states from among a very large number of possible switch configurations. The ability of the cavity to be tuned in response to changes in either cavity loading or resonator size is investigated using simulations, and the feasibility of the system is thereby demonstrated. Measurements made using a laboratory prototype show that the cavity may be automatically tuned in response to changes in the properties of the materials within the cavity. Index Terms—Broadband, genetic algorithm (GA), microwave resonator, quality factor, tunable cavity.

I. INTRODUCTION

C

LASSICAL microwave cavities have a fixed geometrical configuration and are designed with the dominant mode resonant at a fixed frequency. In applications such as particle accelerators and material processing [1], [2], it is often necessary to tune the resonant frequency of the cavity to accommodate changes in ambient temperature, pressure, or material characteristics. It is shown in [3] and [4] that the resonant frequency of a cavity can be tuned by making small changes to the cavity structure or by introducing small pieces of metal or dielectric into the cavity. The inclusion of ferrite inside a cavity as a means to tune the resonant frequency has been the preferred approach for many years. Unfortunately, high losses in the ferrite result in a very low-cavity [2]. Movable cavity walls as discussed in [4] or movable microelectromechanical elements with associated actuators [5] have also been used to achieve frequency tunability. However, these mechanical methods are cumbersome to employ and come at a high cost of cut-and-try design with a narrow range of discrete frequency tuning. A new type of resonator is proposed that is capable of automatically tuning its resonant frequency over a broad frequency band, without alteration of the cavity geometry or degradation of the cavity . A system of tuning wires is inserted into the cavity and attached to the inner surface of one or more walls Manuscript received September 09, 2009; revised November 08, 2009. First published March 25, 2010; current version published April 14, 2010. This work was supported by the National Science Council, Taiwan, under Contract NSC 98-2221-E-002-049. R. O. Ouedraogo, E. J. Rothwell, and B. J. Greetis are with the Department of Electrical and Computer Engineering, Michigan State University, East Lansing, MI 48824 USA (e-mail: [email protected]; [email protected]; [email protected]). S.-Y. Chen is with the Department of Electrical Engineering, National Taiwan University, Taipei 106, Taiwan (e-mail: [email protected]). Digital Object Identifier 10.1109/TMTT.2010.2042840

through computer-controlled switches. By opening and closing the switches, the perturbation of the cavity fields is altered, and thus the resonant frequency is changed. By monitoring some property of the cavity and feeding this information to the controller, the cavity can be tuned in response to changes in the operating conditions of the resonator without need for operator intervention. As an example, consider the curing of a material by microwave heating within a cavity. As the temperature of the material changes, its dielectric properties also change, altering the resonance frequency and thus reducing the coupling of the source to the cavity. This effect may be compensated by retuning the cavity; an appropriate switch state is found that moves the resonant frequency of the material-loaded cavity back to the source frequency. In this case, the measured return loss of the cavity feed may be maximized to produce the desired retuning. An important operating principle of the proposed tunable cavity is that the effect of any particular switch state on the resonance behavior of the cavity is unknown at the outset of operation. Instead, a large number of possible switch combinations is introduced, allowing for the possibility of one or more states producing the desired effects. Since the problem is binary possible configu(each switch is either on or off), there are rations. The prototype described in this paper uses 26 switches, which provide 67 million possible configurations. Note that the specific geometry of the tuning structure is unimportant, as long as a sufficient diversity of switch states is present. The usefulness of a particular tuner geometry is only determined through experimentation (or simulation). This approach has proved successful in the design of several self-structuring antenna systems [6]–[12]. Since the number of possible tuner configurations can be quite large, an efficient binary algorithm is required to search through the many potential candidate switch positions. Past research with self-structuring antennas has shown that a genetic algorithm (GA) is capable of finding useful configurations with far fewer looks than required by a random search. Preliminary simulations presented in [13] and [14] demonstrate that a GA is capable of finding good operating states for a cubical cavity over a reasonably large operating band. In this paper, simulation is used to show that a cavity may be retuned in response to changes in geometry (size) and to changes in the properties of a loading material while maintaining a high-cavity . Measurements of a prototype cavity are used to investigate the potential for cavity tuning under laboratory conditions and show that the cavity may be successfully retuned upon introduction of a material load. II. CAVITY SIMULATIONS Simulations were performed using the Numerical Electromagnetics Code (NEC4) [15] to investigate the potential for

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cavity tunability using a GA optimizer. The goals were to determine whether a cavity may be retuned to an initial resonance frequency when its geometry is altered and to see if a cavity may be retuned when the property of a loading material is changed. It is important to note that, for self-structuring systems such as antennas or resonators, the goal of the simulations is not to accurately predict the response of a working device at some particular state. This would be very difficult due to problems with modeling control wires, switches, or contacts. Instead, simulations are used to determine first the feasibility of the concept and then to explore the statistical properties of the switch states. It has been found that the statistics of appropriately designed simplified system models accurately predict the performance of a constructed device, as long as the number of states is large, that is, if a fraction of switch states results in a simplified model meeting a specified performance criterion, then a similar fraction of switch states for an actual device meets the same criterion, even if the states themselves do not correlate individually [12]. To determine the properties of the actual device for a given switch state, it is necessary to perform an appropriate measurement. A. Cavity Model A cubical perfectly conducting cavity of side 0.3 m was modeled in NEC4 as a wire grid using the equal area rule [16]. To produce a finite and to simulate the presence of a loading material, a wire of radius 0.5 mm and length of 5 mm was placed 20 mm, 20 mm, parallel to the -axis and centered at 15 mm. The wire was distributively loaded by 200 ; the value of this loading may be altered to investigate the tuning capabilities of the cavity. It would have been preferable to model a lossy dielectric load, but this is not possible with NEC4. Thus, the loaded wire is considered to be an ersatz material. NEC4 was chosen to perform the simulations because of the numerical Green’s function (NGF) option, which is not available with other computational packages such as FEKO or High Frequency Software Simulator (HFSS). The NGF enables the user to model a specific structure and save the interaction matrix to a file. Additions to the structure then require computation only of the new interactions. If the additions are minor, as when introducing a simplified model of a switch, the vast majority of the interactions do not need to be recomputed. This is particularly useful during an optimization where the simulation must be performed repeatedly, but only the states of a number of switches are changed with each run. In the case of the tunable cavity, the cavity structure remains unchanged and only the switches on the tuning structure are updated with each iteration. A tuning structure was introduced into the cavity to provide the desired perturbation of the cavity fields. The structure consists of a set of 14 identical vertical wires interconnected at their ends by 22 horizontal wires. The vertical wires, each of length 4 cm and radius 0.5 mm, are attached to the inner top wall of the cavity through controllable switches, modeled as segment (for an open loads of either 0.1 (for a closed switch) or 10 switch). These wires perturb the electric field of the fundamental cavity mode. The horizontal wires, also of radius 0.5 mm, perturb the magnetic field of the fundamental mode and contain an additional 12 switches. Adding the horizontal wires allows the

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Fig. 1. Tunable microwave resonator showing inserted tuning structure.

length of the vertical wires to be reduced, providing a compact tuning structure with more usable cavity space. The layout of the tuning structure is chosen with reference to [13] and [14], where it is shown that the largest effect on the resmode is achieved onance frequency of the fundamental by placing perturbing elements at points of strongest electric field. Therefore, the tuning structure is placed in the middle of the inner top wall of the cavity, as shown in Fig. 1. The choice of wire radius for the tuning structure depends on the intended application of the tunable cavity. Thicker wires have a much stronger effect on the resonant frequency and provide a larger frequency shift compared with thinner wires. However, for applications where finer frequency adjustments are needed, it is necessary to use either thinner or shorter tuning wires to provide smaller individual perturbations. With a large number of thin tuning wires, a wide tuning range can be obtained while maintaining the capability of providing small frequency shifts. A potential issue related to the use of thin wires is the possibility of breakdown for high-power applications. In this case, an additional structure could be added to prevent arcing, while maintaining the tunability provided by the tuning structure. -mode resonant The empty cavity has a fundamental frequency of 707.00 MHz. The cavity is fed using a wire probe of length 4 cm and radius 0.5 mm located in the center of the bottom wall. The addition of the feeding probe and the ersatz material shifts the resonant frequency to 704.04 MHz and produces a return loss of 9.74 dB (with respect to 50 ) and . The addition of the an unloaded quality factor of tuning structure with all switches in the “on” state causes a shift of the resonant frequency to 659.20 MHz. By turning all 26 switches off, the resonant frequency of the cavity is shifted up to 689.00 MHz. Thus, the anticipated minimum tuning range of the cavity is 659.20–689.00 MHz. B. Simulation Results The tunable resonator concept was investigated by considering two different questions. First, is it possible to optimize the cavity to resonate at any desired frequency within a reasonable band while maintaining favorable performance (return loss and quality factor)? To address this question, six arbitrary frequencies were selected within a chosen band, and the cavity was optimized for high return loss at each frequency. Second, can the resonant frequency of the cavity be held fixed when environmental conditions change? To answer the second question, three

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TABLE I RETURN LOSS AND UNLOADED QUALITY FACTOR FOR THE SIMULATED CAVITY AT EACH OF THE OPTIMIZED FREQUENCIES

Fig. 2. Return loss for the cavity optimized for various resonant frequencies.

different examples of cavity perturbation leading to a change in resonant frequency were investigated. In the first example, it is assumed that the overall volume of the cavity increases by 2.5%. In the second example, the overall volume of the cavity is reduced by 2.5%. The last example considers a shift in resonant frequency due to changes in the characteristics of the ersatz material placed inside the cavity. To optimize the configuration of the switches for the desired operational criteria, a GA optimization tool called GA-NEC [17] was used. In each of the simulations discussed here, GA-NEC was configured for 50 generations with a population size of 80, a crossover probability of 0.7, and a mutation probability of 0.3. The fitness function of the genetic algorithm ) at was designed to maximize the return loss (minimize the feed probe relative to a 50- feed system. The genetic algorithm was terminated before the 50 generations were completed if a return loss of at least 20 dB was achieved. 1) Tunability Test: As a simple verification of cavity tunability, five arbitrary frequencies were selected within the anticipated tunability range of 659.20–689.00 MHz, and a frequency of 695.00 MHz was selected outside of the range to investigate the tunability of the cavity beyond the predicted frequency range. The cavity was optimized for high return loss at each of these frequencies. Once an acceptable return loss was found, the configuration of the switches that produced the highest return loss was saved as the “best” switch state for that specific frequency. (Note that other states may exist that give better performance, but were not located by the GA before it was terminated). Using this best switch state, a frequency sweep of the cavity return loss was performed to determine the resonance curve. Fig. 2 shows a plot of the frequency sweep at the best switch state found for each of the six chosen optimization frequencies. The switch configurations for the five frequencies within the predicted tunability range produce a return loss of at least 23 dB, with the highest return loss of 46.56 dB obtained at 676.00 MHz. Optimization at the frequency point selected outside of the predicted tunability range produced a return loss of 11.32 dB, attesting to the capabilities of the cavity to be tuned beyond the predicted frequency range. The values of unloaded

Fig. 3. Tunable cavity response to a volume increase of 2.5%.

cavity computed at the best switch configurations are shown in Table I, along with the return loss. A high-cavity is obtained at each of the six frequencies, suggesting the ability of the tunable cavity to find a desirable operating configuration at any frequency within the operating band. Note that no attempt was made to optimize both return loss and cavity simultaneously. While this could certainly be done, it was found that good return loss was always accompanied by high cavity , and so simultaneous optimization of both was not required. 2) Tunability in Response to Cavity Perturbations: The ability of the cavity to maintain a fixed resonant frequency under changing environmental conditions was investigated by considering three examples of perturbation. In each case the desired operating frequency was chosen to be 680.00 MHz, and the best switch state found earlier for that frequency was set. (Recall that at 680.00 MHz, the original optimized cavity has a return loss of 45.82 dB). The cavity was then perturbed, and retuning was achieved by maximizing the return loss at 680.00 MHz. In the first example, the cavity volume was increased by 2.5% (modeling a possible thermal expansion), resulting in a downward shift of the resonant frequency to 664.48 MHz and producing a very unfavorable return loss of 0.001 dB at the desired operating frequency of 680.00 MHz. GA-NEC was then used to tune the cavity back to 680.00 MHz by maximizing the return loss. As shown in Fig. 3, the cavity was successfully tuned back to the operating frequency of 680.00 MHz while achieving a return loss of 21.60 dB and an unloaded of 21 000, despite the volume increase. In the second example, the cavity volume was reduced by 2.5%, causing an upward shift of the resonant frequency to

OUEDRAOGO et al.: AUTOMATICALLY TUNABLE CAVITY RESONATOR SYSTEM

Fig. 4. Tunable cavity response to a volume decrease of 2.5%.

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Fig. 6. Electric field pattern in the cavity center with the cavity opti15 cm, z 15 cm, and mized for two different loading scenarios. y f 680.00 MHz.

=

=

=

Fig. 5. Tunable cavity response to a change in the characteristics of the loading material. Fig. 7. Electric field pattern near the tuning structure for the cavity optimized 15 cm and z at 680 and 669 MHz. y 27 cm.

=

695.10 MHz. Retuning the cavity to 680.00 MHz produces the results shown in Fig. 4, where it can be seen that a favorable of 19 000 were return loss of 23.68 dB and an unloaded achieved. In the final example, the resonant frequency of the cavity was shifted by changing the characteristics of the ersatz material. The distributed load of the loading wire was reduced from 200 20.0 mm, to 68 and the load was displaced to the location 20.0 mm, 10.0 mm, causing a shift in the resonance frequency to 677.95 MHz. Retuning the cavity back to the desired operating frequency then produced the results shown in Fig. 5. In this case, a return loss of 28.78 dB and an unloaded of 14 000 were achieved. An important property of the self-tuning resonator is that the fields in the region unoccupied by the tuning structure are esmode of the empty sentially those of the fundamental cavity. Thus, the majority of the cavity volume is available for use, and no modifications to compensate for field pattern perturbation are necessary. To demonstrate this, the -component of the simulated electric field is plotted in Fig. 6 as a function 15 cm, 15 cm (cavity center) of position, with

=

and 1 V applied to the input probe. The solid line is the field of the optimized cavity at 680.00 MHz with the impedance of the ersatz loading material set to 200 . The solid circles show the field after the material impedance is changed to 68 , and the dashed–dotted curve shows the field after the cavity with the altered loading has been tuned back to resonance. In each case, the field patterns are nearly identical to those of the fundamental mode. It is not surprising that the patterns of the fields in the vicinity of the tuning structure are altered significantly from those of the fundamental mode, since the purpose of the tuning structure is to perturb the fields so as to change the resonance properties of the cavity. Plots of the -component of the simulated electric field for the cavity optimized at 669 MHz and 680 MHz are 15 cm shown in Fig. 7 as a function of position. Here 27 cm. It can be seen that the electric field is greatly and perturbed for both situations and that, since the switch settings are quite different in the two cases, the shapes of the perturbed electric field patterns are also quite different.

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TABLE II TUNING WIRE LENGTHS

Fig. 8. Layout of the placement of the tuning wires on the circuit board.

III. PROTOTYPE AND EXPERIMENT A prototype similar to that used in the NEC4 simulations was constructed to verify the ability of the cavity to be tuned under experimental conditions and to investigate the ability of the cavity to respond to actual material perturbations. A cubical cavity of side length 27.1 cm was built from aluminum plates of thickness 1.5 mm. An aluminum monopole of length 4 cm and radius 0.5 mm was placed at the center of the bottom wall of the cavity to serve as a feeding probe. The top of the cavity was left open, to be sealed by a plate containing the tuning structure. The tuning structure was constructed using 26 conducting wires of radius 0.5 mm and 26 COTO single-inline-package reed relay switches (series 9011–05–10). Because the switches have a 500- coil resistance, it was found that placing them inside the cavity dramatically reduces the cavity . Thus, the tuning structure was constructed with a different geometry than used in the simulations. All 26 switches were placed on the top layer of a double-sided FR4-epoxy copper-clad circuit board with sides 27.1 cm 27.1 cm, and the conducting wires were extended into the cavity and then bent 90 (along the -axis of Fig. 8) such that the final structure was composed of parallel L-shaped wires with the lengths described in Table II. The wires were passed into the cavity through cylindrical insulators, which were inserted into holes of radius 0.7 mm. The upper end of each wire was connected to one terminal of a switch while the other terminal was soldered to the top layer of the circuit board. The coil pins of the switches were connected to a control board that was then connected to a computer using a 52-line ribbon cable. The control board serves as an interface between the tuning structure and the computer, and is needed to provide the necessary current to drive the switches. A diagram of the measurement setup is shown in Fig. 9. A switch is turned on (closed state) by applying 5 V at its terminals, while a potential of 0 V creates an open state. Similar to the simulation, closing a switch connects the corresponding wire to the top wall of the cavity while opening the switch disconnects the wire from the cavity wall. As mentioned previously, the purpose of the original set of simulations was to study the feasibility of the self-tuning cavity

Fig. 9. Setup used to measure the properties of the prototype cavity.

concept. Although the tuning structures of the prototype and the simulated cavities are different, both structures provide sufficient diversity in the number of possible configurations to allow tuning across a significant band of frequencies. A quick simulation can be performed to verify the feasibility of the tuning structure used in the prototype, but a full exploration of the properties of the prototype is more appropriately done in the laboratory. A NEC4 simulation was performed by replacing the tuning structure of the original simulations with the structure used in the prototype. Recall that the fundamental resonance of the empty simulated cavity occurs at 707.00 MHz. When the tuning structure is inserted and the cavity is optimized to resonate at 680 MHz, a return loss of 36.6 dB is obtained, and the resonance curve shown in Fig. 10 is produced. Also shown in this figure is the resonance curve produced when the

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Fig. 10. Simulated return loss of a cavity with the tuning structure of the prototype, compared with the return loss of a cavity with the original tuning structure.

Fig. 11. Results of the tunability study of the prototype cavity for large-frequency increments.

cavity is tuned to 680 MHz using the original tuning structure. It can be seen from the plot that, for this example, the tuning structure of the prototype has a tuning capability equal to that of the structure used in the original simulations. Experimental results demonstrate that this capability extends across the band predicted by the original simulations. The GA used for the optimization is relatively standard. For each frequency of interest, a population of 200 different switch configurations is first selected randomly. Each switch configuration is used to set the states of the switches on the tuning structure and the fitness of each switch configuration is evalu. To ated using the scalar voltage measured at the receiver, calibrate the measurement, the cavity is replaced by a short cir. The cuit, which has a known reflection coefficient of fitness function is defined as

The resonant frequency of the closed cavity consisting of the aluminum box and copper top was first measured with no tuning structure present and was found to be 779.40 MHz. The return loss at this frequency was 9.52 dB and the measured quality was 890. The external of the empty cavity, , factor is estimated by computing the theoretical empty-cavity using modal analysis as presented in [3]. In this case, the value of accounts for the external measurement 915 obtained for accounts both for the system. In subsequent experiments, external measurement system and for additional losses due to the tuning structure and the test materials. Replacing the top of the cavity with the tuning structure and turning all of the switches off produced a resonant frequency of 746.85 MHz with a return loss of 3.02 dB. Turning all of the switches on shifted the resonant frequency down to 707.60 MHz with a return loss of 16.78 dB. It is thus anticipated that the prototype cavity should provide an approximate tuning range of 707–746 MHz. The ability of the prototype to be tuned to a desired frequency and its ability to maintain the resonant frequency under material perturbations are investigated next.

(1)

where is the reference short-circuit voltage. Minimizing this fitness function is thus equivalent to maximizing the return loss of the cavity. Upon completion of the evaluation of all the fitnesses of all switch configurations in the initial population, a selection of the switch configurations with the lowest fitness values is performed. The lowest 20% are selected, and a simple two-point crossover and single bit mutation are performed on the selected 20% until a new population is generated. The new population represents the next generation to be evaluated. This process is repeated until the desired fitness value is obtained or the maximum number of generations (set to 100 in the experiment) is reached. After the optimization process, the switch configuration with the lowest fitness is saved as the best among those evaluated for that particular frequency. The best switch configuration is then used to set the states of the switches and a frequency sweep of the cavity return loss is performed to determine the resonance curve of the prototype cavity. This process is repeated for every frequency of optimization.

A. Tunability Test The ability of the cavity to be tuned to desired frequencies within the range of 707–746 MHz was evaluated by optimizing the prototype at 9 different frequency points. Tunability was evaluated at a large-frequency increment of 5.00 MHz from 720.00 to 740.00 MHz and at a small-frequency increment of 1.00 MHz from 724.00 to 727.00 MHz. Figs. 11 and 12 show plots of the return loss at the best switch state found for each of the frequencies of optimization. It is seen that each of the switch configurations produced a return loss of 40 dB or higher with the exception of the optimization performed at 740.00 MHz where a return loss of 28.04 dB was obtained. The highest return loss of 58.73 dB was obtained at 727.00 MHz. Optimization of the prototype above 745 MHz returned no satisfactory result, but a very high return loss of 62.42 dB was obtained at 705.00 MHz (as shown in Fig. 11). This frequency is lower than the resonance frequency of 707.60 MHz with all switches closed,

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Fig. 12. Results of tunability study of the prototype cavity for small-frequency increments.

Fig. 13. Prototype cavity response to material perturbations. nylon-1 and nylon-2 designate the two nylon samples used to perturb the cavity.

TABLE III , AND RETURN LOSS OF THE PROTOTYPE MEASURED , ESTIMATED CAVITY AT EACH OF THE OPTIMIZED FREQUENCIES

To investigate the ability of the cavity to respond to a larger material perturbation, the experiment was repeated using a nylon cylinder of length 9.5 cm and radius 3.5 cm (designated nylon-2 in Fig. 13). It can be seen in Fig. 13 that, as expected, the larger material caused a larger shift of the resonant frequency, from 725.00 to 718.02 MHz with a return loss of 20.98 of 300. Through optimization, the cavity dB and a cavity was successfully tuned back to 725 MHz with the highest return of 9600 occurring at 725.01 MHz. loss of 49.02 dB and a It is important to note that, for both the simulations and measurements, at every frequency of optimization the GA found several switch configurations with satisfactory return . The switch configuration loss but different values of with the highest return loss was selected for all of the cases mentioned above. These do not necessarily represent the best configurations of the tunable cavity. For the prototype, a GA with a population of 200 individuals and 100 generations examines at most 20 000 out of the total 67 million possible switch configurations. Thus, only a small fraction (0.059%) of the total possible switch states were examined. Performing further analysis might reveal states with even better cavity performance.

Q

Q

implying that tunability is possible below the lower end of the predicted range. and For each frequency of optimization, the measured are shown in Table III. Cavity values as estimated high as (compared with a theoretical unloaded of 32 000) are observed, attesting to the capability of the cavity to be tuned to arbitrary frequencies while maintaining desirable operational criteria. B. Tunability in Response to Material Perturbations A second set of experiments was performed on the cavity to determine its ability to maintain a desired resonance frequency in the presence of material perturbations. An initial resonant frequency of 725.00 MHz was selected for this experiment. Recall that at 725.00 MHz the optimized cavity has a return loss of 55.55 dB. With the switches kept at this configuration, a nylon cylinder (designated nylon-1 in Fig. 13) of length 4.5 cm and radius 3.5 cm was placed on the bottom of the cavity and cen6.7 cm and 6.7 cm. The presence tered at location of the material caused the resonant frequency to be shifted from 725.00 to 723.03 MHz, with a measured return loss of 31.26 dB of 900. Keeping the material location fixed, the and a cavity cavity was optimized for maximum return loss at the initial frequency of 725.00 MHz. The result of the tuning process, shown in Fig. 13, demonstrates that the cavity was successfully retuned to 725 MHz with the highest return loss of 54.30 dB and a of 12 000 occurring at 725.02 MHz.

IV. SYSTEM DESIGN CONSIDERATIONS Several key factors and issues have been considered in the design and implementation of the prototype self-tuning cavity. These are discussed in Sections IV-A–C. A. Tuning Structure Design and Choice of Search Algorithm The required number of tuning elements and switches depends on the desired performance of the tunable cavity. For instance, to achieve both a broad tuning range and the capability to tune the resonant frequency with small frequency steps within the tuning range, it is necessary to have a large number of switches to provide a sufficient diversity of states. As the number of switches, , is increased, the total number of switch , and it quickly becomes configurations is increased as impossible to obtain acceptable results using a simple random

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search. For any practical implementation, it is thus necessary to employ an efficient search algorithm capable of finding good switch states within a reasonable number of iterations. The optimizer used in the present study was chosen based on extensive studies of the self-structuring antenna presented in [7]–[12]. It is shown there that nature-based search algorithms such as ant-colony optimization, simulated annealing algorithms, and GAs are well suited for the type of binary problem present in self-structuring antenna optimization. Since the self-tuning cavity is based on similar operating principles, a nature-based optimizer was chosen for cavity optimization. Note that, since the optimization is binary (a switch is either on or off), standard search algorithms that use derivative information, such as gradient methods, are difficult to implement. The GA was chosen because of its inherent ease of implementation and its familiarity to the authors and to the research community. Other search algorithms may provide improved performance in terms of the number of switch states examined; identifying such an optimizer is left to future research. B. Time Required for Optimization The time required to find an acceptable state depends on four main factors: the number of states examined, the time to set an individual state, the time to communicate information about the performance of a particular state to the algorithm, and the time for the algorithm to evaluate the returned information and select a new set of states to examine. As discussed above, the total number of states examined depends on the efficiency of the algorithm. The time to set an individual state is determined by the switch settling time. The existing prototype uses simple electromechanical switches with a settling time of 5 ms. Much faster switches, such as those described in [18] are available, with settling times as low as 11 s. The time needed for the algorithm to determine the next set of switch states is insignificant compared to other considerations. In the existing experiment, the time for each iteration is dominated by the communication time between the receiver and the controller, which takes place through a general-purpose interface bus and requires approximately 200 ms. This time can be improved dramatically by using more rapid communication links. In the case of self-structuring antenna prototypes this time has been reduced below 5 ms. In cases where the response of the cavity to changes is predictable (such as a change in the operating frequency of a cavity with no material loading), appropriate states may be stored in a lookup table. In this case, retuning is nearly instantaneous, since no search is required. However, this approach is not appropriate for those situations, such as the curing of materials, where changes to the cavity environment are unpredictable. However, if the changes occur in a continuous manner, retuning can be accomplished very efficiently, since the results from previous optimizations can be used as starting points for subsequent optimizations. C. Construction Issues Many switch configurations produce asymmetries in the cavity geometry that have the potential to produce parasitic

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resonances. However, in both the simulations and the experiments, no excitation of such resonances was observed with the optimized cavity. The prototype was fabricated by soldering switches and wires to the outer top wall of the cavity. Radiation by the high-frequency currents flowing on the switch wires is a potential source of interference with neighboring instrumentation. Such radiation can be easily mitigated by placing a shielding enclosure over the wires and switches. Radiation by control signals on cabling connected to the switches has been measured and found not to be a significant issue. Addition of a ferrite choke can completely eliminate stray fields due to control signals. V. CONCLUSION A tunable cavity resonator that has the ability to adjust its resonance properties in response to changes in its operating environment is proposed. Simulation and measurement results demonstrate that the resonant frequency of the cavity can be tuned over a 5% range while maintaining a high return loss and a high-cavity . It is important to note that the tuning range might not be limited to 5%. Additional switches and tuning wires could be added to further increase the number of possible states and thus expand the search space. Additional or longer wires should produce a larger perturbation and thus expand the tuning range. Note also that only the return loss was optimized in this work and that simultaneous optimization of both return loss and cavity is left for future work. ACKNOWLEDGMENT The authors would like to thank to Dr. J. Ross for providing the use of the program GA-NEC. REFERENCES [1] G. R. Jones, J. C. Cacheris, and C. A. Morrison, “Magnetic tuning of resonant cavities and wideband frequency modulation of klystrons,” Proc. IRE, vol. 44, no. 10, pp. 1431–1438, Oct. 1956. [2] L. M. Earley, H. A. Thiessen, R. Carlini, and J. Potter, “A high- ferrite tuned cavity,” IEEE Trans. Nucl. Sci., vol. NS-30, no. 4, pp. 3460–3462, Aug. 1983. [3] R. F. Harrington, Time-Harmonic Electromagnetic fields. New York: IEEE Press, 2001. [4] D. M. Pozar, Microwave Engineering, 3rd ed. New York: Wiley, 2005. [5] J. Papapolymerou, J. C. Cheng, J. East, and L. P. B. Katehi, “A micromachined high-band resonator,” IEEE Microw. Guided Wave Lett., vol. 7, no. 6, pp. 168–170, Jun. 1997. [6] C. M. Coleman, E. J. Rothwell, J. E. Ross, and L. L. Nagy, “Self-structuring antennas,” IEEE Antennas Propag. Mag., vol. 44, no. 3, pp. 11–22, Jun. 2002. [7] C. M. Coleman, E. J. Rothwell, and J. E. Ross, “Self-structuring antenna,” in Proc. IEEE AP-S Int. Symp., Jul. 2000, vol. 3, pp. 1256–1259. [8] C. M. Coleman, E. J. Rothwell, J. E. Ross, B. T. Perry, and B. F. Basch, “Self-structuring antenna for television reception,” in Proc. IEEE AP-S Int. Symp., Jul. 2001, vol. 1, pp. 162–165. [9] C. M. Coleman, E. J. Rothwell, and J. E. Ross, “Investigation of simulated annealing, ant-colony optimization, and genetic algorithm for self-structuring antenna,” IEEE Antennas Propag. Mag., vol. 52, no. 4, pp. 1007–1014, Apr. 2004. [10] J. E. Ross, E. J. Rothwell, and S. Preschutti, “A complimentary selfstructuring antenna for use in a vehicle environment,” in IEEE AP-S Int. Symp., Jun. 2004, vol. 3, pp. 2321–2324.

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[11] B. T. Perry, E. J. Rothwell, J. E. Ross, and L. L. Nagy, “Self-structuring antenna concept for FM-band automotive backlight antenna design,” in Proc. IEEE AP-S Int. Symp., 2005, vol. 1B, pp. 92–95. [12] B. T. Perry, E. J. Rothwell, and L. L. Nagy, “Analysis of switch failures in a self-structuring antenna system,” IEEE Antennas Propag. Mag., vol. 4, pp. 68–70, 2005. [13] R. O. Ouedraogo and E. J. Rothwell, “A self-tuning cavity,” in Proc. IEEE Int. Symp. Antennas Propag. URSI Radio Sci., San Diego, CA, Jul. 5–11, 2008, pp. 1–4. [14] R. O. Ouedraogo, E. J. Rothwell, S. Y. Chen, and B. Greetis, “Performance analysis of self tuning cavity resonators,” in Proc. IEEE Int. Symp. Antennas Propag. URSI Radio Sci., Charleston, SC, Jun. 1–5, 2009. [15] G. Burke and A. Poggio, “Numerical electromagnetic code-method of moments,” Lawrence Livermore Nat. Lab., Livermore, CA, Rep. UCID-18834, 1981. [16] A. C. Ludwig, “Wire grid modeling of surfaces,” IEEE Trans. Antennas Propag., vol. AP-35, no. 9, pp. 1045–1048, Sep. 1987. [17] GA-Suite With NEC Analysis Version 7.0 John Ross & Assoc., 2010 [Online]. Available: http://www.johnross.com/ [18] SPDT Ultra-CMOS RF Switch Peregrine Semiconductor,, 2010 [Online]. Available: http://www.psemi.com/content/products/wireless/wireless.html

Edward J. Rothwell (S’84–M’85–SM’92–F’05) was born in Grand Rapids, MI, on September 8, 1957. He received the B.S. degree in electrical engineering from Michigan Technological University, Houghton, in 1979, the M.S. degree in electrical engineering and the Electrical Engineer degree from Stanford University, Stanford, CA, in 1980 and 1982, respectively, and the Ph.D. degree in electrical engineering from Michigan State University (MSU), East Lansing, in 1985. He was with Raytheon Company, Microwave and Power Tube Division, Waltham, MA, from 1979 to 1982, where he was involved with low-power traveling wave tubes, and with MIT Lincoln Laboratory, Lexington, MA, in 1985. He has been with MSU since 1985, as an Assistant Professor of Electrical Engineering from 1985 to 1990, as an Associate Professor from 1990 to 1998 , and as a Professor since 1998. Dr. Rothwell was the recipient of the John D. Withrow Award for Teaching Excellence from the College of Engineering at MSU in 1991, 1996, and 2006, the Withrow Distinguished Scholar Award in 2007, and the MSU Alumni Club of Mid Michigan Quality in Undergraduate Teaching Award in 2003 and in 2005 he received the Southeast Michigan IEEE Section Award for Most Outstanding Professional. He held the Dean’s Distinguished Fellowship at MSU during his doctoral work.

Shih-Yuan Chen (M’05) was born in Changhua, Taiwan, in May 1978. He received the B.S. degree in electrical engineering and the M.S. and Ph.D. degrees in communication engineering from National Taiwan University, Taipei, Taiwan, in 2000, 2002, and 2005, respectively. From 2005 to 2006, he was a Postdoctoral Research Fellow with the Graduate Institute of Communication Engineering, National Taiwan University, working on the 60-GHz switched-beam circularly polarized antenna module. In July 2006, he joined the faculty of the Department of Electrical Engineering and Graduate Institute of Communication Engineering, National Taiwan University, and was an Assistant Professor. From August 2008 to July 2009, he visited the Department of Electrical and Computer Engineering, Michigan State University, East Lansing. His current research interests include the design and analysis of slot antennas/arrays, dielectric lens antennas, reconfigurable antennas, near-field communication systems, and metamaterial-inspired antennas.

Raoul O. Ouedraogo (S’08) was born in Ouagadougou, Burkina Faso, in 1982. He received the B.Sc. degree from Southern Illinois University, Carbondale, IL, in 2006, the M.Sc. degree from Michigan State University, East Lansing, in 2008, and is currently working toward the Ph.D. degree at Michigan State University, all in electrical engineering. His current research interests include metamaterials, small antennas, self-structuring devices, electromagnetic radiation, and scattering.

Brian J. Greetis (S’07) was born in Arlington Heights, IL, on April 30, 1989. He is currently working toward the B.S. degree in electrical engineering at Michigan State University (MSU), East Lansing. In the summers of 2007, 2008, and 2009, he was a summer Intern with the Mobile Devices Division, Motorola, Libertyville, IL, most recently involved with the RF hardware team. His main research interest focuses on self-structuring antennas. Mr. Greetis is a member of the Honors College at MSU.

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Circular Waveguide With DB-Boundary Conditions Ismo V. Lindell, Life Fellow, IEEE, and Ari Sihvola, Fellow, IEEE

Abstract—A set of boundary conditions requiring vanishing of the normal components of the D and B vectors at the boundary surface was introduced recently and labeled as the DB-boundary conditions. Basic properties of the waveguide defined by circular cylindrical DB boundary are studied in this paper. It is shown that the circularly symmetric TE and TM modes coincide with those of the respective PEC and PMC waveguides. More general waveguide modes can be split in two groups, self-dual and anti-self dual modes with respect to a duality transformation and their dispersion properties differ from those of a PEC waveguide as there may exist backward-wave modes for certain ranges of frequencies. Index Terms—Boundary conditions, electromagnetic theory, waveguides.

medium with permittivity and permeability , (2) is equivalent with the conditions (3) In [8], the DB-boundary conditions (2) were introduced as follows from the interface conditions for a half space of a certain exotic material labeled as uniaxial IB (or skewon-axion) medium. Another simpler realization for such a DB boundary can be obtained in terms of the interface of a uniaxially anisotropic medium defined by the permittivity and permeability dyadics [7], [8]

I. INTRODUCTION

(4)

E

LECTROMAGNETIC field problems are generally defined by differential equations and boundary conditions. Considering a boundary surface with unit normal vector , typical boundary conditions impose two scalar restrictions for the electromagnetic field vectors tangential to the boundary surface. We list here a few such conditions [1]–[3]. . • The PEC condition . • The PMC condition . • The PEMC condition and • The soft-and-hard surface condition for . All of the previous boundary conditions are special cases of impedance conditions of the form [4], [5] (1) for some surface impedance dyadic , which may have infinite components. Another set of boundary conditions was recently introduced in [6]–[8] in terms of the vectors and as (2) and labeled as DB boundary conditions for brevity.1 The corvectors depend on the responding conditions for the and medium in front of the boundary. Assuming a simple isotropic Manuscript received January 31, 2009; revised May 19, 2009. First published March 29, 2010; current version published April 14, 2010. This work was supported in part by the Academy of Finland. The authors are with the Department of Radio Science and Engineering, Helsinki University of Technology, Espoo 09 4511, Finland (e-mail: [email protected])). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042638 1It was more recently found that the conditions (2) were introduced by Rumsey already 50 years ago [23].

with the transverse unit dyadic defined by (5) In fact, because of continuity of the normal components of and , the conditions (2) are obtained at the interface for vanwhile the transverse ishing axial parameters have no practical significance when the limits parameters are attained. Such a medium has been labeled as zero axial parameter (ZAP) medium [10]. Materials with zero-valued parameters have been studied lately, and their realization with layers of metamaterials with positive and negative values have been suggested [11], [12]. Plane-wave reflection from a planar DB boundary was analyzed in [8], and an image principle was formulated in [9] for a source above a DB plane. It was shown that the DB plane could be replaced by a PEC plane for fields polarized TE with respect direction and, correspondingly, by PMC plane to the normal for TM fields. Thus, the analysis of planar DB boundaries can be reduced to that of PEC and PMC boundaries. In this paper, we consider the circular waveguide defined by the DB-boundary conditions. It was noted in [9] that a parallel-plane waveguide with DB-boundary conditions on each plane supports modes consisting of plane waves reflecting from both planes. Splitting the modes in two groups, TE and TM with respect to the normal of both planes, the TE modes turn out to be the same as those corresponding to two PEC planes while the TM modes correspond to two PMC planes. The same property has been shown to be valid for the spherical resonator with DB-boundary for modes TE and TM with respect to the radial direction [13]. In the present paper we study whether the same property is valid also for the circular waveguide with DB boundary. II. CIRCULAR DB WAVEGUIDE As an example of electromagnetic DB-boundary structures, let us consider a waveguide bounded by the circular cylinder

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of radius centered at the -axis. Because of the geometry, the modal fields can be introduced in the analytic form

Substituting these in the Maxwell equations

component expressions of the

(6) (16) and , where is a positive or negative integer. For show respective left- and right-handed the field vectors rotation when looking into the direction of , while for the field is rotationally invariant.

(17) we obtain

A. Field Equations The curl of any vector functions be represented as

(18)

of the above form can

(19) (7)

and are functions of the radial where the components coordinate . Because the field vectors satisfy the Helmholtz equations (8)

Here, the prime denotes differentiation with respect to the argu. ment B. Dispersion Equation Let us now require that the fields satisfy the DB-boundary , at , which can be expressed conditions as

the -components satisfy the same. Inserting (6) leads to the equations (20) (21) (9) For (10) which have the form of the Bessel differential equation. Thus, the solutions finite at are

and

, these lead to the dispersion equations (22)

The double sign corresponds to two sets of modal solutions. Assuming positive values for and , from

(11) (23) for some amplitude coefficients related to the propagation factor by

. The wavenumber

is

(12) so where the branch of the square root is such that that the amplitude of the wave does not grow in the direction of propagation. Considering the components of the Maxwell equations (13) we obtain

(14) (15)

we can see that the ‘ ’ set of solutions for coincides with the and vice versa. Also, a ‘ ’ solution ‘ ’ set of solutions for . for corresponds to a ‘ ’ solution for corresponds to the The rotationally symmetric case values simple dispersion equation with fixed (24) (25) The propagation coefficients are obtained from (12). In the rotationally symmetric case, can be interpreted as the cutoff . wavenumber since the wave decays exponentially for , the values obtained from (22) are not fixed For numbers but functions of , i.e., the frequency and parameters of the medium inside the guide. Thus, they cannot be called cutoff wavenumbers. In fact, propagation in the waveguide is . also possible for

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To expand the condition (22), we can apply known rules for the Bessel functions (26) (27) in terms of which the dispersion condition (22) can be expressed in the form (28) Invoking (12), (28) can be further expressed as the relation , given by

(29) when assuming that the square root has a positive value when real. as a function of is independent of the sign of while the sign of depends on the sign of as was noted above. and , the Considering the basic modes with values for which the square root in (29) is lowest range of , real lies between the first zero of . and the first zero of , we From (22), we can see that, at whence the modes do not propagate. This have coincides with the cutoff of the lowest rotationally symmetric mode (see Fig. 1). To consider propagation close to , let us restrict to the solutions with the ‘ ’ sign in (22). For (30)

Fig. 1. Dispersion diagrams a(ka) for the three basic modes in a circular waveguide of radius a corresponding to n = 0 and n = 1 with the asymptotic curves of the latter (the dotted lines). The graphs denoted by n = 1 and n = 1 correspond to the self-dual mode ; . For the other solution ; , the n = 1 and n = 1 graphs must be interchanged. Backward-wave regions can be spotted for n = 1 and n = 1 in the region 3:112 < ka < 3:832.

6

0

E H 0

E H

0

Waves with oppositely directed phase and group velocities have been called backward waves in the past [14], [15], and they have been applied in the design of microwave oscillators and amplifiers [16]. Usually, backward waves have been associated with dispersive media or periodic structures. In the present case, however, the DB boundary in its ideal form is nondispersive, and there is no periodicity in the waveguide.

in the first-order approximation, we have

III. MODAL FIELDS A.

(31) Expanding

Modes

For the rotationally symmetric modes corresponding to the dispersion equation (24), the field amplitudes and can be chosen independently. The basic linearly independent solutions and . The fields in the are obtained by choosing former case have the form

(32) (35) (22) can be approximated by (36)

(33) , or the where is now 1 or 1. Thus, for , while, for dispersion curve has a positive slope at , and the slope is negative. This fact helps and us to distinguish the two dispersion curves from one another in Fig. 1. In fact, for , the upper curve corresponds to and the lower curve to set of modal solutions the opposite is the case. while for It is interesting to note that, in the region , we have modes with opposite phase and group velocities. , for and , the group velocity Close to has the value (34)

and they can be labeled as TE case, the fields are of the form

or TE

modes. In the latter

(37) (38) and they can be labeled as TM or TM modes. Since for the same the TE and TM modes have the same propagation factor, any linear combinations of them are modes as well. One can note that the TE or TE modes satisfy the PEC at whence the rotationally symconditions metric TE modes of a circular PEC waveguide are also modes

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of the DB waveguide. Similarly, the TM modes of a PMC waveguide are also modes of the DB waveguide. It was previously shown that all resonance modes of a spherical DB resonator can be decomposed in two sets, those TEand TM-polarized with respect to the radial direction and they coincide with the TE and TM modes of the respective PEC and PMC resonators. In the case of the circular waveguide, however, modes polarized as TE and TM with respect to the radial direction do not form a complete set. The basic reason for this lies in the fact that the general fields cannot be derived from vector potentials which have only radial components, as is demonstrated in the Appendix. B.

in terms of which one of the two modal fields is invariant (selfdual) and the other one is anti-invariant (anti-self-dual) [5]. The DB boundary and the isotropic medium are invariant (self-dual) in both transformations. The modal electric fields transverse to the -axis can be expressed in the form

(47) or

Modes (48)

From (21), we can write the relation (39) The last form is due to the dispersion equation (22). Thus, there are two possible relations between the field amplitudes which can be denoted as (40) defining the and sets of modes in the DB waveguide. Let . us consider them simultaneously with the double sign From (11), the axial field components become

Because the solutions are real, the waveguide is lossless. This fact can be checked by forming the expression of the Poynting vector at the boundary of the guide. It will turn out that it has only a normal component with an imaginary value, which means that there is no power loss at the DB boundary for the waveguide modes. C. Modes

and

Let us now consider the basic modes corresponding to the and in more detail. The transverse index values can be field expressions for the two self-dual modes with obtained from (48) as

(41) The radial field components can be constructed from (18) and (19) and applying (26) and (27) as

(49) and for the two modes

as

(42) and, from (14) and (15), the angular field components become

(43) From (42) and the dispersion condition (28), we can verify that the modal fields really satisfy the DB-boundary conditions and . From the previous expressions, we conclude that the total modal fields satisfy the simple relations (44) for each . Fields satisfying conditions of the form (44) can be called self-dual because there exist two linear transformations

(45) (46)

(50) Equations (49) and (50) represent the two self-dual modal fields as a sum of two circularly polarized components of opposite where the axial handedness. In particular, at the axis component vanishes, the total fields are circularly polarized as (51) (52) To have an idea of the field patterns, let us choose which corresponds to four possible values: and for and and for , as can be seen from Fig. 1. Figs. 2 and 3 depict the real parts of the transverse electric for the two possible modes corresponding to field and . The imaginary parts have somewhat similar form but . For the magnetic field, the patterns are exactly rotated by similar to those of the electric field so that the real part of the magnetic field has the same pattern as the imaginary part of the electric field and vice versa.

LINDELL AND SIHVOLA: CIRCULAR WAVEGUIDE WITH DB-BOUNDARY CONDITIONS

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Comparing with (29), we can see that the latter points occur . The solutions to (53) exactly at the boundary and on the -axis for the yield respective cases of Figs. 2 and 3. The same results are obtained for the imaginary parts of the transverse fields but the positions . It is easy to check that, at these of the zeros are rotated by points of vanishing real and imaginary parts of the transverse fields, the corresponding real and imaginary parts of the axial fields also vanish. Comparing (53) and (43), one can see that at the whole cylindrical surface of radius . Thus, the effective boundary conditions (55)

E

Fig. 2. Field pattern of Re( ) corresponding to the parameter values n = 1; ka = 3:5; k a = 2:583, and a = 2:362 in a circular waveguide with DB boundary. The same pattern is obtained for Im( ).

0

H

are valid for the self-dual modes at the surface . Actually, the form of (55) equals that of a soft-and-hard waveguide [3], and the field patterns shown in Figs. 2 and 3 inside the cylinder are those of the HE mode in a corrugated waveguide [17]. D. Power Propagation Let us consider the axial component of the complex Poynting as follows: vector for the self-dual modes

(56) Inserting (49), we obtain

(57)

Fig. 3. Field pattern of Re(E ) corresponding to the parameter values n = 1; ka = 3:5k a = 3:483, and a = 00:346 in a circular waveguide with DB

H ).

boundary. The same pattern is obtained for Im(

There are four special points in each of the field patterns at which the real part of the transverse electric field vanishes. These points can be found from the expression (49) and the same . Two of the points are found also from (50) for the case points occur on the -axis (horizontal in Figs. 2 and 3) for satisfying (53) and two on the -axis for

satisfying (54)

For , the expressions are the same except that is replaced by . Since this expression is independent of the coordinate , the power density is rotationally symmetric. Because of the effective soft-and-hard conditions (55) satisfied by the modes, the . Poynting vector has only a component at the surface and modes the component is zero only For the at this surface and the DB boundary, whence the surface separates two regions of opposite directions of power flow in the guide. In the case of Fig. 2, the flow is mostly in one direction, while Fig. 3 shows a case with considerable flow in both directions, whence the net flow along the guide has a smaller value in this case. Thus, for these modes, the waveguide acts as two virtual concentric waveguides with no coupling through the . surface Since the power in these two virtual waveguides flows in opposite directions and the phase propagation is in the same direction, it follows that in one of the virtual guides phase and energy propagate in the same direction and in the other one in opposite directions. For example, in the case of Fig. 3, the power propparallel to the phase, while in the agates in the region it propagates in the opposite direction. Thus, region and the coaxial guide formed by a soft-and-hard surface supports a backward wave. While it is DB surface at known that backward waves exist in closed waveguides when partially filled by a dielectric rod, plasma, negative-parameter

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metamaterial, or periodic loading [18]–[20], this may be the first example of a waveguide with simple medium and no periodicity for the emergence of such an effect.

Inserting (58) and (59) into the Maxwell equations, one can see that they are satisfied if the potentials satisfy the equations

(60)

IV. CONCLUSION Boundary conditions requiring vanishing of the components and fields normal to the boundary were recently of introduced in [8] as arising at an interface of an exotic bi-anisotropic medium. Another less exotic possibility exists in terms of an interface of a uniaxially anisotropic medium. The conditions were subsequently labeled as DB-boundary conditions [6]. As a continuation to studies concerning plane-wave reflections from the planar DB boundary in [7], [9] the circular waveguide defined by the DB boundary was analyzed in this paper. It was shown that all circularly symmetric modes can be decomposed in TE and TM modes with respect to the radial direction and the DB boundary can be replaced by respective PEC and PMC boundaries. Because the more general modes cannot be split in TE and TM components, they were decomposed in parts invariant in duality transformations (self-dual modes modes). The dispersion characteristics of the of the DB waveguide are different from those of a PEC guide in that there is no clear cutoff. Also, there exist interesting regions with opposite group and phase velocities. The basic and can be split in two regions modal fields with fields satisfying soft-and hard conditions on the separating cylindrical surface. Thus, the waveguide can be separated by a soft-and-hard surface in two virtual waveguides with different directions of power propagation. Since backward-wave modes are normally associated with dispersive media, dielectric inclusions, negative-valued metamaterials or periodic structures, their emergence in the DB waveguide appears a new phenomenon since the guide is neither periodic nor contains any exotic materials. For the present, realization of the DB boundary relies on utilization of layers of metamaterial making the ZAP medium possible. One can anticipate that in time there will emerge structures like the ones for the anisotropic soft-and-hard surface which can be realized by corrugations or strip-loaded surfaces [3], [21], [22].

APPENDIX POTENTIAL REPRESENTATION Because it is known that any field outside sources can be represented as a sum of fields TE and TM with respect to the spherical radial direction , one may ask whether a similar rule is valid with respect to the cylindrical radial direction . In other words, would it be possible to represent an arbitrary field outside its sources as

(58) (59) in terms of some potential functions

and

?

Applying the expansion (61) valid for any function , one can further see that (60) cannot be satisfied unless the potentials satisfy (62) Thus, there are two possibilities: either the fields are rotationally symmetric (no dependence on ) or axially invariant (no dependence on ). This means that the representation (58) and (59) cannot be valid for general fields in the circular waveguide. REFERENCES [1] R. F. Harrington, Time-Harmonic Electromagnetic Fields. New York: McGraw-Hill, 1961. [2] I. V. Lindell and A. H. Sihvola, “Transformation method for problems involving perfect electromagnetic (PEMC) structures,” IEEE Trans. Antennas Propag., vol. 53, no. 9, pp. 3005–3011, Sep. 2005. [3] P. S. Kildal, “Definition of artificially soft and hard surfaces for electromagnetic waves,” Electron. Lett., vol. 24, pp. 168–170, 1988. [4] G. Pelosi and P. Y. Ufimtsev, “The impedance boundary condition,” IEEE Antennas Propag. Mag., vol. 38, pp. 31–35, 1996. [5] I. V. Lindell, Methods for Electromagnetic Field Analysis, 2nd ed. Oxford, U.K.: Oxford Univ. Press, 1995. [6] I. V. Lindell and A. H. Sihvola, “Electromagnetic DB boundary,” in Proc. XXXI Finnish URSI Convention, Espoo, Finland, Oct. 2008, pp. 81–82. [Online]. Available: http://www.URSI.fi [7] I. V. Lindell and A. H. Sihvola, “DB boundary as isotropic soft surface,” in Proc. Asian–Pacific Microw. Conf., Hong Kong, Dec. 2008, 4 pages (IEEE Catalog number CFP08APM-USB). [8] I. V. Lindell and A. H. Sihvola, “Uniaxial IB-medium interface and novel boundary conditions,” IEEE Trans. Antennas Propag., vol. 57, no. 3, pp. 694–700, Mar. 2009. [9] I. V. Lindell and A. H. Sihvola, “Electromagnetic DB boundary and its realization with anisotropic metamaterial,” Phys. Rev. E, vol. 79, 2009, Art. ID 0226604. [10] I. V. Lindell and A. H. Sihvola, “Zero axial parameter (ZAP) sheet,” Prog. Electromag. Res., vol. 89, pp. 213–224, 2009. [11] M. Silveirinha and N. Engheta, “Design of matched zero-index metamaterials using nonmagnetic inclusions in epsilon-near-zero media,” Phys. Rev., vol. 75, 2007, Art. ID 075119. [12] A. Alù, M. G. Silveirinha, A. Salandrino, and N. Engheta, “Epsilonnear-zero metamaterials and electromagnetic sources: Tailoring the radiation phase pattern,” Phys. Rev., vol. 75, 2007, Art. ID 155410. [13] I. V. Lindell and A. H. Sihvola, “Spherical resonator with DB-boundary conditions,” PIER Lett., vol. 6, pp. 131–137, 2009. [14] A. Ishimaru, Electromagnetic Wave Propagation, Radiation, and Scattering. Englewood Cliffs, NJ: Prentice-Hall, 1991, pp. 85–87. [15] J. R. Pierce, Almost all About Waves. Cambridge, MA: MIT Press, 1974, ch. 4. [16] R. G. E. Hutter, Beam and Wave Electronics in Microwave Tubes. New York: Van Nostrand, 1960, pp. 220–230. [17] P. J. B. Clarricoats and P. K. Saha, “Propagation and radiation behaviour of corrugated feeds. I. Corrugated waveguide feed,” Proc. Inst. Elect. Eng., vol. 118, pp. 1167–1176, 1971. [18] J. Van Bladel, Electromagnetic Fields, 2nd ed. New York: IEEE Press, 2007, pp. 864–865. [19] Y. Xu, “Wave propagation in rectangular waveguide filled with single negative metamaterial slab,” Electron. Lett., vol. 39, no. 25, pp. 1831–1833, 2003.

LINDELL AND SIHVOLA: CIRCULAR WAVEGUIDE WITH DB-BOUNDARY CONDITIONS

[20] J. C. Liu et al., “Waveguide miniaturization with Sr(ZnTi)Fe O hexaferrite metamaterial,” Microw. Opt. Technol. Lett., vol. 49, no. 1, pp. 201–203, 2006. [21] P.-S. Kildal and A. Kishk, “EM modeling of surfaces with STOP and GO characteristics—Artificial magnetic conductors and soft and hard surfaces,” Appl. Comput. Electromag. Soc. J., vol. 18, no. 1, pp. 32–40, Mar. 2003. [22] A. Kishk and P.-S. Kildal, “Modeling of soft and hard surfaces using ideal perfect electric conducting/perfect magnetic conducting strip grids,” IET Microw. Antennas Propag., vol. 3, no. 2, pp. 296–302, 2009. [23] V. H. Rumsey, “Some new forms of Huygens’ principle,” IRE Trans. Antennas Propag., vol. 7, pp. S103–S116, Dec. 1959. Ismo V. Lindell (S’68–M’69–SM’83–F’90–LF’05) was born in Viipuri, Finland, in 1939. He received the Ph.D. degree from the Helsinki University of Technology (TKK), Espoo, Finland, in 1971. Currently, he is Professor Emeritus of electromagnetic theory with the Department of Radio Science and Engineering, TKK. He has authored 260 refereed scientific papers and 11 books, including Methods for Electromagnetic Field Analysis (IEEE Press, 2002), Electromagnetic Waves in Chiral and Bi-Isotropic Media (Artech House, 1994), and Differential Forms in Electromagnetics (IEEE Press, 2004). Dr. Lindell was the recipient of the IEEE S. A. Schelkunoff prize (1987), the IEE Maxwell Premium (1997 and 1998), and the URSI van der Pol Gold Medal (2005).

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Ari Sihvola (F’06) is Academy Professor with the Helsinki University of Technology, Espoo, Finland. His visiting positions include Research Laboratory of Electronics of the Massachusetts Institute of Technology, Cambridge (1985–1986), Pennsylvania State University, State College (1990–1991), Lund University, Lund, Sweden (1996), Electromagnetics and Acoustics Laboratory of the Swiss Federal Institute of Technology, Lausanne, Switzerland (2000–2001), and University of Paris 11, Orsay, France (2008). His research interests include waves and fields in electromagnetics, modeling of complex materials, remote sensing and radar applications.

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Design of 3-D Periodic Metamaterials for Electromagnetic Properties Shiwei Zhou, Wei Li, and Qing Li

Abstract—This paper presents a new homogenization formula to compute the effective electromagnetic properties for periodic metamaterials. Numerical examples showed that the effective permittivity and permeability of the composites with cubic inclusions, formerly known to have the lowest permittivity, are closer to the Hashin–Strikman bounds than those obtained from other methods. To tailor the specific effective properties, an inverse homogenization procedure is proposed within the framework of vector wave equations. Some novel metamaterial microstructures with a range of specific effective permittivity and/or permeability are obtained. By maximizing the permittivity and permeability at the same time, a structure with minimal surface area (the mean curvature of the surface equals zero everywhere), namely, the well-known Schwarz primitive structure, is obtained. Similarly to the nano-spheres (dielectric spheres covered by plasmonic shells) with negative refraction, we generalize the Schwarz primitive structure and its analogy (e.g., those with a constant mean curvature surface) to one class of chiral composites by embedding one of these structures with smaller volume fraction (nonmagnetic inclusive cores) into another with large volume fraction (metal shell). Such composites have potential to provide better behaviors because they can best utilize different components. The anisotropic composites and multiple solutions to the inverse homogenization are also illustrated. Index Terms—Effective permittivity and permeability, inverse homogenization method, metamaterials, Schwarz primitive structure.

I. INTRODUCTION S THE sizes of metal–dielectric particles periodically suspended in free space or hosted in other homogenized mediums are smaller than a quarter of the wavelengths of Hertzian waves, the electromagnetic fields are largely influenced by the size effects like surface plasmon and mutual interactions between adjacent particles [1]–[3]. Such novel composites are named metamaterials because they could offer extraordinary electromagnetic properties unavailable in nature [1]–[4]. Being one of the main materials with either negative permittivity or negative permeability or both, metamaterials are expected to provide a new arena for many novel applications ranging from biosensors to photonic devices [1], [3]–[9]. The characterizations of metamaterials are popular topics recently. In addition to experimental approaches, various nu-

A

Manuscript received December 11, 2008. First published March 15, 2010; current version published April 14, 2010. This work was supported by the Australian Research Council. The authors are with the School of Aerospace, Mechanical and Mechatronic Engineering, The University of Sydney, Sydney N.S.W. 2006, Australia (e-mail: [email protected]; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042845

merical methods have been developed to calculate the effective properties for metamaterials. In 1999, Pendry et al. [2] first obtained the uniaxial negative permeability for metallic cylinders with regularly shaped (circle and split ring) cross sections by considering the resonance resulted from internal capacitance and inductance. After that, the effective permittivity of the lattice, constructed by complexly shaped conductive inclusions suspended in a host medium, was computed using the moment-method-based technique [8]. It was shown that, by applying unit potential difference and setting periodic boundary conditions onto the opposite boundaries in a square or cubic domain, the effective-medium-based method [10], [11] can compute the effective electromagnetic properties for normal composites as well as metamaterials. More recently, the homogenization technique [12], [13], widely used for computing the elasticity tensors [14], was adopted to derive the effective electromagnetic properties by Quchetto et al. [5]. The homogenization method benefits the characterization of metamaterials from at least two aspects. First, the fact that many metamaterials are fabricated by periodically repeated representative volume elements (base cells or resonators) allows restricting the analysis to a small representative domain rather than the entire composite material. Second, the size of the base cell is relatively small, which well meets the multiscale requirement in the homogenization technique. The most striking advantage of the homogenization method lies in that it is possible to seek some optimal configurations because it is applicable to any arbitrarily shaped base cell. Unlike the homogenization method in [5], this paper proposes a different homogenization formulation, in which the characteristic fields used in the integral of the electromagnetic properties are in a vectorial form rather than a scalar potential. Numerical tests indicate that this appears to be more suitable to commonly used composites, whose inclusions are suspended in either a free space or a hosted homogenous medium. This new homogenization technique will be further used in an inverse procedure [15] in this study to tailor the effective properties for some special engineering needs. Compared with traditional size optimization, where the ratio of the width of the cubic inclusion to the corner radius was optimized [8], the inverse homogenization method is more versatile and allows us to optimize the size, shape, and topology of the structures simultaneously. To implement the inverse homogenization in this study, the design domain (base cell) is modeled by using the finite-element method (FEM). The volume fraction of the dielectric or metal phase (i.e., relative density) in each element is taken as the design variable. As a design objective, the squared mismatches between the target and effective values are minimized by using the method of moving asymptotes (MMA) [16]. To drive this gradient-based method here, the sensitivity of the effective values

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ZHOU et al.: DESIGN OF 3-D PERIODIC METAMATERIALS FOR ELECTROMAGNETIC PROPERTIES

with respect to the design variables is derived by using the adjoint variable method [17]. II. HOMOGENIZATION FORMULATION and , respectively, The electric and magnetic fields, are governed by time-varying (with sinusoidal excitation ) Maxwell’s equations given by (1a) (1b) where , is the curl operator, and the excitation frequency. The electric flux density , magnetic flux density , and the source of electric current , are dependent on the macroscopic properties of media in terms of the constitutive , , and , in which the conrelations stitutive parameters , , and are named as the permittivity, permeability, and conductivity, respectively. These nondispersive (frequency-independent) properties are scalar values when the media are isotropic. However, for anisotropic cases in this paper, they are in a tensor form expressed in the 3 3 matrices. The inhomogeneous vector wave equations can be obtained by eliminating and on the right-hand sides of (1a) and (1b), respectively, given by (2a) (2b)

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with respect to the macroscopic When derivating coordinate via the chain rule, the derivative across these two scales is obtained as (6) By replacing the electromagnetic fields and corresponding curl operators in (4) with (5) and (6), respectively, and extracting the terms, one can generate the following equilibrium equation:

(7) and are the curl operator matrices in the two difwhere ferent scales, respectively. According to the convergence in the homogenization theory [12]–[14], one can have (8)

where

is the volume of the base cell, and then (7) becomes

Equation (2) can be generalized into a short form as (3) where

, ,

, and . Multiplying a test function on both sides of (3) and integrating by parts according to the relationship with the surface integration of , one can derive the weak variational form of the vector wave equations as

(9) which leads to the following two equilibrium equations:

(4) and denotes the external where surface of the domain occupied by the entire composite. Assuming that the composite is constructed by periodically repeated base cells, the electromagnetic fields can be asymptotically approximated by a polynomial as

(10)

(5) Except for the first term, which only depends on the global (macro) position , the rest are related to both within the global and local (micro) positions the base cell . The contribution of the different hierarchies to the electromagnetic fields is weighted by a small factor of in different exponential orders, which links the . In accordance macro and micro coordinate systems by with the homogenization theory [12]–[14], the two-level hierarchy of (5) provides an approximation to the electromagnetic fields within an acceptable error.

(11) By assuming operator to the both sides, one obtains

and applying the curl (12)

Putting (12) into (11) and eliminating

, we obtain (13)

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with identity . Equation (13) can be expressed in a weak form as (14) with bilinear term and linear term into (10) for

Like other algorithms, e.g., evolutionary structural optimization [25], [26], the method of moving asymptotes [16] needs to define how sensitive the objective function is to a perturbation in the design variables. To conduct sensitivity analysis, the first is given by derivative of the cost function

. Substituting

(18)

yields

where the subscript denotes the derivative with respect to the relative density and (19) (15) Comparing (15) with the weak form of the Maxwell’s equation (4), the effective property matrix is thus defined as

The adjoint variable method [17] is used to solve via deriving an adjoint equation as (20)

(16)

III. INVERSE HOMOGENIZATION METHOD FOR THE DESIGN OF METAMATERIALS The formulation in (16) exhibits that three parameters contribute to the effective property tensor. The first two are the physical properties (i.e., permittivities , and permeabilities , ) and the volume fractions ( and ) of the constituent phases. The third is related to the distribution of these compositional materials within the base cell. In our cases, the basic constituent phases and their volume fractions are given, thus the way to tailor the effective properties becomes how to allocate the constituent materials within the base cell properly. Such an effort has been successfully made for various mechanical properties, e.g., negative Poisson’s ratio [18], by means of the inverse homogenization method. This has led, in the first instance, to an understanding of how engineered composites can attain some extraordinary properties that are not readily available in nature [19]–[21]. More recently, further studies concluded that the constituent phases separated by the interfaces with minimum surface area have single or multiple superior physical properties [20]–[23]. The key idea to the inverse homogenization method is that are forced to converge to their targets the effective values in a way that the square of their mismatches is minimized. Thus, the optimization problem is mathematically expressed as

Equation (20) has the same form as (14) except for the negative sign on the right-hand side. Thus, the characteristic equation . (14) is self-adjoint and the adjoint variable is given by By differentiating both sides of the characteristic equation (14) with respect to , one can obtain the following equation: (21) As both

and belong to the same test functional space (periodic Soblev space), substitution of with in (21) yields (22)

Similarly, the substitution of (20) leads to

with

in the adjoint equation (23)

Taking the symmetric bilinear term in (22) and (23), one obtains (24)

Likewise, as both and belong to the same test functional space, one can swap them in (19) and obtain the sensitivity as

(17) where is the local volume fraction (or relative density) of phase and the 1. To avoid intermediate relative densities checkerboard pattern (different phases presents themselves in an alternative fashion), the nonlinear diffusion technique [24], originally used in structural topology optimization, is adopted (the in this procedure. It is noted that the volume constraint volume fraction occupied by Phase 1 within the design domain or base cell) is considered as a constraint in the optimization.

(25)

IV. NUMERICAL IMPLEMENTATION AND RESULTS Based upon the vector wave equations, the characteristic fields, namely the solutions to (14), should be divergence-free.

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To take this mathematical property into account, a penalty algorithm, originally used in the magnetostatic problem [27], is introduced, leading to a variation of (14) given by (26) and an arbiwith bilinear term trary penalty factor . It is obvious that, when the test function , the second term on the left-hand side of (26) beis . According to the variational principle, comes the solutions to (26) are the stationary point of the total potential , energy thus naturally leading to divergence-free solutions. Within the inverse homogenization framework, the local is assumed to be isotropic and a constant property matrix in each element centered at point . During the optimization process, the relative density might not be necessarily 0 or 1. Hence, we need to evaluate the local properties in such intermediate elements. Since the Hashin–Strikman (HS) bounds [28] provide the lower and upper limits to most physical properties, these two bounds are adopted as the interpolation schemes to calculate the local properties in this paper. The determination of the appropriate bound depends on the target properties wanted. For instance, if the target is closer to the lower HS bound, the upper HS bound should be chosen and vice versa [20], [29]. In addition to the HS bound-based interpolation schemes, the arithmetic bound [30] with an exponential penalty is also applicable. The effect of the shape of the inclusions on the effective permittivity was systematically studied by Whites and Wu by using the moment-method-based technique [8]. They pointed out that the composites periodically constructed by cubically shaped dielectric inclusions and hosting medium can attain the Maxwell–Garnet bound due to the strongest edge effect between adjacent particles (i.e., mutual coupling effects) [31]. Being the lowest bound for the static effective permittivity of any isotropic two-phase mixture, the Maxwell–Garnet bound is actually the lower HS bound in 3-D scenarios. To verify this, we use this new homogenization formula to compute the effective permittivity for the composites with cubic inclusion in different volume fractions. It is assumed that the permittivities of the inclusion and and . As in free space are isotropic and equal to Fig. 1, the gray (the gray and dark appears blue and red, respectively, in the color print of this paper) diamonds clearly indicate that the effective values are very close to the lower HS bound. In contrast to these points near the lower HS bound, the composites with free-space inclusions are found to have higher effective values very close to the upper HS bound (denoted by dark solid line in Fig. 1). The attainability of the HS bounds has been discussed in detail in [32] for multiphase composites with extremal conductivity. One of the main differences between our method and the method proposed by Quchetto et al. [5] is their derivative operators; the former uses the curl operator and the latter adopted the gradient operator. This is why the curl-operator-based and gradient-operator-based are named in Fig. 1. The other difference is the measurement of the local property. Unlike the gradient operator based homogenization that uses the interpolated permittivity as the local property, the curl operator-based homogenization, (16), uses the local

Fig. 1. Relation of the effective permittivity to the volume fraction of the cubeshaped inclusions hosted in free space.

matrix , which is more relevant to the inverse formulation of the local permittivity and permeability. For example, if the two compositions are isotropic and have the same permeability but different permittivity, the local values in our method should be the reciprocal of the integrated permittivity. It is worth mentioning that the conclusions drawn on the effective permittivity in this and following examples are also applicable to the effective permeability due to their interchangeable relationship. Since these kinds of composites with cubic inclusions were reported to have the lowest permittivity [8] while Fig. 1 shows that the effective values (obtained from the curl-operated-based homogenization and indicated by the blue or gray diamonds in color or black–white print, respectively) are consistently lower than those indicated by the red or dark squares (obtained from the gradient-based method in [5]), the new homogenization method seems to be more appropriate for these commonly used engineering composites. As an alternative, however, the curl-operator-based method appears to be more sophisticated and may require more computing resources than the gradient-operator-based method. Those composites in Fig. 1 with cubic inclusions were generated from a size optimization targeted for the lowest permittivity [8]. Is it possible to find other novel composite architectures that approach the lower HS bound more closely? If started from two different initial distributions, namely the relative density of Phase 1 in each element is either directly or inversely proportional to its distance to the center of the base cell, two optimal base cell configurations are obtained, as shown in Fig. 2(a) and (b), by using the inverse homogenization method. To illustrate the internal structure of the base cell, only Phase 1 (red (in online version) in color print or dark in black–white print) or Phase 2 (blue (in online version) or gray) is plotted in the following figures. Although the structures look different in a single base cell, they indeed construct the same composites if different adjacent base cells are periodically materialized in the three orthogonal directions as in Fig. 2(c). As in Fig. 2(b), Phase 1 accumulates in the center of the base cell with rounded edges and corners, and bumps up in the centers of six surfaces. The effective values for these two base cells are similar and correspond to point A in Fig. 3, which appears closer to the lower HS bound than Point B, indicating the effective

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Fig. 2. Microstructures of the composite with the lowest isotropic permittivity: (a) the optimal base cell resulted from initial value 1, (b) the optimal base cell resulted from initial value 2, and (c) the 2 2 2 ranked optimal base cells. The targets are " = " = " = 2:0390. The attained values are " = " = " = 2:0626 and " = 2:0616, " = " = 2:0602 in (a) and (b), respectively, with the volume fraction of V = 0:3430.

2 2

Fig. 4. Microstructures of the composite with anisotropic permittivity: (a) the base cell and (b) the 4 4 4 ranking of base cells. The targets are " = 2:9475, " = 2:1446, and " = 5:6080. The attained values are " = 2:9776, " = 2:1869, and " = 5:4885. The volume fraction equals the target of V = 0:5120.

2 2

Fig. 5. Microstructures of the composite with the maximal permittivity and permeability: (a) the base cell and (b) the 2 2 2 ranking of base cells. The attained permittivity and permeability are " = " = " = 4:0771 and  =  =  = 4:0768, respectively. The volume fraction of phase 1 equals the target V = 0:5.

2 2

Fig. 3. Microstructures of the composites with different isotropic permittivities but the same volume fraction (V = 0:3430) of phase 1.

value of the composite with the cubic inclusions obtained from the size optimization [8]. Fig. 3 also illustrates other microstructures with the effective permittivity varying from the lower to upper HS bounds. It is clearly observed that, from points A to F, the isolated inclusions gradually become interconnected to enhance the magnetic permittivity in the base cells. For the base cells corresponding to points C-E, both phases are continuous and the effective value seems to be directly related to the minimum sectional area of the inclusions. Anisotropic 3-D composites can also be designed with the inverse homogenization method. For example, if the target is located at the lower Milton–Kohn surface [33], where the third is equal to a value as high as the principal permittivity arithmetic bound [30], the dielectric material takes a cylindrical shape that has its major axis parallel to the direction of the

maximal permittivity. As the other two principal entries are not , the cross section of the cylinder may not be equal squared-symmetric as in Fig. 4. It is of significant benefit for metamaterials to generate more than one physical property by maximizing the utilization of the properties of different components. Bearing this in mind, the two components in the following example have the competing , and , . The properties as objective function becomes the summation of the reciprocals of the principal entries of the permittivity and permeability (27) and denote the weighting factors to emphasize where the relative importance of the permittivity and permeability, respectively. If the volume fractions for these two phases are equal, the optimal microstructure can be obtained as in Fig. 5. It looks very similar to the well-known Schwarz primitive structure [34], which is a class of the structures with the minimal surface area. Such a structure was also reported by Torquato et al. in [22], which attained the maximal transport properties of heat and electricity simultaneously. Since these two phases occupy the same volume in the base cell, the effective permittivity and

ZHOU et al.: DESIGN OF 3-D PERIODIC METAMATERIALS FOR ELECTROMAGNETIC PROPERTIES

Fig. 6. Microstructures of the composite with the maximal permittivity and permeability: (a) the base cell and (b) the 2 2 2 ranking of base cells. The attained permittivity and permeability are " = " = " = 6:5685 and  =  =  = 2:2296, respectively. The volume fraction of phase 1 equals the target V = 0:7499.

2 2

permeability are almost the same (4.0771 and 4.0768, respectively), and both are close to the upper HS bound (4.7059), even though their properties compete with each other. However, for the composites with an increasing volume fraction of Phase 1, as shown in Fig. 6, the effective permittivity is much larger than the effective permeability, simply because the phase with strong permittivity occupies a larger volume. Similarly to the last example, the effective permittivity (6.5685) and effective permeability (2.2296) are close to their upper HS bounds (7.0968 and 2.7027), respectively. The optimized microstructure in Fig. 6 also approximately represents another class of special structures, whose surface mean curvature is not zero but a constant anywhere. More details about these structures were reported in [35] In order to obtain negative refraction, we can substitute the normal components in the abovementioned two examples with nondispersive chiral material and resonant dipole particles because the optimal properties of these structures are independent of the components and physical properties [20]–[22], [29], [36]. Pendry [6], [9], [37] indicated that the chiral composite can attain negative refraction at the resonant frequency of the dipoles. To guarantee the isotropy of the chiral composite, these two components should be randomly mixed or symmetrically distributed within base cells which are periodically repeated in a lattice [7]. The Schwarz primitive structure and its derivatives obtained from the optimization could be ideal geometrical models for chiral composite for the following three reasons. 1) Their properties are isotropic due to the cubic-symmetry structures. 2) It has been reported that such structures can best utilize the features of different components for electric and thermal properties [22]. For example, the nonmagnetic inclusive core and metal shell could be the Schwarz-type structures with different surface mean curvatures. Similarly, other analogous structures with constant mean curvatures [29], [35] have potential to be used for chiral composites. 3) Since the geometrical characteristics of these structures can be expressed by mathematical formula (e.g., the nano-spheres [38]), it is possible to derive analytical equations for the effective properties. Recently, Qiu et al. [37] systemically studied the effective properties for special

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Fig. 7. Microstructures of the composite with the maximal permittivity and permeability: (a) base cell and (b) 2 2 2 ranking of base cells. The attained permittivity and permeability are " = " = " = 2:4295. The volume fraction of phase 1 equals the target V = 0:3430.

2 2

chiral composite constructed by dielectric spheres covered in plasmonic shells. Similar work can be taken for the Schwarz-type and its analogous structures in the future. The solution to the inverse homogenization problem may not be unique. It has been shown in [20] that very different microstructures might have the same or close effective properties. For example, the microstructure generated in Fig. 7 has different topologies from those shown in Fig. 3, but its effective permittivity locates between the lower and upper HS bounds, which appears somewhat disagreeable with the topological transition shown in Fig. 3. A simple elucidation of the multiple solutions to the design problem might be due to the same cross-sectional area of inclusions, which largely determines the permittivity between the base cells. Nevertheless, more work about this conjecture is needed. V. CONCLUSION In accordance with the homogenization theory, the effective electromagnetic properties are estimated by considering the composition and configuration of the base cells. To design novel composites with special electromagnetic properties, the inverse homogenization technique is developed. The numerical results showed that the effective values obtained from the new homogenization formula appear closer to the bounds for the composites with inclusions hosting in free space, indicating that it may be more appropriate to be used for tailoring the effective properties of these composites. In this paper, several microstructural composites having intermediate effective values ranging from the lower to the upper HS bounds are obtained. Their topological transition indicates that the effective permeability is determined by the minimum cross-sectional area of dielectric material in a certain direction. The Schwarz primitive structures with minimal surface are also observed when seeking the composites with the maximal permeability and permittivity simultaneously. This structure and its analogous configurations can be generalized for chiral composites with negative refraction by filling them with nondispersive core and resonant dipole shell. REFERENCES [1] C. Caloz and T. Itoh, Electromagnetic Metamaterials: Transmission Line Theory and Microwave Applications. Hoboken, NJ: Wiley, 2006.

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[2] J. B. Pendry, A. Holden, and D. Robbins et al., “Magnetism from conductors and enhanced nonlinear phenomena,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 11, pp. 2075–2084, Nov. 1999. [3] V. G. Veselago, “The electrodynamics of substances with simultaneously negative values of " and ,” Sov. Phys.–Usp., vol. 10, no. 4, pp. 509–514, 1968. [4] J. Hong and M. Lancaster, Microstrip Filters for RF/Microwave Applications. New York: Wiley, 2001. [5] O. Ouchetto, C. W. Qiu, and S. Zouhdi et al., “Homogenization of 3-D periodic bianisotropic metamaterials,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 11, pp. 3893–3898, Nov. 2006. [6] J. B. Pendry, “A chiral route to negative refraction,” Science, vol. 306, no. 5700, pp. 1353–1355, Nov. 2004. [7] S. Tretyakov, A. Sihvola, and L. Jylha, “Backward-wave regime and negative refraction in chiral composites,” Photon. Nanostruct. Fundam. Appl., vol. 3, no. 2–3, pp. 107–115, Oct. 2005. [8] K. Whites and F. Wu, “Effects of particle shape on the effective permittivity of composite materials with measurements for lattices of cubes,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 7, pp. 1723–1729, Jul. 2002. [9] C. W. Qiu, H. Y. Yao, and L. W. Li et al., “Backward waves in magnetoelectrically chiral media: Propagation, impedance, and negative refraction,” Phys. Rev. B, Condens. Matter, vol. 75, no. 15, p. 155120, Apr. 2007. [10] C. Brosseau and A. Beroual, “Effective permittivity of composites with stratified particles,” J. Phys. D, Appl. Phys., vol. 34, no. 5, pp. 704–710, Mar. 2001. [11] A. Mejdoubi and C. Brosseau, “Numerical calculations of the intrinsic electrostatic resonances of artificial dielectric heterostructures,” J. Appl. Phys., vol. 101, pp. 084109/1–084109/13, Apr. 2007. [12] A. Bensoussan, G. Papanicolaou, and J. L. Lions, Asymptotic Analysis for Periodic Structures. Amsterdam, The Netherlands: Elsevier, 1978. [13] E. Sanchez-Palencia, Non-Homogeneous Media and Vibration Theory. Berlin, Germany: Springer, 1980. [14] M. P. Bendsøe and N. Kikuchi, “Generating optimal topologies in structural design using a homogenization method,” Comput. Methods Appl. Mech. Eng., vol. 71, no. 2, pp. 197–224, Nov. 1988. [15] O. Sigmund, “Materials with prescribed constitutive parameters—An inverse homogenization problem,” Int. J. Solids Struct., vol. 31, no. 17, pp. 2313–2329, Sep. 1994. [16] K. Svanberg, “The method of moving asymptotes—A new method for structural optimisation,” Int. J. Numer. Meth. Eng., vol. 24, no. 2, pp. 359–373, Feb. 1987. [17] E. J. Haug, K. K. Choi, and V. Komkov, Design Sensitivity Analysis of Structural Systems. Orlando, FL: Academic, 1986. [18] O. Sigmund, “Materials with prescribed constitutive parameters—An inverse homogenization problem,” Int. J. Solids Struct., vol. 31, no. 17, pp. 2313–2329, Sep. 1994. [19] O. Sigmund and S. Torquato, “Composites with extremal thermal expansion coefficients,” Appl. Phys. Lett., vol. 69, no. 21, pp. 3203–3205, Nov. 1996. [20] S. W. Zhou and Q. Li, “Computational design of multiphase microstructural materials for extremal conductivity,” Comput. Mater. Sci., vol. 43, no. 3, pp. 549–564, Mar. 2008. [21] J. K. Guest and J. H. Prévost, “Design of maximum permeability material structures,” Comput. Methods Appl. Mech. Eng., vol. 196, no. 4–6, pp. 1006–1017, Oct. 2007. [22] S. Torquato, S. Hyun, and A. Donev, “Multifunctional composites: Optimizing microstructures for simultaneous transport of heat and electricity,” Phys. Rev. Lett., vol. 89, no. 26, p. 266601, Dec. 2002. [23] Y. H. Chen, S. W. Zhou, and Q. Li, “Computational design for multifunctional microstructural composites,” J. Modern Phys. B, vol. 23, no. 6–7, pp. 1345–1351, 2009. [24] M. Y. Wang, S. Zhou, and H. Ding, “Nonlinear diffusions in topology optimisation,” Struct. Multidiscip. Opt., vol. 28, no. 4, pp. 262–276, Oct. 2004. [25] Y. M. Xie and G. P. Steven, “A simple evolutionary procedure for structural optimization,” Comput. Struct., vol. 49, no. 5, pp. 885–896, Dec. 1993. [26] G. P. Steven, Q. Li, and Y. Xie, “Evolutionary topology and shape design for mathematical physical problems,” Comput. Mech., vol. 26, no. 2, pp. 129–139, Aug. 2000. [27] J. M. Jin and V. Liepa, “Simple moment method program for computing scattering from complex cylindrical obstacles,” Proc. Inst. Elect. Eng.—Microw., Antennas Propag., vol. 136, no. 4, pp. 321–329, Aug. 1989.

[28] Z. Hashin and S. Shtrikman, “A variational approach to theory of effective magnetic permeability of multiphase materials,” J. Appl. Phys., vol. 33, no. 10, pp. 3125–3131, Oct. 1962. [29] S. W. Zhou and Q. Li, “The relation of constant mean curvature surfaces to multiphase composites with extremal thermal conductivity,” J. Phys. D, Appl. Phys., vol. 40, no. 19, pp. 6083–6093, Oct. 2007. [30] O. Wiener, “Die theorie des mischkorpers fur das feld der stationaren stromung,” Abh. Math.-Phys. Klasse Koniglich Sachsischen Des. Wiss., vol. 32, pp. 509–604, 1912. [31] J. C. Maxwell-Garnett, “Colours in metal glasses and in metallic films,” Phil. Trans. R. Soc. Lond. A, Math. Phys. Sci., vol. 203, pp. 385–420, 1904. [32] S. W. Zhou and Q. Li, “A microstructure diagram for known bounds in conductiity,” J. Mater. Res., vol. 23, no. 3, pp. 798–811, Mar. 2008. [33] G. W. Milton and R. V. Kohn, “Variational bounds on the effective moduli of anisotropic composites,” J. Mech. Phys. Solids, vol. 36, no. 6, pp. 597–629, Jun. 1988. [34] H. Schwarz, Gesammelte Mathematische Abhandlungen. Berlin, Germany: Springer, 1890. [35] W. Góz´dz´ and R. Holyst, “Triply periodic surfaces and multiply continuous structures from the Landau model of microemulsions,” Phys. Rev. E, Stat. Phys. Plasmas Fluids Relat. Interdiscip. Top., vol. 54, no. 5, pp. 5012–5027, Nov. 1996. [36] S. W. Zhou and Q. Li, “A variational level set method for the topology optimization of steady-state Navier–Stokes flow,” J. Comput. Phys., vol. 227, no. 24, pp. 10178–10195, Dec. 2008. [37] C. W. Qiu and L. Gao, “Resonant light scattering by small coated nonmagnetic spheres: Magnetic resonances, negative refraction, and prediction,” J. Opt. Soc. Amer. B, Opt. Phys., vol. 25, pp. 1728–1737, Oct. 2008. [38] M. S. Wheeler, J. S. Aitchison, and M. Mojahedi, “Coated nonmagnetic spheres with a negative index of refraction at infrared frequencies,” Phys. Rev. E, Stat. Phys. Plasmas Fluids Relat. Interdiscip. Top., vol. 73, Jan. 2006, Art. ID 045105. Shiwei Zhou received the Ph.D. degree from The Chinese University of Hong Kong, Hong Kong, in 2006. He has been a Research Fellow with the School of Aerospace, Mechanical and Mechatronic Engineering, The University of Sydney, Sydney, N.S.W., Australia, since 2006. His research interests include topology optimization, computational material design, metamaterials, and bioengineering.

Wei Li received the Ph.D. degree from The University of Sydney, Sydney, N.S.W., Australia, in 2002. She was an Australian Research Council (ARC) Australian Postdoctoral Fellow from 2006 to 2008 and now is an ARC Australian Research Fellow with the School of Aerospace, Mechanical and Mechatronic Engineering, The University of Sydney. Her recent research interests include topographical design and fabrication of micro- and nano-structured materials. She is also interested in modeling of electrical and magnetic fields in biological tissues.

Qing Li received the Ph.D. degree from The University of Sydney, Sydney, N.S.W., Australia, in 2000. He was a Postdoctoral Research Fellow with Cornell University, Ithaca, NY, from 2000 to 2001, and an Australian Research Council Australian Postdoctoral Fellow with The University of Sydney from 2001 to 2003. He was a Senior Lecturer with James Cook University, Townsville, Q.L.D., Australia, from 2004 to 2006. He has been with The University of Sydney since 2006 and is now an Associate Professor with the School of Aerospace, Mechanical and Mechatronic Engineering. His research interests include topology optimization for multiphysics and general field problems with a focus on microstructural material design for transporting properties.

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Krylov Acceleration Techniques for Time-Reversal Design Applications Ian Scott, Ana Vukovic, Member, IEEE, and Phillip Sewell, Senior Member, IEEE

Abstract—Time-reversal approaches provide a simple design optimization procedure for a class of electromagnetic components. The approach comprises iterations of forward and reverse time simulations that can be undertaken using any numerical time-domain algorithm. However, although this offers significant flexibility, it is computationally intensive, and therefore, it is important to increase the convergence rate of the method. In this work, the physically based time-reversal iterations are accelerated using Krylov subspace methods, which are shown to provide a valuable improvement in computational efficiency. Two illustrations are presented: waveguide filters and impedance matching a waveguide bend, and both stationary and nonstationary linear acceleration methods are considered, employing the time-stepping transmission-line modeling method to perform the necessary simulations. Index Terms—Conjugate gradients (CGs), generalized minimal residual (GMRES), Krylov subspace, time reversal, transmissionline modeling (TLM).

I. INTRODUCTION

UTOMATED design and optimization of microwave and photonic components is of increasing importance as both system complexity and performance specifications become ever more demanding. A variety of approaches have been developed for this purpose, both specific to particular classes of problem and of a more general-purpose nature [1]–[3]. The key practical issues for the general approaches are the quality of designs produced, their flexibility, and the computational effort required. Time-reversal optimization techniques exploit the inherent flexibility of established time-domain numerical algorithms, which are regularly used for performance assessment, within a physically intuitive iterative framework. If the response of a proposed component design obtained using the numerical method is not ideal, then perturb it toward the desired response and run the algorithm in reverse to identify the geometry that would cause it to be produced. The early work of Fink et al. [4], [5] provides the most comprehensive analysis of time-reversal approaches applied to acoustic problems and both the concept and many of the

A

Manuscript received August 02, 2009; revised November 05, 2009. First published March 15, 2010; current version published April 14, 2010. This work was supported by the U.K. Engineering and Physical Sciences Research Council (EPSRC). The authors are with the George Green Institute for Electromagnetics Research, University of Nottingham, Nottingham NG7 2RD, U.K. (e-mail: [email protected]; [email protected]; [email protected]). Digital Object Identifier 10.1109/TMTT.2010.2042634

details are immediately relevant to electromagnetics. Time-reversal optimization has been successfully demonstrated using both the finite-difference time-domain (FDTD) [6] and transmission-line modeling (TLM) [7] algorithms to perform the necessary forward and reverse time simulations. The most obvious disadvantage of the method is the need for multiple time-domain simulations, which are inherently computationally intensive, and therefore, it is critically important to maximize the convergence rate of the iterations. Furthermore, it is necessary to record the full time history of the component’s response on a surface that fully encloses it, which can consume significant quantities of memory. This surface is sometimes referred to as a time-reversal mirror (TRM) [4] as the time history of the forward simulation stored in them is used to excite the time-reversed simulation. Although attention has been focused upon the memory problem [7], the issue of convergence remains unresolved and this is addressed in this paper. A particular motivation is the consideration of highly resonant structures, which are notably affected by both memory consumption and convergence rates, which is unfortunate as time-domain methods are ideally suited to the design of wideband structures and their optimization. The idea examined here stems from the fact that each time-reversal optimization iteration is analogous to a steepest descent minimization step. Only the most recent state of the design is explicitly used to determine the next search direction [1]. Therefore, it is proposed that acceleration methods classically employed to significantly improve the convergence rates of algebraic minimization problems will also provide the same advantages if adapted to time-reversal optimization. It is widely known that the solution of large systems of linear equations can be accelerated using either stationary point methods, such as successive over-relaxation (SOR) [8], or nonstationary or Krylov subspace methods [9] such as conjugate gradients (CGs) and generalized minimal residual (GMRES). Krylov subspace methods project the solution being sought onto the set of vectors in a manner so as where the operator is classically a to minimize matrix. It will be shown below that time-reversal optimization problems can also be expressed in this form, thus permitting the employment of the powerful Krylov subspace acceleration techniques to improve their convergence. II. TIME-STEPPING SIMULATIONS Throughout this work, the established TLM method has been used to perform both the forward and reverse time simulations. This is a flexible time-stepping numerical technique that has been extensively characterized and used over many years [10],

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used to excite the reverse simulation, as shall now be explained in more detail. A. Unaccelerated Iterations is to be optimized over a fiIf, for example, a return loss , then the equivalent source perturnite operating bandwidth bations are traditionally calculated as follows: The performance error after the th forward simulation is evaluated in the frequency domain (1)

Fig. 1. Illustration of time-reversal design process.

[11]. However, any time-domain method, such as FDTD, could be employed for this purpose and we refer to the extensive literature for further details of both of these algorithms. It is appropriate to comment that, as both TLM and FDTD are explicitly invariant under time reversal in the linear, lossless, and isotropic case, both the forward and reverse time simulations are actually performed in exactly the same manner using the conventional routines. III. TIME-REVERSAL DESIGN PROCEDURE The objective of the procedure is to optimize the design of a component to give a desired response given an initial design estimate and a primary source. This work focuses on the class of components comprising perfect metal scatterers within 2-D waveguide systems. Time-reversal approaches are most straightforwardly and efficiently applied to this type of problem [7], which permits investigation of the convergence rate more clearly and exhaustively than would be the case for large and more complex 3-D problems demanding substantial computational facilities. The typical scenario is to optimize the observed scattering parameters of the fundamental mode at one or more waveguide ports. Given an initial estimate of the scatterer geometry, a forward time simulation is performed and the fields incident on the ports are recorded in both space and time. During this simulation, the ports are terminated by simple matched impedance boundaries. For example, using TLM, the pulses incident on the ports are recorded and then perfectly absorbed. By subtracting from these field values, the corresponding values obtained from a forward simulation with the scatterer removed from the waveguide, the fields radiated by just the sources induced on the surface of the scatterer are identified. Theoretically, the invariance under time reversal of Maxwell’s equations means that if these fields are subsequently used to define equivalent surface sources and on the ports, then a time-reversed simulation will reveal the surface of the scatterer. Specifically, the scatterer’s surface will coincide with the nulls in a map of the maximum observed magnitude of the Poynting vector during the reverse simulation [7]. The optimization process, therefore, proceeds by perturbing the recorded port fields toward their desired values before using them to define the perturbed equivalent sources

where superscript denotes the desired response. Note that this expression can easily be Fourier transformed to provide the cor. If denotes the spatial responding time-domain error variable defining the position in a 1-D waveguide port, then let (2) denote the time-domain port values of the electric and magnetic fields recorded during the forward simulation of the th design iterate, during a one off simulation with the scatterer removed and of the fundamental mode profile. The equivalent sources that would reconstruct the original scatterer geometry are given in (3a) and these are perturbed in (3b) in order to reconstruct a . A condesign that is proposed would minimize the error stant damping factor is introduced in (3c) to yield smoother convergence of the process (3a) (3b) (3c)

B. Accelerated Iterations The accelerated form of the time-reversal method minimizes the residual of the system , which, after iterations, is conventionally defined as (4) where is an operator (e.g., a square matrix) and , , and are column vectors. Fig. 1 provides a visualization of how the overall design iterative process can be phrased in this manner, noting that the distinction between different acceleration techniques lies in how the excitation to the reverse simulation is updated in light of the set of previous residual vectors. A suitable residual error vector for the time-reversal iterations can be obtained from (1) expressed in the time domain (5) where denotes the inverse Fourier transform of the re, and is the vector of spaturn loss, bandwidth limited to tial samples across the port of the fundamental mode electric

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field, which in a homogeneous waveguide, is independent of frequency. The identification of the driving term suggests that , and hence, that the equivalent sources exciting the reverse time simulation can be regarded as the unknown vector . Therefore, the operator is the process of: 1) performing the reverse time simulation; 2) the extraction by an invariant algorithm of the scatterer geometry; 3) performing a forward simulation with this geometry excited by the primary sources; and 4) extraction of the scattering parameter . We emphasize that the matrix need never vector be explicitly obtained in closed form as the Krylov acceleration . techniques only require the availability of the vector It is clear that here the operator is actually nonlinear, as the extraction of the scatterer geometry involves thresholding the observed Poynting vector. However, it is proposed that it can be assumed sufficiently linear with respect to perturbations in to permit direct application of established acceleration techniques. This is aided by the fact that, in the vicinity of the ideal scatterer , suggesting that is diagonal at this point. geometry, In general, convergence using Krylov subspace methods is only guaranteed for symmetric . C. Stationary Point Iterative Acceleration SOR is a simple acceleration technique whose update equation is of the form [8] (6) where denotes the SOR point variable in the range and , , and are, respectively, the diagonal, upper triangular, and lower triangular matrices of . If it is assumed that perturbations about an ideal solution are being made, then as stated above, is approximately diagonal and it is proposed to and simplify (6) using (7) which is a simple change to the original time-reversal approach. is explicitly evaluated from a simple It is noted here that forward time simulation starting from and yielding (from in Fig. 1). Assuming that is diagonal allows its elements to be identified as ratios of the components of these two vectors. D. Discussion of Nonstationary Iterative Acceleration SOR accelerates convergence by introducing the stationary point . Stationary point methods usually progress toward the optimum solution in directions already explored by previous iterations and this behavior creates redundancy in the technique. An alternative to this approach is to ensure that the residual from successive iterations are, for example, orthogvectors onal to one another. This forms an orthogonal basis in terms of which the time-reversal design process searches for the solution. This is nonstationary acceleration and is the basis of Krylov subspace linear solvers [12] such as the CG and GMRES methods [8], [13]. Both of these routines [13] are straightforwardly applicable to the time-reversal process using the analogy established in Fig. 1 and (4) and (5); simply providing an iterative update for , given

Fig. 2. Desired, initial, and optimized S -parameters for a two septa bandpass filter with convergence after eight design iterations. The TRMs are placed at the input and output ports of the filter [1].

the sequence of previous vectors and . Further details and standard algorithms are widely available in the literature along with discussion of their derivations and specific advantages and disadvantages [8], [9], [13]–[15]. Therefore, here we focus directly upon the benefits obtained in the current context. IV. RESULTS To demonstrate the convergence acceleration possible, three case studies are presented, which are optimized using the conventional procedure [7] and the techniques outlined in Section III. We then continue to discuss the modifications required to implement SOR, CG, and GMRES with time reversal. The first test case presented is a second-order bandpass microwave filter, created from two infinitesimally thin metal septa separated by a quarter wavelength of a parallel-plate waveguide at the desired center frequency, as shown in the inset of Fig. 2. mm, and A parallel-plate metal waveguide of width hence, fundamental mode cutoff of 6.56 GHz, is used. The target -parameters are generated from a lumped equivalent-circuit model of the filter with a length of simple transmission line sepnH and nH. arating two shunt inductances These values where chosen as they are known to be practically realizable using waveguide septa [16]. However, it is noted that an exact realization of this filter will not be possible using septa since the inductances of the septa are actually weakly frequency dependent. The scalar figure of merit (FoM) (8) is defined to assess convergence, where superscript denotes GHz and GHz. the desired response with The TLM simulations are undertaken with 2-D shunt TLM nodes to represent TM polarization [11] (the electric field is perpendicular to the page in the inset of Fig. 2). The initial widths of the septa are mm, which, as

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Fig. 3. (a) Convergence analysis of design of second-order bandpass filter using time reversal, showing the convergence behavior of the SOR with three ranges of ! . (b) All three linear acceleration methods, optimal SOR is 0:54 ! 0:58.

 

seen in Fig. 2, generates a significantly different response to that desired. The TLM simulations were undertaken with square mm ( spatial samples in the cells of size mm transverse plane) and a total guide length of spatial samples). Simulations are truncated after ( 16 384 time steps of duration 0.7 ps each. The original time-reversal algorithm of (3) with converges after eight iterations to the response shown in Fig. 2. This damping value was chosen as the maximum possible while still achieving convergence. The effect of the SOR variable on the convergence of the time-reversal process is shown in Fig. 3(a), which shows the FoM versus the iteration number. Three selected values of are shown and it is seen that the best convergence is found for (within this range, the results do not change). The SOR has converged to the optimum solution with two fewer time-reversal design steps than with the unaccelerated iterations. An exhaustive search with respect to showed this to be the maximum possible acceleration using SOR, all other values of producing slower convergence. It is commented that the flat sections observed in the curves of Fig. 3 are due to the snapping of the septa widths extracted from the Poynting vector field to the nearest spatial sample. Fig. 3(b) shows the application of CG and GMRES acceleration to the bandpass filter optimization using time reversal, and a

maximum acceleration of 50% is observed when using the CG, which is a very valuable improvement. In Fig. 4, the evolution of the scattering parameters with iteration is shown when using the CG accelerated time reversal. In the second example, a metal tuning post is placed within a 90 waveguide bend to improve the return loss, as shown in the inset of Fig. 5. The degree of freedom for the design is the displacement of the square metal post from the inside corner of the bend. The post’s area is fixed at 5.5 5.5 mm and the objective is to minimize the return loss and maximize the transmission coefficient over the bandwidth of 6.8–8.8 GHz. The initial mm. The TLM simuladisplacement of the post is tions use square cells of size 0.18 mm and a total guide length of 40.23 mm. Simulations are truncated after 16 384 time steps, each of a duration of 0.431 ps. Fig. 5 shows the return loss achieved with both the initial and finally optimized post positions using the unaccelerated was found time-reversal process (3). A damping factor to be the maximum possible that yielded reliable convergence in this example. The optimized return loss was found after 13 iterations, and subsequently no further improvement occurs. mm giving a The final location of the post was at minimum return loss of 28.07 dB at the center of the band (7.8 GHz). Fig. 6 shows the convergence of the accelerated schemes for the SOR, outside of using the value of which convergence is to a sub-optimal design. It is clear that valuable improvements in convergence rates are obtained and that the Krylov subspace techniques provide the most benefit. Furthermore, since the 90 bend contains only a single degree of design freedom (the post displacement), it is simple to analyze the effect that the initial post displacement has upon the design convergence rate. In Fig. 7, the number of iterations required to achieve convergence are shown with respect to the initial post displacement. It is seen that the reduction in iterations provided by the accelerated schemes over the unaccelerated scheme is more significant when the initial post displacement is further from the optimal solution. Moreover, the earlier assumption that the nonlinear operator can be regarded as sufficiently linear with respect to perturbations about the solution point is supported by this result as the accelerated convergence rates only slowly deteriorate with distance of the initial design from the optimal displacement. The computational resources required, both in terms of run time and memory, for most practical problems will be heavily dominated by the time-domain simulations. For the bend example, SOR introduces virtually no additional overhead compared with the basic time reversal and reduces the overall run time by approximately 25%. GMRES and CG provide a further reduction in run times of up to 40%, corresponding to up to 3 h on a single threaded AMD Athlon 2-GHz processor with 2-GB RAM. Finally, the order of the filter example is increased by using mm and three metal septa with initial widths m. In Fig. 8, the convergence of all three acceleration methods are compared to the unaccelerated case. m, m, and The optimized widths are m. This example is heavily resource intensive, and

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Fig. 6. Convergence analysis of design of 90 waveguide bend using time reversal, showing all three linear acceleration methods.

Fig. 4. Evolution of optimized scattering parameters during CG time-reversal design of the waveguide bandpass filter, heavy lines are optimized, dotted lines are the target parameters. (a) Initial. (b) Step 1. (c) Step 2. (d) Optimized.

Fig. 7. Convergence analysis of design of 90 waveguide bend using time reversal when initial displacement of tuning post is varied.

Fig. 5. Initial and optimal return loss of 90 waveguide bend, optimized are found after 13 time-reversal iterations.

thus, the 25% reduction in convergence seen using the Krylov subspace methods corresponds to a reduction of 5.5 h in run time. It is noted from Figs. 3, 6, and 8 that the reduction in overall run time is primarily obtained from a more rapid initial convergence, which is advantageous, as with many larger scale problems, restrictions on the available computing power may only permit a few iterations to be undertaken to fine tune a design. Classically, CG is more memory efficient than GMRES, albeit at the expense of less smooth convergence. However, notwithstanding that GMRES stores the full sequence of residual vectors, the fact that in this example these are expressed as a time waveform scaling the fundamental mode spatial vector means that this is not significant. The results

Fig. 8. Convergence analysis of design of third-order bandpass filter using time-reversal, showing all three linear acceleration methods.

from CG and GMRES are sufficiently close to not suggest a preference, although in problems with many more degrees of freedom, GMRES would be expected to prove more robust. V. CONCLUSION The paper has shown the application of time reversal in TLM to three illustrative microwave designs illustrating the need for convergence acceleration. This has been developed with the

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view to accelerating the device design process using both the stationary point and Krylov subspace methods. Although the stationary point approach is simple to implement, it achieves only a minimal acceleration in convergence rate. The Krylov subspace solvers were then discussed. The demonstration with the same examples resulted in an average run time reduction of approximately 40%–50%. In conclusion, the computational run time of time-reversal design limits its practical applications. However, the acceleration techniques investigated in this paper provide a notable improvement and offer more scope for complex design optimization.

[13] Y. Saad, Iterative Methods for Sparse Linear Systems, 2nd ed. Philadelphia, PA: SIAM, 2003. [14] M. R. Hestenes and E. Stiefel, “Methods of conjugate gradients for solving linear systems,” J. Res. Nat. Bureau Stand., vol. 49, pp. 409–436, Dec. 1952. [15] H. D. Gersem, D. Lahaye, S. Vandewalle, and K. Hameyer, “Comparison of quasi minimal residual and bi-conjugate gradient iterative methods to solve complex symmetric systems arising from time-harmonic magnetic simulations,” Int. J. Comput. Math. Elect. Electron. Eng., vol. 18, no. 3, pp. 298–310, 1999. [16] R. E. Collin, Foundations for Microwave Engineering, 2nd ed. New York: Wiley, 2001.

REFERENCES [1] M. Forest and W. J. R. Hoefer, “TLM synthesis of microwave structures using time reversal,” in IEEE MTT-S Int. Microw. Symp. Dig., Albuquerque, NM, Jun. 1–5, 1992, pp. 779–782. [2] Y.-D. Kwon, S.-B. Kwon, S.-B. Jin, and J.-Y. Kim, “Convergence enhanced genetic algorithm with successive zooming method for solving continuous optimization problems,” Comput. Structures, vol. 81, pp. 1715–1725, August 2003. [3] , T. Itoh, Ed., Numerical Techniques for Microwave and MillimeterWave Passive Structures. New York: Wiley, 1989. [4] M. Fink, “Time reversal of ultrasonic fields—Part I: Basic principles,” IEEE Trans. Ultrason. Ferroelect. Freq. Control, vol. 39, no. 5, pp. 555–566, Sep. 1992. [5] D. Cassereau and M. Fink, “Time reversal of ultrasonic fields—Part III: Theory of the closed time-reversed cavity,” IEEE Trans. Ultrason. Ferroelectr. Freq. Control, vol. 39, no. 5, pp. 579–592, Sep. 1992. [6] P. Kosmas and C. M. Rappaport, “A matched-filter FDTD-based time reversal approach for microwave breast cancer detection,” IEEE Trans. Antennas Propag., vol. 54, no. 4, pp. 1257–1264, Apr. 2006. [7] M. Forest and W. J. R. Hoefer, “A novel synthesis technique for conducting scatterers using TLM time reversal,” IEEE Trans. Microw. Theory Tech., vol. 43, no. 6, pp. 1371–1378, Jun. 1995. [8] R. Barrett, M. Berry, T. F. Chan, J. Demmel, J. Donato, J. Dongarra, V. Eijkhout, R. Pozo, C. Romine, and H. V. der Vorst, Templates for the Solution of Linear Systems: Building Blocks for Iterative Methods, 2nd ed. Philadelphia, PA: SIAM, 1994. [9] R. W. Freund, G. H. Golub, and N. M. Nachtigal, “Iterative solution of linear systems,” Acta Numer., vol. 1, pp. 57–100, Jan. 1992. [10] W. J. R. Hoefer, “The transmission-line matrix method—Theory and applications,” IEEE Trans. Microw. Theory Tech., vol. MTT-33, no. 10, pp. 882–893, Oct. 1985. [11] C. Christopoulos, The Transmission-Line Modeling Method: TLM. New York: Wiley, 1995. [12] Y. Boubendir, F. Ecevit, and F. Reitich, University of Reading, “Krylov subspace based acceleration strategies for the solution of high-frequency multiple scattering problems,” in Proc. Waves 2007, 2007, pp. 41–43.

Ian Scott was born in Norwich, U.K., in 1985. He received the B.Sc. degree in computer science with electronics (with starred first-class honors) from the University of East Anglia (UEA), Norwich, U.K., in 2006, and is currently working toward the Ph.D. degree in electrical and electronic engineering at the George Green Institute for Electromagnetics Research, University of Nottingham, Nottingham, U.K. His research interests are in the area of inverse numerical modeling with applications to electromagnetics.

Ana Vukovic (M’97) was born in Nis, Yugoslavia, in 1968. She received the Diploma of Engineering degree in electronics and telecommunication from the University of Nis, Nis, Yugoslavia, in 1992, and the Ph.D. degree from the University of Nottingham, Nottingham, U.K., in 2000. From 1999 to 2001, she was a Research Associate with the University of Nottingham. In 2001, she joined the School of Electrical and Electronic Engineering, University of Nottingham, as a Lecturer. In 2008, she became an Associate Professor with the University of Nottingham. Her research interests are in the area of electromagnetics with a particular emphasis on applications in opto-electronics and microwaves.

Phillip Sewell (M’89–SM’04) was born in London, U.K., in 1965. He received the B.Sc. degree in electrical and electronic engineering (with first-class honors) and Ph.D. degree from the University of Bath, Bath, U.K., in 1988 and 1991, respectively. From 1991 to 1993, he was a Post-Doctoral Fellow with the University of Ancona, Ancona, Italy. In 1993, he became a Lecturer with the School of Electrical and Electronic Engineering, University of Nottingham, Nottingham, U.K. In 2001 and 2005 he became a Reader and Professor of electromagnetics with the University of Nottingham. His research interests involve analytical and numerical modeling of electromagnetic problems with application to opto-electronics, microwaves, and electrical machines.

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DC-Preserving Passivity Enforcement for S -Parameter Based Macromodels Dirk Deschrijver, Member, IEEE, and Tom Dhaene, Senior Member, IEEE

Abstract—Rational approximation of frequency responses is important for the modeling and design of microwave systems. An exact match of the dc value is crucial to ensure the accuracy and reliability of circuit and system simulations. This paper presents a novel approach to compute dc-compliant macromodels that are both accurate and uniformly passive at the same time. Several examples illustrate the effectiveness of the approach. Index Terms—DC compliant, frequency domain, macromodeling, passivity enforcement, system identification, vector fitting.

algorithm is proposed to enforce overall passivity while preserving the dc value. Several examples illustrate the advantages of this approach. II. DC-COMPLIANT MACROMODELING A. Model Representation To compute a dc-compliant macromodel, the vector-fitting algorithm is modified to calculate a proper macromodel with a modified complex diagonalized state space representation

I. INTRODUCTION

(1) (2)

V

ECTOR fitting is a robust macromodeling algorithm to compute a rational function approximation of frequencydomain responses that are obtained from full-wave electromagnetic simulations or high-frequency measurements [1]–[8]. Although the resulting macromodels are stable and accurate, the extrapolation of the model at lower frequencies may indicate an incorrect dc value due to fitting errors. Nevertheless, an exact match of the dc value is crucial because minor inaccuracies may compromise the accuracy and reliability of all circuit and system simulations [9]. It is possible to modify an incorrect dc value by adding an external correction term to the model. Although this offset can be effective to compensate small errors, it introduces an unnecessary broadband deviation, which is often undesired. An alternative approach is shown in [10], where an exact correspondence of the dc value is obtained by modifying the functional form of the rational approximation model. This modification ensures that the model has an exact agreement of the dc value, but it frequently occurs that the resulting model is not asymptotically passive or uniformly passive. When combined with nonlinear terminations, a nonpassive model may lead to unstable simulations in an unpredictable way. Even though standard passivity enforcement techniques can be applied from literature, they do not preserve the dc value and often introduce additional deviations that contribute further to the problem [11]. This paper introduces a reliable solution to the resolve these difficulties. A modified version of the vector-fitting algorithm is proposed to compute dc-compliant macromodels, and a robust

Manuscript received September 09, 2009. First published March 15, 2010; current version published April 14, 2010. This work was supported by the Research Foundation Flanders. The authors are with the Department of Information Technology (IBCN-INTEC), Ghent University–IBBT, 9000 Gent, Belgium (e-mail: dirk.deschrijver; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042556

The transfer function of the model

is then defined as (3)

The advantage of this representation is that the model response at dc is exactly equal to the elements of the feedthrough matrix . Thus, by setting the elements on the th row and th column of the corresponding of equal to the correct dc value , a perfect agreement is guaranteed [10]. scattering element of (3) can be recasted into a partial fracEach element tion expansion, assuming that each element has a distinct set of and common poles coefficients (4) It is also evident from (4) that , and thus a dc-compliant macromodel is obtained. A reliable procedure to and is decalculate the remaining model coefficients scribed in Section II-B. It is largely based on a modified procedure of the standard vector-fitting routine [10]. B. Model Identification and in (4), the transfer To identify the coefficients is defined as the ratio of a function of scattering element numerator and a common denominator . Both expressions are expanded as a linear combination of rational basis functions that are based on a common set of poles . These poles are initially prescribed, and they are selected according to a heuristical scheme in [1]. The first step of the identification process consists of finding the optimal values of the coefficients

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and such that the least squares distance between the rational model and data samples is minimized

(5)

III. PASSIVITY CONDITIONS Although the calculated macromodels are dc compliant, they are not guaranteed passive by construction. The exact definition of passivity for stable -parameter-based macromodels in the frequency domain stipulates that the singular values of the are unitary bounded [14] scattering matrix (11)

The calculation of coefficients and leads to a nonlinear identification problem that can be hard to solve using standard optimization techniques. Therefore, a linear approximation of the problem is found by minimizing Levi’s cost function [12] (6) The trivial null solution in (6) is avoided by setting the coeffi. This choice ensures that in (5) equals the cient approaches unity at the low freexact dc value, whereas quencies. This leads to the following expression: (7)

which leads to the following equivalent expression: (12) In order to apply some algebraic passivity tests to the model, the state space realization (1) and (2) is reformulated as follows: (13) (14) Real matrices , , , and are obtained by applying a simin (4). The ilar transformation as (8) to each element passivity can then easily be verified algebraically by computing the eigenvalues of an associated Hamiltonian matrix [15] (15)

Once the coefficients and are solved, it is clear that (5) can be simplified by cancelling out the prescribed poles . It of the transfer follows that the relocated poles function are, in fact, the zeros of . These zeros are easily calculated by solving an eigenvalue problem that is based on of . the minimal state space realization The easiest way to construct this realization is to reformulate from (5) into the standard partial fraction form such that (8) provided that and . This way, the state space realization can be constructed using the same are directly found procedure as in [1, App. B]. The zeros of by solving the following eigenvalue problem: (9) The prescribed poles in (5) are replaced by the relocated poles , and this procedure is iteratively repeated until they are converged to some quasi-optimal position [1]. Stability of the model is ensured by a simple pole-flipping scheme that inverts the sign of unstable poles during the iterations. It is shown in [13] that this pole relocation process is equivalent to the Sanathanan–Koerner iteration using implicit weighting. are converged, the corresponding Once the relocated poles of the model are solved as a linear problem coefficients

and . If is an imagwhere inary eigenvalue of , then the corresponding frequency may denote the crossover between a passive and a nonpassive frequency band [16]. By computing the slopes of the singular value curves at the purely imaginary eigenvalues, it is possible to pinpoint the exact boundaries of a passivity violation. If all the eigenvalues of have a nonvanishing real part, then the system is passive. Theoretical proofs about this procedure are reported in [15]. In the case of reciprocal systems, a smaller passivity test matrix can be derived that is half the size of the Hamiltonian ma[17]. trix IV. ASYMPTOTIC PASSIVITY ENFORCEMENT Asymptotic passivity of the model requires that the singular of the scattering matrix are unitary bounded values . This can easily be verified by computing the sinfor gular value decomposition of the matrix such that (16) where is a positive real-valued diagonal matrix that contains and are unitary matrices. If the the singular values, and model is not asymptotically passive, then one (or several) of the singular values in will exceed unity. To compensate this violation, a new set of violation parameters is constructed (17)

(10) where the coefficient

is equal to the exact dc value.

with (18)

DESCHRIJVER AND DHAENE: DC-PRESERVING PASSIVITY ENFORCEMENT FOR

where

and

-PARAMETER BASED MACROMODELS

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are square diagonal matrices

(19) The value of the parameter is chosen exactly equal to 1. To make the model asymptotically passive, a new set of residues is computed by fitting using the same set of poles that were used in the original macromodel (1). This leads to the following underdetermined problem: (20) A combination of two terms is formed to preserve complex conjugacy of the residues corresponding to a complex pole pair. While solving the equations, one can impose additional nonlinear constraints that minimize the deviation to the input–output port response of the macromodel (see [18] for details). The violations are then removed by subtracting from the residue matrix , leading to a new set of residues

Fig. 1. Shunt capacitor: schematic.

where , , and are defined as in (18) and (19). In this case, the value of is a predefined tolerance parameter that is chosen, in practice, slightly smaller than 1 (such as, e.g., 0.999). B. Adjustments of Residues In order to make the initial state space model passive, a new is computed by fitting the violation paramset of residues over the frequency sweep using the same set of eters poles that were used in the original model (1) (24)

(21) It is noted that the matrix in (2) remains unaffected since this matrix contains the dc values that should be preserved. V. UNIFORM PASSIVITY ENFORCEMENT If algebraic passivity tests indicate that the model is nonpassive, then the passivity enforcement algorithm [11] is modified to compensate the violation without affecting the dc value. The (for ) are iteraresidues in the output matrix tively corrected by a simple least squares fitting procedure until of the all violations are removed. In the first iteration step algorithm, in (21).

It is noted that the solution of (24) is found by solving an overdetermined least squares matrix. The computational cost of this residue identification step is very small because it does not reare quire any pole relocations. The calculated residues then subtracted from the previous residue matrix in order to suppress the passivity violations; hence, (25) This process is repeated until all violations are compensated. VI. EXAMPLES A. Shunt Capacitor

A. Nonpassive Residuals of Scattering Matrix First, a dense set of frequencies is determined from dc up to about 20% above the highest relevant frequency. This highest relevant frequency is the maximum of the highest crossing from a nonpassive to a passive region on one hand and the maximum frequency of interest on the other hand. For each in the set , a singular value decomposition frequency of the scattering matrix is performed as follows:

As a first example, the algorithm is demonstrated by computing a passive dc-compliant macromodel of a one-port shunt decoupling capacitor. The schematic of a simple model with representative behavior (see Fig. 1) is used to generate the -parameters so the reader can easily verify the computations. The data samples are computed from dc up to 4 GHz, as shown in M and , it is Fig. 2. Since clear that the -parameter at dc equals

(22)

(26)

where is a positive real-valued diagonal matrix that contains the singular values, and and are unitary matrices. The inin (22) is computationally fast because version of it is a complex diagonal matrix. It is clear that one (or several) of the singular values in will exceed unity in the areas where the model is nonpassive. Therefore, a new set of violation pais constructed as follows: rameters

The modified vector-fitting algorithm in Section II-B is used to compute an exact dc-compliant macromodel with two poles. Unfortunately, the model is not asymptotically passive because

(23)

(27) In order to make the macromodel asymptotically passive, the procedure in Section IV is applied to compute a small correction to the residues in (2) without modifying the dc values in .

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Fig. 2. Shunt capacitor: magnitude of S -parameters.

Fig. 4. Balun: singular value curves of passive and nonpassive model.

Fig. 5. Balun: zoom of Fig. 4 at lower frequencies from dc to 1 GHz.

B. Balun Transformer Fig. 3. Shunt capacitor: deviation passive dc-compliant macromodel.

This correction offsets the passivity violation in such a way that becomes exactly equal to 1. Although asymptotic passivity is enforced, it is not guaranteed that the macromodel is uniformly passive. Uniform passivity can be verified by checking the eigenvalues of the Hamiltonian matrix (15). However, since is now exactly equal to 1, this test cannot be applied because both and become singular. To resolve this problem, a modified passivity test (based on the realization of the reciprocal system) is used, as in [19]. It is found that the conditions for uniform passivity are satisfied, and no further compensations are needed. Fig. 3 shows the deviation of the passive dc-compliant macromodel, and it turns out that the maximum absolute deviation caused by asymptotic passivity enforcement is approximately 178 dB. It is also noted that there is no deviation at dc because the proposed macromodeling and passivity enforcement procedure preserves the exact dc values.

As a second example, the procedure is applied to compute a passive dc-compliant macromodel of a five-port planar microwave balun transformer. The -parameters of the component are simulated with ADS Momentum [20] over the frequency range of interest from dc up to 10 GHz. The modified vector-fitting procedure in Section II-B is used to compute an accurate ten-pole macromodel with an exact match of the dc value. Accurate modeling of the dc value is often critical to capture the late-time (steady state) response of the system [21]. It is verified by checking the singular values of that the model is asymptotically passive; however, a Hamiltonian passivity check indicates that the model is not uniformly passive. To visualize possible passivity violations, the singular value curves of the scattering matrix are shown in Fig. 4. A zoom of Fig. 4 near dc is shown in Fig. 5, and it is seen that a small passivity violation is detected. The iterative passivity compensation procedure in Section V is applied to remove the violation, and a passive macromodel is obtained in ten iterations. It is seen from Fig. 6 that the size of the maximum violation decreases monotonically in each iteration step, and convergence to a passive macromodel is obtained.

DESCHRIJVER AND DHAENE: DC-PRESERVING PASSIVITY ENFORCEMENT FOR

Fig. 6. Balun: maximum singular value in each iteration step.

-PARAMETER BASED MACROMODELS

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Fig. 8. Balun: singular values passive dc-compliant macromodel and deviation.

TABLE I DC VALUES—UPPER TRIANGULAR ELEMENTS OF S (0)

Fig. 7. Balun: zoom of Fig. 4 at lower frequencies from dc to 100 MHz.

Fig. 7 shows a more detailed zoom of the singular value curves, and a closer inspection reveals that the passivity compensation algorithm preserves an exact agreement of the singular values at dc (marked by black dots), as desired. Fig. 8 shows the magnitude of the -parameter response of the passive dc-compliant macromodel, and it turns out that the maximum absolute deviation is bounded by approximately 80 dB over the frequency range of interest, which is a highly accurate result. It is also noted from Fig. 8 that the deviation at dc is exactly equal to 0 since the passivity enforcement procedure ensures that the dc values remain unaltered. As a comparison, the standard vector-fitting technique from [1] is used to compute a similar ten-pole macromodel. The freis included in the fitting process; howquency sample at ever, dc compliance (as described in this paper) is not enforced. Table I lists the exact dc values and the dc values of the standard vector-fitting model, and it is seen that a nonnegligible deviation is introduced. Fig. 9 shows the singular value curves of the model and confirms that the singular values of the exact dc solution (marked by black dots) are indeed missed, even before any kind of passivity enforcement is applied. Such a deviation is

Fig. 9. Balun: singular values standard VF macromodel (non dc compliant).

undesired, as it may lead to wrong bias currents at dc. The new dc-compliant macromodeling procedure described in this paper completely resolves this problem, as it enforces an exact match of the dc value and preserves the dc value of the macromodel during the passivity enforcement.

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VII. CONCLUSIONS The calculation of macromodels with an exact match of the dc values are important since minor inaccuracies can lead to unreliable circuit and system simulations. A robust approach is described to compute macromodels that are dc compliant, and a reliable passivity enforcement procedure is proposed to ensure asymptotic and uniform passivity of the model. Several examples illustrate that this method yields accurate results. REFERENCES [1] B. Gustavsen and A. Semlyen, “Rational approximation of frequency domain responses by vector fitting,” IEEE Trans. Power Del., vol. 14, no. 3, pp. 1052–1061, Jul. 1999. [2] W. Hendrickx, D. Deschrijver, and T. Dhaene, “Some remarks on the Vector fitting iteration,” in Progress in Industrial Mathematics at ECMI 2004, ser. Math. in Industry. Philadelphia, PA: SIAM, 2006, vol. 8, pp. 134–138. [3] B. Gustavsen, “Improving the pole relocating properties of vector fitting,” IEEE Trans. Power Del., vol. 21, no. 3, pp. 1587–1592, Jul. 2006. [4] D. Deschrijver, M. Mrozowski, T. Dhaene, and D. Dezutter, “Macromodeling of multiport systems using a fast implementation of the vector fitting method,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 6, pp. 383–385, Jun. 2008. [5] D. Deschrijver and T. Dhaene, “A note on the multiplicity of poles in the vector fitting macromodeling method,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 4, pp. 736–741, Apr. 2007. [6] D. Deschrijver, B. Haegeman, and T. Dhaene, “Orthonormal vector fitting : A robust macromodeling tool for rational approximation of frequency domain responses,” IEEE Trans. Adv. Packag., vol. 30, no. 2, pp. 216–225, May 2007. [7] R. Gao, Y. S. Mekonnen, W. T. Beyene, and J. E. Schutt-Aine, “Black-box modeling of passive systems by rational function approximation,” IEEE Trans. Adv. Packag., vol. 28, no. 2, pp. 209–215, May 2005. [8] A. Lamecki and M. Mrozowski, “Equivalent SPICE circuits with guaranteed passivity from nonpassive models,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 5, pp. 526–532, Mar. 2007. [9] S. Grivet-Talocia and F. Canavero, “DC-compliant macromodels based on the method of characteristics for frequency-dependent transmission lines,” in 1st Electron. Syst. Integration Technol. Conf., Sep. 2006, vol. 1, pp. 56–61. [10] H. M. J. De Silva, A. M. Gole, and L. M. Wedepohl, “Accurate electromagnetic transient simulations of HVDC cables and overhead transmission lines,” in Proc. Int. Power Syst. Transients Conf., Lyon, France, 2007, 4 pp. [11] T. Dhaene, D. Deschrijver, and N. Stevens, “Efficient algorithm for passivity enforcement of S -parameter based macromodels,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 2, pp. 415–420, Feb. 2009. [12] E. C. Levi, “Complex curve fitting,” IRE Trans. Autom. Control, vol. AC-4, no. 1, pp. 37–43, May 1959. [13] D. Deschrijver, B. Gustavsen, and T. Dhaene, “Advancements in iterative methods for rational approximation in the frequency domain,” IEEE Trans. Power Del., vol. 22, no. 3, pp. 1633–1642, Jul. 2007. [14] D. Youla, L. Castriota, and H. Carlin, “Bounded real scattering matrices and the foundations of linear passive network theory,” IRE Trans. Circuit Theory, vol. CT-6, no. 1, pp. 102–124, Mar. 1959.

[15] S. Boyd, V. Balakrishnan, and P. Kabamba, “A bisection method for computing the norm of a transfer matrix and related problems,” Math. Control, Signals, Syst., vol. 2, pp. 207–219, 1989. [16] S. Boyd, L. El Ghaoui, E. Feron, and V. Balakrishnan, Linear Matrix Inequalities in System and Control Theory. Philadelphia, PA: SIAM, 1994. [17] B. Gustavsen and A. Semlyen, “Fast passivity assessment for -parameter rational models via a half-size test matrix,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 12, pp. 2701–2708, Dec. 2008. [18] S. Grivet-Talocia, “Passivity enforcement via perturbation of Hamiltonian matrices,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 9, pp. 1755–1769, Sep. 2004. [19] D. Deschrijver and T. Dhaene, “Modified half-size test matrix for robust passivity assessment of -parameter macromodels,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 5, pp. 263–265, May 2009. [20] Agilent EEsof COMMS EDA, ADS Momentum. Agilent Technol. Inc., Santa Rosa, CA, 2009. [21] A. Y. Woo and A. C. Cangellaris, “Real-part sufficiency and its application to the rational function fitting of passive electromagnetic responses,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2007, pp. 99–102.

H

S

S

Dirk Deschrijver (M’09) was born in Tielt, Belgium, on September 26, 1981. He received the Master (Licentiaat) degree and Ph.D. degree in computer science from the University of Antwerp, Antwerp, Belgium, in 2003 and 2007 respectively. From May to October 2005, he was as a Marie Curie Fellow with the Scientific Computing Group, Eindhoven University of Technology, Eindhoven, The Netherlands. He is currently an FWO Post-Doctoral Research Fellow with the Department of Information Technology (INTEC), IBBT, Ghent University, Gent, Belgium. His research interests include robust parametric macromodeling, rational least squares approximation, orthonormal rational functions, system identification, and broadband macromodeling techniques.

Tom Dhaene (M’94–SM’05) was born in Deinze, Belgium, on June 25, 1966. He received the Ph.D. degree in electrotechnical engineering from the University of Ghent, Gent, Belgium, in 1993. From 1989 to 1993, he was Research Assistant with the Department of Information Technology (INTEC), University of Ghent, where his research was focused on different aspects of full-wave electromagnetic (EM) circuit modeling, transient simulation, and time-domain characterization of high-frequency and high-speed interconnections. From August 1993 to September 2000, he was with the EDA Company Alphabit (later the Hewlett-Packard Company and now part of Agilent Technologies). He was one of the key developers of the planar EM simulator ADS Momentum. From October 2000 to September 2007, he was a Professor with the Department of Mathematics and Computer Science, University of Antwerp, Antwerp, Belgium. Since October 2007, he has been a Full Professor with the INTEC, Ghent University. He has authored or coauthored over 210 peer-reviewed papers and abstracts in international conference proceedings, journals, and books.

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Stability Analysis of Nonlinear Circuits Driven With Modulated Signals Franco Ramírez, Almudena Suárez, Ibone Lizarraga, and Juan-Mari Collantes

Abstract—Existing methods for the large-signal stability analysis of microwave circuits assume a periodic excitation, usually consisting of a single tone. However, practical circuits such as power amplifiers will generally be driven by modulated signals or multiple input tones. This paper presents a procedure for the stability analysis of linear time-varying systems, applicable to circuits excited with nonperiodic input signals. The procedure is based on the determination of the time-varying poles associated to an input–output representation of the system. Under modulated signals, this representation is obtained by linearizing the envelope-transient system that rules the circuit behavior. The formulation and methodology have been applied to a simple nonlinear circuit with arbitrary excitation and a practical power-combined amplifier at 3 GHz with very good agreement in comparison with independent simulations and experimental results. Index Terms—Bifurcation, envelope transient, instability, modulated signals, pole-zero identification, power amplifier.

I. INTRODUCTION

R

ECENTLY, several studies have been devoted to the in-depth stability analysis of nonlinear circuits such as power amplifiers, oscillators, or frequency dividers [1]–[7]. The interest is prompted by the usual observation of different types of instability phenomena in the characterization of the circuit prototypes. Examples of these phenomena are oscillations at subharmonic or incommensurate frequencies, jumps, and hysteresis, etc. This unexpected behavior has a severe impact in the performance, and increases the design cycles and final cost. Simulation of nonlinear circuits at microwave frequencies generally relies on the harmonic-balance (HB) method due to its efficiency in dealing with distributed elements. This method solves a system of nonlinear algebraic equations in the harmonic components of the state variables. HB can only provide steady-state solutions with no information about their stability properties. Different studies have been proposed to evaluate the stability (in the sense of asymptotic Lyapunov stability [8]) of the large-signal steady-state solutions provided by HB [1]–[4], Manuscript received September 09, 2009; revised December 28, 2009. First published March 08, 2010; current version published April 14, 2010. This work was supported under Spanish Project TEC2008-06874-C03-01 and Spanish Project TEC2009-09874 and by the Spanish Ministry of Science and Innovation under the Ramón y Cajal Programme. F. Ramírez and A. Suárez are with the Departamento de Ingeniería de Comunicaciones, Universidad de Cantabria, Santander 39005, Spain (e-mail: [email protected]; [email protected]). I. Lizarraga and J.-M. Collantes are with Departamento de Electricidad y Electrónica, University of the Basque Country (UPV/EHU), Bilbao E-48080, Spain (e-mail: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2041585

[7], [9]. Other studies [2], [5], [6], [10], [11] have been devoted to detect bifurcation phenomena, i.e., qualitative stability changes when a parameter is continuously modified (analysis of the structural stability). All these previous studies assume a large-signal regime resulting from the pumping of a single continuous wave (CW) input source. However, the overall stability performance of the nonlinear circuit changes in modulated conditions. Under the effect of modulations, the circuit is no longer ruled by the HB system of algebraic equations in the constant harmonic components of the various state variables. These harmonic components are now time varying so the circuit is ruled by an envelope-domain system of differential equations in the time-varying harmonic components of these state variables. Actually, previous studies have demonstrated that the stability properties of a given circuit generally change under modulated or multitone excitations [12], [13]. The edges of the intervals of stable behavior can vary substantially when the CW signal is replaced with a modulated one. Thus, the traditional stability analysis, assuming a single nonmodulated input tone, is insufficient in the presence of a modulated or multicarrier input signals, which is the most common case in nonlinear microwave circuits for communication applications. In this paper, we will develop a formulation for the stability analysis of large-signal steady-state solutions of circuits driven by modulated signals. It will be based on the perturbation analysis of the envelope-transient system, linearized about the modulated steady-state solution. In this manner, we will obtain a perturbed envelope-transient system, with a linear time variant (LTV) nature from which we will derive stability criteria. The stability of the solution can be determined from the analysis of an input–output representation of the system [14], [15]. In particular, an approach based on a time-varying frequency response is proposed here in a similar manner to the one originally introduced by Zadeh [16]. The methodology will constitute an extension of pole-zero identification technique to circuits with modulated signals. As will be shown, once the methodology is well established, it can be applied to the investigation of shifts or even suppression of bifurcation phenomena under modulated conditions and to relate these changes to the characteristics of the modulation signal. Note that the general procedure should comprise two stages. The first stage will be a conventional stability analysis of the large-signal regime in the presence of an input tone. The second stage will be the stability analysis when the input tone is replaced by a modulated signal in order to predict the variation of the stability properties and/or possible shift of existing bifurcation points. This paper is organized as follows. Section II presents the stability analysis of a linear time-varying system through an

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input–output representation. The objective is to establish the foundations of the stability analysis of LTV systems applicable to a modulated steady-state regime. For validation, the formulation is applied to a simple parallel resonance oscillator with a cubic nonlinearity. Section III presents the methodology for the stability analysis of nonlinear circuits with arbitrary modulations, which will be based on an envelope-transient formulation of these circuits. Section IV particularizes the stability analysis to the case of periodic modulation signals. Finally, Section V presents the application of the stability analysis techniques to a 3-GHz power-combined amplifier, considering different types of modulations. II. STABILITY ANALYSIS OF A LINEAR SYSTEM WITH SLOW ARBITRARY TIME VARIATION In the following, we assume a circuit excited with a large time-varying signal. The circuit fulfills the modified nodal differential algebraic equation system [17] (1) with

being the vector of independent voltages and currents, being the vector of charges and fluxes, being the being the vector of vector of independent generators, and resistive currents and loop voltages [17]. For simplicity, we will contains only one time-varying generator with assume that arbitrary time variation and the circuit is nonlinear with respect to this generator. The final goal is to apply an analogous analysis to circuits with modulated signals so we will assume that the frequency of the potential instability is higher than the max. imum frequency in the spectrum of be the resulting steady-state solution. The objective Let is to analyze the stability of this solution. We will consider a small perturbation so the variables are incremented as . Due to the small value of , we can linearize (1) , which provides the following LTV system: about

(2) is The asymptotic stability of the steady-state solution given by the stability of the LTV system in (2) [8]. Note that a system is asymptotically stable if all its transient solutions decay to zero in time. For the practical resolution, the time variable must be discretized. The calculation of the generalized eigenvalues of (2) at each time step, like in a sequence of linear time invariant (LTI) systems, provides a set of time-varying (generalized) eigenvalues. However, contrarily to LTI systems, the stability of a LTV system cannot be, in general, characterized by these time-varying eigenvalues [14]. The approach proposed here to determine the stability of the LTV system will be based on analyzing the bounded-input bounded-output (BIBO) stability of an input–output representation of the system (2). BIBO stability implies that for

any bounded input, the output of the system is bounded [8]. In a similar manner to the LTI case, BIBO stability ensures asymptotic stability of the LTV system (2) provided that controllability and observability conditions are fulfilled [14]. Conditions for BIBO stability of a LTV system can be stated in , which is the response terms of its impulse response of the system at time to a unit impulse applied at the time . The system is BIBO stable if and only if its impulse response is integrable with respect to for all values of [15]. Here, instead of dealing directly with the impulse response , we will introduce the time-varying transfer function defined by Zadeh [16] and derive equivalent conditions for BIBO stability using this transfer function. The time-varying transfer function is defined as the Laplace transform of the LTV system impulse response in the time . The transform of an scale , i.e., integrable function is analytical and bounded in the right half-plane (RHP) and on the imaginary axis. Therefore, if the time-varying transfer function can be accurately represented by a ratio of time-varying polynomials, poles in the RHP or on the imaginary axis for some will imply BIBO instability [18], [19], and thus, asymptotic instability of the steady-state solution. Taking the previous considerations into account, for the stability analysis of a steady-state solution of a circuit excited , we will compute a time-varying with arbitrary signals frequency response associated with the circuit linearization about its time-varying steady-state regime. This response would be analogous to the time-varying transfer function introduced by Zadeh [16]. In order to obtain the time-varying input–output frequency response, we introduce a small-signal at a frequency . The input fretone quency represents the perturbation frequency. It should be varied within the range in which the circuit devices exhibit goes to much higher values gain. Note that the frequency than the spectrum of . Thus, two time scales can be implicitly considered: a slow time scale associated with the and a much faster time scale associated input generator . Taking this into account, with the small-signal tone the vector of perturbed state variables will be expressed , where is at the frequency , varying the bandpass component of at the time rate of the unperturbed solution. Replacing the general expression for the perturbation into (2) and grouping all the terms at the frequency , we obtain

(3) introduces the small-signal tone into the where the vector in the system. Choosing the particular state variable , the integration of the above linear system envector ables the determination of the following input–output transfer function: (4)

RAMÍREZ et al.: STABILITY ANALYSIS OF NONLINEAR CIRCUITS DRIVEN WITH MODULATED SIGNALS

where indicates explicitly that the time-varying inis evaluated at the frequency and has a time crement dependence with the slow time scale associated with the unperturbed solution. The transfer function (4) contains implicit information on the system dynamics. This transfer function will be fitted by means of frequency-domain identification algorithms, as in [4], to get its time-varying poles. , In the particular case of a very slow time-variation of . We can we can also expect very slow variations of then neglect the time derivatives in (3). Assuming the time , the variable has been discretized in the samples solution will approximately agree with the sequence obtained from a of solutions series of consecutive LTI simulations with constant gener. The transfer function ator values in (4) can then be obtained from the sequence of , obtained by lintransfer functions earizing the system about the sequence of steady-state solutions . This time-varying transfer function is known as “frozen” [16], [19]. Note that when the time variincreases, the frozen transfer function will ation rate of no longer constitute an accurate approximation to the system input–output response. This is because the time derivatives in (3) are no longer negligible. However, these time derivatives are taken into account in the function (4) calculated through integration of (3). According to the theory in [15], the range of validity of the frozen approximation can be estimated from the and their derivative with knowledge of the poles of respect to the discrete time . Note that this estimation will be necessary when the stability analysis relies on the frozen transfer-function only. In contrast, the general transfer function (4) allows the stability analysis when the frozen approximation no longer holds. In the following, we illustrate the analysis by means of a simple example (Fig. 1). It is a parallel resonator with cubic nonand a time-varying linearity, containing a dc-bias voltage , in series with the nonlinearity. Initially, we input source have analyzed the circuit in the absence of the time-varying , considering static variations in the bias voltage source . As can be easily be verified analytically, the dc solution V with the ciris unstable for bias voltage below cuit exhibiting an oscillation at about 280 MHz. Fig. 2 shows . At the variation of the oscillation amplitude versus V, an inverse Hopf bifurcation gives rise to the extinction V. of the oscillation, thus the dc solution is stable for in seNext, we consider the time-varying input source . In the presence of this source, we can expect a ries with variation of the stability properties. For the stability analysis of , we connect a small-signal current the circuit excited with in parallel at node 1. Particularizing source (3) to the simple circuit under study, we obtain the following system:

(5)

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Fig. 1. Parallel-resonance nonlinear circuit with a time-varying input, showing the connection of the small-signal current source I (t) = 2I cos t used for the stability analysis. The circuit components are i(v ) = 0:037v + 0:01v + 0:021v , R = 101 , C = 10 pF, and L = 32 nH.

0

Fig. 2. Bifurcation diagram of the circuit in Fig. 1 versus the bias voltage V for v (t) = 0. When increasing the bias voltage, there is an inverse Hopf bifurcation leading to stable behavior V > 0:83 V.

where the voltage increment corresponds to the control voltage of the nonlinear element with being the steady-state voltage across the capacitor . is evaluated at the steady-state timeThe derivative varying solution, which is obtained in the presence of the input . Note that system (5) provides the time-varying source at the frequency , which is the frequency of the phasor small-signal tone introduced for the stability analysis. Unless there is instability at the (slow) time scale of the input signal, will have the same frequency content as the steady state the unperturbed steady-state solution. The time-varying transfer function to be analyzed is given by the ratio between the node voltage and the current introduced as follows: (6) Since all the state variables of a linear system share the same dynamics, except for possible pole-zero cancellations, any other choice for the transfer function should lead to the same stability results. For illustration, we will also define a second transfer function with an input constituted by a voltage source in series with the nonlinearity. The alternative transfer function will now be given by the ratio between the branch current and the voltage introduced as follows: (7)

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Fig. 3. Stability analysis of the circuit in Fig. 1 in the presence of a periodic input signal v (t) of frequency 100 kHz. (a) Time variation of the total input voltage v (t) = v (t) + V . (b) Evolution of the time-varying poles extracted from the pole-zero identification of the two transfer functions H (diamonds) and H (dots).

In the following, we will apply pole-zero identification to the two transfer functions and compare the values of the resulting poles. We will consider two cases, a periodic input source and an arbitrary input signal . will enable the validation of the analysis The periodic technique with the standard stability analysis of large-signal periodic regimes. Note, however, that the analysis based on (3) and (4) can be applied to arbitrary nonperiodic signals. The periodic case is studied first. For the stability analysis, V and introduce the we will fix the bias voltage to time-varying input source . We will conV. sider variations in the frequency with constant In the case of a frozen transfer function, obtained for small frequency , we can expect the stability to vary in terms of the total input amplitude, according to the static bifurcation diagram of Fig. 2. Therefore, we should find a pair of complex conjugate RHP poles for the time interval in which the total is lower input-voltage waveform than 0.83 V. However, as the frequency of increases, the system stability properties will differ from the predictions of the frozen transfer functions. We will consider three values of the kHz. The time evolufrequency . The first value is tion of the critical poles resulting from pole-zero identification , (6), and , (7), are shown in Fig. 3(b), denoted via of dots and diamonds, respectively. As expected, the poles from the two transfer functions are the same. In Fig. 3(a), we have . We can see represented the total input-voltage waveform V, there is a pair of that at time values such that complex conjugate poles on the right-hand side of the complex plane. Thus, the limit value for poles on the RHP is the same as in static conditions (see bifurcation diagram of Fig. 2) and the transfer function is behaving as frozen. MHz. Next we consider the higher frequency value The corresponding time -evolution of the total input waveform

Fig. 4. Stability analysis of the circuit in Fig. 1 in the presence of a periodic input signal v (t) of frequency 10 MHz. (a) Time variation of the total input voltage v (t) = v (t) + V . (b) Evolution of the time-varying poles extracted from the pole-zero identification of the two transfer functions H (diamonds) and H (dots).

and the dominant poles are shown in Fig. 4. Again, unstable poles are found. However, the system is no longer behaving as frozen and the poles do not vary according to the predictions of the static analysis in Fig. 2. The third simulation MHz, shows stable behavior. (Fig. 5), performed for Note that, as expected, the poles from the two transfer functions (6) and (7) are the same in all cases (Figs. 3–5). Performing the same type of analysis, we have determined the limit value of the input-source frequency for unstable behavior, which corMHz. Above this frequency value, the responds to system is stable. The above results have been confirmed with a conventional large-signal stability analysis of the periodic solution at through the obtaining of the Floquet exponents [20]. Instead of using standard time-domain integration, the steady-state solution is now obtained with HB, considering nine harmonic . The procecomponents of the fundamental frequency dure for the stability analysis is identical to that applied in several previous studies for the stability analysis of nonmodulated large-signal periodic regimes [4], [21]. We introduce a small-signal current source at the incommensurate frequency and linearize the HB system about the steady-state periodic with the conversion matrix approach. We apply regime at pole-zero identification to the time-invariant transfer function given by the ratio between the voltage increment at the lower sideband frequency and the current introduced [9] (8) The evolution of the critical poles versus the input frequency with constant input amplitude V and V MHz, is shown in Fig. 6. For input frequency below there is a pair of complex-conjugate poles at about 280 MHz on the right-hand side of the complex plane, thus, the circuit is

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Fig. 5. Stability analysis of the circuit in Fig. 1 in the presence of a periodic input signal v (t) of frequency 11 MHz. (a) Time variation of the total input voltage v (t) = v (t) + V . (b) Evolution of the time-varying poles extracted from the pole-zero identification of the two transfer functions H (diamonds) and H (dots).

Fig. 7. Validation of the stability analyses of Fig. 3 to Fig. 5 with transient simulations. (a) f = 100 kHz, unstable behavior. (b) f = 10 MHz, unstable behavior. (c) f = 12 MHz, stable behavior.

Fig. 6. Conventional large-signal stability analysis of the circuit in Fig. 1 with a periodic input signal. Variations in the signal frequency f have been considered. The analysis is based on the pole zero identification of the LTI transfer function (8).

unstable. At MHz, the pair of poles crosses the imaginary axis to the left-hand side of the complex plane. Thus, the MHz, in total agreeperiodic solution is stable for ment with the analyses of Figs. 3–5. For further validation, we have performed a transient simulation for different values of . The simulations are shown in Fig. 7. As can be seen, the soluMHz. For 10 MHz and lower input tion is stable for frequencies, the solution exhibits a clear high-frequency oscillation within some time intervals. These results confirm the validity of the identification of the time-varying transfer function for the stability analysis of LTV systems. Next we will consider a nonperiodic large input source and we will compare the results of the stability analysis based on (3) and (4) with transient simulations. We take different values in the low-pass spectrum of of the maximum frequency . Fig. 8 shows the time variation (in a given time window) and the resulting time-varying of the total input signal poles, when the maximum frequency in the spectrum of

Fig. 8. Stability analysis of the circuit in Fig. 1 with a nonperiodic input signal = 42 kHz. (a) Time variation of the total input with maximum frequency f signal, for comparison with the static bifurcation diagram of Fig. 2. (b) Evolution of the time-varying poles.

kHz. The pole variation follows the static biis furcation diagram of Fig. 2 so the system behaves as frozen. Next we increase the maximum frequency of the spectrum to MHz. The corresponding results are shown in Fig. 9. As can be seen, there are no poles with a positive real part for any time value so the circuit should be stable. The results of

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we perform a conventional stability analysis [4], suppressing the modulations, and thus, considering periodic input sources. Next, we consider the modulation signals and analyze their effect on the stability properties. Thus, we apply a conventional stability analysis followed by an LTV analysis, as done in the example of Fig. 1. Only the LTV analysis is described in the following. The analysis will be based on an envelope-transient formulation, which will be used for the calculation of the steady-state solution [22]–[25]. Next we will perturb the envelope-transient equations and obtain a system linearized about the modulated steady-state solution. The stability analysis is applied to this linearized time-varying system. A. Steady-State Solution

Fig. 9. Stability analysis of the circuit in Fig. 1 with a nonperiodic input signal MHz. (a) Time variation of the total input with maximum frequency f signal. (b) Evolution of the time-varying poles.

= 42

Microwave circuits containing modulated signals are usually analyzed with the envelope-transient technique [22]–[25]. In this technique, the circuit variables are represented in a Fourier series with slowly varying harmonic terms at the rate of the modulation signals. Thus, the variables will have the general , where is the fundaform denotes any circuit variable. Next, mental frequency and , , and we express the components of the vectors using the Fourier series described and replace the resulting expressions into the modified nodal equation that rules the circuit behavior. Taking into account the orthogonality of the Fourier series, we obtain the following set of differential equations in the slowly varying harmonic terms:

(9)

Fig. 10. Validation of the stability analyses of Fig. 8 and Fig. 9 with trankHz. sient simulations. (a) Oscillatory steady-state waveform for f MHz. (b) Stable steady-state waveform for f

= 42

= 42

where the vectors in capitals are composed by the time-varying harmonic terms of the vectors , , , and , and is a matrix containing the harmonic components of the impulse responses associated with the various distributed is a block elements existing in the circuit. The term diagonal matrix composed of diagonal matrices of the form . is the identity matrix of -order with being the order of the system. B. Stability Analysis

Figs. 8 and 9 have been confirmed with transient simulations. kHz, Fig. 10(a) shows the steady-state waveform for and Fig. 10(b) shows the steady-state waveform for MHz. The former (lower ) exhibits a clear high-frequency oscillation, which is not present in the time-domain sim). ulation of Fig. 10(b) (higher III. STABILITY ANALYSIS OF A MODULATED NONLINEAR CIRCUIT In the following, we present the stability analysis of the modulated solution of a general nonlinear circuit. The optimum procedure to investigate the circuit dynamics is as follows. First,

Let us assume that system (9) exhibits the steady-state solution . The aim will be to analyze the stability of this solution. As in Section II, we will consider a small-signal source , at the frequency , nonharmonically related to the . We assume a small-signal current fundamental frequency source connected in parallel at a circuit node , although the same kind of analysis could be performed using a small-signal voltage source in series connection. We make no assumptions about the range of the frequency , which can take any value up to . As already stated, a conventional stability analysis with a single tone should precede this analysis. Thus, the perturbation frequency will cover the frequency range in which

RAMÍREZ et al.: STABILITY ANALYSIS OF NONLINEAR CIRCUITS DRIVEN WITH MODULATED SIGNALS

instability has been detected with the single tone stability analysis. The perturbed solution will be expressed as follows:

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function as (13)

(10) Due to the small amplitude of the current source, it will be possible to linearize the equation system (9) about the . As in the classical conversion-masteady-state solution trix approach, we limit the perturbation frequencies considered , with the integer, fulfilling , since the to are complex conjugate. After harmonic values for suppression of the steady-state terms, we easily obtain the following linearized system:

(11) where the vector introduces the small-signal tone into the system at the frequency . The form of the different terms in (11) is shown in (12) at the bottom of this page, where denotes either or . The linearized system (11) can be easily integrated to obtain . Note that at each time step, the the increment , are known since matrices they were calculated when obtaining the steady-state solution. System (11) is the envelope-domain equivalent of the full time-domain system (3). at the harConsidering one particular output monic component , we can define a time-varying transfer

Note that it would be equally possible to select a different of the state variable . Even harmonic component is just a tone with though the small-signal introduced constant magnitude at the frequency , the node voltage will necessarily be time varying due to the modulation of the steadyis state regime. As already indicated, the increment calculated through the integration of the linear system (11). This integration is not demanding computationally due to the system linearity and the fact that all the various coefficients are known from the steady-state analysis of the modulated system. For the stability analysis of the perturbed envelope-domain system, we will apply pole-zero identification to the transfer function (13) at each envelope time step. For stability, there should be no poles on the right-hand side of the complex plane at any time instant. As in the LTV case of Section II, the same stability results can be obtained from a time-varying transfer function associated with any other input–output representation, except for pole-zero cancellations. Note that this procedure generalizes the stability analysis of large-signal periodic regimes, presented in [4], to large-signal regimes with modulated signals. For narrowband modulation, we will be in a case analogous to the frozen linear time-varying system considered in Section II. The narrowband modulation will give rise to very in the steady-state slow variations of the envelopes system (9). We can then neglect the time derivative in (11). Assuming the time variable has been discretized in the samples , the solution of the envelope-transient system (9) will approximately agree with the sequence of obtained with a sequence solutions ordinary (static) HB simulations with constant generator values . The transfer function in (13) then agrees with the sequence of transfer functions , obtained by linearizing (9) about the sequence of . This would be steady-state solutions the envelope-domain equivalent of the frozen transfer function considered in Section II.

.. .

.. .

.. .

.. .

.. .

..

.

.. .

..

.

.. . (12)

.. .

..

.

.. .

..

.

.. .

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IV. STABILITY ANALYSIS IN THE CASE OF A PERIODIC MODULATION (15)

In the particular case of a periodic modulation in (11), we can express each harmonic component of the increment vector in a Fourier series as

To perform the convolution of the periodic terms, we define the following elements in (16) and (17), shown at bottom of this page. Equation (11) can then be written as follows:

(14) Applying the Fourier transform to (11), we have

(18) Now we can obtain a frequency-domain transfer function given by the ratio between any harmonic component of any circuit variable and the input

.. . .. .

.. . .. .

(16)

.. .

.. .

..

.

.. .

..

.

.. .

.. .

..

.

.. .

..

.

.. .

..

.

.. .

..

.

.. . (17)

.. .

..

.

.. .

..

.

.. .

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Fig. 12. Conventional large-signal stability analysis of the circuit in Fig. 11 considering a periodic input tone. Variation of the real part of the critical poles versus the input voltage V .

Fig. 13. Variation of the real part of the critical poles of H versus the mod: and different modulation ulation index m for constant amplitude A frequencies between 100 kHz–16 MHz.

= 01

=3

Fig. 11. Demonstrator power amplifier at the carrier frequency f GHz. It consists of a basic power-combined cell, composed of two transistors. (a) Schematic and (b) photograph of the amplifier. The circuit has been built on an RO4003C substrate (h : mm and " : ).

=05

= 3 55

. Except in the case of exact pole-zero cancellations, all these transfer functions share the same poles, as in the case of the stability analysis of periodic (unmodulated) large-signal , , regimes. If we choose the harmonic component the transfer function is the following: (19) Clearly, the poles of the above transfer function will agree with the roots of the determinant of the characteristic matrix associated to (18). Note that unlike the poles of the transfer function (13), the poles of (19) are time invariant. For stability, none of these poles should be located on the RHP. The analysis from (19) should be consistent with the analysis of time-varying transfer function (13). The analysis of the LTI function will predict stable behavior if no poles of the LTV function cross to the right-hand side of the complex plane.

V. APPLICATION TO A POWER AMPLIFIER The stability analysis of nonlinear circuits with modulated signals has been applied to a power amplifier at 3 GHz. It consists of a basic power-combined cell, composed of two BFP405 transistors (Fig. 11). Initially we have performed a conventional large-signal stability analysis [21] with the circuit driven by a GHz. We have periodic signal at the carrier frequency applied pole-zero identification to an impedance transfer function. To calculate this function, we have introduced a smallsignal current source between the base terminals of the two tranis given by the ratio between sistors. The transfer function the voltage across this source and the current introduced. From the analysis of this transfer function, we have detected an undeV. sired frequency division by two, obtained for Fig. 12 shows the variation of the real part of the critical poles versus the input voltage . Following the technique in at [21], we have determined that this instability is odd mode with the subharmonic component 180 out of phase in the two amplifier branches. Next we will consider a periodic modulation. For maximum control of the amplitude variation, enabling comparison with the static diagram in Fig. 12, an amplitude modulation of the input drive is initially chosen. The input signal is represented

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Fig. 14. Analysis of the time variation of the poles of the LTV transfer function and two different modulation frequencies. for fixed modulation index (a) kHz. (b) MHz.

f

= 100

m = 0:15 f = 16

=4

Fig. 16. Filtered -DQPSK modulation. Evolution of the time-varying poles for two values of symbol rate.

Fig. 15. Experimental results in the case of an amplitude modulation. Output spectra for two different values of with . (a) kHz. There is division by two of the input frequency. (b) Expanded view showing the . (c) MHz. No frequency division modulation spectrum about is observed.

f

f =2 f

m = 0:15 f

= 100

= 16

as . Since the modulation signal is periodic, two different analyses are possible. One is based on the determination of the time-varying poles of the LTV

transfer function (13). The second one is based on the determination of the constant poles of the LTI function in (19). In both cases, the input–output representation is obtained by introducing a small-signal current generator between the two base terminals and computing the voltage difference between the two nodes in a similar manner to the conventional stability analysis of Fig. 12. We have analyzed the variation of the critical poles of versus the modulation index for constant amplitude V and different values of the modulation frequency between 100 kHz–16 MHz. This analysis is presented in Fig. 13, which shows the variation of the real part of the critical poles. For small value of the modulation frequency, unstable behavior is . This corresponds to obtained for modulation index the same input amplitude as in the static case of Fig. 12. As the modulation frequency increases, we deviate from this frozen situation. The value of the modulation index that gives rise to the bifurcation decreases with the modulation frequency. Next we have analyzed the time variation of the poles of the LTV transfer function. We have considered a fixed modulaand two different modulation frequencies tion index kHz and MHz. The resulting variations of the poles are shown in Fig. 14(a) and (b), respectively. This is consistent with the diagram of Fig. 13. This shift of the bifurcation has been confirmed experimentally. For illustration, the with output spectra for two different values of are shown in Fig. 15. For kHz, there is a division by two of the input frequency. The expanded view in Fig. 15(b) . The low power is shows the modulation spectrum about

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signals. The procedure is based on the determination of the time-varying poles associated to an input–output representation of the system. Initially, it has been applied to a simple circuit and has been validated with conventional stability analysis (for a periodic input signal) and with transient simulations. Next, the stability analysis of time-varying systems has been extended to circuits containing modulated signals. In this case, the input–output representation is obtained from the linearization of the envelope transient system about the time-varying steady-state solution. The technique has been applied to a power-combined amplifier in which we have observed a remarkable shift of the instability edges with the frequency and type of the modulation signal. The amplifier has been manufactured obtaining very good agreement between simulated and measured results.

Fig. 17. Measurements of the amplifier output spectrum with QPSK modula: Ms/s. A division by two of the input frequency is observed. tion. (a) s (b) Expanded view showing the modulation spectrum about f = . (c) s Ms/s. No frequency division observed.

=01

2

5

=

due to the fact that the subharmonic oscillation is odd mode. Note that even though the divided frequency component is ideally cancelled at the amplifier output, it is actually observed in measurement because of the asymmetries of the two amplifier MHz, no frequency division observed branches. For in agreement with the predictions in Fig. 13. differential quadraFinally, we have considered a filtered ture phase-shift keying (DQPSK) input signal with the same carGHz and two values of symbol rate rier frequency ks/s and Ms/s. In the two cases, the carrier input power is 12 dBm. Since this signal is nonperiodic, the stability analysis can only be performed through the time-varying transfer function in (13). Fig. 16 shows the evolution of the time-varying poles (in a given time window) for the two values Ms/s, the solution is stable, whereas for the of . For lower ks/s, the solution has unstable complex conjugate poles for some time values. These results are successfully compared with the experimental spectra of Fig. 17, obtained for these two values. The expanded view in Fig. 17(b) shows the output spectrum about the divided frequency . VI. CONCLUSIONS The stability analysis of nonlinear circuits has been traditionally limited to the case of periodic inputs. This paper presents a procedure for the stability analysis of linear time-varying systems, applicable to circuits excited with nonperiodic input

REFERENCES [1] V. Rizzoli and A. Lipparini, “General stability analysis of periodic steady-state regimes in nonlinear microwave circuits,” IEEE Trans. Microw. Theory Tech., vol. MTT-33, no. 1, pp. 30–37, Jan. 1985. [2] V. Rizzoli and A. Neri, “State of the art and present trends in nonlinear microwave CAD techniques,” IEEE Trans. Microw. Theory Tech., vol. 36, no. 2, pp. 343–365, Feb. 1988. [3] S. Mons, J.-C. Nallatamby, R. Quere, P. Savary, and J. Obregon, “A unified approach for the linear and nonlinear stability analysis of microwave circuits using commercially available tools,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 12, pp. 2403–2409, Dec. 1999. [4] J. Jugo, J. Portilla, A. Anakabe, A. Suarez, and J. M. Collantes, “Closed-loop stability analysis of microwave amplifiers,” Electron. Lett., vol. 37, no. 4, pp. 226–228, Feb. 2001. [5] S. Jeon, A. Suarez, and D. B. Rutledge, “Global stability analysis and stabilization of a class-E/F amplifier with a distributed active transformer,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 12, pp. 3712–3722, Dec. 2005. [6] S. Jeon, A. Suárez, and R. Rutledge, “Analysis and elimination of hysteresis and noisy precursors in power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 3, pp. 1096–1106, Mar. 2006. [7] F. Di Paolo, G. Leuzzi, and L. Pantoli, “Large-signal stability of oscillators by the conversion matrix method,” in Integr. Nonlinear Microw. Millim.-Wave Circuits Workshop, Nov. 2008, pp. 79–81. [8] H. K. Khalil, Nonlinear Systems. Upper Saddle river, NJ: PrenticeHall, 1996. [9] J. M. Collantes, I. Lizarraga, A. Anakabe, and J. Jugo, “Stability verification of microwave circuits through Floquet multiplier analysis,” in IEEE APCCAS, Tainan, Taiwan, 2004, pp. 997–1000. [10] A. Suarez, Analysis and Design of Autonomous Microwave Circuits. Hoboken, NJ: Wiley, 2009. [11] R. Quere, E. Ngoya, M. Camiade, A. Suarez, M. Hessane, and J. Obregon, “Large signal design of broadband monolithic microwave frequency dividers and phase-locked oscillators,” IEEE Trans. Microw. Theory Tech., vol. 41, no. 11, pp. 1928–1938, Nov. 1993. [12] A. Collado, A. Suarez, and J. M. Collantes, “Large-signal stability analysis of microwave amplifiers under complex modulated signals with time-varying envelope,” in IEEE MTT-S Int. Microw. Symp. Dig., Long Beach, CA, Jun. 2005, pp. 809–813. [13] P. Bolcato, J. C. Nallatamby, C. Rumolo, R. Larchevêque, M. Prigent, and J. Obregon, “Efficient algorithm for steady-state stability analysis of large analog/RF circuits,” in IEEE MTT-S Int. Microw. Symp. Dig., Phoenix, AZ, May 2001, pp. 451–454. [14] W. J. Rugh, Linear System Theory, 2nd ed. Englewood Cliffs, NJ: Prentice-Hall, 1996. [15] C. A. Desoer and M. Vidyasagar, Feedback Systems: Input–Output Properties. New York: Academic, 1975. [16] L. A. Zadeh, “Frequency analysis of variable networks,” Proc. IRE, vol. 38, no. 3, pp. 291–299, Mar. 1950. [17] K. S. Kundert, “Introduction to RF simulation and its application,” IEEE J. Solid-State Circuits, vol. 34, no. 9, pp. 1298–1319, Sep. 1999. [18] L. A. Zadeh, “On stability of linear varying-parameter systems,” J. Appl. Phys., vol. 22, pp. 402–405, 1951. [19] J. E. Gibson, Nonlinear Automatic Control. New York: McGraw-Hill, 1963. [20] M. Farkas, Periodic Motion. New York: Springer-Verlag, 1994.

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[21] A. Anakabe, J. M. Collantes, J. Portilla, S. Mons, and A. Mallet, “Detecting and avoiding odd-mode parametric oscillations in microwave power amplifiers,” Int. J. RF Microw. Comput.-Aided Eng., vol. 15, no. 5, pp. 469–478, Sep. 2005. [22] E. Ngoya and R. Larcheveque, “Envelope transient analysis: A new method for the transient and steady state analysis of microwave communication circuits and systems,” in IEEE MTT-S Int. Microw. Symp. Dig., San Francisco, CA, Jun. 1996, pp. 1365–1368. [23] H. G. Brachtendorf, G. Welsch, and R. Laur, “A novel time-frequency algorithm for the simulation of the steady state of circuits driven by multi-tone signals,” in IEEE Int. Circuits Syst. Symp., Hong Kong, Jun. 1997, pp. 1508–1511. [24] E. Ngoya, J. Rousset, and D. Argollo, “Rigorous RF and microwave oscillator phase noise calculation by the envelope transient technique,” in IEEE MTT-S Int. Microw. Symp. Dig., 2000, pp. 90–94. [25] J. C. Pedro and N. B. Carvalho, “Simulation of RF circuits driven by modulated signals without bandwidth constraints,” in IEEE MTT-S Int. Microw. Symp. Dig., Seattle, WA, Jun. 2002, pp. 2173–2176.

Almudena Suárez was born in Santander, Spain. She received the Electronic Physics degree and Ph.D. degree from the Universidad de Cantabria, Santander, Spain, in 1987 and 1992, respectively, and the Ph.D. degree in electronics from the University of Limoges, Limoges, France, in 1993. She is currently a Full Professor with the Departamento de Ingeniería de Comunicaciones, Universidad de Cantabria. She coauthored Stability analysis of nonlinear microwave Circuits (Artech House, 2003) and authored Analysis and design of autonomous microwave circuits (IEEE, 2009). Her research interests include the nonlinear design of microwave circuits, especially the stability and phase-noise analysis and investigation of chaotic regimes. Dr. Suárez is a member of the Technical Committees of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS) and the European Microwave Conference. She was an IEEE Distinguished Microwave Lecturer (2006–2008).

Ibone Lizarraga received the M.Sc. degree in physics with electronics and Ph.D. degree in control engineering from the University of the Basque Country (UPV/EHU), Bilbao, Spain, in 1994 and 2001, respectively. She is currently with the Electricity and Electronics Department, UPV/EHU, where she has been an Associate Professor since 1998. Her main research activities have been devoted to the analysis and control of mechatronic systems. Her current research interests include the control of singularly perturbed systems and linear and nonlinear system identification. Franco Ramírez was born in Potosí, Bolivia. He received the Electronic Systems Engineering degree from the Antonio José de Sucre Military School of Engineering (EMI), La Paz, Bolivia, in 2000, and the Ph.D. degree in communications engineering from the Universidad de Cantabria, Santander, Spain in 2005. From 1999 to 2000, he was with Ericsson de Bolivia Telecomunicaciones, where he was involved in several projects related to global system for mobile communications (GSM) and time-division multipleaccess (TDMA) technologies. He then joined the Departamento de Ingeniería de Comunicaciones, Universidad de Cantabria, where he is a Research Associate working under the Ramón y Cajal Programme of the Spanish Ministry of Science and Innovation. His research interests include phase noise, stability, and the development of nonlinear techniques for the analysis and design of autonomous microwave circuits.

Juan-Mari Collantes received the Ph.D. degree in electronics from the University of Limoges, Limoges, France, in 1996. Since February 1996, he has been an Associate Professor with the Electricity and Electronics Department, University of the Basque Country (UPV/EHU), Bilbao, Spain. In 1996 and 1998, he was an Invited Researcher with Agilent Technologies (formerly the Hewlett-Packard Company), Santa Rosa, CA. In 2003, he was with the French Space Agency (CNES), Toulouse, France, where he was involved with power amplifier analysis, simulation, and modeling. His areas of interest include nonlinear analysis of microwave circuits and microwave measurement techniques.

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UWB Bandpass Filter Using Cascaded Miniature High-Pass and Low-Pass Filters With Multilayer Liquid Crystal Polymer Technology Zhang-Cheng Hao, Member, IEEE, and Jia-Sheng Hong, Senior Member, IEEE

Abstract—This paper presents a new ultra-wideband (UWB) bandpass filter that is formed by cascading miniature high-pass and low-pass filters implemented with multilayer liquid crystal polymer technology. The miniature high-pass and low-pass filters can be designed independently and the design procedures are described. Experiments are carried out to validate the designs. Small sizes for the fabricated high-pass filter, low-pass filter, and UWB bandpass filter 4.4 mm (0 162 are achieved, which are 4.0 mm 0 178 ), 4.56 mm 4.9 mm (0 185 0 198 ) and 5.1 mm 8.86 mm (0 207 0 359 ), respectively, where is the guided wavelength at 6.85 GHz. Excellent performance is obtained for all the measured filters, including low insertion losses and high selectivity. Due to its simple structure and excellent performance, the proposed UWB bandpass filter is favorable for practical UWB communication and radar systems. Index Terms—Bandpass filter, high-pass filter, liquid crystal polymer (LCP), low-pass filter, microstrip filter, ultra-wideband (UWB).

I. INTRODUCTION

I

N RECENT years, the ultra-wideband (UWB) wireless communication system has received much attention after the authorization of the U.S. Federal Communications Commission (FCC) in February 2002 with the unlicensed use of UWB from 3.1 to 10.6 GHz for indoor and handheld systems [1]. Several techniques for designing UWB filters, which are a key component in UWB systems, have been proposed recently. Among them, the multiple-mode resonator technique, which employs the quarter-wavelength parallel-coupled lines at input/output ports, is used in [2]–[5]. The hybrid microstrip and coplanar waveguide resonant structures are proposed to design the UWB bandpass filter in [6]–[11], and a compact footprint can be achieved by using this technique. However, this type of filter may suffer from strong harmonic response, and its upper Manuscript received March 13, 2009; revised April 27, 2009. First published March 11, 2010; current version published April 14, 2010. This work was supported by the U.K. Engineering and Physical Science Research Council under Contract EP/E02923X/1. The authors are with the Department of Electrical, Electronic and Computer Engineering, School of Engineering and Physical Sciences, Heriot-Watt University, EH14 4AS Edinburgh, U.K. (e-mail: [email protected]; [email protected]. uk). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042632

stopband needs to be further improved. Using the aperture-coupled technique, a three-layer UWB bandpass filter is studied in [12], which requires a complicated design procedure. In [3] and [13], a technique deploying an electromagnetic bandgap structure is proposed, and wide-stopband behavior is reported with increased circuit size. Multiple quarter-wavelength short-circuited stubs are employed in [14]–[16] for designing UWB filters, which may suffer from poor harmonic response and have big circuit sizes. Wideband bandpass filters using cascaded high-pass (or bandpass) and low-pass (or bandstop) filters have been reported [17]–[21] to improve upper stopband performance. Quasi-lumped-element and resonator UWB filters can be designed and implemented using multilayer liquid crystal polymer (LCP) or low-temperature co-fired ceramics (LTCC) circuit technique [20]–[24] to achieve a small footprint. For the comparison, Table I lists some typical UBW filters in terms of the technology, size, and performance. In general, the designs accomplished in a single-layer planar technology can be cost-effective but have a large circuit size. Compared with the single-layer designs, the multilayer designs can be more flexible, resulting in a more compact filtering structure with a smaller footprint, though they require special facilities to handle the manufacturing process. Nonetheless, the cost of the LCP circuit technology is expected to be much lower than that of the LTCC circuit technology. In order to design a small UWB bandpass filter with a compact size smaller than 10.0 mm 10.0 mm on a low-dielectric-constant LCP substrate, a new UWB bandpass filter using cascaded miniature high-pass and low-pass filters with multilayer LCP technology is developed for the FCC-defined UWB indoor limit application, which is reported in this paper. The cascaded high-pass and low-pass filters technique would have the following advantages: • simple design procedure; • small and flat group delay: unlike the resonant-type bandpass filter, the high-pass and low-pass filters have small and flat group in their operation band; hence, by cascading them, small and flat group delay can be achieved for UWB bandpass filter, which is favorable for the linear wideband system; • flexible bandwidth: by properly choosing the cutoff frequencies of high-pass and low-pass filters, flexible passband for radar or communication systems can be achieved, such as 3.1–10.6 GHz for FCC-defined UWB indoor limit and 2.0-18.0 GHz for radar receiver;

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TABLE I COMPARISON OF VARIOUS UWB BANDPASS FILTERS

• easily controllable selectivity on each side of passband by independently adjusting the selectivity of high-pass and low-pass filters. II. LCP LCP is a new and promising thermoplastic material [25], [26]. The LCP film has excellent electrical characteristics such as stable low dielectric constant of 3.15 in a wide frequency range and low loss tangent of 0.002–0.004 at millimeter-wave frequency. It has extraordinary barrier properties comparable to that of glass and low coefficient of thermal expansion. Moreover, it also has low moisture absorption. These characteristics make LCP can be used as both substrate and package material. Two types of LCP films such as bonding film and core film are available with different melting temperatures. In fabrication, by controlling fabrication temperature, the bonding film can bond core films together. Thus, it is possible for LCP film to implement multiplayer architectures. The cost of LCP is comparable to that of conventional printed-circuit-board (PCB) material and is much cheaper than that of LTCC. LCP can package both active and passive devices in compact, vertically integrated RF modules using homogeneous multiplayer dielectric laminations at a low temperature (approximately 290 C), which would be more challenging

850 C for the LTCC technology due to its much higher processing temperature. The unique combination of properties makes LCP technology ideally suitable for designing compact microwave circuits and high density system-in-package applications. III. MINIATURE WIDEBAND HIGH-PASS FILTER A. Design Fig. 1 shows the 3-D structures for proposed miniature high-pass filter, where the one-stage high-pass filter with out-of-plane iniput/output (I/O) ports is shown in Fig. 1(a) while the two-stage high-pass filter using cascaded one-stage high-pass units with in-plane I/O ports is shown in Fig. 1(b). In Fig. 1(b), to achieve a compact size, the middle-layer shunt microstrip lines are short-circuited to the ground by sharing a common via. By using cascaded multiple one-stage high-pass units, one can choose in-plane or out-of-plane I/O ports in the design with improved selectivity, which are flexible and important for the system-in-package application. The proposed filter has three metal layers, including a solid ground plane which is favorable for the system integration. Broadside-coupled patches are used to implement a series capacitor which can realize the desired high-pass behavior. Shunt short-circuited stubs are

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designed inductors and the inductance can be evaluated as follows [28]:

(1) for

(2)

, and represent the length, width, and thickwhere ( m), ness of the high-impedance microstrip line and is the height is implemented by broadof substrate. The series capacitor side-coupled microstrip lines and can be extracted using fullwave simulation by matching the response of a series capacitor represents the capacitance becircuit. The shunt capacitor tween the middle-layer microstrip and ground and can be simply evaluated by (3)

Fig. 1. 3-D structure for the proposed miniature high-pass filter: (a) one-stage with out-of-plane I/O ports; (b) two-stage with in-plane I/O ports; and (c) equivalent circuit (C 1 = 0.76 pF, C 2 = 0.1 pF, L1 = 1.36 nH, and L2 = 1.38 nH).

adopted to implement designed inductors to match the return loss in operation frequency band. As illustrated in Fig. 1, the proposed filter is implemented in a seven-layer LCP substrate and 50- microstrip lines are used for I/O ports. The thickness between the top and middle layers is 100 m, and it is 300 m for the distance between the middle layer and ground. Due to its in-plane I/O ports, the two-stage high-pass filter shown in Fig. 1(b) is adopted for designing UWB bandpass filter in this paper. The design of the proposed high-pass filter can be started from the equivalent circuit shown in Fig. 1(c), which includes two series capacitors, four shunt inductors, and two shunt capacitors. To meet the lower stopband rejection level of the FCC-defined UWB indoor limit, the 10-dB rejection-level cutoff frequency is chosen as 3.1 GHz in the design of the proposed high-pass filter. By using a circuit optimization [27], a desired high-pass response is obtained, and the values of capacitors and inductors are listed in the caption of Fig. 1. In the physical implementation, high-impedance microstrip lines are used to implement the

where and are the width and length of the middle-layer is the thickness between broadside-coupled microstrip line, the ground plane and middle layer, and is the relative dielectric constant of LCP film. Due to the parasitic effects, the simplified lumped-element circuit model in Fig. 1(c) cannot accurately model the proposed structure shown in Fig. 1(b) over an ultrawide frequency band, i.e., 0.0–20.0 GHz. Nevertheless, it is useful to explain the operation and to get the initial geometries for the proposed high-pass filter shown in Fig. 1(b). The proposed prototype is designed on a 0.4-mm-thick LCP substrate which has a dielectric constant of 3.15 and a loss tangent of 0.0025. A full-wave simulator [29] is used to finalize the physical implementation of the proposed two-stage high-pass filter, and the final layouts are shown Fig. 2. Fig. 3 shows the full-wave simulated results compared with equivalent circuit response. The high-pass filter has an ultra-wide 10-dB return-loss bandwidth from 3.7 to 20.0 GHz. For the FCC-defined indoor limit UWB bandpass filter design, a 10-dB cutoff frequency is designed at 3.15 GHz, as illustrated in Fig. 3(a). The topand middle-layer coppers have thicknesses of 18 m, which is comparable to the distance between the top and middle layers. Hence, it has an impact on the performance of the designed filter. Fig. 3(a) also shows the full-wave simulation for the designed two-stage high-pass filter with zero-thickness copper, where a narrower operation bandwidth and bad return loss can be found. This indicates that the copper should be inserted into bonding films in the fabrication. The designed prototype also has a flat group delay which is 0.05 ns at 14.0 GHz with a variation within 0.1 ns from 5.2 to 20.0 GHz. B. Experiment The designed high-pass prototype has been fabricated by using multilayer LCP technology. As shown in Fig. 1(b), three layers of 50- m bonding films with a melting temperature of 290 C are used to bond LCP core films together, which have a melting temperature of 315 C. To achieve the designed

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Fig. 4. Photograph of the fabricated two-stage high-pass filter.

Fig. 2. Layouts for the designed two-stage high-pass filter. (a) Top layer. (b) Middle layer.

fabrication process, laser-drilled alignment holes have been used to maintain the alignment between different layers. In the fabrication, pressure and temperature are carefully controlled in order to insert the copper into melting bonding films for obtaining a good return loss and to avoid squashing bonding films, which results in a changing of substrate thickness. A photograph of the fabricated high-pass prototype is shown in Fig. 4, where a miniature circuit size of 4.0 mm 4.4 mm , where is the guided wavelength at ( 6.85 GHz) is achieved, excluding the 50- microstrip feeding lines. The fabricated filter is measured using an HP8720 vector network analyzer (VNA). An Anritsu 3680 universal test fixture is used to connect the fabricated prototype with the VNA, and the thru-reflect-line calibration technique is adopted to remove the effects of the test fixture from the measurement. Fig. 5 shows the measured and full-wave simulated results of the proposed prototype, where excellent performance and good agreement between the predicted and measured results can be observed. The measured filter has a 10-dB return-loss bandwidth from 3.9 to 20.0 GHz with a 3-dB cutoff frequency of 3.6 GHz and a 10-dB cutoff frequency of 3.24 GHz. As shown in Fig. 5(b), the measured filter also has excellent insertion loss. From 3.9 to 19.90 GHz, the insertion loss is less than 1.0 dB, and, from 4.4 to 13.8 GHz, the measured filter has an insertion loss of 0.35 dB with a ripple within 0.15 dB. From Fig. 5(a), a high selectivity of the filter can also be observed which can strictly meet lower side rejection requirements of the FCC-defined UWB indoor limit. In Fig. 5(c), the measured result shows that the measured filter has a fairly small and flat group-delay response, which is 0.15 ns at 12.0 GHz with a variation within 0.05 ns from 6.0 to 20 GHz, over 87% of the its 10-dB return-loss band. IV. MINIATURE LOW-PASS FILTER

Fig. 3. Full-wave simulation results and circuit responses of the two-stage high-pass filter. (a) S -parameters. (b) Group delay (ns).

thickness, three layers of 50- m core films and one layer of 100- m core film are used in the fabrication. Throughout the

A. Design To achieve a small size for the UWB bandpass filter, a miniature low-pass filter has to be used in a cascaded high-pass and low-pass filter architecture. Although a few low-pass filters have been studied [18], [30], [31], they suffer from poor selectivity or large circuit size and cannot be used to design a miniature low-pass filter on a low dielectric constant LCP substrate with a compact size as small as 5.0 mm 5.0 mm. To this end, an optimum open-stub low-pass filter is used for our design as shown in Fig. 6. For the filter structure of Fig. 6, three transmission zeros can be designed at desired frequencies by letting open stubs have quarter-wave lengths at these frequencies. Since the sharper selectivity results in a larger variation of group delay, the first transmission zero is designed slightly far away from the cutoff

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Fig. 7. Circuit responses and full-wave simulated results for the low-pass filter with different geometries.

TABLE II PARAMETERS FOR THE SIMULATED LOW-PASS FILTERS

Fig. 5. Measurement results for fabricated two-stage high-pass filter. (a) S -parameters. (b) Enlarged view of S . (c) Group delay.

Fig. 6. Transmission-line model for the designed miniature low-pass filter (f = 6.85 GHz; Z = 50 ).

frequency, i.e., 12.0 GHz. The impedances of open stubs can be used to tune the in-band match for a good return loss. With the goals of small in-band return loss, i.e., 20 dB, a cutoff frequency of 10.6 GHz required by the FCC-defined indoor limit, the first transmission zero of 12.0 GHz, and a wide stopband with a high rejection level of 20 dB, the low-pass filter circuit can be designed using a commercially available circuit simulator [27]. Fig. 7 shows the circuit response of studied lowpass filters with different geometries, as listed in Table II. All

of the designed low-pass filters have the same 10-dB cutoff frequency. By tuning the lengths of open stubs, a wide stopband up to 30.0 GHz can be achieved at the cost of degenerated rejection level. On the other side, by keeping the same and cutoff frequency and rejection level, higher impedance of connecting transmission lines results in shorter electrical and , as illustrated in Fig. 7. This indicates that the length impedance of connecting lines should be chosen to be as high as possible in the fabrication to achieve a compact size. Due to its high stopband rejection level, small in-band return loss, and miniature size, the designed prototype low-pass filter II in Table I is chosen for UWB bandpass filter design. To be easily integrated with the designed high-pass filter, the proposed low-pass filter is designed on a 0.4-mm-thick LCP substrate that has a dielectric constant of 3.15 and a loss tangent of 0.0025. Microstrip lines of 50- impedance are adopted as I/O to keep consistent with that of the designed high-pass filter’s input/output. A full-wave simulator [29] is used to finalize the geometries for proposed low-pass filter, and the layout is shown in Fig. 8. The full-wave simulation considering conductor and dielectric losses for the designed low-pass filter II is also plotted in Fig. 7, which agrees well with the circuit response. It can be seen in Fig. 7 that the designed low-pass filter II has a 10-dB cutoff frequency of 10.48 GHz, which meets the requirement of upper cutoff frequency of FCC-defined indoor limit UWB bandpass filter. Three transmission zeros are found at 12.0, 14.0, and 17.0 GHz, respectively, which result in a high rejection level up to 30.0 dB from 11.5 to 18.0 GHz. The rejection level of low-pass filter II increases to 10 dB at 20.0 GHz. Nevertheless,

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Fig. 8. Layout for the designed low-pass filter.

Fig. 9. Photograph of the fabricated low-pass filter.

the designed low-pass filter II can be used for the design of practical UWB bandpass filter with high rejection level and compact sizes. B. Experiment The designed low-pass filter II is fabricated using LCP technology. Fig. 9 shows the photograph of fabricated low-pass filter, which has a very compact size of 4.56 mm 4.9 mm , where is the guided wavelength at 6.85 GHz). The VNA HP8720 is used to measure the fabricated low-pass filter, and the measured results are shown in Fig. 10. In general, good agreements between full-wave simulated and measured results are obtained. The fabricated filter has 3-dB and 10-dB cutoff frequencies at 10.2 and 10.7 GHz, respectively, and a high rejection level up to 30.0 dB can be observed in Fig. 10(a) from 11.6 to 18.0 GHz. As shown in Fig. 9, due to the small fabrication error, the cutoff frequency slightly shifts to higher frequency, and there are small differences between simulated and measured results. A low insertion loss is achieved for the fabricated low-pass filter, as shown in Fig. 10(b). The insertion loss is smaller than 0.2 dB from 0.0 to 8.4 GHz, over 82.3% of its 3-dB bandwidth. The measured group delay is plotted in Fig. 10(c), where a small and flat group delay is observed, which is 0.14 ns with a variation within 0.05 ns from 0.0 to 8.5 GHz.

Fig. 10. Measured results for the fabricated low-pass filter. (a) S -parameters. (b) Enlarged view of S . (c) Group delay.

Fig. 11. Photograph of the fabricated UWB bandpass filter.

V. IMPLEMENTATION OF UWB BANDPASS FILTER By cascading the high-pass and low-pass filters introduced above, a new UWB bandpass filter has been developed with excellent performance. Without any tuning, a 0.3-mm-long 50microstrip line is used to connect the designed high-pass and low-pass filters together. Fig. 11 shows the photograph of the fabricated UWB bandpass filter, which has a very compact size

8.86 mm ( , where is the of 5.1 mm guided wavelength at 6.85 GHz). Fig. 12 shows the measured results for fabricated UWB bandpass filter, where FCC-defined UWB indoor limit is also plotted. It can be seen in Fig. 12 that the fabricated UWB bandpass filter can strictly meet FCC-defined UWB indoor limit, and it

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VI. CONCLUSION In this paper, we have reported the development of a new UWB bandpass filter by cascading high-pass and low-pass filters using multilayer LCP technology. Miniature high-pass and low-pass filters smaller than 5.0 mm 5.0 mm are designed on the low-dielectric-constant LCP substrates, respectively. Experiments are used to verify the designed filters, and the multilayer LCP lamination process is used for the fabrication. The measured high-pass filter has a 3-dB cutoff frequency of 3.6 GHz and can be operated up to 19.9 GHz with a small insertion loss of less than 1.0 dB. The measured low-pass filter has a 3-dB cutoff frequency of 10.2 GHz with a small insertion loss less than 0.2 dB from 0.0 to 8.4 GHz. Excellent performance is obtained for the implemented UWB bandpass filter, including compact size, small insertion loss, good selectivity, small and flat group delay, and high rejection level in stopband. Due to its simple structure and attractive performance, the proposed bandpass filter can be used for practical FCC-defined UWB indoor limit systems. The design can also be extended for radar systems with much wider bandwidth, i.e., 2.0–18.0 GHz. REFERENCES

Fig. 12. Measured results for the fabricated UWB bandpass filter. (a) rameters. (b) Enlarged view of S . (c) Group delay.

S -pa-

has an excellent rejection level at lower stopbands, which is important for practical UWB applications due to the interferences from existing wireless communication systems such as CDMA and GPS. The measured filter has a 3-dB insertion-loss bandwidth from 3.5 to 10.0 GHz and a 10-dB insertion-loss bandwidth from 3.14 to 10.6 GHz. Small insertion loss is obtained for the measured UWB bandpass filter, as shown in Fig. 12(b), where the measured UWB bandpass filter has an insertion loss of 0.35 dB at 5.85 GHz with a variation within 0.15 dB from 3.9 to 9.3 GHz. The measured UWB bandpass filter also has a high rejection level at the upper stopband, which is higher than 29.0 dB from 11.5 to 16.0 GHz. Fig. 12(c) shows the measured group delay for the fabricated UWB bandpass filter. A small and flat group delay can be observed in Fig. 12, which is 0.18 ns at 6.85 GHz with a variation of 0.15 ns from 4.2 to 10.0 GHz, over 89% of its 3-dB bandwidth.

[1] “Revision of part 15 of the Commision’s rules regarding ultra-wideband transmission system,” FCC, Washington, DC, Tech. Rep. ET-Docket 98-153 FCC02-48, 2002. [2] L. Zhu, S. Sun, and W. Menzel, “Ultra-wideband (UWB) bandpass filter using multiple-mode resonator,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 11, pp. 796–798, Nov. 2005. [3] S. W. Wong and L. Zhu, “EBG-embedded multiple-mode resonator for UWB bandpass filter with improved upper-stopband performance,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 6, pp. 421–423, Jun. 2007. [4] K. Song and Y. Fan, “Compact ultra-wideband bandpass filter using dual-line coupling structure,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 1, pp. 30–32, Jan. 2009. [5] P. Cai, Z. Ma, X. Guan, Y. Kobayashi, T. Anada, and G. Hagiwara, “A novel compact ultra-wideband bandpass filter using a microstrip stepped-impedance four-modes resonator,” in IEEE MTT-S Int. Microw. Symp. Dig., 2007, pp. 751–754. [6] H. Wang, L. Zhu, and W. Menzel, “Ultra-wideband (UWB) bandpass filter with hybrid microstrip/CPW structure,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 12, pp. 844–846, Dec. 2005. [7] T. N. Kuo, S. C. Lin, and C. H. Chen, “Compact ultra-wideband bandpass filter using composite microstrip-coplanar-waveguide structure,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 10, pp. 3772–3778, Oct. 2006. [8] N. Thomson and J.-S. Hong, “Compact ultra-wideband microstrip/coplanar waveguide bandpass filter,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 3, pp. 184–186, Mar. 2007. [9] T.-N. Kuo, C.-H. Wang, and C. H. Chen, “A compact ultra-wideband bandpass filter based on split-mode resonator,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 12, pp. 852–854, Dec. 2007. [10] K. Li, D. Kurita, and T. Matsui, “An ultra wideband bandpass filter using broadside-coupled microstrip-coplanar waveguide structure,” in IEEE MTT-S Int. Microw. Symp. Dig., 2005, pp. 675–678. [11] J.-W. Baik, T.-H. Lee, and Y.-S. Kim, “UWB bandpass filter using microstrip-to-CPW transition with broadband balun,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 12, pp. 846–848, Dec. 2007. [12] A. M. Abbosh, “Planar bandpass filters for ultra-wideband applications,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 10, pp. 2262–2269, Oct. 2007. [13] J. Garcia-Garcia, J. Bonache, and F. Martin, “Application of electromagnetic bandgaps to the design of ultra-wide bandpass filters with good out-of-band performance,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 12, pp. 4136–4140, Dec. 2006. [14] J.-S. Hong and H. Shaman, “An optimum ultra-wideband microstrip filter,” Microw. Opt. Technol. Lett., vol. 47, no. 3, pp. 230–233, Nov. 2005.

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[15] W. T. Wong, Y. S. Lin, C. H. Wang, and C. H. Chen, “Highly selective microstrip bandpass filters for ultra-wideband applications,” in Proc. Asia–Pacific Microw. Conf., Nov. 2005, pp. 2850–2853. [16] H. Shaman and J.-S. Hong, “A novel ultra-wideband (UWB) bandpass filter (BPF) with pairs of transmission zeroes,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 2, pp. 121–123, Feb. 2007. [17] C. L. Hsu, F. C. Hsu, and J. T. Kuo, “Microstrip bandpass filter for ultra-wideband (UWB) wireless communications,” in IEEE MTT-S Int. Microw. Symp. Dig., 2005, pp. 679–682. [18] C.-W. Tang and M. G. Chen, “A microstrip ultra-wideband bandpass filter with cascaded broadband bandpass and bandstop filters,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 11, pp. 2412–2418, Nov. 2007. [19] W. Menzel, M. S. Tito, and L. Zhu, “Low-loss ultra-wideband (UWB) filters using suspended stripline,” in Proc. Asia–Pacific Conf., Suzhou, China, Dec. 2005, vol. 4, pp. 2148–2151. [20] C. H. Wu, Y. S. Lin, C. H. Wang, and C. H. Chen, “A compact LTCC ultra-wideband bandpass filter using semi-lumped parallel-resonance circuits for spurious suppression,” in Proc. Eur. Microw. Conf., Oct. 2007, pp. 532–535. [21] C.-W. Tang and D.-L. Yang, “Realization of multilayered wide-passband banspass filter with low-temperature co-fired ceramic technology,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 7, pp. 1668–1674, Jul. 2008. [22] Z.-C. Hao and J.-S. Hong, “Ultra wideband bandpass filter using embedded stepped impedance resonators on multilayer liquid crystal polymer substrate,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 9, pp. 581–583, Sep. 2008. [23] Z.-C. Hao and J.-S. Hong, “Ultra-wideband bandpass filter using multilayer liquid-crystal-polymer technology,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 9, pp. 2095–2100, Sep. 2008. [24] Z.-C. hao and J.-S. Hong, “Compact ultra-wideband bandpass filter using broadside coupled hairpin structures on multilayer liquid crystal polymer substrate,” Electron. Lett., vol. 44, pp. 1197–1198, 2008. [25] D. C. Thompson, O. Tantot, H. Jallageas, G. E. Ponchak, M. Tentzeris, and J. Papapolymerou, “Characterization of liquid crystal polymer (LCP) material and transmission lines on LCP substrate from 30 to 100 GHz,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 4, pp. 1343–1352, Apr. 2004. [26] S. Pinel, R. Bairavasubramanian, J. Laskar, and J. Papapolymerou, “Compact planar and vialess composite low-pass filters using folded stepped-impedance resonator on liquid-crystal-polymer substrate,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 5, pp. 1702–1712, May 2005. [27] “AWR Microwave Office/Analog Office V7.5,” Appl. Wave Res. Inc., El Segundo, CA, 2007. [28] J.-S Hong and M. J. Lancaster, Microwave Filters for RF/Microwave Applications. New York: Wiley, 2001. [29] EM User’s Manual, Version 10. North Syracuse, NY: Sonnet Softw. Inc., 2006.

[30] M. Hsieh and S. Wang, “Compact and wideband microstrip bandstop filter,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 7, pp. 472–474, Jul. 2005. [31] S. Luo, L. Zhu, and S. Sun, “Stopband-expanded low-pass filters using microstrip coupled-line hairpin units,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 8, pp. 506–508, Aug. 2008. Zhang-Cheng Hao (M’08) received the B.S. degree in microwave engineering from XiDian University, Xi’an, China, in 1997, and the M.S. degree and Ph.D. degree in radio engineering from Southeast University, Nanjing, China, in 2002 and 2006, respectively. In 2006, he was a Postdoctoral Researcher with the Laboratory of Electronics and Systems for Telecommunications, École Nationale Supérieure des Télécommunications de Bretagne, Bretagne, France, where he was involved with developing 79.0-GHz antennas for third-generation automotive adaptive cruise control sensors. In 2007, he joined the Department of Electrical, Electronic and Computer Engineering, Heriot-Watt University, Edinburgh, U.K., as a Research Associate. He holds several patents and has authored or coauthored over 40 referred journal and conference papers. He has served as reviewer for several technical journals. His current research interests involve developing the multilayer liquid crystal polymer lamination process, ultra-wideband devices, and highly integrated RF systems for microwave and millimeter-wave systems in package applications.

Jia-Sheng Hong (M’94–SM’05) received the D.Phil. degree in engineering science from Oxford University, Oxford, U.K., in 1994. His doctoral dissertation concerned electromagnetic (EM) theory and applications. In 1994, he joined the University of Birmingham, Edgbaston, Birmingham, U.K., where he was involved with microwave applications of high-temperature superconductors, EM modeling, and circuit optimization. In 2001, he joined the Department of Electrical, Electronic and Computer Engineering, Heriot-Watt University, Edinburgh, U.K., as a Faculty Member leading a team for research into advanced RF/microwave device technologies. He has authored and coauthored over 160 journal and conference papers and Microstrip Filters for RF/Microwave Applications (Wiley, 2001) and RF and Microwave Coupled-Line Circuits (Artech House, 2007, 2nd edition). His current interests involve RF/microwave devices, such as antennas and filters, for wireless communications and radar systems, as well as novel material and device technologies including RF microelectromechanical systems, and ferroelectric and high-temperature superconducting devices.

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Miniaturized Transmission Lines Based on Hybrid Lattice-Ladder Topology Masoud Koochakzadeh, Student Member, IEEE, and Abbas Abbaspour-Tamijani, Senior Member, IEEE

Abstract—This paper introduces hybrid structures with unit cells that are a combination of lattice and ladder topologies. These unit cells dramatically increase the quality factor, miniaturization, and maximum frequency of synthetic transmission lines. Also, it is shown that lattice topologies in general are less vulnerable to the effect of parasitics, such as self resonance of loading capacitors or mutual inductance between different cells. The underlying theory is studied, and simple formulas are given for predicting the behavior of these lines. A few examples are presented that, based on full-wave simulations, show the large gain in miniaturization, quality factor, or bandwidth compared to the simple ladder or lattice structures. Measured results for a fabricated synthetic line are presented that show a miniaturization factor for 0 and a very small of e e dispersive behavior from dc to 2.5 GHz.

=

= 16 5

= 50

Index Terms—Artificial transmission lines, delay line, filters, loaded lines, miniaturization, quality factor, slow wave, synthetic transmission lines, transmission lines.

I. INTRODUCTION IZE OF the transmission lines is usually a matter of concern when it comes to implementing them in planar circuits. Although they can be replaced by equivalent resonators in narrowband devices, in wideband devices the dispersionless characteristics can only be preserved by using actual transmission-line structures. Examples of such application are true time delays and ultra-wideband filters. The common methods to reduce the size of the transmission lines in wideband systems are by capacitively or inductively loading the transmission lines [1]–[4], or using – ladder structures [5], [6] to form synthetic transmission lines. Very large miniaturization factors are achievable by using – topologies. For example, [6] has reported a miniaturization factor of 14. However, the larger miniaturization factors usually have more priority compared with the reduction of losses, therefore, optimization of quality factor, dispersion, and miniaturization are not addressed altogether. Other methods also exist that can yield good narrowband miniaturization by using resonances of left-handed materials with right-handed materials [7] or using photonic bandgap structures that are able to stop the wave over an extremely narrowband region [8]. There are also methods proposed for synthesizing circuits that have the same poles as transmission line stubs in a very wideband

S

Manuscript received March 25, 2009; revised September 05, 2009. First published March 15, 2010; current version published April 14, 2010. The authors are with the Department of Electrical Engineering, Arizona State University, Tempe, AZ 85287 USA (email: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042847

Fig. 1. (a) Topology of a lattice structure. (b) Topology of an structure.

L–C

ladder

frequency range [9], but they do not fully mimic the behavior of transmission lines. Here, the goal is to design miniaturized structures that exhibit wideband transmission-line behavior. Capacitively loaded line structures are simple to implement and are wideband, but they suffer from one major limitation: if very large miniaturization is desired, the line impedance can become very small. Although this can be prevented by increasing the impedance of the host line, dissipations will commonly increase as the width of the host line’s conductors are reduced to achieve higher impedance. Alternatively distancing the conductors of the host line can preserve the , but it will increase parasitic inductance of the loading capacitors and leads to larger dispersive behavior. This points to a basic tradeoff between quality factor and dispersion that is present in all synthetic transmission-line structures. In this paper, we introduce a special unit cell design that can largely relax the mentioned tradeoff in synthetic transmission lines. The proposed unit cells here are hybrid topologies that resemble lattice and ladder blocks but achieve a highly dispersionless behavior. The quality factor can be boosted, and vulnerability to the parasitics can be lessened using these unit cells. II. THEORETICAL ANALYSIS OF THE LATTICE TRANSMISSION LINES A. Mixed Lattice-Ladder Topology (Hybrid Topology) Fig. 1(a) shows a lattice topology with and representing the impedances of the series and cross arms. The image impedance of this structure is found from and is freis an inductor and is capacquency-independent when itor or vice versa. The image impedance is equal to the characteristic impedance of a periodic structure made from these unit cells. The transmission phase of an – lattice topology (with inductors in series arms) is linear close to dc and drops by 180 at very high frequencies. Therefore, the – lattice topology is an all-pass structure with decreasing group delay characteristics [5], [10]. A ladder - structure [Fig. 1(b)], on the other hand, has a cutoff frequency beyond which the image impedance becomes imaginary. The image group delay of such a structure, defined as

0018-9480/$26.00 © 2010 IEEE

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Fig. 2. Hybrid topologies. (a) Lattice with with T-ladder (lattice-T).

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5-ladder (lattice-5). (b) Lattice

the group delay when the unit cell operates between source and load equal to its image impedance, tends to increase with frequency. The opposite trends of the group delays for the ladder and lattice topologies, suggest the possibility of hybrid topologies with wideband delay characteristics. A hybrid block can be obtained by mixing the two topologies. Two possible cases are given in Fig. 2. The characteristic admittance of periodic structures built of such topologies with mixed structure is found from

(1) (2) These equations are found based on the simple methods provided for characterizing the periodic structures in [11, Ch. 8]. They show that: 1) the low-frequency image impedance is simply found from the ratio of and total and 2) there is a cutoff frequency associated with these building blocks after which a periodic structure will no longer support traveling waves. The cutoff frequency is given by

Fig. 3. Group delay and the image admittance of lattice-5 for different values of  and below the cutoff frequency. The solid lines are for the lossless cases and the dotted lines are for lossy structures when all of the passive elements have a quality factor of Q = 10. It is seen that the effect of loss is larger close to the cutoff frequency (peaking frequency). This is not a concern, because normally the cells are operated at frequencies as low as half of the cutoff frequency.

(3) The image group delay is found as

(4)

(5) It can be shown that the group delay is maximally flat if the ratio between lattice capacitance to total capacitance is 0.33 for lattice- and 0.18 for lattice-T. Larger ratios result in a ripple in the group delay that, if tolerated, leads to a wider bandwidth. Figs. 3–6 show how the characteristics of the line change when the unit cell in either topology is morphed from a ladder to a lattice topology. It is seen that hybrid structures can achieve a wideband dispersionless behavior (even at presence of loss). The wider bandwidth allows for the implementation of larger delay per cell values, that means shorter lines for fixed cell size, or larger cells and improved for fixed total length.

0

Fig. 4. y  contour plots for the lattice-5. The thicker lines correspond to  contours. The thinner lines correspond to frequency contours. The dash–dotted line indicates the minimum group delay point on the  contours.

A simple comparison between the two different implementations reveals that the lattice- case is more wideband compared

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B. Parasitic Effects 1) Mutual Inductances: The mutual inductive effects between the inductors of different cells in planar implementations must also be taken into account. They are the inevitable result of physical proximity in miniaturized structures. Especially for the lattice case, the crossovers between diagonal arms introduce extra mutual inductance and capacitance. The mutual couplings may reduce or increase the bandwidth. General formulation of coupling is quite complicated for the hybrid cases. In simple lattice or ladder topologies, however, it is easy to find the group delay at the presence of coupling. By assuming a phase difference of between every two cells in the periodic structure, the mutual inductive effects can be taken into account, and their effects can be summed up and simplified considering the symmetries. In this case, we have

(6) for the lattice structure and

(7)

Fig. 5. Group delay and the image admittance of lattice-T for different values of  and below the cutoff frequency. The solid lines are for the lossless cases and the dotted lines are for lossy structures when all of the passive elements have a quality factor of Q .

= 10

0 

Fig. 6. y  contour plots for the lattice-T. The thicker lines correspond to  contours. The thinner lines correspond to frequency contours. The dashed–dotted line indicates the minimum group delay point on the  contours.

to lattice-T. However, for printed circuit board (PCB) implementations, lattice-T may lead to simpler structures.

represents the total coupling for the ladder structure, where from the th cell located after the current cell and is a linear combination of mutual couplings between the two cells (Fig. 11). Later, in Section IV-B, an example will compare the effect of mutual couplings in lattice and ladder cases, showing that coupling in a lattice structure can increase the bandwidth while it has an opposite effect in the ladder topology. 2) Series Parasitic Inductance of the Loading Capacitors: The series inductance associated with the capacitors can also reduce the bandwidth. As the frequency approaches the self-resonance of the loading capacitors, the effective value of capacitance increases, causing phase compression and more dispersion. This effect is larger for a pure ladder topology, as the group delay of such a topology is compressive even with no parasitics. The lattice topology is more immune to such parasitics in terms of phase, thanks to its expansive group delay. Fig. 7 compares this effect for the lattice and ladder cases for normalized component values. As a comparison, here the change in the maximum allowable dispersion frequency % (the frequency at which there is a 10% error in the group delay compared to the dc) is used. 3) Series Inductance of the Transitions Between Lattice Elements: When physically implementing the lattice topologies, the lattice loading capacitors either will be accompanied by a large series inductance (to connect the two ends of lattice diagonally) or they will be shifted inward to reduce their parasitics and this in turn will reduce the lattice portion of inductances (Fig. 8) which can be seen as a hybrid structure. Interestingly, this problem is the dual of the hybrid- discussed earlier with .

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Fig. 7. Effect of parasitic inductance of the capacitors. The horizontal axis shows the ratio between the self-resonant frequency of the capacitors normal= L C . The vertical axis shows the ized to the angular frequency ! ratio between maximum frequency of the case with parasitics to that of the case without parasitics. Here, the maximum frequency is defined as the frequency at which the group delay reaches a 10% error. The solid curve shows the behavior of a lattice topology and the dashed curve is for a ladder topology. The jump in the curve is because of the ripple in the group delay responses.

=2 p

For planar square loops, it is observed that, if all dimensions including the width of conductor trace are scaled with scaling factor , the inductance and quality factor will both be approximately scaled by the same factor since the stored energy scales with volume and the metallic losses with the surface area. Now and , referring to Fig. 4 and for the largest value of is found to be 0.32 Hz, corresponding to , which is 2.5 times higher than of the pure ladder and three times larger than that of the pure lattice. This means that, if equal bandwidth and equal miniaturization factor are required, the hybrid structure can offer 2.5 times better compared to the ladder if is chosen as the maximum. Alternatively, this means that can be chosen to be 2.5 times larger for the hybrid case resulting in a line with only 40% of the length for a given total delay and same (if cell sizes are considered to be equal). Also, one can observe the behavior by going from ladder to lattice. To the first order, the of a synthetic transmission line made from two-port building blocks with a given matrix can be shown to have the following form [11]: (9) For the hybrid topologies (latticethis yields

and lattice-T topologies),

(10) (11) Fig. 8. Lattice topology with L inductors added as the transitions between lattice cells. This is dual of hybrid- which is shown in Fig. 2(a).

5

III. MINIATURIZATION AND QUALITY FACTOR and miniaturFor a line having characteristic admittance ization factor , the inductance and capacitance per unit length are given by

, and

’s and

and . These two are very good approximation up to frequencies as high as the cutoff frequency. It should be noted that, at low frequencies, the following approximation holds for both cases: (12) IV. EXAMPLES

(8) m/s. If the desired bandwidth of the system where , the group delay per cell is simply found from is , where is the edge frequency in the normalized unit cell, that can be found from the dispersion requirements quantified by , and using the graphs of Figs. 4 and 6. The physical length of each cell is calculated as , leading to the unit cell capacitance and inductance of and . Assuming that lumped and can be realized, there is no limit to miniaturization. However, a large means smaller sizes that in practice translates to lower . It was mentioned earlier that, by using the hybrid lattice-ladder topology, a wider bandwidth is achievable (large ), hence leading to larger unit cells and higher . To test the validity of this statement, a simplistic example is presented.

are element

A. Scaling Properties and Comparisons There are four parameters to set for the transmission lines, , and . To study the theory presented, here we will focus on maximizing either , or in a hybrid design, while the rest are kept similar to the values for a ladder topology. As a figure of merit, one can define a miniaturization efficiency that will be shown to be larger for the hybrid structures. 1) Maximizing the Miniaturization Factor: The study here is based on circuit simulation of unit cells containing ideal capacitors and full-wave simulated lossy inductors using ADS1 Momentum. Assuming that the acceptable impedance and group delay variations are less than 30%, from Fig. 4, it is concluded that, for both lattice and ladder topologies, and 1ADS

2004A, Agilent Technologies Inc., Palo Alto, CA.

KOOCHAKZADEH AND ABBASPOUR-TAMIJANI: MINIATURIZED TRANSMISSION LINES BASED ON HYBRID LATTICE-LADDER TOPOLOGY

Fig. 9. Three inductors in free space used in the unit cell of: (a) a ladder or lattice topology, (b) a hybrid topology, and (c) the scaled version of case (a) as presented in Section IV-A2.

TABLE I SUMMARIZED BEHAVIOR OF THE EXAMPLES DISCUSSED IN SECTIONS IV-A1 AND IV-A2 AND SHOWN IN FIG. 9

= 50

953

= 10 5

Fig. 10. Four different synthetic lines having Z : . (a) and n Ladder1. (b) Ladder2. (c) Hybrid1. (d) Hybrid2. Small arrows show the current path, capacitor signs show the capacitive overlaps, and the inductor signs show the parasitic inductances.

TABLE II SUMMARIZED BEHAVIOR OF THE FOUR EXAMPLES IN FIG. 10 FOR f : GHz

= 25

best hybrid- topology has and . For designing lines with 50 and 1 GHz, a miniaturization factor of 10 can be obtained for the ladder or lattice cases with a unit cell length of 6.3 mm and total loading capacitors of 8.4 pF. An inductor design is shown in Fig. 9(a). The simulated is 52 at 1 GHz. For hybrid- , if cell size is kept the same scales up to , a quality factor of 68 is achievable with total loading capacitors of 15.6 pF [Fig. 9(b)]. Although this simulation is highly idealized in the sense that it does not consider loss in capacitors (which is normally smaller compared to inductive losses) or parasitic effects from self-resonance of capacitors and mutual inductances between cells (which were shown to be less important in the lattice type topologies), it confirms the fact that hybrid structures benefit from higher miniaturization efficiency. 2) Maximizing Q: Alternatively, we can keep , and the same and maximize of the artificial transmission line. Again following the procedure mentioned in the previous subsection, for , and GHz, and having 30% acceptable variations for characteristic admittance and the group delay, based on full-wave simulation of inductors, the ladder and lattice topologies have for 6.3-mm-long cell sizes. By scaling all of the planar dimensions of the inductors, we can have a hybrid design with the scaled cell size of 11.7 mm that boosts to 96 while maintaining [Fig. 9(c)]. The total loading capacitance scales to pF in this case. The values of and cell size for the ladder and two hybrid cases are summarized in Table I. 3) Maximizing the Bandwidth: To complete the comparison, here we try to maximize or, equivalently, compare the dispersive behavior of different lines for similar , and . This equivalency is because of the near monotonic dispersive behaviors with respect to frequency. Fig. 10 shows four planar designs with the characteristic impedance of 50 and miniaturization factor of that are optimized for minimum dispersion in dc–2.5 GHz. All of these designs are balanced topologies and can be characterized as centrosymmetric. The metal conductors of the synthetic lines are on the opposite sides of a 0.127-mm substrate with . Capacitive loads are implemented as parallel-plate capacitors. The design in Fig. 10(a) is

a ladder topology based on slots as loading inductors. However, for the longer slots, the current practically concentrates on the outer edges of the host line, giving rise to a parasitic inductance in series with the loading capacitors and hence highly dispersive behavior. The design in Fig. 10(b) shows a modified ladder structure that alleviates this problem by cutting the horizontal current path and forcing the current to travel through inductors in series with the line. The design in Fig. 10(c) presents a hybrid topology. The loading capacitances are distributed along the crossover areas. Thanks to the wideband characteristics of hybrid topology, the unit cells are larger in this implementation. The design in Fig. 10(d) is merely scaled version of that in Fig. 10(c) that achieves a higher at the expense of having larger dispersion. These structures have been simulated using ADS Momentum. The simulated values of and delay errors are shown in Table II. The hybrid topologies clearly outperform the ladder topologies in both regards. B. Effect of Mutual Inductance A ladder structure is compared with a lattice topology. Both periodic structures are composed of parallel inductive metallic conductors 0.3 mm wide and mm apart. Ideal capacitors are assumed for the loading of the lines. The conductors are located on the opposite sides of a 1.52-mm substrate with . Fig. 11 shows the group-delay behavior for different values of coupling. The coupling here is found from empirical formulas fitted to ADS Momentum simulation of many parallel lines. The adjacent lines have negative mutual coupling and alternate nonadjacent lines have positive mutual coupling. It is seen that bandwidth shrinkage is larger for the ladder topology. C. Experimental Example Fig. 12 shows a hybrid transmission-line design that has been designed for implementing a very wideband stub filter with periodic characteristics (to miniaturize the design presented in [12]).

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Fig. 11. Effect of mutual coupling on the bandwidth of the lattice (blue line) and ladder (dash–dotted black line) topologies. The horizontal axis shows the center to center distance between adjacent conductors. The vertical axis shows the ratio between maximum frequency of the case with mutual inductances to that of the case without any mutual inductance. Here, the maximum frequency is the frequency at which the group delay reaches a 10% error. For and , and, for (7), (6), and .

m = (M +M )=L L = L(1 + M ) 0M )=L L = L(1 0 M ) m = (M

Fig. 13. Measured results for the synthetic line. (a) Characteristic impedance. The simulations and measurement points are taken at odd multiples of quarter wavelength for the best accuracy. (b) Miniaturization factor. (c) Quality factor.

Fig. 12. Topology of the synthetic line. (a) Photograph of the line. (b) Side view ( 2.59 mm, 0.127 mm, and 1.52 mm) (c) Top view of three different layers. One of the plates of capacitors lies on M2 and the others lie on M1. The via holes shown in white connect different layers. The transition sections are shown in dashed rectangles.

h1 =

h2 =

h3 =

The quality factor was maximized while achieving very large miniaturization . The unit cells are closer to a pure lattice. This reduces the adverse effects of the parasitic inductances added by implementing the capacitors on a PCB, as explained in Section II-B2. The two conductors of the synthetic line are fabricated on the opposite sides of a stack of two substrates. One substrate has low dielectric constant and is sufficiently thick (1.54-mm RO3003 with ) to distance the two conductors and allow large inductances and high-quality factors. The second substrate has a high dielectric constant and is very thin (0.127 mm RO3010 with ), suitable for realizing compact parallel-plate capacitors. The top plates of the loading capacitors are connected

through via holes to the upper conductor of the synthetic line, and the bottom plates are a part of the lower conductor. Compact capacitors have two merits: 1) have a smaller parasitic inductance and 2) limit the current through the capacitor plates and hence suppress the parallel-plate modes that can lower the of the capacitor. Fig. 13(a)–(c) shows the behavior of this line. Here, is found from [11] (13) The synthetic line is sandwiched between two metallic planes to prevent radiations. FoamClad substrates that are 2.59 mm thick are used for mounting the ground planes. The two planes are electrically connected through numerous via holes to prevent parallel plate mode in between. The detailed topology is shown in Fig. 12.where and are the impedances seen from one port while the other port is open-circuited or short-circuited, respectively. At odd multiples of 90 , this has the best accuracy. The miniaturization factor is found

KOOCHAKZADEH AND ABBASPOUR-TAMIJANI: MINIATURIZED TRANSMISSION LINES BASED ON HYBRID LATTICE-LADDER TOPOLOGY

based on the transmission phase each frequency

of this structure of length at (14)

where m/s. This synthetic line shows a 10% dispersion in the miniaturization factor. This is partly because of the transition section from the coplanar strips to the synthetic line which adds an inductance to be compensated with a capacitance and is overall similar to an – structure. Also, it must be noted that, because of this transition, the loading capacitances should be tuned slightly. In this structure, the loading capacitances of the first two cells after the transition were slightly tuned to obtain a good impedance match. In Fig. 13, the results are shown for the case with transitions as well as the one where the transitions have been calibrated out. As it is seen, there is a slight difference between the measured and simulated characteristic impedance data. To find the reason, we also simulated the effect of over-etching on the behavior of the line. As it is seen, a 50- m over-etch reduces the differences at low frequencies. The miniaturization factor is smaller when the effect of extra transmission lines which are attached to the synthetic line to reach to the probe pads are taken into account. The calibrated versions, however, show the net effect of the synthetic line. Fig. 13(c) shows the quality factor of the designed line. It is seen that the is smaller than what is expected. As explained earlier, the lines must be located inside of a metallic box to avoid radiation. Because of the differential design of the lines, however, the use of a balun is necessary to ground the box. Here, the experiment does not have the balun included. Therefore, radiation and as well penetration of waves into the probe-station’s stage (which is made of stainless steel) is possible. It is seen that radiation can partly be responsible for a smaller quality factor. Also, the effect of surface roughness on top of RO3010 (which has a granular surface that would add to the roughness of copper traces) and the lossy bonding films could be the other causes of reduction in quality factor. Ladder structures also were designed to compare with the hybrid topologies. It was observed that the ladder lines are as well and to the same extent subject to the reduction in quality factor. This indicates that, on this PCB, both ladder and hybrid structures would suffer at the presence of the aforementioned adversary effects. V. CONCLUSION It was shown that the tradeoff faced between the dispersion behavior and quality factor of a miniaturized line can be relaxed by using hybrid structures whose unit cells combine lattice and ladder topologies. It was also shown that these topologies can be more resistant to the parasitic effects, such as self-resonance of loading capacitors or mutual inductance between different cells. Several examples were provided to validate the theoretical claims and show the gain in the miniaturization figure of merit. It was shown that, for the regime in which is linearly proportional to dimensions (mostly limited to low ’s), the hybrid topologies can benefit from larger unit cells having larger ’s. A possible application of the theory presented can be for the miniaturization of low-frequency filters, couplers, delay lines, and on-chip transmission-line components.

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REFERENCES [1] A. Abbaspour-Tamijani, L. Dusspot, and G. M. Rebeiz, “Miniature and tunable filters using MEMS capacitors,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 7, pp. 1878–1885, Jul. 2003. [2] C.-C. Chen and C.-K. C. Tzuang, “Syntehtic quasi-TEM meandered transmission lines for compacted microwave integrated circuits,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 6, pp. 1637–1647, Jun. 2004. [3] I.-C. H. Lai and M. Fujishima, “High- slow wave transmission line for chip area reduction on advanced CMOS processes,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 6, pp. 1637–1647, Jun. 2004. [4] A. Sayag, D. Ritter, and D. Goren, “Compact modeling and comparative analysis of silicon-chip slow-wave transmission lines with slotted bottom metal ground planes,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 4, pp. 840–846, Apr. 2009. [5] E. A. Guillemin, Communications Networks, Volume II. New York: Wiley, 1935. [6] Y. Zhang and H. Y. D. Yang, “Ultra slow-wave periodic transmission line using 3-D substrate metallization,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2008, pp. 891–894. [7] M. A. Antoniades and G. V. Eleftheriades, “Compact linear lead/lag metamaterial phase shifters for broadband applications,” IEEE Antennas Wireless Propag. Lett., vol. 2, pp. 103–105, 2003. [8] M. F. Yanik and S. Fan, “Stopping light all optically,” Phys. Rev. Lett., vol. 92, no. 8, pp. (083901)-1–(083901)-4, Feb. 2004. [9] J. W. Phinney, D. J. Perrault, and J. H. Lang, IEEE Trans. Power Electron., vol. 22, no. 4, pp. 1531–1541, Jul. 2007. [10] J.-S. Hong and M. J. Lancaster, Microstrip Filters for RF/Microwave Applications. New York: J. Wiley, 2001. [11] R. E. Collin, Foundations for Microwave Engineering. New York: McGraw-Hill, 1992. [12] M. Koochakzadeh and A. Abbaspour-Tamijani, “A multi-resolution channel-select filter with ultra-wide frequency coverage,” in IEEE MTT-S Int. Microw. Symp. Dig., Atlanta, GA, Jun. 2008, pp. 431–434.

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Masoud Koochakzadeh (S’03) received the B.S. and M.S. degrees from the University of Tehran, Tehran, Iran, in 2003 and 2005, respectively, and is currently working toward the Ph.D. degree in electrical engineering at Arizona State University (ASU), Tempe. He has been a Research Assistant at ASU since Fall 2005. During the Summer of 2008, he was with Rambus Inc. as an Intern. His research interests include microwave and RF circuit design, RF MEMS, quasi-optical systems, antenna design, and acoustics. Mr. Koochakzadeh is a member of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S). He was the recipient of the 2008 IEEE MTT-S Fellowship Award.

Abbas Abbaspour-Tamijani (S’00–M’04–SM’09) received the B.S. and M.S. degrees from the University of Tehran, Tehran, Iran, in 1994 and 1997, respectively, and the Ph.D. degree from The University of Michigan at Ann Arbor, in 2003, all in electrical engineering. He was an Antenna and RF Engineer from 1996 until 1999. In 2004, he became a Research Fellow with the Radiation Laboratory, The University of Michigan. He is currently an Assistant Professor of Electrical Engineering with Arizona State University (ASU), Tempe. His research focuses on novel device concepts for reconfigurable radio systems including beam-steerable and reconfigurable antennas and ultra-wideband tunable filters, vibrating and nonvibrating RF MEMS technologies for communications and sensing, multifunctional millimeter-wave modules, and biological applications of microwaves. His research is funded by the National Science Foundation, the National Institutes of Health, the Defense Advanced Research Projects Agency (DARPA), and industry. Dr. Abbaspour-Tamijani is a member of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S), the IEEE Antennas and Propagation Society (IEEE AP-S), and the IEEE Engineering in Medicine and Biology Society. He was a recipient of the DARPA Young Faculty Award in 2008.

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Corrugated Microstrip Coupled Lines for Constant Absolute Bandwidth Tunable Filters Mohammed A. El-Tanani, Student Member, IEEE, and Gabriel M. Rebeiz, Fellow, IEEE

Abstract—This paper presents corrugated coupled lines for miniaturized fixed and tunable microstrip bandpass filters. The novel approach uses microstrip corrugated coupled-line concept to synthesize a coupling coefficient, which maintains a nearly constant absolute bandwidth across the tuning range. A miniaturized two-pole varactor tuned filter is demonstrated with a frequency 3 dB with a coverage of 1.32–1.89 GHz and an insertion loss constant 1-dB bandwidth of 70 4 MHz across the tuning range. In addition, a three-pole comb-line 4.7% fixed filter at 1.94 GHz shows a 3:1 resonator spacing reduction over the conventional approach with an insertion loss of only 1.1 dB. This technique will allow the design of miniaturized small bandwidth fixed and tunable microstrip filters. Index Terms—Comb-line filter, constant bandwidth tunable filter, miniature planar filter, tunable filter, varactor diodes.

I. INTRODUCTION UE TO their potential to significantly reduce system size and complexity for multiband communication systems, RF tunable filters have received recent attention. Different planar technologies for the tuning have been reported: 1) semiconductor (silicon, GaAs) varactor diodes; 2) p-i-n diodes; 3) ferroelectric varactors; and 4) RF microelectromechanical systems (RF-MEMS) devices. Frequency agility has been the main focus in research on tunable filters with little attention given to preserve the absolute bandwidth characteristics across the tuning range. Hunter et al. [5] demonstrated a two-pole strip-line tunable comb-line filter at 3500–4500 MHz with a 3–5-dB insertion loss and a 200 20-MHz absolute bandwidth. The analysis showed that constant absolute-bandwidth filters can be achieved for resonators having 53 electrical length at the mid-band frequency. However, the analysis is based on strip-line technology, and this is not applicable to a microstrip-line case with high dielectric constant substrates, due to the even- and odd-mode phase velocity mismatches. In addition, the 53 electrical length requirement has the draw

D

back of requiring high capacitance ratio to achieve wideband tuning range. Park et al. [6] recently demonstrated two-pole tunable filters with predefined bandwidth characteristics at 850–1300 MHz with an insertion loss of 3–1 dB and an absolute bandwidth of 43 3 MHz. However, this work cannot be extended to a higher order tunable filter in planar technology. Sanchez et al. [7] demonstrated bandwidth control of comb-line filters by inserting a coupling reducer between the comb-line resonators. This, however, increases the complexity and size of the filter. Kuo et al. [8] used corrugated coupled lines to suppress the harmonic response in parallel coupled filter. Uysal et al. [9] used wiggly lines to compensate for the odd characteristic of coupled transmission lines in directional couplers. Filho et al. [10] used corrugated lines to result in fixed frequency shifting without physically changing dimension. In this paper, a mixed coupling scheme is introduced with the corrugated coupled-line concept. A full study of the coupling characteristics is done and results in synthesis of constant absolute bandwidth tunable filters. The proposed filter has two additional transmission zeroes using source–load coupling, which result in improved attenuation characteristics for all tuning states. In addition, this paper utilizes the corrugated coupled-line principle to demonstrate a fixed miniaturized comb-line filter. The corrugations introduce distributed electric coupling, which is in antiphase with the conventional magnetic coupling and results in reduced resonator spacing for moderate to narrow-bandwidth comb-line filters. II. CORRUGATED MICROSTRIP LINES Fig. 1 presents a corrugated coupled-line structure with a unit cell . For and , the corrugations are approximated as a periodic coupling capacitance loading the coupled transmismatrix for a unit sion lines. The associated even and odd cell without taking into account any transmission-line losses is (1)

Manuscript received May 04, 2009; revised November 06, 2009. First published March 25, 2010; current version published April 14, 2010. This work was supported by the Center of Wireless Communications, University of California at San Diego. M. A. El-Tanani was with the Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA 92093 USA. He is now with the Intel Corporation, Hillsboro, OR 97124 USA (e-mail: [email protected]). G. M. Rebeiz is with the Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA 92093 USA (e-mail: [email protected]) Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042517

(2) (3) where and are the corresponding even- and odd-mode characteristic admittances and electrical lengths of the uncorruand are the added even- and gated coupled lines, and odd-mode capacitance per finger introduced by corrugations. and are approximated to the first order when

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Fig. 3. Corrugated coupled lines with a loading capacitor C .

by simulating a line of seven unit cells in Sonnet [16] and then fitting the corresponding even- and odd-mode characteristics. and calculated using [11], as well as simulations and extracted from Sonnet [16] are also presented. extracted full-wave simulation values are done by simulating 14 fingers and finding the total even- and odd-mode capacitance , divided by the number of fingers. The calculated , , from [11] are all within 4% of the full-wave simulated and values. The -matrix of two coupled resonators having cascaded is (Fig. 3) unit cells loaded with a tuning capacitor Fig. 1. (a) Corrugated coupled lines. (b) Electrical model.

(5) (6) and (7) The coupling coefficient

of the resonators is (8)

where

(9) Fig. 2. Full-wave and calculated corrugated coupled lines even- and odd-mode characteristic impedances and electrical lengths.

as , where are the static even- and odd-mode capacitance per unit length of a periodic array of coupled lines [11]. The unit cell even- and odd-mode characteristic admittance and electrical length can then be written as

(4)

Fig. 2 shows the fitted and calculated even- and odd-mode impedances and electrical lengths for a unit cell with mm, mm, m, mm, mm, and mm on a substrate with and thickness of 0.625 mm. The full-wave results are obtained

is not only a function of the The coupling coefficient resonators spacing , but also a function of . This property of corrugated coupled lines can be used to reduce the resonators spacing. For miniaturized filters, high dielectric constant substrates are used to reduce the resonators size and thick substrates are also used to reduce the conductive losses. However, thick substrates results in an increase in the resonator spacing for narrow and moderate bandwidth filters. Fig. 4(a) shows the on the spacing for conventional comb-line dependence of substrates ( , coupled resonators on pF, and GHz). For a 5% filter with 0.05-dB Chebyshev prototype, a spacing of 4 and 2 mm is required on a 1.27- and 0.6-mm-thick substrate, respectively. Using corfF, the same coupling rugated-coupled lines with coefficient can be achieved with a spacing of 1.0 and 0.5 mm for a substrate thickness of 1.27 and 0.63 mm, respectively [see Fig. 4(b)], resulting in substantial size improvement. It is also

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Fig. 4. Coupling coefficient k variation. (a) Conventional resonator versus spacing s. (b) Corrugated coupled versus C ( : ,Z ,C GHz). : pF, and f

1 18

=2

= 10 2

= 55

=

seen that changes from magnetic to electric coupling for increasing values of . In addition, the corrugated coupled-line structure can achieve is inversely proconstant absolute bandwidth filters, where portional to the center frequency. For a given electrical length, is synthesized by controlling the even- and odd-mode finger capacitance and choosing the width, length, and gap between variation versus center frequency for the corrugations. The is shown in Fig. 5(a) for different corrugations capacitance , . Fig. 5(b) presents the percentage change of the filter bandwidth normalized to the minimum bandwidth across the tuning range. It is clear that for the strip-line case, an optimum length of 53 results in the lowest bandwidth change [5]. , However, for a microstrip line on a high substrate it is not possible to get constant absolute bandwidth characteristics for an octave tuning even at longer electrical lengths. A and corrugated coupled line with nine unit cells fF and fF results in 20% bandhaving width change across an octave tuning, and is the same as the 53 stripline resonators (note that for conventional lines with 40 electrical length, the corresponding change in bandwidth is fF and fF, the for a mi80%). With at mid-band results in a capacitance crostrip line with ratio of 5.2 for octave tuning [see Fig. 5(c)]. The corresponding for the 53 stripline case is 0.36–2.9 pF, which is a capacitance ratio of 8.0. A. Three-Pole Fixed Filter Design The proposed miniaturized three-pole fixed filter is shown in Fig. 6(a). The method introduced in [12] together with full-wave

Fig. 5. (a) k versus frequency with different C . (b) Percentage change of the bandwidth normalized to . (c) f versus the loading capacitance C . C fF in all simulations.

= 15

BW

simulations is used to for the filter design. Source–load coupling is also introduced for improved rejection characteristics. The external coupling is done by choosing the tapping posi. The response of a 6% tion and the matching capacitors 0.05-dB ripple three-pole Chebyshev conventional comb-line filter [shown in Fig. 6(b)] and the corresponding miniaturized , substrate filters are compared in Fig. 7. In this case, mm with a base resonator width of 1.2 mm thickness , and a simulated at 2 GHz. The convenmm and the two miniaturtional comb-line filter results in mm and mm. The ized filters are simulated with transmission zero on the upper frequency side is pushed closer

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Fig. 8. Electrical circuit model of the miniaturized two-pole filter.

It is seen that the miniaturized filter is 50% smaller in size as compared to the conventional design (Fig. 6). A more compact filter can be achieved using direct tapping and removing . The simulated insertion loss is 1.4 and 1.0 dB for the conventional and miniaturized designs, respectively. The insertion loss for the miniaturized filter is 0.4 dB better for the same return-loss level and resonator lengths and widths due to the corrugations, which effectively synthesize a wider resonator. III. TUNABLE FILTER DESIGN Fig. 8 shows the proposed miniature two-pole tunable filter. The even- and odd-mode admittances seen from ports A and B are defined by Fig. 6. Three-pole comb-line filter. (a) Corrugated s tional s mm. Figures are to scale.

=3

= 1 mm. (b) Conven-

(10) (11) (12) (13)

(14) (15) (16) (17) (18) (19) Fig. 7. Simulated S for conventional and miniaturized comb-line filters, S is

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X Ku

W

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High-Selectivity Tunable Bandpass Filters With Harmonic Suppression Xiu Yin Zhang, Member, IEEE, and Quan Xue, Senior Member, IEEE

Abstract—This paper presents harmonic-suppressed tunable bandpass filters with two movable transmission zeros. For tunable bandpass filters, tuning the passband frequency will cause the harmonic to shift, complicating the harmonic suppression. To overcome this problem, lumped elements are utilized to realize harmonic suppression without degrading passband performance. It is found from theoretical analysis that at even-order harmonic frequencies, the lumped elements could not only decrease the resonator and dissipate RF power, but also control even-order impedance and cause mismatching at filter input/output ports. Both of the factors help reject even-order harmonics. Meanwhile, the features at fundamental resonant frequencies are nearly not affected by these elements, indicating harmonic suppression could be achieved without affecting passband performance. This property is experimentally verified by comparing the responses of tunable bandpass filters with and without harmonic suppression. Finally, a harmonic-suppressed tunable bandpass filter with constant bandwidth and passband shape is designed. A novel input and output coupling structure with a bandpass response is employed to maintain constant bandwidth and help reject both evenand odd-order harmonics. For each tuning state, two transmission zeros are created near the passband, ensuring high selectivity. Index Terms—Bandpass filters, harmonic suppression, impedance mismatching, transmission zeros, tunable filters, varactors.

I. INTRODUCTION LECTRICALLY tunable bandpass filters are required in many multiband wireless communication and wideband radar systems. In response to this need, much research has been conducted and different tuning devices have been employed. Thanks to the high tuning speed and reliability, diode varactors are widely utilized in tunable filter design [1]–[10]. For instance, Hunter and Rhodes utilized varactors to tune passband frequency within a wide frequency range [1]. Recently, microelectromechanical system (MEMS) components attract much

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Manuscript received April 28, 2009. First published March 15, 2010; current version published April 14, 2010. This work was mainly supported by the Research Grants Council of Hong Kong Special Administrative Region, China, under Grant CityU122407, in part by the Special Fund from the Central Collegiate Basic Scientific Research Bursary of SCUT under Grant 2009ZZ0066, and by the National NSFC–NSAF under Grant 10976010. X. Y. Zhang was with the State Key Laboratory of Millimeter Waves, Department of Electronic Engineering, City University of Hong Kong, Hong Kong. He is now with the School of Electronic and Information Engineering, South China University of Technology, Guangzhou 510640, China (e-mail: [email protected]). Q. Xue is with the State Key Laboratory of Millimeter Waves, Department of Electronic Engineering, City University of Hong Kong, Hong Kong. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042844

attention due to their high and high linearity [11]–[14]. However, the maturity of RF-MEMS technology limits their application. Tunable filters can also be implemented using piezoelectric transducers and ferroelectric devices [15]–[17]. No matter what kind of tuning devices is used, tunable bandpass filters may suffer from poor harmonic suppression [9]. To our knowledge, this issue is rarely addressed. In terms of harmonic responses, tunable filters are quite different from the nontunable counterparts. With the change of passband frequency, the harmonics will also shift. It is thus difficult for conventional methods to reject them. By way of example, if the passband of a half-wavelength resonator filter can be tuned within a wide fre, the range of second harmonic is nearly quency range . In this situation, the double that of passband, i.e., method of introducing a transmission zero at the harmonic frequency [20], [21] may be inefficient because it can only suppress the harmonics around a specific frequency. Another way to overcome this obstacle is to cascade a low-pass filter [5]. How, ever, if the frequency tuning range is very wide, e.g., the passband and second harmonic could be very close to each other or even overlapped. In this case, the method of cascading a low-pass filter is not applicable. Selectivity is another critical issue for tunable filters. For nontunable bandpass filters, the selectivity can be improved by introducing transmission zeros near the passband. However, the passband of the tunable bandpass filter is not fixed, but movable. Hence, the transmission zeros are required to move along with the passband. To overcome this obstacle, Chung et al. [8] utilized varactor-loaded stubs to generate tunable transmission zeros. However, two sets of varactors, as well as bias circuits are required to tune the passband and transmission zeros separately, leading to complicated design and inconvenient tuning. In [18] and [19], two movable transmission zeros are realized to achieve high selectivity. No measures, however, are taken to obtain constant bandwidth or harmonic suppression. In this paper, harmonic-suppressed tunable bandpass filters with two movable transmission zeros are presented. Lumped elements are used to suppress harmonic responses. From theoretical analysis, it is found that the lumped elements could be used to control impedance and cause mismatching at even-order harmonic frequencies at filter input/output ports, which can be used to reject even-order harmonics. Moreover, the elements could at the even-order harmonic frequenalso reduce resonator cies, and hence, reduce harmonic level. Meanwhile, the lumped elements almost do not affect resonator characteristics at fundamental resonant frequencies. Hence, harmonic suppression is achieved without degrading passband performance. This work is quite different from that in [22], where only resistors are

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is the capacitance of the varactor, and is where half the electric length of the transmission line. From the reso, the odd-mode resonant frenance condition of quencies can be determined by

(2)

Fig. 1. (a) Structure of the proposed resonator. (b) Odd-mode equivalent circuit. (c) Even-mode equivalent circuit.

utilized for the single purpose of dissipating RF power at evenorder harmonics. In contrast, capacitors, inductors, and resistors are used here to realize not only power dissipation, but also impedance mismatching at even-order harmonic frequencies. Furthermore, the input and output coupling structure exhibits a bandpass response, and thus helps reject both even- and odd-order harmonics. In addition, these elements produce less impact on the passband performance than the resistors do in [22]. To demonstrate the proposed design, tunable bandpass filters with and without harmonic suppression are implemented and compared. Finally, a tunable filter with the second, third, and fourth harmonic suppression is implemented. A novel input and output coupling network is employed to maintain constant bandwidth and help reject both even- and odd-order harmonics.

II. CHARACTERISTICS OF THE PROPOSED RESONATOR The configuration of the proposed resonator is shown in Fig. 1. It consists of a transmission line, two varactors, a capacitor, and a resistor. This transmission line could be microstrip, coplanar waveguide, or other transmission lines. In the analysis, it is assumed to be a lossless microstrip line of the characteristic admittance and length . Two varactors are attached at the open ends of the microstrip line. The series-connected capacitor and resistor are placed at the line center. Since this resonator is symmetrical in structure, an odd- and even-mode method is applicable to the analysis. Similar to the analysis in [22], the equivalent circuits can be obtained as shown in Fig. 1(b) and (c). For the odd-mode equivalent circuit, if the parasitic elements of the varactors are ignored for simplicity, the input admittance is (1)

where is the phase velocity. The fundamental odd-mode resonant frequency can be utilized as the passband frequency. It is observed this frequency depends on the capacitance of the varactor. Changing the bias voltage of the varactor will result in various passband frequencies, enabling the tunability of passband frequency. Moreover, the odd-mode resonant frequencies are not affected by the capacitor and resistor, as indicated by (2). For the even-mode equivalent circuit, the input admittance is shown in (3) at the bottom of this page. Some observations can be made here. Firstly, the even-mode input admittance depends on the value of the capacitor and resistor placed at the resonator center, whereas the odd-mode admittance does not, as indicated by (1) and (3). This means the two elements can be utilized to control the impedance at evenorder harmonic frequencies without affecting the impedance at odd-order resonant frequencies. When this resonator is used to design filters, mismatching at even-order harmonic frequencies could be caused between filter ports and 50- transmission line if the proper capacitor and resistor are employed. Thus, the harmonics could be reflected back, resulting in reduced harmonic responses. of the even-mode circuit could Secondly, the unloaded be reduced without affecting that of the odd-mode circuit. The even-mode resonance condition is that the imaginary part is equal to zero. It can be observed that there are sufficient degrees of freedom to break the condition. If we choose a resistor and/or a capacitor not fulfilling the requirement, the even-mode resonance will not occur, and in turn, the even-order harmonics will be affected. To examine the effect in detail, the of the even-mode equivalent circuit is studied. As stated above, the transmission line and varactor are assumed to be lossless. Therefore, if the resistor is removed, there would be no power loss in the circuit, and consequently, would be infinite. With the resistor introduced, can be obtained from (3) as (4), shown at the bottom of the following page. It can be easily deduced from (4) that a positive will result in a finite . This means adding the resistor could reduce the of the even-mode equivalent circuit. In this case, some power at the even-order harmonic frequencies would be dissipated by the resistor, and thus, the even-order harmonics could be reduced. On the other hand, the resistor does

(3)

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not affect at odd-mode resonant frequencies, as indicated by (1). It is noted that the impedance mismatching and resonator reduction at even-order harmonic frequencies can be obtained even if the capacitor is not employed. Herein, it is necessary to discuss the function of the capacitor. At odd-mode resonant frequencies, the voltage at the line center is zero and no power is delivered to the resistor. However, the voltage is zero only at the distinct resonant frequencies, but not over a band of frequencies. Hence, some signals near the odd-mode resonant frequencies will be delivered to the resistor, and thus, the resonator at these frequencies is reduced. To prevent the reduction, RF signals around fundamental resonant frequency should be blocked. On the other hand, to control the impedance and at even-order harmonic frequencies, the RF signals should be delivered to the resistor. As a result, a tradeoff should be made between the two requirements. A capacitor is utilized to realize it, which exhibits much higher impedance at fundamental resonant frequency and lower impedance at the second harmonic. In general, it is seen from the analysis that odd-mode resonant frequencies could be electrically tuned. Without affecting odd-mode resonant characteristics, the even-order harmonics could be suppressed in the following two manners. When the impedance at even-order harmonic frequency is mismatched to 50 , some portion of the harmonics could be reflected back. If the harmonics have been input into the filter, some portion of the power could be dissipated by the resistor. Either of the two manners could play the dominant role to suppress the harmonic, depending on filter configurations. III. VERIFICATION OF THE PROPOSED RESONATOR To verify the analytical results, a tunable filter with harmonic suppression is implemented and compared to the counterparts. A. Filter Implementation Fig. 2 depicts the filter configuration. This is a two-order microstrip filter. Four identical varactors are attached at the ends of the two microstrip lines. The silicon varactors are SMV1763 from Skyworks Solutions Inc., Woburn, MA. At the center of each line, a capacitor and a resistor are loaded. The input/output ports are tapped at the resonators. Two capacitors are embedded in the feeding lines, functioning as a dc block. The design methodology is similar to that of open-loop resonator filters [16], [22], [23]. The substrate used in this design has a dielectric constant of 6.15 and a thickness of 0.635 mm. After simulation, the parameters are determined as follows: mm, mm, mm, mm, mm, mm, mm, pF, , and pF.

Fig. 2. Configuration of the harmonic-suppressed tunable filter.

The simulation and measurement are accomplished by using Agilent Technologies’ Advanced Design System (ADS) and 8753ES network analyzer, respectively. Fig. 3 illustrates the simulated and measured results for several typical bias voltages from 1 to 8.5 V, which agree fairly with each other. The measurement shows that the passband frequency can be tuned within a wide range from 0.95 to 1.48 GHz. The insertion loss ranges from 1.6 to 4.1 dB with the passband return loss greater than 10 dB. As the passband shifts downwards, the insertion loss becomes higher. This is because the microstrip line becomes electrically shorter and the parasitic resistor of [3]. the varactor is larger, decreasing the overall resonator The loss can be reduced by using high- GaAs or MEMS varactors instead of the silicon ones, or by incorporating negative resistance circuits to compensate [4]. For each bias voltage, two transmission zeros are realized near the passband to achieve sharp roll-off. The two transmission zeros moves along with the passband. As expected, the harmonics over the frequency range from 2.0 to 3.2 GHz are suppressed below 15 dB. Note that the return loss is not close to zero within this range. This is due to the fact that some RF power is dissipated by the resistors, as detailed in [22]. B. Comparison and Discussion The analysis indicates that harmonic suppression could be achieved without degrading passband performance. For validation, the implemented filter is compared to the counterpart without harmonic suppression. The filter has the same configuration as the above one, except that the capacitors and resistors loaded at line center are removed. Fig. 4 compares the measured responses of the two filters. It can be seen that the second harmonic rejection level is enhanced by 15–18 dB. Fig. 4(b) illustrates the passband insertion loss of the two filters. For each bias voltage, the insertion losses are nearly the same, indicating that the resonator at fundamental resonant frequencies is of a negligible difference in the two cases. Meanwhile, the attenuation

(4)

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Fig. 4. Comparison of the measured responses with and without harmonic suppression. (a) Wideband responses. (b) Passband insertion loss.

Fig. 3. Responses of the tunable filter using the modified resonator. (a) Simulation. (b) Measurement.

levels of the filters with and without harmonic suppression are nearly the same at corresponding transmission zeros. From the comparison, it can be concluded that the passband performance is preserved, while the second harmonics are suppressed. This filter outperforms the harmonic-suppressed filter described in [22]. In that design, the harmonic is suppressed at the cost of slight performance degradation, i.e., increased insertion loss and reduced attention level at lower transmission zero. IV. TUNABLE BANDPASS FILTER WITH CONSTANT BANDWIDTH AND HARMONIC SUPPRESSION For frequency-tuned bandpass filters, it is desirable to maintain a constant fractional bandwidth [9], [15] or constant absolute bandwidth [1], [6], [9], [19], depending on applications. In this design, a harmonic-suppressed tunable filter is implemented with a constant fractional bandwidth of 9.5% and passband shape based on the proposed resonator. To keep the fractional bandwidth constant, the inter-stage are required coupling coefficient and external quality factor to be frequency independent [9], [15]. As for the inter-stage coupling, both electric and magnetic coupling are involved [19],

[23]. The net coupling strength can be kept nearly unchanged by properly adjusting the physical dimensions of the coupling , a lumped inductor and a structure. To maintain constant lumped capacitor are cascaded in the input/output coupling network, as shown in Fig. 5. The principle used is similar to that discussed in [9] and [19]. The two elements resonate at the passband frequency range of the tunable filter. Hence, they almost have no effect on the impedance at passband frequencies. However, they do not resonate at second harmonic frequencies, and thus, the impedance at these frequencies may be greatly affected. As analyzed in Section II, the even-mode impedance can also be controlled by the capacitor and resistor loaded at line can be center. This means the four elements utilized to control the impedance at second harmonics. As a result, impedance mismatching could be caused. In this case, some harmonics could be reflected back, which helps reject the spurious responses. Simulation and experiment are conducted to validate the promm, posed design. The filter parameters are as follows: mm, mm, mm, mm, mm, pF, pF, nH, . Fig. 6(a) compares the simulated voltage and standing-wave ratio (VSWR) at a typical bias voltage of 3.2 V. It can be observed that it is well matched at a passband frequency of 1.25 GHz in all the cases. When the elements placed at the and , are removed, the filter is matched to line center, i.e.,

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Fig. 5. Configuration of the constant-bandwidth tunable filter.

Fig. 7. Responses of the tunable filter with constant bandwidth. (a) Simulation. (b) Measurement.

Fig. 6. (a) Simulated VSWR. (b) Simulated responses of the filter without C and R .

50 at the second harmonic frequency of 2.6 GHz. In this case, the second harmonics can be neither reflected, nor absorbed, and thus, cannot be suppressed, as illustrated in Fig. 6(b). When the and elements in the input and output coupling networks, i.e., , are eliminated, the circuits are also matched at 2.6 GHz. The second harmonic can be input into the filter and some power can be dissipated by the resistors. In consequence, the harmonic can be rejected to some extent. The simulated responses are similar to those in Fig. 3. Only when all the elements are included, the

circuits are mismatched at 2.6 GHz with VSWR around 50, indicating all the four elements contribute to the impedance mismatching. As a result, the second harmonics could be either reflected back or dissipated. Since both the two factors contribute to the harmonic suppression, the rejection levels would be higher than the previous one. Fig. 7 depicts the simulated and measured results, which are in reasonable agreement. The measurement shows that the passband frequency can be tuned from 0.94 to 1.44 GHz, featuring a fractional tuning range of 42%. Within this tuning range, the fractional bandwith varies from 9.8% to 9.3% with a maximum variation of 0.5%. Therefore, the predefined 9.5% constant fractional bandwidth has been obtained. It should be mentioned that other bandwidth can also be realized by adjusting the input/ output coupling network and inter-stage coupling. Meanwhile, the passband shape is nearly unchanged under all tuning states. The insertion loss ranges from 1.6 to 3.9 dB with a return loss of greater than 15 dB. Two transmission zeros are created near the passband. They move synchronously with the passband, guaranteeing sharp roll-off for all tuning states. The second- and fourth-harmonic responses are rejected by around 30 and 40 dB

ZHANG AND XUE: HIGH-SELECTIVITY TUNABLE BANDPASS FILTERS

for all tuning states. As expected, the rejection levels are higher than the previous one because both impedance mismatching and power dissipation contribute to the harmonic suppression. The third-harmonics are suppressed by 15 dB. This is attributed to the input and output coupling structure, which exhibits bandpass responses, and thus, helps reject the harmonics. The input third-order intermodulation intercept point (IIP3) is measured at 3.2-V bias with 1-MHz frequency spacing. The measured IIP3 is around 15 dBm. V. CONCLUSION High-selectivity tunable bandpass filters with harmonic suppression have been presented. Both the theory and experiments have been described. Impedance mismatching and power dissipation are utilized to reject second harmonics. The experimental results agree with the theoretical predictions, showing that the passband can be tuned within a 43.5% frequency range with constant fractional bandwidhth and passband shape. Although the harmonics shift across a wide frequency range, the second, third, and fourth harmonics can be suppressed with nearly no passband performance degradation. For all tuning states, two transmission zeros are realized near the passband, ensuring high selectivity. The circuit for harmonic suppression is compact, making it suitable for miniaturized applications. REFERENCES [1] I. C. Hunter and J. D. Rhodes, “Electronically tunable microwave bandpass filters,” IEEE Trans. Microw. Theory Tech., vol. MTT-30, no. 9, pp. 1354–1360, Sep. 1982. [2] Y. H. Shu, J. A. Navarro, and K. Chang, “Electronically switchable and tunable coplanar waveguide-slotline bandpass filters,” IEEE Trans. Microw. Theory Tech., vol. 39, no. 3, pp. 548–554, Mar. 1991. [3] A. R. Brown and G. M. Rebeiz, “A varactor-tuned RF filter,” IEEE Trans. Microw. Theory Tech., vol. 48, no. 7, pp. 1157–1160, Jul. 2000. [4] D. K. Paul, M. Michael, and K. Konstantinou, “MMIC tunable bandpass filter using a ring resonator with loss compensation,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 1997, pp. 941–944. [5] H. J. Park et al., “A new varactor-tuned microstrip ring bandpass filter with harmonic suppression,” in Asia–Pacific Microw. Conf., Dec. 2000, pp. 1127–1130. [6] E. Pistono, L. Duvillaret, J.-M. Duchamp, A. Vilcot, and P. Ferrari, “Improved and compact 0.7 GHz tune-all bandpass filter,” Electron. Lett., vol. 43, no. 3, pp. 165–166, Feb. 2007. [7] B. W. Kim and S. W. Yun, “Varactor-tuned combline bandpass filter using step-impedance microstrip lines,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 4, pp. 1279–1283, Apr. 2004. [8] M.-S. Chung, I.-S. Kim, and S.-W. Yun, “Varactor-tuned hairpin bandpass filter with enhanced stopband performance,” in Asia–Pacific Microw. Conf., Dec. 2006, pp. 645–648. [9] S.-J. Park and G. M. Rebeiz, “Low-loss two-pole tunable filters with three different predefined bandwidth characteristics,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 5, pp. 1137–1148, May 2008. [10] M. Sanchez-Rendo, R. Gomez-Garcia, J. I. Alonso, and C. Briso-Rodriguez, “Tunable combline filter with continuous control of center frequency and bandwidth,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 1, pp. 191–199, Jan. 2005. [11] H. T. Kim, J. H. Park, Y. K. Kim, and Y. Kwon, “Low-loss and compact V -band MEMS-based analog tunable bandpass filters,” IEEE Microw. Wireless Compon. Lett., vol. 12, no. 11, pp. 432–434, Nov. 2002. [12] A. Abbaspour-Tamijani, L. Dussopt, and G. M. Rebeiz, “Miniature and tunable filters using MEMS capacitors,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 7, pp. 1878–1885, Jul. 2003. [13] K. Entersari and G. M. Rebeiz, “A differential 4-bit 6.5–10-GHz RF MEMS tunable filter,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 3, pp. 1103–1110, Mar. 2005. [14] K. Entersari and G. M. Rebeiz, “A 12–18 GHz three-pole RF MEMS tunable filter,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 8, pp. 2566–2571, Aug. 2005.

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[15] I. Vendik, O. Vendik, V. Pleskachev, A. Svishchev, and R. Wordenweber, “Design of tunable ferroelectric filters with a constant fractional bandwidth,” in IEEE MTT-S Int Microw. Symp. Dig., 2001, pp. 1461–1464. [16] L.-H. Hsieh and K. Chang, “Tunable microstrip bandpass filters with two transmission zeros,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 2, pp. 520–525, Feb. 2003. [17] J. Nath, D. Ghosh, J.-P. Maria, A. I. Kingon, W. Fathelbab, P. D. Franzon, and M. B. Steer, “An electronically tunable microstrip bandpass filter using thin-film barium-strontium-titanate (BST) varactors,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 9, pp. 2707–2712, Sep. 2005. [18] X.-P. Liang and Y. Zhu, “Hybrid resonator microstrip line electronically tunable filter,” in IEEE MTT-S Int Microw. Symp. Dig., 2001, pp. 395–398. [19] G. L. Matthaei, “Narrow-band, fixed-tuned, and tunable bandpass filters with zig–zag hairpin-comb resonators,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 4, pp. 1214–1219, Apr. 2003. [20] S. Sun and L. Zhu, “Periodically nonuniform coupled microstrip-line filters with harmonic suppression using transmission zero reallocation,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 5, pp. 1817–1822, May 2005. [21] W.-H. Tu and K. Chang, “Compact second harmonic-suppressed bandstop and bandpass filters using open stubs,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 6, pp. 2497–2502, Jun. 2006. [22] X. Y. Zhang and Q. Xue, “Novel centrally loaded resonators and their applications to bandpass filters,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 4, pp. 913–921, Apr. 2008. [23] J. S. Hong and M. J. Lancaster, Microwave Filter for RF/Microwave Application. New York: Wiley, 2001. [24] R. Levy, R. V. Snyder, and S. Shin, “Bandstop filters with extended upper passbands,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 6, pp. 2503–2515, Jun. 2006. Xiu Yin Zhang (S’07–M’10) was born in Hubei Province, China. He received the B.S. degree from the Chongqing University of Posts and Telecommunications, Chongqing, China, in 2001, the M.S. degree from the South China University of Technology, Guangzhou, China, in 2006, and the Ph.D. degree from the City University of Hong Kong, Hong Kong, in 2009, all in electronic engineering. From 2001 to 2003, he was with the ZTE Corporation, Shenzhen, China. From July 2006 to June 2007, he was a Research Assistant with the City University of Hong Kong. He is currently an Associate Professor with the School of Electronic and Information Engineering, South China University of Technology, Guangzhou, China. His research interests include RF and microwave passive and active circuits, and microstrip antennas. Quan Xue (M’02–SM’04) received the B.S., M.S., and Ph.D. degrees in electronic engineering from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 1988, 1990, and 1993, respectively. In 1993, he joined UESTC, as a Lecturer. He became an Associate Professor in 1995 and a Professor in 1997. He was bestowed with the title of Distinguished Academic Staff for his contribution to the development of millimeter-wave components and susbsystems. From October 1997 to October 1998, he was a Research Associate and then a Research Fellow with the Chinese University of Hong Kong. In 1999, he joined the City University of Hong Kong, where he is currently an Associate Professor and the Director of the Applied Electromagnetics Laboratory. Since May 2004, he has been the Principal Technological Specialist of the State Integrated Circuit (IC) Design Base, Chengdu, Sichuan Province, China. He has authored or coauthored over 150 papers He was the co-supervisor of two IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS) Best Student Paper contests (third place 2003 and first place 2004). His current research interests include antennas, smart antenna arrays, active integrated antennas, power amplifier linearization, microwave filters, millimeter-wave components and subsystems, and monolithic microwave integrated circuit (MMIC) RF integrated circuits (RFICs). Dr. Xue is the IEEE MTT-S regional coordinator of IEEE Region 10.

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Balanced Bandpass Filters Using Center-Loaded Half-Wavelength Resonators Jin Shi and Quan Xue, Senior Member, IEEE

Abstract—This paper presents a balanced filter that is designed by using the center-loaded half-wavelength resonator. To demonstrate the design ideas, the differential- and common-mode equivalent half circuits are built and studied. The proposed technique is novel in the way that the common-mode suppression can be made independent of the differential-mode response in the balanced filter, making use of a center-loaded half-wavelength resonator. This is very important to simplify the design and tuning processes of the balanced filters. Making use of this feature, the resonator is not only utilized to design the balanced single-band bandpass filter but also the balanced dual-band bandpass one, possibly being the first to be presented. To demonstrate the design ideas, one single-band and two dual-band balanced filters are presented. The experimental results agree well with the theoretical predictions and simulations. Index Terms—Balanced filter, center-loaded half-wavelength resonator, common-mode suppression, dual band, independent tuning, single band.

I. INTRODUCTION

B

ALANCED circuits have become more and more important in the modern communication systems because of their relatively high immunity to environmental noise when compared with that of the single-ended ones. Some differential feeding antennas have been reported [1], [2]. A balanced filter, as a basic component in the wireless system, is also required. Much effort has been paid to the designs of the balanced bandpass filter so that it can achieve the desired bandpass frequency response in differential operation and reduce the level of the common-mode noise at the same time. However, previous reported works [3], [4] on balanced filters suffer from poor common-mode suppression. With the use of the double-sided parallel-strip line [5], the common-mode suppression was improved, with the price of increasing the circuit size. Other common-mode suppression methods such as the use of coupled line resonators [6], coupled stepped-impedance resonators [7], and multisection resonators [8] are also reported. However, all of the balanced bandpass filters [3]–[8] are only for single-band applications. With the ever-increasing demands for dual-band and multiband wireless systems, much attention has been paid to devices Manuscript received June 17, 2009; revised December 24, 2009. First published March 29, 2010; current version published April 14, 2010. This work was supported by the Research Grants Council of the Hong Kong SAR, China, under Grant CityU122407. The authors are with the State Key Laboratories of Millimeter Waves, City University of Hong Kong, Kowloon, Hong Kong (email: jinshi0601@hotmail. com). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042839

such as single-ended dual-band filters [9]–[13] and dual-band baluns [14], [15]. However, relatively little research has been done on the balanced dual-band bandpass filter, even though it is also a key passive component for the RF front-ends. In the single-ended dual-band bandpass filter designs, three methods are popularly used. The first method is to utilize the resonator’s fundamental frequency and second harmonic to generate two passbands [9], [10]. In this case, the typical example is to use the stepped-impedance resonator to design a dual-band filter. By controlling the impedance and length ratios of the steppedimpedance resonators, the desired operating frequencies of the two desired passbands can be easily obtained. In the past, the stepped-impedance resonators were used to design the stopband-extended balanced bandpass filters [7], [8]. However, the second passband required by the single-ended dual-band bandpass filter has to be suppressed in the balanced filter because it is common-mode in the balanced filter. The second method is to combine two resonators with common input and output ports [11], [12]. Using proper configuration, good external quality factors and coupling coefficients can be obtained in the two passbands. The third method is to present a rejection bandwidth inside the passband [13]. In this case, the filter is characterized by two passbands separated by a stopband. The center-loaded resonator has different characteristics with different loaded elements. A stub-loaded resonator is used to design the single-ended dual-band bandpass filter in [16]. In [17], a harmonic-suppressed bandpass filter which was designed using the resistor loaded resonator and a tunable filter that was made using the varactor-loaded resonator were introduced. However, these filters were all for single-ended applications. In this paper, a method for designing the balanced filter incorporated with a center-loaded half-wavelength resonator is introduced. Having the proper capacitor and resistor loaded in series at the center of the half-wavelength resonator, the balanced filter that is designed using the proposed method can suppress the common-mode noise by keeping the differential-mode response almost unchanged. Thus, the common-mode suppression is independent of the differential-mode response in the balanced filter design, which simplifies and clarifies the balancedfilter design process significantly. By taking this advantage, two balanced dual-band filters are designed. The proposed balanced dual-band filters are realized by putting a rejection bandwidth inside a passband. The demonstrated balanced single-band and dual-band bandpass filters show good performance. II. CENTER-LOADED HALF-WAVELENGTH RESONATOR The structure of the center-loaded half-wavelength resonator is shown in Fig. 1(a). The two parts of the transmission line are

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is the electrical length of the microstrip line. Since where the loaded elements are a capacitor and a resistor in series, the admittance of the load can be described as

(3) where and are the values of the resistor and capacitor, respectively. Substituting (3) into (2) yields

Fig. 1. (a) Structure of the proposed center-loaded half-wavelength resonator; component X represents a capacitor or an inductor. (b) Differential mode equivalent half circuit. (c) Common-mode equivalent half circuit.

(4) symmetric to the symmetric line with identical characteristic is attached to the admittance of and length of . A load center of the transmission line. In this paper, we focus on the case where the load is cascading a capacitor and a resistor in series or an inductor and a resistor in series. Since this resonator is symmetric in structure, it is convenient to analyze it using the differential- and common-mode equivalent half circuits.

A. Differential-Mode Analysis Under differential-mode operation, a virtual short appears along the symmetric line, leading to the approximated differential-mode equivalent circuit in Fig. 1(b), regardless of the loaded elements. The resulting fundamental differential-mode resonant frequency can be written as [16]

The resonant condition can be written as

(5) From (5), it can be seen that the common-mode resonating fre, quency can be tuned by changing value . Assuming the tuning range of the common-mode resonant frequency is ranging from to . When the center point is connected pF), . When the half-waveto ground directly ( 0 pF), . The unloaded length line is unloaded ( quality factor for common-mode operation can be obtained as

(1) where is the velocity of light in free space and is the effective permittivity. It can be observed that the length of resonator is a half guided wavelength at the fundamental differential-mode resonant frequency, and the differential-mode resonant frequency is not affected by the loading element. Moreover, the unloaded quality factor for differential-mode operation is infinite for the lossless microstrip line.

(6) From (6), it can be seen that there is a value of . minimum

for reaching

C. Common-Mode Analysis When Inductor and Resistor Loaded When the loaded elements are an inductor and a resistor in series, the admittance of the load can be written as

B. Common-Mode Analysis When Capacitor and Resistor Loaded

(7)

Under common-mode operation, there is no current flowing through the center of the transmission line. Thus, we can symmetrically bisect the line and the loading element to obtain the equivalent half circuit in Fig. 1(c). The input admittance for common-mode operation is given by (2)

where

is the inductance. Substituting (7) into (2) yields

(8)

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Fig. 2. Configuration of the proposed balanced single-band filter designed using the symmetrical center-loaded half-wavelength resonator.

The resonant condition can be written as

(9) Assuming , the common-mode resonant frequency . When 0 nH, . The unloaded quality factor for common-mode operation can be described as (10) From (10), it can be found that there is a value of . minimum

for reaching

III. BALANCED SINGLE-BAND FILTER A. Filter Structure The proposed balanced single-band bandpass filter shown in Fig. 2 is composed of two symmetric center-loaded half-wavelength resonators. By adopting the symmetric structure, the proposed filter has the same equivalent half circuit for the differential- and common-mode operations shown in Fig. 1(b) and (c). Thus, it is possible to reduce the level of common-mode noise while possessing the desired bandpass frequency response in the differential-mode operation. The proposed balanced single-band bandpass filter in Fig. 2 is implemented using the microstrip structure fabricated on the substrate Taconic RF-60A-0310 (substrate thickness 0.82 mm, dielectric constant 6.03, loss tangent 0.0038). In the filter design, the simulation is accomplished by the full-wave simulator IE3D and ADS. As for the measurement, the balanced filter, as a four-port device, is measured by the Agilent E5071C network analyzer, which can measure the two-port differentialand directly. and common-mode -parameters, i.e., The two-port differential- and common-mode -parameters may also be deduced from the four-port -parameters, as given in [18]. B. Design Procedure In differential-mode excitation, the equivalent half circuit is irrelevant to the loaded elements. This is because the symmetric

Fig. 3. Simulated response without loading elements.

plane is a virtual short for the differential-mode operation, as shown in Fig. 1(b). The center frequency of the differential-mode passband is decided by the length of the microstrip and gap affect the resonator, while the tap position external quality factor and coupling coefficient. Therefore, the first step is to get the differential-mode frequency response by and microstrip line length. The choosing appropriate tuning process is similar to that of the single-ended filter, and the common-mode response is not required to be considered in this design step. Fig. 3 shows the simulated differential-mode 3.1 mm, 0.45 mm, 5.05 mm, response when 10 mm, 4.6 mm, 3.1 mm, and 0.7 mm. Common-mode response without lumped elements loaded is is also shown in Fig. 3. The common-mode resonance at not obvious because that the distance is tuned to match for the differential-mode response at , not for the common-mode . The simulated common-mode suppression is response at less than 15 dB from 0.5 to 3.5 GHz. To improve the common-mode suppression and keep the differential-mode response unchanged simultaneously, the centerloaded lumped elements are added and tuned in the second step. The common-mode equivalent half circuit is shown in Fig. 1(c). Since the common-mode center frequency and quality factor will change along with the values of the capacitors, inductors, and resistors, it is possible to find out the values of lumped elements, where the filter has a complete reflection (common-mode input impedance is zero, and common-mode external quality factor is infinite) in common-mode operation. versus the capacitance and Fig. 4(a) and (b) shows the resistance when the capacitor and resistor are loaded in series, respectively. It can be seen from Fig. 4(a) that the center frequency of the common-mode response is mainly affected by the to , which capacitor, with a tuning frequency range from is the same as that described in (5). Furthermore, it was found that the common-mode suppression reaches maximum when the capacitance is 11.6 pF. This is because the common-mode external quality factor changes with capacitance and is close to infinite when the capacitance is 11.6 pF. Next, we fix the capacitor when the resistance and observe the changing trend of is being changed. The common-mode responses versus resistance are shown in Fig. 4(b). Since the resistor affects both the common-mode unloaded and external quality factors and there , it is clear that it is an optimum resistor value for minimum

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Fig. 4. Simulated common-mode response with different values of lumped elements. (a) jS j versus capacitance with the capacitor and resistor loaded. (b) j versus resistance with the capacitor and resistor loaded. (c) jS j versus inductance with the inductor and resistor loaded. (d) jS j versus resistance jS with the inductor and resistor loaded.

is possible to find an optimum resistor value for achieving maximum common-mode suppression. The optimum resistor value is found to be 0.5 . versus the inductance and Fig. 4(c) and (d) shows the resistance when the inductor and resistor are loaded in series, respectively. It can be found from Fig. 4(c) that the center frequency of the common-mode response is mainly affected by the inductor, with a tuning frequency range of below , which is the same as that described in (9). However, from Fig. 4(c) and (d), we can see that the common-mode suppression has no remarkable improvement when compared with the filter designed using the unloaded half-wavelength resonator. This is because the inductor cannot make the common-mode external quality factor of the center-loaded resonator sufficiently large. Therefore, from the above analysis and simulation, the half-wavelength line with center-loaded capacitor and resistor can greatly improve the common-mode suppression. It must be pointed out that the differential-mode response does not change when tuning the capacitance and resistance. To clarify the proposed filter design, the design procedure can be concluded to the following two steps. Step 1) Determine the optimal differential-mode response by tuning the tap position and gap between resonators. Step 2) Maximize the common-mode suppression by tuning the resistance and capacitance, where the microstrip parameters are the same as those in the first step. The method given here shows that the differential-mode response generation and common-mode response suppression are

irrelevant and can be tuned independently. It greatly simplifies and clarifies the design and tuning of the balanced filter.

C. Differential-Mode Response To simplify the theoretical analysis, the ideal capacitors from Section II-B are used here. It was found that the practical capacitor models which are extracted from the measurement-based SMT passive library in ADS are more accurate for the designs. This is because it has already considered the parasitic series inductor and resistor as the general equivalent circuit in [19]. Fig. 5 shows the measured and simulated differential-mode frequency responses of the proposed balanced filter in Fig. 2, with the use of practical capacitors. The loaded element values are as 3.7 pF, 3.8 pF, and 0 , where follows: a short length of cylinder metal line is used as 0- resistor. The dimensions of the microstrip lines are same as those of the simulation one. The measured differential-mode center frequency is at 1.57 GHz, the measured 1-dB bandwidth is 8.92%, and the minimum insertion loss (inclusive of SMA connectors) is 0.95 dB. The fabricated balanced filter is compact and has a (17.5 mm 23.25 mm), where size of is the guided wavelength of the microstrip line at the differential-mode center frequency ( 1.57 GHz). The slight difference between the measured and simulated bandwidths can be attributed to the fabrication tolerance of the gap. The measured differential-mode response rolls off slower than the simulation

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Fig. 5. Measured and simulated differential- and common-mode responses of the proposed balanced single-band filter shown in Fig. 2.

one. This is because that the unloaded quality factor of the measured case is smaller than that of the simulation one.

Fig. 6. Configuration of the proposed balanced dual-band bandpass filter designed using the center-loaded half-wavelength resonators.

D. Common-Mode Response Fig. 5 also shows the measured and simulated common-mode responses of the proposed balanced filter in Fig. 2. The measured common-mode suppression is above 25.9 dB within the passband. As suggested by [20], the common-mode rejection ratio defined by (11) is adopted to quantify the level of common-mode suppression around the passband of balanced filters. For the proposed balanced single-band filter in Fig. 2, it has a common-mode rejection ratio of above 24 dB from 1.5 to 1.64 GHz. With the use of proper capacitors and resistors, the measured results depicted in Fig. 5 show that it is feasible to use the center-loaded half-wavelength resonator to improve the common-mode suppression. Moreover, the differential-mode frequency response will not change when tuning the loaded capacitors and resistors.

Fig. 7. Differential-mode equivalent half circuit and feeding and coupling schemes for the balanced filter in Fig. 6. (a) Equivalent half circuit. (b) Feeding and coupling schemes.

IV. BALANCED DUAL-BAND FILTER A. Filter Structure In view of the advantages of the proposed resonator, a balanced dual-band bandpass filter is also designed, fabricated, and tested. Fig. 6 shows the structure of the balanced dual-band bandpass filter, the design method and procedure are much different from the single-ended dual-band bandpass filter in [21]. This is a fourth-order filter with symmetrical structure. It consists of four center-loaded half-wavelength resonators with almost identical differential-mode resonant frequencies. Interdigital capacitor is utilized to control coupling strength within a wide range. B. Design Procedure The design procedures of the proposed balanced dual-band filter are also carried out by two steps. The first step is to realize

the differential-mode dual-band bandpass response by arranging the feed and coupling schemes. Fig. 7 illustrates the differential-mode equivalent half circuit and its feeding and coupling schemes. The two coupling paths make the filter to have two transmission zeros. When the magnetic coupling between the inner two resonators is weak, the two transmission zeros are located inside the passband, which make it a dual-band response. When the coupling between the inner two resonators is strong, the two transmission zeros are outside the passband, making it a single-band filter. To realize two differential-mode passbands at 1.4 and 1.84 GHz each with a 3-dB relative bandwidth of 5%, the resonating frequency is to be designed at 1.61 GHz [13], % and two transmission zeros are selected to be located at offset from the resonating frequency. Using the schematic circuit in [22] and optimization in microwave office, the differential-mode I/O external quality factors and coupling coefficients may be expressed as

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Fig. 8. Simulated results of the proposed balanced dual-band filter with different load combinations. Fig. 10. Photograph of the fabricated balanced dual-band filter.

Fig. 9. Differential-mode response when the gap g undergoes random errors of 13%.

. By the similar extraction process in [7] and [8], the dimensions can be ob3.2 mm, 5.55 mm, 10.7 mm, tained as follows: 4.6 mm, 7.7 mm, 14.2 mm, 6.1 mm, 0.7 mm, 0.33 mm, 0.23 mm, 2.45 mm, 0.5 mm, 0.3 mm, and 3 mm. The simulated differential-mode response is given in Fig. 8. One passband is centered at 1.4 GHz, with a 3-dB bandwidth of 83 MHz, while another passband is located at 1.84 GHz with a 3-dB bandwidth of 92 MHz. The minimum simulated insertion losses of the two passbands are 1.2 and 1.4 dB, respectively. Two transmission zeros are observed at 1.59 and 1.7 GHz. To evaluate the robustness of the design in Fig. 6, the gap is chosen to perform the sensitivity analysis. It undergoes randomness of 13%. Fig. 9 illustrates the simulated response, which shows that the sensitivity towards is in an acceptable range. The second step is to minimize the common-mode response of the proposed balanced dual-band filter by tuning the loaded elements. In this case, we also use the muRata-made capacitors. Since the loaded element has no effect on differential-mode signals, the differential-mode response will not change. The simulated common-mode frequency response of the balanced filter without the loaded elements is shown in Fig. 8. It can be seen that the common-mode suppression in the whole frequency range from 0.5 to 3.5 GHz is very low. After adding and , the common-mode suppression near the the loads differential-mode passband can be improved by 10 dB, while

the common-mode suppression near the second harmonic of the differential-mode passband’s center frequency is still very poor. This is because the unloaded resonators 2 and 3 in magnetic coupling make it possible to transmit the common-mode signal near the second harmonic frequency, while the balanced single-band filter has a common-mode suppression of above 15 dB near the second harmonic frequency without having magnetic coupling resonators as shown in Fig. 3. To widen the common-mode rejection frequency range, and are loaded at centers of the respective half-wavelength lines. Fig. 8 gives the simulated common-mode response when four capacitors and four resistors are loaded. The suppression for the common-mode signal near the second-harmonic frequency is greatly improved. Furthermore, the common-mode suppression near the fundamental frequency is also slightly and ) improved. It is worth noting that the capacitors ( loaded on the inner two resonators, unlike the capacitors ( and ) loaded on the outer two resonators, will not change the common-mode external quality factor of this filter. Their function is to weaken the common-mode coupling between the inner and outer resonators because they can enlarge the difference of the common-mode resonant frequencies of the inner and outer resonators. Fig. 10 shows the photograph of the fabricated balanced dual-band filter. C. Differential-Mode Response Fig. 11 shows the measured differential-mode frequency response of the proposed balanced dual-band filter. The lower passband is centered at 1.37 GHz with a 1-dB bandwidth of 60 MHz or 4.37%. The insertion loss including SMA connectors is measured to be 1.95 dB. The upper passband is located at 1.9 GHz. The 1-dB bandwidth is 80 MHz or 4.2%. The minimum insertion loss is measured to be 2.32 dB. Two transmission zeros are created at 1.57 and 1.72 GHz. D. Common-Mode Response Fig. 11 also shows the measured common-mode frequency response of the proposed balanced dual-band filter in Fig. 6. The 4 pF, loaded element values are as follows: 1000 pF, 3.6 pF, 0 , and

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Fig. 11. Measured differential- and common-mode response of the proposed balanced dual-band filter.

Fig. 12. Configuration of the proposed balanced dual-band bandpass filter for the DCS and WLAN applications.

33 . The measured common-mode suppressions are above 25.5 and 25.4 dB for the lower and upper passbands, respectively, and the common-mode rejection ratios are greater than 23 and 22 dB from 1.34 to 1.4 GHz and 1.86 to 1.94 GHz, respectively. The fabricated filter has a size of (26.7 mm 23.1 mm), where is the guided wavelength of the microstrip line at the center frequency of the lower passband. V. BALANCED DUAL-BAND FILTER FOR DCS AND WLAN APPLICATION For practical wireless system applications, a balanced dualband filter for the DCS and WLAN is designed as shown in Fig. 12. The difference between the filters in Figs. 12 and 6 is that a part of the inner resonators is a spiral line, which can facilitate the frequency tuning and size reduction. The design procedure is the same as that in Section IV. The differential-mode I/O external quality factors and coupling coefficients may be expressed as and at 2.126 GHz. By the similar extraction process in [7] and [8], the dimensions can be ob2.45 mm, 4.3 mm, 6.66 mm, tained as follows: 4.8 mm, 3.75 mm, 10.4 mm, 3.7 mm, 0.5 mm, 2 mm, 0.7 mm, 0.42 mm, 0.15 mm, 1.9 mm, 0.5 mm,

Fig. 13. Measured and simulated differential- and common-mode response of the proposed balanced dual-band filter shown in Fig. 12.

3.16 mm, the measured and simulated dif0.3 mm, and ferential- and common-mode responses are shown in Fig. 13. The two passbands are located at 1.835 and 2.45 GHz with a 1-dB relative bandwidth of 7% and 6.5%, respectively. The minimum insertion losses are 2.2 and 2.6 dB, respectively, which is about 0.8 dB larger than the simulated ones. This is because that the measured insertion loss includes the loss of the SMA connectors, which is about 0.2–0.3 dB at 2.4 GHz. Also, the higher return loss and lower unloaded quality factor of the measured filter make the measured insertion loss larger than that of the simulated filter. The lower unloaded quality factor is also a reason for larger bandwidth of the measured filter. Two transmission zeros can be seen at 2.09 and 2.21 GHz. The loaded 2.7 pF, element values are as follows: 1000 pF, 0 and 33 . The measured common-mode suppressions are above 22.7 and 22.6 dB within the lower and upper passbands, respectively, and the common-mode rejection ratios are above 20.5 and 20 dB in the respective passbands. The fabricated filter has a size of (15.16 m 23.1 mm). VI. CONCLUSION In this paper, the balanced filters that are designed using the center-loaded half-wavelength resonator are proposed. The characteristics of this resonator are investigated, and it is used for designing the balanced bandpass filters. It was found that the common-mode suppression can be easily controlled by tuning the values of the loaded capacitors and resistors, without affecting the differential-mode response. Because of the independence between the common- and differential-mode responses, the proposed single-band and dual-band balanced filters can be designed separately. With such improvement, the design procedure can be greatly simplified, with good performance. REFERENCES [1] K. C. H. Chin, Q. Xue, and H. Wong, “Broadband patch antenna with a folded plate pair as a differential feeding scheme,” IEEE Trans. Antennas Propag., vol. 55, no. 9, pp. 2461–2467, Sep. 2007. [2] Q. Xue, X. Y. Zhang, and C. H. K. Chin, “A novel differential fed patch antenna,” IEEE Antennas Wireless Propag. Lett., vol. 5, no. 12, pp. 471–474, Dec. 2006. [3] A. Ziroff, M. Nalezinski, and W. Menzel, “A 40 GHz LTCC receiver module using a novel submerged balancing filter structure,” in Proc. Rad. Wireless Conf., 2003, pp. 151–154.

SHI AND XUE: BALANCED BANDPASS FILTERS USING CENTER-LOADED HALF-WAVELENGTH RESONATORS

[4] Y.-S. Lin and C. H. Chen, “Novel balanced microstrip coupled-line bandpass filters,” in Proc. URSI Int. Electromagn. Theory Symp., 2004, pp. 567–569. [5] J. Shi, J.-X. Chen, and Q. Xue, “A novel differential bandpass filter based on double-sided parallel-strip line dual-mode resonator,” Microw. Opt. Technol. Lett., vol. 50, no. 7, pp. 1733–1735, Mar. 2008. [6] C.-H. Wu, C.-H. Wang, and C. H. Chen, “Novel balanced coupled-line bandpass filters with common-mode noise suppression,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 2, pp. 287–295, Feb. 2007. [7] C.-H. Wu, C.-H. Wang, and C. H. Chen, “Stopband-extended balanced bandpass filter using coupled stepped-impedance resonators,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 7, pp. 507–509, Jul. 2007. [8] C.-H. Wu, C.-H. Wang, and C. H. Chen, “Balanced coupled-resonator filters using multisection resonators for common-mode suppression and stopband extension,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 2, pp. 287–295, Feb. 2007. [9] S. Sun and L. Zhu, “Compact dual-band microstrip bandpass filter without external feeds,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 10, pp. 644–646, Oct. 2005. [10] Y. P. Zhang and M. Sun, “Dual-band microstrip bandpass filter using stepped-impedance resonators with new coupling schemes,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 10, pp. 3779–3885, Oct. 2006. [11] C.-Y. Chen and C.-Y. Hsu, “A simple and effective method for microstrip dual-band filters design,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 3, pp. 246–248, May 2006. [12] J.-X. Chen, T. Y. Yum, J.-L. Li, and Q. Xue, “Dual-mode dual-band bandpass filter using stacked-loop structure,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 9, pp. 502–504, Sep. 2006. [13] G. Macchiarella and S. Tamiazzo, “A design technique for symmetric dualband filters,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2005, pp. 115–118. [14] L. K. Yeung and K.-L. Wu, “A dual-band coupled-line balun filter,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 11, pp. 2406–2411, Nov. 2007. [15] J. H. Sung, G. Y. Kim, S. H. Son, H. J. Lee, Y. J. Song, Y. W. Jeong, H. S. Park, and D. Ahn, “Design method of a dual band balun and divider,” in IEEE MTT-S Int. Microw. Symp. Dig., 2002, vol. 2, pp. 1177–1180. [16] X. Y. Zhang, J.-X. Chen, Q. Xue, and S.-M. Li, “Dual-band filters using stub-loaded resonators,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 8, pp. 583–585, Aug. 2007. [17] X. Y. Zhang and Q. Xue, “Novel centrally loaded resonators and their applications to bandpass filter,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 4, pp. 913–921, Apr. 2008. [18] D. E. Bockelman and W. R. Eisenstant, “Combined differential and common-mode scattering parameters: Theory and simulation,” IEEE Trans. Microw. Theory Tech., vol. 43, no. 7, pp. 1530–1539, Jul. 1995. [19] R. Ludwig and P. Bretchko, RF Circuit Design Theory and Applications. Upper Saddle River, NJ: Prentice-Hall, 2000, p. 18. [20] W. R. Eisenstant, B. Stengel, and B. M. Thompson, Microwave Differential Circuit Design Using Mixed-Mode S-Parameters. Boston, MA: Artech House, 2006.

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[21] X. Y. Zhang, J. Shi, J. X. Chen, and Q. Xue, “Dual-band bandpass filter design using a novel feed scheme,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 6, pp. 350–352, Jun. 2009. [22] J. S. Hong and M. J. Lancaster, Microwave Filter for RF/Microwave Application. New York: Wiley, 2001, p. 304.

Jin Shi was born in Nantong, Jiangsu Province, China, in 1979. He received the B.S. degree from HuaiYin Teachers College, Huai’an City, Jiangsu Province, China, in 2001, the M.S. degree from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 2004, and is currently working toward the Ph.D. degree at the City University of Hong Kong, Kowloon, Hong Kong. From 2004 to 2006, he was a Research Engineer with Comba, where he was involved with RF repeater systems. Since 2007, he has been a Research Assistant with the City University of Hong Kong. His research interests include RF/microwave components and subsystems.

Quan Xue (M’02–SM’04) received the B.S., M.S., and Ph.D. degrees in electronic engineering from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 1988, 1990, and 1993, respectively. In 1993, he joined UESTC as a Lecturer. He became an Associate Professor in 1995 and a Professor in 1997. From October 1997 to October 1998, he was a Research Associate and then a Research Fellow with the Chinese University of Hong Kong. In 1999, he joined the City University of Hong Kong, Kowloon, Hong Kong, where he is now an Associate Professor and the Director of the Applied Electromagnetics Laboratory. Since May 2004, he has also been the Principal Technological Specialist of the State IC Design Base, Chengdu, China. He has authored or coauthored more than 150 internationally referred papers His current research interests include antennas, smart antenna arrays, active integrated antennas, PA linearization, microwave filters, millimeter-wave components and subsystems, and microwave monolithic integrated circuits RF integrated circuits. Dr. Xue is the IEEE Microwave Theory and Techniques Society (MTT-S) regional coordinator of IEEE Region 10. He was a cosupervisor of two IEEE MTT-S International Microwave Symposium (IMS) Best Student Contest papers (third place in 2003 and first place in 2004). He was selected as distinguished academic staff at the Chinese University of Hong Kong for his contribution to the development of millimeter-wave components and susbsystems.

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Inductance-Loaded Y-Shaped Resonators and Their Applications to Filters Kaijun Song, Member, IEEE, and Quan Xue, Senior Member, IEEE

Abstract—Inductance-loaded Y-shaped resonator and its applications to ultra-wideband (UWB) bandpass filters have been presented in this paper. Based on the odd- and even-mode equivalent circuits, the resonant characteristics of the proposed microstrip resonator with various electrical length and admittance ratio values are investigated. The relationship between the external quality factor and the parameters of the coupling structure has been analyzed to give a design approach for the UWB filter. Two types of UWB bandpass filters are designed to demonstrate the practicality of the proposed resonator. To get tight coupling, the high-impedance parallel-coupled line has been used in the input/output of the first UWB bandpass filter. Both simulated and measured results show that the first UWB filter has a 10-dB return loss bandwidth of 5.6 GHz, a group delay variation of less than 0.3 ns, and a wide upper stopband with more than 20-dB attenuation up to 17.5 GHz. The multilayer technology is applied to the second UWB bandpass filter to provide tight coupling by using the broadside-coupled structures. The measured results show that the multilayer UWB filter exhibits excellent performance, including 1-dB insertion loss and 10-dB return loss bandwidths of 3.3–10.4 GHz with a minimum insertion loss of 0.45 dB at 6.85 GHz, as well as 3-dB insertion loss bandwidth and group delay variation 0.22 ns over the entire UWB band. Index Terms—Bandpass filters, inductance-loaded, ultra-wideband (UWB), Y-shaped resonator.

I. INTRODUCTION

T

HE ultra-wideband (UWB) technology has attracted great interest in both academic and industrial communities on exploring various UWB components and systems since the U.S. Federal Communications Committee (FCC) released the unlicensed use of the UWB (3.1–10.6-GHz) band for commercial communication applications in 2002 [1]. The UWB bandpass Manuscript received November 23, 2009; revised January 19, 2010. First published March 15, 2010; current version published April 14, 2010. This work was supported by the Germany/Hong Kong Joint Research Scheme sponsored by the Research Grants Council of Hong Kong and the Germany Academic Exchange Service of Germany under Contract G_HK002/08, by the Strategic Research Grants of the City University of Hong Kong under Grant 7002354, and by the National Natural Science Foundation of China-NASF under Grant 10976005. K. Song is with the EHF Key Laboratory of Fundamental Science, School of Electronic Engineering, University of Electronic Science and Technology of China, Chengdu 610054, China, and also with the State Key Laboratory of Millimeter Waves, Department of Electronic Engineering, City University of Hong Kong, Hong Kong (e-mail: [email protected]; [email protected]). Q. Xue is with the State Key Laboratory of Millimeter Waves, Department of Electronic Engineering, City University of Hong Kong, Hong Kong (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042509

filter is one of the key passive components in the design of microwave circuits for a UWB radio communication system. Various types of UWB bandpass filters have been reported and investigated extensively [2]–[20]. In [3]–[5], the composite microstrip coplanar-waveguide (CPW) structure has been used to construct the UWB filters, which can result in UWB performance easily. The defected ground structures (DGSs) or electromagnetic bandgap (EBG) structures have been used in UWB filters to reduce their sizes [6]–[8]. In [9], the UWB multistage bandpass filters using hybrid microstrip line and slotline have been presented, which achieve higher order transmission zeros and thus provide higher selectivity. Moreover, the UWB filters that incorporate low-pass and high-pass sections have been presented in [10] and [11], while the UWB filter with cascaded broadband bandpass and bandstop filters has been presented in [12]. In addition, a compact and highly selective UWB filter with five short-circuited stubs separated by nonredundant connecting lines has been presented in [13]. The UWB filters based on multilayer technology have been presented in [14] and [15] to improve the fabricating tolerance. It is interesting to find that the multiple-mode resonator can be a good candidate for the UWB bandpass filter design [16]–[20]. These filters have many attractive features, such as a simple design, compact size, low loss and good linearity in the UWB, enhanced out-of-band rejection, and easy integration with other circuits/antennas. Therefore, the multiple-mode resonator technique is one of the major methods in the design of UWB filters. Moreover, the UWB filters with the conventional parallel-coupled structures use a very narrow gap to get tight coupling, which is not easy to fabricate. Therefore, a tight coupling structure that can be easily fabricated is greatly needed. In the previous studies, the authors have presented a Y-shaped microstrip resonator [21], which has been used to design a broadband bandpass filter with input–output cross-coupling. In this paper, we develop an inductance-loaded Y-shaped microstrip resonator suitable for UWB bandpass filter applications. By introducing a high-impedance microstrip line with a via-hole to ground at the joint connection of the Y-shaped resonator, the inductance-loaded resonator can generate three fundamental resonant frequencies. The resonance properties are investigated by theoretical analysis, and the external quality factor of the input/output structure has been analyzed to give a design approach for the bandpass filter. Then, an UWB filter using the parallel-coupled structure has been designed successfully to validate the performance of the proposed resonator. Moreover, the broadside-coupled structure has been used in the second UWB bandpass filter based on the multilayer technology, and the UWB tight coupling is achieved by using this

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, the fundamental From the resonance condition of odd-mode resonant frequency can be obtained as (2)

Fig. 1. Structure and equivalent circuits of the inductance-loaded resonators. (a) Structure. (b) Equivalent circuit of the even-mode resonance. (c) Equivalent circuit of the odd-mode resonance.

Note that (1) and (2) have been given in [21] and are shown here for convenience. For even-mode excitation, there is no current flow through the symmetrical plane A-A’. The equivalent circuit of the evenmode resonance can be obtained, as shown in Fig. 1(b). By means of transmission-line theory and ignoring the influences of the junction discontinuity, the characteristic admittance can be obtained as (3) where . It is noted that is negative because of the inductance-loaded structure. To calculate the shunt admit, the inductance-loaded structure has to be modeled. tance Its equivalent circuit is shown in Fig. 2(c). Then, the admittance of the inductance-loaded structure is (4) where , is the admittance of the via-hole to ground, is the angle resonant frequency, is the inductance of a cylindrical via-hole to ground, and which can be approximately represented as [22]

Fig. 2. (a) Top view and (b) side view of the inductance-loaded structure. (c) Equivalent circuit of the inductance-loaded structure.

broadside coupling mechanism. Furthermore, details of these two UWB bandpass filters are presented, and measured results are given to demonstrate the applications of the proposed resonator. It is noted that the proposed microstrip resonator has the potential of being used in multiple-band bandpass filters. II. CHARACTERISTICS OF INDUCTANCE-LOADED Y-SHAPED MICROSTRIP RESONATOR Fig. 1(a) shows the structure of the inductance-loaded Y-shaped microstrip resonators. The Y-shaped microstrip resonator is formed by a joint connection of three microstrip-line branches, which is spaced apart with 120 rotation angles. The inductance-loaded structure consists of a via-hole to ground and a high-impedance microstrip line with length and width , as shown in Fig. 2(a) and (b). For odd-mode excitation, the symmetrical plane A-A’ will be short-circuited, whose equivalent circuit is shown in Fig. 1(c). can be defined as The characteristic admittance (1) where

is the electrical length of the side branch.

and the capacitance value can be simply given by

(5) of a cylindrical via-hole to ground

(6) Then, the even-mode resonances nance conditions

exist with the reso-

(7) and for convenience. If , Let and . has to be negative to then meet the resonance equation (7), that is to say, the Y-shaped resonator can generate a much lower fundamental even-mode resothan the fundamental odd-mode resonance nance frequency by introducing the inductance-loaded structure. frequency is The lower fundamental even-mode resonance frequency denoted as . , then and , and If has to be positive to meet the resonance (7), that is to say, the Y-shaped resonator can synchronously generate a much higher than the funfundamental even-mode resonance frequency . The higher fundamental odd-mode resonance frequency is denoted as . damental even-mode resonance frequency

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Fig. 3. Analysis of even-mode resonator frequencies. The data are calculated 8.5 mm, L 3.5 mm, b 2.5, W 0.15 mm, W from (8) (L 1.8 mm, W 0.3 mm, r 0.45 mm, r 0.65 mm).

=

Fig. 5. Resonant spectrum of the proposed resonator with varying b. All resonances are normalized with respect to f .

Fig. 4. Resonant spectrum of the proposed resonator with varying L . All resonances are normalized with respect to f .

Fig. 6. Normalized resonant frequencies of the proposed resonator versus admittance ratio Y =Y with admittance Y =Y 0.3, 0.5, 0.7, 0.9, 1.1, 1.3, and 1.5.

In this case, (7) can be met by adjusting . Therefore, the inductance-loaded Y-shaped resonator can generate three fundamental resonance frequencies ( , , and ) by appropriately adjusting its sizes. Let

while is almost preserved, as shown in Fig. 4. Furthermore, it is noted that and are changed when the length is varied. The data shown in Figs. 4–6 form an important basis of our design for determining the geometry of the inductance-loaded Y-shaped resonators. Then, the center frequency of an inductance-loaded Y-shaped resonator is at its second resonance (the odd-mode resonance), provided that the three resonances are equally spaced. When the proposed resonators are used to design a wideband bandpass filter, can be located at the desired center frequency [see (2)]. Then, can be of the filter by adjusting the length , decided by adjusting the length , the admittance ratio . Finally, can be determined and the admittance ratio by changing the length . It is possible to form a wideband performance by selecting an appropriate input/output (I/O) coupling structure.

= =

=

=

= =

=

(8) We can plot the curve of (8) with frequency, as shown in Fig. 3, where the substrate has a dielectric constant of 2.94 and a thickness of 0.76 mm (all designs from Figs. 4–11 are based on this type of substrate). It can be noted that (8) is equal to 3.77 GHz and 8.72 GHz, that is to say zero at there are two fundamental even-mode resonant frequencies ( and ) for the proposed resonator. In this case, the fundamental odd-mode resonant frequency can be calculated from (2) and , which is comis at 6.24 GHz. It can be seen that patible with the above analysis. Figs. 4 and 5 plot and normalized with respect to , respectively, while Fig. 6 shows the normalized resonant frequenas a function of the admitcies versus admittance ratio 0.3, 0.5, 0.7, 0.9, 1.1, 1.3, and 1.5. These tance ratio calculated results come from (2) and (7). It can be observed that, by changing the length , can be shifted within a wide range,

=

III. UWB BANDPASS FILTER IMPLEMENTATION AND EXPERIMENTAL PERFORMANCE A. UWB Inductance-Loaded Y-Shaped Resonator Bandpass Filter Using a Parallel-Coupled Structure Based on the above resonator, a UWB bandpass filter using a parallel-coupled structure is constructed, as shown in Fig. 7.

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Fig. 7. Structure of the proposed filter using a parallel-coupled structure.

Fig. 9. Simulated frequency responses of the bandpass filters with one 8.2 mm, (solid line) and two (dashed line) Y-shaped resonators ( 3.3 mm, 7.1 mm, 2.3 mm, 1.8 mm, 0.3 mm, 0.45 mm, 0.15 mm, 0.65 mm, 0.22 mm).

L = W =S= S =

Fig. 8. Simulated

Q

S

for parallel-coupled line versus gap size .

For the wideband filters, tight couplings are essentially required for the I/O structures [19], [20]. To get tight coupling, a highimpedance parallel-coupled line has been applied to the input/ output of the UWB bandpass filter. of the parallel-coupled line The external quality factor can be given by [19] (9) is the reference port impedance and and are where the odd- and even-mode characteristic impedances of the parand are known, allel-coupled line, respectively. Once the linewidths and and gap size can be found. and the 3-dB bandwidth of The loaded quality factor a parallel-coupled line is related by (10) Note that (9) and (10) have been given in [19] and are shown . Fig. 8 here for convenience. For lossless case, plots the simulated with gap size for different linewidths. and are specified, According to above analysis, when and can be determined. Finally, the sizes of the parallel-coupled line can be obtained. For example, when 6.85 GHz and 6.2 GHz, namely, the fractional band, the loaded quality width , which responds to 0.15 mm according factor

l = b= W =W =

L = W =W = r= r=

to Fig. 8. Moreover, , and and can be ob. Finally, and can be tained from (9), where found. It is noteworthy that its resonant frequencies will change due to the external coupling when the Y-shaped resonator is incorporated with the I/O parallel-coupled lines. Thus, the structure parameters have to be adjusted to keep the resonant frequencies at the desired frequency points. In addition, the coupled-line stage can be modeled as two quarter-wave lines with an admittance inverter [23]–[25]. When the UWB filter with one Y-shaped resonator (as shown in Fig. 7) has been appropriately designed, it can be operated as a five-resonator filter and has five transmission poles in the return loss response within the passband. Obviously, the two extra poles of the inductance-loaded Y-shaped resonator filter are from the I/O coupled-line stage [19], [25], which can be analyzed according to [25]. To improve the out-of-band performance, two or more inductance-loaded Y-shaped resonators can be used in the UWB filter. In this case, the couplings between adjacent resonators also have to be properly designed, which can be found in [19]. Fig. 9 shows the simulated frequency responses of the bandpass filters with one and two Y-shaped resonators, as well as the structure of the filter with two Y-shaped resonators. One can easily identify that the two circuits have different attenuation rates in their transition bands by comparing the responses in Fig. 9. Filter selectivity was enhanced by adding a Y-shaped resonator. Similarly, the filter with two Y-shaped resonators can be operated as an eight-resonator filter. As shown in Fig. 9, the filters with one and two Y-shaped resonators have five and eight poles in the return loss response, which is compatible with the above analysis. To validate the above design method, the UWB filter with one Y-shaped resonator has been analyzed in the following section. According to our fabrication conditions and error tolerance, it is 0.15 mm and 0.3 mm, appropriate to choose which corresponds to (see Fig. 8). In order to broaden the passband of the filter, all of the first three resonant frequencies are taken into account together and they are applied to make

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Fig. 10. Insertion loss of the UWB bandpass filter with respect to parallel-coupled line lengths (l ).

up a wide passband. In this case, the lower and upper cutoff frequencies of a wide passband can be basically determined by the first- and third-order resonant frequencies. In order to investigate the resonance characteristics of this resonator, the simulated insertion loss in the wide frequency range (0–20 GHz) is given under the five different coupling 0, 0.5, 1, 3.5, and 7.1 mm, as shown in Fig. 10. For lengths the weak coupling case, the three resonant frequencies , , and are observed to occur at around 4.3, 6.35, and 8.6 GHz, respectively. When the coupling lengths are equal to 7.1 mm, the whole insertion loss realizes an almost flat frequency response near the 0-dB horizontal line over the desired UWB band. The UWB bandpass filter with one Y-shaped resonator has been optimized using the IE3D. The final dimensions are shown in Fig. 9. The substrate used in this design has a relative dielectric constant of 2.94 and a thickness of 0.76 mm. The fabricated UWB bandpass filter is shown in Fig. 11(a). Fig. 11 demonstrates the simulated and measured -parameters and 6.7 GHz with group delay of the UWB filter designed at . The fabricated UWB filter has a passband from 3.6 to 9.45 GHz and 10-dB return loss bandwidth of 5.6 GHz. The measured insertion loss is around 1 dB from 3.7 to 8.3 GHz, while it is less than 2 dB from 8.3 to 9.3 GHz. It also can be seen from Fig. 11(b) that the fabricated UWB filter has a wide upper stopband with more than 20-dB attenuation from 10.3 to 17.5 GHz. The measured group delay is 0.28 ns at 6.5 GHz within a variation of 0.3 ns from 3.9 to 10 GHz. It can be seen and agree well with the that the measurements show design. The poles at , , and shift to 3.8, 6.55, and 9 GHz, respectively, after the I/O structures are applied. B. UWB Multilayer Bandpass Filter It can be seen from above design that, to achieve tight coupling, the gap of the parallel-coupled structure for the UWB filter has to be very narrow, which is difficult in fabrication. It is well known that multilayer technology has become popular in microwave applications and can provide tight coupling. So, to overcome this defect, the multilayer-coupled structure can be used to implement the UWB bandpass filter. The configuration of the proposed multilayer UWB filter is shown in Fig. 11. The multilayer structure includes three layer metals, i.e., top layer,

Fig. 11. (a) Simulated and measured results and photograph of the proposed filter. (b) Simulated and measured wideband frequency responses.

middle layer, and ground layer. The Y-shaped resonator is embedded on the middle layer, and the via-hole is connected to the ground layer. On the top layer, 50- microstrip lines are used for input and output, and the broadside coupled strip-line structures are on two different metal layers, i.e., the top layer and the middle layer, which can provide tight coupling for the proposed UWB filter. Similarly, the I/O coupling structure can be analyzed by the . Fig. 12 plots the simulated with loaded quality factor for three different thicknesses of the substrate, linewidth where the substrate has a dielectric constant of 2.2. It can be seen that the smaller the linewidth or the thickness of the substrate, values. When 0.8 mm, it is possible the smaller the that 0.85 at a thickness of 0.127 mm. To implement UWB performance, both the top- and bottom-layer substrates with a thickness of 0.127 mm, a dielectric constant of 2.2, and a loss tangent of 0.0009 have been used. is chosen to be 0.5 mm, which corresponds to . The geometric parameters of the resonator are chosen by 3.85 GHz, locating the three resonant frequencies 6.85 GHz, and 10 GHz at the three transmission poles. It has been mentioned that the linewidth is relative and the resonant frequencies and . The entire to both multilayer UWB filter was designed and optimized using the EM simulator IE3D. The final dimensions are [as shown in 7.5 mm, 3.4 mm, Figs. 1, 2, and Fig. 11(a)]:

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Fig. 12. Multilayer configuration of the UWB bandpass filter using the proposed resonator. (a) Multilayer view. (b) Top layer. (c) Middle layer. (d) Ground layer.

Fig. 15. (a) Simulated and measured results. (b) Wideband frequency responses of the proposed multilayer UWB bandpass filter. Fig. 13. Simulated

Q

for broadside-coupled line versus linewidth

W.

Fig. 14. Photograph of the UWB multilayer bandpass filter: (a) top layer and (b) middle layer.

7.1 mm , 2.7 mm , 0.76 mm, 0.5 mm 1.2 mm , 0.3 mm, 0.45 mm, and 0.65 mm. Fig. 14 shows the photograph of the fabricated multilayer UWB bandpass filter. The simulated and measured results of the multilayer UWB bandpass filter are shown in Fig. 15. It can be seen that these simulated and measured results are in excellent agreement with each other. As can be observed from Fig. 15, the measured minimum insertion loss is 0.45 dB at 6.85 GHz, while the insertion loss and return loss are less than 1 dB and greater than 10 dB from 3.3 to 10.4 GHz, respectively. Furthermore, the insertion loss is less than 3 dB over the entire UWB band. Compared with the above UWB filter using a parallel-coupled structure, the passband bandwidth has been greatly improved. ,

In addition, the UWB filter achieves a wide upper stopband with more than 20-dB attenuation up to 17 GHz. The measured group delay varies from 0.26 to 0.48 ns in the entire UWB passband with a maximum variation of 0.22 ns. Note that the poles at , , and shift to 3.84, 7.4, and 10.25 GHz, respectively, after the I/O structures are applied. It can be seen that the pole at in measurements shifts from 6.85 to 7.4 GHz; this is because the pole at is affected by the two extra poles from the I/O stage and cannot be decided accurately from the frequency response. and It can also be seen that the measurements show agree well with the design. IV. CONCLUSION An inductance-loaded Y-shaped microstrip resonator has been proposed to design the UWB bandpass filters. The resonant characteristics of the proposed microstrip resonator are investigated by the transmission-line theory. Design parameters of the inductance-loaded Y-shaped resonator include admittance ratios, electrical length, and radius of a via-hole. The proposed microstrip resonator has been applied to design two types of UWB bandpass filters, namely, the UWB bandpass filter using the parallel-coupled line and the multilayer UWB bandpass filter. Measured results of these two UWB filters validate the analysis and theoretical prediction with good agreement.

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REFERENCES [1] “Revision of part 15 of the Commission’s rules regarding ultra-wideband transmission system, first note and order,” FCC, Washington, DC, ET-Docket 98-153, 2002. [2] K. Song and Y. Fan, “Compact ultra-wideband bandpass filter using dual-line coupling structure,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 1, pp. 30–32, Jan. 2009. [3] J.-W. Baik, T.-H. Lee, and Y.-S. Kim, “UWB bandpass filter using microstrip-to-CPW transition with broadband balun,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 12, pp. 846–848, Dec. 2007. [4] T.-N. Kuo, S.-C. Lin, and C. H. Chen, “Compact ultra-wideband bandpass filters using composite microstrip-coplanar-waveguide structure,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 10, pp. 3772–3778, Oct. 2006. [5] H. L. Hu, X. D. Huang, and C. H. Cheng, “Ultra-wideband bandpass filter using CPW-to-microstrip coupling structure,” Electron. Lett., vol. 42, no. 10, pp. 586–587, May 2006. [6] G.-M. Yang, R. Jin, C. Vittoria, V. G. Harris, and N. X. Sun, “Small ultra-wideband (UWB) bandpass filter with notched band,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 3, pp. 176–178, Mar. 2008. [7] J.-W. Baik, S.-M. Han, C. Jeong, J. Jeong, and Y.-S. Kim, “Compact ultra-wideband bandpass filter with EBG structure,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 10, pp. 671–673, Oct. 2008. [8] S. W. Wang and L. Zhu, “EBG-embedded multiple-mode resonator for UWB bandpass filter with improved upper-stopband performance,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 6, pp. 421–423, Jun. 2007. [9] R. Li, S. Sun, and L. Zhu, “Synthesis design of ultra-wideband bandpass filters with composite series and shunt stubs,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 3, pp. 684–692, Mar. 2009. [10] A. Balalem, W. Menzel, J. Machac, and A. Omar, “A simple ultra-wideband suspended stripline bandpass filter with very wide stop-band,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 3, pp. 170–172, Mar. 2008. [11] M. Uhm, K. Kim, and D. S. Filipovic, “Ultra-wideband bandpass filters using quarter-wave short-circuited shunt stubs and quarter-wave series transformers,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 10, pp. 668–670, Oct. 2008. [12] C.-W. Tang and M.-G. Chen, “A microstrip ultra-wideband bandpass filter with cascaded broadband bandpass and bandstop filters,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 11, pp. 2412–2418, Nov. 2007. [13] H. Shaman and J.-S. Hong, “A novel ultra-wideband (UWB) bandpass filter (BPF) with pairs of transmission zeros,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 2, pp. 121–123, Feb. 2007. [14] Z.-C. Hao and J.-S. Hong, “Ultra-wideband bandpass filter using multilayer liquid-crystal-polymer technology,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 9, pp. 2095–2100, Sep. 2008. [15] M. Nedil, A. Djaiz, and T. A. Denidni, “Ultra-wideband bandpass filter using back-to-back CBCPW-to-CBCPW transition,” Electron. Lett., vol. 44, no. 5, pp. 362–363, Feb. 2008. [16] S. Sun and L. Zhu, “Multimode-resonator-based bandpass filters,” IEEE Microw. Mag., vol. 10, no. 2, pp. 88–98, Apr. 2009. [17] Q.-X. Chu and Li S.-T, “Compact UWB bandpass filter with improved upper-stopband performance,” Electron. Lett., vol. 44, no. 12, pp. 742–743, 2008. [18] J. Marimuthu and M. Esa, “Compact UWB PCML bandpass filter with L- and C-shaped resonator,” Electron. Lett., vol. 44, no. 6, pp. 419–420, Mar. 2008. [19] Y.-C. Chiou, J.-T. Kuo, and E. Cheng, “Broadband quasi-Chebyshev bandpass filters with multimode stepped-impedance resonators (SIRs),” IEEE Trans. Microw. Theory Tech., vol. 54, no. 8, pp. 3352–3358, Aug. 2006. [20] L. Zhu, S. Sun, and W. Menzel, “Ultra-wideband (UWB) bandpass filters using multiple-mode resonator,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 11, pp. 796–798, Nov. 2005.

[21] K. Song and Q. Xue, “Novel broadband bandpass filters using Y-shaped dual-mode microstrip resonators,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 9, pp. 548–550, Sep. 2009. [22] M. E. Goldfarb and R. A. Pucel, “Modeling via hole grounds in microstrip,” IEEE Microw. Guided Wave Lett., vol. 1, no. 6, pp. 135–137, Jun. 1991. [23] E. M. T. Jones and J. T. Bolljahn, “Coupled-strip-transmission-line filters and directional couplers,” IRE Trans. Microw. Theory Tech., vol. 4, no. 2, pp. 75–81, Apr. 1956. [24] D. M. Pozar, Microwave Engineering, 2nd ed. New York: Wiley, 1998. [25] L. Zhu, H. Bu, and K. Wu, “Aperture compensation technique for innovative design of ultra-broadband microstrip bandpass filter,” in IEEE MTT-S Int. Microw. Symp. Dig., 2000, pp. 315–318. Kaijun Song (M’09) received the M.S. degree in radio physics and Ph.D. degree in electromagnetic field and microwave technology from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 2005 and 2007, respectively. He has been with the EHF Key Laboratory of Fundamental Science, the School of Electronic Engineering, UESTC, since 2007, where he is currently an Associate Professor. From August 2007 to July 2008, he was a Postdoctoral Research Fellow with Montana Tech of the University of Montana, Butte, on microwave/millimeter-wave circuits and microwave remote sensing technology. He is currently a Research Fellow with the State Key Laboratory of Millimeter Waves of China, Department of Electronic Engineering, City University of Hong Kong, where he is involved with microwave and millimeter-wave power-combining technology, UWB devices and circuits, and the design of monolithic microwave integrated circuits (MMICs). His current research fields include microwave and millimeter-wave/terahertz power-combining technology, UWB circuits and technologies, device modeling for RFIC and MMIC design; Substrate Integrated Waveguide technology; microwave/millimeter-wave devices, circuits, and systems, and microwave remote sensing technologies.

Quan Xue (M’02–SM’04) received the B.S., M.S., and Ph.D. degrees in electronic engineering from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 1988, 1990, and 1993, respectively. He remained with UESTC as a Lecturer and became a Full Professor in 1997. He worked briefly with the Chinese University of Hong Kong before joining the City University of Hong Kong, Hong Kong, in 1999, first as a Research Fellow and currently as an Associate Professor, the Director of Applied Electromagnetics Laboratory, and the Deputy Director of the State Key Laboratory of Millimeter Waves of China. Since May 2004, he has been the Principal Technological Specialist of State Integrated Circuit (IC) Design Base, Chengdu, China. He is the cosupervisor of two IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS) Best Student Contest papers (third place in 2003, and first place in 2004). He has authored or coauthored over 140 internationally refereed journal papers and over 50 international conference papers. His current research interests include antennas, power amplifier linearization, microwave components and subsystems, microwave monolithic integrated circuits, and RF integrated circuits. Dr. Xue is the coordinator of the IEEE Microwave Theory and Techniques Society AdCom Membership Services Region 10, and the coordinator of the Regional Initiatives/China Initiatives (Ad Hoc).

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An Experimental Technique for Characterizing Slow-Wave Characteristics of MIS-Like Transmission Lines Using Aqueous Dielectrics Themistoklis Prodromakis, Member, IEEE, and Christos Papavassiliou, Senior Member, IEEE

Abstract—This work is a study of the dielectric propagation properties of laminar substrates, which are known to support low dispersion modes with very small phase velocities. Slow modes are linked to a polarization mode supported by the insulator–semiconductor interface. The mode spectrum of metal–insulator–semiconductor lines is controlled by the substrate resistivity and the ratio of the semiconductor to insulator layer thicknesses. An experimental investigation of substrate modes normally requires the laborious fabrication of many specimens to cover a useful range of parameter variation. In this paper, we present an experimental platform that supports slow-wave propagation and allows easy adjustment of the parameters affecting the interfacacial polarization mechanism. Index Terms—Aqueous dielectrics, high dielectric, interfacial polarization, Maxwell–Wagner, metal–insulator–semiconductor (MIS) lines, slow-wave.

I. INTRODUCTION

M

ICROSTRIP lines on semiconductor–insulator substrates were introduced in the late 1960s, after Hyltin [1] proposed the use of high-resistivity substrates instead of the conventional insulating structures for microstrip transmission lines. This approach led to the monolithic integration of passive and active devices on a semiconductor substrate. A significant volume of research has been carried out since on accurately modelling propagation on microstrip and other conductor patterns defined on semiconductor–insulator substrates. Under certain conditions, transmission lines on semiconducting substrates cause appreciable delays in propagating signals. Signals propagating on data buses made on metal–insulator–semiconductor (MIS) structures (Fig. 1) often exhibit large “data-dependent dispersion,” suggesting that some bus modes have very small propagation velocities, significantly slower than on tracks printed on homogeneous silicon substrates of comparable thicknesses. This “slow” behavior of MIS lines was first theoretically and experimentally studied for a microstrip on an SiO -Si substrate by Guckel [2] and Hasegawa et al. [3]. Manuscript received February 24, 2009; revised September 16, 2009. First published March 01, 2010; current version published April 14, 2010. This work was supported in part by the EU AMICOM Network of Excellence. The authors are with the Circuits and Systems Group, Department of Electrical and Electronic Engineering, Imperial College of Science, Technology and Medicine, London SW7 2AZ, U.K. (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042521

Fig. 1. MIS structure.

Intuitively, slow-wave propagation can be attributed to the finite conductivity of the semiconducting substrate, which has a “filtering effect” on the electromagnetic fields. When certain conditions between signal frequency and the physical characteristics of the substrate are met, the electric fields in the substrate are screened by interface charge, while magnetic fields penetrate the substrate. The large time constant associated with this energy exchange mechanism is responsible for the significant slow-down in wave propagation. Evidently, this mechanism is reminiscent of a resonance. Nonetheless, there exists a frequency band where losses are relatively low and dispersion is insignificant. Studies presenting different approaches for analyzing MIS structures abound in the literature. The main results are summarized in Table I. In all previous studies, the slow-wave mode was regarded as a limitation which needed to be avoided by meticulous modeling. However, what used to be a limiting factor to overall system performance can nowadays be exploited for practical engineering to realize compact phase shifters and filters. Numerous devices utilizing slow-wave propagation to this end have been reported, including an electronically variable phase shifter [11], a semiconductor traveling-wave amplifier [11], a voltage-tunable phase-shift oscillator [12], and, more recently, miniaturized microstrip antennas [13], delay lines [14], as well as microwave filters [15]–[17]. In order to evaluate the results obtained by utilization of the existing models, MIS lines have to be experimentally investigated over a large variation of parameters, including substrate conductivity, semiconductor-to-insulator thickness ratio as well as line thickness. This normally requires the fabrication of a large number of specimens. Instead, the experimental platform, presented here, overcomes this problem. This structure is based on a macroscopic model of the well-known MIS microstrip with

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TABLE I MATHEMATICAL ANALYSIS HISTORY OF MIS LINES

Fig. 2. Resistivity-frequency domain chart showing different modes of propagation in MIS microstrip.

the semiconductor layer emulated by an ionic solution whose conductivity can be varied. In addition, the physical dimensions of each layer can be easily adjusted, which facilitates the investigation of slow-wave characteristics over a wide range of parameters.

II. PROPAGATION CHARACTERISTICS OF MIS MICROSTRIP

A. Physical Explanation of Different Propagating Modes A four-layer metal–insulator–semiconductor–metal microstrip transmission line, similar to the one depicted in Fig. 1, supports three main modes [3] at low frequencies. The transition from one propagation mode to the other is determined by several parameters, such as the frequency of the applied signal as well as the electric and magnetic characteristics of the materials involved. Fig. 2 demonstrates the dependence of each mode on the frequency as well as the conductivity of the substrate. Also, since the dominance of each mode is strongly dictated by these two parameters, an intuitive rule of thumb is

the comparison of the substrate’s thickness with the skin depth, given by

(1) where is the frequency of the applied signal, the magnetic is the conductivity of the permeability of free space, and substrate. At intermediate frequencies and intermediate values of substrate conductivity, the skin depth is comparable to the thickness of the substrate and thus propagation is due to the slow-wave mode. This mode owns its existence to a thin space-charge layer that is formed at the insulator–semiconductor interface. These charges act as a lossy ground plane, allowing magnetic fields to penetrate it. However, the intrinsic impedance of the substrate is given by (2) and, at intermediate frequencies and for relatively conductive substrates, it is rather low. Thus, the electric field lines are

PRODROMAKIS AND PAPAVASSILIOU: TECHNIQUE FOR CHARACTERIZING SLOW-WAVE CHARACTERISTICS OF MIS-LIKE TRANSMISSION LINES

(a)

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(b)

Fig. 3. Quasi-static (a) E and (b) H field distribution in a MIS microstrip.

greatly confined within the insulating layer, as shown by HFSS [18] simulations, depicted in Fig. 3. The confinement of the electric field within the top metal layer and the insulator–semiconductor interface introduces a large distributed capacitance in accordance with the small disseparating these two boundaries, given by tance

The effective dielectric constant of a microstrip line on a homogeneous dielectric substrate is always less than the relative permittivity of the substrate and it increases with frequency. A number of analytic approximations to the dispersion of the microstrip effective dielectric constant are available, for example, the one given as follows after Pozar [19]:

(3)

(7)

where is the width of the microstrip. Additionally, the full penetration of magnetic fields implies an inductance in accordance with the large thickness of the substrate

In a perfect homogeneous dielectric, where the energy is guided through the entire substrate, the electric and magnetic fields penetrate to the same depth. That being so, for a lossless case, the wave velocity is equal to

where is the substrate’s thickness, is the relative dielectric is the conductor width. Howconstant of the substrate, and ever, such a microstrip line only supports the dielectric mode. In contrast, a microstrip line on either an MIS or a Schottky structure supports all three modes introduced earlier. At intermediate frequencies, where the slow-wave mode dominates, the transmission line behaves as if it were built on a homogeneous substrate of very high permittivity. Also, in the case where the and , respectwo layers are Si and SiO of thicknesses tively, the effective dielectric constant can be approximated by

(5)

(8)

where and are the equivalent inductance and capacitance per unit length and is the phase constant. Similarly, by utilization of (3) and (4), the propagation velocity of a wave through a microstrip line operating in the slow-wave mode region is

Based on (8) the effective dielectric constant of typical silicon-silicon dioxide substrates is simulated in Fig. 4. Since the can be very semiconductor to insulator thickness ratio large, the effective relative permittivity of the substrate can be increased by several orders of magnitude, leading to slowing factors in excess of 100. Following [2] and [3], it is shown that the slow-wave mode is present at frequencies where the substrate is nearly the same thickness as the skin depth and the maximum frequency at which the slow-wave mode occurs is given by

(4)

(6)

is now the phase constant of the slow-wave mode. where Clearly, the wave velocity is a function of the substrate. As such, the combination of the associated large capacitance and large inductance of the slow-wave mode manifest an abnormally low phase velocity. This phase velocity is much slower than the permittivity of either the insulator or the substrate alone would indicate.

(9) An intriguing characteristic of this polarization mode is that it exhibits a low-pass response. The upper cutoff frequency

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Fig. 4. Frequency response of relative effective dielectric constant (left axis) and attenuation per wavelength (right axis) for substrate’s conductivities of  20 S/cm. Inset: equivalent circuit of the two layer lossy condenser [21].

=

normal to the interface, and often referred to to as eddy currents. These circulating eddies of current in turn create electromagnets with magnetic fields that oppose the effect of the applied magnetic field. Nevertheless, longitudinal as well as transverse components of the conduction currents are not the only source of attenuation. Conductor losses at the top metal as well as the ground metallization plane need to be considered as well. When losses are small, it can be assumed that both semiconductor and conductor attenuation components are additive. In this case, attenuation due to the skin effect can be calculated using the method proposed by Wheeler [20]. Otherwise, analytical models, such as those summarized in Table I, have to be used. and skin It is worth noting that both semiconductor vary with frequency and are proportional to effect losses and , respectively, as (14)

is constrained by the relaxation frequency of the interfacial polarization which signifies the onset of the quasi-TEM mode and the onset of the skin effect mode as

where (15)

(10) (11)

(16) Substituting (15) and (16) into (14), it follows that

The slow-wave-mode cutoff frequency is maximized at a substrate conductivity and layer thicknesses that set the two characteristic frequencies such that they satisfy (12) (13) Furthermore, the low-pass response of the Maxwell–Wagner polarization mechanism is supplemented by the fact that the slow-wave mode exhibits significant losses at higher frequencies. In (6), we came across the phase constant of this mode. However, this mode is not lossless and, as such, an attenuation will delineate this mode together with . Also, as factor demonstrated in Figs. 2 and 4, losses are particularly high in the transition regions between modes. B. Attenuation An optimist might say that the high effective dielectric constant exhibited by a semiconductor–insulator substrate is the ideal scenario for miniaturizing passive components at no cost. Unfortunately, nothing comes for free in nature. The phenomenon we have been discussing is a near resonance, and we fundamentally expect the multilayer structures to exhibit high losses, especially outside the slow-mode band (Fig. 4). The first measurements of losses in microstrip structures employing semiconducting substrates were carried out by Hughes in [11] followed by Hasegawa et al. in [3]. The latter work assumed that losses in MIS microstrips were entirely due to current flow in the semiconductor layer, where the electric field is

(17) which justifies the relation given in (12) for maximizing the slow-wave bandwidth while achieving minimal losses. At low frequencies, the metal strip losses dominate, while at high frequencies the semiconductor losses dominate. Finally, an auxiliary though simplistic treatment of the losses is to consider that the only losses present in this system are due to collisions of the material’s atoms during polarization. Dielectric dissipation is described by the imaginary part of the complex effective permittivity of the medium and a direct measure of of this artificial medium, these losses is via the loss tangent demonstrated in Fig. 5. III. EXPERIMENTAL STUDY OF MICROSTRIP LINES ON THE FR4-WATER SYSTEM It is useful to experimentally investigate the slow-wave behavior of MIS lines over a wide range of parameters. To avoid fabricating a large number of specimens, we have developed an experimental platform that allows easy variation of the effective electric permittivity of the substrate. In what follows, we demonstrate that this platform supports the propagation of slow waves and thus can serve as a macroscopic test bench for the evaluation of devices based on the MIS microstrip line. A. Experimental Platform The experimental platform, shown in Figs. 6 and 7, replicates the insulator–semiconductor system which is well known for

PRODROMAKIS AND PAPAVASSILIOU: TECHNIQUE FOR CHARACTERIZING SLOW-WAVE CHARACTERISTICS OF MIS-LIKE TRANSMISSION LINES

Fig. 5. Loss tangent frequency response for several semiconductor–insulator thickness ratios as well as different substrate conductivities.

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Fig. 7. Top view of the experimental structure showing the SMA connectors as well as the printed lines.

Fig. 8. Dependence of dielectric relaxation of water on temperature variations 1 GHz. at f

=

Fig. 6. Experimental structure with a copper plate forming the back metallization.

supporting the propagation of slow waves. In this model, the semiconductor layer is simulated by an ionic solution while the insulator and metal layers are formed on FR4 substrates instead of typical insulators such as SiO . The microstrip lines are excited through SMA launchers fitted on the top of the platform. Furthermore, for ensuring a uniform ground return path as well as preventing leakages to the top of the platform, the copper ribbons shown in Figs. 6 and 7 were utilized. The following design considerations offer significant advantages when compared with the standard MIS system. • The salinity of the solution can be varied by adding an electrolyte, which, in our case is NaCl, or an acid such as HCl acid. This allows controlled variation of the aqueous dielectric conductivity. • Different materials can be employed to construct the top dielectric layer; laminates of several thicknesses and permittivity can be easily fitted on the experimental platform which results in greater flexibility.

• The ionic solution’s thickness can be adjusted with the aid of supporting posts of variant height or even an adjustable thickness mechanism. • Different conductor patterns can easily be introduced, as they only require printing the necessary pattern on a laminate. B. Apparatus In order to measure the conductivity of the ionic solution and verify the predicted values given by the salinity of the aqueous substrate, we utilized a standard technique that has been described in [22]. Nonetheless, the volumetric conductivity of the solutions was also measured as a function of frequency with the aid of Agilent’s 85070E Dielectric Probe Kit. An unexpected complication was introduced by the temperature dependence of Maxwell–Wagner dispersion, as discussed in [23]. Additionally, the dielectric relaxation of water (Fig. 8) as well as the solubility of NaCl and HCl acid in water, is temperature-dependent. Therefore, to reduce systematic errors, it is necessary to use a thermometer for monitoring the ionic’s solution temperature and a heater for ensuring that measurements

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=

=

Fig. 9. Experimental platform has been set with t 0.5 mm and t 20 mm for a 96-mm long microstrip line. Measurements were taken with the salinity of the ionic solution varying up to 140 ppt. (a) Measured electrical lengths of the microstrip line in degrees. (b) Forward transmission coefficient in decibels.

TABLE II RELAXATION FREQUENCY OF INTERFACIAL POLARIZATION IN MEGAHERTZ

are taken under constant temperature. Manual heater control proved to be adequate for our needs and an automatic thermostat was not used. Finally, all of the apparatus depicted in this section were fitted in the supply tank shown both in Figs. 6 and 7. IV. EXPERIMENTAL RESULTS The results presented in the following sections demonstrate the ability of the experimental platform to support slow-wave propagation and serve as an adequate platform for a detailed investigation of the slow-wave behavior in MIS printed waveguides. In the discussion, we demonstrate that all obtained data are in excellent agreement with the theory. All measurements were carried out using an HP8753D 6 GHz Network Analyzer calibrated with 3.5-mm coaxial calibration standards. A. Effect of Substrate Conductivity The main function of substrate conductivity is to establish the frequency band over which the slow mode is observed. As discussed previously, increasing the substrate conductivity of a MIS system results in an increased frequency band in which the slow-wave mode dominates [see (9)]. Therefore, as demonstrated in Table II, low-resistivity substrates offer large slowing factors over broader bandwidths. Additionally, the associated high losses, which grow rapidly outside the polarization mode, are shifted towards higher frequencies.

In Fig. 9(a) and (b), we plot measurements of propagation of a 96-mm line on our system. In this measurement, a 20-mm-thick layer of water plays the role of the semiconductor and stan0.5 mm was used as dard FR laminate of thickness the insulator. The distilled water conductivity was measured to 0.09 S/m. In this case, the slow-wave be approximately mode is partially supported in the low-MHz region, namely between 200–350 MHz. A direct comparison with simulation of an idealized quasi-TEM line of the same dimensions on a homogeneous water substrate, plotted on the same graphs, indicates that the slow mode is approximately two times slower than the quasi-TEM mode. The high-frequency limit of the slow-wave mode lies at about 350 MHz. At that point, the effective dielectric constant of the line starts decreasing and eventually settles at the much lower value given by Wheeler’s approximation (7). Rather large losses at the high end of the band are evident in Fig. 9(b), where the forward transmission coefficient of the line is plotted. The addition of 70 g of NaCl yielded a saline solution of 35 parts per thousand (ppt), which resulted to a measured conduc5 S/m. As expected, increasing the conductivity tivity of of the ionic solution broadens the frequency range in which the Maxwell–Wagner polarization occurs. A 50-MHz shift of the relaxation of the structure is clearly visible in Fig. 9(a), with the electrical length of the line tracking that of the line based on the less saline solution, with the exemption of the extended band. Additionally, in agreement with theory, the high-loss transition region, from slow-wave to skin-effect mode, has shifted upwards in frequency by approximately 50 MHz. We confirmed that additional NaCl did not proportionally increase the solution’s conductivity, as we were rather close to the solubility limit. Nonetheless, we validated that the conductivity of the aqueous solution can be further increased by carefully dissolving an acid such as HCl acid. The associated unwrap phase measurements of the line are demonstrated in Fig. 9(a) while the forward transmission coefficient of the line is depicted in Fig. 9(b).

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Fig. 11. Mismatch loss due to the slow-wave mode impedance decrement.

and the same measurements were performed with the length and the width of the line as variables. Fig. 10(a) presents the electrical length of a microstrip line similar to the previous one but with its length halved. As expected, the measured phase shift for both the distilled water as well as the 35-ppt saline solution is almost halved when compared with that presented in Fig. 9(a). A wider line, as expected, will exhibit lower resistance but an increased per-unit length capacitance. Consequently, the slow-wave propagation has a more dominant effect on wider lines than on narrower lines and thus the phase shift of such lines differs significantly. This behavior is well illustrated in Fig. 10(a)–(c). Before devices or circuits that exploit the Maxwell–Wagner polarization are designed, it is essential to investigate the characteristic impedance of the slow mode. It is surprising, perhaps, that the usual approximation for the characteristic impedance of the quasi-TEM mode applies (18)

=

=

Fig. 10. Experimental platform has been set with t 0.5 mm and t 20 mm for a 46-mm long microstrip lines. In these figures, the measured electrical lengths (in degrees) of the microstrip lines are shown for various line widths: (a) w = 0.5 mm, (b) w = 1 mm, and (c) w = 2 mm.

where is the characteristic impedance of the microstrip line is the complex effective dielectric on an air substrate and constant of the substrate in the slow-wave mode. It follows that, when the effective permittivity is high, the line’s impedance drops significantly, making impedance matching difficult to implement. In Fig. 11, we plot the meafor the 96-mm sured mismatch loss long microstrip line discussed earlier. By observation, the mismatch loss increases with frequency and obtains a maximum at 250 MHz, namely at the onset of the slow-wave mode. What is interesting is that all saline solutions acquire the same maximum. This is consistent with our anticipation that all structures examined exhibit similar maximum slowing factor, thus the impedance of the lines will be rather similar. Finally, the distilled water configuration achieves, as anticipated, a better loss factor above 250 MHz. C. Effect of Semiconductor-to-Insulator-Thickness Ratio

B. Effect of Transmission Line Dimensions To further illustrate the usefulness of this experimental platand ) were kept as before form, the layer thicknesses (

Wave propagation on MIS lines is mainly controlled by the substrate’s resistivity, the operating frequency and the semiconductor to insulator thickness ratio. Although, the existence of

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Fig. 12. Unwrapped phase of a microstrip line with L = 96 mm and W = 0.5 mm. During measurements, the substrate was formed by distilled H O as well as a 140-ppt saline solution, with the thickness of both layers varying. Shown are two configurations: (a) t = 10 mm with t = 0.5 mm and (b) t = 20 mm with t = 1.55 mm. TABLE III CONTROLLABLE RANGE OF SLOW-WAVE FACTOR

of the substrate for which . Finally, it should be noted that there were no significant variances between solutions of different salinity, for all experiments done that fall in this section, as the effect of the interfacial polarization mechanism becomes insignificant under these parameters. V. CONCLUSION

the slow-wave mode is mainly dependent upon the first two parameters, it is the latter that is a direct measure of the speed of wave propagation (8). Table III demonstrates the achievable thickness ratios of our experimental platform and the yielded slow-wave factors. Undoubtedly, at the limit where the thickness of the insulator is comparable to that of the semiconductor, the slow-wave mode’s impact is minimum. Measurements presented in Fig. 12(a) and (b) depict the effect of varying the thickness of the insulating and semiconducting layers on the relative effective electric permittivity of the line. The measurement is repeated at a number of substrate salinities. For a semiconductor-to-insulator-thickness ratio of 40, the electrical length response of a 96-mm long transmission line will be as shown in Fig. 9(a). Reducing this ratio by a factor of two of this structure by a factor of two. The also reduces the electrical length of this line is indeed observed to be half its reference value [Fig. 9(a)]. In the case where the H O-FR4 ratio is set by utilization of a 1.55-mm thick FR4 laminate on top of 20 mm of water, the slowing factor will be significantly smaller when compared with 0.5 mm) insulator is utilized. the case where the thinner ( Therefore, even though these lines are of the same dimensions, their electrical lengths differ substantially [Fig. 12(a) and (b)]. However, the same succession of events is repeated in this case as well, i.e., the effective length of the line is enhanced at low frequencies, deteriorates as the attenuation maximizes, and then increases linearly according to the skin effect dielectric constant

The slow-wave mode of a MIS transmission line is dependent on various parameters, including: 1) substrate resistivity; 2) the ratio of semiconductor-to-insulator thickness; and 3) the ratio of the dielectric constants of semiconductor and insulator. Despite the availability of several approximate numerical models in the literature, a practical investigation is necessary for developing useful slow-wave components. Thus, a thorough investigation requires the use of large numbers of test specimens. In this study, a macroscopic model structure for MIS transmission lines, supporting slow-wave propagation, has been designed and characterized. This structure uses an aqueous dielectric, whose conductivity can easily be altered and offers flexibility of replacing the insulating layer by any laminate material. These design considerations make the experimental structure ideal for exploiting slow waves on laminar substrates over a wide range of parameters. In order to evaluate the effectiveness of our test bench, the system was set with distilled water as the semiconducting substrate, the insulator was formed by standard FR4 laminates and the substrate’s conductivity was altered by adding NaCl and HCl. The presented results demonstrate the ability of this platform to support slow-wave propagation, following all theoretical predictions, and yield the effect of the Maxwell–Wagner polarization mechanism under various conditions. It should be also noted that we have identified some limitations in practical use of this experimental platform in the sense that it is limited to low-conductivity substrates. We believe that the limitations can be overcome through the use of alternative solvents and solutes. We are currently evaluating the test bench with coplanar

PRODROMAKIS AND PAPAVASSILIOU: TECHNIQUE FOR CHARACTERIZING SLOW-WAVE CHARACTERISTICS OF MIS-LIKE TRANSMISSION LINES

waveguide patterns, which reduce artifacts associated with the grounding scheme employed in this work. ACKNOWLEDGMENT The authors would like to thank P. Jones and M. Harbour for their technical support during the course of this work. The authors would also like to acknowledge Rogers Corporation, Rogers, CT, for supplying us with laminate samples. REFERENCES [1] T. M. Hyltin, “Microstrip transmission on semiconductor dielectrics,” IEEE Trans. Microw. Theory Tech., vol. MTT-13, no. 11, pp. 777–781, Nov. 1965. [2] H. Guckel, P. A. Brennan, and I. Palocz, “A parallel-plate waveguide approach to microminiaturized, planar transmission lines for integrated circuits,” IEEE Trans. Microw. Theory Tech., vol. MTT-15, no. 8, pp. 468–476, Aug. 1967. [3] H. Hasegawa, M. Furukawa, and H. Yanai, “Properties of microstrip line on Si-SiO system,” IEEE Trans. Microw. Theory Tech., vol. MTT-19, no. 11, pp. 869–881, Nov. 1971. [4] D. Jager, “Slow-wave propagation along variable Schottky-contact microstrip line,” IEEE Trans. Microw. Theory Tech., vol. MTT-24, no. 9, pp. 566–573, Sep. 1976. [5] D. F. Williams, “Metal–insulator–semiconductor transmission lines,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 2, pp. 176–181, Feb. 1999. [6] J. P. K. Gilb and A. Balanis, “MIS slow-wave structures over a wide range of parameters,” IEEE Trans. Microw. Theory Tech., vol. 40, no. 2, pp. 2148–2154, Dec. 1992. [7] E. Tuncer and D. P. Neikirk, “Highly accurate quasi-static modeling of microstrip lines over lossy substrates,” IEEE Microw. Guided Wave Lett., vol. 2, no. 10, pp. 409–411, Oct. 1992. [8] A. K. Verma, Nasimuddin, and E. K. Sharma, “Analysis and circuit model of a multilayer semiconductor slow-wave microstrip line,” Proc. Inst. Elect. Eng.—Microw., Antennas, Propaga., vol. 151, pp. 441–449, Oct. 2004. [9] G. Wang, R. W. Dutton, and C. S. Rafferty, “Device-level simulation of wave propagation along metal–insulator–semiconductor interconnects,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 4, pp. 1127–1136, Apr. 2002. [10] G. Wang, X. Qi, Z. Yu, and R. W. Dutton, “Device level modeling of metal–insulator–semiconductor interconnects,” IEEE Trans. Electron Devices, vol. 48, no. 4, pp. 1672–1682, Aug. 2001. [11] G. W. Hughes and R. M. White, “Microwave properties of nonlinear mis and Schottky-barrier microstrip,” IEEE Trans. Electron Devices, vol. ED-22, no. 10, pp. 945–956, Oct. 1975. [12] G. W. Hughes, “Electromagnetic slow-wave devices utilizing metal–insulator–semiconductor microstrip.,” Ph.D. dissertation, Dept. Elect. Eng. and Comput. Sci., Univ. of California, Berkeley, 1973. [13] T. Prodromakis and C. Papavassiliou, “Towards a microstrip antenna on synthetic high-dielectric constant substrates,” in Proc. IEEE High Frequency Postgraduate Student Colloq., Sep. 2005, vol. 10, pp. 57–61. [14] T. Prodromakis, C. Papavassiliou, and G. Konstantinidis, “A miniaturized delay line based on slow-wave substrates,” in Proc. IEEE Int. Symp. Circuits Syst., May 2007, pp. 369–372.

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[15] T. Prodromakis and C. Papavassiliou, “Distributed filter design on silicon CMOS,” in Proc. IEEE Int. Symp. Circuits Syst., May 2006, pp. 3309–3312. [16] T. Prodromakis, C. Papavassiliou, and G. Konstantinidis, “Micro-scale lowpass filters based on the Maxwell–Wagner phenomenon,” in Proc. IEEE Eur. Microw. Conf., Oct. 2007, vol. 1, pp. 335–340. [17] T. Prodromakis, C. Papavassiliou, and K. Michelakis, “Microstrip stepped impedance lowpass filters based on the Maxwell–Wagner polarization mechanism,” in Proc. IEEE Int. Symp. Circuits Syst., May 2008, pp. 616–619. [18] “High-Frequency Structure Simulator (HFSS).,” ANSYS Corp., Basingstoke, U.K., 2006, ver. 10.0. [19] D. Pozar, Microwave Engineering. New York: Wiley, 2005. [20] H. A. Wheeler, “Formulas for the skin effect,” Proc. IRE, vol. 30, no. 9, pp. 412–424, Sep. 1942. [21] A. R. V. Hippel, Dielectrics and Waves.. Cambridge, MA: MIT Press, 1954. [22] S. L. Schiefelbein, N. A. Fried, K. G. Rhoads, and D. R. Sadoway, “A high-accuracy, calibration-free technique for measuring the electrical conductivity of liquids,” RSI, vol. 69, pp. 3308–3313, Sep. 1998. [23] K.-I. Kamiyoshi, T. Fujimura, and T. Yamakami, “Some characteristics of the Maxwell–Wagner type dielectric dispersion,” Sci. Rep. Res. Inst., ser. A, Phys. Chem. Metallurg., vol. 19, pp. 125–152, 1967. Themistoklis Prodromakis (M’08) received the B.Eng. degree in electrical and electronic engineering from Lincoln University, Lincoln, U.K., in 2003, the M.Sc. degree in microelectronic systems and telecommunications from Liverpool University, Liverpool, U.K., in 2004, and the Ph.D. degree from the Circuits and Systems Group, Imperial College London, London, U.K., in 2008. He holds a Corrigan Fellowship and is currently within the Bionics Group of the Institute of Biomedical Engineering, Imperial College London. His background is in RF and microwave design and microelectronics processing techniques. During his research career, he has contributed to several research projects including passive components, miniaturization techniques, MEMS-based phase-shifting topologies, slow-wave filters on laminar substrates, development of high-k dielectrics, processing techniques for engineering polarization mechanisms, CMOS-based chemical sensors, and encapsulation techniques.

Christos Papavassiliou (SM’05) was born in Athens, Greece, in 1960. He received the B.Sc. degree in physics from the Massachusetts Institute of Technology, Cambridge, in 1983, and the Ph.D. degree in applied physics from Yale University, New Haven, CT, in 1988. He has worked on monolithic microwave integrated circuit (MMIC) design and measurements at FORTH, Crete, Greece, and has been involved in several European and regional projects on GaAs MMIC technology. In 1996, he joined Imperial College London, London, U.K., where he is a Senior Lecturer. He has contributed to 40 publications. He currently works on SiGe technology development as well as instrumentation and substrate noise coupling in mixed-mode integrated circuit design.

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A Design Method for Microstrip Directional Couplers Loaded With Shunt Inductors for Directivity Enhancement Seungku Lee and Yongshik Lee, Member, IEEE

Abstract—An accurate design method is proposed for directivity enhancement of microstrip directional couplers loaded with shunt inductors. The parasitic effects of junction discontinuities in various parts of such microstrip directional couplers have critical effects especially on the directivity, and therefore they must be taken into account. Without proper modeling of these parasitic effects, directivity enhancement becomes extremely difficult especially for weak coupling levels. The demonstrated method of analysis can be applied to obtain exact designs of all previous microstrip directional couplers that are loaded symmetrically with series and/or shunt reactance for directivity enhancement, regardless of the coupling levels. Based on the proposed method, a 20-dB microstrip directional coupler is designed at 2.4 GHz. A maximum directivity of 56 dB has been measured, which is an improvement of 48 dB over a conventional microstrip directional coupler. A 16.3% bandwidth at 2.4 GHz has been measured in which the directivity remains above 20 dB, while the maximum variation in the coupling level is 0.5 dB. This is the first work to demonstrate directivity of more than 50 dB for a 20-dB microstrip directional coupler. Index Terms—Directional coupler, directivity enhancement, isolation enhancement, microstrip directional coupler, parallel coupled line, parallel coupled-line coupler, parasitic effect, 20-dB coupler.

I. INTRODUCTION

ARIOUS techniques have been proposed to overcome the inherent problem of microstrip directional couplers, which is poor directivity. Among them, the method of reactive loading such as those in [1]–[8] have been a popular choice due to its relatively simple design procedure, compared with the methods of distributed compensation [9]–[12] and other techniques utilizing delay lines [13], spur lines [14], or reflected power cancellation [15]–[17]. However, the reactively compensating methods have been demonstrated experimentally for relatively tight coupling levels

V

Manuscript received February 24, 2009; revised December 04, 2009. First published March 15, 2010; current version published April 14, 2010. This work was supported by the Low Observable Technology Research Center and the Defence Nano Technology Application Center Programs of the Defense Acquisition Program Administration and the Agency for Defense Development of Korea under Contract UD080040GD and Contract UD090088JD. The authors are with the Department of Electrical and Electronic Engineering, Yonsei University, Seoul 120-749, Korea (e-mail: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042544

only. For instance, [1] and [2] utilize series inductors for directivity enhancement of directional couplers with a relatively tight coupling level of 10 dB only. This is perhaps due to the design equations that are based on approximate analysis, making them valid only for tight coupling levels. On the other hand, the design equations for the capacitive-compensation techniques in [3] and [4] are accurate. Also, they have a strong advantage of providing a superior directivity-enhanced bandwidth, since the compensating capacitors are seen in the odd mode only but not in the even mode. However, the experimental results are shown for a fairly tight coupling level of 7 dB only. Directivity enhancement becomes a much more difficult task for weakly coupled directional couplers [18], especially with reactive loading. The most important issue is the parasitic effects related to junction discontinuities that have never been investigated. The effects on the directivity of such couplers may be detrimental especially for weak coupling levels at high frequencies, Therefore, they must be taken into account in the design equation through proper modeling. Otherwise, intensive layout optimization through time-consuming full-wave simulations may be required. This paper expands the previous work by the authors [8] and fully investigates the design method for microstrip directional couplers loaded with shunt inductors for directivity enhancement. In Section II and III, a design method is demonstrated for a generalized structure that provide flexibility in design process. Performance depending on the location of loading is investigated in detail. In Section IV, the proposed method is compared with other reactively compensating methods. Advantages and disadvantages in various aspects are discussed. In Section V, the parasitic effects are discussed that can be detrimental, especially for loosely coupled couplers that operate at high frequencies. A new set of design equations is derived to include the capacitance that model the parasitic effects. In Section VI, experimental results for a 20-dB coupler centered at 2.4 GHz are provided. Finally, conclusion follows in Section VII. II. MICROSTRIP DIRECTIONAL COUPLER LOADED WITH SHUNT INDUCTORS Shown in Fig. 1 are the schematics of a conventional and the proposed microstrip directional couplers. In the proposed directional coupler, the conventional directional coupler is divided into three sections and, between two sections of each strip, is loaded with two identical shunt inductors. Maintaining a symmetric structure is an important factor since an ideal coupler

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LEE AND LEE: DESIGN METHOD FOR MICROSTRIP DIRECTIONAL COUPLERS LOADED WITH SHUNT INDUCTORS

Fig. 1. Schematics of: (a) conventional and (b) proposed microstrip directional couplers.

Fig. 2. Even- and odd-mode equivalent circuit of proposed microstrip directional coupler.

with ideal isolation and matching performance can be realized if and only if the structure is symmetric [4]. The even- and odd-mode electrical lengths of both couplers at the dein Fig. 1 are such that the lengths are effectively sign frequency. The proposed coupler in Fig. 1(b) is the general structure for the couplers in [8], where the inductors are located , and in [6], where the inductors at the center . are located at the ports Applying the even- and odd-mode analysis between ports 1 and 3, the proposed four-port coupler can be simplified to a set of two identical two-port networks, as shown in Fig. 2. Then, an additional even- and odd-mode analysis between ports 1 and 2 (or ports 3 and 4) is applied, the equivalent circuits of which are shown in Fig. 3 for all four modes. The input impedance of each mode in Fig. 3 are (1)

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Fig. 3. Equivalent circuits of proposed directional coupler: (a) even mode (ports 1 and 3) followed by even mode (ports 1 and 2); (b) even mode (ports 1 and 3) followed by odd mode (ports 1 and 2); (c) odd mode (ports 1 and 3) followed by even mode (ports 1 and 2); and (d) odd mode (ports 1 and 3) followed by odd mode (ports 1 and 2).

The -parameters of the four-port coupler in Fig. 1(b) can be expressed by those of the two-port even- and odd-mode equivalent circuits in Fig. 2. The relationships are [19] (6a) (6b) (6c) (6d) where the subscripts and denote even and odd modes, respectively. is Thus, the condition for infinite directivity . and can be expressed in terms of the even- and odd-mode -parameters in (5) as (7a) (7b) is the system impedance. where Therefore, the following two conditions are obtained for in: finite directivity, or

(2) (8) (9)

(3) (4)

With (5), these conditions can be simplified further to

The -parameters of the two-port even- and odd-mode equivalent circuits in Fig. 2 can be expressed by the input impedances

(10) (11)

(5a) (5b) (5c) (5d)

Applying (1)–(4) to (10), the following equation is obtained for the inductance : (12)

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where

With the even-mode impedance , the odd-mode of the original directional coupler and the impedance location of loading, , , , and , the inductance that provides infinite directivity can be obtained. Also, this condition guarantees not only an isolation null, but also a perfect match at the same frequency. To the author’s experience, (12) yields positive solutions for all practical cases. Equation (11) implies that the system impedance of the proposed directional coupler is no longer the same as the system . impedance of its conventional counterpart, This is a common phenomenon for reactively loaded directional couplers. Reactively loading a directional coupler improves its directivity but, at the same time, alters the system impedance and, therefore, the actual coupling level . In order to maintain the original system impedance and the coupling level before and after loading, (10), (11), and the in (6c) must be solved equation for the coupling level simultaneously. However, the resulting are nonlinear equations that are difficult to solve analytically. As an alternative, an iterative solution method can be applied, which is discussed in detail in Section III. Fig. 4 shows the inductance , system impedance , and the coupling level depending on the location of loading for couplers with various coupling levels at 2.4 GHz. The substrate has 3.5, 0.76-mm thickness, 0, and 35- m copper cladding. The figure shows the actual parameters of the initial design, which are altered due to loading. The figure also shows the design parameters of the final design which has the same system impedance and the same coupling level as the original unloaded coupler. The final design is obtained by the iterative solution method in Section III. For instance, for a 20-dB coupler with inductors loaded at , the initially calculated inductance is the center 5.771 nH from Fig. 4(a). However, the loaded inductors change 50 to the system impedance from 96.54 [Fig. 4(b)], resulting in an actual coupling 17.82 dB [Fig. 4(c)] in a 96.54 system. level of To compensate for the changes in the system impedance and the coupling level, the iterative solution method in Section III is applied. In the final design, the coupled line needs to be designed to have a coupling level of 22.03 dB [Fig. 4(c)] in a 23.78 system [Fig. 4(b)]. When this coupled line is loaded with 2.504-nH inductors [Fig. 4(a)], the resulting is a coupler with perfect matching, infinite directivity, and exact 20 dB coupling at 2.4 GHz in a 50system.

Fig. 4. (a) Calculated inductance (L), (b) system impedance (Z ), and (c) coupling level (C ) as a function of location of loading for various coupling levels. ) and design parameters of final design Actual parameters of initial design ( (

).

The results in Fig. 4 indicate that there is no optimum location for inductive loading. As can be seen in Fig. 4(a), the minimum inductance is required when the coupler is loaded at the center , regardless of the coupling level. This is a great advantage since lower inductance generally indicates higher and higher self-resonant frequency [20], [21]. Moreover, when loaded at the center, the actual inductance is half of the value in Fig. 4(a) since the two shunt inductors can be combined. On is at its maximum when the the other hand, the change in , inductors are located at the center of the coupler while it is at its minimum when they are loaded at the ports . Fig. 4 suggests that, for very tight coupling, the changes in the system impedance and the coupling level may be sufficiently small to be neglected. However, as the coupling

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optimum location of loading, depending on the design parameters such as the inductance and/or the directivity and coupling bandwidths. III. ITERATIVE SOLUTION METHOD The iterative solution method serves to obtain the design parameters of the proposed coupler that provide infinite directivity while maintaining the system impedance and the coupling level before and after loading. The method compensates for the difand the acferences between the designed tual and between the designed and the acrepeatedly, until the differences become negtual coupling ligible. The required inductance is recalculated after each iteration stage. of the To avoid confusion, the system impedance in this section. This leads to original coupler is denoted as the following relationships between the even-/odd-mode impedances and the coupling level : (13a) (13b) Fig. 5. (a) Directivity and (b) coupling levels for 5-dB and 30-dB couplers, as a function of location of loading.

becomes weaker, the changes may be sufficiently substantial that they must be compensated for. This is especially true when the inductors are loaded at the center since the change in is the largest. This may be problematic, especially for weak coupling levels. For a 30-dB coupler, for instance, the coupled 17.02 , which may be line must be designed to have too low to implement. This can be overcome by loading the , the inductors at different locations. For instance, for coupled line can be designed to have a much more practical 31.34 . system impedance of Shown in Fig. 5 are the circuit simulation results for 5-dB and 30-dB directional couplers at 2.4 GHz on the same substrate, , at the when the inductors are loaded at the center quarter lengths , and at the end . As can be seen, all couplers show nearly infinite directivity with specified coupling levels at the design frequency. For a very tight coupling level of 5 dB, the three locations show nearly the same directivity bandwidths, while the coupling bandwidth is the smallest when loaded at the center. However, as the coupling becomes weaker, there is a notable change in the trend. For a very weak coupling level of 30 dB, not only the directivity bandwidth, but also the coupling bandwidth are the smallest when the inductors are loaded at the center. The same phenomenon is observed for loose coupling levels of practical range. By loading the inductors at other locations, wider bandwidths can be obtained. Therefore, the generalized structure in Fig. 1(b) provides a degree of freedom in designing directivity-enhanced microstrip couplers by loading with shunt inductors. One can choose the

Initially, the coupler is designed for a system impedance of 50 . The initial even- and odd-mode impedances and electrical lengths of the coupled line are calculated accordingly. Then, the compensating inductance is calculated with (12). From these initial parameters, the actual system impedance in (11) is calculated. Due to the inductive loading, the actual system impedance is now different from the designed system impedance . This leads not only to a poor matching performance, but also to in (6c) that is different from the coupling a coupling level level before loading, given by . Moreover, the isolation null may not be obtained. is adjusted in proportion to In the first iteration stage, the initial . For instance, suppose that the actual after while the designed is the inductive loading is 96.54 in the second stage is 50 . In this case, the designed 25.9 . Then the even-/odd-mode set to 50 50/96.54 impedances in (13) are adjusted accordingly, and the actual as well as all other electrical parameters system impedance is 55.69 with are recalculated. Since the recalculated 25.9 after the first iteration, in the second iteration is now set to 50 25.9/55.69 23.25 . In this way, is converges to 50 . Similarly, the adjusted iteratively until is solved iteratively until it converges actual coupling level to the original coupling level . In general, the difference between the initial and 50 becomes large as the coupling levels become weaker, requiring more iteration steps. Based on the proposed method, a 20-dB microstrip directional coupler with a center frequency of 2.4 GHz is designed. 3.5, 0.76-mm thickness, A lossless RF-35 substrate with and 35- m copper cladding is used as the substrate. LineCalc in ADS [22] is utilized to compute the electrical parameters of the coupled line. For simplicity, the compensating inductors are

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TABLE I DESIGN OF PROPOSED 20-dB COUPLER AT 2.4 GHz WITH INDUCTORS LOADED AT CENTER

Fig. 6. Circuit simulation results for initial and final 20-dB coupler design in Table I for Z 50 . Results for conventional 20-dB coupler also shown for comparison.

=

loaded at the center of the coupled lines, i.e., in Fig. 1(b). Table I summarizes the calculated parameters of the couand pler after each iteration stage. After only six iterations, converged to 50 and 20 dB, respectively, with negligible errors for a coupler with a coupling level as weak as 20 dB. The iterative solution method enables to maintain the system impedance and the coupling level before and after loading, in a relatively simple manner. It is not a time-consuming process since any types of simulations or optimizations are not required after each iteration stage. Fig. 6 shows the circuit simulation results for the initial and final designs of the 20-dB directional coupler in Table I. As evidenced by the figure, the performance of the initial design is far from the specified. This is mostly due to the system impedance, 96.5 that is nearly twice as high as the initial system 50 . However, the isolation and coupling impedance levels of the final design at the design frequency meet the specified, which validates the proposed design method. Although directivity is remarkably improved over its conventional counterpart, the matching bandwidth is narrower than the conventional coupler, restricting the proposed method for wideband applications. In rare occasions when the difference between the evenand odd-mode effective dielectric constants are very large for extremely weak coupling levels, the actual system impedance may be an imaginary number. In this case, the

Fig. 7. Various reactively compensating methods of directivity enhancement. Lumped-element values for 20-dB couplers at 2.4 GHz are: (a) 1.90 nH in [1], (b) 0.16 nH in [2], (c) 80.4 fF in [3] and 82.1 fF in [5], and (d) 112.6 fF in [4] for circuit simulation results shown in Fig. 8.

iterative solution method cannot be applied due to the absence of initial . However, as seen in Fig. 4, the method provides valid solutions for all practical coupling levels, regardless of the loading locations. IV. COMPARISON WITH OTHER REACTIVELY COMPENSATING METHODS Shown in Fig. 7 are other popular reactively compensating methods of directivity enhancement for microstrip directional couplers. With the design equations in the corresponding literature, 20-dB directional couplers at 2.4 GHz are designed on the same substrate as that used in Section III. For comparison, a 20-dB coupler is designed also by the proposed method. is chosen since it provides the largest coupling bandwidth. For the method in [3] and [4], the iterative solution method is applied to take into account the changes in the effective dielectric constants. Circuit simulation results in Fig. 8 show that most of the methods in Fig. 7 provide directivity enhancement over the conventional counterpart. On the other hand, only the conventional and proposed methods and the methods in [3] and [4] provide the specified coupling level of 20 dB at the design frequency of 2.4 GHz. Circuit simulation results for the method in Fig. 7(b) are not shown since the design equations in [2] yields negative electrical lengths for the coupled-line section. The design equations in [1] for the method in Fig. 7(a) are only approximate and are valid only for relatively tight coupling levels. For a coupling level as weak as 20 dB, as seen

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Fig. 9. Microstrip implementation of the proposed directional coupler.

Fig. 8. Comparison with other reactively compensating methods for 20-dB couplers. Results for the method in Fig. 7(b) are not included since the design parameter is nonphysical. (a) Directivity. (b) Coupling.

in Fig. 8, a peak in the directivity is not observed while a relatively large deviation in the coupling level is seen. Since the structure in Fig. 7(b) is symmetric, accurate design equations can be obtained by applying the demonstrated analysis method in Section II and III. The design equations in [5] for the method in Fig. 7(c) do not provide optimum performance. Although directivity enhancement is obtained over the conventional coupler in a very wide bandwidth, a prominent peak in the directivity is not seen, and the specified coupling level is not obtained at the design frequency. On the other hand, accurate performance is obtained with superior directivity bandwidth with the improved design equations in [3] for the same method in Fig. 7(c) as well as with those in [4] for the method in Fig. 7(d) that utilize only one element. The superior directivity bandwidths of these methods are due to the compensating capacitors that are seen in the odd mode only. However, from a practical point of view, the capacitive compensating methods in [3]–[5] suffer from the difficulties that the capacitor must be placed in the narrow gap of the coupled lines. Otherwise, it requires intensive layout optimization through time-consuming full-wave simulations to compensate for the parasitic effects associated with the lines that connect the capacitors with the coupled line. Moreover, the required capacitance of 80.4 and 112.6 fF for the methods in Fig. 7(c) and (d), respectively, for a 20-dB coupler at 2.4 GHz indicate that the capacitance may be too low to be practical at higher frequencies. Most importantly, these relatively low

Fig. 10. Circuit and full-wave simulation results for proposed 20-dB directional coupler at 2.4 GHz, with inductors loaded at center.

capacitance levels become more problematic when the parasitic effects, which will be discussed in Section V, are considered. Indeed, nearly infinite directivity as well as the exact coupling level at the design frequency are obtained for the proposed method. Although the directivity bandwidth of proposed method is narrower compared with the methods in [3] and [4], the proposed method provides a coupling bandwidth that is larger than these methods. Moreover, the freedom in the location of loading provides more flexibility in the design process. Most importantly, shunt inductors can be easily implemented by grounded stubs in shunt, which makes the proposed method is far more practical especially at high frequencies. V. MODELING OF PARASITIC EFFECTS Fig. 9 shows the microstrip implementation of a proposed coupled line with the inductors that are loaded at the center, including the 50- feeding line at each port. The shunt inductors are realized with grounded stubs in shunt. Shown in Fig. 10 are the full-wave simulation results from the High Frequency Structure Simulator (HFSS) [23] for the final design of the 20-dB coupler in Table I, including the feed line at each port. For comparison, the circuit simulation results for the same design in Fig. 6 are repeated in this figure. As can be seen, no major difference is seen between the circuit and the full-wave simulation results, except for the isolation performance that is dramatically degraded in the full-wave simulations. The major reason is due to the parasitic effects related with junction discontinuities in various parts of the actual circuit, which are not included in the circuit simulations. For the coupler

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Fig. 11. Equivalent circuit of the proposed coupler including capacitors that model dominant parasitic effects, when the coupler is loaded at center and conL= in Fig. 1(b). nected to feeding lines. The feeding lines are not shown. L

= 2

in Fig. 9, the dominant ones can be modeled as capacitors between the two stubs and between the feeding lines connected to ports 1 and 3 and to ports 2 and 4. Therefore, the equivalent circuit of proposed coupler in Fig. 1(b) can be modified to include these capacitors, as shown in Fig. 11. With parasitic capacitance 20 fF and 70 fF, the circuit simulation results of are now in excellent agreement with the full-wave simulation results, as shown in Fig. 10. and in Fig. 11 play the exact same The capacitances role as does the compensating capacitance in Fig. 7(c) and (d), respectively. They compensate for the odd-mode phase velocand of the coupler. In genities, which in turn alters eral, these capacitance are very small, only about several tens of femtofarads. However, as seen in Section IV, the compensating capacitance for a 20-dB coupler at 2.4 GHz is 80.4 fF for the method in Fig. 7(c) and 112.6 fF for the method in Fig. 7(d). The compensating capacitance values of such levels at 2.4 GHz indicate that the parasitic capacitance of the order of several tens of femtofarads can be detrimental on the directivity of a coupler. More importantly, as the coupling weakens and/or the operating frequency increases, the compensating capacitances in Fig. 7(c) and (d) become even lower, indicating that the parasitic effects become more eminent. The effects of junction discontinuities on the directivity is a common problem not only for reactively loaded directional couplers, but also for the directional couplers utilizing other techniques for directivity enhancement [13], [14]. The directivity is also alis affected the most, but the system impedance tered. However, the importance of parasitic effects on the directivity of directivity-enhanced couplers have never been investigated. This is because their effects are not prominent in most of the previous reactively compensated microstrip directional couplers, perhaps due to their relatively tight coupling levels and/or relatively low operating frequencies. For instance, in [8], the parasitic effects are negligible due to its relatively tight coupling level of 10 dB and the relatively low operating frequency of 0.9 GHz. However, the results in Fig. 10 indicate that the parasitic effects cannot be ignored for a 20-dB coupler at 2.4 GHz and that they can be modeled properly with capacitors. As a rule of thumb, when the capacitance that models the parasitic effects are comparable to the compensating capacitance, they must be included in the design equations. Otherwise, proper performance may be obtained only through inten-

Fig. 12. Fabricated 20-dB directional couplers: proposed (left) and conventional (right).

sive layout optimization via time-consuming full-wave simulations. Accordingly, the design equations for the proposed directional coupler in (1)–(4), (11), and (12) must be modified to include the capacitance that model the parasitic effects. For the directional coupler in Fig. 11, in which the coupled line is loaded , the modified design equations at the center are (14) (15) (16) (17) (18) where

The iterative solution method in Section III also needs to be applied to compensate for the changes in the system impedance and the coupling level due to the inductive loading as well as parasitic effects. VI. EXPERIMENTAL RESULTS For experimental verification, an inductively loaded 20-dB directional coupler at 2.4 GHz is fabricated in an RF-35 sub3.5, 0.76-mm thickness, and 35- m copper strate with cladding. The inductors are realized with 75- stubs, grounded by via holes of 0.25-mm radius. Fig. 12 shows a photograph of a fabricated directivity-enhanced directional coupler. For comparison, a conventional 20-dB directional coupler is also fabricated in the same substrate, as shown in the same figure.

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TABLE II FINAL DESIGN PARAMETERS

Since the parasitic effects are fully characterized, a 20-dB coupled-line coupler in Table I is redesigned to include capaciand in Fig. 11 that model parasitic effects, with tances initial values of 20 and 70 fF, respectively. Then, the iterative so50 and lution method in Section III is applied to meet 20 dB. The final even-/odd-mode impedances, the total length of the coupled line, and the inductance that load the line are 34.70 , 30.24 , 18.39 mm, and 2.53 nH, respectively. The large differences between these design parameters and those in Table I (25.75 , 21.97 , 18.08 mm, and 1.252 nH) in which the parasitic effects are not taken into account and which can be obtained also from the design equations in [8] and after applying the iterative solution method, indicate how large the impact of parasitic effects are on the overall performance of a coupler at 2.4 GHz with a coupling level as weak as 20 dB. The change in the parasitic capacitance may be relatively large, even for small and in the final changes in the layout. The capacitances design are 15 and 40 fF, respectively. Finally, the design is optimized in a full-wave simulator, HFSS [23], to compensate for other parasitic reactance including the via hole effects that are not exactly modeled in Fig. 11. The final design parameters are summarized in Table II along with those for the conventional 20-dB directional coupler. The fabricated couplers are measured in the 1–4-GHz range with an MS4624D vector network analyzer from Anritsu. Electronic calibration is achieved with a 36584KF calibration module. Fig. 13(a) shows the full-wave simulated and measured results for the proposed coupler, which are in excellent agreement. A maximum isolation of more than 76 dB with a coupling level of 20.1 dB have been measured at 2.41 GHz. Fig. 13(b) shows the measured and simulated directivity and coupling levels of the proposed and conventional 20-dB directional couplers. A maximum directivity of 56 dB has been measured for the proposed coupler, whereas the directivity of the conventional coupler remains under 9.5 dB in the measured range. For the proposed coupler, the directivity remains above 20 dB in a 16.3% bandwidth, from 2.25 to 2.65 GHz, in which the maximum variation in the coupling level is 0.5 dB. In this frequency range, the minimum and maximum directivity improvements of the proposed coupler are 12 and 48 dB, respectively, over the conventional counterpart. For the conventional directional coupler, the maximum variation of the coupling level is 0.2 dB in the same frequency range. This suggests that improvement in the coupling level bandwidth of the proposed coupler remains as future work. VII. CONCLUSION This paper presents an accurate design method for microstrip directional couplers, loaded with shunt inductors for directivity

Fig. 13. Full-wave simulated and measured results. (a) S -parameters of proposed coupler. (b) Directivity and coupling levels of proposed and conventional couplers.

enhancement. Complete design equations are derived for a generalized structure, providing more design flexibility when designing such couplers. Also, the demonstrated iterative solution method enables to maintain the system impedance and the coupling level before and after reactive loading. Moreover, by properly modeling the dominant parasitic effects as capacitors, improved design equations are derived to provide proper performance. Among various reactively compensating methods of directivity enhancement, the proposed method is the most practical method especially for weak coupling levels at high frequencies. Based on the proposed design method, a 20-dB microstrip directional coupler loaded with shunt inductors at 2.4 GHz is designed and fabricated. A maximum directivity of 56 dB has been measured, which is an improvement of 48 dB over a conventional microstrip directional coupler. This is the first work to demonstrate directivity of more than 50 dB for a 20-dB microstrip directional coupler. The directivity remains above 20 dB in a 16.3% bandwidth, with a maximum variation of 0.5 dB in the coupling level. Without proper modeling of parasitic effects, the superior directivity performance would not have been possible for a coupling level as weak as 20 dB. Although the proposed method is capable of providing the largest coupling bandwidth among various reactively compensating methods, the coupling as well as matching bandwidths are

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narrow, compared to the conventional counterpart. Improvement in these bandwidths remains as future work.

REFERENCES [1] R. Phromloungsri, M. Chongcheawchamnan, and I. D. Robertson, “Inductively compensated parallel coupled microstrip lines and their applications,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 9, pp. 3571–3582, Sep. 2006. [2] R. Phromloungsri, V. Chamnanphrai, and M. Chongcheawchamnan, “Design high-directivity parallel-coupled lines using quadrupled inductive-compensated technique,” in Asia–Pacific Microw. Conf. Dig., Dec. 2006, pp. 1380–1383. [3] M. Dydyk, “Accurate design of microstrip directional couplers with capacitive compensation,” in IEEE MTT-S Int. Microw. Symp. Dig., May 1990, pp. 581–584. [4] M. Dydyk, “Microstrip directional couplers with ideal performance via single-element compensation,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 6, pp. 956–964, Jun. 1999. [5] S. L. March, “Phase velocity compensation in parallel-coupled microstrip,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 1982, pp. 581–584. [6] H. Ashoka, “Microstrip directional coupler loaded by a pair of inductive stubs,” U.S. Patent 6 549 089, Apr. 15, 2003. [7] J.-L. Chen, S.-F. Chang, and C.-T. Wu, “A high-directivity microstrip directional coupler with feedback compensation,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2002, pp. 101–104. [8] S. Lee and Y. Lee, “An inductor-loaded microstrip directional coupler for directivity enhancement,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 6, pp. 362–364, Jun. 2009. [9] L. Su, T. Itoh, and J. Rivera, “Design of an overlay directional coupler by a full-wave analysis,” in IEEE MTT-S Int. Microw. Symp. Dig., May 1983, pp. 427–429. [10] S. Uysal and H. Aghvami, “Synthesis, design, and construction of ultrawideband nonuniform quadrature directional couplers in inhomogeneous media,” IEEE Trans. Microw. Theory Tech., vol. 37, no. 6, pp. 969–976, Jun. 1989. [11] J. Klein and K. Chang, “Optimum dielectric overlay thickness for equal even- and odd-mode phase velocities in coupled microstrip circuits,” Electron. Lett., vol. 26, no. 5, pp. 274–276, Mar. 1990. [12] C.-S. Kim, Y.-T. Kim, S.-H. Song, W.-S. Kang, K.-Y. Park, and D. Ahn, “A design of microstrip directional coupler for high directivity and tight coupling,” in 31st Eur. Microw. Conf. Dig., Oct. 2001, pp. 1–4. [13] Y.-H. Chun, J.-Y. Moon, S.-W. Yun, and J.-K. Rhee, “Microstrip line directional couplers with high directivity,” Electron. Lett., vol. 40, no. 5, pp. 317–318, Mar. 2004. [14] S.-F. Chang, J.-L. Chen, Y.-H. Jeng, and C.-T. Wu, “New high-directivity coupler design with coupled spurlines,” IEEE Microw. Wireless Compon. Lett., vol. 14, no. 2, pp. 65–67, Feb. 2004.

[15] W.-K. Kim, M.-Q. Lee, J.-H. Kim, H. S. Lim, J.-W. Yu, B.-J. Jang, and J.-S. Park, “A passive circulator with high isolation using a directional coupler for RFID,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2006, pp. 1177–1180. [16] J. Muller and A. F. Jacob, “Complex compensation of coupled line structures in inhomogeneous media,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2008, pp. 1007–1010. [17] D.-Z. Chen, X.-W. Shi, Y.-Y. Yang, and F. Wei, “Compact microstrip parallel coupler with high isolation,” Electron. Lett., vol. 44, no. 12, pp. 740–741, Jun. 2008. [18] A. Podell, “A high directivity microstrip coupler technique,” in IEEE MTT-S Int. Microw. Symp. Dig., May 1970, pp. 33–36. [19] R. K. Mongia, I. J. Bahl, P. Bhartia, and J. Hong, RF and Microwave Coupled-Line Circuits, 2nd ed. Norwood, MA: Artech House, 2007. [20] D. M. Pozar, Microwave Engineering, 3rd ed. Hoboken, NJ: Wiley, 2005. [21] J. N. Burghartz, D. C. Edelstein, K. A. Jenkins, and Y. H. Kwark, “Spiral inductors and transmission lines in silicon technology using copper–damascene interconnects and low-loss substrates,” IEEE Trans. Microw. Theory Tech., vol. 45, no. 10, pp. 1961–1968, Oct. 1997. [22] “Advanced Design System 2006A,” Agilent Technol., Palo Alto, CA, 2006. [23] “High Frequency Structure Simulator v10.0,” Ansoft Corporation, Pittsburgh, PA, 2005. Seungku Lee was born in Seoul, Korea, in 1982. He received the B.S. and M.S. degrees from Yonsei University, Seoul, Korea, in 2008 and 2010, respectively. He is currently with the Radio Communication Research Center, Yonsei University. His current research interests include multiband planar circuits for microwave applications. Mr. Lee was the recipient of the Bronze Award in the Samsung Human-Tech Paper Competition in 2008 and the Silver Award in 2010.

Yongshik Lee (S’00–M’04) was born in Seoul, Korea. He received the B.S. degree from Yonsei University, Seoul, Korea, in 1998, and the M.S. and Ph.D. degrees in electrical engineering from The University of Michigan at Ann Arbor, in 2001 and 2004, respectively. In 2004, he was a Post-Doctoral Research Associate with Purdue University, West Lafayette, IN. From 2004 until 2005, he was with EMAG Technologies Inc., Ann Arbor, MI, as a Research Engineer. In September 2005, he joined Yonsei University, Seoul, Korea, as an Assistant Professor. His current research interests include passive and active circuitry for microwave and millimeter-wave applications and electromagnetic metamaterials.

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A Phenomenological Investigation of Anomalous Performance in Flex Coaxial Cables Frank J. Villegas, Member, IEEE, Mark Adams, Paul Thompson, Member, IEEE, and Charles Jackson, Fellow, IEEE

Abstract—In this study, we investigate anomalous flex cable performance in a phased-array antenna on advanced EHF. A number of low-gain IF paths were found in one local-oscillator region during thermal cycle testing, subsequently causing an out-of-specification condition. Utilizing advanced diagnostic tools, the contractor determined that the root cause of the gain drop was a failure in a flex coaxial cable. We outline the development of an analytical phenomenology model employed in understanding the failure pathology and verifying the root cause. We have developed 3-D finite-element models using Ansoft High Frequency Structure Simulator (HFSS) that mimic the insertion loss behavior associated with cable failure modes. To synthesize a particular loss characteristic, we use an equivalent circuit model consisting sections. A closed-form analytical expression for of parallelresonance frequency was derived, linking the circuit and physical parameters; linear regression is used to fit measured data to the HFSS cable model. Using the phenomenology model, we determined that the root cause of the failures is a delamination of the layered outer sheath of the cable. Two mechanisms were discovered: 1) spurs in the outer layer and 2) complete layer separation over short cable lengths. The first mechanism induces a small frequency-independent increase in the loss and is inversely proportional to the spur delamination angle. This loss is attributable to conventional aging and considered benign. With the second mechanism, the delamination gap induces a sharp resonance in the loss at a discrete frequency and is reminiscent of a low-order filter. This phenomenon is a malignant loss responsible for our anomalous out-of-specification condition. We completed a parametric study using the phenomenology model, and determined that: 1) resonance frequency is inversely proportional to the gap width ( ); 2) resonance frequency is proportional to the square root ); 3) insertion loss amplitude is proportional of the gap size ( to the air gap size and width; and 4) the of a given delamination region is proportional to the square root of the gap size. Index Terms— Coaxial cables, empirical techniques, finite-element method (FEM), interconnects, phased-array antennas.

I. INTRODUCTION

P

HASED-ARRAY antennas are becoming ever more prevalent in communication and radar systems [1]–[5]. Antenna technology that was once considered too complex and costly is now quite ubiquitous as a result of the decreasing cost of manufacturing the monolithic microwave integrated circuits (MMICs) utilized in the front-end electronics [6]–[8].

Manuscript received July 15, 2009; accepted September 18, 2009. First published March 11, 2010; current version published April 14, 2010. F. J. Villegas is with The Aerospace Corporation, Los Angeles, CA 900092957 USA (e-mail: [email protected]). M. Adams, P. Thompson, and C. Jackson are with Northrop Grumman Space Technology, Redondo Beach, CA 90278 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042842

Phased-array usage in military and commercial systems has experienced an accompanying surge primarily due to the versatility and robustness of the antenna array concept [9], [10]. Phased-array antennas can readily create multiple beams that independently scan the hemispherical coverage area. Radiation pattern characteristics can be altered simply by changing the excitation profile of the elements. In addition, phased arrays embody a feature known as “graceful degradation.” In contrast to a single-feed reflector antenna that can suffer from catastrophic single-point failures due to the loss of a transmitter or receiver, a phased-array antenna can withstand the loss of several radiating elements and their corresponding power or low-noise amplifiers with a negligible and typically acceptable degradation in performance [11], [12]. This is due to the implicitly distributed nature of the array design, where each radiating element’s signal path typically has its own unique transmit/receive module consisting of all of the requisite amplifiers, filters, and mixers needed to process the signal. Although phased arrays are highly versatile, their inherently complex nature does tend to introduce certain reliability issues [13], [14]. The front-end electronics package for a typical phased-array antenna is rife with multilayered circuit boards that routinely route RF, IF, and digital signals throughout the beam-forming and beam-controlling network(s). Consequently, it is not uncommon for a conventional array hardware implementation to contain hundreds or even thousands of interconnects and cabling for signal connectivity and routing purposes [15]. It should come as no surprise that these cables and interconnects become statistically meaningful failure points that threaten the integrity and reliability of the antenna unit. In fact, cables and interconnects typically account for a significant percentage of the various classes of failures that arise in phased-array antenna hardware [16]–[23]. In general, even the complex MMIC electronics employed in these systems have a higher degree of survivability. For example, we recently encountered an anomalous behavior on a flight-production uplink phased-array unit during postassembly testing that incurred the possibility of significant reliability and schedule impact. A number of low-gain IF paths were found in one local-oscillator (LO) region during thermal cycle (TC) testing that subsequently caused an out-of-specification condition for the antenna. Perceptibility to the failure was exacerbated by the fact that the LO amplifiers and frequency multipliers in this local signal path are well within saturation. To circumvent this, an LO starvation test was initiated in order to determine the root cause of the anomalous behavior. By bringing the amplifiers out of saturation and carefully monitoring the signal amplitude and phase, we were able to find that the most probable cause of the significant gain degradation was a failure in a flex coaxial cable located at the input of the LO

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IF board. Additional testing revealed that this particular type of cable failure was probably due to post environmental verification exposure and handling. A generic exoneration test flow was implemented, composed of TC, vibration, RF sniff, 100 TCs simulating an accelerated life span, and intentional cable handling. This additional test can be used as a high-sensitivity screen for the aforementioned failure mechanism. Although all key performance parameters (e.g., G/T, sidelobe levels, and axial ratio) for the affected unit were met within margin, the impact on antenna system reliability remained in question and warranted further investigation. This paper details the successful deployment of an analytical phenomenology model developed to assist us in understanding the failure pathology and performance impacts of said anomaly and verify the root cause hypothesis. Based on an investigation carried out using the aforementioned phenomenology model, we determined that the primary loss pathology (i.e., the root cause of the failure mechanism) is a delamination of the layered outer conductive sheath of the flex cable. Controlled experiments clearly show a direct correlation between intentional cable handling and distinct failures. Two distinct failure mechanisms were discovered: 1) point contacts or spurs in the outer layer and 2) a uniform layer separation (air gap) over short axial lengths of the cables. The first mechanism induces a relatively small frequency-independent increase in the insertion loss of the cable. This loss is inversely proportional to the spur delamination angle, as we will later see in the results. This type of loss mechanism can be attributed to conventional aging of the cable and is considered benign in nature. The second loss mechanism increases the insertion loss of the cable significantly at particular frequencies. The air gaps can, in fact, induce sharp resonant dips (suckouts) in the insertion loss versus frequency profile. The transmission response suggests that localized delamination regions may exhibit resonant filter-like passband behavior. This phenomenon is clearly an aberrant loss mechanism, which is responsible for the more serious class of cable failures and was responsible for our anomalous out-of-specification condition. Perturbations to the outer conductor layers will have a deleterious effect on the insertion loss, primarily due to an increase in the conductive attenuation in an affected cable. The insertion-loss suckout amplitude was found to be proportional to the air gap size and width. The resonance frequency value is strongly dependent on the gap size and width as well. In what follows, we present the details of our phenomenological investigation of the flex coaxial cable failure mechanisms. In Section II, we briefly discuss the empirical efforts undertaken to reveal the root cause of the anomaly. Section III discusses the development of the analytical phenomenology model, and representative results that illustrate the model’s validity and accuracy are shown in Section IV. Section V contains some concluding remarks. II. EMPIRICAL INVESTIGATION OF CABLE FAILURE PATHOLOGY A cross-sectional illustration depicting the cable construction is shown in Fig. 1. Layer 4 is missing in the stack-up because it represents a layer of Teflon tape (offered by the manufacturer) that can optionally be used to improve the cable compression properties. Since our cables do not make use of this additional

Fig. 1. Cross section illustrating the flex coaxial cable geometry.

Fig. 2. Tomography snapshots of cross sections corresponding to: (a) good coaxial cable and (b) damaged coaxial cable (note the delamination evident in the layered outer conductor region leading to an air gap).

layer, we have omitted it from Fig. 1. The inner shield (Layer 3) is a helical-wound laminated conductor. It is this conductive layer that has the potential to delaminate during excessive handling, i.e., significant bending moments. The cause of the cable failures was previously unknown. Various imaging tools were employed to diagnose the failure modes and investigate the pathology of the increased insertion loss. Fig. 2 shows the results of X-ray tomography scans of cable cross sections. The images were taken using a MicroXCT by Xradia, Inc., which is essentially a CAT scan device at the micrometer scale. In Fig. 2(a), an image of a nominal cable sample is shown. Notice that the laminated inner shield of the cable’s outer conductor consists of layers that make proper electrical contact with each other over the entire overlap region. By contrast, Fig. 2(b) depicts an image of a mishandled cable that suffers from a resonance-like increase in insertion loss at certain frequencies. Note that, in this case, the layered inner shield suffers from delamination, wherein a continuous air gap has been introduced between the layers, causing a significant increase in conductor loss for this sample. Fig. 3 shows the measured insertion loss characteristics of a representative flex coaxial cable. The various curves illustrate the formation of a resonance “suckout” at 11.0 GHz over time as the number of thermal cycles increases beyond 350 followed by intentional mishandling. This is indicative of the malignant

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Fig. 3. Measured insertion loss (in decibels) versus frequency (in hertz) for a representative flex cable. Curves illustrate the temporal trend in loss behavior.

Fig. 5. Infrared thermometer testing of a damaged cable section.

Fig. 4. Tomography snapshots of axial sections corresponding to: (a) good coaxial cable and (b) damaged coaxial cable.

loss mechanism that is responsible for the out-of-specification condition in our array unit. As a result of this data, we hypothesize that inadvertent mishandling of the flex coaxial cables has the propensity to cause the anomalous loss behavior found in the antenna. Axial tomography cuts illustrating nominal and damaged cable sections are shown in Fig. 4(a) and (b), respectively. The good cable sample indicates the presence of a partial separation (spur) in the laminated shield. Since electrical contact is still being made in the balance of the overlap region, this feature leads to a small frequency-independent increase in insertion loss, a benign effect that is normally associated with conventional aging of the cable structure. The damaged sample in Fig. 4(b) illustrates a complete yet small separation (air gap) in the lamination layers of the inner shield that gives rise to the malignant resonance-like dips in the transmission loss of the cable. Because of the particular pathology of this loss mechanism, we are led to believe that these localized sections of damaged cable behave in a bandstop filter-like fashion. The results of infrared thermometer testing of a damaged cable section is shown in Fig. 5. A 30.7-dBm signal (1 W) at 20 GHz was injected into one end of the cable section. An infrared thermometer was then used to search for localized areas of heat concentration. Several distinct regions were found with increases of up to 15 F. The thermal images in the figure clearly indicate the presence of “hot spots” close to the cable ends, which implies that the malignant loss mechanism is attributable to localized regions (roughly 110 mm in length) in the cable. The empirical investigation outlined above clearly indicates a high probability that the root cause for the anomalous signal

loss behavior of the array is a delamination of the inner shield (of the outer conductor) in localized regions in a failed cable. We should also mention that, if the outer boundary of the cable is somehow compromised, we may incur radiation loss as well. This was ruled out after RF “sniff” tests failed to detect any measurable amount of leakage in regions near the failure centers. In Section III, we will describe the development of an analytical phenomenology model that was developed in order to further investigate the loss pathology of the anomalous cable behavior as well as substantiate our hypothesized root cause. III. FLEX CABLE SIMULATION MODEL DEVELOPMENT A. Finite-Element Model (FEM) of the Coaxial Cable The key factor in developing an effective phenomenology model was the construction of a very high-fidelity 3-D FEM. It was crucial that we arrive at a model that contained all of the important geometrical features responsible for the measured anomalous electrical behavior. An obvious choice was the need to include the helical-laminated inner shield of the outer conductor, as shown in Fig. 6. The FEM was created using Ansoft High Frequency Structure Simulator (HFSS) and is composed of a reasonably short (200–500 mm) section of coaxial line with the laminated outer conductor geometry. Note that, for the canonical cable model, the laminated layers make perfect electrical contact throughout the overlap regions. The model is enclosed in a circular cylindrical virtual surface that extends some distance in the radial direction but is coincident with the coax at its two ends. This mathematical surface serves to form a bounded and closed solution domain, which is required by the finite element algorithm. The two ends of the cable are used in HFSS to define waveports used by the software to excite the model and compute the vector electromagnetic fields everywhere within the solution domain, as well as port quantities such as -parameters. The material parameters used in the model are PTFE dielectric with a relative permittivity of 1.4 and loss tangent of 0.002. The foil thickness used for the lamination sheets is 0.002 in. The inner conductor diameter of the coax is 0.020 in, and all metallization is copper with a conductivity of 5.8 10 S. The outer sheath of

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Fig. 8. HFSS models of: (a) axial cross section of a nominal cable and (b) damaged cable exhibiting a partial layer delamination (spur) due to acceptable cable aging. Fig. 6. HFSS FEM of flex coaxial cable. Note the helical lamination of the outer conductor.

Fig. 7. Insertion and return loss (in decibels) versus frequency (in gigahertz) for cables with and without external braiding indicate that braiding can be safely neglected with no deleterious effects on model fidelity.

the coaxial cable is wound in a helical conductive path, with a 40% overlap, per MILSPEC. In this study, we have correctly identified the failure mechanism in flexible coaxial cable assemblies that causes insertion loss suckouts at discrete frequencies. The loss pathology (continuous air gaps caused by a delamination of the helical outer conductor shield) is interior to the cable. Changes in the outer sheath geometry (i.e., the braiding, as shown in Fig. 7) induce no change in the transmission and reflection loss characteristics of nominal and damaged cables. As a result, the HFSS 3-D FEM model can be simplified significantly by removing the outer braiding with the effect of reducing the overall computation time. Introducing the various types of cable failure modes properly is also central to developing a high-fidelity phenomenology model. For example, Fig. 8(a) and (b) shows axial cross sections of HFSS models of nominal and damaged cables, respectively. In this particular case, the damage is manifested in a partial delamination (spur) of the outer conductor layers. This type of damage is responsible for the benign loss mechanism, i.e., a small increase in insertion loss over the entire band, and is attributable to conventional aging of the cables. Fig. 9 depicts the HFSS model of a damaged cable section containing a complete delamination of the helical wound layers,

Fig. 9. Axial cross section of HFSS model depicting a damaged cable exhibiting complete separation of the laminated outer conductor layers. This model simulates the malignant loss pathology, causing resonant suckouts in the transmission response.

Fig. 10. Equivalent circuit accounts for multiple resonances in a damaged cable’s insertion loss characteristics. Each resonant (tank) section is mapped 1 to 1 and onto a particular resonance, and the corresponding circuit parameters and physical gap dimensions are extracted.

thus forming a localized air gap. These delamination centers have internal resonances that cause the anomalous frequencydependent dips in the transmission response of the cable. In the figure, the “overlap length” pointed out is our gap width parameter. The gap width shown in the figure is actually our gap parameter. The length of the delamination (gap) region size is essentially measured along the helical conductor path along the entire length of the discontinuity. We should mention that damaged cables exhibiting multiple transmission loss dips are handled readily by cascading several ‘unit cell’ sections of cable with unique air gap dimensions. This is completely analogous to invoking a higher order filter model, as we will discuss in the following section. In order to ensure the accuracy of the HFSS modeling, we closely monitored the convergence behavior of the finite ele-

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Fig. 11. Results of model fitting verified by: (a) a table composed of results from the least squares fit of HFSS resonance frequencies to measured data. (b) Graphical representation of (a) illustrates the goodness of fit.

ment solution(s). The adaptive meshing algorithm in the software was sufficient to ensure convergence to an accurate and constable solution. As an additional test, we varied the vergence parameter in HFSS from 0.005 to 0.001, and found no noticeable difference in the computed -parameters. To further test numerical accuracy, we manually seeded the mesh in the air-gap regions during one numerical test to ascertain that the mesh density in these troublesome regions was sufficient. We concluded that the default adaptive mesh was indeed sufficiently accurate.

course low-order approximations, but it turns out they are accurate enough for our purposes while still maintaining a simple closed form. Using the conventional expression for the reso, we arrive at the desired nance frequency model-based expression

B. Model-Based Parameter Extraction of Cable Parameters

is a parameter constant that must be determined along with and by fitting the measured data. In this particular case, linear regression fit to determine the unknown we employ a and gap size of each section quantities. The gap width in the circuit (i.e., the and circuit values) can be extracted from the measured data and, in turn, used to create a multisection HFSS model that will exhibit an identical frequency dependence as the measured loss. We should note that this parameter extraction technique is used to determine only the resonant frequencies due to the various gaps in an actual damaged cable. and is handled implicSince the relationship between itly in the extraction scheme, the amplitude and of the resoand while nances are fine-tuned manually by changing maintaining a constant ratio and fixed resonance. In other words, , we choose a linear model for resonance frequency . As a result, the relationship between the where gap parameters is implicit in the independent variable . This parametrization allows us to synthesize the resonance frequency directly, but forces us to match the of the model to the mea. The accuracy of sured data manually by changing the parameter extraction technique is depicted in Fig. 11. The correlation between the HFSS simulation and (1) is quite good, especially at the lower frequencies. For higher frequencies, the effects and/or a breakdown error may be caused by possible of the assumed quasi-static approximation. We should note that the HFSS model employed for this study uses the same homogeneous dielectric material found between the inner and outer conductors for the delaminated gap

In the preceding section, we developed various 3-D FEM models that directly exhibit the insertion loss behavior associated with failure modes of the flex coaxial cables. In order to complete our phenomenology model, we need to add the ability to readily predict the insertion loss behavior that a given failure pathology yields. In other words, we would like to have the capability to synthesize a particular loss characteristic and have the HFSS model directly mimic this behavior. To this end, we will make use of a simple lumped element equivalent circuit (consections, shown in Fig. 10) to sisting of resonant parallelessentially model the loss mechanism as a distributed filter effect [24]. The capacitance of the delamination center is modeled as an ideal parallel-plate geometry, and the inductance is modeled as a linear wire segment. With this model, the physical (geometric) parameters of the gap are conveniently mapped onto the equivalent circuit parameters. We derive the requisite relationship between the resonance frequency and the geometrical parameters of the delamination center in the following fashion. First, we express the inductance of the delamination section as , where is a proportionality constant and is the width of the air gap as previously defined. This is analogous to the inductance of a fictitious wire segment where is the wire length. The capacitance is modeled using a , where is the gap parallel-plate capacitor is the length of the delamination center as previsize and ously defined, and is the permittivity of the medium within the gap region, which is air. These quasi-static models are of

(1) where (2)

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Fig. 15. HFSS model of coaxial cable section containing a bridge, or point contact, in the outer conductor lamination layers. Fig. 12. Comparison of analytical phenomenology model and measured loss data for a failed cable exhibiting the malignant loss pathology. Insertion loss (in decibels) versus frequency (in hertz) is shown.

Fig. 13. HFSS analytical model of aging cable containing: (a) 5 spurs and (b) model of an aging cable containing 30 spurs.

Fig. 16. Insertion loss of HFSS analytical model of a damaged flex cable containing a point contact (bridge) in the delamination layer.

Fig. 14. Parametric data of aging cables’ insertion loss as a function of spur angle. The insertion loss is inversely proportional to the spur angle.

Fig. 17. HFSS analytical model of damaged cable that exhibits the malignant loss pathology. Note complete air gaps formed within the delamination layers.

regions. This is done to alleviate the burdens on the adaptive mesh engine as well as for convenience in creating the 3-D is inversely proportional to , model geometry. Since the resonance frequency of the actual cables (containing an air gap) will be slightly higher that those predicted by our analytical phenomenology model. Loss is fully accounted for by the HFSS model if desired. Although the equivalent circuit is lossless, this model is being used to arrive only at the particular cable geometry that will generate suckouts at the appropriate frequencies. All of the loss mechanisms, including that one responsible for the pathology under investigation, is automatically accounted for by the full-wave simulation, which includes conductor, dielectric, and any radiative losses that may exist.

IV. RESULTS Here, we will look at some representative results generated using the phenomenology model developed in Section III. We will verify our analytical model and ascertain its ability to accurately capture the loss pathology associated with the various cable failure modes. In addition, we will compare one such result from our model with measured data of a failed cable, thus validating our original hypothesis for the root cause of the anomaly under investigation. To investigate the pathology of the loss mechanisms, as well as validate our closed-form analytical expression in (1), we initiated a parametric study employing the analytical phenomenology model we developed. In essence, we determined the following: 1) the resonance frequency is in; 2) the resonance versely proportional to the gap width

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Fig. 18. Parametric data of damaged cable section model shown in Fig. 17 illustrating that: (a) suckout frequency is directly proportional to the square root of the gap size d . (b) A similar plot to that shown in (a), with a larger gap width W , illustrating inverse proportionality between suckout frequency and gap width.

frequency is directly proportional to the square root of the gap ; 3) the insertion-loss suckout amplitude is proporsize of a given tional to the air gap size and width; and 4) the delamination region is proportional to the square root of the gap . size Fig. 12 shows a direct comparison of the insertion loss computed using our analytical model and measured data of a cable that was damaged by handling after 350 thermal cycles, i.e., it exhibits the malignant loss pathology previously described. The HFSS model was composed of a 26-in section of cable with two cascaded 110-mm-long sections having 25- and 31-mm air gaps (complete delamination of the shield layers), which create the two distinct resonances evident in the figure at approximately 9 and 11 GHz. The agreement is quite good. We also conducted a parametric study of the effects of variations in geometric features of cable failure centers on the loss mechanism. In particular, Fig. 13 depicts two HFSS models of cables containing spurs (partial layer delamination) with different aspect angles, 5 in Fig. 13(a) and 30 in Fig. 13(b). This class of cable damage is responsible for the benign loss pathology described earlier. Fig. 14 illustrates the transmission loss associated with the cables shown in Fig. 13. We can readily discern a quantitative trend in the data that indicates cable insertion loss is inversely proportional to the spur angle. This is a reasonable observation, since smaller spur angles imply that the spur metallization is in closer proximity to the adjacent layer, which increases the conductor loss of the cable. It is important to note the absence of resonances in the loss characteristic. This is indicative of the benign loss pathology, which signifies a small and typically acceptable increase in loss due to conventional aging of the cable. We should note that the ripple in the loss characteristic is a voltage standing-wave ratio (VSWR) artifact of using a finite-length (500 mm) segment of line in the HFSS model. In other words, the actual loss characteristic for each spur angle would lie above the appropriate minimum points (at 5 and 15 GHz) and below the maximum points (at 10 and 19 GHz) and is in fact increasing monotonically with frequency. The small positive loss at 1 GHz is due to numerical errors in the finite element simulation. Another failure mechanism investigated in this study is shown in Fig. 15. For this type of failure mode, a bridge (or point contact) is formed along the helical lamination path of the outer conductor. Although we do have an air gap in this case, the gap continuity is destroyed by the presence of the bridge, and loss

Fig. 19. HFSS graphical illustration of radiation loss from damaged coaxial cable.

increases only slightly, as depicted in Fig. 16. The ripple evident in the figure is once again attributable to the 500-mm length of cable in the model. Hence, a point contact once again gives rise to the benign loss pathology. Our final failure pathology under investigation is depicted in Fig. 17. The most striking characteristic in this geometry is the formation of complete and continuous air gaps throughout the layer delamination region. Fig. 18(a) illustrates the transmission loss of a section of coaxial cable as the gap size varies. As is evident in the figure, the resonance frequency is directly proportional to , which is a phenomenon that is consistently modeled by our closed-form expression in (1). The behavior in Fig. 18(b) is similar, except the three resonance lois larger in this cations have shifted down. The gap width case, which concurs with the inverse proportionality relationship established by (1). This sample accurately mimics the malignant loss pathology that was responsible for our anomalous array behavior. Finally, Fig. 19 graphically illustrates the radiative loss in an HFSS model containing an air gap in the layer delamination region. Based on this result and the -parameters for the cable, we can readily conclude that the amount of space wave leakage from the damaged cable is negligible, thus substantiating our original claim that the anomalous loss mechanism was predominantly conductive in nature.

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V. CONCLUSION In this study, we have undertaken an investigation of anomalous flex cable performance in an uplink phased-array antenna. This anomalous behavior was encountered on a flight production unit during post-assembly testing and could have significantly impacted the payload reliability and manufacturing schedule. A number of low-gain IF paths were found in one LO region during thermal cycle testing that subsequently caused an out-of-specification condition for the array. Utilizing an assortment of advanced diagnostic tools, we were able to determine that the most probable root cause of the significant gain drop was a failure in a flex coaxial cable located at the input of the LO IF board. Additional testing revealed that this particular type of cable failure was probably due to post environmental verification exposure and handling. Additional tests have been incorporated into the nominal array test procedures in an effort to screen for possible cable failures on future units. Based on the cause of these latent failures we conclude there is a need to improve coaxial outer shield wrapping standards to improve flexible coaxial cable yield. Although all key performance parameters for the affected unit were met with margin, the impact on antenna system reliability remained in question and warranted further investigation. This paper has outlined the successful development of an analytical phenomenology model employed to assist us in understanding the failure pathology of this anomaly and verify the root cause hypothesis. To this end, we have developed 3-D FEMs using Ansoft HFSS that mimic the insertion loss behavior associated with failure modes of the flex coaxial cables. In order to synthesize a particular loss characteristic and have the HFSS model directly mimic this behavior, we made use of a lumped element equivalent circuit model consisting of resosections. A closed-form analytical expression nant parallelfor resonance frequency was derived that links the circuit parameters to physical parameters of a damaged cable, and linear regression is used to fit the measured loss data to the HFSS cable model. Based on our investigation carried out using the phenomenology model, we determined that the primary loss pathology (i.e., the root cause of the failure mechanism) is a delamination of the layered outer conductive sheath of the flex cable. Controlled experiments clearly indicated a direct correlation between deliberate cable handling and distinct failures. Two distinct failure mechanisms were discovered: 1) point contacts or spurs in the outer layer and 2) a uniform layer separation (air gap) over short axial lengths of the cables. The first mechanism induces a relatively small frequency-independent increase in the insertion loss of the cable. This loss is inversely proportional to the spur delamination angle. This type of loss mechanism can be attributed to conventional aging of the cable and is considered benign in nature. The second loss mechanism increases the transmission loss of the cable substantially at certain discrete frequencies. The air gaps induce sharp resonances in the insertion loss versus frequency behavior. The transmission response suggests that localized delamination regions may exhibit low-order resonant filter-like behavior. This phenomenon is a malignant loss mechanism that is responsible for the more serious class of cable failures and was responsible for our anomalous out-of-specification

condition(s). To investigate the pathology of the loss mechanisms, we completed a parametric study using the analytical phenomenology model we developed. In summary, we determined the following: 1) the resonance frequency is inversely proportional to the gap width ( ); 2) the resonance frequency ); is directly proportional to the square root of the gap size ( 3) the insertion loss resonance amplitude is proportional to the of a given delamination air gap size and width; and 4) the region is proportional to the square root of the gap size. ACKNOWLEDGMENT The authors would like to thank G. Schreyer, G. Keller, and P. Hayes, Northrop Grumman Space Technology (NGST), Redondo Beach, CA, and T.-K. Tung and N. Ho, The Aerospace Corporation, Los Angeles, CA, for helpful discussions about cable assembly and test. The authors would also like to thank M. Parlee, NGST, for taking the X-ray images. REFERENCES [1] K. Araki, A. Tanaka, and E. Matsumura, “Wide scanning phased array antenna design in Ka band,” Proc. Inst. Elect. Eng.–Microw., Antennas Propag., vol. 150, no. 5, pp. 379–384, Oct. 2003. [2] D. P. Kolba, W. L. Greenberg, D. R. McElroy, and M. D. Semprucci, “Advanced EHF technologies for lightweight augmentation communication satellites,” Electron. Commun. Eng. J., vol. 3, no. 6, pp. 299–307, Dec. 1991. [3] J. F. Pedersen, “Measured antenna performance of an EHF hybrid scan array antenna for MILSATCOM applications,” in Proc. IEEE Int. Symp. Antennas Propag. Soc., Jun. 1988, pp. 192–195. [4] R. A. A. , Jr., D. R. Major, and J. W. Rockway, “An assessment of multi-function phased array antennas for modern military platforms,” in Proc. IEEE Int. Symp. Phased Array Syst. Technol., Oct. 2003, pp. 365–370. [5] L. Baggen, S. Holzwarth, M. Boettcher, and M. Eube, “Advances in phased array technology,” in Proc. 3rd Eur. Radar Conf., Sep. 2006, pp. 88–91. [6] J. Butz, M. Spinnler, J. Christ, and U. Mahr, “Highly integrated -band multiple-beam active phased array anRF-modules for tennas,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2002, pp. 61–64. [7] Y. Mancuso, P. Gremillet, and P. Lacomme, “T/R-modules technological and technical trends for phased array antennas,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2006, pp. 614–617. [8] D. D. Curtis, R. W. Thomas, W. J. Payne, W. H. Weedon, and M. A. Deaett, “32-channel -band digital beamforming plug-and-play receive array,” in Proc. IEEE Int. Symp. Phased Array Syst. Technol., Oct. 2003, pp. 205–210. [9] R. S. Tahim, “Multi-band antenna technology,” in AP-S Int. Antennas Propag. Symp. Dig., Jun. 2004, pp. 3968–3971. [10] Y. Kuwahara, “Phased array antenna with temperature compensating capability,” in Proc. IEEE Int. Symp. Phased Array Syst. Technol., Oct. 1996, pp. 21–26. [11] M. Ruggieri, “A (design-oriented) reliability model for active phased arrays in satellite communication systems,” IEEE Aerosp. Electron. Syst. Mag., vol. 12, no. 10, pp. 23–29, Oct. 1997. [12] R. A. Speciale, “Design of more affordable and reliable electronicallysteered phased arrays,” in Proc. IEEE Int. Symp. Antennas Propag., Jun. 2007, pp. 157–160. [13] D. K. Srinivasan, R. E. Wallis, D. W. Royster, J. R. Bruzzi, P. M. Malouf, and K. B. Fielhauer, “Spacecraft-level testing and verification of an -band phased array,” in Proc. IEEE Aerosp. Conf., Mar. 2005, pp. 1078–1086. [14] P. Snoeij and A. R. Vellekoop, “A statistical model for the error bounds of an active phased array antenna for SAR applications,” IEEE Trans. Geosci. Remote Sens., vol. 30, no. 4, pp. 736–742, Jul. 1992. [15] J. Zhu, J. Gao, G. Xie, and Y. Liu, “FEM analysis of the impact of coaxial connector on high speed signal transmission,” in Proc. ISCIT’07 Int. Symp. Commun. Inf. Technol., Oct. 2007, pp. 116–120. [16] C. J. Liaw, R. Sikora, and R. Schroeder, “Study of the RHIC BPM SMA connector failure problem,” in Proc. IEEE Particle Accelerator Conf., Jun. 2007, pp. 25–29.

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[17] Y. Hayashi and H. Sone, “The measurement of radiated electromagnetic field from a coaxial cable with connector contact failure,” in Proc. IEEE Int. Electromagn. Compat. Symp., Aug. 2006, pp. 594–597. [18] L. Xu and J. H. L. Pang, “Interfacial IMC and Kirkendall void on SAC solder joints subject to thermal cycling,” in Proc. 7th Electron. Packaging Technol. Conf., Dec. 2005, pp. 863–867. [19] D. A. Pietila, M. Rassaian, and K. Brice-Heames, “Design characterization of microwave antenna BGA interconnect structure using testvalidated physics-of-failure methods,” in Proc. 37th Ann. IEEE Int. Reliabil. Phys. Symp., Mar. 1999, pp. 347–355. [20] P. Towashiraporn and C. Xie, “Cohesive modeling of solder interconnect failure in board level drop test,” in Proc. 10th Intersoc. Thermal Thermomechan. Phenomena Electron. Syst. Conf., May 2006, pp. 817–825. [21] S. B. Park, R. Joshi, and B. Sammakia, “Thermomechanical behavior of organic and ceramic flip chip BGA packages under power cycling,” in Proc. 21st Ann. IEEE Semicond. Thermal Meas. Manag. Symp., Mar. 2005, pp. 214–222. [22] T. E. Wong and H. S. Fenger, “Vibration and thermo-mechanical durability assessments in advanced electronic package interconnects,” in Proc. 54th Electron. Compon. Technol. Conf., Jun. 2004, pp. 1080–1087. [23] B. Sun, “Effects of electric contact failure on signal transmission in unmatched circuits,” in Proc. 47th IEEE Holm Conf. Contacts, Sep. 2001, pp. 186–191.

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[24] M. E. V. Valkenburg, Network Analysis. Englewood Cliffs, NJ: Prentice-Hall, 1955.

Frank J. Villegas (M’02), photograph and biogrpahy not available at the time of publication.

Mark Adams, photograph and biogrpahy not available at the time of publication.

Paul Thompson (M’97), photograph and biogrpahy not available at the time of publication.

Charles Jackson (F’07), photograph and biogrpahy not available at the time of publication.

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Direct Synthesis of Passband Impedance Matching With Nonuniform Transmission Lines Yao-Wen Hsu, Student Member, IEEE, and Edward F. Kuester, Fellow, IEEE

Abstract—An analytical technique is used in this paper to achieve a direct synthesis of passband impedance matching under the Wentzel–Kramers–Brillouin approximation with nonuniform transmission lines. The input reflected power over a required frequency band is minimized using a least squares method, and the characteristic impedance function is constructed in terms of a Fourier series. General properties are observed as a result of this analysis, and a table covering all normalized design parameters of the single passband case is given. Results from two independent -matrix method and the High Frequency methods, the Structure Simulator full-wave analysis, are used to compare to this theory. Sensitivity analysis of this design is also given and compared with Klopfenstein’s taper. A linear property of this theory provides more freedom to extend it to multiband applications. In the end, one measurement result using microstrip line is compared with numerical theories to confirm this theory. Index Terms—Impedance matching, least squares method, nonuniform transmission line, passband optimization.

I. INTRODUCTION

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ONUNIFORM transmission lines have been extensively used as impedance-matching networks in microwave engineering. Their performance can be gauged by how small the reflection coefficient is over a desired frequency band or how short the tapered section is for a given level of return loss. We might optimize a design by minimizing either of these characteristics. Klopfenstein’s transmission-line taper [1], [2] has been proven to be optimal in this sense when a high-pass filter property is needed. Kuznetsov and Stratonovich [3] and Solymar [4] proposed that the reflection performance might be improved by sacrificing bandwidth. In this paper, we provide a simple procedure to accomplish this design analytically. Many authors have considered this problem in the past. Often, the Wentzel–Kramers–Brillouin (WKB) approximation is used to simplify the problem. Other researchers have used computationally intensive methods to carry out the design without the WKB approximation. We cite here only a few works that use minimization of an error criterion as the basis of their design. In [5] and [6], the difference between the achieved and desired reflection coefficient magnitudes was chosen as to be error

Manuscript received July 17, 2009; revised December 10, 2009. First published March 15, 2010; current version published April 14, 2010. The authors are with the Department of Electrical and Computer Engineering, University of Colorado at Boulder, Boulder, CO 80309 USA (e-mail: edward. [email protected]; e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042640

criterion. The WKB approximation is used in [5] and the resulting error was minimized analytically by adjusting the amplitudes of basis functions used to describe the impedance taper in the same way as in [3]. In [6], a similar method was used without the WKB assumption, and results were obtained by numerical optimization of the error. In [7] and [8], optimization of the error was achieved using the Gelfand–Levitan–Marchenko inverse scattering technique. Except for [5], these methods all require substantial computer time and programming to implement. The results were ripple-shaped impedance tapers when designing for passband impedance matching. In this paper, we implement the method of [3] (which is close in spirit to that of [5], but uses different basis functions for the characteristic impedance taper) to obtain a highly efficient design method. A Fourier series for the characteristic impedance function is constructed, and the input reflected power is minimized over the entire range of design frequencies (rather than just at discrete frequency points) to assure uniformly low reflection over the design bandwidth. A number of conditions will be assumed in this paper to simplify the problem, namely that the characteristic impedance function is continuous (including at the endpoints), the specified input and output impedances are resistive and frequency-independent, and the transmission lines are lossless and transverse electromagnetic (TEM). Our results can provide simple mathematical interpretations of the numerical results of [5]–[10] and form the basis of possible extensions of this work to more complicated cases. We first review the derivation of [3], providing an explicit evaluation of the double integrals needed to determine the coefficients of the Fourier series, which improves the efficiency of the calculation. A number of examples can be studied in order to draw general conclusions about the properties of passband optimization. The frequency dependence of the input reflection coefficient in this study is similar to that of a partially exponential taper [11]. The highest order of the Fourier series cannot be made arbitrarily large and must be limited depending on the shape of the impedance taper and the limits of validity of the WKB assumption. The results are universal in the sense that they can be made to depend only on the ratio of impedances to be matched and are expressed in terms of a normalized frequency. This makes it possible to create a table of optimized passband designs with all design parameters normalized, and the results can be related to a performance criterion of Bode–Fano type. It is also a substantial advantage over methods such as those of [6]–[10], which must be repeated from the beginning when a new design is re-matrix method and the High Frequency quired. The Structure Simulator (HFSS) full-wave simulations are used to

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compare to this theory using different approximated smooth width profiles on a stripline model and obtain the expected flatness of transmission group delay. A sensitivity analysis is also made, showing that no extra absolute errors are added compared to Klopfenstein’s taper if the WKB assumption is valid. A fairly arbitrary multiband optimization can be obtained from this theory without complicated analytical recalculations, because the required matrix elements are just sums of those from the single-band cases. This will be illustrated in Section VII. Finally, we will use some reasonable approximations and adapt the previous TEM theory to non-TEM mode. One of the microstrip-line examples will be fabricated and measured. Theories of the TRL calibration technique will be used to help extract those measured data from an even-port (50–50 ) network analyzer. Results will be compared with those from numerical methods and Klopfenstein’s design.

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The reflection coefficient at the input end can be obtained as (5) In practice, it is important to minimize the input reflected power for the frequencies lying in the operating band

(6) and are the assigned lower and upper angular frewhere quencies for a single-band case. It will prove convenient later on to introduce a normalized frequency for generality of our results as (7)

II. THEORETICAL FUNDAMENTALS Nonuniform transmission lines are modeled using the firstorder nonlinear differential equation [12] (1) where is the reflection coefficient at any point along the line and is the characteristic impedance function, assumed to be real and continuous, including at the end points and , where and are the input and output impedances and is the taper length. Additionally, is the coordinate in the direction of propagation and is the propagation constant of the nonuniform transmission line. Equation (1) does not take higher order modes (i.e., parasitics) of the transmission line into account. To simplify the problem, we limit our discussion to lossless nonuniform transmission lines supporting TEM waves only. Therefore, we take to be a purely imaginary quantity that is constant along and proportional to the angular frequency as (2) where is the phase constant and is the phase velocity. It is impossible in general to solve (1) analytically for the reflection coefficient of a general nonuniform transmission line, and this makes optimization based on the exact solution timeconsuming indeed, since a numerical solution must be used. Therefore, we use an assumption to simplify this equation so is continuous, that it can be solved analytically: because can be neglected (this is known we will assume that the term as the WKB approximation), and (1) can be rewritten as the Ricatti equation

where and are wavelengths at and , respectively. To take advantage of the fact that the result of (6) must be real, and , we change the variables and to , and obtain where

(8) We will define a new function and use a Fourier series to represent it as a weighted sum of orthogonal sinusoidal components (9) where and are unknown weighting parameters, is an integer, and is the highest order of the Fourier series. The same , with instead of as the index. expansion is used for As discussed in [3], because is continuous along the line as well as at the end points in this design, . and to We invoke the conditions obtain the Fourier series coefficient (10) which is thus known, if , , and are given. According to the properties of even and odd functions

(3) where (4)

(11)

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From [13], we can transform the matrix elements into the following form, which is much more efficiently calculable: (14)

Fig. 1. General structure of the desired nonuniform transmission line sketched.

where

where, if , then we have (15), shown at the bottom of this page, while if , then we have (16), shown at the bottom of this page, where is the cosine-integral function, is the sineis Euler’s constant. The integral function, and can now be obtained from (13) by a simple matrix constants inversion. This completes the analytical procedure of designing a single-band matching section. The characteristic impedance function and the corresponding reflection coefficient are

(17) (12)

and

We partially differentiate (11) with respect to each of the unknown parameters and set each derivative equal to zero to , and the result can be written in matrix form as minimize

.. .

..

.

.. . .. .

(18) III. PROPERTIES OF PASSBAND OPTIMIZATION

.. .

.. . (13)

As an example, we choose , , , and . The normalized input reflection coefficient ) and the characteristic imped(defined as ances are shown in Figs. 2 and 3 for various orders .

(15)

(16)

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in ample, the characteristic impedance function for Fig. 3 violates the WKB condition, and is extremely oscillatory and might prove very difficult to fabricate. , , and , the input re3) Scaling property: with fixed flection coefficient (17) is proportional to . This shows that the input reflection coefficient is equal to the factor multiplied by a function of frequency. This factor is in turn related to the WKB approximation for the [11] as nonnormalized input reflection coefficient at (19) Our optimization has minimized the reflection by minimizing the second factor in (17) over the given range of frequencies. Therefore, the reflection coefficient function , can give inof Fig. 2, as normalized to its value at formation for a general combination of impedances.

Fig. 2. Input reflection coefficients of a single-passband matching example for . various orders k , normalized to the value at !

=0

IV. COMPARISONS The WKB approximation is invalid when an extremely oscillatory profile of characteristic impedance occurs. We used two other methods to compare to our direct approach. A.

-Matrix Method The

-matrix is defined for a two-port by [14] (20)

Fig. 3. Impedance profiles for a single passband design matching 50–75 B : and B : .

= 04

= 16

, for

A number of similar examples with different combinations of design parameters show us the following properties of single passband optimized designs. 1) Decay property: the characteristic impedance function re. When duces to an exponential line [11] when , the input reflection coefficient still behaves similarly to the exponential taper in a global sense: the magnitudes of peaks eventually decrease when the frequency becomes large enough. 2) Choice of : we might seek to improve the performance of this matching method by increasing , but it cannot be made arbitrarily large. When increasing , we push down the reflection coefficient more strongly over the design range, which causes a large first peak above this band ( in Fig. 2). The nonnormalized value of this peak may become larger than 1 in the WKB approximation (it would not do so if modeled exactly, since that would violate the fundamental law of passivity). This is an indication that the WKB approximation is no longer valid, and such values of should therefore not be used. The characteristic impedances also oscillate more strongly as increases. For ex-

and are the total voltage and current at port . This where matrix is a convenient tool for analyzing a cascade network, -matrix of a cascade connection of netbecause the -matrices of these works is equal to the product of the -matrix method can quickly elemental networks. The determine the largest for which the WKB approximation is still valid. The smooth taper is sampled and transferred to an -section piecewise uniform transmission line, each section having the same length, to approximate the original continuous characteristic impedance function. The results of using an ideal circuit model in Ansoft Designer are the same as the results -matrix method, neither of which takes higher from order modes of the transmission line into account. B. HFSS Full-Wave Simulation We also use an Ansoft HFSS full-wave simulation, which solves Maxwell’s equations by using the finite-element method. , we deInstead of choosing 50–75 in Figs. 2 and 3 signed a 0.2-m-long stripline to match 10-50 over the frequency range of 0.6-2.4 GHz to investigate the scaling property. An infinitely thin perfectly conducting strip is centered between two wide perfectly conducting ground planes, in which the entire region between ground planes is filled with air and the total distance between the ground planes is 1.016 mm (40 mil). The geometry of this stripline is shown in Fig. 4. To reconstruct the original smooth impedance profile in HFSS, we used two approximate methods, illustrated in Fig. 5. A stepped structure with piecewise constant-impedance seg-matrix method ments is similar to the geometry of

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Fig. 4. Illustration of: (a) the 3-D model and (b) the cross section of the stripline in HFSS.

Fig. 6. Input reflection coefficient calculated using the WKB approximation, the ABCD -matrix method, and HFSS simulations with stepped and smooth structures for 40 and 200 sections. ! 0.6 GHz and ! 2.4 GHz.

=

=

Fig. 5. Demonstration of two approximated trace structures (taper width): stepped (solid lines) and smooth (dashed lines) in HFSS.

(solid lines). For the smooth structure (dashed lines), the values of the original impedance function are sampled at the positions of discontinuity of the step structure and connected to each other by straight lines. Compared with the step structure, the smooth structure is expected to be a more accurate model. The results of input reflection coefficient using the WKB ap-matrix method (or Ansoft Designer proximation, the 40 and 200 sections ideal circuit model), and HFSS with are presented in Fig. 6. The result of the -matrix method is similar to that of the stepped structure with with in HFSS. Using the smooth structure for the same improves the accuracy compared with the stepped structure. The difference between the WKB approximation and the smooth in HFSS may come from the WKB assumpstructure tion, parasitic effects, or the error in empirical formulas used for the characteristic impedance in terms of the stripline width. We obtained the group delay of the four structures in Fig. 6 from HFSS, and the results are plotted in Fig. 7, confirming the expectations listed above and showing extremely good flatness over the passband. An important performance criterion for any impedancematching circuit is that the group delay should be roughly independent of frequency. The group delay of a uniform TEM transmission line would be constant and that of a smoothly tapered TEM line would be approximately so within the passband. With the air dielectric as used in this example, the 0.2-m length of the constant-velocity line should have a group delay of 0.67 ns if reflection is neglected, and these results bear out

Fig. 7. Group delay of the four approximated structures in Fig. 6 calculated by HFSS.

that expectation. Similar behavior of the group delay should be achieved even for non-TEM structures such as the microstrip structure, as long as the frequency is sufficiently low that dispersion of the mode is negligible. V. SINGLE-BAND DESIGN TABLE The direct method provides passband optimization in general and guarantees minimized input reflection over the assigned band. A collection of single-band designs is shown in Table I (from 0 to 0.6; larger values with different combinations of (from 0.6 result in extremely small passband reflection) and to 2.0; see Fig. 8 for definitions of the parameters). In each cell, for the assigned bounds, we show the maximum achieved, the normalized frequency reflection coefficient and achieved, the best choice of , and the bounds limit of the WKB impedance ratio as defined below. This table covers many possibilities of single-passband-optimized -matrix method using designs, which are solved by the ; results are shown in Fig. 9. From this table, we are

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TABLE I ACHIEVED BOUNDS, ORDER OF FOURIER SERIES, WKB IMPEDANCE RATIO LIMIT, AND TOLERANCE ACCORDING TO DIFFERENT COMBINATIONS OF ASSIGNED BOUNDS

Fig. 8. Illustration of parameters of single-passband designs in Table I.

able to draw a number of general conclusions about this case, which are given below. in (19), the scaling property Using the approximation of and fundamental law of passivity tells us that we must have

and in Table I The particular case of can be compared with a very similar case [6, Case 1]. Although impedance discontinuities were allowed there, the resulting reflection coefficient is quite close to what is achieved here with far less numerical effort. From Table I, we can draw the following general conclusions. is fixed, and we increase until gets very large, 1) If . then is fixed, and we increase until it approaches , 2) If . then 3) If both and are increased, . can be reduced if we reduce the We also conclude that , which is similar to the Bode–Fano factor condition obtained for passband radar absorber design [15]. Compared with Klopfenstein’s taper, we notice that our design can provide better performance. Our method provides an intermediate bandwidth between the Klopfenstein design and narrowband designs with the same length. As with all impedance-matching schemes, they may be used as filters under appropriate circumstances. VI. SENSITIVITY ANALYSIS

To help avoid the nonnormalized peak value of the input reflecbecoming larger than 1, we define a new pation coefficient rameter , given as follows, to be the impedance ratio for which :

If the WKB approximation is valid and we vary the impedance with the same percentage error, we will obtain similar absolute error in the reflection coefficient, no matter what impedance taper is used. To illustrate this, a 5% random impedance error is applied to the characteristic impedances of both our design and Klopfenstein’s taper. The input reflection coefficient and absolute error

(22)

(23)

(21)

, we put in Table I). This parameter can be (if used to provide a warning that the conditions for validity of the is WKB approximation may be violated. If the ratio larger than , there will be inaccuracy in the values of near its peak value when using the WKB approximation, but to . We not necessarily in the desired frequency band from -matrix method to verify should therefore still use the the frequency response over the design band, especially in such cases.

is the input reflection coefficient of the taper with (where its characteristic impedance subjected to error) are shown in Fig. 10 for one of these random cases. The absolute errors for both designs are similar. VII. EXTENSION OF THE METHOD TO MULTIBAND DESIGNS The previous single-band analysis can be expanded to arbitrary multiband applications. This will provide more freedom to design and improve the performance by reducing the unnecessary waste of unused frequency ranges. To extend this method to

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Fig. 9. Normalized input reflection coefficients of single-band designs from Table I for B from 0.6 to 2.0, generated by the ABCD -matrix method with N

300: (a) B = 0:0, (b) B = 0:2, (c) B = 0:4, and (d) B = 0:6.

the first band, and of linearity,

=

and are for the second band. Because now becomes

(25)

Fig. 10. Sensitivity analysis: one of the 5% random impedance error applied to a single-band case (B = 0:4, B = 1:6, and k = 4) and Klopfenstein’s taper with the same first minimum frequency point.

a multiband case, the integral over frequency on the right-hand side of (6) can be changed to

We then substitute (25) into (13) and carry out the same procedures as for the single-band cases. Moreover, in order to emphasize certain bands according to different requirements, we can by difalso multiply the terms ferent weighting factors. In impedance-matching designs, it is easier to achieve lower reflection coefficients over the higher frequency bands: for the exponential taper, the reflection coefficient is decreasing as the frequency increases. For Klopfenstein’s taper on the other hand, when a higher cutoff frequency is chosen the level of the equal-ripple passband response obtained will be lower. Therefore, we can utilize this phenomenon combined with the extended theory to achieve a flexible multiband matching. As an example, choosing a narrower band at lower frequencies and a broader one at higher frequencies, the error criterion for this design can be written as

(24) where is an even number ( is the number of bands), and are the design lower and upper angular frequency bounds for

(26) The input reflection coefficient of this design is shown in 0.2 m and are matching Fig. 11, in which we have chosen

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Fig. 13. Structure of a nonuniform transmission line in microstrip.

Fig. 11. Multiband example using the WKB and ABCD methods compared with Klopfenstein’s taper with the same first minimum frequency.

Fig. 14. Fabricated back-to-back: (a) through and (b) delay structures based on the nonuniform transformer in Fig. 13. Fig. 12. Illustration of translating the TEM taper profile to a microstrip line for: (a) a TEM mode and (b) a microstrip line to maintain the same electrical length for each section.

50–75 . The factor 2 in the first term of (26) is chosen to emphasize this band, where it is harder to achieve a lower reflection coefficient. Using Klopfenstein’s taper with the same first minimum frequency, the maximum equal-ripple reflection coefficient is 0.029. Our design improves this to less than 0.004 for both bands. VIII. FABRICATION AND MEASUREMENT The use of impedance transformers in TEM-mode structures is limited because of manufacturing difficulties. We will adapt the TEM theory to non-TEM cases here using microstrip lines as an example. In the non-TEM-mode analysis, the phase velocity is no longer only a function of frequency but also depends on the ratio of width to thickness. We will use a simple approximate technique to extend our previous results. The desired input reflection coefficient on the microstrip line is affected only slightly by the position dependence of the phase velocity. To maintain the same electrical length for each section of impedance profile, we choose an average value of the phase velocities at the ends of each section to be the constant phase velocity of that section. This approximation will change the total physical length of the nonuniform transmission line (see Fig. 12). 4.3 10 Hz, 2.45 10 Hz, We choose and as an example, implemented in a microstrip line

with relative permittivity of the grounded dielectric substrate , the thickness of dielectric substrate equal equal to 0.508 mm (20 mil) and matching 10–50 . The resulto 63.8 mm. This nonuniform line transformer tant in Ansoft was laid out using a smooth structure with Designer, and two short sections of uniform line at either end included avoiding parasitic problems due to sharp corners. This structure is shown in Fig. 13. In order to be able to use an equal port (50–50 ) network analyzer to measure the -parameters of the transformer in Fig. 13, we apply a technique similar to thru-reflect-line (TRL) network analyzer calibration [14] but assume that the errors due to the 50- SMA connectors can be neglected. The structures to be measured are shown in Fig. 14. We will denote the -parameters of the through and delay and . connection individually in Fig. 14(a) and (b) as of the Therefore, we can then solve for the -parameters main part [14] as (27) (28) (29) is given by (30), shown at the top of the following where page. includes the effects of the SMA Notice that this value of connectors at the 50- ends. The input reflection coefficient

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(30)

functions for the non-TEM case is similar to those for TEM lines, except that the length of each section is varied according to the ratio of width to thickness in the microstrip lines (i.e., the electrical length is kept the same, while the physical length is adjusted). One of the examples was fabricated using a microstrip line and measured. Results were compared with those from previous numerical methods and showed substantial agreement. The work described in this paper can be extended in several ways. Such practical conditions in microwave engineering as discontinuous impedance functions and matching complex impedances need to be investigated. These additional constraints may well increase the complexity of our new analytical method, but we expect that it will still compare favorably to other techniques in efficiency. Fig. 15. Magnitude of input reflection coefficient from measurement is compared to those from using the WKB approximation, the ABCD -matrix method, and the HFSS full-wave simulator (LS: least square result, Klop: Klopfenstein’s taper).

from the measurement can be calculated and compared with those from the numerical methods (see Fig. 15). We see substantial agreement between measurement and theories, lending credence to the assertion that the effects of the SMA connectors are not very large. Our design has provided better performance 14.2 dB than a Klopfenstein taper with the same taper length and first minimum of the reflection coefficient 10.57 dB over the band 1–2.25 GHz. IX. CONCLUSION A highly efficient method for the direct synthesis of a passband-optimized matching section has been presented in this -matrix method and paper, with comparisons using the Ansoft HFSS full-wave simulations. This matching section provides optimized performance in the sense that it has the minimum input reflected power over a given range of design frequencies. The method used the WKB approximation and expressed the desired characteristic impedance function in terms of a Fourier series and optimized the input reflection coefficient by applying the least squares method. Analytical properties have been observed from a number of examples using different combinations of design parameters and provided mathematical interpretations for the numerical results of other researchers. A table of resultant designs for single-band optimization has been presented. Sensitivity of the optimized design has also been discussed here. Furthermore, the fundamentals of multiband applications have been presented in this paper, along with an example of a dual-band design. Finally, we adapted the TEM theory to non-TEM cases using microstrip lines as an example. The procedure of constructing the characteristic impedance

ACKNOWLEDGMENT The authors would like to thank Dr. Q. Mu for helping fabricate and measure the microstrip line model, Prof. Z. Popovic and her research group, University of Colorado at Boulder, Dr. J. Hagerty for fruitful discussions, and Prof. D. Filipovic, University of Colorado at Boulder, for use of the license for the HFSS simulator. REFERENCES [1] R. W. Klopfenstein, “A transmission line taper of improved design,” Proc. IRE, vol. 44, no. 1, pp. 31–35, Jan. 1956. [2] R. E. Collin, “The optimum tapered transmission line matching section,” Proc. IRE, vol. 44, no. 4, pp. 539–548, Apr. 1956. [3] P. I. Kuznetsov and R. L. Stratonovich, The Propagation of Electromagnetic Waves in Multiconductor Transmission Lines. New York: Macmillan, 1964. [4] L. Solymar, “A note on the optimum design of non-uniform transmission lines,” Proc. Inst. Elect. Eng., Part C, vol. 107, pp. 100–104, 1959. [5] H. Oraizi, “Design of impedance transformers by the method of least squares,” IEEE Trans. Microw. Theory Tech., vol. 44, no. 3, pp. 389–399, Mar. 1996. [6] M. Khalaj-Amirhosseini, “Wideband or multiband complex impedance matching using microstrip nonuniform transmission lines,” Prog. Electromagn. Res., vol. 66, pp. 15–25, 2006. [7] G. M. L. Gladwell, S. R. A. Dods, and S. K. Chaudhuri, “Nonuniform transmission-line synthesis using inverse eigenvalue analysis,” IEEE Trans. Circuits Syst., vol. 35, no. 6, pp. 659–666, Jun. 1988. [8] X. Gaobiao and K. Yashiro, “Impedance matching for complex loads through nonuniform transmission lines,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 6, pp. 1520–1525, Jun. 2002. [9] M. Norgren and T. Takenaka, “Full newton method for inverse transmission line problems, utilising explicit second order derivatives,” Inverse Problems Sci. Eng., vol. 15, no. 8, pp. 827–853, 2007. [10] P. Miazga, “Discrete shape optimization method of a non-uniform transmission line—Advantages and drawbacks,” in Proc. 17th Int. Conf. Microw., Radar Wireless Commun., 2008, pp. 1–4. [11] R. E. Collin, Foundations for Microwave Engineering, 2nd ed. New York: McGraw-Hill, 1992. [12] F. Bolinder, “Fourier transforms in the theory of inhomogeneous transmission lines,” Kungliga Tekniska Hoegskolans Handlingar, no. 48, pp. 1–84, 1951. [13] A. P. Prudnikov, Y. A. Brychkov, and O. I. Marichev, Integrals and Series. New York: Gordon & Breach, 1986.

HSU AND KUESTER: DIRECT SYNTHESIS OF PASSBAND IMPEDANCE MATCHING WITH NONUNIFORM TRANSMISSION LINES

[14] D. M. Pozar, Microwave Engineering, 3rd ed. Hoboken, NJ: Wiley, 2005. [15] K. N. Rozanov, “Ultimate thickness to bandwidth ratio of radar absorbers,” IEEE Trans. Antennas Propag., vol. 48, no. 8, pp. 1230–1234, Aug. 2000. Yao-Wen Hsu (S’08) received the B.S. degree in electrical engineering from National Cheng Kung University, Tainan, Taiwan, in 2001, and the M.S. and Ph.D. degrees from University of Colorado at Boulder, in 2006 and 2009, respectively. He is currently with the Department of Electrical, Computer and Energy Engineering, University of Colorado at Boulder. His research interests include impedance-matching design and computational electromagnetics.

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Edward F. Kuester (F’98) received the Ph.D. degree in electrical engineering from the University of Colorado at Boulder, in 1976. He is currently a Professor with the Department of Electrical, Computer and Energy Engineering, University of Colorado at Boulder. He has held visiting positions with the Technische Hogeschool, Delft, The Netherlands, the École Polytechnique Fédérale de Lausanne, Lausanne, Switzerland, and the National Institute of Standards and Technology (NIST), Boulder, CO. He has authored or coauthored over 75 technical papers and presented numerous papers at technical conferences. Prof. Kuester is a member of the Society for Industrial and Applied Mathematics and the International Union of Radio Science.

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Investigation of a Wideband 90 Hybrid Coupler With an Arbitrary Coupling Level Leung Chiu, Member, IEEE, and Quan Xue, Senior Member, IEEE

Abstract—This paper presents a new class of wideband 90 hybrid coupler with an arbitrary coupling level. The physical size of the proposed coupler is close to that of a conventional two-section branch-line coupler, but it has an additional phase inverter. The impedance bandwidth of the proposed coupler is close to that of a four-section branch-line coupler. The proposed coupler is a backward-wave coupler with a port assignment different from that of a conventional branch-line coupler. The design formulas of the proposed coupler are proved based on its even- and odd-mode half structures. We demonstrated three couplers at the center frequency of 2 GHz with different design parameters. Index Terms—Bandwidth enhancement, 90 parallel-strip phase inverter.

hybrid coupler,

I. INTRODUCTION ECENTLY, some kinds of (double-sided) parallel-strip circuits have been proposed [1]–[8]. The parallel-strip line is a kind of balanced transmission line with a piece of dielectric substrate sandwiched between two conductor strips. Parallel-strip lines can be employed for RF and microwave applications and have the advantages of a balanced transmission line, a wide range of characteristic impedance, simple transition with other transmission lines and lumped elements, and a phase inverter. In our research group, various designs making use of those unique properties were proposed, such as balanced devices [1], [2], filters [3], [4], and power dividers [5], [6]. A parallel-strip phase inverter is an especially useful technique for introducing a 180 phase delay without increasing the transmission line length, using the via hole to connect the signal of one line to the ground of the other, and vice versa, effectively swapping the signal and ground lines at the junction. It has been of particular interest to the designs of compact and wideband 180 hybrid couplers [7]. Power dividers achieving enhanced port-to-port isolation and wideband bandpass filters employing phase inverter are reported in [6] and [3], respectively. The details of the geometry and the lumped circuit model of the parallel-strip phase inverter are reported in [6].

R

Manuscript received July 17, 2009; revised December 28, 2009. First published March 15, 2010; current version published April 14, 2010. This work was supported in part by the Research Grants Council of Hong Kong SAR, China, under Grant CityU7002354. L. Chiu is with the State Key Laboratory of Millimeter Waves, School of Information Science and Engineering, Southeast University, Nanjing 210096, China (e-mail: [email protected]). Q. Xue is with the State Key Laboratory of Millimeter Waves, City University of Hong Kong, Kowloon, Hong Kong (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042835

Fig. 1. Schematic diagrams of proposed 90 schemes.

hybrid coupler with various

Directional couplers with either 90 or 180 phase shifts are the critical circuit elements of all wireless communications systems. Generally, the critical design issues for a directional coupler include: 1) impedance bandwidth; 2) port-to-port isolation; 3) magnitude imbalance; and 4) phase imbalance. In particular, 90 hybrid couplers such as the branch-line coupler, the Lange-line coupler, and the coupled-line coupler are extensively studied and utilized in various RF and microwave systems. They function as power combiner/dividers with a 90 phase shift, and they are particularly useful in many components such as balanced or Doherty amplifiers, balanced mixers, and antenna- or array-fed networks. A wideband parallel-strip 90 hybrid coupler using a phase inverter was originally proposed in [8], and its schematic diagram is shown in Fig. 1(a). The physical size of the proposed design is close to a conventional two-section branch-line coupler, but its performance in terms of the above four design issues is similar to that of a four-section branch-line coupler. In fact, two different designs with exactly the same theoretical performance are shown in Fig. 1(b) and (c). The single phase inverter design shown in Fig. 1(a) is chosen because the phase inverter discontinuities always degrade the coupler performance and it is easier to analyze compared with the designs shown in Fig. 1(b) and (c).

0018-9480/$26.00 © 2010 IEEE

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the three shunt stubs are 90 and 45 at the center frequency, respectively. To simplify the analysis, we only consider the parameters at the center frequency. The overall ABCD-matrix of the even-mode half structure is the product of the all ABCD-matrices representing the series and shunt elements. The even-mode

-matrix

can be conversed

from the ABCD parameter given by

Fig. 2. (a) Even-mode and (b) odd-mode half structures of the proposed hybrid coupler as shown in Fig. 1(a).

This paper extends the proposed coupler concept to an arbitrary coupling level. In Section II, we present a detailed analysis based on the even- and odd-mode half structures. Closed-form formulas relating the characteristics impedances of all branch lines and the power division ratio are proved. A modified parallel-strip phase inverter with parametric study and improved performance is given in Section III. The performances of the proposed hybrid coupler and the comparison between the conventional and the proposed designs are described in Section IV. Three proposed couplers with different power divisions and design considerations are presented in Section V. In Section VI, the discussion on coupler bandwidth is presented. II. ANALYSIS The proposed hybrid coupler consists of seven quarter-wavelength lines. The performances such as impedance matching and coupling level are determined by the characteristic impedances of the seven quarter-wavelength lines. Design formulas relating all characteristic impedances and power division ratio are derived in this section. It is important to notice that the derived formulas are valid at the center frequency only. Different power division is achieved by changing the characteristics impedance of each branch line. To simply the derivation procedure, the characteristic impedances of all branch lines , , and . As are assigned by three parameters, namely, shown in Fig. 1(a), the characteristic impedance of the four se. The two side and center ries branch lines is assigned to shunt branch lines have assigned characteristic impedances of and , respectively. In the first step, the ABCD parameters of the even- and oddmode half circuits should be determined. By applying even- and odd-mode analysis, the coupler can be divided into two half structures in which the line of symmetry is terminated by open and short circuits, respectively, as shown in Fig. 2. By considering the phase inverter as a 180 phase shifter, the effect due to the phase inverter should be “divided by half” when even- and odd-mode analysis is applied [9]. Therefore, the transmission should be terminated by line with characteristic impedance short (open) circuit in the even-mode (odd-mode) half circuit.

(1)

B. Odd-Mode Analysis Similarly, the odd-mode -matrix

can be de-

rived as

(2)

C. Formulation Once both even- and odd-mode -matrices are determined, , , , and of the entire coupler the -parameters, can be formulated by the following well-known formulas:

(3) The coupler has to satisfy . This condition is indicated by perfect impedance matching at each port; therefore, we have

A. Even-Mode Analysis Fig. 2(a) shows the even-mode half structure of the coupler. The electrical lengths of the two series transmission lines and

(4)

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Substituting (4) into (3), we have

(5)

We can observe three issues about the proposed coupler from (5). First, implies that port 3 is the isolated port if port 1 is assigned as the input port. Second, the phase difference between the signals at the through port (port 2) and coupled , , , and are port (port 4) is exactly 90 , where positive and purely real numbers. Third, the power division ratio , which is defined as the ratio of signal power at the through and . can port to that at coupled port, is a function of be expressed as

Fig. 3. (a) Geometry of a parallel-strip phase inverter with metal conductors only. (b) Top view of the parallel-strip phase inverter. The width is 3.7 mm, the length is 4.8 mm, the gap width is 0.3 mm, and the via diameter is 1.2 mm. (c) Top view of the phase inverter with two sections of parallel-strip lines, where w psl is the width of the parallel-strip line.

(6) By solving (4) and (6), we can get the circuit parameters , and as the functions of and , hence we have

, (7) (8)

The value of is unique for a given , while the values of and are not unique. For a given power division ratio, we will have high degree of freedom of choosing the values of and if both and satisfy the circuit parameters (8). Perfect impedance matching and port-to-port isolation is always achieved at the center frequency with different frequency and is chosen. responses if a different set of The series branch lines are connected to the four ports. It can slightly reduce the discontinuity at the four T-junctions if the is assigned to same as the port impedance. We have value of (9) All of the designed couplers in this paper will be based on (9). , we will have discussion in the ApFor the case of becomes unique and can be expressed as pendix. Therefore, (10) Substituting (7), (9), and (10) into (5), the scattering matrix of the proposed coupler at the center frequency can be represented as follows:

(11)

III. PARALLEL-STRIP PHASE INVERTER The phase inverter is the key of the proposed hybrid coupler. Ideally, the phase inverter should have the properties of zero physical size and frequency independent 180 phase shifting; however, a practical phase inverter has a finite physical size and not exactly (but close to) 180 phase shift. Proper design of the phase inverter can enhance the overall performance of the proposed coupler. Fig. 3(a) shows the geometry of a parallel-strip phase inverter with two sections of parallel-strip lines. The parallel-strip phase inverter consists of two vertical vias connecting the “signal” and “ground” lines. A lumped circuit model, which consists of parasitic capacitances, inductances, and resistances, was reported in [6]. These parasitic elements introduce strong discontinuities to degrade the phase inverting as well as the coupler performances. These parasitic elements cannot be easily neutralized by adding extra circuits such as stubs or lumped elements. The phase-inverting performance depends on not only the design of the phase inverter but also the two sections of the transmission lines connected to the phase inverter. For verification, several parallel-strip phase inverters with different widths, , are simulated using the commercial electrodented by magnetic simulation software, Zeland IE3D Version 10.1 [10]. Fig. 3(b) and (c) shows the top view with dimensions of the phase inverter connected with two sections of parallel-strip line 10 mm long. The width and the length of the parallel-strip phase inverter are 3.7 and 4.8 mm, respectively, where the width is designed to be the same as that of a 50- parallel-strip line using the same dielectric substrate. The diameter of the via hole is 1.2 mm and the gap width is 0.3 mm. The dielectric substrate with dielectric constant of 2.65, substrate thickness of 1.0 mm, and metal thickness of 0.02 mm were used in the simulation. The electromagnetic simulation is performed from dc to 4 GHz, where the design frequency is 2 GHz. The port impedance in the (50 ), and the electrical length of simulation is designed at the whole structure is designed at 90 (270 ) at 2 GHz. Fig. 4 shows the simulated frequency responses of the -parameters. The performances of the impedance matching and the

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Fig. 4. Simulated frequency responses of: (a) the return loss and (b) the insertion of the phase inverter as shown in Fig. 3(c) with different values of w psl (or characteristic impedances of parallel-strip line sections).

Fig. 5. Schematic diagram of a conventional n-section branch-line coupler , Z ; . . . Z , and for comparison with circuit parameters of Z ; . . . Z . Z

insertion loss change with . Distinct improvement is found . As shown in Fig. 4(a), by suitably increasing the value of a null in the frequency response of the return loss is found, and . For the the frequency point of the null increases with 2-GHz phase inverter terminated by 50- port impedances, the should be 4.20 mm, and the corresponding charoptimum acteristic impedance is 44 . Less insertion loss is found and a null of the return loss at 2 GHz is observed. With an electromagnetic simulation, it is confirmed that there is significant improvements of both return loss and insertion loss performances . after tuning of

Fig. 6. Performance comparison of the conventional branch-line couplers and the proposed hybrid coupler. (a) Impedance matching. (b) Port-to-port isolation. (c) Magnitude imbalance. (d) Phase imbalance.

For the purposes of comparison, three conventional branchline couplers are simulated with approximately equal power division. All circuit parameters can be found based on the design methodology presented in [11] and are finely tuned using a circuit simulator (Agilent Advanced Design System) [13]. An ideal transmission-line model is used in the simulation, and the effect of the discontinuities introduced by all T-junctions is omitted. All circuit parameters are optimized with the goals of mini(return loss) and (port-to-port mizing the magnitudes of isolation). The circuit parameters for the three couplers are shown as follows. For a three-section branch-line coupler

IV. COUPLER DESCRIPTION AND COMPARISON The proposed coupler is a transmission-line 90 directional coupler. It divides power with 90 phase difference at the center frequency. The port locations of the proposed coupler are different from those of the conventional branch-line coupler. The operation mechanisms of the conventional and the proposed couplers are explained and their differences are shown in this section.

For a four-section branch-line coupler

For a five-section branch-line coupler

A. Conventional Branch-Line Coupler A branch-line coupler is one of the fundamental components of systems designs. It divides power into two paths with 90 phase difference and port-to-port isolation. Its bandwidth can be enhanced by increasing the number of sections. An -section branch-line coupler is shown in Fig. 5. The electrical length of each branch line is designed at 90 at the center frequency. The coupler performances can be optimized by tuning the values of all characteristic impedances. Generally, there is no closed-form formula to determine the required circuit parameters for a given specifications. Fortunately, synthesis techniques help to determine all the required circuit parameters with given specifications [11], [12].

The simulated -parameters of the three couplers using a circuit simulator are shown in Fig. 5. The working bandwidth can be enhanced by increasing the number of sections; however, it introduces three problems. First, increasing the number of sections means that the total circuit area will also increase. It is an inherent problem, which can never be solved if a conventional design has to be used. Second, the number of circuit parameters increases resulting in high design complexity. The simulation time increases with the circuit size.

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Third, it always results in very high characteristic impedance transmission lines, which are implemented by very narrow lines. The narrow lines lead to a difficulty in fabrication, increasing the relative fabrication errors, and reducing the power handling. For example, the transmission lines with characteristic impedance in the five-section coupler are extremely difficult to be realized by standard printed circuit board fabrication technology. These are the main reasons why the number of sections is limited to four or five. To solve this problem, the slotted ground technique [14] and offset parallel-strip lines [6] have been proposed to realize the high characteristic impedance line easily; therefore, a multisection branch-line coupler without very narrow lines was proposed. The number of sections is limited to four or five if the conventional branch-line coupler has equal power division using standard printed circuit board (PCB) fabrication technology.

Fig. 7. (a) Geometry of the back-to-back linearly tapered 50- parallel-strip line to 50- microstrip-line transition. (b) Geometry of direct connection of 50- parallel-strip line and 50- microstrip line.

B. Proposed Coupler A circuit model of the proposed hybrid coupler with the following circuit parameters was built in circuit simulator for comparison:

Similarly, ideal transmission-line and phase-inverter models are used in the simulation. In addition, the effect of the discontinuities introduced by all T-junctions is neglected. The simulated -parameters of the proposed coupler are shown in Fig. 5. It is found that the proposed coupler achieves relative impedance bandwidth of about 96%, which is between that of four-section and five-section branch-line couplers if 10-dB return loss is the reference. Besides, there is one null in the frequency responses of both return loss and port-to-port isolation, while nulls can be found in that of the optimized -section branch-line coupler. The behavior of the backward-wave coupling can be analytically proven by the following expressions, which come from substituting (4) into (1) and (2):

(12)

It has been proven that the proposed branch-line coupler with a phase inverter is a backward-wave coupler, contrary to the conventional one which is a forward-wave coupler, if all port impedances are matched [15].

Fig. 8. Simulated and measured frequency responses of: (a) the return loss and (b) the insertion loss of the back-to-back linearly tapered parallel-strip-line-tomicrostrip-line transition, where the case of the direct connection is added on the same figures as a reference.

changes into that of the 50- parallel-strip line. The layout of the back-to-back linearly tapered transition is shown in Fig. 7(a). For comparison, the direct connection of a microstrip line and parallel-strip line with the layout as shown in Fig. 7(b) was simulated. The length of the transition is 25 mm, about a quarter wavelength at 2 GHz, and the length of the parallel-strip line is 10 mm. The electromagnetic model is built in the commercial electromagnetic simulation software, Zeland IE3D Version 10.1 [10], with the dielectric substrate with dielectric constant of 2.65, substrate thickness of 1.0 mm, and metal thickness of 0.02 mm. The frequency responses of the -parameters of the back-to-back linearly tapered transitions are simulated and measured as shown in Fig. 8. The back-to-back linearly tapered transition introduces about 0.4-dB insertion loss at 2 GHz, while the direct connection introduces more than 0.7 dB at the same frequency. In addition, the back-to-back linearly tapered transition has better performance on impedance matching or less reflection than that of direct connection at 2 GHz. B. Experiments and Results

V. COUPLER WITH AN ARBITRARY COUPLING LEVEL A. Parallel-Strip-Line-to-Microstrip-Line Transition A common SMA connector is used to connect unbalanced transmission lines such as microstrip line and coplanar waveguide, while the parallel-strip line is balanced on differential transmission lines. In this paper, a linearly tapered microstripline-to-parallel-strip-line transition is used for the measurement purpose. By removing part of the ground plane of the microstrip line, the field distribution in the 50- microstrip line gradually

Three proposed couplers with values of 1, 2, and 4 were designed at the center frequency of 2 GHz. For the coupler with values of 2 and 4, the following circuit parameters were used. Coupler with

Coupler with

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Fig. 9. Simulated and measured frequency responses of the proposed couplers with different values of k . Magnitude of S -parameters with: (a) k and (c) k . Phase differences with through and coupled ports with: (d) k , (e) k , and (f) k .

=4

=1

All couplers were fabricated on the same dielectric substrate with dielectric constant of 2.65, substrate thickness of 1.0 mm, and metal thickness of 0.02 mm by a standard printed circuit board fabrication technique. All dimensions of the coupler were finely tuned by using electromagnetic simulation software (Zeland IE3D Version 10.1) [10] to take into account the effect of the discontinuities introduced by all T-junctions and the phase inverter. The -parameters of all couplers were measured by a network analyzer. Fig. 9 shows that simulated and measured results of the three fabricated couplers. The three fabricated couplers have relative impedance bandwidth of about 98%. With this bandwidth, all couplers achieve more than 20-dB port-toport isolation and 90 phase difference between the coupled and through ports with less than 2 phase error. Good agreement between the simulation and the measurement is achieved.

=2

=4

Fig. 10. Simulated frequency responses of the jS (01 dB). (0 dB) and (b) k :

= 0 7943

j

and jS

j

= 1, (b) k = 2,

with: (a) k

=1

C. Design Consideration For most of the practical applications, a hybrid coupler should be designed to work within a frequency band. The design specification should include both acceptable magnitude and phase imbalances within certain bandwidth. By proper choosing value of , the overall bandwidth of the proposed coupler can be widened. It is always preferred that the coupler has wider overall bandwidth as possible. This issue is discussed by starting an example. We need to design a coupler with a specification of equal power division with no more than 1-dB magnitude imbalance and not more than 5 phase imbalance. Normally, if 0 dB is chosen, the circuit parameters are given as follows:

Fig. 10(a) shows the simulated -parameters of the coupler with the above parameters. The simulated bandwidths of impedance matching, 1-dB magnitude imbalance, and 5 phase imbalance are 97.80%, 48.20%, and 105.6%, respectively. Therefore, the overall working bandwidth under the required specification should be 48.20%. It is critical to point out that it is not necessary to achieve 0-dB magnitude imbalance at the center frequency. As observed from Fig. 10(b), the value of varies with frequency where attends minimum at the center frequency. From the specification, the minimum acceptable values should be 0.7943 1 dB . If is chosen, the circuit parameters are as follows:

Fig. 10(b) shows the simulated -parameters of the coupler with the above parameters. The simulated bandwidths of

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Fig. 11. Simulated relationship of the relative bandwidth and parameter Z with different values of k . (a) Impedance bandwidth with jS j < 010 dB. (b) 00.1 dB. (c) Isolation bandwidth with jS j < 020 dB. (d) Phase imbalance bandwidth Bandwidth with magnitude imbalance bandwidth with jS =S j with j S 0 S j 1 .

impedance matching, 1-dB magnitude imbalance, and 5 phase imbalance are 97.40%, 65.80%, and 105.6%, respectively. Hence, the overall working bandwidth under the same specification should be 65.80%. The simulation shows that the coupler using the second set of circuit parameters results in wider overall bandwidth than that using first set. By assigning the minimum acceptable value of for a given specification, the coupler can achieve more bandwidth. VI. DISCUSSION ON COUPLER BANDWIDTH Various frequency responses of the proposed coupler with and are simulated. The bandwidth of the different values of proposed coupler or others should be defined for a given specifications of impedance matching, port-to-port isolation, magnitude imbalance, and phase imbalance. In this study, the specifi10 dB; cations are given as: 1) impedance matching: 2) port-to-port isolation: 20 dB; 3) magnitude imbal0.1 dB; and 4) phase imbalance: ance: . The relationships of relative bandwidth and one of the specifications were recorded and their relationship is sumis assigned to be 50 . It is found marized in Fig. 11, where that all of the relative bandwidths are sensitive to the value of . Properly choosing the value of can extend the relative is assigned to be 40 , it is an optimum value bandwidth. If for the bandwidths of impedance matching and magnitude imis assigned to be 50 , it is balance. On the other hand, if an optimum value for the bandwidths of port-to-port isolation and phase imbalance. The phase characteristics of 90 phase

difference between the through and coupled ports is the most important property for the 90 hybrid coupler and the proposed is chosen for coupler for the authors’ point of view. proving the proposed concept. VII. CONCLUSION In this paper, we have presented a 90 hybrid coupler using a phase inverter. The entire design is implemented using parallel-strip line, and it reinforces the development of parallelstrip circuits. The proposed design offers a wide operation bandwidth with acceptable return loss, port-to-port isolation, and phase imbalance. Additionally, the proposed coupler exhibits backward-wave coupling, similar to a conventional coupled-line coupler but with a totally different coupling mechanism. We designed, fabricated, and tested several designs with different coupling levels. Finally, this paper presents a simple method , with given magnito choose the most critical parameter, tude imbalances. Accurate prediction of the working bandwidth, comparable to measured results, is achieved. REFERENCES [1] L. Chiu, T. Y. Yum, Q. Xue, and C. H. Chan, “A wideband compact parallel-strip 180 degree Wilkinson power divider for push-pull circuitries,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 1, pp. 49–51, Jan. 2006. [2] J. Shi, J. X. Chen, and Q. Xue, “A differential voltage-controlled integrated antenna oscillator based on double-sided parallel-strip line,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 10, pp. 2207–2212, Oct. 2008.

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[3] K. W. Wong, L. Chiu, and Q. Xue, “Wideband parallel-strip bandpass filter using phase inverter,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 8, pp. 503–505, Aug. 2008. [4] J. X. Chen, C. H. K. Chin, and Q. Xue, “Double-sided parallel-strip line with an inserted conductor plane and its applications,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 9, pp. 1899–1904, Sep. 2007. [5] T. Yang, J. X. Chen, and Q. Xue, “Three-way out-of-phase power divider,” Electron. Lett., vol. 44, no. 7, pp. 482–483, Mar. 2008. [6] L. Chiu and Q. Xue, “A parallel-strip ring power divider with high isolation and arbitrary power-dividing ratio,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 11, pp. 2419–2426, Nov. 2007. [7] L. Chiu, Q. Xue, and C. H. Chan, “A compact wideband parallel-strip 180 degree hybrid coupler,” Microw. Opt. Technol. Lett., to be published. [8] L. Chiu and Q. Xue, “Wideband parallel-strip 90 hybrid coupler with phase inverter,” Electron. Lett., vol. 44, no. 11, pp. 687–688, May 2008. [9] S. Rehnmark, “Wide-band balanced line microwave hybrids,” IEEE Trans. Microw. Theory Tech., vol. MTT-25, no. 10, pp. 825–830, Oct. 1977. [10] IE3D 10.1, Zeland Software, Inc. Fremont, CA. [11] W. M. Fathelbab, “The synthesis of a class of branch-line directional couplers,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 8, pp. 1985–1994, Aug. 2008. [12] R. Levy and L. F. Lind, “Synthesis of symmetrical branch-guide directional couplers,” IEEE Trans. Microw. Theory Tech., vol. MTT-16, no. 2, pp. 80–89, Feb. 1968. [13] “Agilent Advanced Design System” Agilent Headquarters, Palo Alto, CA. [Online]. Available: http://eesof.tm.agilent.com/ [14] C. W. Tang, M. G. Chen, Y. S. Lin, and J. W. Wu, “Broadband microstrip branch-line coupler with defected ground structure,” Electron. Lett., vol. 42, no. 25, pp. 1458–1460, Dec. 2006. [15] R. K. Mongia, I. J. Bahi, P. Bhartia, and J. Hong, RF and Microwave Coupled-Line Circuits. Norwood, MA: Artech House, 2007.

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Leung Chiu (M’05) received the B.Eng. and Ph.D degrees in electronic engineering from the City University of Hong Kong, Hong Kong, in 2004 and 2008, respectively. His research interests include microwave circuits and antenna arrays.

Quan Xue (M’02–SM’04) received the B.S., M.S., and Ph.D. degrees in electronic engineering from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 1988, 1990, and 1993, respectively. Following graduation, he remained with UESTC as a Lecturer and became a full Professor in 1997. He worked briefly with the Chinese University of Hong Kong prior to joining the City University of Hong Kong in 1999, initially as a Research Fellow and currently as an Associate Professor, Director of the Applied Electromagnetics Laboratory, and Deputy Director of the State Key Laboratory of Millimeter Waves of China. Since May 2004, he has been the Principal Technological Specialist of the State Integrated Circuit (IC) Design Base, Chengdu, Sichuan Province, China. He has authored or coauthored over 140 internationally referred journal papers and over 50 international conference papers. His current research interests include antennas, power amplifier linearization, microwave components and subsystems, monolithic microwave integrated circuits (ICs) and RFICs. Dr. Xue was the cosupervisor of two IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS) Best Student Contest papers (third place in 2003 and first place in 2004). He is the coordinator of the IEEE MTT-S Administrative Committee (AdCom) Membership Services Region 10 and the coordinator of Regional Initiatives/China Initiatives (Ad Hoc).

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Broadband Compact 180 Hybrid Derived From the Wilkinson Divider Ning Yang, Member, IEEE, Christophe Caloz, Fellow, IEEE, and Ke Wu, Fellow, IEEE

Abstract—A novel 180 hybrid is proposed. This hybrid is derived from the Wilkinson divider, where the resistor is simply replaced by a fourth port of equal characteristic impedance, which port of the hybrid, while the input port of the origacts as the port. Due to this structure, inal Wilkinson divider acts as the including only two quarter-wavelength transmission lines, this hybrid has a greatly reduced size compared with the conventional hybrid rat-race and miniaturized variants of it. Furthermore, it exhibits a significantly improved bandwidth. The measured 0.5-dB insertion loss bandwidth is over 200% for power division and 66% for power division (with 50- load). Due to its perfectly symmetric configuration, the proposed hybrid features frequencyindependent power-dividing balance performance. The 0.5-dB amplitude imbalance for both the and port divisions has essentially unlimited bandwidth, and the measured phase imbalance is within 3 over all frequencies. The proposed hybrid also shows excellent port isolation with a measured result exceeding 30 dB over all frequencies.

1

6



1

6

6

1

6 1

Index Terms—180 hybrid, Broadband coupler, rat-race hybrid, Wilkinson divider.

I. INTRODUCTION

T

HE 180 hybrid coupler, or 180 hybrid for short, is a four-port network device which achieves versatile power combining/dividing operations, such as separating the sum and the difference of two input signals [1], [2]. It has wide applications in the design of mixers [3], frequency doublers [4], antenna feeds, and beam-forming networks. The 180 hybrid may be implemented in several forms, among which the rat-race hybrid is most popularly used in microwave circuits due to its planar form and simple design [2]. The conventional rat-race is composed and one transmission line sections forming a of three ring. The limiting factor in these hybrids in term of both com, or 270 , transmission-line pactness and bandwidth is the sometimes section. The resulting total circumference of is often prohibitively large, especially in monolithic microwave integrated circuit (MMIC) application. Moreover, the operation bandwidth of the rat-race hybrid is very limited, essentially by section, which has the largest phase variation the largest versus frequency, since the phase variation is proportional to the . line length Manuscript received September 14, 2009; revised January 21, 2010. First published March 01, 2010; current version published April 14, 2010. The authors are with the École Polytechnique de Montréal, Montréal, Canada, QC H3T 1J4 (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042631

Several technologies have been proposed to decrease the frequency sensitivity of hybrids in order to enhance bandwidth. A common approach consists of replacing the section with some kind of shorter structure with the same line with a phase-reversing impedance, for instance, by a element, providing 90 plus a frequency-independent 180 phase delay. This concept was originally presented by March in [5], where a pair of opposite-end short-circuited broadside-cousection and pled striplines substitutes for the traditional approximates a phase-reversing network over a wide frequency range. In [6]–[10], bandwidth enhancement is achieved by phase reversal; in addition to bandwidth enhancement, this , at the cost of one approach reduces the circumference by additional phase reversing structure, which is generally complex and difficult to implement. Based on a similar concept, a planar magic-T using microstrip-slotline transitions [11] and its improved versions [12], [13] were proposed for bandwidth enhancement and MMIC implementations. However, the overall structure is even larger than a conventional rat-race due to the two-layer microstrip-slotline transitions. In [14], the section is replaced by a section of lumped-element composite right-/left-handed (CRLH) artificial transmission line, which provides a wideband 180 relative phase shift due to the dispersive nature of the artificial line. However, these lumped or quasi-lumped loads of the structure increases the fabrication cost and the magnitude and phase balance bandwidth is very limited. In terms of size, several slow-wave transmission-line techniques have been proposed to reduce the size of the conventional rat-race, such as folded line configurations [15], defected ground structure [16], and stepped-impedance slow-wave structures [17], [18]. However, in all of these approaches, bandwidth is reduced. This paper proposes a novel 180 hybrid derived from the Wilkinson divider, where the resistor is replaced by a fourth port of equal characteristic impedance. The additional port acts port of the hybrid, while the input port of the origas the inal Wilkinson divider acts as the port. Only two transmission-line sections are required, which leads to the smallest configuration compared with all designs previously reported. Analytical and experimental results show that a bandwidth in excess to one octave is achieved, which is comparable to the ideal phase-reversal case [6]. The implementation is realized by a combination of microstrip lines and slotlines, not requiring any complex phase reversal structure. Furthermore, compared with the designs based on phase reversals, the proposed hybrid is perfectly symmetric, which provides perfect amplitude and phase balances at all frequencies and perfect isolation between the sum and difference ports.

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those of the Wilkinson combiner/divider, where the two translong with characteristic mission lines of the network are . impedances of In the resulting hybrid [Fig. 1(a)], the sum port is the input port of the initial Wilkinson divider, i.e., port 1, while the port is the added port, i.e., port 4. The power difference at port 1 is equally divided between ports 2 and 3. The characteristic impedance of port 4 functions as the Wilkinson resistor to provide isolation and matching. As long as the structure is perfectly symmetric with respect to the axis of ports 1–4, so that no differential mode is excited between ports 2 and 3, perfect isolation is expected between ports 1 and 4. Port 4 differentially excites ports 2 and 3 via direct connection, while port 1 is shorted for the differential mode, seeing an open circuit after the quarter-wavelength transmission lines, as will be shown later. Again, as long as the structure is symmetric, the power from port 4 cannot reach port 1, and therefore perfect isolation is expected between ports 4 and 1. The circuit in Fig. 1(a) can be analyzed by the conventional even- and odd-mode decomposition technique [2]. The even mode, with in-phase excitations at port 2 and port 3, is shown in Fig. 1(b), and the odd mode, with out-of-phase excitations, is shown in Fig. 1(c). For the even-mode excitation, no current flows across the resistor between ports 2 and 3, i.e., the port. Therefore, two open circuits can be inserted at added these points, as shown in Fig. 1(b). Since the quarter-wavelength transmission lines operate as quarter-wave transformers, the input impedance from ports 2 and 3 is (1)

Fig. 1. Transmission-line model of the proposed 180 hybrid. (a) Overall structure. (b) Equivalent circuit for the even mode. (c) Equivalent circuit for the odd mode.

II. PRINCIPLE OF THE PROPOSED 180 HYBRID The proposed 180 hybrid is based on the structure of the well-known Wilkinson divider/combiner. The Wilkinson divider/combiner is a broadband three-port network device which achieves in-phase power division or power combination [1], [2]. All of its ports are matched and isolated from one another. In the combination mode, isolation is achieved by dissipating the coupled power in the resistor connected between the two inputs. Specifically, the proposed 180 hybrid is obtained from the conventional 3-dB Wilkinson divider/combiner by replacing its resistor with an additional port, thereby transforming the device into a four-port network, as shown in Fig. 1(a). This port is inherently differential. In order to provide isolation and matching, , it must exhibit, like the Wilkinson resistor, an impedance of impedance of the other three ports. Under compared with the this condition, the parameters of the network are identical to

Even-mode analysis also reveals that port 4 is isolated if ports 2 and 3 are excited with common-mode signals, since port 4 in this mode reduces to an open circuit. For the odd-mode excitation, a voltage null appears along the symmetry axis of ports 1–4 of the circuit. Therefore, a short circuit can be inserted along this axis, as shown in Fig. 1(c). After the inverting quarter-wave transmission line, the short circuit at port 1 becomes an open circuit, and the input impedance at port 2 or port 3 is then (2) which equals half of the source impedance of port 4. Port 1 is completely isolated in the situation of odd-mode excitation, due to the short circuit at port 1. From the above even-odd mode analysis, all of the ports are matched for both the even and odd modes. As a summary, the following scattering parameters are obtained for the proposed hybrid in Fig. 1(a): (3)

The frequency response of the 180 hybrid computed for the equivalent circuit model of Fig. 1(a) is plotted in Fig. 2. According to these analytical results, over one octave bandwidth is easily achieved with the proposed configuration. The 0.5-dB bandwidth at the output ports 2 and 3 over 200% for excitation

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Fig. 2. Frequency response of the ideal 180 hybrid of Fig. 1(a). (a) In phase power division from the 6 port (port 1) to ports 2 and 3, and return loss of the 6 port. (b) Anti-phase power division from the 1 port (port 4) to ports 2 and 3, and return loss of the 1 port. (c) Insertion phase from the 6 port (port 1) to ports 2 ). and 3, and from the 1 port to ports 2 and 3. (d) Isolations between ports 1 and 4 and between ports 2 and 3 (S =

01

at port 1 and 100% for excitation at port 4. The wide bandwidth for the port excitation equals that of the Wilkinson divider. As seen in Fig. 2(a) and (b), the output magnitudes at ports 2 and 3 are perfectly equal and extremely flat over the whole frequency range of operation. Furthermore, Fig. 2(c) shows that the phase differences for the outputs at ports 2 and 3 are constant almost over all the bandwidth (0 for port excitation, 180 for port excitation). These excellent frequency-independent balance properties are due to the symmetry of the structure. Finally, the and ports are perfectly isolated from each other, as shown in Fig. 2(d). The isolation ( 15 dB) between ports 2 and 3 has a limited bandwidth of 63%; however, this bandwidth is still wider than that of the conventional rat-race hybrid (46%) [2]. The performance of the proposed hybrid is compared with those of the conventional rat-race [2] and of rat-race variations [5], [6] in Table I. This table shows that the proposed hybrid exhibits significantly superior performance compared with the other solutions, besides its compactness. Nevertheless, two characteristics of the proposed hybrid may raise concerns: the port has a characteristic impedance of 100 rather than the 50 of the other ports, and it has a differential configuration rather then unbalanced configuration at the other ports. Regarding

impedance transformer can be used for the first concern, a transforming to a 50- system. In this situation, the 0.5-dB magnitude bandwidth for the output for -port excitation is unchanged, while the 0.5-dB bandwidth for -port excitation is degraded from 100% to 67% (around one octave, which is still comparable with the wideband hybrid using additional coupling line section), as shown in Table I. In contrast, the frequency independence of amplitude and phase balances is not affected at all, since the symmetry of the hybrid is maintained. However, in many applications, a 100- differential system is preferred, such as dipole antennas, differential amplifier pairs, and balanced mixers. In such applications, an impedance transformer is not required and a better system integrability is achieved by the proposed hybrid. The second concern (differential port) is automatically addressed by the proposed implementation of the differential port, which will be presented in Section III. III. DESIGN A. Implementation Problematic As described in the previous section, the proposed circuit is based on the well-known Wilkinson divider, where the absorbing resistor is substituted by a fourth port connected be-

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TABLE I PERFORMANCE COMPARISON OF DIFFERENT 180 HYBRIDS

tween the two dividing outputs. The in-phase power divider is very simple to design following textbook procedures. Thereport. fore, the only difficulty lies in the implementation of According to Fig. 1, this port must excite the circuit differentially, i.e., it must be a differential port or a port connected to a balun. In applications where the port is externally connected to a balanced circuit, such as for instance a differential amplifier, a balanced mixer or a balanced dipole antenna, the implementation of proposed hybrid is straightforward. However, since most of the interfaces in microwaves are unbalanced, a wideband balun connection is generally required in this circuit. Many baluns can be utilized. Some are narrowband and some have a prohibitively complex structure. For example, if a coupled-line Marchant balun is used in this structure, the required coupling level of the lines increases the implementation difficulty and the overall circuit size (two quarter-wave coupled transmission lines). At the same time, the symmetry of the hybrid is altered by the introduction of the balun, which will cause reduced bandwidth and significant imbalances in both magnitude and phase. Here, we will present a simple design, where hybrid slot/microstrip lines are utilized to realize the port, rather than resorting an explicit balun. This design features a small size and maintains symmetry. The proposed implementation is shown in Fig. 3. The different parts of the structure will be discussed in the following subsections. B.

Fig. 3. Implementation of the proposed 180 hybrid.

Port Y-Junction

The port is implemented in the form of a microstrip transmission line with a Y-junction toward the center of the network, as shown in Fig. 3. The Y-junction is a fundamental part of a Wilkinson divider. Through the Y junction, the port-level microstrip line at the cross section A-A is split into two offset microstrip lines at the cross section B-B’. The reason for this splitting will become clear in the following sections. The electric fields at the cross-sections A-A and B-B are shown in Fig. 4. The power excited from the left side of the microstrip line port evenly splits to the two offset microstrip transmission lines. C. Offset Microstrip Lines and Bi-Planar Slotlines As power travels further along the offset microstrip lines from the port, the width of the strip on top and the slot in the ground widens, and the electric field eventually displays at the cross section C-C as the distribution shown in Fig. 4(c). In fact, this distribution is similar to that in two adjacent slotlines, except

Fig. 4. Electric field distributions in the cross sections indicated in Fig. 3 for excitation at the 6 port. (a) A-A . (b) B-B . (c) C-C .

the grounds of these lines are not in the same plane as the active strip. The resulting slot lines are biplanar. Fig. 5 compares the electric field distributions in the traditional uniplanar slotline and its biplanar alternative introduced here. In uniplanar slotlines, the characteristic impedance is mainly determined by the width of the slot, which typically ranges from 60 to 200

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Fig. 8. Model of packaging to quantify the effects of radiation.

Fig. 5. Electric field distribution in the cross section of mono-planar and biplanar slotlines. (a) Biplanar slotline, as each of the two slotlines of the hybrid at the C-C cross section shown in Fig. 3(b). Conventional corresponding mono-planar (or uniplanar) slotline.

Fig. 6. Electric field distributions in the cross sections indicated in Fig. 3 for excitation at the port. (a) D-D . (b) C-C .

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Fig. 9. Hybrid prototype. (a) Top view. (b) Bottom view.

keep the same characteristic impedance for the offset microstrip line sections and the biplanar slotline sections. D.

Fig. 7. Slotline open circuit stubs for suppression of the slotline modes (to the left and to the right) for excitation at the port. (a) Structure. (b) Equivalent circuit. The two slot modes originating from the two slots CPW port are suppressed by the two open circuits they see at the junction (while energy is coupled in anti-phase to the microstrip ports 2 and 3).

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depending on the parameters of the substrate. The characteristic impedance of the biplanar slotline is mainly determined by the coupling associated with the overlapping areas of the metallizations on top and bottom, and the resulting impedance range is much wider than the conventional slotlines since the overlap area of two metal plates in different layers is much easier to control than the slot width in one layer. It is also very easy to

Port Excitation

The most critical part in the design of the proposed hybrid is the port. According to Fig. 1(a), this port must be differential. Most common transmission lines, such microstrip lines, are unbalanced and a balun is often required to make them compatible with differential ports. However, baluns generally suffer of limited bandwidth, which would have fatal consequences for the proposed broadband hybrid. On the contrary, the slotlines or the bilayer slotlines presented in previous subsection are inherently suitable to differential signals.In this study, a combination of slotlines, biplanar slotlines, and the CPW lines is utilized. As shown in Fig. 3 (zoomed view), the center strip of a CPW at port 4 is connected across the slotline to the ground. The CPW is easily converted to microstrip line port through a metal via connected between the center strip in the bottom layer to the top microstrip line. As shown in Fig. 6(a), under port excitation, a differential mode is excited at the combined slotline-microstrip cross section D-D . In fact, two differential modes coexist in this cross section, one is the slotline mode, and another one corresponding to mode of the two biplanar slotlines. When power travels from D-D to the port, both differential modes are short-circuited at the T-junction of port 1 where the slot short-ended to ground. At port 4, this short transforms to

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Fig. 10. Full-wave simulated (IE3D MoM) and measured frequency response of the 180 hybrid. (a) In phase power division from the 6 port (port-1) to port-2 and port-3 and return loss of the 6 port. (b) Anti-phase power division from the port (port-4) to port-2 and port-3 and return loss of the port. (c) Return loss of port-2 and port-3. (d) Insertion phase from the port (port-1) to port-2 and port-3. (e) Insertion phase from the port (port-1) to port-2 and port-3. (f) Isolations between port-1 and port-4 and between port-2 and port-3.

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an open circuit looking toward the port, which guarantees a good isolation to port 1. However, the situation is different when one looks towards the right from port 4 (Fig. 3). The excited differential biplanar slotlines mode is the required operation mode, while the slotline mode is parasitic and should be completely suppressed. Ideally, an open circuit should be immediately seen at D-D by the unwanted slotline mode in both directions. Intuitively, this sug-

1

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gests that high-impedance slotlines are required, which can be achieved by simply increasing the slot width. The related parts of the layout in Fig. 3 are redrawn in Fig. 7(a), while their equivalent circuit is shown in Fig. 7(b), where the nonuniform slots are modeled by tandem-connected segments of uniform slotlines [7]. The short-ended nonuniform slots and radial slot stubs are very broad band devices and therefore provide an appropriate open circuit to the unwanted slotline mode. The excited

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Fig. 11. Full-wave simulated (IE3D MoM) and measured balance and isolation of the 180 hybrid. (a) Amplitude and phase imbalance for power division from the 6 port (port 1) to port 2 and port 3. (b) Amplitude and phase imbalance for power division from the port (port 4) to port 2 and port 3.

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differential biplanar slotline modes are then coupled to the microstrip ports 2 and 3 with the required 180 phase difference. It needs to be noticed that the incompletely suppressed slotline modes are potential for radiation. The major potential danger for radiation is through the slot stubs under excitation from the difference port (port 4). From simulation, over 92% of the power is transmitted to the desired mode and the insertion loss due to radiation is below 0.4 dB. Optimization of the structure, especially the slot-mode suppression mechanism, may further reduce the radiation loss. One obvious way to completely suppress the losses arisen from radiation is to use a packaged design, which is often the case in commercial prototypes. However, the added package of the proposed hybrid may generate a potential problem of degraded port isolations. To quantify the effect of radiation on the port isolations in the presence of a package, we have simulated the hybrid for the cases with and without package using the 3-D full-wave simulation software, HFSS. As shown in Fig. 8, the package is modeled with a rectangular metallic enclosure. The distance is tuned from of the bottom of hybrid to wall of the box – (at center frequency), and it is found that the insertion loss is smaller with the packaged design, while the isolations between the ports do not change significantly, except for a small frequency shift. The symmetry of the structure is the possible reason for nonaffected port isolations.

at the center frequency 1.5 GHz. The insertion losses from the port to ports 2 and 3 are 3.6 and 3.4 dB, respectively. The port is mainly due relatively higher insertion loss for the to the microstrip line-CPW transitions and radiation loss. The measured 0.5-dB amplitude bandwidth is 200% and 66% for port division and port division, respectively, as expected (Table I). Fig. 10(d)–(e) shows the full-wave simulated and measured frequency response of insertion phases from the and ports to ports 2 and 3. The phase differences for the outputs at ports 2 and 3 are almost frequency-independent over all the frequencies. Fig. 10(f) shows the isolation of between the and ports and between ports 2 and 3. The isolation is more than 30 dB over the bandwidth of 0.5–2.5 GHz. The measured isolation between ports 2 and 3 is below 13 dB over the bandwidth of 1–2 GHz (one octave). Fig. 11(a) shows the simulated and measured amplitude and phase imbalance performance for power division from the port to ports 2 and 3. A measured maximum amplitude imbalance of 0.6 dB is achieved over a bandwidth extending from 0.5 to 2.5 GHz, and the measured maximum phase imbalance is 2.7 over the same bandwidth. Fig. 11(b) shows the amplitude and phase imbalance for power division from the port to ports 2 and 3. The measured maximum amplitude and phase imbalances are 0.28 dB and 2.6 , respectively. V. CONCLUSION

IV. PROTOTYPE AND MEASUREMENTS The proposed hybrid was implemented on a Roger 4003 mm). The prototype is shown substrate ( in Fig. 9. To measure the hybrid in a 50- system, a 70.7quarter-wave microstrip line was connected to the port (case corresponding to the last row in Table I). The hybrid is measured using standard SMA connectors and a two-port network analyzer by connecting two of the ports while loading the other two with matched loads. Fig. 10(a)–(c) shows the full-wave simulated and measured frequency response for power division from ports 1 and 4 and the return loss at all ports. The experimental results agree well with the simulations. From measurement results, the coupled powers (insertion loss) from the port to port 2 and port 3 are 2.9 and 3.4 dB, respectively,

A novel 180 hybrid has been proposed. The idea is to introduce a fourth port to the conventional Wilkinson divider in replacement of its resistor. The proposed hybrid is implemented in a hybrid microstrip-slotline configuration without requiring complex 3-D structures and requiring only two quarter-wave transmission-line sections. The proposed hybrid exhibits wide isolation, and miniabandwidth, low insertion loss, high turized circuit size. Due to its symmetric configuration, frequency-independent balanced response are achieved, and the measured isolation between sum and difference port is over 30 dB over all frequencies. REFERENCES

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[1] E. J. Wilkinson, “An -way power divider,” IRE Trans. Microw. Theory Tech., vol. 8, no. 6, pp. 116–118, Jun. 1968.

YANG et al.: BROADBAND COMPACT 180 HYBRID DERIVED FROM THE WILKINSON DIVIDER

[2] D. M. Pozar, Microwave Engineerin, 3rd ed. Hoboken, NJ: Wiley, 2004. [3] S. A. Maas, Microwave Mixers, 2nd ed. Norwood, MA: Artech House, 1993. [4] K.-L. Deng and H. Wang, “A miniature broadband pHEMT MMIC balanced distributed doubler,” IEEE Trans. Microw. Theory Tech., vol. MTT-51, no. 4, pp. 1257–1261, Apr. 1968. [5] S. March, “A wideband stripline hybrid ring,” IEEE Trans. Microw. Theory Tech., vol. MTT-16, no. 6, pp. 361–, Jun. 1968. [6] C. H. Ho, L. Fan, and K. Chang, “New uniplanar coplanar waveguide hybrid-ring couplers and magic-T’s,” IEEE Trans. Microw. Theory Tech., vol. 42, no. 12, pp. 2440–2448, Dec. 1994. [7] C. H. Ho, L. Fan, and K. Chang, “Broad-band uniplanar hybrid-ring and branch-line couplers,” IEEE Trans. Microw. Theory Tech., vol. 41, no. 12, pp. 2116–2125, Dec. 1993. [8] K. Chang, Microwave Ring Circuits and Antennas. New York: Wiley, 1996. [9] T. Wang and K. Wu, “Size-reduction and band-broadening design technique of uniplanar hybrid ring coupler using phase inverter for M(H)MIC’s,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 2, pp. 198–206, Feb. 1999. [10] T. T. Mo, Q. Xue, and C. H. Chan, “A broadband compact microstrip rat-race hybrid using a novel CPW inverter,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 1, pp. 161–167, Jan. 2007. [11] M. Aikawa and H. Ogawa, “A new MIC magic-T using coupled slot lines,” IEEE Trans. Microw. Theory Tech., vol. MTT-28, no. 12, pp. 523528–, Jun. 1980. [12] J. P. Kim and W. S. Park, “Novel configurations of planar multilayer magic-T using microstrip-slotline transitions,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 7, pp. 1683–1688, Jul. 2002. [13] K. U-Yen, E. J. Wollack, J. Papapolymerou, and J. Laskar, “A broadband planar magic-T using microstripslotline transitions,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 1, pp. 172–177, Jan. 2008. [14] H. Okabe, C. Caloz, and T. Itoh, “A compact enhanced bandwidth hybrid ring using an artificial lumped-element lefthanded transmission-line section,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 3, pp. 798–804, Mar. 2004. [15] R. K. Settaluri, G. Sundberg, A. Weisshaar, and V. K. Tripathi, “Compact folded line rat-race hybrid couplers,” IEEE Microw. Guided Wave Lett., vol. 10, no. 2, pp. 61–63, Feb. 2000. [16] Y. J. Sung, C. S. Ahn, and Y.-S. Kim, “Size reduction and harmonic suppression of rat-race hybrid coupler using defected ground structure,” IEEE Microw. Wireless Compon. Lett., vol. 14, no. 1, pp. 7–9, Jan. 2004. [17] K. W. Eccleston and S. H. M. Ong, “Compact planar microstripline branch-line and rat-race coupler,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 10, pp. 2119–2125, Oct. 2003. [18] J.-T. Kuo, J.-S. Wu, and Y.-C. Chiou, “Miniaturized rat race coupler with suppression of spurious passband,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 1, pp. 46–48, Jan. 2007. Ning Yang (M’03) received the B.S. degree in electric engineering from Southeast University (SEU), Nanjing, China, and the Ph.D. degree in microwave engineering under a joint program between SEU and the National University of Singapore (NUS) in 2004. He began his career as an Engineer with the Center for Wireless Communications (CWC) in November 2001 and later as an Associate Scientist with the Institute for Infocomm Research (I2R), Singapore, in 2003. From 2005 to 2006, he was with Motorola, Inc., as a Senior RF Engineer engaged in the research and development of emergent RF and antenna technologies for cutting-edge mobile devices. Since October 2006, he has been a Researcher with the École Polytechnique de Montréal, Montréal, QC, Canada. He has authored or coauthored over 60 peer-reviewed technical papers, holds one patent, and had one invention disclosure accepted at Motorola. As one of the key participants, he contributed to the development of V360, V361, V367, and ROKR E8 mobile phones at Motorola. His current research interests include differentially integrated microwave circuits and antennas/arrays, metamaterials, SIW devices, and integrated active RF subsystems. Dr. Yang was the recipient of the Young Scientist Award in the General Assembly’2008 of the International Union of Radio Science (URSI) and the Best Dissertation Award of 2005 by the Ministry of Education, Jiangsu, China. He was a TPC member of EuCAP’2009 and has served as a reviewer for several transactions, journals, and letters.

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Christophe Caloz (S’99–M’03–SM’06–F’10) received the Diplme d’Ingénieur en Électricité and the Ph.D. degree from the École Polytechnique Féderale de Lausanne (EPFL), Lausanne, Switzerland, in 1995 and 2000, respectively. From 2001 to 2004, he was a Postdoctoral Research Engineer with the Microwave Electronics Laboratory, University of California, Los Angeles (UCLA). In June 2004, he joined the École Polytechnique de Montréal, Montréal, QC, Canada, where he is now a Full Professor and a member of the Microwave Research Center Poly-Grames and holds a Canada Research Chair (CRC). He has authored and coauthored 360 technical conference, letter, and journal papers and three books and eight chapters, and he holds several patents. He is a member of the Editorial Board of the International Journal of Numerical Modelling, the International Journal of RF and Microwave Computer-Aided Engineering, the International Journal of Antennas and Propagation, and Metamaterials of the Metamorphose Network of Excellence. His research interests include all fields of theoretical, computational and technological electromagnetics engineering, with strong emphasis on emergent and multidisciplinary topics. Dr. Caloz is a member of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) Technical Coordinating Committee (TCC) MTT-15 and MTT-25, a Speaker of the MTT-15 Speaker Bureau, and the Chair of the Commission D (Electronics and Photonics) of the Canadian Union de Radio Science Internationale (URSI). He was the recipient of the UCLA Chancellors Award for Post-doctoral Research in 2004 and the MTT-S Outstanding Young Engineer Award in 2007.

Ke Wu (M’87–SM’92–F’01) received the B.Sc. degree in radio engineering (with distinction) from the Nanjing Institute of Technology (now Southeast University), Nanjing, China, in 1982, and the D.E.A. and Ph.D. degrees in optics, optoelectronics, and microwave engineering (with distinction) from the Institut National Polytechnique de Grenoble (INPG), Grenoble, France, in 1984 and 1987, respectively. He is a Professor of Electrical Engineering and a Tier-I Canada Research Chair in RF and millimeterwave engineering with the École Polytechnique de Montréal, Montréal, QC, Canada. He holds the first Cheung Kong endowed chair professorship (visiting) at Southeast University, Nanjing, China, the first Sir Yue-Kong Pao chair professorship (visiting) at Ningbo University, and an honorary professorship with Nanjing University of Science and Technology and the City University of Hong Kong, China. He has been the Director of the Poly-Grames Research Center and the founding Director of the Center for Radiofrequency Electronics Research of Quebec (Regroupement stratégique of FRQNT). He has also held Guest and Visiting Professorships with many universities around the world. He has authored or coauthored over 710 refereed papers and a number of books/book chapters and patents. His current research interests involve substrate integrated circuits, antenna arrays, advanced computer-aided design and modeling techniques, and development of low-cost RF and millimeter-wave transceivers and sensors for wireless systems and biomedical applications. He is also interested in the modeling and design of microwave photonic circuits and systems. Dr. Wu is a member of the Electromagnetics Academy, Sigma Xi, and URSI. He is a Fellow of the Canadian Academy of Engineering (CAE) and a Fellow of the Royal Society of Canada (The Canadian Academy of the Sciences and Humanities). He has held key positions in and has served on various panels and international committees including the chair of technical program committees, international steering committees and international conferences/symposia. In particular, he will be the general chair of the 2012 IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium. He has served on the editorial/review boards of many technical journals, transactions, and letters as well as scientific encyclopedias as well as serving as editor or guest editor. He is currently the chair of the joint IEEE chapters of MTTS/APS/LEOS in Montreal. He is an elected IEEE MTT-S Administrative Committee (AdCom) member for 2006–2012 and serves as chair of the IEEE MTT-S Member and Geographic Activities (MGA) Committee. He is an IEEE MTT-S Distinguished Microwave Lecturer from January 2009 to December 2011. He was the recipient of many awards and prizes including the first IEEE MTT-S Outstanding Young Engineer Award, the 2004 Fessenden Medal of the IEEE Canada, and the 2009 Thomas W. Eadie Medal of the Royal Society of Canada.

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Broadband Time-Domain Measurement System for the Characterization of Nonlinear Microwave Devices With Memory Mouhamad Abouchahine, Alaa Saleh, Guillaume Neveux, Tibault Reveyrand, Jean-Pierre Teyssier, Danielle Rousset, Denis Barataud, and Jean-Michel Nebus

Abstract—This paper describes a novel fully calibrated four channel broadband time-domain measurement system for the characterization of nonlinear microwave devices with memory. The hardware architecture of the proposed time-domain measurement system is based on a wideband sub-sampling principle. The sampling heads work at a high strobe signal repetition frequency that can be tuned between 357–536 MHz. We achieve a 40-GHz RF frequency bandwidth and a 160-MHz IF bandwidth. This instrument enables the measurement of carrier and envelope waveforms at both ports of nonlinear microwave devices driven by broadband modulated multicarriers. The test-bench is applied to the cross modulation characterization of a 15-W GaN HEMT CREE -band power amplifier with memory due to different biasing circuit configurations. The amplifier under test is driven by the sum of a large-signal modulated carrier (double-sideband amplitude modulation at 3.6 GHz) and a small single-tone signal at a 110-MHz offset frequency. Our significant contribution comes from the capability of the measurement system to record the time-domain waveforms of several nonadjacent modulated signals on a similar time equivalent scale for different cases of memory effects of the power amplifier under test. Index Terms—Broadband sub-sampling, GaN power amplifiers, memory effects, nonlinear microwave circuits, time-domain measurements.

I. INTRODUCTION

IDEBAND communication systems are increasingly used to target multistandard multiband applications. In these communication systems, various architecture design solutions, as well as different modulation standards and multiple access techniques can be implemented, as seen in [1] and [2]. In that context, the characterization of nonlinear devices such as power amplifiers driven by multiple nonadjacent signals is of interest.

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Manuscript received June 18, 2009; revised December 20, 2009. First published March 11, 2010; current version published April 14, 2010. This work was performed in the context of the ELOPSYS cluster’s Lipsys Project supported by the “Ministère de l’économie des finances et de l’emploi Direction Générale des Entreprises” under Contract 06.2.93.0716. The authors are with the XLIM Laboratory, UMR 6172, University of Limoges, 87060 Limoges Cedex, France (e-mail: [email protected]; [email protected]; [email protected]; tibault. [email protected]; [email protected]; [email protected]; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042503

The work proposed in this paper focuses on wideband timedomain measurement technique and setup based on the broadband harmonic sub-sampling principle. Recently, different time-domain measurement systems have been proposed to target the wideband characterization of nonlinear microwave devices. The need for a good tradeoff between dynamic range and frequency bandwidth has led to the use of microwave transition analyzers [3], digital storage oscilloscopes [4], [5], or large-signal network analyzers [6], [7]. Large-signal network-analyzer measurements based on the harmonic sub-sampling principle performed at 20 MHz have demonstrated great interest for nonlinear microwave device characterization. Nevertheless, significant complexity arises when measurements of signals having envelope bandwidths wider than 10 MHz are required. This is due to low-frequency repetition rate of the strobe signal. Time-domain measurements of wideband multisines requiring complex processing techniques and specific control of the strobe frequency have been proposed in [7] and [8]. The complexity of these techniques is due to the hardware frequency limitation of sampling heads. In [9], we proposed a new architecture based on the use of sampling heads working with a high-repetition frequency strobe signal (from 350 to 540 MHz) that enables wideband time-domain measurements. 60-MHz bandwidth have been yet performed and demonstrated in [9]. This paper presents an extended description of the main characteristics of the broadband sampler based instrument, such as gain conversion versus IF and RF frequencies. We report up to 110-MHz envelope bandwidth measurements. We also focus on time-domain envelope waveform measurements applied to the characterization of a power amplifier exhibiting memory effects depending on its biasing circuit configuration. Additional insights are mentioned to prove the capability of the setup to perform simultaneous time-domain envelope waveforms at different carriers. To conclude, we mention the potential use of the measurement tool for behavioral modeling of wideband nonlinear devices with memory. II. DESCRIPTION OF THE MEASUREMENT SYSTEM A. Hardware Configuration for Wideband Measurements The proposed instrument is based on the harmonic sub-sampling principle, which enables the downconversion of microwave spectra into IF spectra. The downconvertor is the key component of the instrument.

0018-9480/$26.00 © 2010 IEEE

ABOUCHAHINE et al.: BROADBAND TIME-DOMAIN MEASUREMENT SYSTEM

Fig. 1. Numerical example of a broadband sub-sampling principle applied to a two-tone RF signal.

With this instrument, measurements of voltage and current time-domain waveforms are performed at both ports of devices by capturing the whole wave spectra in a single shot. In the following, it is applied to a 50- matched power amplifier. Current and voltage waveform measurements reported in this paper are linked by 50- impedance. The RF input signal is mixed with a strobe signal, which is a repetitive pulse, as shown in Fig. 1 for a two-tone input RF signal. The envelope period of the two-tone input RF signal, the RF carrier frequency, and the sampling frequency driving the , , and , in comb generator are, respectively, noted Fig. 1. The RF frequency bandwidth is directly linked to the duration of the pulse ( in Fig. 1) and in particular to the falling time of the pulse. The mixing principle results in an output spectrum that requires a filtering of aliasing products, as depicted in Fig. 2, in order to obtain an IF spectrum that is a translated and compressed image of the RF spectrum. It can be observed in Fig. 2 that only the mixing product of the RF signal with in Figs. 1 the fourth component of the strobe signal ( and 2) can be useful to extract an IF image of the broadband two-tone RF signal. The period of the pulse repetition rate determines the cutoff frequencies of the IF filter. This principle requires the knowledge of the RF spectrum frequencies to ensure a unique relationship between the original periodic RF signal and the measured IF signal. The filtered intermediate signal is a two-tone signal (at and ) that corresponds to an ampliequal to 60 MHz. tude modulation at the frequency

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Fig. 2. Simplified block diagram of a channel based on the sub-sampling principle for a large bandwidth two-tone RF signal.

The value of the cutoff frequency of the low-pass filter seen in Fig. 2 in commercially available instruments is currently limited to 10 or 20 MHz. Fast analog to digital converters (ADCs) with a high dynamic range are used and are very well suited for continuous wave (CW) measurements. Nevertheless, the sub-sampling principle, when “naturally” applied to measure multitone signals, as in [5] and [8], suffers from a significant drawback due to IF bandwidth limitation. Different techniques can be used to perform measurements of broadband RF signals, but they are not based on the “natural” unscrambled translation/compression of the RF spectrum [8]. Therefore, they are quite difficult to implement. The benefits of a high-repetition frequency strobe signal are sketched in Fig. 2 in the case of two-tone measurements. Fig. 2 shows a “natural” unscrambled translation and compression process of the RF input spectrum. In the work presented hereafter, measurements of broadband modulated signals are more easily and straightforwardly performed by the use of such a kind of strobe signal with a high-frequency repetition rate. For that purpose, sampler parts of a VNA have been used and modified to build a new sampling unit configuration, as shown in Fig. 3. We built a 160-MHz bandwidth IF stage for signal amplification, antialiasing filtering, and for adjusting the signal to the full scale of ADCs. The IF stage includes two (dc–2 GHz) 30-dB gain monolithic amplifiers and two (dc–160 MHz) ceramic low-pass filters, as indicated in Fig. 3. We obtained good matching conditions and ensured electrical stability and an appropriate signal level to feed ADC circuits.

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Fig. 3. Modified sampling head for broadband measurements.

Fig. 5. High-level block diagram of the test bench used to perform gain conversion measurements.

Fig. 4. High-level block diagram of the broadband time-domain measurement setup. Fig. 6. Conversion gain of the four sampling heads versus the IF frequency.

A low phase-noise source with a tunable frequency in the 357–536-MHz range drives an amplifier and a comb generator based on the use of a step recovery diode. This assembly provides narrow pulses with a high repetition rate and is used to generate the strobe signal of the sampling head. The modified sampling heads driven by the same low phasenoise source and comb generator have been assembled to build a four-channel measurement instrument. A four-channel 1-Gs/ s–8-bit sampling scope has been used for data acquisition. The high-level block diagram described in Fig. 4 is fully computer controlled for data acquisition and signal processing (such as fast Fourier transform (FFT) and error correction matrix computations). The gain conversion of the four synchronized sub-sampling channels (sampling heads with IF circuits) has been characterized versus the IF output frequency. For that purpose, we used the test bench described in Fig. 5. A microwave CW RF source is used to vary the CW RF signal driving the four modified sampling heads. The magnitude and the frequency of this RF source is variable. The strobe signal can also be adjusted in frequency thanks to an external low phase-noise source and a comb generator.

The gain conversion is defined as the following ratio: (1) The input RF power is measured at the output of 6-dB couplers with a calibrated power meter and the output IF power is measured at the output of the new IF circuit of the modified sampling heads by using a four-channel 1-GS/s–8-bit sampling scope. Measurement results of the four synchronized sub-sampling channels versus the IF output frequency is shown in Fig. 6. A 250-MHz bandwidth is obtained and is compliant with theory when a 500-MHz strobe signal is applied. The dynamic range of the built-in measurement system is measured and plotted in Fig. 7. The dynamic range is estimated at 50 dB. The dynamic range could be drastically improved by using 14-bit ADCs instead of our sampling scope. The measured gain conversion of the four synchronized subsampling channels (sampling heads with IF circuits) versus the RF input frequency is shown in Fig. 8.

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Fig. 9. Spectrum shape of the multisine phase reference signal.

Fig. 7. Measured dynamic range of the four sub-sampling channels.

Fig. 8. Measured conversion gain of the four sub-sampling channels (sampling heads with IF circuits).

B. System Calibration Procedure The purpose of the system calibration procedure is to determine a matrix of error terms linking raw data provided by scope measurement channels with incident and scattered power waves at the device-under-test ports. The error correction matrix is expressed as follows [2]:

(2) where denotes frequency index. For the first step, a classical short-open-load-thru (SOLT) caland ibration is made to determine all error terms, except . Secondly, a power calibration is done at a relatively high 30-dBm power by using a power sensor and a calibrated 20-dB coefficients are deterattenuator. At the end of this step, the mined. The relative error coefficients , , , , , , and and the absolute error terms are determined by sweeping the frequency of the CW microwave source. After that, a phase calibration is performed in order to detercoefficients. For that purpose, we use a commermine the cially available vector signal generator (VSG), which provides a multisine signal with a maximum bandwidth of 120 MHz. Our standard phase reference signal is built using the calibrated VSG with two subsets of multisine with a 1-MHz tone spacing, and that are spaced 110 MHz away from each other. The shape of this signal spectrum is shown in Fig. 9.

Fig. 10. High-level block diagram of the broadband time-domain measurement setup.

Measurements shown in Section III do not take into account harmonics of carriers, but multiple intermodulation products. Therefore, in this study, we achieved an IF phase calibration so that the group delays of the measurement channels are corrected during the measurements. III. MEASUREMENT RESULTS In this section, we apply the proposed instrument to the measurements of time-domain waveforms of several nonadjacent modulated signals on a similar time equivalent scale for two different cases of memory effects exhibited by the power amplifier under test. The high-level block diagram of the setup is described in Fig. 10. In this setup, the microwave source is replaced by a 120-MHZ–6-GHz VSG. We measured a 15-W–16-dB gain -band 50- matched GaN HEMT CREE power amplifier. The demonstration board of the power amplifier is shown in Fig. 11. First, the “initial” circuit was characterized. Second, 1- and 33- F capacitances connected in the drain bias circuit were removed. Although this modification does not impact the quasistatic characteristics of the power amplifier, it may introduce low-frequency memory effects when the device is driven by a large level modulated signal. Large capacitances of the designed bias circuits have been removed for the study in further works

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Fig. 11. Demonstration board of the amplifier and bias circuit modification.

Fig. 14. Corrected input power spectrum for P (f ) = 31:9 dBm (compression zone).

Fig. 12. Dynamic AM/AM characteristics at 31-dBm input average power (compression zone).

Fig. 15. Corrected output power spectrum for pression zone).

P (f

:

) = 31 9 dBm (com-

B. Time-Domain Waveform Measurements of Several Nonadjacent Modulated Signals Fig. 13. Dynamic AM/PM characteristics at 31-dBm input average power (compression zone).

of the behavior of amplifiers targeted to be used in envelope tracking techniques [10], [11]. A. Dynamic Power Characteristics of the GaN HEMT CREE Power Amplifier First, we used the test-bench to extract the dynamic AM/AM and AM/PM characteristics of the 50- matched GaN HEMT CREE power amplifier. Dynamic AM/AM and AM/PM characteristics recorded with a 1-MHz double-sideband amplitude modulation at a 3.655-GHz carrier frequency are given in Figs. 12 and 13. In both cases, the bias conditions are V, V, and mA. Differences observed between AM/AM and AM/PM measurement results prove the presence of low-frequency memory for the modified biasing circuit. This is clearly indicated by the hysteresis shapes observed in Figs. 11 and 12. The main objective of the work reported here is to demonstrate the capability of the test-bench to characterize the impact of memory effects in the power amplifiers driven by modulated signals.

The proposed measurement system is then applied to the time-domain waveform measurements of several nonadjacent modulated signals. The power amplifier with initial and modified drain bias circuit configurations was driven simultaneously by two signals: a large-signal amplitude modulated carrier (31,6% modulation index) at the frequency and a low-level CW nonmodulated carrier at an offset : GHz, GHz, and frequency MHz. Figs. 14 and 15 represent, respectively, the measured and corrected spectra at the input and output of the amplifier when it is driven in its nonlinear region (compression zone). Due to the nonlinear behavior of the amplifier, the amplitude is transferred to the low-level modulation at the frequency CW nonmodulated carrier. It can be clearly observed in the frequency domain. It is a challenge to observe such phenomenon in the time domain. The setup presented in Fig. 10 has the capability to extract time-domain waveforms of nonadjacent signals and on a similar time equivalent scale. at Fig. 16 shows an image of the time equivalent measured . output current waveforms of the modulated signal at Fig. 17 shows an image of the time equivalent measured output current waveforms of the cross-modulated low-level GHz. carrier at Such time-domain curves recorded at high power driving the amplifier under test provide a visual inspection of the transferred

ABOUCHAHINE et al.: BROADBAND TIME-DOMAIN MEASUREMENT SYSTEM

Fig. 16. Time-domain current waveform around f (compression zone).

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at P (f ) = 31:9 dBm Fig. 19. Phase of the modulation index versus average input power.

Fig. 17. Time-domain current waveform around f (compression zone).

at P (f ) = 31:9 dBm

Fig. 20. Output envelope current waveform of the low-level transferred modulated tone at f versus the equivalent time and four different average input powers.

Fig. 18. Magnitude of the modulation index versus average input power.

modulation to the low-level offset frequency. Two specific criteria can be defined to evaluate this transferred modulation: amplitude and phase transfer modulation indices of the low-level offset carrier at

(3) Fig. 21. Output envelope current waveform of the modulated signal at f versus the equivalent time and four different average input powers.

(4) where denotes the magnitude of the envelope and denotes the phase of the envelope. Fig. 18 shows the magnitude of the transfer modulation index defined in (3) versus the input power driving the device for the amplifier with the initial and modified bias circuit configurations. Fig. 19 shows the variations of the phase transfer modulation index defined in (4) versus the input power driving the device for the amplifier with the initial and modified bias circuit configurations.

Transfer modulation indices remain at zero when the amplifier works in its linear region and a variation appears when the amplifier is driven into its nonlinear operation regime. This variation does not appear for the same input power when the amplifier works with its initial or modified bias circuit configurations. Fig. 20 shows the measured time-domain envelope waveforms of the large-signal modulated carrier. Fig. 21 presents the measured time-domain envelope waveforms of the low-level offset tone. These curves are plotted with a similar time scale and for four different average input powers.

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Further investigations concern the improvement of the dynamic range of this system, which is limited here to 50 dB. Despite the problem of perfectible signal-to-noise ratio (SNR), this characterization setup has proven to be a valuable tool to aid in characterizing power amplifiers driven by nonadjacent multiple signals. It can be applied to other devices like LNAs. Finally, the measurement tool is also expected to be useful for the behavioral modeling of nonlinear devices with memory [12]. ACKNOWLEDGMENT Fig. 22. Comparison of the envelope output current waveforms of the modulated signal at f and the low-level tone at f for a 35-dBm average input power and for two bias circuit configurations.

The authors wish to acknowledge W. Rebernack, THALES, Colombes, France, for his helpful technical assistance and the Délégation Générale pour l’armement for its technical expertise. REFERENCES

Fig. 23. Comparison of the envelope output current waveforms of the modulated signal at f and the low-level tone at f for a 35-dBm average input power and for two bias circuit configurations.

These curves are extracted from measurements of time-domain envelope waveforms at the output of the modified power amplifier. Curves of Figs. 20 and 21 again provide a visual inspection of the transfer modulation phenomenon for a wide frequency offset of 120 MHz. These results prove the capability of the instrument to measure microwave broadband time-domain waveforms (envelope and carriers components) at both ports of nonlinear devices. The modifications of the envelope output current due to the presence of weak memory effects (initial bias circuit) or more significant memory effects (modified bias circuit) are shown in Figs. 22 and 23 after applying a time alignment process [13]. Although the different shapes of the output current wavemeasured in the cases of the initial and modforms around ified bias circuit configurations do not show the presence of a large amount of memory effects, they prove an interesting capability of the proposed setup. IV. CONCLUSION In this paper, we have presented a broadband calibrated fourchannel time-domain measurement system for the characterization of nonlinear devices like power amplifiers. We have proposed a novel hardware architecture of sampling heads and IF circuits to perform broadband time-domain measurements of modulated signals at both ports of the power amplifiers.

[1] M. Sanduleanu, M. Vidojkovic, V. Vidojkovic, A. Van Roermund, and A. Tasic, “Receiver front-end circuits for future generations of wireless communications,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 55, no. 4, pp. 299–303, Apr. 2008. [2] M. Brandolini and F. Svelto, “Reconfigurable Si RF receiver front-ends for multi-standard radios,” in Proc. 1st Eur. Wireless Technol. Conf., Oct. 2008, pp. 33–36. [3] C. J. Clark, G. Chrisikos, M. S. Muha, A. A. Moulthrop, and C. P. Silva, “Time-domain envelope measurement technique with application to wideband power amplifier modeling,” IEEE Trans. Microw. Theory Tech., vol. 46, no. 12, pp. 2531–2540, Dec. 1998. [4] F. Macraigne, T. Reveyrand, C. Maziere, D. Barataud, J. M. Nebus, R. Quere, and A. Mallet, “A fully calibrated four channels time domain RF envelope measurement system for the envelope characterization of nonlinear devices in a load-pull environment,” in Eur. Microw. Conf., Oct. 4–6, 2005, vol. 2, pp. 729–732. [5] D. J. Williams, J. Leckey, and P. J. Tasker, “Envelope domain analysis of measured time domain voltage and current waveforms provide for improved understanding of factors effecting linearity,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2003, pp. 1411–1414. [6] M. El Yaagoubi, G. Neveux, D. Barataud, T. Reveyrand, J.-M. Nebus, F. Verbeyst, F. Gizard, and J. Puech, “Time-domain calibrated measurements of wideband multisines using a large-signal network analyzer,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 5, pt. 1, pp. 1180–1192, May 2008. [7] W. Van Moer and Y. Rolain, “An improved broadband conversion scheme for the large signal network analyzer,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 12–17, 2005, pp. 1501–1504. [8] M. El Yaagoubi, G. Neveux, D. Barataud, J. M. Nebus, and J. Verspecht, “Accurate phase measurements of broadband multitone signals using a specific configuration of a large signal network analyzer,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2006, pp. 1448–1451. [9] M. Abouchahine, A. Saleh, G. Neveux, T. Reveyrand, J. P. Teyssier, D. Barataud, and J. M. Nebus, “Broadband time domain measurement system applied to the characterization of cross modulation in nonlinear microwave devices,” in IEEE MTT-S Int. Microw. Symp. Dig., Boston, MA, Jun. 2009, pp. 1201–1204, Art. ID TH2D-2. [10] A. Zhu, P. Draxler, C. Hsia, T. Brazil, D. Kimball, and P. Asbeck, “Digital predistortion for envelope-tracking power amplifiers using decomposed piecewise Volterra series,” IEEE Trans. Microw. Theory Tech., vol. 56, pp. 2237–2247, Oct. 2008. [11] L. Bacque, P. Bouysse, W. Rebernak, C. Poumier, L. Lapierre, G. Nanfack-Nkondem, G. Neveux, D. Barataud, and R. Quere, “High current—High speed dynamic bias control system applied to a 100-W wideband push–pull amplifier,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 12, pp. 2798–2807, Dec. 2008. [12] F. Macraigne, T. Reveyrand, G. Neveux, D. Barataud, J. M. Nebus, A. Soury, and E. Ngoya, “Time-domain envelope measurements for characterization and behavioral modeling of nonlinear devices with memory,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 8, pp. 3219–3226, Aug. 2006. [13] G. Nanfack-Nkondem, J. Santiago, G. Neveux, D. Barataud, J. M. Collantes, J. Portilla, C. J. M. Nebus, and A. MAllet, “Characterization of Galileo signal correlation losses caused by non linear power amplification with memory,” in IEEE MTT-S Int. Microw. Symp. Dig., Atlanta, GA, Jun. 2008, pp. 1581–1584.

ABOUCHAHINE et al.: BROADBAND TIME-DOMAIN MEASUREMENT SYSTEM

Mouhamad Abouchahine was born in Almanara, Lebanon, on May 12, 1983. He is currently working toward the Ph.D. degree in electronics at the University of Limoges, Limoges, France. His research interests include the wideband timedomain characterization of RF and microwave nonlinear components.

Alaa Saleh was born in Saida. Lebanon, on August 23, 1983. He is currently working toward the Ph.D. degree in electronics at the University of Limoges, Limoges, France. His research interests include high-frequency transistor modeling for high-speed digital circuit applications, as well as for microwave samplers.

Guillaume Neveux was born in Civray, France, in 1976. He received the Diplôme d’Etudes Approfondies (DEA) degree from the Université Paris 11, Orsay, France, in 2000, and the Ph.D. degree in electronics and communications from the National Superior Institute of Telecommunications (ENST), Paris, France, in 2003. Since 2004, he has been with the Instrumentation Group, XLIM Laboratory, University of Limoges, Limoges, France. His research interests include nonlinear measurement with LSNA and the study of RF sampling systems.

Tibault Reveyrand was born in Paris, France, on September 20, 1974. He received the Ph.D. degree from the University of Limoges, Limoges, France, in 2002. From 2002 to 2004, he was a Post-Doctoral Scientist with the CNES (French Space Agency). In 2005, he became a Contractual CNRS Engineer with XLIM Laboratory (formerly IRCOM), Limoges, France. His research interests include the characterization and modeling of RF and microwave nonlinear components. Dr. Reveyrand was the recipient of the European GAAS 2002 Best Paper Award.

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Jean-Pierre Teyssier was born in Brive, France, in 1963. Since 1990, he has been with IRCOM/XLIM Laboratory, University of Limoges, Limoges, France. He presented his doctoral thesis in 1994, the subject of which concerned pulsed I(V) and pulsed S -parameters for nonlinear characterization of microwave active devices. He has been involved in the design of measurement systems and instrumentation for microwave nonlinear investigations with an emphasis on time-domain pulsed large-signal characterization of transistors. For many years, he and his students have been frequent contributors to ARFTG papers. Mr. Teyssier is currently a member of ARFTG ExCom, responsible for workshop organization.

Danielle Rousset received the Ph.D. degree from the University of Limoges, Limoges, France, in 1976. From 1974 to 1981, she was an Assistant Professor with the University of Alger, Alger, Algeria. Since 1982, she has been with the Instrumentation Group, XLIM Laboratory, University of Limoges. Her research interests concern the study of sampling techniques.

Denis Barataud was born in Saint-Junien, France, in 1970. He received the Engineer’s degree from the Ecole Nationale Supérieure de Télécommunications de Bretagne, Bretagne, France, in 1994, and the Ph.D. Degree in electronics from the University of Limoges, Limoges, France, in 1998. From 1998 to 1999, he was a Postdoctoral Scientist with the Microwave Laboratory, CNES, Toulouse, France. Since 2000, he has been with the XLIM (formerly IRCOM) Laboratory, University of Limoges, where in 2001 he became an Assistant Professor. His research interests include the development of time-domain equipment and techniques for the characterization of nonlinear devices.

Jean-Michel Nebus was born in Bourganeuf, France, in 1963. He received the Ph.D. degree in electronics from the University of Limoges, Limoges, France in 1988. He was a Project Engineer with Alcatel Space Industries, Toulouse, France. He is currently a Professor with the XLIM Laboratory, University of Limoges. His main research interest is nonlinear microwave device characterization and design.

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Measuring and Reporting High Quality Factors of Inductors Using Vector Network Analyzers William B. Kuhn, Senior Member, IEEE, and Adam P. Boutz, Member, IEEE

Abstract—Accurate measurement of high quality factors in invalues in the range of 30 ductors is a challenging task. While and below can be assessed using network analyzers with standard calibration techniques, reporting values of 50 or higher demands careful consideration of the type of calibrations used, the accuracy of the instrumentation and associated reference standards, and of the effects of the testing structures involved. This paper examines the accuracy of network analyzers operating in the VHF through -band range with short-open-load calibrations, and shows that these common instruments can provide accurate measurements up to several hundred or more, but only if special care and methods are used. Index Terms—Accuracy, inductors, quality factor, resonant circuits.

which gives the same result as (1), if and only if the inductor has no parasitic capacitance. If parasitic capacitance is present, then (1) goes to zero at the inductor’s self-resonant frequency, leading to misleading (and unhelpful) data for resonant circuit designs [1]. Nevertheless, (1) is typically quoted, and we will use it in portions of this paper, with the understanding that it gives pessimistic results for circuit performance when operating close to self-resonance. For operating close to an inductor’s self-resonant frequency or when using resonance techniques to measure , the fundamental definition and its related forms in terms of resonant-circuit bandwidth versus center frequency should be used as follows: (3)

I. INTRODUCTION

(2)

Reported peak inductor quality factors have ranged from less than 10 in early RF integrated circuits (RFICs) [2], [3], to 30 or higher in some silicon-on-insulator processes [1]. Still higher values are possible if microelectromechanical (MEMs) techniques are employed [4] or if hybrid approaches are adopted where critical inductors are moved off-chip to printed circuit boards or low-temperature co-fired ceramic (LTCC) substrates. In such cases, ’s of up to 100 or higher are potentially obtainable and, indeed, have been reported [5]. values in the range of 50 or higher, however, Reporting requires more attention to the measurement techniques, equipment limitations, and quantification of error sources than most researchers have acknowledged. In this paper, we examine these accuracy issues in detail and present measurement techniques for assessing ’s of 50 or higher, with realistic precision. Emphasis is placed on adapting these techniques to use with vector network analyzer (VNA) equipment, since this is the instrument of choice for most practicing RF engineers. By quantifying the typical performance of VNAs in different regions of the Smith chart, we show that ’s from 50 to several hundred or more can be measured and reliably reported to two significant digits, without extraordinary equipment investments and setups.

Manuscript received July 15, 2009; revised January 15, 2010. First published March 11, 2010; current version published April 14, 2010. This work was supported in part under a contract by Honeywell Federal Manufacturing and Technologies’ Kansas City Plant and Sandia National Laboratories. W. B. Kuhn is with the Department of Electrical and Computer Engineering, Kansas State University, Manhattan, KS 66506 USA (e-mail: [email protected]). A. P. Boutz was with the Department of Electrical and Computer Engineering, Kansas State University, Manhattan, KS 66506 USA. He is now with Lockheed-Martin MS2, Eagan, MN 55121 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042843

II. MEASUREMENT LIMITATIONS OF VNAS Fig. 1 shows a typical one-port measurement of a highinductor. At the marker frequency of 500 MHz, the measured , implying impedance value is displayed as of , based on (1). However, when a reporting this value, the third and fourth significant digits are almost certainly irrelevant and even the second significant digit should be questioned, since network analyzers have significant limitations on accuracy of the underlying reflection coefficient (gamma) being measured. These limitations make the displayed impedance values subject to significant accuracy

ROM THE dawn of radio and electronics, inductors have played a crucial role in circuit design, yet high-quality inductors remain difficult to realize, especially as modern technologies attempt to reduce product size. Real-world inductors have significant series resistance and parallel capacitance that limit their lower and upper frequencies of operation, respectively. Series resistance, in particular, has a strong influence on the performance of circuits in which the inductor is used and is a problem at all frequencies. This parameter is typically quantified in terms of the inductor’s quality factor , given as the ratio of the reactive part of the impedance to the resistive part as follows:

F

(1) More fundamentally, is defined in terms of the peak energy stored divided by the energy dissipated per cycle

0018-9480/$26.00 © 2010 IEEE

KUHN AND BOUTZ: MEASURING AND REPORTING HIGH QUALITY FACTORS OF INDUCTORS USING VNAs

Fig. 1. Typical measurement of a high-

Q inductor.

Fig. 3.

Fig. 2.

Q contours plotted on a Smith chart.

limitations—especially when measuring impedances near the outer boundary of the Smith chart. For example, a typical VNA may be specified to have a gamma magnitude uncertainty on the order of 0.01 or 1% when measuring gamma magnitudes near one at UHF frequencies [6]. This uncertainty can increase to as high as 1.5% to 3% at higher frequencies, even after careful calibration with the latest instruments [7]. Such uncertainties can easily translate into errors of 50%–100% or more in . A. Sensitivity of

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Q versus 0 for best-case measurement (

0 = 90

).

Fig. 3 plots versus gamma from (4) for the case of highinductors with measured gamma values near the point for gamma magnitudes in the range of 0.9 to 0.999. From this curve, it is clear that sensitivity to errors increases and that an accuracy of significantly dramatically at high better than 1% is required to measure a of 100. For example, (which is apif the VNA gamma magnitude accuracy is proximately two times better than the stated accuracy of a typof 0.99 could imply a anyical instrument), a measured where from 66 to 200. Alternatively, we can use (4) to examine what accuracy on gamma is required to quote to two significant digits. Solving in terms of yields for (5) Taking the series expansion of the first term and deleting higher order terms results in the approximate formula (6)

Accuracy to Gamma Errors

As with other quantities such as gain and noise figure, contours of can be plotted on a Smith chart. An example is shown in Fig. 2 for the definition of in (1). As increases, the contours move toward the outer boundary of the chart. In addition, and points. This all values converge at the implies that values will be most accurate when the angle of gamma is close to 90 degrees. In particular, the most accurate region for measuring high , according to the definition of (1), . is near the point Looking at this best-case point on the chart , we and from can find the relationship between (4)

which is accurate to three significant digits for . With (6), we can see that to quote a value of of 100 or higher to two significant digits requires an extraordinary accuracy on (i.e., to imply that gamma. For example, to quote lies between 105–115) requires knowing gamma to within the range of 0.9905–0.9909 or 0.0002. This is 50 times better than the stated accuracy. Indeed, for higher ’s or for inductors with values significantly away from the optimal point on the , the accuracy requirement is even more chart at stringent—and implausible. B. Calibration Methods The type of calibration and the calibration standards used can have a significant impact on the accuracy of measurements. For low-frequency analyzers such as the HP/Agilent 8753 series,

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TABLE I GAMMA MAGNITUDES/PHASES (IN DEGREES) MEASURED ON MULTIPLE NETWORK ANALYZERS, AFTER USING PRECISION AND DEGRADED CALIBRATION STANDARDS (SEE TEXT AND FIG. 4)

Fig. 4. Measurement of Line-1 after calibrating with HP85032 SOL standards shown.

short-open-load-thru (SOLT) calibrations are the only type supported. Indeed, even for other analyzers, SOLT calibration is by far the most common method used [8]. For these reasons, we concentrate on this technique in the sections below. For higher frequency use, analyzers with four-port samplers typically offer additional methods such as thru-reflect-line (TRL), line-reflect-match (LRM), and line-reflect-reflect-match (LRRM) [8]. In addition, advanced techniques that move calibration standards on-chip can increase accuracy [8], [9]. A thorough discussion of these methods is beyond the scope of this paper. However, specifications of modern analyzers [7], research on calibration accuracy [10], and the strong sensitivity of to gamma (Fig. 3) suggest that, even with these approaches, reporting ’s in the range of 50 or higher demands a careful assessment of error sources and resulting uncertainty. C. Typical Versus Stated Accuracy The typical accuracy of instruments may be better than the guaranteed specifications given by a manufacturer. Indeed, assuming one has correctly entered calibration-parasitic data into a VNA and the calibration standards used are of high quality, then remeasurement of the standards after calibration should yield very precise results near the short, open, and load (SOL) standards typically used for lower frequency VNAs. At other locations on the Smith chart, the errors can be expected to grow. For the assessments below, exploration of this issue consisted of presenting the analyzer with impedances that are typical of inductors with high . This was achieved by measuring high-

quality shorted transmission lines. One of these lines (Line-1), shown in Fig. 4, was created from a male-N to male-N adapter with a female short placed at the end. The other (Line-2) consisted of an N-to-SMA adapter, a male–male SMA barrel, and a female SMA short. Line-2 was somewhat longer than Line-1 to provide larger inductive impedances at a given frequency and due to smaller diameters and higher has a lower effective adapter losses. The results are shown in Table I. The first three entries in each cell of the table are for two different HP8753C instruments, each with HP85046A test-sets, and one HP8753E with integrated test-set, respectively. Each of the analyzers was stabilized for two hours and then aligned with an HP85032 calibration kit, with filtering and averaging enabled. The last two entries of each cell are for one of the HP8753C units and for the HP8753E, both using a degraded load standard during calibration (see Section II-D below). At 1 GHz and below, the worst-case error in gamma magnitude is 0.0007 (0.07%) when remeasuring the short and open reference impedances after precision calibration. This high accuracy relative to the guaranteed performance of around 1% at 1 GHz is expected, since the impedances measured are the same as those used for the calibration. Phase variations relative to the nominal phases that result from the standard’s parasitics are better than 0.2 degrees up to 1 GHz and are ignored since they are not strong factors in assessing . At 3 GHz, the worst-case error magnitude increases to 0.0026, which is also approximately one order of magnitude better than guaranteed performance specifications. For the region of the chart that represents high- inductances (assessed in the Line-1 and Line-2 columns), the results are more difficult to interpret, but the uncertainty suggested by

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the variability between instruments is clearly higher. Even for the case of a single instrument, the errors can be seen to be higher. For example, for the precision calibration cases (first three entries of each cell), the Shorted Line-1 column shows the magnitude of the reflection coefficient is monotonically decreasing with frequency up to 300 MHz for the HP8753C units and through 1 GHz for the HP8753E. This is in keeping with the expected increasing losses with frequency for a transmission line. However, the jump from 0.9976 at 300 MHz to 0.9997 at 1 GHz for the second HP8753C clearly indicates an error on the order of 0.002 (0.2%) or higher. For the HP8753E, as the frequency increases from 1 to 3 GHz, the implied error is of the order of 0.006 (0.6%) or higher due to the increase in gamma from 0.9943 to the clearly incorrect value of 1.0004. Examining the variation between instruments suggests even higher uncertainties. For example, at 1 GHz, the Line-1 column shows a disagreement of more than 0.005 ( 0.5%) within the inductive region at 1 GHz. Thus, in summary, the calibration verification tests indicate that the actual uncertainty in measurements can be up to 0.5% in the region of the chart that represents inductances. At this level of error, (4) shows that an inductor with an actual of 100 may measure anywhere from 67 to 200, even with this best-case calibration. D. Effects of Imperfect Load Standards and Cables The results above represent a best-case example, since they are based on high-precision references (standards) provided in connectorized calibration kits (cal-kits). For measurements made on an inductor using interconnecting cables, probes, and an imperfect calibration substrate, the measurements will be degraded by additional error sources. Cable impedance mismatch and imperfect calibration substrate impedances in particular can be expected to lead to significant degradation in accuracy above the 0.2%–0.5% uncertainties found above. To assess this issue, the precision load standard was replaced with a Pasternack SM4226 N-to-SMA adapter terminated in a Minicircuits STRM-50 SMA load during calibration of the instruments. The impedance of this load ranged from 49.9 0.10 at 30 MHz to 51.2 0.51 at 1 GHz, and 48.6 1.47 at 3 GHz. These impedances correspond to return losses of 57, 38, and 34 dB, respectively. Thus, they represent an imperfect but still high-quality measurement setup. Following calibration using this degraded standard, measurements of the short and open standards and of the two lines were conducted and are recorded in the last two entries in each cell of Table I (the first done on an HP8753C and the second with the HP8753E). Studying this data, we conclude that errors in gamma magnitude increase dramatically with load-standard errors and can be as high as 2%-4% at 1–3 GHz, respectively. As a graphic example of these effects on measured , Fig. 5 shows the precision and degraded calibration results from zero to 1 GHz. For the precision case using the cal-kit load stanat dard, the displayed data indicates a of 1 GHz. For the degraded load-standard case, the suggested is . Clearly, the second result is far less accurate, as evidenced by the imperfect tracking of the Smith chart’s outer circle boundary.

Fig. 5. Measurement of shorted line using precision (top) versus degraded (bottom) calibration load standards.

E. One-Port Versus Two-Port Measurements While it has been shown that a multiport measurement with a network analyzer can be more accurate due to the extra terms in the error correction offered by extra standards [11], economy and mid-level analyzers do not offer the four-sampler capability needed for this enhancement. Moreover, measuring an inductor with a two-port setup requires collecting all four -parameters and mathematically solving for . The errors in the three additional measurements may then compound the inductor uncertainty, and it seems unlikely that the final result will be significantly better than the case examined above. Determining if this is the case is beyond the scope of this paper. Instead, we pursue resonance-based techniques in the sections below and demonstrate how accuracy can be dramatically improved even with lower cost instrumentation. III. ALTERNATIVE

MEASUREMENT TECHNIQUES

Creating resonant circuits to measure has been used for many decades [12]. For example, the HP 4342A RF meter manufactured by the Hewlett-Packard Company in the 1960s measured by resonating an inductor with a high-quality variable capacitor and measuring the voltage produced across the capacitor, as shown in Fig. 6 [13]. The instrument was capable of measuring ’s from 5 to 1000 at frequencies up to 70 MHz.

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Fig. 6. Circuit used in HP4342A (after [13]).

The technique relies on the fact that a series-resonant circuit develops a voltage across the capacitor equal to times the excitation voltage, so that by displaying the RF voltage across the capacitor with appropriate scaling, the is shown. The limiting factor here is the ability to generate a sufficiently low impedance source as frequencies are increased above the VHF range. Additionally, in common with all methods relying on resonance, it is critical that the series resistance around the RLC path be less than that of the inductor being measured (or that it is well-known and can be subtracted accurately). Thus, the measured will be bounded by the capacitor and interconnect resistances as well. An additional technique that is widely used is to measure the bandwidth of a filtering response created by a resonant circuit. This technique has been used in the Boonton 34A resonant coaxial line to measure very low-loss capacitor dissipation factors [14]. The stated accuracy is better than 20% for capacitor ’s up to about 2000, under certain conditions. Although designed for capacitor measurement, the technique has been used by at least one surface-mount inductor manufacturer to provide precision measurements as well [15]. The technique employs a coaxial line as a resonating element, and ultimate performance will depend on providing a suitably low-loss transmission line and knowing its loss characteristics to a high accuracy. While this functions well for chip capacitors (and possibly chip inductors), it is difficult to apply for devices such as on-chip inductors or integrated passives in LTCC. However, the general concept remains valid and can be adapted to VNA setups. Hence, it is examined in Sections III-A and B. A. Two-Port Resonant-Circuit

Measurement

measurement techniques based on resonant circuits can be created in either series or parallel form [13], [16]–[18]. Both use the approach of exciting the resonant circuit with a signal generator and then measuring the bandwidth of the response to get from (3). The parallel resonant circuit technique is shown in Fig. 7. Port 1 in this figure represents a swept source with a 50- impedance, while port 2 represents a response measurement, also at 50 . magnitude measurement on a netThis could be a simple work analyzer. When taking this approach, it is important to address unloaded versus loaded , since the measurement system’s terminations will introduce losses into the overall circuit. This issue is addressed by C2 and C3. These capacitors must be a small fraction of the resonating capacitor C1, in order to loosely couple the source and load, thereby minimizing degradation in the tank. For this example, the core tank circuit L1, C1 is resonated at 500 MHz, and the tank circuit is 200. Hence, the effective

Fig. 7. Measuring the response of a parallel resonant circuit formed around the inductor.

Fig. 8. Simulated S

response of Fig. 7.

parallel loss resistance of the tank is 11.3 k . Clearly, C2 and C3 cannot be avoided, since the would be degraded from 200 to less than one by a net 25- loading of the terminations. Setting C2 and C3 to be approximately 1/100 of the tank circuit C solves this problem, while introducing an acceptable 30-dB attenuation in the signal path response from source to load. With the values shown, the series combination of C2 and the 50- source termination present an equivalent RC parallel circuit load on the tank of 811 k in shunt with 0.0503 pF. Hence, the tank’s 11.3-K parallel resistance at resonance is only degraded to 11.0 k and an accurate can be found directly from the bandpass response measured, even without backing-out the losses from the terminations. The simulated response of this circuit is shown in Fig. 8, where a precise 2.5-MHz bandwidth is found. This is exactly the value of 200 at 500 MHz (note the slight shift expected for a if resonance from 500 MHz due to the capacitive loading of 2 0.05 pF). In principle, larger capacitors could be used and the calculated loading of the terminations could be removed from the measured results through suitable calculations. However, the accuracy of this would depend on the exact values of C2 and C3 and any associated parasitics. A more important consideration is the possibility of feed-through from the source to the

KUHN AND BOUTZ: MEASURING AND REPORTING HIGH QUALITY FACTORS OF INDUCTORS USING VNAs

Fig. 9. Circuit of Fig. 7 with parasitic feed-through capacitance added.

Fig. 11. Series resonant circuit stimulus-response measurement setup.

Fig. 12. Simulated S

Fig. 10. Simulated S

response of Fig. 9.

load due to fringing capacitances in an actual physical circuit. To investigate this source of error, Fig. 9 shows a model where the feed-through is 20% of the capacitance values of C2 and C3. The resulting response is shown in Fig. 10 and, while distorted, still displays the expected 2.5-MHz 3-dB bandwidth. Hence, this technique may still be viable for measuring ’s to 200 and above, if the feed-through capacitance can be suitably minimized. The dual of the technique described above is illustrated in Fig. 11. Here, a resonating capacitor is added in series with the inductor being measured, and the source and load are coupled directly. This simpler arrangement can yield excellent results too, provided that the series tank circuit impedance at resonance (the series of the inductor) is well below 50 . Under this condition, the difference between loaded and unloaded will be negligible. Fortunately, for most high- inductors, this will be the case at the frequencies of interest. The simulated response for the circuit of Fig. 11 is shown in Fig. 12. Note that the response here is on the order of 40 dB at resonance due to the low 0.283- impedance presented at resonance. Moreover, the measured bandwidth is precisely 2.5 MHz as expected for a of 200 at 500 MHz, and no frequency shifting is created by the source and load. This type of response is easily measured with a modern network analyzer.

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response of Fig. 11.

However, it is important to consider possible real-world circuit degradations for this technique as well. Feed-through capacitance is not an issue here, since the source and load connection points are the same, but contact resistance should be considered. Fortunately, this circuit shares many of the same features that a four-point probing technique offers to simple dc resistance measurements, and this is not a significant issue. However, one should consider the possibility of coupling in the measurement port probe tip area, especially if this is close to the inductor being measured. For accurate measurements based on 3-dB bandwidth or notch-depth assessments, this coupling must be small comresponse. pared with the 40-dB B. One-Port Resonant-Circuit

Measurement

A simpler and more direct approach, suggested by the results of Section II-C is to measure the resistance value of the series or parallel RLC circuit at the resonant frequency, using a VNA. For impedance measurement points on the Smith chart near the open and short circuits used during the calibration, high accuracy can be expected, as previously seen in columns 2 and 3 of Table I. This suggests that VNA impedance measurements taken near the very low resistance point of a series RLC circuit or the very high resistance point of a parallel RLC circuit may be sufficiently accurate, even when the calibration is imperfect. This is verified in the following section and used to illustrate that VNAs can be employed to make accurate measurements at values of several hundred or higher, if the inductor is resonated with a high-quality capacitor.

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Fig. 13. Measurement of open-circuit line following calibration with imperfect microstrip SOL standards.

IV. ACCURACY OF MEASURING RESONANT CIRCUIT AND WITH VNAS If an inductor is resonated with a high- capacitor, the result will be either a very low resistance or very high resistance, depending on whether the capacitor is placed in series or parallel. In either case, to the extent that the measured value is near the calibration points, it can yield accurate measurements. This should be the case near the frequency of resonance, especially for calibration setups with small short/open parasitics, such as those found in probing environments. To validatethis statement, the performance of anHP8753C network analyzer was assessed near these points. A set of microstrip lines was created using low-loss 30-mil Rogers 4003C substrate material to form open, short, and load references. The lengths of the feeding lines were adjusted so that calibration parasitics of zero could be used for the short and open standards (close to what a probing environment allows at low gigahertz frequencies). However, while end-effect parasitics were minimized and line widths and SMA connector launches were implemented carefully, the realized impedance is not perfect. In addition, the load-standard consisted of a simple 0603 surface-mount resistor and therefore contained significant inductive parasitics. Hence, the load-standard’s return loss was of the order of 25 dB. The effect on calibration can be seen in Fig. 13, where an unterminated line shows significant error (deviation from lying on the outer boundary) in the top and bottom halves of the chart. Fortunately, the accuracy near the short and open impedance points is still high as previously discussed. To assess whether this accuracy is high enough to measure the resonant-circuit by measuring a resonant-circuit’s resistance, several resistors

Fig. 14. Measurement of low resistances and calculated tances of 50 and 250 in a series RLC circuit.

Q for inductor reac-

were measured after calibration with this board. The results are shown in Fig. 14 and 15. Figs. 14 and 15 show the measured gamma values and the implied for example values of inductor and capacitor reactances ( ) at the resonant frequency. To calculate the implied , the magnitude of the reflection coefficient was converted to a resisor was plotted, as tance value ( ), and then the ratio appropriate. In the conversion, the angle of gamma was ignored and only the magnitude was used, since an RLC resonant-circuit measurement would be taken at precisely 0 or 180 degrees. The actual measured angles were within a few degrees of the short and open locations and were therefore sufficiently close to the calibration points to yield good results. In a probing setup, the angle deviations would be even smaller.

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Fig. 16. Series LC circuit DUT.

TABLE II MEASURED VALUES OF SURFACE-MOUNT 15-nH INDUCTOR USING MULTIPLE METHODS (SEE SECTION IV FOR ADDITIONAL NOTES)

Q

V. EXAMPLE RESONANT-CIRCUIT

Fig. 15. Measurement of high resistances and calculated tances of 50 and 10 in a parallel RLC circuit.

Q for inductor reac-

The results shown indicate that ’s of up to 100 can be measured to two significant digits, and even values up to 1000 can be assessed with some degree of accuracy when the frequency and inductance yield close to 50 . For inductive reactances significantly higher or lower than 50 , either the series or parallel modes will be preferred, respectively, and ’s of several thousand can potentially be measured with this simple method. Finally, we note that these results can be considered to be conservative since the analyzer, interconnect lines, and standards used here are lower quality than those likely to be available in most laboratories, where high-performance cables, probing equipment, and calibration substrates would be used.

MEASUREMENTS

To validate the proposed approaches, we measured the of a muRata LQW2BHN15NK13 15-nH high- (wire-wound) surface mount inductor at 500 MHz and 1 GHz, using multiple techniques. The measurements were taken after calibrating with the (imperfect) standards shown in Fig. 13. Following calibration, the inductor was attached at the end of the open line by adding a via to the backside, separated by 2 mm from the end of the line [for the 0805-size device-under-test (DUT)]. A simple measurement was then taken and the was calculated. Next, an 0805 NPO ceramic capacitor (7 and 1.5 pF for the two frequencies) was added to form a parallel resonant circuit and the impedances at resonance were measured to find . Finally, the circuit was reconfigured to form a series resonator (see Fig. 16), and two methods were used to get . The series resis. tance at resonance was measured first and was found as Then, the series-resonant stimulus-response method of Fig. 11 measurement replaced with was used, but with port 2 in the a 500- termination consisting of probing with an HP54006 20-dB attenuating passive probe (following a through-calibration when probing at the end of a copy of the open-circuit line). The results are shown in Table II. For the resonance methods, actual frequencies varied from 456 to 469 MHz for the 500-MHz nominal case and 942 to 984 MHz for the 1-GHz case due to inductor/capacitor proximity and capacitive loading of the passive probe and have been accounted for in the reactances used to compute . As expected from the imperfect calibration standards, the measured directly from on the Smith chart with no capacitor is highly inaccurate. The low values shown are consistent with verification tests done following calibration, where a line with a reflection coefficient of close to one showed gamma values well inside the outer boundary in the upper half of the chart. However, even in the face of the significant calibration standard

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Q

Fig. 17. Probing of LTCC embedded inductor and depression of due to radiation from dipole antenna formed by probe and DUT structure. Note the large pads used in the prototyping method of Fig. 7.

imperfections, the remaining techniques agree well with each other and with published data from the inductor manufacturer. At 500 MHz, the measurements for all three techniques agree to two significant digits, so a third digit is shown in the chart to provide sufficient resolution for comparison. Using the combined measurements, the of the LC circuit can be confidently stated to be 59. At 1 GHz, the measurements show more variability, but the can be confidently stated to be around 95 10. While such variation does not allow reporting to two significant digits, it is far better than the accuracy achievable with a measurement, where even with a high-quality SOL direct calibration a 0.5% error in gamma can cause to vary from 67 to 200 (see Section II-D). It should be emphasized that the high-precision test results reported in this section were achieved despite the degraded calibration described in Section IV, where the load standard was a simple 0603 resistor with a strong inductive component, and no parasitics were entered for the open and short standards. With a higher accuracy calibration, which is typical of a precision probing setup, up to two significant-digit precision may be possible even at 1 GHz and above. VI. COUPLING AND RADIATION EFFECTS Despite the good precision shown in Table II, the methods used here have the same hazards as those in any measurement of high- devices. In particular, two different mechanisms were found to degrade measurements during the course of this research. measurements on sysFirst, as noted in Section III-A, the tems such as those in Figs. 9 and 11 can be affected by coupling, either in the form of electric and/or magnetic fields—especially

of at higher frequencies. During the course of measuring the series LC circuit at 1 GHz, unrealistically sharp notch depths and bandwidths were noted. The sharp notch was traced to the presence of coupling from the microstrip line into the HP 54006 probe-tip structure. As confirmed by simulations, the induced voltage subtracted from and nulled the port-2 output, yielding an excessive notch depth. Fortunately, the simpler short-circuit and open-circuit resistance measurements of the resonator do not experience this was problem. However, even here, some degradation in noted when the capacitor was located too close to the inductor, lowering its value and introducing some eddy-current losses. Finally, in measurements of inductors built in LTCC materials, radiation effects were noticed at certain frequencies. Fig. 17 shows an example case [19]. The two curves give the from a simple measurement using the definitions of (1) for the lower curve and (2) for the upper curve [1], [19]. As seen in both curves, there is a significant dip in around 1.6 GHz for this device. The dip frequency was found to be independent of the DUT, and its origin was traced to the formation of a dipole-like antenna structure between the metal touched by the center probe lead and the ground structure formed by the probe body and connecting cable. Hence, hazards such as this must be recognized and avoided if possible in the design of the probing structures and setups to be used.

VII. CONCLUSION VNAs are typically used to measure and report values of is below approximately 30, these instruinductors. When ments can provide reasonable accuracy if careful calibration techniques and good-quality cables and standards are used. For measuring ’s of 50 and above, however, basic instrument limitations on gamma magnitude accuracy raise strong questions about reported measurement values. Gamma magnitude uncertainties of 1% will result in possible measurements ranging from 50 to infinity for an inductor with a true of 100. Assessment of measurement uncertainty indicates that published specifications may be conservative by a factor of about 2. However, as illustrated by Fig. 3, even with an uncertainty of 0.5%, reporting accurate values of 50 or higher with reasonable precision is unrealistic and other measurement approaches are required. This paper has concentrated on assessing measurement accuracy for lower frequency analyzers which support SOLT-type calibrations. By confirming that such VNAs produce accurate measurements of impedances near the short, open, and load impedance values used in a one-port calibration, we have found that accurate measurements can be made and reported reliably with up to two significant digits for ’s of at least 50, and with confidence for up to 100 or more, but only if resonance techniques are used. While we have focused on lower frequency analyzers and basic short-open-load calibrations, many of the accuracy considerations discussed here likely apply to instruments using more advanced calibrations at higher frequencies. Additional research is needed to assess the accuracy and precision to which inductor can be reported in those cases.

KUHN AND BOUTZ: MEASURING AND REPORTING HIGH QUALITY FACTORS OF INDUCTORS USING VNAs

REFERENCES [1] W. B. Kuhn, H. Xin, and M. Mojarradi, “Modeling spiral inductors in SOS processes,” IEEE Trans. Electron Devices, vol. 51, no. 5, pp. 677–683, May 2004. [2] N. M. Nguyen and R. G. Meyer, “Si IC-compatible inductors and LC passive filters,” IEEE J. Solid-State Circuits, vol. 25, no. 4, pp. 1028–1031, Aug. 1990. [3] J. N. Burghartz, M. Soyuer, and K. A. Jenkins, “Microwave inductors and capacitors in standard multilevel interconnect silicon technology,” IEEE Trans. Microw. Theory Tech., vol. 44, no. 1, pp. 100–104, Jan. 1996. [4] D.-H. Weon, J.-H. Jeong, and S. Mohammadi, “High- micromachined three-dimensional integrated inductors for high-frequency applications,” J. Vac. Sci. Technol. B, Microelectron. Process. Phenom., vol. 25, no. 1, pp. 264–270, Jan./Feb. 2007. [5] A. P. Boutz and W. B. Kuhn, “Measurement and potential performance of embedded LTCC inductors utilizing full tape thickness feature conductors,” in Proc. Ceramic Interconnect and Ceramic Microsystems Technologies, 2009, pp. 259–264. [6] “HP 8753E RF Vector Network Analyzer, Technical Specifications” 1998 [Online]. Available: http://www.home.agilent.com/upload/cmc_upload/All/LDC-5966-0054E-31842.pdf [7] “Agilent E5071C ENA Network Analyzer Data Sheet” Jul. 30, 2009. [Online]. Available: http://cp.literature.agilent.com/litweb/pdf/59895479EN.pdf, [8] “On-Wafer Vector Network Analyzer Calibration and Measurements,” Cascade Microtech, Inc., Beaverton, OR, Application Note, 2002. [9] A. Rumiantsev, S. L. Sweeney, and P. L. Corson, “Comparison of on-wafer multiline TRL and LRM calibrations for RF CMOS applications,” in Proc. 72nd ARFTG Microw. Meas. Symp., Dec. 9–12, 2008, pp. 132–136. [10] R. F. Kaiser and D. F. Williams, “Sources of error in coplanar-waveguide TRL calibrations,” in Proc. 54th ARFTG Conf. Dig., Dec. 2000, vol. 36, pp. 1–6. [11] J. A. Jargon, R. B. Marks, and D. K. Rytting, “Robust SOLT and alternative calibrations for four-sampler vector network analyzers,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 10, pp. 2008–2013, Oct. 1999. [12] “4342A Q-meter Operating and Service Manual” Mar. 1983 [Online]. Available: http://cp.literature.agilent.com/litweb/pdf/04342-90009.pdf [13] W. Hayward, R. Cambell, and B. Larkin, “Experimental methods in RF design,” Amer. Radio Relay League, p. 7.36, 2003. [14] “Model 34A resonant coaxial line—A complete system for measuring the Q-factors of unleaded or leaded components at high frequencies,” Boonton Electronics Corporation, Parsippany, NJ. [15] B. N. Breen, C. Goldberger, and L. Talalaevsky, “The ACCU-L multi-layer induct4or for high frequency applications,” AVX Israel Ltd Tech. Inf. Bull. [Online]. Available: http://avx.com/docs/techinfo/aculmlc.pdf

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[16] D. Kajfez, S. Chebolu, M. R. Abdul-Gaffoor, and A. A. Kishk, “Uncertainty analysis of the transmission-type measurement of -factor,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 3, pp. 367–371, Mar. 1999. [17] D. Kajfez and E. Hwan, “ -factor measurement with network analyzer,” IEEE Trans. Microw. Theory Tech., vol. MTT-32, no. 7, pp. 666–670, Jul. 1984. [18] R. S. Kwok and J.-F. Liang, “Characterization of high- resonators for microwave-filter applications,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 1, pp. 111–114, Jan. 1999. [19] A. Boutz, “Inductors in LTCC utilizing full tape thickness features,” M.S. thesis, Dept. Elect. and Comput. Eng., Kansas State Univ., Manhattan, 2009.

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William B. Kuhn (SM’97) received the B.S. degree from the Virginia Polytechnic and State University, Blacksburg, in 1979, the M.S. degree from the Georgia Institute of Technology, Atlanta, in 1982, and the Ph.D. degree from the Virginia Polytechnic and State University in 1996, all in electrical engineering. From 1979 to 1981, he was with the Ford Aerospace and Communications Corporation, Palo Alto, CA, designing satellite receiver equipment. From 1983 to 1992, he was with the Georgia Tech Research Institute, Atlanta, working on radar simulations and developing the XSPICE circuit simulator. In 1996, he joined Kansas State University, Manhattan, as an Assistant Professor, later becoming an Associate Professor in 2000 and Full Professor in 2006. He teaches courses in circuit design, communications theory, radio and microwave circuit/system design, and VLSI. His research is targeted at low-power radio electronics in CMOS, BiCMOS, GaAs, and SOI technologies and has ranged from characterization of spiral inductors to the design of radio receivers, transmitters, and power amplifiers. Dr. Kuhn was the recipient of various awards ranging from the Bradley Fellowship in 1993 from the Virginia Polytechnic and State University to the Commerce Bank Award for Excellence in undergraduate teaching in 2008.

Adam P. Boutz (M’08) received the B.S. and M.S. degrees in electrical engineering from Kansas State University, Manhattan, in 2007 and 2009, respectively. Since 2009, he has been with Lockheed Martin MS2, Eagan, MN, where he is involved in the development of RF-optical data links.

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Distributed MEMS Tunable Impedance-Matching Network Based on Suspended Slow-Wave Structure Fabricated in a Standard CMOS Technology Siamak Fouladi, Student Member, IEEE, Frédéric Domingue, Member, IEEE, Nino Zahirovic, Student Member, IEEE, and Raafat R. Mansour, Fellow, IEEE

Abstract—A tunable RF microelectromechanical system (MEMS) impedance-matching network operating at a frequency band from 13 to 24 GHz based on the distributed microelectromechanical transmission line (DMTL) concept is presented in this paper. The network is implemented using a standard 0.35- m CMOS technology and employs a novel suspended slow-wave (SSW) structure on a silicon substrate. The SSW structure results in a reduced total footprint and enhanced impedance coverage. The 8-bit DMTL matching network, fabricated using switched MEMS capacitors and SSW coplanar waveguide on a silicon substrate, results in a wide coverage of the Smith chart up to a maximum voltage standing-wave ratio of 11.5:1 with an impedance matching better than 10 dB and a power transfer ratio of better than 2.84 dB at 24 GHz. To our knowledge, this is the first implementation of a DMTL tunable MEMS impedance-matching network using a standard CMOS technology. Index Terms—CMOS microelectromechanical systems (CMOS-MEMS) integration, RF MEMS, slow-wave transmission lines, tunable impedance-matching networks.

I. INTRODUCTION

I

N ORDER to accommodate the emerging wireless communication standards, multiband RF transceivers that can operate at different frequency bands are required. Parallel path structures with duplicate components that meet the specific requirements of each standard are currently used in multiband transceivers. Next-generation multiband transceivers are motivated by the development of adaptive and reconfigurable building blocks such as tunable filters, phase shifters, adaptive power amplifiers (PAs), tunable low-noise amplifiers (LNAs), and adaptive matching networks. The goal is to reduce the total

Manuscript received September 29, 2009; revised January 16, 2010. First published March 15, 2010; current version published April 14, 2010. This work was supported in part by the Natural Sciences and Engineering Research Council (NSERC) of Canada and COM DEV Ltd. S. Fouladi, N. Zahirovic, and R. R. Mansour are with the Center for Integrated RF Engineering (CIRFE), Electrical and Computer Engineering Department, University of Waterloo, Waterloo, ON, Canada N2L 3G1 (e-mail: [email protected]; [email protected]; [email protected]). F. Domingue is with the Laboratoire des microsystèmes et télécommunications (LMST), Département de génie électrique et génie informatique, Université du Québec à Trois-Rivières, Trois-Rivières, QC, Canada G9A 5H7 (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042511

chip area and cost by sharing as many building blocks as possible between the various standards to replace the conventional parallel path concept. Reconfigurable impedance-matching networks are an integral part of any multiband RF transceiver circuit. Reconfigurable matching networks are used to increase the power efficiency and linearity by compensating for the input/output impedance variations between the different building blocks of a transceiver that can be caused by switching the frequency band of operation or by adjusting the output power level. In today’s wireless communication systems, the majority of tunable impedance-matching networks are realized using solid-state varactors or p-i-n diode switches at frequencies up to 2.4 GHz [1]–[5]. Ferroelectric barium strontium titanate (BST) varactor technology has also been utilized in the realization of tunable matching networks [6]–[8]. Using BST technology, a better RF linearity can be achieved compared to solid-state circuits. At millimeter-wave frequencies, the increased loss of tunable matching networks due to the low quality factor of solid-state varactors and BST tunable capacitors becomes an important issue. Another drawback of solid-state tuning elements is increased nonlinearity and higher noise at higher RF power levels. Recently, reconfigurable impedance-matching networks based on microelectromechanical systems (MEMS) technology have been successfully demonstrated [9]–[13]. MEMS-based impedance-matching networks are compact and electronically tunable, providing low insertion loss, low power consumption, and higher linearity in high-frequency high-power applications. However, all the previously reported MEMS-based adaptive RF front-ends rely on multichip solutions [14]–[18] where the active circuitry and the MEMS network are put together in a hybrid integration approach. The realization of a fully integrated one-chip solution would be possible by developing a process that enables the integration of MEMS devices in a standard process used for RF integrated circuits (RFICs). Among the mainstream RFIC technologies, silicon-based CMOS processes have become the most favorable technology for the implementation of wireless transceivers due to their mature fabrication process, high level of integration, and low manufacturing cost. In this paper, we investigate the integration of MEMS-based reconfigurable impedance-matching networks in standard CMOS technologies. An 8-bit reconfigurable impedancematching network based on the distributed MEMS transmission line (DMTL) concept is presented that operates at a 13–24-GHz frequency band. Using the proposed network,

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TABLE I DESIGN PARAMETERS FOR THE DMTL IMPEDANCE MATCHING NETWORK OPERATING FROM 13 TO 24 GHz

Fig. 1. Equivalent-circuit diagram of a DMTL structure.

. All the other parameters the capacitance ratio of the unit cell are related to these three as follows:

a wide impedance coverage on the Smith chart is obtained. Design, modeling, fabrication, and measurement results of the network are presented. The network is fabricated in a standard 0.35- m CMOS technology using a post-processing technique that is optimized for the fabrication of MEMS devices [19], [20]. The monolithic CMOS implementation of these RF MEMS impedance-matching networks enables the development of future low-cost single-chip RF multiband transceivers with improved performance and functionality. II. DMTL IMPEDANCE-MATCHING NETWORK DESIGN A. Theory DMTL structures consist of a transmission line that is periodically loaded with capacitive MEMS switches. DMTL lines have been previously applied to MEMS phase shifters [21], tunable filters [22], [23], impedance-matching networks [12], [24], and impedance tuners [9]. Fig. 1 shows the lumped-element equivalent-circuit diagram of a DMTL structure. The local characteristic impedance and effective dielectric constant of the transmission line section depend on the state of the MEMS switch according to the DMTL equations in [25]. A DMTL structure with MEMS switches can be used to match 2 different load impedances at the output port to the source impedance presented at the input port by separately actuating each MEMS switch. The design goal is to uniformly distribute these impedance matched points on the Smith chart in order to obtain a wide impedance coverage using the designed network. B. Design and Optimization The performance of the DMTL impedance-matching network is optimized through the proper choice of the design parameters for the unit cell, as shown in Fig. 1. Assuming the characteristic impedance of the loaded line when all the switches are , where in their up-state position is is the system reference impedance, there are three main design parameters that can be used to optimize the performance of the network, as reported by the authors in [26]. The design parameters are: 1) the characteristic impedance of the unloaded line ; 2) the electrical length of each DMTL unit cell obtained for each state of the MEMS switch using (4); and 3) the , or equivalently, down-state MEMS switch capacitance

(1) (2) (3) (4) The minimum required electrical length of the network in the up-state position is set by the frequency band of operation. As given in (4), the physical length of the unit cell and consequently the total size of the network is minimized , which is a function of both and . by increasing can be increased by utilizing slow-wave structures, as will be explained in a later section, but there is a maximum limit for , which is set by the required uniformity of the impedance coverage. To improve the impedance coverage of the network, the down-state characteristic impedance of the loaded line needs to be lowered, while the electrical length of the cell in the must be increased. Hence, for a specific down-state position frequency band, in order to achieve a wide impedance coverage while maintaining the total size of the network as small as posis selected and is maximized sible, a proper value of through the proper choice of the dimensions of the MEMS switch and the geometry of the slow-wave transmission line. The network is optimized in terms of the uniformity of Smith chart coverage by using the design methodology reported in [26]. Table I lists the design parameters of the proposed DMTL impedance-matching network that is designed to operate at a frequency band from 13 to 24 GHz. III. CMOS IMPLEMENTATION The network is implemented in a standard two-poly four-metal (2P4M) 0.35- m CMOS process from TSMC, Taipei, Taiwan, and then post-processed to integrate the capacitive MEMS switches by optimized version of the technique previously reported by the authors for the fabrication of MEMS tunable capacitors [19], [20]. Fig. 2 shows the top view and cross-sectional view of the DMTL unit cell. A novel suspended slow-wave (SSW) coplanar waveguide (CPW) structure is

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Fig. 3. Post-CMOS processing steps required to integrate the MEMS capacitive switches in the 0.35-m CMOS process. (a) CMOS die after standard processing. (b) First RIE of CMOS dielectric layer. (c) RIE of silicon substrate and wet etching of the M2 sacrificial layer. (d) Critical point drying and second RIE of the CMOS dielectric layer on top of the pads and MEMS bridges.

Fig. 2. Top view and the cross-sectional view of the DMTL unit cell.

utilized in order to reduce the loss caused by the low-resiscm), enhance the effective tivity silicon substrate (8–12 dielectric constant of the line, and reduce the total footprint of the network. The MEMS bridge consists of a composite aluminum–oxide stack that is suspended 1.15 m above the signal line. As shown in the cross-sectional view of Fig. 2, there is a 100- m-deep trench under the signal line that isolates it from the substrate. The actuation voltage is applied to the MEMS made of polysilicon with bridge through a bias resistor a dc resistance of 50 /square. There is a metal–insulator–metal (MIM) capacitor between the MEMS bridge and the ground that provides dc isolation between the MEMS plane bridges and makes it possible to separately actuate each switch by applying a dc-bias voltage between the signal line and each and , the MEMS bridge independently. Since total shunt capacitance between the signal line and ground for and , the up- and down-state positions is dominated by respectively. Fig. 3 shows the schematic diagram of the post-CMOS processing steps for MEMS release. Fig. 3(a) shows the CMOS die after standard processing. During the first step, as presented in Fig. 3(b), CMOS inter-metal dielectric layers are etched using reactive ion etching (RIE) of oxide, while using the topmost metal layer (M4) as a mask and is similar to the post-processing reported in [27] and [28]. After this step, both the silicon substrate and sacrificial metal layers are exposed for subsequent etching and release of the MEMS capacitive switches. The second step involves the RIE of the silicon substrate in order to create the trench under the signal line and also wet etching of the sacrificial metal layer (M2). By removing M2, an air-gap is created between the MEMS bridge on (M3) and the signal line on (M1) [as shown in Fig. 3(c)]. The final post-processing step is the critical point drying of the dies after wet etching of the sacrificial layer and a second oxide RIE to remove the oxide on top of the pads for electrical contact and also to etch the oxide layer on top of the MEMS bridges to reduce the required actuation voltage of the MEMS device [see Fig. 3(d)]. A scanning electron microscope (SEM) image of the MEMS capacitive switch after all the post-CMOS processing steps is presented

Fig. 4. SEM image of the CMOS-MEMS capacitive switch.

in Fig. 4. A photograph and diagram of the fabricated DMTL impedance-matching network with eight MEMS capacitive switches is shown in Fig. 5. The MEMS bridges are connected k ) and the to the bias pads through bias resistors ( CPW center conductor is dc grounded in the test setup using bias tees. IV. SIMULATIONS A. SSW Transmission Line In conventional CPW transmission lines on silicon substrate, there is a strong penetration of the electromagnetic (EM) field into the low-resistivity silicon substrate that increases the loss at high frequencies. This can be addressed by adding floating metal shield strips between the CPW line and the lossy silicon substrate using the lower interconnect metal layers [29]–[31] or by removing the lossy silicon substrate in the vicinity of the transmission line [32]. In this section, a novel SSW CPW transmission line structure is presented that enables the fabrication of a transmission line with a high characteristic impedance, low insertion loss, and compact in size using a standard silicon-based CMOS technology. Fig. 6 illustrates a schematic of the proposed SSW structure. The slow-wave effect is achieved by extending T-shaped metal

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TABLE II GEOMETRICAL PARAMETERS OF THE CPW, S-CPW, AND SSW-CPW LINES

Fig. 5. (top) Photograph and (bottom) diagram of the DMTL impedancematching network with eight MEMS switches built in 0.35-m CMOS technology. Fig. 7. Simulated relative dielectric constant (" ) of the CPW, S-CPW, and SSW-CPW transmission lines.

Fig. 6. Top view and cross-sectional view of the SSW-CPW transmission line, S and G parameters mark the signal line and ground plane dimensions, respectively.

patterns from the ground planes to the signal line to increase the line capacitance and periodically reducing the width of the central conductor to increase the line inductance [33]. The 1- m-wide oxide bridge, mechanically connects the T-shaped ground pattern to the signal line, and is used to suspend the signal conductor after removing the silicon substrate. Three types of CPW transmission lines are compared: the CPW on silicon substrate, suspended CPW (S-CPW), and SSW CPW. Using 3-D full-wave simulations with High Frequency Structure Simulator (HFSS), the performance of each transmission line is characterized by the attenuation per millimeter

length ( in dB/mm), relative dielectric constant , and . For a fair comparison, all the transmission quality factor lines are designed to have the same characteristic impedance . Table II summarizes the structural parameters of the transmission lines studied in this section. Fig. 7 shows the simulated relative dielectric constant of the conventional CPW line on low resistivity (8 cm) silicon substrate, S-CPW, and SSW-CPW lines extracted from the -parameters using [34]. The of the conventional CPW is about 6.5 and is set by the relative dielectric constant of the silicon substrate and the surrounding air . The S-CPW m and m has a relative line in air with dielectric constant . Since the wavelength is inversely , the S-CPW structure will not lead to a proportional to compact implementation of the proposed network. This issue is addressed by employing the proposed SSW-CPW structure. The SSW-CPW structure has a relative dielectric constant of resulting in a size reduction factor of 2.1 compared to the S-CPW structure. The attenuation and quality factor of the lines are shown in Figs. 8 and 9, respectively. The attenuation of the CPW on silicon is 3.8 dB/mm at 20 GHz. By removing the silicon substrate under the signal line, the attenuation is reduced to less than 0.1 and 0.14 dB/mm for the S-CPW and SSW-CPW lines, respectively. Fig. 10 compares the quality factor of the lines. At 20 GHz, the CPW line on silicon has a quality factor of less than 5, while the SSW-CPW line achieves a quality factor of 75. The factor of the SSW-CPW line is comparable to the quality factor of the S-CPW line with a of 93 at 20 GHz. According to these results, the use of the SSW-CPW line permits the compact implementation of the proposed impedance-matching network with a lower insertion loss.

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TABLE III EQUIVALENT-CIRCUIT MODEL PARAMETERS OF THE DMTL UNIT CELL EXTRACTED FROM THE EM SIMULATION RESULTS

Fig. 8. Simulated attenuation () per millimeter length of the CPW on silicon substrate, S-CPW, and SSW-CPW transmission lines.

Fig. 9. Simulated quality factor (Q) of the CPW on silicon substrate, S-CPW, and SSW-CPW transmission lines.

B. DMTL Unit Cell The DMTL unit cell consists of a 400- m-long SSW-CPW line section that is loaded with a MEMS switch, as shown in the schematic diagram of Fig. 2. The SSW-CPW line section has an unloaded characteristic impedance of 102 and a relative dielectric constant of 4.83. The dimensions of the MEMS switch are 120 m 70 m on the signal line and are selected in order to obtain the design parameters listed in Table I. EM simulations with HFSS are performed to find the -parameters of the DMTL unit cell for the up- and down-state positions and also for the unloaded slow-wave transmission line. As shown in the equivalent-circuit diagram of the DMTL unit cell in Fig. 1, the MEMS network with a capaciswitch is represented by a series and for the up- and down-state tance value equal to positions, respectively. The SSW transmission line section is network extracted from modeled using the equivalent the -parameters [34]. The equivalent-circuit model of Fig. 1 is used in ADS to fit the simulated -parameters of the DMTL unit cell in the up- and down-state positions and the extracted parameters are summarized in Table III. C. Impedance Coverage The equivalent-circuit model of the DMTL unit cell with the extracted parameters listed in Table III is used to simulate the

Fig. 10. Simulated impedance coverage of the designed DMTL impedancematching network at different frequencies.

impedance coverage of the matching network for all the possible combinations of the MEMS switch states. Fig. 10 shows the simulated impedance coverage of the network at six different frequencies from 14 to 24 GHz suitable for applications such as wireless LAN or vehicular radar at a 24-GHz industrial–scientific–medical (ISM) band. As shown in this figure, the proposed impedance-matching network results in a uniform coverage of the Smith chart. The uniformity of the Smith chart cov-

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TABLE IV EQUIVALENT-CIRCUIT MODEL PARAMETERS OF THE DMTL UNIT CELL EXTRACTED FROM THE MEASURED S -PARAMETERS

Fig. 12. Estimated loss of the fabricated DMTL impedance-matching network when all the switches are in the up- and down-state positions, the minimum, maximum, and average loss for all the possible states. Fig. 11. Measurement and simulation results of the CMOS DMTL impedancematching network. (a) Return loss for two different combinations of MEMS switches. (b) Insertion loss.

erage is evaluated based on a uniformity factor introduced in [26]. The designed impedance-matching network achieves a uniformity factor of less than 500 for the frequency band from factor of less than 500 corresponds to a 13 to 23 GHz. A fairly wide coverage of the Smith chart with a return loss better than 10 dB, as will be explained using the experimental results. The maximum frequency of operation for the proposed DMTL impedance-matching network is determined by the Bragg freof the periodic DMTL structure when all the MEMS quency switches are actuated to the down-state position [21]. The has been evaluated as 33 GHz using the equivalent-circuit model parameters listed in Table III. V. EXPERIMENTAL RESULTS On-chip -parameter measurements of the fabricated DMTL impedance-matching network were performed using an RF probe station with short-open-load-thru (SOLT) calibration over a frequency range from 1 to 26 GHz. Fig. 11 compares the measured and simulated -parameters of the matching network for two different states of the MEMS switches, i.e., when all the switches are in their up-state position and when all the switches are actuated to the down-state position. As shown in this figure, there is a fairly good correlation between the measured -parameters and the EM simulation results for both states. The measured -parameters of the matching network with all the switches in the up-state and down-state positions were fitted to the equivalent-circuit model of the impedance-matching

network in ADS. The extracted equivalent-circuit model parameters from the measurement results are listed in Table IV. The MEMS bridge, as shown in the cross-sectional view of Fig. 2, consists of a composite metal–dielectric layer of Al/SiO with a thickness of m and m, respectively. This composite bridge is subjected to a residual stress gradient generated from the fabrication process and causes an upward deformation of the MEMS bridge. The accurate characterization of the stress-induced bending is essential for the design of the . The stress gradient is MEMS bridge up-state capacitance determined by characterizing the stress-induced bending of biMPa layer cantilever beams and is obtained to be [19]. The measured height of the MEMS bridges after release is 1.15 m using an optical interferometer from wyko. The measured up- and down-state MEMS bridge capacitance values are fF and fF, respectively, refound to be , which is sulting in a measured capacitance ratio of very close to the simulation results summarized in Table III. The measured actuation voltage, , of the MEMS switches is 65 V. A. Loss Analysis Since, in real-world applications, the impedance-matching network is used as a mismatched two-port network, the loss of the network is more accurately defined as the ratio between the power transferred to the load and the power available at the input of the network [12] (5) Fig. 12 shows the measured loss when all the switches are in the up- and down-state positions and also the average loss of all the

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Fig. 15. Two-tone intermodulation distortion measurement setup.

Fig. 13. Measured impedance coverage and return loss performance of the fabricated network. The maximum VSWR with an impedance match better than 10 dB is 4.56, 6.69, 7.33, 9, 9, and 11.5 at 14, 16, 18, 20, 22, and 24 GHz, respectively.

f = 20 GHz and 1f = 1 kHz. 1f .

Fig. 16. (a) Measured output spectrum for (b) IM3 products versus the input power and

correspond to the down- and up-state of the MEMS switches, respectively. Fig. 14. Minimum measured power transfer ratio VSWR at different frequencies.

G

of the network versus

possible combinations of switch states. The equivalent ADS circuit model of the matching network with both input and output ports terminated with 50- loads was used to find the minimum, maximum, and average loss of the network at each frequency and for all the possible states. The average loss of the network is between 0.4–2.1 dB from 1 to 26 GHz. The maximum loss was obtained to be 7.55 dB at 26 GHz for the state of the matching network where “1” and “0”

B. Impedance Coverage and Power Transfer Fig. 13 shows the measured impedance coverage and impedance-matching performance of the network at different frequencies from 14 to 24 GHz and are in close agreement with the simulated impedance coverage presented in Fig. 10. As shown in Fig. 13, using the fabricated matching network at 14 GHz, all the source impedances out to a maximum voltage standing-wave ratio (VSWR) of 4.56:1 can be matched to 50 with a return loss better than 10 dB. The measured data at 24 GHz demonstrates a wide coverage of the Smith chart with a return loss better than 10 dB and a maximum VSWR of 11.5:1.

FOULADI et al.: DISTRIBUTED MEMS TUNABLE IMPEDANCE-MATCHING NETWORK

The power transfer ratio (in decibels) when the matching network is used to transfer power between a source with variable source impedance and a 50- load is computed using the measured -parameters for all the possible combinations of plane using the MEMS switch states and over the entire (6). Equation (6) includes both the effects of dissipation in the matching network itself and loss due to impedance mismatch

(6) Fig. 14 shows the minimum power transfer ratio in decibels for different VSWR values at different frequencies. Based on these results, the fabricated impedance-matching network can be used to match different source impedances out to a maximum VSWR of 11.5:1 at 24 GHz with a power transfer ratio of better than 2.84 dB and with return loss better than 10 dB. C. Intermodulation Distortion In order to demonstrate the linearity performance of the fabricated CMOS-MEMS tunable impedance-matching network, the intermodulation distortion analysis of the network was performed using a tow-tone measurement setup, as shown in Fig. 15 [35]. The output spectrum of the impedance-matching network for GHz and kHz when both the input and output ports are terminated by 50- RF probes is presented in Fig. 16(a). The measured third-order intermodulation (IM3) and 10 kHz at products versus the input power at GHz without any dc-bias voltage applied to the MEMS switches are also presented in Fig. 16(b). From these measurements, the measured third-order intercept (TOI) point is 33 and and kHz, respectively. For 39 dBm for values, the TOI point is expected to be even higher higher and cannot be measured due to limitations of the test setup in Fig. 15.

VI. CONCLUSION A tunable MEMS impedance-matching network integrated in a standard 0.35- m CMOS technology has been presented for the first time. The matching network is based on a DMTL structure utilizing a novel slow-wave CPW structure with eight MEMS capacitive switches. A three-step maskless post-CMOS process was performed to integrate the MEMS capacitive switches on the CMOS chip. The post-CMOS process also permits the integration of a slow-wave CPW structure with the silicon substrate removed from beneath the signal line to reduce substrate loss. Measurement results demonstrate that the network can be used to match impedances on the Smith chart with a maximum VSWR of 11.5:1 with a return loss better than 10 dB and a power transfer ratio of better than 2.84 dB at 24 GHz. The implementation of the tunable MEMS impedance-matching network with CMOS circuits on the same chip allows for fully integrated silicon solutions for future multiband reconfigurable RF front-ends.

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ACKNOWLEDGMENT The authors would like to thank the Canadian Microelectronics Corporation (CMC), Kingston, ON, Canada, for providing the access to CMOS fabrication. REFERENCES [1] J. de Mingo, A. Valdovions, A. Crespo, D. Navarro, and P. Garcia, “An RF electronically controlled impedance tuning network design and its application to an antenna input impedance automatic matching system,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 2, pp. 489–497, Feb. 2004. [2] W. C. E. Neo, Y. Lin, X.-D. Liu, L. C. N. de Vreede, L. E. Larson, M. Spirito, M. J. Pelk, K. Buisman, A. Akhnoukh, A. de Graauw, and L. K. Nanver, “Adaptive multi-band multi-mode power amplifier using integrated varactor-based tunable matching networks,” IEEE J. SolidState Circuits., vol. 41, no. 9, pp. 2166–2176, Sep. 2006. [3] J.-S. Fu and A. Mortazawi, “Improving power amplifier efficiency and linearity using a dynamically controlled tunable matching network,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 12, pp. 3239–3244, Dec. 2008. [4] M. El-Nozahi, E. Sanchez-Sinencio, and K. Entesari, “A CMOS lownoise amplifier with reconfigurable input matching network,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 5, pp. 1054–1062, May 2009. [5] H. M. Nemati, C. Fager, U. Gustavsson, R. Jos, and H. Zirath, “Design of varactor-based tunable matching networks for dynamic load modulation of high power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 5, pp. 1110–1118, May 2009. [6] J.-S. Fu, X. A. Zhu, J. D. Phillips, and A. Mortazawi, “A ferroelectricbased impedance tuner for adaptive matching applications,” in IEEE MTT-S Int. Microw. Symp. Dig., Atlanta, GA, Jun. 2008, pp. 955–958. [7] A. Tombak, “A ferrolectric-capacitor-based tunable matching network for quad-band cellular power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 2, pp. 370–375, Feb. 2007. [8] H. Katta, H. Kurioka, and Y. Yashima, “Tunable power amplifier using thin-film BST capacitors,” in IEEE MTT-S Int. Microw. Symp. Dig., San Francisco, CA, Jun. 2006, pp. 564–567. [9] T. Vaha-Heikkila, J. Varis, J. Tuovinen, and G. M. Rebeiz, “A reconfigurable 6–20 GHz RF MEMS impedance tuner,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2004, pp. 729–732. [10] T. Vaha-Heikkila and G. M. Rebeiz, “A 20–50 GHz reconfigurable matching network for power amplifier applications,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2004, pp. 717–720. [11] Y. Lu, L. P. B. Katehi, and D. Peroulis, “High-power MEMS varactors and impedance tuners for millimeter-wave applications,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 11, pp. 3672–3678, Nov. 2005. [12] Q. Shen and N. S. Barker, “Distributed MEMS tunable matching network using minimal-contact RF-MEMS varactors,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 6, pp. 2646–2658, Jun. 2006. [13] S. Fouladi, A. Akhavan, and R. R. Mansour, “A novel reconfigurable impedance matching network using DGS and MEMS switches for millimeter-wave applications,” in IEEE MTT-S Int. Microw. Symp. Dig., Atlanta, GA, Jun. 2008, pp. 145–148. [14] A. van Bezooijen, M. A. de Jongh, C. Chanlo, L. Ruijs, F. van Straten, R. Mahmoudi, and A. van Roermund, “A GSM/EDGE/WCDMA adaptive series-LC matching network using RF-MEMS switches,” IEEE J. Solid-State Circuits, vol. 43, no. 10, pp. 2259–2268, Oct. 2008. [15] Y. Lu, D. Peroulis, S. Mohammadi, and L. P. B. Katehi, “A MEMS reconfigurable matching network for a class AB amplifier,” Microw. Wireless Compon. Lett., vol. 13, no. 10, pp. 437–439, Oct. 2003. [16] D. Qiao, R. Molfino, S. M. Lardizabal, B. Pillans, P. M. Asbeck, and G. Jerinic, “An intelligently controlled RF power amplifier with a reconfigurable MEMS-varactor tuner,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 3, pp. 1089–1095, Mar. 2005. [17] M. Liu, M. Libois, K. Maarten, B. Alain, J. Craninckx, and B. Come, “MEMS-enabled dual-band 1.8 and 5–6 GHz receiver RF front-end,” in IEEE Radio Wireless Symp. Dig., Long Beach, CA, Jan. 2007, pp. 547–550. [18] F. Dominngue, A. B. Kouki, and R. R. Mansour, “Tunable microwave amplifier using a compact MEMS impedance matching network,” presented at the Eur. Microw. Conf., Rome, Italy, Sep. 2009. [19] M. Bakri-Kassem, S. Fouladi, and R. R. Mansour, “Novel high-Q MEMS curled-plate variable capacitors fabricated in 0.35 m CMOS technology,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 2, pp. 530–541, Feb. 2008.

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[20] S. Fouladi, M. Bakri-Kassem, and R. R. Mansour, “An integrated tunable band-pass filter using MEMS parallel-plate variable capacitors implemented with 0.35 m CMOS technology,” in IEEE MTT-S Int. Microw. Symp. Dig., Honolulu, HI, Jun. 2007, pp. 505–508. [21] N. S. Barker and G. M. Rebeiz, “Optimization of distributed MEMS transmission line phase shifters—U -band and W -band designs,” IEEE Trans. Microw. Theory Tech., vol. 48, no. 11, pp. 1957–1966, Nov. 2000. [22] K. Entesari and G. M. Rebeiz, “A 12–18-GHz three-pole RF MEMS tunable filter,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 8, pp. 2566–2571, Aug. 2005. [23] A. Abbaspour-Tamijani, L. Dussopt, and G. M. Rebeiz, “Miniature and tunable filters using MEMS capacitors,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 7, pp. 1878–1885, Jul. 2003. [24] F. Domingue, A. B. Kouki, and R. R. Mansour, “Improved distributed MEMS matching network for low frequency applications using a slowwave structure,” in IEEE MTT-S Int. Microw. Symp. Dig., Atlanta, GA, Jun. 2008, pp. 1279–1282. [25] G. M. Rebeiz, RF MEMS Theory, Design, and Technology. Hoboken, NJ: Wiley, 2003, pp. 298–308. [26] F. Domingue, S. Fouladi, A. B. Kouki, and R. R. Mansour, “Design methodology and optimization of distributed MEMS matching networks for low frequency applications,” IEEE Trans. Microw. Theory Tech., accepted for publication. [27] G. K. Fedder, S. Santhanam, M. L. Reed, S. C. Eagle, D. F. Guillou, M. S.-C. Lu, and L. R. Carley, “Laminated high-aspect ratio microstructures in a conventional CMOS process,” Sens. Actuators A, Phys., vol. 57, no. 2, pp. 103–110, Nov. 1996. [28] H. Xie, L. Erdmann, X. Zhu, K. J. Gabriel, and G. K. Fedder, “PostCMOS processing for high-aspect-ratio integrated silicon microstructures,” J. Microelectromech. Syst., vol. 11, no. 2, pp. 93–101, Apr. 2002. [29] T. S. D. Cheung and J. R. Long, “Shielded passive devices for siliconbased monolithic microwave and millimeter-wave integrated circuits,” IEEE J. Solid-State Circuits., vol. 41, no. 5, pp. 1183–1200, May 2006. [30] T. S. D. Cheung, J. R. Long, K. Vaed, R. Volant, A. Chinthankindi, C. M. Schnabel, J. Florkey, and K. Stein, “On-chip interconnect for mm-wave applications using an all-copper technology and wavelength reduction,” in IEEE Int. Solid-State Circuits Conf., Feb. 2003, pp. 396–397. [31] M. Varenon, M. Karkkainen, M. Kantanen, and K. Halonen, “Millimeter-wave integrated circuits in 65-nm CMOS,” IEEE J. Solid-State Circuits, vol. 43, no. 9, pp. 1991–2002, Sep. 2008. [32] V. Milanovic, M. Gaitan, E. D. Bowen, and M. E. Zaghloul, “Micromachined coplanar waveguides in CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 6, no. 10, pp. 380–382, Oct. 1996. [33] J. Naylor, T. Weller, J. Culver, and M. Smith, “Miniaturized slowwave coplanar waveguide circuits on high-resistivity silicon,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2002, pp. 669–672. [34] W. R. Eisenstadt and Y. Eo, “S -parameter-based IC interconnect transmission line characterization,” IEEE Trans. Compon., Hybrids, Manuf. Technol., vol. 15, no. 4, pp. 483–490, Aug. 1992. [35] L. Dussopt and G. M. Rebeiz, “Intermodulation distortion and power handling in RF MEMS swithces, varactors, and tunable filters,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 4, pp. 1247–1256, Apr. 2003.

Siamak Fouladi (S’03) received the B.Sc. degree in electrical engineering from the University of Tehran, Tehran, Iran, in 2002, the M.Sc. degree in electrical engineering from Concordia University, Montreal, QC, Canada, in 2005, and is currently working toward the Ph.D. degree at the University of Waterloo, Waterloo, ON, Canada. In May 2005, he joined the Center for Integrated RF Engineering (CIRFE), Electrical and Computer Engineering Department, University of Waterloo, where he is currently a Research Assistant. His research interests include RF MEMS device fabrication and characterization and integrated millimeter-wave circuits.

Mr. Fouladi was the recipient of the Natural Sciences and Engineering Research Council of Canada (NSERC) scholarship.

Frédéric Domingue (S’07–M’09) received the B.Eng. degree in electrical engineering and Ph.D. degree from the Ecole de Technologie Superieure, Montreal, QC, Canada, in 2004 and 2008, respectively. From 2007 to 2008, he was a Visiting Scholar with the Centre for Integrated RF Engineering (CIRFE), University of Waterloo, Waterloo, ON, Canada. From 2008 to 2009, he was a Post-Doctoral Researcher with the Radio-Frequency Devices Laboratory (LCRF), Department for Heterogeneous Integration on Silicon at CEA-LETI, Grenoble, France. He is currently a Professor with the Université du Québec à Trois-Rivières, Trois-Rivières, QC, Canada. He is the Director of microsystem research activities of the Laboratory of Microsystems and Telecommunications (LMST). His research interests include integrated circuits, MEMS and nano RF components for wireless and sensing applications. Dr. Domingue was a recipient of the Governor General of Canada’s Academic Gold Medal. He was also the recipient of postgraduate scholarships (2004–2008) of the Natural Sciences and Engineering Research Council of Canada (NSERC) and several distinctions and scholarships from the Quebec Government and institutional programs.

Nino Zahirovic (S’04) was born in Mostar, Bosnia and Herzegovina, on August 4, 1983. He received the B.A.Sc. degree in computer engineering from the University of Waterloo, Waterloo, ON, Canada, in 2006, and is currently working toward the Ph.D. degree in electrical engineering at the University of Waterloo. His research interests include the design, tuning, and modeling of integrated tunable microwave circuits. Mr. Zahirovic was the recipient of the Ontario Graduate Scholarship in Science and Technology.

Raafat R. Mansour (S’84–M’86–SM’90–F’01) was born in Cairo, Egypt, on March 31, 1955. He received the B.Sc. (with honors) and M.Sc. degrees from Ain Shams University, Cairo, Egypt, in 1977 and 1981, respectively, and the Ph.D. degree from the University of Waterloo, Waterloo, ON, Canada, in 1986, all in electrical engineering. In 1981, he was a Research Fellow with the Laboratoire d’Electromagnetisme, Institut National Polytechnique, Grenoble, France. From 1983 to 1986, he was a Research and Teaching Assistant with the Department of Electrical Engineering, University of Waterloo. In 1986, he joined COM DEV Ltd., Cambridge, ON, Canada, where he held several technical and management positions with the Corporate Research and Development Department. In 1998, he became a Scientist. In January 2000, he joined the University of Waterloo, as a Professor with the Electrical and Computer Engineering Department. He holds a Natural Sciences and Engineering Research Council of Canada (NSERC) Industrial Research Chair in RF Engineering with the University of Waterloo. He is the Founding Director of the Center for Integrated RF Engineering (CIRFE), University of Waterloo. He has authored or coauthored numerous publications in the areas of filters and multiplexers, high-temperature superconductivity and MEMS. He coauthored Microwave Filters for Communication Systems (Wiley, 2007). He holds several patents related to areas of dielectric resonator filters, superconductivity, and MEMS devices. His current research interests include MEMS technology and miniature tunable RF filters for wireless and satellite applications. Dr. Mansour is a Fellow of the Engineering Institute of Canada (EIC).

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Subspace-Based Optimization Method for Reconstruction of 2-D Complex Anisotropic Dielectric Objects Krishna Agarwal, Li Pan, and Xudong Chen

Abstract—This paper presents an approach for reconstructing complex anisotropic dielectric objects. There are four main contributions of this work. First, the current work extends the subspace-based optimization method for the reconstruction of complex anisotropic scatterers, which was proposed originally for the reconstruction of isotropic scatterers. Second, our implementation shows that although the problem of reconstructing the complex anisotropic scatterers is more complicated than the isotropic scatterer reconstruction, the subspace-based optimization can be extended to this problem without increasing the computational complexity of the solution. Third, this work provides some representative numerical examples for the problem of reconstruction of complex anisotropic scatterers. Fourth, this work presents an important insight into the nature of currents induced on the scatterers and their effect on the reconstruction problem. Index Terms—Anisotropy, inverse scattering, optimization, reconstruction.

I. INTRODUCTION

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ONINVASIVE evaluation methods are of great practical consequence in medical diagnosis, geo-remote sensing, military surveillance, etc. Electromagnetic inverse scattering forms an important part of such methods. Reconstruction of the scatterers is performed by studying the fields scattered by the scatterers. However, such inverse formulations greatly suffer from the ill posedness of the inverse problem, which is further complicated in the case of extended scatterers, where the one-to-one mapping between the currents induced on the scatterer and the scattered field is lost [1]–[5]. Limited number of measurements, nonlinearity of the problem, and the nature of the mapping result in inaccurate retrieval of the scatterers. A framework for studying this problem was presented in [6] and [7]. It split the induced currents into radiating (deterministic) and nonradiating (ambiguous) portions. Evidently, the inverse problem can be solved accurately if the ambiguous currents can be retrieved. Presence of ambiguous currents calls for some form of optimization in order to reconstruct the scatterers. One typical method is to employ genetic algorithm or related algorithms for

Manuscript received August 18, 2009; revised November 17, 2009. First published March 15, 2010; current version published April 14, 2010. This work was supported by the Singapore Ministry of Education under Grant R263000485112. The authors are with the Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117576 (e-mail: g0600069@nus. edu.sg; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2010.2042523

reconstructing the scatterer profile directly [8]–[19]. Such algorithms may or may not give special consideration to the induced current and its ambiguous portion. However, there are other important works that explicitly consider the ambiguous portion of the induced currents while designing the optimization approach [20]–[28]. These methods use a nonlinear cost function that indicates the error in the retrieval of the ambiguous portion of the induced currents. Recently, a new method, called the subspace-based optimization method [1], [2], has been proposed for 2-D scalar electromagnetic inverse problems (i.e., transverse magnetic (TM) case for 2-D dielectric cylinders). The subspace-based optimization uses the deterministic portion of the induced current to provide a good initial guess and formulates the optimization problem for the unknown dielectric constants and ambiguous currents. The subspace-based optimization is robust to the noise, as well as the selection of the parameter that is used to split the space of the induced currents into deterministic and ambiguous portions. It is worth mentioning that the subspace-based optimization shares a lot in common with [25] and [28]. In fact, the central idea of the subspace-based optimization is very similar to [25] and [28]. Further, the most important common feature is that the deterministic currents are calculated analytically and only the ambiguous portion of induced current is cast into optimization. On the other hand, the most important difference between the subspace-based optimization and [25] and [28] is that the cost function in the subspace-based optimization includes the residue of the field equation, while [25] and [28] use only the residue of the state equation for defining the cost function. Since the cost function in [25] and [28] does not include the residue from the field equation, it is necessary to choose the correct value of that demarcates the deterministic and ambiguous portions of the induced currents. In effect, the quality of reconstruction in [25] and [28] is sensitive to the choice of . However, in practice, it is often difficult to determine the exact demarcation between the deterministic and ambiguous portions, especially in the noisy scenario. In the subspace-based optimization, since the cost function includes the residue of the field equation, the choice of is not very strict. Due to this, the sensitivity of the algorithm to the value of parameter is significantly reduced. Reference [2] shows that in the subspace-based optimization can be chosen from a range of consecutive integer values. More details about the choice of have been presented in [2]. Another important difference between the subspace-based optimization and [25] and [28] is the classification of the space of the induced current. In [25] and [28], the space of the induced current is physically classified into radiating and nonradiating

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currents. This classification works well in the absence of noise. However, in the presence of noise, this classification of induced current is not appropriate. In the subspace-based optimization, the induced current is mathematically classified into a deterministic portion and ambiguous portion, with the former being in the space spanned by the first right singular vectors and the latter being in the space spanned by the remaining right singular vectors. It is highlighted that the ambiguous portion of induced current does not necessarily have negligible contribution to the scattered fields, which is different from the well-accepted nonradiating current that is used in [25] and [28]. A detailed discussion on the two classifications can be found in [2]. This work extends the subspace-based optimization method for generic transverse electric (TE) inverse scattering problems involving 2-D complex anisotropic dielectric scatterers. This problem is an interesting research problem due to various reasons. First, the reconstruction of complex anisotropic dielectric scatterers is a relevant problem for many modern applications like nanotechnology, composites, and metamaterial engineering, etc. Second, reconstruction of complex anisotropic dielectric scatterers is mathematically and numerically more challenging than the reconstruction of isotropic scatterers, as there exist up to five unknowns at any given point in the region of interest (as shall be clear in the following section). Third, the physics behind the scattering from anisotropic dielectric scatterers is significantly different from the scattering problem involving isotropic scatterers. Since the TE illumination is mandatory for the reconstruction of anisotropic scatterers, the inverse problem now involves vectorial electric fields (in the transverse plane) and dyadic permittivities. In the TE case, the induced currents are dipoles with considerably weaker strengths than the induced monopole sources in the TM case (due to the nonlinear relationship between the polarization and the permittivity in the TE case [29]–[31]). Further, the direction of the source induced at a point on anisotropic scatterers is not necessarily in the same direction as the incident electric field (as opposed to the isotropic scatterers) and its direction depends upon the interaction of the electric field with the permittivity along the individual principal axes at that location. In this work, despite the complicated nature of the problem of reconstruction of 2-D complex anisotropic dielectric scatterers, the subspace-based optimization method has been applied successfully for reconstruction. The formulation of the forward problem and the subspace-based optimization method have been kept very similar to the scalar case and the changes appear largely in the optimization approach. An important achievement of this work is to show that, in the TE case, the computational complexity involved in the reconstruction of complex anisotropic dielectric scatterers using the subspace-based optimization method is not larger than the problem involving isotropic dielectric scatterers having only real permittivities. It is definite that the computational complexity of the TE problem shall be considerably greater than the TM problem, as the TE problem involves vectorial electric fields (in the transverse plane) and dyadic permittivities. However, as shown in this work, the computational complexity for the initial analysis, and subsequently for each iteration, is same for any TE problem irrespective of the nature of the scatterers (permittivities may be either isotropic or anisotropic, and either

real or complex) even though the number of unknowns may vary significantly. Another contribution of this paper is to present numerical examples and simulation results that are relatively rare compared with the isotropic TM or TE cases. There are only a few research papers that deal with the inverse problems involving anisotropic scatterers [32]–[35]. In our opinion, these works primarily present the closed form of the Green’s functions related to anisotropic scatterers. To the best of our knowledge, the reconstruction problem involving anisotropic dielectric objects is far less studied than the isotropic TM or TE cases due to the complexity of the problem and there is a lack of suitable reconstruction examples. This work hopes to fill this void and generate further interest in complex anisotropic dielectric objects’ reconstruction. This paper also provides an important insight into the nature of the inverse problem involving anisotropic scatterers. It is noticeable in the numeric examples that the reconstructed anisotropic permittivities exhibit strong directionality. For example, the reconstruction along a chosen optical axis is good for some portions of the scatterers and poorer for other portions. As discussed later, this is because the current distribution on the scatterer along the chosen principal axis is such that some portions on the scatterer may have higher current density than the other portions for various incidences. This prejudiced distribution of the induced current reduces the sensitivity of the inverse approach to the permittivity at the portions with lower current density. Due to this fact, the reconstruction of the anisotropic objects along a principal axis may be inherently biased to be poor in certain portions. II. FORWARD FORMULATION A. Mathematical Notations Before beginning the analysis, we introduce the mathematical notations used in this paper. All the variables and physical quantities are denoted in italics (for example, number of sources , the th pixel, the axis, wavelength , permittivity dyad , etc.). The superscripts are not variables and denote either the specific characteristic of the variables or mathematical operators like matrix inverse or Hermitian. Thus, they appear in and denote the scattered upright font. For example, and total electric fields, respectively, while denotes the inverse of the matrix . All the spatial vectors are denoted by an arrow above them (for example, , , etc.). All the dyads, with the exception of the 2-D rotation matrix, are denoted by , etc.). Fura double bar above them (for example, , ther, the mathematical vectors are denoted by a single bar above them (for example, , , etc.) and the matrices are denoted , , etc.). by a double bar above them (for example, B. Domain and Measurement Setup Let us consider a 2-D problem where the scatterers are nonmagnetic dielectric cylinders, extending infinitely in the -direction, and placed in free space. The permittivity of the cylinders might be complex and the cylinders may be anisotropic. The magnetic domain containing the cylinders is illuminated by

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is the electric polarization dyad of the th pixel. where Here, refers to the total electric field incident on the pixel. It can be understood as the sum of the electric field incident on the pixel due to the transmitting antenna at , , and the electric fields scattered by other pixels

Fig. 1. Experimental setup. The entire setup is invariant along the z -axis. The sources and receivers are placed along a circular contour, which is centered at the origin. The illumination is TE, meaning that the magnetic fields are along the z -axis and the electric fields are in the x–y -plane. The domain of investigation is discretized into pixels. The optical axes for the mth pixel are characterized by the orientation angle  .

line sources and the vector electric field in the – -plane is rereceivers. Thus, the overall setting belongs to the ceived at TE case. The setup is shown in Fig. 1. Using one transmitter at a measurements of the vector electric fields time, a total of can be recorded and used for reconstruction. To study the problem, we discretize the investigation domain small units, called pixels, such that each pixel is small into as compared to the wavelength . Since the pixels are small, the permittivity may be considered piecewise constant on each pixel. Let the th pixel be denoted by its representative location and its permittivity dyad be as follows:

(1) is the free-space permittivity, the expression in the where parentheses denotes the relative permittivity, superscripts and denote the real and imaginary parts, respectively, 1 and 2 denote the principal optical axes in the transverse plane, is the orientation angle, i.e., the angle made by the first principal axis with the -axis, and

is the 2-D rotation matrix. As evident in (1), the inverse problem shall typically involve five unknowns per pixel. C. Field Equations and Scattering Formulation The scattered electric field received at a receiver located at due to a transmitter located at and can be written as follows [29], [36], [37]: (2)

where is the permeability of the free space, is the free-space dyadic Green’s function (see [29]), and is the electric current induced on the th pixel. The induced electric current at the th pixel is related to the total electric field incident on the pixel , as follows: (3)

(4) Further, the electric polarization dyad can be written in terms of the relative permittivity as follows:

(5) where is the wavenumber of the incident wave in the free is space, is the free-space characteristic impedance, and the area of the pixel. Further details can be found in [1], [29], and [30]. D. Matrix Notation Representing the Measurement Setup The scattering formulation above can be represented using matrix notations for all the measurements corresponding to each incidence (with source location at ) as follows: (6) (7) is a dimensional vector containing the vectors for to , is a dimensional vector containing the vectors for to , and is a dimensional vector containing the vectors for to . The matrix is of dimension containing dyads where the th dyad is . The matrix is of dimension containing dyads where the th dyad is . The diagonal dyads of are zero dyads. The matrix is of containing only diagonal dyads, dimension where the th diagonal dyad is . Equations (6) and (7) are referred to as the field and state equations, respectively. Notations similar to those in [1] have been used for the sake of easy comprehension. However, it should be noted that the constituents of the vectors and matrices are completely different due to the fact that the problem under consideration is a vectorial problem involving induced dipole currents and their radiations. where

III. SUBSPACE-BASED OPTIMIZATION METHOD FOR TE CASE A. Introduction to Subspace-Based Optimization Method As discussed in [1], [2] and [5]–[7], for extended scatterers, the mapping between the induced currents and received scat-

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tered fields is not one-to-one. Thus, the induced currents cannot be retrieved uniquely from the scattered fields. This is physically explained in terms of radiating and nonradiating portions of the , the radiinduced currents [6], [7]. In terms of the mapping ating portion of the currents lies in the subspace spanned by the for whom the singular values are not right singular values of close to zero (this subspace is called the signal subspace). On the otherhand,thenonradiatingportionofthecurrentsliesinthenoise subspace, which is complementary to the signal subspace and is spanned by the right singular vectors for whom the singular values are close to zero. However, as argued in [2], the exact definition and distinction of the radiating and nonradiating portions of the induced currents is lost if the measured scattered fields are corrupted by noise. Still, the induced currents can be split into two portions, viz. deterministic and ambiguous, which are roughly analogous to the radiating and nonradiating currents. The underlying concept of the subspace-based optimization method is to utilize the signal subspace and its well posedness to determine the deterministic portion of the currents, and use optimization to determine the ambiguous portion [1], [2]. The deterministic portion may be retrieved directly using the singular vectors corresponding to first few significant singular values of , and the remaining portion is determined using the optimization of such that both the field and state equations are satisfied as closely as possible for all the incidences. Thus, the retrieval of the ambiguous part is the key to obtaining the polarization tensors. These polarization tensors can then be utilized with (5) to determine the permittivities. B. Formulation of the Optimization Problem be given as Let the singular value decomposition of [38]. Let us assume that the singular values are in the descending order. The signal subspace of is defined using first right singular vectors, while the remaining right singular vectors are used to define the noise is discussed in detail in [1], [2], subspace. The choice of and [31]. The induced currents are split into the corresponding deterministic and ambiguous portions , where the deterministic current is determined directly using the signal subspace [1], [2]. Let the ambiguous portion of the induced currents be given , where comprises of the right singular by (i.e., the noise subspace), and contains vectors , the weights of vectors ( ) in . The cost function, which is a combination of both the field equation and the state equation for all the incidences, is defined as follows [1], [2]:

which is to be minimized by optimizing the variables ; to ). Here, ( and . It should be noted that the first and second terms in (8) represent the contribution from the residues in the field and state equations, respectively. C. Optimization Using Levenberg–Marquardt (LM) Algorithm The above cost function can be minimized using the LM algorithm, as suggested in [4] and the references therein, if the optical axes are aligned to the geometric axes (i.e., and to ). The Frechet derivative of the cost function with respect to the optimization variables [4], [11] needs to be computed for the optimization process. We derive an analytical expression for the Frechet derivative and show that computing the derivative needs the same amount of computation in the case of real isotropic scatterers, complex isotropic scatterers, real anisotropic scatterers, or complex anisotropic scatterers though the number of variables involved in the respective cases are , , , and , respectively. We first consider the two residue vectors corresponding to the field and state equations (9) (10) such that cost function (8) can be rewritten as . For the ease of reference, we shall refer to any of the optimization vari; to ) using the notation . ables ( Considering anisotropic material having only real permittivity ; to ) being the optimization variables], [( the Frechet derivative of the cost function with respect to to , is the optimization variable , where (11)

(12)

(13)

where superscript denotes the conjugate transpose, is a matrix of the same dimension as , which contains only the th , and is a vector of same dimension as row of (8)

containing only the th element of elements in

and

being zero.

, and other

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G

Fig. 2. Plot of singular values of and the cost function for the three examples. Columns (1)–(3) represent examples (1)–(3), respectively. Rows: (a) Plot of . (b) Value of the cost function at each iteration. singular values (normalized) of

G

If the material is isotropic, then the derivative with respect to the polarization at the considered pixel is the sum of the derivatives with respect to the pixel’s polarization along the and -axes. If the material’s permittivity has a complex part, meaning that the polarization is not purely an imaginary quantity, then we conclude from the chain rule of differentiation that times that for the derivative for the real polarization value is the corresponding imaginary polarization. Thus, the LM optimization model can be setup in a straightforward manner for any of the cases discussed without any extra computation. D. Optimization Using Contrast Source Inversion Model For the situation when the optical axis is unknown, using the LM algorithm for optimization is not advisable, as the Frechet derivative with respect to the orientation angles is a very complicated expression. Here, methods like contrast source inversion are useful, as is elucidated below. Contrast source inversion algorithm is a dual-step optimization approach in which the contrast sources (or the induced electric currents) and the polarization values are updated sequentially in each iteration such that two interlinked parameter spaces are being dealt with alternatively in order to reduce the overall value of cost function [20]–[22]. The presented optimization approach is similar to the modified contrast source inversion optimization proposed in [2] for the scalar problem. As discussed therein, this approach is different from the conventional contrast source inversion in two main aspects. First, the cost function used in the conventional contrast source inversion is a nonquadratic function in terms of the optimization variables. Second, the conventional contrast source inversion does not start with a deterministic current and its convergence is slow compared with the method presented in [2]. For the contrast source inversion optimization, the cost function (8) is minimized by optimizing not only the polar. Further, now the ization values, but also the elements in

optimization of the polarization need not be done by considering the numeric constituents of the polarization dyads individually. Now, the polarization dyad may be treated as a single optimization variable, as (3) can be used for updating the polarization dyad. Thus, the parameter space for the contrast ; to , to source inversion method is ( ). The optimization is performed on the space of and the polarization dyad space alternatively. First, the conjugate . The total induced gradient approach is used to update , and finally, current is then calculated using the updated (3) is used to calculate the polarization tensor. This process is repeated until the cost function is sufficiently small. It should be noted that, in this case, the Frechet derivative is computed with respect to the elements of , which is a very simple expression involving no matrix inversions. However, this scheme has increased the number of optimization variables, and used dyadic variables rather than the scalar variables. Though this is expected to increase the number of iterations required for convergence, each iteration itself takes far lesser time as compared to LM due to the absence of computation-intensive matrix operations. IV. NUMERICAL EXAMPLES A. Annular Ring Structure The first example considers an annular cylinder with inner and outer radii of 0.6 and 0.8 m, respectively, placed at the origin. The domain of investigation is a square region of size 2 m centered at the origin. The cylinder’s optical axes are aligned with the geometric axes. The relative permittivity . The of the cylinder is measurement setup employs 20 transmitters and 40 receivers placed uniformly along a circle of radius 2 m and centered at the origin. The frequency of the incident waves is 300 MHz. The forward simulation uses 40 pixels along each axis, while the subspace-based optimization method uses 25 pixels

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Fig. 3. Example 1: annulus with complex anisotropic permittivity. Columns (1)–(4) show " , " , " , and " , respectively. Rows: (a) Actual profile of the scatterer. (b) Reconstruction in the absence of noise after 20 iterations. (c) Reconstruction in the presence of 20-dB white Gaussian noise after 20 iterations.

along each axis. The singular values of for this example are shown in Fig. 2(a), column (1). The value of is chosen to be 19. The reconstruction results are presented in Fig. 3. The four columns show , , , and , respectively. The three rows present the actual scatterer profile, the reconstructed profile in a noise-free scenario, and the reconstructed profile in the presence of 20-dB additive white Gaussian noise after 20 iterations of the LM optimization scheme. The plot of the cost function is shown in Fig. 2(b), column (1). It is observed that the reconstruction is poorer as compared to the reconstruction results in both the TM case [1] and the real isotropic TE case [31]. This can be explained by the much larger unknowns in complex anisotropic TE case. The second observation is that the reconstruction exhibit directionality, i.e., for the first and third columns, the reconstruction is better on the portions that are parallel to the -axis (i.e., top and bottom parts of the annulus), while for the second and fourth columns, the reconstruction is better on the portions that are parallel to the -axis (i.e., left and right parts of the annulus). This can be explained based on the anisotropic dipole nature of the currents induced on the cylinder. The results presented in [31] are for an isotropic cylinder in the TE case, where the direction of the induced dipole is always in the same direction as the total incident field. However, in the present anisotropic case, the currents induced on the various points of the cylinder are not in the same direction as the total incident field, but depend on the optical properties of the permittivity of the cylinder. The permittivity of the scatterer along a chosen optical axis induces a current distribu-

tion along that optical axis in such a manner that for various incidences, the current intensity is stronger in some portions while weaker in others. Due to this, for the considered optical axis, the portions with lower current intensity suffer from poorer reconstruction. To illustrate this, we consider two incidences with source location at (2,0) m and (0,2) m, and plot the magnitude of the current induced along the two optical axes for these incidences in Fig. 4, columns (1) and (2). In addition, we plot the sum of magnitudes of the currents induced on the scatterer for all the incidences in Fig. 4, column (3). As evident, for the first row (row (a) of Fig. 4) that shows the induced current along the -axis, the magnitude of currents is lower along the portions that are parallel to the -axis. Thus, the reconstructed component of the permittivity is poorer on these portions (columns (1) and (3) of Fig. 3). Similarly, the currents induced along the -axis (row (b) of Fig. 4) indicate that the reconstructed component of the permittivity is expected to be poorer along the portions that are parallel to the -axis, as seen in columns (2) and (4) of Fig. 3. We use this example to illustrate the effect of the deterministic currents on the cost function. The current distribution obtained by computing the deterministic portion of the induced currents in shown in Fig. 4, column (4). It can be seen that the deterministic currents roughly follow the shape of the scatterer. Further, on comparing with Fig. 4, column (3), it is evident that the deterministic currents computed using the current choice of form only a part of the actually induced currents. These observations indicate the importance of reconstructing the remaining portion of the induced currents.

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Fig. 4. Example 1: magnitudes of induced currents along the optical axes. Columns (1) and (2) show the magnitude of induced currents for incidences from two source locations, (2,0) m and (0,2) m, respectively. Column (3) shows the sum of magnitudes of the current induced for all the incidences. Column (4) shows the sum of magnitudes of the deterministic currents for all the incidences. Rows: (a) Magnitude of induced current along the x-axis ( 10 A). (b) Magnitude of induced current along the y -axis ( 10 A).

2

2

Fig. 5. Example 2: overlapping rings structure with complex anisotropic permittivity. Columns (1)–(4) show " , " , " , and " , respectively. Rows: (a) Actual profile of the scatterer. (b) Reconstruction in the absence of noise after 20 iterations. (c) Reconstruction in the presence of 20-dB white Gaussian noise after 20 iterations.

B. Overlapping Rings Structure Next, we consider an example in which the structure looks like an overlap of two similar annular rings. The inner and outer radii of each ring are 0.5 and 0.7 m, respectively. The centers of the rings are at ( 0.2, 0.2) m and (0.2, 0.2) m, respectively. The single structure obtained by their overlap has the relative

. The domain permittivity is a square region centered at the origin and is of size 2 m. The frequency of the incident waves is 300 MHz. We use 20 transmitters and 40 receivers, which are distributed uniformly along a circle of radius 2 m. The forward simulation uses 40 pixels along each axis, while the subspace-based optimization method uses 25 pixels along each axis. The singular values of

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Fig. 6. Example 3: two uniaxial cylinders. Columns (1)–(3) show " , " , and  , respectively. Rows: (a) Actual profile of the scatterer. (b) Reconstruction in the absence of noise after 30 iterations. (c) Reconstruction in the presence of 20-dB white Gaussian noise after 30 iterations.

for this example are shown in Fig. 2(a), column (2). The value of is chosen to be 19. The reconstruction is done using LM technique and the results presented have been obtained after 20 iterations. The plot of the cost function is shown in Fig. 2(b), column (2). The re, , sults are presented in Fig. 5. The four columns show , and , respectively. The three rows present the actual scatterer profile, the reconstructed profile in noise-free scenario, and the reconstructed profile in the presence of 20-dB additive white Gaussian noise. C. Two Uniaxial Cylinders Finally, we take an example where the optical axes of the cylinders are different from the geometric axes. We consider a square domain of size 1.4 m, centered at the origin, containing two circular cylinders of radius 0.2 m each. The first cylinder is placed at ( 0.3, 0) m and has the relative permittivity . The second cylinder is at (0.3,0) m and has the relative permittivity . The measurement setup is same as the first example. The forward simulation uses 40 pixels along each axis, while the subspace-based optimization method uses 35 for this expixels along each axis. The singular values of ample are shown in Fig. 2(a), column (3). The value of is chosen to be 25 for the noise-free scenario and 13 for the noisy scenario (20-dB additive white Gaussian noise). The reconstruction is performed using the contrast source inversion scheme and the optimization is done until 30 iterations. The plot of cost function is shown in Fig. 2(b), column (3). The results are presented in Fig. 6. The first column shows the

relative permittivity along the optical axes of the cylinders. The second column shows the relative permittivity along the axes normal to the optical axes of the cylinders. The third column shows the orientation of the optical axes. The reconstruction along the principal axis shows the presence of two cylinders and the orientations of the optical axes for both the cylinders have been successfully retrieved, though the retrieved permittivity is not close to the actual permittivity. V. CONCLUSION AND FUTURE WORK This paper has extended the application of the subspace-based optimization method for the reconstruction of extended dielectric objects that may exhibit complex anisotropic nature. It has been shown that subspace-based optimization method can be extended in a straightforward manner to such problems. The optimization can be set up for the complex anisotropic materials without any increase in the computational complexity as compared to the reconstruction of real isotropic dielectric scatterers in the TE case. Optimization scheme similar to the contrast source inversion can be used for reconstruction of the materials with unknown orientation of the optical axes. This is possible because contrast source inversion uses the induced sources and the complete physical polarization parameters (and not their individual numeric parts) for optimization. Though the numeric examples clearly exhibit the directional nature of reconstruction, the examples sufficiently illustrate the strength of the subspace-based optimization method in quickly converging to physical solutions, even in the presence of noise. The directionality observed in the reconstruction is not due to the inverse formulation, but due to the anisotropic nature of the material.

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Practical applications in diffraction tomography often encounter anisotropic scatterers. Thus, as a next step to this work, it shall be useful to extend the subspace-based optimization to dispersive anisotropic scatterers, where it becomes necessary to consider multiple frequency measurements. Making use of energy velocity diagrams shall be helpful for such applications. It is interesting to consider the extension of the subspacebased optimization in the 3-D scenario. However, the number of unknowns is significantly larger in the 3-D case. This not only accentuates the reasons behind the ill posedness of the inverse problem, it also makes the reconstruction computationally more intensive. It shall be interesting and practically useful to consider a combination of multiresolution methods and the subspace-based optimization for 3-D reconstruction problems. Including the salient features of multiresolution methods may be helpful in reducing the effect of local minima, as well as enhancing the computational efficiency.

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[16] S. Caorsi, A. Massa, M. Pastorino, M. Raffetto, and A. Randazzo, “Detection of buried inhomogeneous elliptic cylinders by a memetic algorithm,” IEEE Trans. Antennas Propag., vol. 51, no. 10, pp. 2878–2884, Oct. 2003. [17] A. Massa, D. Franceschini, G. Franceschini, M. Pastorino, M. Raffetto, and M. Donelli, “Parallel GA-based approach for microwave imaging applications,” IEEE Trans. Antennas Propag., vol. 53, no. 10, pp. 3118–3127, Oct. 2005. [18] S. Caorsi, A. Massa, and M. Pastorino, “A computational technique based on a real-coded genetic algorithm for microwave imaging purposes,” IEEE Trans. Geosci. Remote Sens., vol. 38, no. 4, pp. 1697–1708, Jul. 2000. [19] A. Massa, M. Pastorino, and A. Randazzo, “Reconstruction of twodimensional buried objects by a differential evolution method,” Inverse Problems, vol. 20, pp. S135–S150, Dec. 2004. [20] P. M. van den Berg and R. E. Kleinman, “A contrast source inversion method,” Inverse Problems, vol. 13, pp. 1607–1620, Dec. 1997. [21] P. M. van den Berg, A. L. van Broekhoven, and A. Abubakar, “Extended contrast source inversion,” Inverse Problems, vol. 15, pp. 1325–1344, Oct. 1999. [22] A. Abubakar, P. M. van den Berg, and J. J. Mallorqui, “Imaging of biomedical data using a multiplicative regularized contrast source inversion method,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 7, pp. 1761–1771, Jul. 2002. [23] L. L. Li, H. Zheng, and F. Li, “Two-dimensional contrast source inversion method with phaseless data: TM case,” IEEE Trans. Geosci. Remote Sens., vol. 47, no. 6, pp. 1719–1736, Jun. 2009. [24] R. E. Kleinman and P. M. Vandenberg, “A modified gradient-method for 2-dimensional problems in tomography,” J. Comput. Appl. Math., vol. 42, pp. 17–35, Sep. 1992. [25] S. Caorsi and G. L. Gragnani, “Inverse-scattering method for dielectric objects based on the reconstruction of the nonmeasurable equivalent current density,” Radio Sci., vol. 34, pp. 1–8, Jan.–Feb. 1999. [26] S. Caorsi, M. Donelli, D. Franceschini, and A. Massa, “A new methodology based on an iterative multiscaling for microwave imaging,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 4, pp. 1162–1173, Apr. 2003. [27] S. Caorsi, M. Donelli, and A. Massa, “Detection, location, and imaging of multiple scatterers by means of the iterative multiscaling method,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 4, pp. 1217–1228, Apr. 2004. [28] P. Rocca, M. Donelli, G. L. Gragnani, and A. Massa, “Iterative multi-resolution retrieval of non-measurable equivalent currents for the imaging of dielectric objects,” Inverse Problems, vol. 25, May 2009, Art. ID 055004. [29] K. Agarwal and X. Chen, “Applicability of MUSIC-type imaging in two-dimensional electromagnetic inverse problems,” IEEE Trans. Antennas Propag., vol. 56, no. 10, pp. 3217–3223, Oct. 2008. [30] X. Chen and K. Agarwal, “MUSIC algorithm for two-dimensional inverse problems with special characteristics of cylinders,” IEEE Trans. Antennas Propag., vol. 56, no. 6, pp. 1808–1812, Jun. 2008. [31] L. Pan, K. Agarwal, Y. Zhong, S. P. Yeo, and X. Chen, “Subspace-based optimization method for reconstructing extended scatterers: Transverse electric case,” J. Opt. Soc. Amer. A, Opt. Image Sci., Vision, vol. 26, pp. 1932–1937, 2009. [32] S. Barkeshli, D. J. Radecki, and H. A. Sabbagh, “On a linearized inverse scattering model for a three-dimensional flaw embedded in anisotropic advanced composite materials,” IEEE Trans. Geosci. Remote Sens., vol. 30, no. 1, pp. 71–80, Jan. 1992. [33] T. J. Cui, C. H. Liang, and W. Wiesbeck, “Closed-form solutions for one-dimensional inhomogeneous anisotropic medium in a special case—Part I: Direct scattering problem,” IEEE Trans. Antennas Propag., vol. 45, no. 6, pp. 936–941, Jun. 1997. [34] A. Abubakar and T. M. Habashy, “A closed-form expression of the electromagnetic tensor Green’s functions for a homogeneous TI-anisotropic medium,” IEEE Geosci. Remote Sens. Lett., vol. 3, no. 4, pp. 447–451, Oct. 2006. [35] L. Li and F. Li, “Closed time-domain solutions for 1D scattering and inverse scattering in anisotropic medium,” IEEE Trans. Antennas Propag., vol. 56, no. 7, pp. 2061–2066, Jul. 2008. [36] E. A. Marengo and F. K. Gruber, “Noniterative analytical formula for inverse scattering of multiply scattering point targets,” J. Acoust. Soc. Amer., vol. 120, pp. 3782–3788, Dec. 2006. [37] Y. Zhong and X. Chen, “MUSIC imaging and electromagnetic inverse scattering of multiple-scattering small anisotropic spheres,” IEEE Trans. Antennas Propag., vol. 55, no. 12, pp. 3542–3549, Dec. 2007. [38] R. A. Horn and C. R. Johnson, Matrix Analysis. Cambridge, U.K.: Cambridge Univ. Press, 1985.

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IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 58, NO. 4, APRIL 2010

Krishna Agarwal received the B.Tech. degree from the Indian School of Mines, Dhanbad, India, in the year 2003, and is currently working toward the Ph.D. degree at the National University of Singapore, Singapore. From 2003 to 2006, she was a Scientist with the Defence Research and Development Organization, Bangalore, India, during which time she was involved in development of the front end of active phased array radars. Her current research interests are electromagnetic and biomedical inverse problems.

Li Pan received the Bachelor of Engineering degree from Zhejiang University, Zhejiang, China, in 2003, the Master of Science degree from the Chalmers University of Technology, Göteborg, Sweden, in 2006, and is currently working toward the Ph.D. degree at the National University of Singapore, Singapore. From 2006 to 2008, he was a Research and Development Engineer with the Huawei Technologies Company Ltd., Shanghi, China, where he was involved with the design of third-generation (3G) wireless communication systems. His current research interests mainly concern electromagnetic inverse problems.

Xudong Chen received the B.S. and M.S. degrees in electrical engineering from Zhejiang University, Hangzhou, China, in 1999 and 2001, respectively, and the Ph.D. degree from the Massachusetts Institute of Technology (MIT), Cambridge, in 2005. He is currently an Assistant Professor with the Department of Electrical and Computer Engineering, National University of Singapore, Singapore. His research interests mainly concern electromagnetic inverse problems.

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