MT6628Q Datasheet [1.3 ed.]

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MT6628Q Data Sheet

Version: Release date:

1.3 2012-06-05

© 2012 MediaTek Inc. This document contains information that is proprietary to MediaTek Inc. Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. Specifications are subject to change without notice.

M e d

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MT6628Q Data Sheet Confidential A

Document Revision History Revision

Date

Author

Description

1.0

2012/05/03

Lingbin Guo

First release

1.1

2012/05/07

Lingbin Guo

Fix strap pin UART_RTS definition

1.2

2012/05/10

Lingbin Guo

1. 2.

1.3

2012/06/05

Lingbin Guo

Update WiFi standard name

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Update top marking adjust document layout (context is not modified)

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MT6628Q Data Sheet Confidential A

Table of Contents Document Revision History .................................................................................................................. 2 Table of Contents ................................................................................................................................... 3 1

2

System Overview .......................................................................................................................... 5 1.1

General Description .............................................................................................................. 5

1.2

Features................................................................................................................................ 5

1.3

Applications .......................................................................................................................... 7

1.4

Block Diagram ...................................................................................................................... 7

Product Description ..................................................................................................................... 8 2.1

Pin Description...................................................................................................................... 8 2.1.1

2.2

Package Information........................................................................................................... 14 2.2.1

3

Strapping Table .................................................................................................. 13

WLCSP Packaging ............................................................................................. 14

Electrical Characteristics .......................................................................................................... 18 3.1

PMU Description ................................................................................................................. 18 3.1.1

Under-Voltage Lockout (UVLO) ......................................................................... 18

3.1.2

WF_PA_LDO...................................................................................................... 18

3.1.3

CLDO ................................................................................................................. 18

3.1.4

Buck Converter................................................................................................... 18

3.1.5

PMU Power Connection ..................................................................................... 19

3.2

Absolute Maximum Ratings ................................................................................................ 20

3.3

Recommended Operating Range ....................................................................................... 20

3.4

PMU Electrical Characteristics ........................................................................................... 21

3.5

3.4.1

PMU Characteristics........................................................................................... 21

3.4.2

PMU Summary List ............................................................................................ 23

XOSC32.............................................................................................................................. 23

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MT6628Q Data Sheet Confidential A

3.5.1

Block Description................................................................................................ 23

3.5.2

Functional Specifications of XOSC32 ................................................................ 24

3.5.3

Recommendations for Crystal Parameters for XOSC32.................................... 24

3.6

DC Electrical Characteristics for 2.8 Volts Operation ......................................................... 24

3.7

DC Electrical Characteristics for 1.8 Volts Operation ......................................................... 25

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MT6628Q Data Sheet Confidential A

1

System Overview

1.1

General Description

MT6628Q is a 4-in-1 wireless communication device which includes  WLAN  Bluetooth  GPS  FM Receiver With four advanced radio technologies integrated into one single chip, MT6628Q provides the best and most convenient connectivity solution among the industry. MT6628Q implements advanced and sophisticated Radio Coexistence algorithms and hardware mechanisms. It also supports single antenna sharing among 2.4 GHz antenna for Bluetooth, WLAN and 1.575 GHz for GPS. The enhanced overall quality is achieved for simultaneous voice, data, and audio/video transmission on mobile phones and Media Tablets. The small footprint of WLCSP package with low-power consumption greatly reduces PCB layout resource. The software package “Symphony” enables all advanced wireless features on Android OS.

1.2          

Features

Embedded single core 32-bit RISC CPU for better system level management between subsystems Supports single antenna for Bluetooth and WLAN Self calibration Single crystal for GPS, BT and WLAN Integrated switching regulator enables direct connection to battery Best-in-class current consumption performance OS support: Android and Windows Mobile Intelligent BT/WLAN coexistence scheme that goes beyond PTA signaling (for example, transmit window and duration that take into account of protocol exchange sequence, frequency, etc.) Single antenna support for WLAN/Bluetooth/GPS WLCSP (3.99x4.45mm2) package

WLAN  Single-band (2.4GHz) single stream 802.11 b/g/n MAC/BB/RF  802.11 d/h/k compliant  Security: WFA WPA/WPA2 personal, WPS2.0, WAPI (Hardware)  QoS: WFA WMM, WMM PS  Supports 802.11n optional features: STBC, A-MPDU, Blk-Ack, RIFS, MCS Feedback, 20/40MHz coexistence (PCO), unscheduled PSMP  Supports 802.11w Protected Managed Frames

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MT6628Q Data Sheet Confidential A      

Supports WiFi Direct (WFA P-2-P standard) and Wi-Fi Miracast (Wi-Fi Display) Supports HotSpot 2.0 Passpoint Interface: SDIO 2.0 (4-bit & 1-bit, up to 50MHz), SPI (48Mbps) Integrated PA with max 21dBm output power Typical -77.5 dBm 2.4GHz receiver sensitivity at 11g 54Mbps mode Per packet TX power control

Bluetooth  Bluetooth specification v2.1+EDR  Bluetooth specification 3.0+HS compliance  Bluetooth v4.0 Low Energy (LE)  Integrated PA with 10dBm (class 1) transmit power and Balun  Rx sensitivity: GFSK -95dBm, DQPSK -94dBm, 8-DPSK -88dBm  HCI over high speed (4Mbps) UART(H4), and SDIO 2.0  Best-in-class BT/Wi-Fi coexistence performance  Up to 4 piconets simultaneously with background inquiry/page scan  Supports Scatternet  Packet loss concealment (PLC) function for better voice quality  Low-power scan function to reduce the power consumption in scan modes GPS  Supports GPS/QZSS/SBAS (WAAS/MSAS/EGNOS/GAGAN)  Best-in-class sensitivity performance – -165 dBm tracking sensitivity – -163 dBm hot start sensitivity – -148 dBm cold start sensitivity – -151 dBm warm start sensitivity  Full A-GPS capability (E911/SUPL/EPO/HotStill)  Active interference cancellation for up to 8 in-band tones  Low-power operational modes for mobile phone and DSC applications  Supports XTAL  5Hz update rate FM          

76-108MHz with 50kHz step Supports RDS/RBDS Digital stereo modulator/demodulator Digital audio interface (I2S) Fast seek time 30ms/channel Stereo noise reduction Audio sensitivity 2dBµVemf ((S+N)/N=26dB) Audio S/N 60dB Anti-jamming Integrated short antenna

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1.3      

Applications

Smart phone applications Media Tablet applications Mobile Internet Device (MID) applications Portable Navigation Device (PND) applications Portable Media Player (PMP) applications Portable gaming devices

1.4

Block Diagram SDIO/SPI

PMU

MCUSYS HIFSYS

cirq

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MT6628Q Data Sheet Confidential A

CPU

RTC XTAL 32.768KHz (optional)

RTC

OTP CONFG

GPIO

GPIO System Memory

FM long- antenna RX

General DMA

UART

Common UART

FM RX

WiFiSYS

FM RX RF + AFE

FM short-antenna RX

FM RX Modem

BB TX RX

MAC FM DSP

FM stereo out

Audio DAC

2.4G WiFi TX 2.4G WiFi RX (w/o external LNA) 2.4G BT T/RX Balun + BPF

TR switch

PA WIFI RF PA

FM SRC 2.4G WiFi RX (w/ external LNA)

I2S PTA

Bus Bridge

Memory

GPSSYS RF_CTL

BT RF

MODEM GPS RF External LNA (optional)

LNA

GPS engine

DSP

PKV

PCM BTSYS

OSC_IN

AGPS signals

Figure 1. MT6628Q block diagram

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MT6628Q Data Sheet Confidential A

2

Product Description

2.1

Pin Description

There are total 88 pins in WLCSP package. Symbol

WLCSP bump

Description

PU/PD

I/O

Power ground pin DVDD

G5

1.2V core power

NA

VDD

DVDD

E6

1.2V core power

NA

VDD

DVDD

C9

1.2V core power

NA

VDD

DVSS

G6

Ground

NA

VSS

DVSS

F7

Ground

NA

VSS

DVSS1

C10

Ground

NA

VSS

DVDDIO

C8

I/O power

NA

VDD

DVDDIO_SDIO

H4

SDIO I/O power

NA

VDD

PMU PMU_EN

G3

PMU enable

NA

I

PMU_DSB

H3

Disable PMU deep sleep mode

NA

I

VREF

L1

Reference bandgap voltage

NA

O

AVDD55_MISC

L2

VBAT for internal circuit

NA

VDD

AVSS55_MISC

K1

MISC ground

NA

VSS

AVDD25_V2P5

G2

Internal 2.5V power

NA

VDD

AVDD25_V2P5NA

J3

Internal 2.5V power

NA

VDD

LXBK

L3

Switching node of buck

NA

O

AVDD55_SMPS

K3

Battery voltage

NA

VDD

AVSS55_SMPS

J4

Switching regulator ground

NA

VSS

AVDD17_CLDO_IN

J2

1.7V CLDO input

NA

VDD

AVDD28_TLDO_SW

H1

Power source for TCXO

NA

VDD

CLDO

K2

1.2V core power LDO output

NA

O

AVDD28_TLDO

J1

2.8V TCXO LDO output

NA

O

WFLDO

L4

3.3V WiFi LDO output

NA

O

AUX_REF

H2

ADC top reference

NA

I

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MT6628Q Data Sheet Confidential A

Symbol

WLCSP bump

Description voltage input

PU/PD

I/O

AVDD28_PLL

L5

2.8V PLL power

NA

VDD

AVSS28_PLL

K5

2.8V PLL ground

NA

VSS

RTCCLK

F10

RTC 32kHz clock input

NA

I

RTCCLK_O

E10

RTC 32kHz clock output

NA

O

VCCRTC

G9

RTC power

NA

VDD

AVSSRTC

G7

RTC ground

NA

VSS

RTC

Analog AVDD16_RF_GPS

A6

GPS RF power

NA

VDD

AVSS16_HF_GPS

B6

Ground

NA

VSS

AVSS16_LF_GPS

C6

Ground

NA

VSS

RF_IN_GPS

A7

GPS RF input

NA

I

TEST_GPS

C7

GPS RF test pin

NA

Analog I/O

SANT_P

J10

Short antenna FM RF input

NA

I

SALNA_IN_N_VSS

H10

Short antenna FM RF input

NA

I

LNA_IN_N_VSS

K10

Long antenna FM RF input

NA

I

LANT_P

L10

Long antenna FM RF input

NA

I

AUROUT

K8

FM audio output

NA

O

AULOUT

L8

FM audio output

NA

O

AVDD28_FM

H9

FM power

NA

VDD

AVSS28_FM

J8

Ground

NA

VSS

AVSS28_FM

J9

Ground

NA

VSS

RF_IOP_WBT

A1

WiFi/BT RF port

NA

I/O

RF_ION_WBT

B1

WiFi/BT RF port

NA

I/O

LNA_IN_EXT

D1

External LNA input

NA

I

AVDD33_TX_WBT

A3

WiFi/BT power

NA

VDD

AVDD16_TRX_WBT

D2

WiFi/BT power

NA

VDD

AVDD16_SX_WBT

D4

WiFi/BT power

NA

VDD

AVDD16_LF_WBT

E1

WiFi/BT power

NA

VDD

AVSS33_PA

A2

Ground

NA

VSS

AVSS33_PA

B2

Ground

NA

VSS

AVSS16_WBT

B3

Ground

NA

VSS

AVSS16_WBT

C2

Ground

NA

VSS

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MT6628Q Data Sheet Confidential A

Symbol

WLCSP bump

Description

PU/PD

I/O

AVSS16_LF_WBT

E2

Ground

NA

VSS

VCO_MON_WBT

C3

WiFi/BT RF monitor pin

NA

O

OSC_IN

A4

XTAL input

NA

I

AVDD28_OSC

A5

XTAL power

NA

VDD

AVSS28_OSC

B5

Ground

NA

VSS

FSOURCE_WR

G8

eFuse power pin

NA

VDD

Digital XTEST

B8

Test mode enable

PU

I

SYSRST_B

L7

External system reset active low

PU

I

ANTSEL_2: Antenna select no.2 ANTSEL2

F3

ANTSEL1

F4

ANTSEL0

F2

GPIO24: GPIO24 in/out

F1

OSC_EN

G4

PD/SW

I

ANTSEL_1: Antenna select no.1

O

GPIO23: GPIO23 in/out

PD/SW

H7

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I/O

Strap pin

I

ANTSEL_0: Antenna select no.0

O

GPIO22: GPIO22 in/out

PD/SW I/O PU/SW

I

AUXADC_IN: Analog pin

I

RF_I_CAL: Analog pin

I

GPIO21: GPIO21 in/out

I/O

OSC_EN: OSC enable in clock daisy chain

O

AGPS_DUTY_LOSS: AGPS DUTY LOSS

NA/SW

GPIO20: GPIO20 in/out

SDIO_CLK

I/O

Strap pin

EXT_INT_N: External interrupt input from Host RF_I_CAL

O

SDIO_CLK: SDIO interface HIF_SPI_CLK: SPI serial clock

I I/O I

NA/SW

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MT6628Q Data Sheet Confidential A

Symbol

WLCSP bump

SDIO_CMD

J7

SDIO_DAT3

J6

SDIO_DAT2

H5

SDIO_DAT1

J5

SDIO_DAT0

H6

Description

PU/PD

GPIO19: GPIO19 in/out

I/O

SD_CMD: SDIO interface

I/O

HIF_SPI_CS: SPI chip select

NA/SW

F9

UART_TXD

E8

I

GPIO18: GPIO18 in/out

I/O

SDIO_DAT3: SDIO interface

I/O

HIF_SPI_DOUT: SPI data output

NA/SW

O

GPIO17: GPIO17 in/out

I/O

SDIO_DAT2: SDIO interface

I/O

HIF_SPI_DIN: SPI data input

NA/SW

I

GPIO16: GPIO16 in/out

I/O

SDIO_DAT1: SDIO interface

I/O

HIF_SPI_MODE_SEL: SPI mode select

NA/SW

I

GPIO15: GPIO15 in/out

I/O

SDIO_DAT0: SDIO interface

I/O

HIF_SPI_INT_B: SPI interrupt

NA/SW

GPIO14: GPIO14 in/out

UART_RXD

I/O

UART_RXD: UART RX data GPIO13: GPIO13 in/out UART_TXD: UART TX data GPIO12: GPIO12 in/out

O I/O I

PU/SW I/O O PU/SW I/O

UART_RTS: UART flow control UART_RTS

D9

GPIO11: GPIO11 in/out

PU/SW

Strap pin

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I/O I

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MT6628Q Data Sheet Confidential A

Symbol

WLCSP bump

Description

PU/PD

I/O

PU/SW

I

UART_CTS: UART flow control UART_CTS

E9

PCM_CLK

A10

PCM_SYNC

D10

PCM_OUT

B10

ECLOCK: AGPS DUTY ECLOCK GPIO10: GPIO10 in/out

I/O

PCM_CLK: PCM interface clock

I/O

I2S_CLK: FM I2S interface clock

PD/SW

DAI_CLK: digital audio interface clock

I

GPIO9: GPIO9 in/out

I/O

PCM_SYNC: PCM interface sync

I/O

I2S_WS: FM I2S interface WS

PD/SW

A9

AGPS_SYNC

B9

I

GPIO8: GPIO8 in/out

I/O

PCM_OUT: PCM interface output data

O

I2S_DATA_OUT: I2S interface output data

PD/SW

F8

O

GPIO7: GPIO7 in/out

I/O

I2S_DATA_OUT: I2S interface output data

I

PD/SW

E7

I

GPIO6: GPIO6 in/out

I/O

SYNC: AGPS SYNC GPIO5: GPIO5in/out

PD/SW

PCM2CLK: PCM2 interface clock I2S_WS: FM I2S word select

I I/O I/O

PD/SW

I/O I/O

PD/SW

PCM2SYNC: PCM2

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O

DAI_RX: digital audio interface RX data

GPIO4: GPIO4 in/out I2S_WS

O

DAI_TX: digital audio interface TX data

I2S_CLK: FM I2S interface clock I2S_CLK

I/O

DAI_SYNC: digital audio interface sync

PCM_IN: PCM interface input data PCM_IN

I/O

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I/O I/O

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MT6628Q Data Sheet Confidential A

Symbol

WLCSP bump

I2S_DATA_OUT

Description interface sync

PU/PD

GPIO3: GPIO3 in/out

I/O

I2S_DATA_OUT: FM I2S data output

O

PCM2OUT: PCM2 synchronous data output

D7

PD/SW

GPIO2: GPIO2 in/out WIFI_INT_B

WIFI_INT_B: WLAN host interrupt

H8

BGF_INT_B

K7

I/O

O I/O

PU/SW

O

GPIO1: GPIO1 in/out

I/O

ALL_INT_B: All interrupt to host

O

BGF_INT_B: BT, GPS & FM host interrupt

PU/SW

GPIO0: GPIO0 in/out

O I/O

Table 1. Pin descriptions

2.1.1

Strapping Table ANTSEL1

Description

0

TCXO

1

Xtal Table 2. Clock source selection

ANTSEL2

Description

0

SDIO

1

SPI

Table 3. WLAN host interface selection

UART_RTS

Description

0

UART

1

SDIO

Table 4. Common interface selection

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MT6628Q Data Sheet Confidential A

2.2

Package Information

2.2.1

WLCSP Packaging TOP VIEW

10 9 8 7 6 5 4 3 2 1

MTK MT6628QP DDDD-#### XXXXXXX

P: Package type code (WLCSP) DDDD: Date code ####: Internal control code XXXXXXX: LOT NO.

A B C D E F G H J K L PIN #1

Figure 2. MT6628Q WLCSP top marking

Figure 3. MT6628Q WLCSP POD (a)

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Figure 4. MT6628Q WLCSP POD (b)

Figure 5. MT6628Q WLCSP POD (c)

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Bump coordinates:

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3 3.1

Electrical Characteristics PMU Description

The power management unit (PMU) contains Under-Voltage Lockout (UVLO) circuit, Low Dropout Regulators (LDOs), LDO switch (TLDO_SW), buck converter and reference band-gap circuit. The PMU integrates three LDOs and one buck converter. Those circuits are optimized for the given functions by balancing quiescent current, dropout voltage, line/load regulation, ripple rejection and output noise. The input voltage of the buck converter ranges from 2.5V to 4.4V. Its output voltage is 1.7V and feeds into the input power of the RF circuit and input power of CLDO (core LDO) which has 1.2V output voltage for all digital circuits. There is only one PA LDO for WLAN with output voltage of 3.3V. There is also one dedicated LDO which provides 2.85V output voltage for RF blocks, ANTSEL IO power and TCXO via TLDO switch (TLDO_SW).

3.1.1

Under-Voltage Lockout (UVLO)

The UVLO state in the PMU prevents startup if the initial voltage of the main battery is below 2.15V threshold. It ensures that MT6628Q is powered on with the battery in good condition. The UVLO function is performed by a hysteretic comparator which ensures smooth power-on sequence. In addition, when the battery voltage is getting lower, it will enter the UVLO state, and the PMU will be turned off by itself to prevent further discharging.

3.1.2

WF_PA_LDO

WF_PA_LDO converts the battery input to a 3.3V supply for using WiFi RF PA circuits. It is optimized for high-performance and adequate quiescent current.

3.1.3

CLDO

One CLDO is integrated in the PMU to supply digital core. It converts voltage from1.7V input to 1.2V output which suits the digital circuits. The input is typically connected to the buck’s output.

3.1.4

Buck Converter

The regulator is a DC-DC step-down converter (buck converter) to source 300mA (max.) with 2.0V to 1.7V programmable output voltage based on the software register setting. It supplies power for the RF MediaTek Confidential

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MT6628Q Data Sheet Confidential A

circuitry and CLDO. The buck converter is optimized for high-efficiency, low-EMI, and low quiescent current.

3.1.5

PMU Power Connection

Two power connection methods are suggested. One is for normal mode, and the other is for lowpower mode. In the normal mode, the voltage source for RF and digital core LDO is from the DC-DC converter. The voltage source of PA and TCXO/XTAL LDOs is from VBAT directly. The 1.8V or 2.8V IO voltages are from the host side. The connection structure is shown in the figure below. In the system sleep mode, PA LDO and TCXO/XTAL LDO are turned off. The voltage source of the digital core LDO is switched to IO voltage instead of the DC-DC converter, which is also turned off.

DVDDIO*(1.8/2.8V)

IO

AVDD28_TLDO_SW OSC_IN

TCXO

TLDO_SW

REF CLK

ANTSEL IO power AVDD28_FM

TLDO (2.85V)

FM RF

AVDD28_OSC AVDD28_TLDO

RF WF_PA_LDO (3.3V)

Battery 2.3~4.4V AVDD55_*

BUCK (1.7V)

CLDO (1.2V)

WFLDO

AVDD33_TX_WBT

CLDO

DVDD

AVDD17_CLDO_IN

LXBK

Digital Block

AVDD16_*

BUCK LC

Figure 6. Normal mode power connection

Note that due to legacy naming, AVDD16_* is actually operated in 1.7V.

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3.2

Absolute Maximum Ratings Symbol

Parameter

Rating

Unit

DVDDIO

1.8V/2.8V digital IO power supply

-0.3 to 3.6

V

DVDDIO_SDIO

1.8V or 2.8V SDIO digital IO power supply

-0.3 to 3.6

V

DVDD

Digital 1.2V power supply

-0.3 to 1.32

V

VCCRTC

RTC power supply

-0.3 to 3.6

V

CLDO

Internal core LDO power supply

-0.3 to 3.6

V

TLDO WFLDO

Internal LDO power supply

-0.3 to 4.4

V

TLDO_SW

TLDO switch for TCXO

-0.3 to 3.6

V

AVDD28_* AVDD33_*

RF power supply

-0.3 to 3.6

V

AVDD16_*

RF power supply

-0.3 to 1.8

V

AVDD55_SMPS

BUCK power supply

-0.3 to 4.4

V

AVDD55_MISC

Power-on circuit supply

-0.3 to 4.4

V

TSTG

Storage temperature

-60 to +150

°C

TA

Operating temperature

-40 to +85

°C

Table 5. Absolute maximum ratings

3.3

Recommended Operating Range Symbol

Parameter 2.8V digital power supply

DVDDIO DVDDIO_SDIO

Min.

Typ.

Max.

Unit

2.0

2.8

3.3

V

1.8V digital power supply

1.6

1.8

2.0

V

DVDD

Digital core power supply

1.08

1.2

1.32

V

VCCRTC

RTC power supply

2.52

2.8

3.08

V

1.62

1.8

1.98

V

AVDD16_*

RF power supply

1.6

1.7

1.8

V

AVDD28_*

RF power supply

2.66

2.8

2.94

V

AVDD33_*

RF power supply

3.14

3.3

3.46

V

AVDD55_SMPS

BUCK power supply

2.5

3.8

4.4

V

AVDD55_MISC

Power-on circuit supply

2.3

3.8

4.4

V

0

25

115

°C

Industry junction operating temperature

-40

25

125

°C

Ta

Operation temperature

-40

25

85

°C

Tstg

Storage temperature

-60

25

150

°C

Commercial junction operating temperature

Tj

Table 6. Recommended operating range

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MT6628Q Data Sheet Confidential A

3.4

PMU Electrical Characteristics

3.4.1

PMU Characteristics Parameter

Conditions

Min.

Typ.

Max.

Unit

PMU_EN = 0: Shut down current 2.3V < VBAT < 4.3V

VBAT = 3.8V

20

25

μA

4.3V < VBAT

VBAT = 4.4V

25

35

μA

Under Voltage Lock-Out (UVLO) Under voltage rising threshold

2.25

V

Under voltage falling threshold

2.15

V

PMU_EN Voltage Level High voltage

1.4

V

Low voltage

1

V

Thermal Shutdown Threshold

150

°C

Hysteresis

40

°C

LDO Enable Response Time

250

μs

Parameter

Conditions

Min.

Typ.

Max.

Unit

Input voltage

2.5

3.8

4.4

V

Output voltage (OUT_BK)

1.6

1.7

1.8

V

300

mA

SMPS Voltage

Output current (Imax) Quiescent current Line regulation

@150mA

40

uA

0.5

%

Load regulation

30

PWM mode switching frequency

mV

1.7

MHz

PWM mode ripple voltage

Static load

20

mV

Burst mode ripple voltage

Static load

40

mV

PFM/PWM mode switching condition

VBAT = 3.8V

50

mA

Efficiency (PWM)

84

%

Efficiency (PFM)

82

%

Digital Core Voltage Input voltage

1.6

1.7

1.8

V

Output voltage (V_CLDO)

1.1

1.2

1.3

V

200

mA

Output current (Imax) Quiescent current Drop-out voltage

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0.5*Imax

15

uA

250

mV

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MT6628Q Data Sheet Confidential A

Parameter

Conditions

Min.

1*Imax

Typ.

Max.

350

Unit mV

Start-up time

450

us

Line regulation

12

mV

12

mV

Load regulation

1mA ~ Imax (full-load)

External output capacitor

1

uF

WLAN PA Voltage Input voltage

2.3

3.8

4.4

V

Output voltage (VWIFI_PALDO)

2.3

3.3

3.465

V

300

mA

Output current (Imax) Quiescent current

67

Line regulation Load regulation

1mA ~ Imax (full-load)

Output noise voltage

f = 10Hz to 80kHz

PSRR Drop-out voltage

uA 33

mV

33

mV

60

uVrms

At 1kHz

60

dB

At 30kHz

40

dB

0.5*Imax

250

mV

1*Imax

350

mV

Start-up time

320

External output capacitor

us uF

3.2(2.2+1)

TLDO Voltage Input voltage

2.3

3.8

4.4

V

Output voltage (VTLDO)

2.71

2.85

2.99

V

100

mA

Output current (Imax) Quiescent current

42

Line regulation Load regulation

1mA ~ Imax (full-load)

Output noise voltage

f = 10Hz to 80kHz

PSRR Drop-out voltage

uA 1

%

1

%

60

uVrms

At 1kHz

60

dB

At 30kHz

40

dB

0.5*Imax

250

mV

1*Imax

350

mV

Start-up time

320

External output capacitor

us

1

uF

2.85

V

TLDO switch Input voltage Output voltage (TLDO_SW)

2.66

V

Output current (Imax)

10

External output capacitor

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mA uF

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Table 7. PMU characteristics

3.4.2

PMU Summary List

Item

LDO/Switcher

Voltage

Current

Description

1

DVDDIO18

1.6V/1.8V/2.0V

400mA

Digital 1.8V IO

1

SMPS

1.7V

300mA

Buck output

2

VCORE

1.2V

200mA

Digtial CORE

3

VWF_PALDO

3.3V

300mA

WLAN PA LDO

6

VTLDO

2.85V

100mA

TCXO LDO

6

TLDO_SW

2.8V

10mA

TCXO SW

Table 8. PMU summary list Note: All the characteristic values are guaranteed at room temperature (25°C).

3.5

XOSC32

3.5.1

Block Description

The low-power 32-kHz crystal oscillator, XOSC32, is designed to work with an external piezoelectric 32.768 kHz crystal and a load composed of two functional capacitors, as shown in the figure below.

Figure 7. Block diagram of XOSC32

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3.5.2

Functional Specifications of XOSC32 Symbol

Parameter

Min.

Typ.

Max.

Unit

1

2.8

3

V

1

sec

VCCRTC

Analog power supply

Tosc

Start-up time

Dcyc

Duty cycle

50

%

Current consumption

5

μA

Table 9. Functional specifications of XOSC32

3.5.3

Recommendations for Crystal Parameters for XOSC32 Symbol

Parameter

Min.

F

Frequency range

GL

Drive level

∆f/f

Frequency tolerance

Typ.

Max.

Unit

32768

Hz 5

uW

+/- 20

ppm

ESR

Series resistance

50

KΩ

C0

Static capacitance

1.6

pF

12.5

pF

1

CL

Load capacitance

6

Table 10. Recommended parameters of the 32 kHz crystal

3.6

DC Electrical Characteristics for 2.8 Volts Operation

Symbol

Parameter

Condition LVTTL

Min.

Max.

Unit

-0.28

0.6

V

VIL

Input low voltage

VIH

Input high voltage

2.0

3.08

V

VT-

Schmitt trigger negative going threshold voltage

0.68

1.36

V

VT+

Schmitt trigger positive going threshold voltage

1.36

1.7

V

VOL

Output low voltage

|IOL| = 1.6~14mA

-0.28

0.4

V

VOH

Output high voltage

|IOH| = 1.6~14mA

2.4

VDD28 + 0.28

V

RPU

Input pull-up resistance

PU=high, PD=low

40

190

KΩ

RPD

Input pull-down resistance

PU=low, PD=high

40

190

KΩ

LVTTL

Table 11. Pin descriptions

1

CL is the parallel combination of C1 and C2 in the block diagram.

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3.7

DC Electrical Characteristics for 1.8 Volts Operation Symbol

Parameter

Condition

Min.

Max.

Unit

-0.18

0.4

V

1.5

1.98

V

0.44

0.88

V

0.88

1.1

V

VIL

Input lower voltage

VIH

Input high voltage

VT-

Schmitt trigger negative going threshold voltage LVTTL

VT+

Schmitt trigger Positive going threshold voltage

VOL

Output low voltage

|IOL| = 1.6~14mA

-0.18

0.4

V

VOH

Output high voltage

|IOH| = 1.6~14mA

1.4

VDD18 + 0.18

V

RPU

Input pull-up resistance

PU=high, PD=low

40

190

KΩ

RPD

Input pull-down resistance

PU=low, PD=high

40

190

KΩ

LVTTL

Table 12. Pin descriptions

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ESD CAUTION MT6628Q is ESD (electrostatic discharge) sensitive device and may be damaged with ESD or spike voltage. Although MT6628Q is with built-in ESD protection circuitry, please handle with care to avoid the permanent malfunction or the performance degradation.

Use of the GPS Data and Services at the User's Own Risk The GPS data and navigation services providers, system makers and integrated circuit manufactures (“Providers”) hereby disclaim any and all guarantees, representations or warranties with respect to the Global Positioning System (GPS) data or the GPS services provided herein, either expressed or implied, including but not limited to, the effectiveness, completeness, accuracy, fitness for a particular purpose or the reliability of the GPS data or services. The GPS data and services are not to be used for safety of life applications, or for any other application in which the accuracy or reliability of the GPS data or services could create a situation where personal injury or death may occur. Any use is at the user’s own risk. The Providers specifically disclaims any and all liability, including without limitation, indirect, consequential and incidental damages, that may arise in any way from the use of or reliance on the GPS data or services, as well as claims or damages based on the contravention of patents, copyrights, mask work and/or other intellectual property rights. No part of this document may be copied, distributed, utilized, and transmitted in any form or by any means without expressed authorization of all Providers. The GPS data and services are in part or in all subject to patent, copyright, trade secret and other intellectual property rights and protections worldwide. MediaTek reserves the right to make change to specifications and product description without notice

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