Resistive Switching: Oxide Materials, Mechanisms, Devices and Operations 3030424235, 9783030424237

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Electronic Materials: Science & Technology

Jennifer Rupp Daniele Ielmini Ilia Valov   Editors

Resistive Switching: Oxide Materials, Mechanisms, Devices and Operations

Electronic Materials: Science & Technology

Series Editor Harry L. Tuller, Cambridge, MA, USA

The series Electronic Materials: Science and Technology will address the following goals: • Bridge the gap between theory and application • Foster and facilitate communication among materials scientists, electrical engineers, physicists and chemists • Provide publication with an interdisciplinary approach in the following topic areas: – Sensors and Actuators – Electrically Active Ceramics and Polymers – Structure-Property-Processing-Performance Correlations in Electronic Materials – Electronically Active Interfaces – High Tc Superconducting Materials – Optoelectronic Materials – Composite Materials – Defect Engineering – Solid State Ionics – Electronic Materials in Energy Conversion – Solar Cells, High Energy Density Microbatteries, Solid State Fuel Cells, etc. More information about this series at http://www.springer.com/series/5915

Jennifer Rupp • Daniele Ielmini • Ilia Valov Editors

Resistive Switching: Oxide Materials, Mechanisms, Devices and Operations

Editors Jennifer Rupp Massachusetts Institute of Technology Cambridge, MA, USA Ilia Valov Research Centre Juelich J¨ulich, Germany

Daniele Ielmini Elettronica, Informazione Bioingegneria Politecnico di Milano, Dipto di Milano MILANO, Italy

ISSN 1386-3290 Electronic Materials: Science & Technology ISBN 978-3-030-42423-7 ISBN 978-3-030-42424-4 (eBook) https://doi.org/10.1007/978-3-030-42424-4 © Springer Nature Switzerland AG 2022 This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use. The publisher, the authors, and the editors are safe to assume that the advice and information in this book are believed to be true and accurate at the date of publication. Neither the publisher nor the authors or the editors give a warranty, expressed or implied, with respect to the material contained herein or for any errors or omissions that may have been made. The publisher remains neutral with regard to jurisdictional claims in published maps and institutional affiliations. This Springer imprint is published by the registered company Springer Nature Switzerland AG The registered company address is: Gewerbestrasse 11, 6330 Cham, Switzerland

Contents

Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Jennifer Rupp, Ilia Valov, and Daniele Ielmini

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Memristive Computing Devices and Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mohammed A. Zidan, An Chen, Giacomo Indiveri, and Wei D. Lu

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Resistive Random Access Memory (RRAM) Technology: From Material, Device, Selector, 3D Integration to Bottom-Up Fabrication . . . . . Hong-Yu Chen, Stefano Brivio, Che-Chia Chang, Jacopo Frascaroli, Tuo-Hung Hou, Boris Hudec, Ming Liu, Hangbing Lv, Gabriel Molas, Joon Sohn, Sabina Spiga, V. Mani Teja, Elisa Vianello, and H.-S. Philip Wong Review of Mechanisms Proposed for Redox Based Resistive Switching Structures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ilan Riess Probing Electrochemistry at the Nanoscale: In Situ TEM and STM Characterizations of Conducting Filaments in Memristive Devices. . . . . . . . Yuchao Yang, Yasuo Takahashi, Atsushi Tsurumaki-Fukuchi, Masashi Arita, M. Moors, M. Buckwell, A. Mehonic, and A. J. Kenyon

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Nanoscale Characterization of Resistive Switching Using Advanced Conductive Atomic Force Microscopy –Based Setups . . . . . . . . . . . . . . . . . . . . . . . 121 Mario Lanza, Umberto Celano, and Feng Miao SiO2 -Based Conductive-Bridging Random Access Memory . . . . . . . . . . . . . . . . 147 Wenhao Chen, Stefan Tappertzhofen, Hugh J. Barnaby, and Michael N. Kozicki Reset Switching Statistics of TaOx -Based Memristor . . . . . . . . . . . . . . . . . . . . . . . . 187 Xiaojuan Lian, Miao Wang, Peng Yan, J. Joshua Yang, and Feng Miao

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Effect of O2− Migration in Pt/HfO2 /Ti/Pt Structure . . . . . . . . . . . . . . . . . . . . . . . . . 197 Maxime Thammasack, Giovanni De Micheli, and Pierre-Emmanuel Gaillardon Operating Mechanism and Resistive Switching Characteristics of Two- and Three-Terminal Atomic Switches Using a Thin Metal Oxide Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 209 Tohru Tsuruoka, Tsuyoshi Hasegawa, Kazuya Terabe, and Masakazu Aono Interface-Type Resistive Switching in Perovskite Materials . . . . . . . . . . . . . . . . 235 S. Bagdzevicius, K. Maas, M. Boudard, and M. Burriel Volume Resistive Switching in Metallic Perovskite Oxides Driven by the Metal-Insulator Transition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 289 Juan Carlos Gonzalez-Rosillo, Rafael Ortega-Hernandez, Júlia Jareño-Cerulla, Enrique Miranda, Jordi Suñe, Xavier Granados, Xavier Obradors, Anna Palau, and Teresa Puig Resistive States in Strontium Titanate Thin Films: Bias Effects and Mechanisms at High and Low Temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311 M. Kubicek, S. Taibl, E. Navickas, H. Hutter, G. Fafilek, and J. Fleig Single-Crystalline SrTiO3 as Memristive Model System: From Materials Science to Neurological and Psychological Functions . . . . . . . . . . . . 333 Xue-Bing Yin, Zheng-Hua Tan, Rui Yang, and Xin Guo Optical Memristive Switches. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 355 Ueli Koch, C. Hoessbacher, A. Emboras, and J. Leuthold Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 377

Preface Jennifer Rupp, Ilia Valov, and Daniele Ielmini

Keywords Resistive switching · ReRAM · Ceramics · Electrical properties · Oxides

Emulation of neural networks by redox-based Resistive Random Access Memories (ReRAMs) with components such as thin films of ceramic materials is considered by the technological roadmap (ITRS) as a promising concept for the next-generation nonvolatile memory storage and as an important key toward computation with neuromorphic algorithms. ReRAMs are regarded as conceptually new building units in modern nanoelectronics, finding application not only as a memory, but also as selectors, for logic operations and neuromorphic computing circuits beyond the von Neumann concept, being capable of bioinspired cognitive functions, such as machine learning and pattern recognition. The information is saved in ReRAMs as particular resistances of the devices adjustable by voltage stimuli, where, in the most simple case, the high resistive state represents the Boolean 0 and the low resistive state, the Boolean 1. The devices show outstanding potential for scaling down to the

This chapter was originally published as a paper in the Journal of Electroceramics: Jennifer L. M. Rupp, Ilia Valov, Daniele Ielmini, “Editorial for the JECR special issue on resistive switching: Oxide materials, mechanisms, and devices,“ J Electroceramics, Vol. 39, nos 1–4 (2017), Pages 1–3. DOI: http://dx.doi.org/10.1007/s10832-017-0108-8. J. Rupp () Massachusetts Institute of Technology Cambridge, MA, USA e-mail: [email protected] I. Valov Research Centre Juelich, Jülich, Germany D. Ielmini Elettronica, Informazione Bioingegneria Politecnico di Milano, Dipto di Milano, MILANO, Italy © Springer Nature Switzerland AG 2022 J. Rupp et al. (eds.), Resistive Switching: Oxide Materials, Mechanisms, Devices and Operations, Electronic Materials: Science & Technology, https://doi.org/10.1007/978-3-030-42424-4_1

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atomic level, integration, low-power consumption, sub-nanosecond operation time range, and digital and/or analog volatile and/or nonvolatile information storage. In these devices, the switching relies on redox reactions and mixed ionic-electronic transport at the nanoscale, in cells/devices of the type MEM (metal-electrolytemetal) or MIM (metal-insulator-metal) where oxides and higher chalcogenides are typically used as ion conducting materials. ReRAM devices are operated at extremely harsh conditions characterized by high electric fields (up to ~108 V/m) and extremely high current densities in the range above MA/cm2 and show perspective for future memory and neuromorphic computing devices. In this volume, which originated as a special issue of the Journal of Electroceramics, we present a selection of invited and contributed articles that focus on both materials and device aspects. These papers span a wide range, reviewing and proposing materials for the switching oxides, including investigation of the switching mechanism, highlighting the involved nanionic processes, and highlighting novel operation principles. We are fortunate to have attracted 16 high-quality and timely contributions to this issue composed of invited reviews highlighting either material, probing, or device aspects on the theme of this special issue. An invited review on resistive switching devices and their applications as mixed signal analog–digital neuromorphic computing architectures and other application fields by Zidan, Chen, Indiveri, and Lu leads off this collection [1]. In this paper, the development and opportunities of memristive switching devices for replacing classic binary transistors and potential computing architectures are discussed by the authors. Resistive switches offer the intrinsic ability of ready processing in 3D memory array architectures with exciting potential for mass storage applications and handling of big data. In a joint contribution led by Chen et al., colleagues from Stanford, GigaDevice Semiconductor Inc., IMM-CNR, National Chiao Tung University, Chinese Academy of Science, and Minatec Campus Grenoble came together to present recent advances from materials and devices, to 3D integration and bottom-up ReRAM fabrication [2]. A general overview on modeling resistive switching across scales ranging from electrons to device level to elucidate best architectures for resistive switching materials is given by Ambroio, MagyariKöpe, Onofrio, Islam, Duncan, Nishi, and Strachan [3]. Following this work, Riess discusses conditions for resistive switching in oxide conductors including the effects of humidity and protons in ambient [4]. Yang, Takahashi, Tsurumaki-Fukuchi, Arita, Moors, Buckwell, Mehonic, and Keynon turn to the atomistic scale and review in situ TEM and STM probing characterization techniques of conducting filaments in memristive devices [5]. Special emphasis on conductive atomic force microscopy (c-AFM) as a tool to capture resistive switching processes in oxides is debated by Lanza, Celano, and Miao [6]. Turning to understanding and designing oxide architectures, Chen, Tappertzhofen, Barnaby, and Kozicki explore the virtues of SiO2 -based conductive bridging random access memories and discuss insight into their memory array and neuromorphic computing applications [7]. Lian, Wang, Yan, Yang, and Miao newly propose a criteria for selecting high-performance memristor materials based on the statistical results and the temperature evolution of

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conductive filaments with examples of TaOx , HfO2 , and NiO as resistive switching materials [8]. Hafnium oxide, an important memory material in the electronics industry, is studied in its oxygen ionic migration and switching characteristics by Thammasack, De Micheli, and Gaillardon [9]. The role of Ti interlayers on the switching dynamics is the focus of their work. To allow a high versatility of ReRAM architectures, the mode of operation as either a 2- or 3-terminal device is explored, with implications for oxide nanostructures and switching characteristics presented by Tsuuoka, Hasegawa, Terabe, and Aono [10]. Following this work, the team of Burriel with Bagdzevicius, Maas, and Boudard reviews the recent progress on perovskite materials as resistive switching oxides [11]. Here, it is the choice of the cations that defines the overall mixed ionic electronic transport and redox processes of the material class, where careful guidelines on structure, chemistry, and doping are presented for their use as resistive switches. The role of metalinsulator transitions on resistive switching of perovskite oxides and the potential impact on structural and chemical design rules are discussed by Gonzales-Rosillo and coworkers from the Puig group [12]. Kubicek, Taibl, Navickas, Hutter, Fafilek, and Fleig investigate and review bias effects and mechanisms at high and low temperature for strontium titanate perovskites [13]. Yang and the Guo team explore how strontium titanate can be employed as resistive switch to emulate neurological and psychological functions [14]. Raeis-Hosseini and Lee review resistive switching memories using biomaterials based on flexible nanoelectronics [15]. Finally, optical memristive switches are discussed by Koch, Hossbacher, Emboras, and Leuthold [16]. Concluding, the editors highlight the fact that the property of oxide-ceramics employed as resistive switches contributes to new discoveries on material behavior at high local electric fields, phases, structures, and electrochemistry. In a utopic version, these are the keys to fast data transfer, computation, and high capacity information storage, and define the future of nanoelectronics and information technology. The collected studies show that the field is excitingly crossing boundaries where material science, electrical engineering, computer science, electrochemistry, and neurological science unite to tackle new ways to compute beyond classic binary transistors, dominant for decades. One may see this as a contribution to the Fourth Industrial Revolution for which simple material structures and easy implementation of switching devices may have fast and immediate impact on society. Acknowledgments All authors and contributors are thanked by the guest editors for their highquality work, critical discussion, and sharing of scientific concepts and discoveries through this special issue. The editors were especially thankful to the open attitude of authors coming together from various teams around the world to provide unique review articles on selected hot topics. Finally, we thank Prof. Harry Tuller, Editor-in-Chief of JECR and the Electronic Materials: Science and Technology book series, for his enthusiasm and dedication to the field of Electroceramics.

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References 1. M.A. Zidan, A. Chen, G. Indiveri, W.D. Lu, Memristive computing devices and applications. J. Electroceram. 39, 4–20 (2017) 2. H.-Y. Chen, S. Brivio, C.C. Chang, J. Frascaroli, T.H. Hou, B. Hudec, M. Liu, H. Lv, G. Molas, J. Sohn, S. Spiga, V.M. Teja, E. Vianello, H.-S.P. Wong, Resistive random access memory (RRAM) technology: From material, device, selector, 3D integration to bottom-up fabrication. J. Electroceram. 39(1–4), 21–38 (2017) 3. S. Ambrogio, B. Magyari-Köpe, N. Onofrio, M.M. Islam, D. Duncan, Y. Nishi, A. Strachan, Modeling resistive switching materials and devices across scales. J. Electroceram. 39(1–4), 39–60 (2017) 4. I. Riess, Review of mechanisms proposed for redox based resistive switching structures. J. Electroceram. 39, 61–72 (2017) 5. Y. Yang, Y. Takahashi, A. Tsurumaki-Fukuchi, M. Arita, M. Moors, M. Buckwell, A. Mehonic, A.J. Kenyon, Probing electrochemistry at the nanoscale: in situ TEM and STM characterizations of conducting filaments in memristive devices. J. Electroceram. 39(1–4), 73– 93 (2016) 6. M. Lanza, U. Celano, F. Miao, Nanoscale characterization of resistive switching using advanced conductive atomic force microscopy based setups. J. Electroceram. 39(1–4), 94–108 (2017) 7. W. Chen, S. Tappertzhofen, H.J. Barnaby, M.N. Kozicki, SiO2 based conductive bridging random access memory. J. Electroceram. 39(1–4), 109–131 (2017) 8. X. Lian, M. Wang, P. Yan, J.J. Yang, F. Miao, Reset switching statistics of TaOx-based memristor. J. Electroceram. 39(1–4), 132–136 (2016) 9. M. Thammasack, G. De Micheli, P.E. Gaillardon, Effect of O2− migration in Pt/HfO2 /Ti/Pt structure. J. Electroceram. 39(1–4), 137–142 (2017) 10. T. Tsuruoka, T. Hasegawa, K. Terabe, M. Aono, Operating mechanism and resistive switching characteristics of two- and three-terminal atomic switches using a thin metal oxide layer. J. Electroceram. 39(1–4), 143–156 (2016) 11. S. Bagdzevicius, K. Maas, M. Boudard, M. Burriel, Interface-type resistive switching in perovskite materials. J. Electroceram. 39(1–4), 157–184 (2017) 12. J.C. Gonzalez-Rosillo, R. Ortega-Hernandez, J. Jareño-Cerulla, E. Miranda, J. Suñe, X. Granados, X. Obradors, A. Palau, T. Puig, Volume resistive switching in metallic perovskite oxides driven by the metal-insulator transition. J. Electroceram. 39(1–4), 185–196 (2017) 13. M. Kubicek, S. Taibl, E. Navickas, H. Hutter, G. Fafilek, J. Fleig, Resistive states in strontium titanate thin films: Bias effects and mechanisms at high and low temperature. J. Electroceram. 39(1–4), 197–209 (2017) 14. X.-B. Yin, Z.-H. Tan, R. Yan, X. Guo, Single crystalline SrTiO3 as memristive model system: From materials science to neurological and psychological functions. J. Electroceram. 39(1–4), 210–222 (2017) 15. N. Raeis-Hosseini, J.-S. Lee, Resistive switching memory using biomaterials. J. Electroceram. 39(1–4), 223–238 (2017) 16. U. Koch, C. Hoessbacher, A. Emboras, J. Leuthold, Optical memristive switches. J. Electroceram. 39(1–4), 239–250 (2017)

Memristive Computing Devices and Applications Mohammed A. Zidan, An Chen, Giacomo Indiveri, and Wei D. Lu

Abstract Advances in electronics have revolutionized the way people work, play, and communicate with each other. Historically, these advances were mainly driven by CMOS transistor scaling following Moore’s law, where new generations of devices are smaller, faster, and cheaper, leading to more powerful circuits and systems. However, conventional scaling is now facing major technical challenges and fundamental limits. New materials, devices, and architectures are being aggressively pursued to meet present and future computing needs, where tight integration of memory and logic and parallel processing are highly desired. To this end, one class of emerging devices, termed memristors or memristive devices, have attracted broad interest as a promising candidate for future memory and computing applications. Besides tremendous appeal in data storage applications, memristors offer the potential to enable efficient hardware realization of neuromorphic and analog computing architectures that differ radically from conventional von Neumann computing architectures. In this chapter, we analyze representative memristor devices and their applications, including mixed signal analog-digital neuromorphic

This chapter was originally published as a paper in the Journal of Electroceramics: Mohammed A. Zidan, An Chen, Giacomo Indiveri, Wei D. Lu, “Memristive computing devices and applications,” J Electroceramics, Vol. 39, nos 1–4 (2017), Pages 4–20. DOI: http://dx.doi.org/10.1007/ s10832-017-0103-0. M. A. Zidan · W. D. Lu () Department of Electrical Engineering & Computer Science, University of Michigan, Ann Arbor, MI, USA e-mail: [email protected] A. Chen Nanoelectronics Research Initiative (NRI), Semiconductor Device Corporation, Durham, NC, USA G. Indiveri Institute of Neuroinformatics, University of Zurich and ETH Zurich, Zurich, Switzerland © Springer Nature Switzerland AG 2022 J. Rupp et al. (eds.), Resistive Switching: Oxide Materials, Mechanisms, Devices and Operations, Electronic Materials: Science & Technology, https://doi.org/10.1007/978-3-030-42424-4_2

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computing architectures, and highlight the potential and challenges of applying such devices and architectures in different computing applications.

1 Introduction As we approach the end of a computing era, the search for futuristic alternatives is on high gear. Historically, computers steadily achieve better performance over time through Moore’s law scaling of the basic logic device – silicon transistor. However, continued performance gains through simple device scaling can no longer be sustained after hitting the heat wall and the memory wall in the early 2000s, while transistor scaling itself will also soon reach fundamental physical limits [1– 4]. Moreover, current computers are not optimized for many of today’s applications, which typically involve large amounts of and demand high throughput and/or low power. To fulfill these new demands, the development of new driving technologies at the device level and new computing paradigms at the system level needs to occur concurrently. In recent years, an emerging class of devices, termed memristors (memristive devices), have gained strong interest as a promising candidate for future data storage and efficient parallel computing paradigms [5–9]. At the device level, memristor-based memories and logic circuits have already shown great potential to help extend the lifetime of classical computing architectures [6, 10]. At the system level, a new class of analog/digital neuromorphic architectures has emerged [9, 11– 13], which can exploit the physics of such resistive devices to directly and naturally implement brain-inspired computing paradigms [5, 14–16], making them extremely attractive for efficient computing systems that can attack data-intensive tasks in both the near term and the long term. Memristors are two-terminal devices that store their state in the form of different values of resistance (Fig. 1a) [17, 18]. In a typical device, the resistance state can be changed from a high-resistance state (HRS) to a low-resistance state (LRS) when the bias voltage is above a threshold voltage during a so-called SET process. The device will maintain the new resistance value, until it is subjected to a RESET process, where the resistance can be switched back to the HRS, and vice versa. The SET and RESET processes can depend on the voltage polarity (Fig. 1a) or are independent on the voltage polarity (Fig. 1b), in so-called bipolar and unipolar devices, respectively. This capability enables such devices to serve as memory elements and simultaneously as (two-terminal) switches. The resistive memory effect has been demonstrated based on different switching mechanisms, as summarized in Fig. 1c. Specifically, redox devices rely on an oxidation/reduction mechanism of ionic species to change the local chemical composition and physical properties of the switching layer, typically in the form of creating and annihilation of a conductive filament, leading to reversible changes of local resistivity and overall device resistance [19–21]. Devices based on electronic effects depend on effects such as electron trapping [22] and insulator-metal transition processes in a Mott insulator [23–25]. Phase change (PCM) devices rely on changing the phase,

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Fig. 1 (a) Bipolar switching behavior of a memristive device. (Inset) Crosspoint structure of the two-terminal device. (b) Unipolar switching behavior. (c) Categories of memristive devices based on the memory effect mechanism

either amorphous (high resistance) or crystalline (low resistance) of the material [26, 27]. Spin torque transfer (STT) devices rely on the switching of the relative magnetic orientation of a spin valve, with parallel orientation leading to LRS and antiparallel orientation leading to HRS [28]. Finally, MEMS-based devices depend on mechanical movements that bring the electrodes closer (LRS) or further apart (HRS) [29]. Each of these devices offers a set of strengths and weakness that may

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fit specific applications. However, in this chapter, we will focus on redox devices, which have generated intense research interest due to their generally promising resistive switching properties, CMOS compatibility, and their proven ability to integrate within computing systems. PCM devices will also be discussed briefly, since they mostly share the same application domains as redox devices and are technically more mature at the current stage and hence may potentially lead to early applications. The organization of this chapter is as follows. We will first introduce the different memristive device technologies (focusing on redox and PCM types), followed by discussions on the role of such new device technologies in classical memory and digital logic systems. Next, we discuss the potential of memristive devices to enable emerging computing approaches, including neural networks, analog computing, and stochastic computing. Each of the considered computing application is assessed based on the required device performance metrics including endurance, variability, nonlinearity, ON/OFF ration, power consumption, and switching behavior. Finally, we relate the application requirements to what the current device technology can offer. By performing the device- and system-level analysis, the goal is to hopefully provide an insight into the status of the memristor device research and the required future developments to meet the challenges of the applications.

2 Memristive Devices Based on Redox Processes The most widely studied memristive devices are the ones based on redox processes that involve active cation or anion species. A redox device is typically fabricated in a metal-insulator-metal (MIM) structure, where the insulator is a thin dielectric layer (typically a few nanometers thick) within which the resistive switching (RS) takes place. At these nanoscale dimensions, the dielectric layer can act as a solid electrolyte system for the ionic species, rather than a conventional insulator [30]. Specifically, even a moderate voltage drop can create a large enough electric field that in turn leads to an exponential speedup effect on the ionic oxidation, migration, and reduction processes [30]. With the electrolyte’s ability to dissolve and conduct ions, it facilitates a series of electrochemical reactions that lead to the oxidation/reduction and migration of the cations or anions, and subsequently a modification of the local chemical compositions of the film and changes of the film’s physical properties including its resistance. In most redox devices, the memory effect is driven by the formation and modulation/annihilation of a localized conductive filament, although RS based on interface effects has also been observed. The two main types of redox-based memristive devices, depending on the nature of the active ionic species (cation or anion), are specifically discussed below.

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Fig. 2 (a) Stages of filament formation and annihilation in an M-ion device [31]. (b, c) TEM images of a lateral device showing the creation (b) and rupture (c) of nanoscale filaments [32]

2.1 Metal-Ion-Based Devices The metal-ion (M-ion)-based devices are generally known as conductive bridge RAM (CBRAM) or electrochemical metallization cell (ECM). The device structure is asymmetric, with one active metal (typically Ag or Cu) electrode and an inert metal electrode in the MIM structure. Applying a high enough positive voltage to the active electrode oxidizes the metal atoms into ions and subsequently dissolves the metal ions into the thin film electrolyte. Under the applied electric field, the metal ions then migrate through the electrolyte film and finally become reduced into metal atoms that eventually form metallic clusters, schematically shown in Fig. 2a. These sequential processes lead to the nucleation and continued growth of the (metallic) filament until the two electrodes become connected, and the device resistance abruptly drops to the LRS. This process corresponds to the SET process. Afterward, the filament can be erased by applying a negative voltage to the active electrode, which will reverse the electrochemical processes and lead to the rupture of the filament, corresponding to the RESET process. Figure 2b, c shows transmission electron microscopy (TEM) images verifying the formation of a complete filament after SET and the rupture of the filament after RESET [32]. The dynamic growth of the metallic filament can be affected by the ion mobility (μ) and the redox rate (), as discussed in [33]. The expansion and shrinkage of the metal clusters depend on the supply of the ions that facilitates the filament formation. The ions supply, in turn, is determined by the redox rate (oxidation and

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Fig. 3 Dependence of the filament growth dynamics on the ion mobility (μ) and the redox rate (). Both parameters are also dependent on the applied electric field [33]

reduction rates), as well as by the speed of the ion migration in the electrolyte (the ion mobility). Different growth modes have been observed experimentally and can be successfully explained by the relative strength of the two dynamic factors ion mobility (μ) and the redox rate (), as shown in Fig. 3. The values of (μ) and () can be tuned by the careful selection of the electrode material and the switching materials, as well as the operating conditions since both of them can be strongly affected by the applied electric field. Typically, Cu and Ag are the materials of choice for the active electrode due to their ability to dissolve in thin film electrolytes at low electric fields and their high ionic mobility [33]. For the solid electrolyte layer, a very wide range of materials have been explored, including oxides [21], chalcogenides [34], and organic materials. Originally, chalcogenides were chosen due to the high diffusivity of the active metal species in these films. However, these devices normally suffer from high programming current and very low RESET voltage (comparable to the thermal voltage) that increases accidental reset error, along with material compatibility issues [35]. As a result, recent studies on CBRAM devices have focused on conventional insulator-based MIM structures that also offer promising device performance. M-ion-based devices have shown several key strengths including high scalability, fast switching time, low SET and RESET voltage, low current, high ON/OFF, and CMOS compatibility [19, 36–38]. However, device variability and endurance may pose challenges in some applications [38, 39]. The source of the variability is the stochastic nature of the filament creation, where the filament shape and the contact point may not be consistent over switching cycles. A tradeoff has been observed between the switching voltage and the variability based on the electrolyte material selection [35]. The endurance issue originates from the fact that the conductive filament is composed of foreign ionic inclusions from the active metal, which may

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cause stress to the dielectric film and can eventually lead to permanent plastic deformation if programming conditions are not optimally set [40]. As a result, a typical M-ion-based device can reach 106 SET/RESET cycles that is sufficient for date storage, but further improvements of the cycling (e.g., 1015 ) to that required for a main memory (e.g., DRAM) will require extensive material and system optimizations. Table 1 summarizes the set of materials used to fabricate M-ion devices and their key features.

2.2 Oxygen-Ion-Based Devices Besides metal ions, the redox and migration processes of anions, most commonly oxygen-ions (and subsequently oxygen-vacancies, VO s) are also widely used to build memristive devices. There are three types of oxygen-ion (or oxygen vacancy)based redox devices, the valency change memory (VCM), thermochemical memory (TCM), and filament-less (interface-type) devices. In VCM and TCM, switching relies on the creation and annihilation of a VO -rich filament. While VCM is electric field-driven and exhibits a bipolar electrochemical switching behavior, TCM relies on a thermochemical fusing and anti-fusing process and thus exhibits unipolar switching behavior. Filament-less devices rely on interface effects to modulate a Schottky or tunnel barrier between the switching layer and an electrode. Out of the three oxygen-ion-based redox devices, VCM is generally considered the most promising, as TCM devices suffer from higher power consumption needed to create the temperature rise and lower integration density due to thermal interference among neighboring cells, while interface-type devices normally suffer from shorter retention time. As a result, we will be focusing our discussions on VCM memory here. In contrast to M-ion devices, oxygen-ion devices, including VCM, normally use inert electrodes, and the active species (i.e., oxygen ions) are native to the switching layer, typically a transition metal oxide. Active metals are not employed in VCM memory to avoid metal-ion migration that complicates the programming process. An asymmetry is typically built-in the device, such that one of the oxide/electrode interface has high VO concentration and serves as a reservoir for oxygen vacancies during RS, while the oxide film near the other interface is close to be stoichiometric and thus exhibits high resistance [38]. Under an applied electrical field, oxygen vacancy diffusion from the reservoir layer and associated redox processes can increase the local VO concentration in the switching layer. These localized oxygen vacancy-rich regions serve as conducting channels (filaments) and can be subsequently reset and set again through applied bias voltages [57]. A forming process may be required to create the initial high-density oxygen vacancy regions for a device in the initial state. Figure 4a, b shows the steps of the conductive filament formation process in a typical VCM, along with TEM evidence of a localized region with substantial oxygen-ion concentration change. After forming, repeated switching can be obtained by modulating the VO concentration in the

Inert metal (e.g., Ta [20], Pt [45])

Ohmic contact

PCM

Electrode 1 Active metal (e.g., Ag [36], Cu [19])

O-ion (VCM)

M-ion (ECM)

Ohmic contact

Ohmic contact [20]

Electrode 2 Ohmic contact (metal [34, 36] or polysilicon [19])

Switching layer Insulators (e.g., Al2 O3 ,21 a-Si [41], SiO2 [42], Ta2 O5 [43]), chalcogenides [34] (e.g., GeS [36]), organic materials [44] Mainly oxygen deficient oxides (e.g., TaOx [20], HfOx [46], TiOx [18], SrTiOx [47], AlOx [48]) Chalcogenides (ex: GST [26, 53], GeTe/Sb2Te3 [53, 54] & AIST [53]) Material phase change between amorphous and crystalline states

Modulation of oxygen-vacancy concentration in a localized filament region

Mechanism Oxidation and reduction of metal-ions to create/remove a metallic filament

Table 1 Materials, mechanism, and properties of the Redox and PCM device

Unipolar switching, high current, lower endurance (109 ), high power consumption, large feature size [26, 55, 56]

Higher current and variability [38, 52]

High endurance (1012 ), excellent retention, small feature size, fast switching, analog switching [38, 49–52]

Unipolar switching, low voltage, multi-level operation, more mature [26, 55]

Weaknesses Lower endurance (108 ), higher variability [38, 39]

Strengths Low current, low voltage, small feature size, fast switching, forming free, excellent retention, high ON/OFF ratio [19, 36–38].

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Fig. 4 (a) TEM images showing the creation of a localized region (Ti4 O7 ) with lower Ti valency in a TiO2 film [58]. (b) Schematics showing the creation and annihilation of an oxygen-vacancyrich filament [59] (c) Multi-level switching for a SrTiO3 device [60]

filament region. It is also common to fabricate VCM devices using two oxide layers, with one containing higher VO concentration than the other [61]. The filament is created in the low VO density layer, while the other layer acts as a source for the oxygen vacancies. Recent progresses in VCM research have led to devices with desirable memory characteristics including excellent scaling, fast switching, and high endurance (1012 ). Additionally, these devices can switch in an analog or multi-level fashion, enabling multilevel state representation, as shown in Fig. 4c. The incremental resistance change is desirable for applications such as neuromorphic computing, as will be discussed later in Sect. 5.1. However, further development is still needed to improve the device variability and lower the programming current. In particular, considering VCM devices typically show lower on/off (e.g., 10–100) compared to M-ion-based devices (>103 ), controlling the device variability is particularly important for large-scale applications of VCM. Reducing the programming current to μA or even lower will also further improve the power efficiency of the memory and computing circuits based on VCM devices. Oftentimes, tradeoffs can be made by improving one performance parameter at the expense of others by tuning the programming conditions [62].

3 Phase Change Devices PCM devices change their resistance based on the microstructural rearrangement of a chalcogenide layer, being either amorphous or crystalline [55]. The device exhibits high resistance in the amorphous phase and low resistance in the crystalline one.

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Liquid phase

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Laser power or electric current

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Melting

Time

Crystallization

Disorder

Laser power or electric current

Short high laser or current pulse (reset pulse)

Superheated Crystalline

Time

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Tm Temperature (K)

Fig. 5 SET and RESET processes of a PCM device, where the amorphous phase represents the OFF state and the crystalline phase represents the ON state [53]

Several chalcogenide materials have been explored as phase change candidates, where currently GST (Germanium-Antimony-Tellurium) is the most widely used [26, 53]. The state change of the PCM material is normally driven by a thermal process, through melting and fast quenching (during RESET) into the amorphous state, and slow crystalline nucleation and growth (during SET) into the crystalline phase. The basic PCM device structure consists of a phase change layer sandwiched between two metal electrodes, where the electrodes act as Ohmic contacts to the chalcogenide film. Practical PCM devices include a heater layer beneath the phase change material, where localized heating is used to confine the heat transfer that improves the device performance. Nanoscale heaters can be utilized to localize the phase change effect and improve the energy consumption and scalability of the device [63]. To program a PCM, short, high current pulses RESET the device to the high-resistance amorphous phase, while long, low-current pulses crystallize the phase change material and reduce its resistance, as shown in Fig. 5. It should be noted here that the crystal state of the chalcogenide layer also affects its reflectivity, a reason why phase change materials are widely utilized by the industry of optical storage media [53]. State-of-the-art PCM devices can switch within 100ns with a bias of few volts [26]. This is considered an advantage over classical Flash memories. However, PCM consumes more energy per bit compared to Flash and redox-based devices [26]. Table 1 compares the performance of PCM with ECM and VCM-based redox memories. Considerable efforts and resources have been put in PCM research to

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improve the device reliability and yield. Due to its maturity, PCM may be the first “emerging” memory technology to see its applications in new memory or computing architectures in the short term. However, in the long term, redox devices (ECM or VCM) can lead to better memory products and potentially offer a more natural fit with emerging computing systems such as neuromorphic computing due to their bipolar, field-driven programming nature, lower power consumption, and higher integration density.

4 Memristive Device Applications: Classical Computing Systems The first application of memristive devices may arrive in the form replacing memory and logic elements in classical computing systems, which are facing multiple challenges at both the architecture and device levels. At the system level, the memory bottleneck associated with the conventional von Neumann architecture degrades the overall system performance [64]. While at the device level, CMOS transistor scaling is expected to reach fundamental physical limits in around a decade [3, 4]. As a memory element, memristive devices offer many attractive properties that help address the memory and storage challenges of classical computers, as discussed below.

4.1 Memory and Storage Memory and data storage systems are major bottlenecks today limiting the classical computing system performance [64], a problem particularly exemplified in the current big data era. The speed and energy cost associated with data communication adds an extra dimension to the problem and led to the so-called memory wall [1, 2]. In the last decade, redox memristive devices in the form of resistive memories (RRAMs) have emerged as a promising candidate for ultrahigh density data storage (e.g., solid-state drives, SSDs) and random access memory (RAM) applications [38, 46, 65, 66]. As discussed in Sect. 2, RRAM offers excellent scalability, fast access, low power, and wide memory margin [38, 67]. For example, RRAMs are overall much faster than traditional hard disk drives and Flash storage, and allow random write, read, and erase [38, 51]. These attractive properties make it possible to create a simpler and flatter memory system compared with the complex pyramid memory hierarchy used today [65]. In addition, RRAM fabrication requires low thermal budget, enabling RRAM arrays to be directly integrated on conventional CMOS circuitry or other types of 3D integration of the memory with processor [68], as shown in Fig. 6. This high-density 3D integration of processor and memory can provide a significant boost to the computing system performance by addressing

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Fig. 6 Schematic showing potential 3D monolithic integration of RRAM and digital logic on the same chip (Ref. [69])

the communication bottleneck between memory and processors. Additionally, RRAM can be directly used in in-memory vector and hyperdimensional computing approaches [9, 70]. Altogether, this new device technology can extend the life of the von Neumann computer architecture and enhance the system’s ability to store and process large amounts data more efficiently. However, a number of challenges still remain. The density advantage of RRAM originates from the simple crossbar structure, where a memristive device is formed at each crosspoint and can be used to store a binary bit of data (Fig. 2a). From a device perspective, fast access and wide ON/OFF margins are desirable, while a low write (erase) current is also needed to reduce power consumption during programming of large arrays. However, the low-power memristive devices may be prone to high fabrication or run-time device variabilities. Additionally, while memory and data storage systems share many requirements, the tradeoffs between device retention and cycling endurance are considerably different in the two systems. A storage system requires years of retention but can survive with a low number of endurance cycles, as the case of Flash memories. On the other hand, memory systems can tolerate shorter retention with the aid of refresh cycles but demands much longer write/erase cycles. Recent advances seem to suggest that memristive devices may be better suited for storage type applications with lower fabrication cost, higher density, long data retention time, but comparatively shorter endurance cycle compared to other memory technologies, namely, spin-transfer torque magnetic random-access memory (STT-MRAM), although continued material and device optimizations may lead to continued improvements in write/erase endurance to make RRAM better suited for DRAM- or SRAM-like memory

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Occurrence Percentage

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30

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20 10 0

0

0.125 0.25 0.375 0.5 0.625 0.75 0.875

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Normalized Readout

(a)

(b)

(c)

Fig. 7 (a, b) Undesired sneak-paths in a passive crossbar array, (c) readout distribution showing the loss of read margin with sneak current [66]

applications. Additionally, system-optimizations that utilize the retention properties of the devices may help alleviate the endurance requirement by reducing the number of refresh cycles, while other techniques similar to wear leveling typically used in Flash memories can also be utilized to improve the effective system endurance [71]. Another major challenge facing memristive devices as high-density memory elements is the sneak path problem [66, 72–75]. Unlike other potential applications, accessing memory/storage array is typically performed in a row-by-row fashion. In a passive crossbar structure, the read and write currents can pass through (possibly large amounts of) unselected devices in the crossbar, which can diminish the read/write margins as shown in Fig. 7. Sneak current also significantly increases the total current driving requirement of the circuitry and in turn creates a practical limit on the size of the crossbar array. Different biasing techniques can be used to reduce the severity of the problem during read (at the expense of power consumption), but these techniques may not be efficient for practical array sizes [66]. Recent studies have shown that circuit level approaches can be adopted to mitigate the sneak-paths effect [66, 67, 73, 75]. Another approach is to add nonlinearity in the crossbar, either through memristive devices with intrinsic nonlinear I-V characteristics or more practically through a serially connected “selector” element that offers a high I-V nonlinearity [76, 77] to eliminate the parasitic current effects [74]. The latter approach offers a modular design strategy, where the selector device is optimized for high nonlinearity, and the memory element is tuned to meet the memory requirements. Typically, the two devices are stacked over each other to minimize device size [78]. Conventional transistors can also be used to reduce sneak currents in the 1-transistor 1-resistor (1T1R) memory cell structure [52, 79], although two-terminal selectors are more desirable for very high-density memory and storage applications.

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4.2 Digital Logic Circuitry Another area of study within the conventional computing architecture is to utilize memristive devices as MOS transistor replacements in a digital logic circuitry [10, 80–83]. Memristive logic circuits are reconfigurable and have a built-in memory functionality. However, to have any chance of being competitive, memristive logic needs to be as reliable and as fast as their CMOS counterparts, and should offer better scalability and energy consumption. These requirements can be fulfilled only by low-power and fast memristive devices. Like their memory counterparts, digital logic circuitry cannot tolerate high device variability. The specific retention and endurance requirements depend on the adopted circuit scheme. For instance, implication, programmable logic-in-memory and ratioed logic circuits [10, 82, 84, 85] use writing operation to implement the output function, thus will require very high device endurance. On the other hand, reconfigurable table [86] circuitry requires writing only in the configuration stage and thus can use devices with limited endurance cycles. Similarly, one promising application for RRAM devices is using them as switching elements for programmable circuitry and FPGAs (FieldProgrammable Gate Arrays) [87–89]. Here, the devices are used to connect the computing circuitry rather than performing the real computing. Since RRAMs can act both as switches and as memory, it can result in a much-improved circuitry from the area and power consumption perspective. Moreover, RRAM devices have much smaller footprints compared to its SRAM and FLASH counterparts commonly used in such types of circuits. On the other hand, programmable applications expect extremely high ON/OFF ratios from its switches and very long retention for practical applications.

5 Applications in Emerging Computing Architectures Perhaps the most intriguing aspect of memristive devices is their potential in emerging computing architectures. These architectures aim to address the computing challenges presented by today’s applications, especially cognitive, data-centric, and smart sensor networks. Classical computers were originally designed to handle vast amounts of arithmetic operations with high speed and high precision. For example, the first known microprocessor chip Intel 4004 was developed for a calculator [90]. Conversely, many of today’s applications involve the processing of visual, auditory, or other types of sensory data that can be affected by noise, and can in turn tolerate some amount of imprecision during computation. While some of the neural network and computational concepts being used for such tasks are not necessarily new, recent advances in hardware, including memristor-based devices and circuits, dramatically changed the landscape of the co-design and implementation of these emerging computing.

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5.1 Neuromorphic Computing Neuromorphic computing is one such example. Neural networks have already demonstrated an extraordinary ability to carry out pattern recognition and inference in real-world applications, with much better efficiency and throughput than classical computing techniques [91–93]. However, these implementations are mostly based on conventional computing hardware that still suffer from the von Neumann bottleneck, while the real potential of neuromorphic systems will only be realized after drastically re-designed hardware systems can be built that allow efficient mapping and operations of the neural networks [6, 15, 94, 95]. Neuromorphic hardware architectures typically comprise hybrid analog/digital circuits that implement physical models of neural computing systems, using computational principles analogous to the ones used by real nervous systems [11]. Below we provide a brief introduction of neuromorphic hardware systems, first based on mixed-signal CMOS implementation, followed by discussions on memristive-device implementations. When implemented in analog VLSI technology, neuromorphic circuits use, to a large extent, the same physics used in real neural systems (e.g., they transport majority carriers across the channel of transistors by diffusion processes, very much like neurons transport ions inside or outside cell bodies through their proteic channels). Given the analogies at the single channel level, larger scale neuromorphic circuits share the same physical constraints of their biological counterparts (given by noise, temperature dependence, inhomogeneities, etc.) at the macroscopic level. Therefore, while these architectures often have to use a range of different strategies for optimizing robustness to noise, which in many cases are analogous to the ones used in biology, they also exhibit desirable features similar to those of real neural computing systems, such as very low power consumption, low size, low latency, and a high degree of fault tolerance. It is these very features that make neuromorphic circuits and systems optimally suited for integration with memristive devices [16]. Topologically, the memristive crossbar can be readily mapped into an interconnected network, thus allowing straightforward mapping of neural networks with each memristive device acting as a synapse connecting a pair of neurons (Fig. 8) [49, 96]. Figure 8a, b shows an example of a single memristor device acting as a synapse and reproducing the Spike-Timing Dependent Plasticity (STDP) behavior of biological synapses. Like a biological synapse, a memristor device stores and processes information at the same physical location concurrently. This is possible because the device’s memory is represented by the two-terminal resistance, which in turn regulates information (current) flow between the pair of neurons connected to it. The excellent scalability of memristive devices further allows the implementation of high-density networks [38] and provides enough synaptic connections for practical applications. Memristive networks have already been shown capable of performing different forms of neuromorphic tasks including pattern classification, feature extraction, analog sparse coding, and recognition, an example is shown in Fig. 8c [15, 97– 101]. Neural networks are also natural applications for memristors due to the

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Ag + Si Si

Synapse

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Δ Synaptic weight (%)

a

10

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–10 To pre-neuron To post-neuron

–20 –60

–40

–20 0 20 Δ Spike Timing (ms)

40

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Fig. 8 (a) Mimicking the biological synapse using a single memristor device [49]. (b) Measured STDP behavior from a memristor [49]. (c) Mapping neural networks into a crossbar structure, where a memristor is formed at each crosspoint and both stores and processes information [15]

networks’ ability to tolerate even very large device variations [102]. Device runtime stochasticity, often encountered in aggressively scaled memristive devices, can be even used as a useful property [14, 103, 104]. Neural networks may also help alleviate the tradeoff between device endurance and retention, as hours long retention can be sufficient for a neural network to operate. Write/erase cycles are encountered during the network training phase, which is typically infrequent during the lifetime of the network as most operations can be mapped into a read operation. On the other hand, most neural network learning algorithms rely on the use of “analog” devices whose conductance can be updated in an incremental, instead of binary fashion [49]. The linearity and symmetry of the incremental conductance (synaptic weight) update have also been shown to have strong impact on network performance and need to be optimized [98]. Devices that can operate at low current are also desired to allow the realization of large networks. Such set of requirements imposes different challenges for the device design and fabrication, compared to memory and logic devices.

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Fig. 9 (a) Micrograph of a scalable multi-core neuromorphic processor with hierarchical onchip digital routing circuits and subthreshold analog synapse and neuron circuits that reproduce biophysically realistic neural dynamics. (b) Block diagram of an equivalent architecture with 64 cores, and five levels of routers (one for R1 routers, three for R2 routers, and one for R3 routers – see text for details). These chips were implemented using mixed-signal CMOS, but the simple principle can be applied to hardware systems employing memristive networks

From a system point of view, several custom multi-chip and multicore neuromorphic computing systems that support the implementation of large-scale neural networks have already been proposed using mixed-signal CMOS technologies [94, 105–108]. These systems, however, have all been designed and optimized to use standard memory technologies, such as on-chip SRAM or off-chip DRAM, and are still affected, to a large extent, by the von Neumann memory bottleneck problem [64]. Memristive devices offer a new solution to this problem, when integrated in neuromorphic computing architectures. An example of a recent neuromorphic VLSI device that is based on a multi-core distributed architecture that can exploit the desirable features of memristive devices is shown in Fig. 9. This device comprises massively parallel arrays of analog neuron and synapse circuits and employs multiple routing strategies combining heterogeneous memory structures distributed across and within cores to configure the neuron networks of arbitrary topology and to transmit the spikes among the neurons and synapses [109]. Although the VLSI device of Fig. 9a makes use of capacitors, conventional CAM cells, and standard SRAM latches to implement the distributed memory elements, the architecture that this device embodies was designed to implement in-memory computing, with the goal of supporting the use of memristive devices as both digital and synapse-like memory elements [109]. Indeed, the CMOS circuits implemented in this device are compatible with oxygen-ion-based memristive device specifications (e.g., as those described in Sect. 2.2), which could be used as compact single-bit memory elements in place of the large CAM and SRAM circuits and as dynamic synapse elements in place of the corresponding capacitors and subthreshold analog circuits. The analog neuron and synapse circuits used in the device have been described and fully characterized in [13], where adaptive integrate-and-fire spiking neuron

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models and first-order dynamic synapse models were used. The digital circuits implement asynchronous event-based transmission modules that distribute the spikes produced by the neurons in real-time, without the need of any clock circuitry. Specifically, each neuron in a core transmits its output spikes to a local asynchronous router instantaneously, at the time in which they are produced. The router directly connected to the neurons, denoted as R1 in Fig. 9b, can broadcast events back to the source core neurons and multi-cast events to other four possible cores. Connectivity among neurons and specific network configurations (such as multilayer, recurrent, convolutional, etc.) can be programmed by setting the appropriate bits in the CAM and SRAM circuits distributed within the cores and in the routers. The inter-core multi-cast event-based communication is managed by a different set of routers, denoted as R2 in Fig. 9b. The R2 routers are distributed among the cores in a hierarchical way to implement a tree-based routing strategy. At the lowest level of this hierarchy, R2 routers distribute events to the four cores immediately connected to it. Events that need to be sent to more distant cores follow the hierarchy using higher level R2 routers. The block diagram of Fig. 9b shows an example of a multicore chip with 64 cores, interconnected via three levels of an R2 router hierarchy. The architecture supports communication of spikes also across chip boundaries. To transmit events to neurons on different chips, a third router block, denoted as R3, is used. In this case, the routing strategy adopted is that of mesh routing. The combination of different routing schemes (e.g., broad-cast, multi-cast, tree-based, or mesh-based routing) allowed us to design an architecture that minimizes both the system-level bandwidth requirements for communicating spikes among neurons and the total (distributed) memory requirements for supporting a wide range of neural network topologies that can exhibit complex synaptic dynamics [109]. This architecture has already been shown to support the implementation of Convolutional Neural Networks in real-time low-latency spatiotemporal pattern discrimination tasks [110], using CMOS circuits as programmable synaptic elements, with synaptic weights that are fixed (e.g., determined by an off-line training procedure and set at run-time configuration). Future integration with memristive devices will allow designers to implement synaptic weight learning mechanisms directly on-chip, both for implementing conventional machine learning algorithms such as Convolutional Neural Networks, as well as more bio-inspired, spiking-based networks. Indeed, memristive devices have been shown to be able to faithfully reproduce spike-based learning mechanisms, for example, based on spike-timing-dependent plasticity (STDP) learning rules.

5.2 Analog Computing Another promising application for memristive devices is analog computing. While the concept of analog computing itself is in fact older than the binary one, implementation of analog circuits at large scale is always challenging. The advances of memristor devices, however, may help speed up the development of efficient

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Fig. 10 Example of a memristor-based analog dot-product engine [111]

analog computing systems. For instance, the crossbar structure can natively execute the analog dot product operation – a core operation that can be found in many computing algorithms [111, 112]. Specifically, an analog vector-matrix multiplication requires a single execution step on a crossbar system, without moving data between a separate memory and processor, compared to sequential execution on classical computing architectures that demand frequent data movements. To some degree, the analog dot product operation can be considered a generalized form of the synaptic function in a memristive synaptic network (Fig. 10). However, for arithmetic applications, the operation requires precise representation of the resistance levels and do not tolerate high variability. Also, analog computing devices should have higher endurance compared to their neuromorphic counterparts due to the need to repeatedly update the stored values, and thus require further device and material optimizations. In this sense, from a device perspective analog computing can be considered the next step of neuromorphic computing. It is also worth mentioning here that memristors have also been explored for other interesting forms of analog computing approaches, such as in bio-inspired coupled oscillators [113, 114] and in finding shortest path in a maze [115–117], where each of these applications can pose its own set of device requirements.

5.3 Stochastic Computing and Security Applications Stochastic computing utilizes basic logic gates to perform a complex arithmetic operation with the aid of randomly generated bit sequences [118]. Typically, this is realized with the help of PRNGs (Pseudo Random Number Generators), which unfortunately is expensive to implement in hardware. Recently, restive devices have been explored to replace the PRNGs circuits in stochastic computing [8, 119], by utilizing the native device runtime variability as a source of stochasticity. For

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instance, at a given switching voltage, the device will switch after a random time period following a Poisson distribution. Hence, a fixed wait time can be utilized to transform the memristive device into a compact RNG. In this case, devices with higher temporal variability (i.e., stochastic switching) are favorable. However, stringent spatial variability control is still needed to ensure different devices follow the same distribution and programmable PRGN characteristics. Additionally, since the random sequence is generated by successive switching events, very high write/erase endurance is also required for such applications. Some stochastic behaviors of RRAM are undesirable for memory applications but could be utilized as entropy sources for hardware security features that embrace truly random variations. These behaviors include variability of RRAM device parameters (e.g., resistance, switching voltage), noise in read signal (e.g., random telegraph noise, RTN), and probabilistic switching (i.e., switching yield controlled by operation conditions). These random behaviors can be utilized to generate hardware security primitives, including True Random Number Generator (TRNG) and Physical Unclonable Function (PUF). For example, controlled switching of RRAM with a probability of 50% leads to equal chance of a device falling in “0” or “1” states afterward. This behavior can be utilized to create a TRNG, which has been demonstrated experimentally with the proof of randomness [120]. Alternatively, the strong RRAM RTN signal has been used to generate random numbers in a simple circuit [121]. PUF utilizes the physical randomness to generate unclonable instance-specific security features and can be used as “fingerprint” for identification or authentication [122]. The variability of RRAM provides a unique source of randomness for PUF implementation. Unlike manufacturing variation exploited in most PUF implementations that is fixed post-fabrication, RRAM variability is intrinsic in physical mechanisms, less process dependent, and potentially reconfigurable [123]. RRAM-based PUF has been demonstrated experimentally using cell-to-cell resistance variation in a 1T1R RRAM array [124]. The reliability of RRAM-based PUF is strongly affected by the nonideal behaviors of RRAM, including reading instability, thermal dependence of RRAM resistance, and retention loss [125]. Therefore, RRAM-based PUF needs to be optimized through material and device engineering to address these reliability issues. With significantly smaller footprint than other Si-based PUFs and lower power, RRAM PUF is more suitable for lightweight security applications, for example, in Internet of Things (IoT).

6 Discussions As discussed in Sects. 4 and 5 earlier, each potential computing applications pose a set of requirements to be fulfilled, whereas different memristive devices may offer different strengths and weaknesses. Some of the device shortfalls can be compensated at the architecture level, while others still require additional research efforts to improve the device performance. For example, the lack of device nonlinearity

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Fig. 11 Qualitative Radar charts showing (a) ideal device characteristics. (b–h) Device properties required by each of the potential computing applications. (i–k) The current state-of-the-art redox and PCM device properties, and how they can be improved at the system level (dashed line)

could be compensated by adding a selector element to the cell, while system-level optimizations can alleviate data retention requirements by introducing refresh cycles (at the expense of device endurance and system total energy consumption). The same principle applies to runtime variability, where write-verify schemes can be adopted to reduce the programming error rate, at the cost of speed, endurance, and power consumption. Though some device properties can be traded off for others at the system level to fit a specific application requirement, this rule does not apply to all device aspects. For instance, endurance, ON/OFF ratio, speed, and analog/binary behavior are permanent properties of the device. We summarize the computing application requirements and the properties of the memristive devices as Radar charts shown in Fig. 11. It also highlights that some of the device shortfalls can be improved at the circuit and system levels (e.g., improved to the dashed lines). It is evident that there likely is no “universal” device that can meet the requirements of all applications. Instead, a particular device technology may be more suitable for a given set of applications. For example, data storage applications require high nonlinearity and large ON/OFF ratio to facilitate reliable data retrieval. Additionally, low power consumption is needed to support a competitively large array size under constraints imposed by the current delivering circuitry. Excellent retention is needed, while extremely long endurance is not necessary. From the device perspective, ECM is an excellent fit for storage applications, with its low programming current, excellent retention, and high ON/OFF ratio. On the other hand, memory applications require much longer write/erase endurance cycles, and VCM devices with further material and device optimizations may be suited for this need. The set of properties required for digital computation is also shown Fig. 11. Analog switching, device nonlinearity, or long retention is not essential in most of the cases. However, memristive digital computing needs to consume very low

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power, and offer excellent uniformity, endurance, and ON/OFF ratio to compete with its CMOS counterparts. These requirements are very challenging for the current state of memristive devices and demand extensive development at the material and device level. FPGA and programmable circuits share many requirements as digital computing systems, except for the tradeoff of high endurance with long retention. On the other hand, neuromorphic computing systems are very forgiving on many device properties include uniformity, retention, endurance, nonlinearity and ON/OFF margins. Yet it requires excellent analog switching properties to represent analog synaptic weight updates (during learning) and low power consumption to facilitate large networks. It thus appears that VCM devices are better suited for systems that require online learning, thus analog weight updates, while ECM devices may be applied in systems that utilizes off-line trained weights. Continued device optimizations are still needed to improve device variability, linearity of the weight updates, and power consumption. Similarly, analog computing systems, which could be considered a generalized form of the neural networks, rely on dot product operations but may pose more stringent device uniformity requirements. Finally, some of the nonideal effects in memristive devices, such as temporal variations, may be used as features in applications such as stochastic computing, whereas new requirements, such as very high endurance, need to be satisfied in these cases.

7 Conclusion In conclusion, great strides have been made in the last few years in the development of memristive devices and new computing architectures that can efficiently exploit the properties of such devices. In this chapter, we focused on the state-of-theart memristive device performance and tried to map different devices to different potential computing applications. We briefly discussed the basic switching mechanisms of redox and PCM devices, as well as their strengths and weaknesses. From the application prospective, we believe redox-based memristive devices can help deliver computing hardware that is naturally suited for efficient, nonconventional computing architectures, although continued device and material optimizations are still needed. Finally, we note that the device properties can be more efficiently utilized and weaknesses mitigated, through synergistic research and co-design at both the device level and the architecture level. These types of multidisciplinary research, branching materials, devices, architecture, and algorithm are in urgent need to ensure that the continued performance improvements in electronics we have enjoyed over the last decades can be extended in to the foreseeable future.

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Resistive Random Access Memory (RRAM) Technology: From Material, Device, Selector, 3D Integration to Bottom-Up Fabrication Hong-Yu Chen, Stefano Brivio, Che-Chia Chang, Jacopo Frascaroli, Tuo-Hung Hou, Boris Hudec, Ming Liu, Hangbing Lv, Gabriel Molas, Joon Sohn, Sabina Spiga, V. Mani Teja, Elisa Vianello, and H.-S. Philip Wong

Abstract Emerging nonvolatile memory technologies are promising due to their anticipated capacity benefits, nonvolatility, and zero idle energy. One of the most promising candidates is resistive random access memory (RRAM) based on resistive switching (RS). This paper reviews the development of RS device technology

This chapter was originally published as a paper in the Journal of Electroceramics: Hong-Yu Chen, Stefano Brivio, Che-Chia Chang, “Resistive random access memory (RRAM) technology: From material, device, selector, 3D integration to bottom-up fabrication,” J Electroceramics, Vol. 39, nos 1-4 (2017), Pages 21–38. DOI: http://dx.doi.org/10.1007/s10832-017-0095-9. H.-Y. Chen () Department of Electrical Engineering and Stanford SystemX Alliance, Stanford University, Stanford, CA, USA GigaDevice Semiconductor Inc., Beijing, China e-mail: [email protected] S. Brivio · J. Frascaroli · S. Spiga Laboratorio MDM, IMM-CNR, Agrate Brianza, Italy C.-C. Chang · T.-H. Hou · B. Hudec · V. M. Teja Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan M. Liu · H. Lv Key Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Science, Beijing, China G. Molas · E. Vianello CEA Leti, Minatec Campus, Grenoble, France J. Sohn · H.-S. P. Wong Department of Electrical Engineering and Stanford SystemX Alliance, Stanford University, Stanford, CA, USA e-mail: [email protected] © Springer Nature Switzerland AG 2022 J. Rupp et al. (eds.), Resistive Switching: Oxide Materials, Mechanisms, Devices and Operations, Electronic Materials: Science & Technology, https://doi.org/10.1007/978-3-030-42424-4_3

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including the fundamental physics, material engineering, three-dimension (3D) integration, and bottom-up fabrication. The device operation, physical mechanisms for resistive switching, reliability metrics, and memory cell selector candidates are summarized from the recent advancement in both industry and academia. Options for 3D memory array architectures are presented for the mass storage application. Finally, the potential application of bottom-up fabrication approaches for effective manufacturing is introduced.

1

R esistive

Memories: OxRAM and CBRAM

A resistive RAM (RRAM or ReRAM) cell is a two-terminal element with top and bottom electrodes, and a thin insulating film. By applying a voltage across the electrodes, the electrical conductivity of the thin film material can be reversibly changed, from a low-resistance state (On state/LRS) to a high-resistance state (OFF state/HRS) and vice versa. The corresponding conductance value can be stored for a long period. The number of materials showing switching properties is huge and different physical mechanisms can be complex, and sometimes different explanations have been given for the memory effect in the same type of material [1, 2]. Nevertheless, RRAM research has exploded over the last decade, as demonstrated by the rapid increase in publications and presentations at conferences, and some consensus has begun to appear. Due to their large diversity, RRAMs can be classified in different ways. A first partitioning is related to the switching polarity (see Fig. 1): in unipolar devices the switching between ON and OFF states is related to the intensity of the electrical field and/or current and not to its polarity. In bipolar devices, the switching is related to the application of fields of opposite polarity. Some devices exhibit both switching mechanisms (nonpolar) [3]. In most of the RRAM devices, the basic working principle is based on the reversible formation and disruption of a conductive filament (CF), which shunts the top and the bottom electrodes through the insulation film. In general, a previous stress step at higher voltages is required to establish the filament (known as forming

Fig. 1 Schematic cell structure of an oxide-based RRAM, schematic current–voltage (IV) curve of (left) a unipolar and (right) a bipolar RRAM

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operation). The current limit during this stress can be critical in defining the further operation of the memory. A second partitioning of RRAM is related to the nature of the filament, and memories are usually classified in oxygen vacancy RAM (ORRAM or OxRAM) and conductive bridge RAM (CBRAM), as the filament can be obtained by migration of VO (oxygen vacancy) in transition metal oxides (OxRAM) or by the dissolution of an active electrode (Cu or Ag) in an oxide- or chalcogenidebased electrolyte (CBRAM). Test devices in the multi-megabit range have been already demonstrated for OxRAM devices, for instance a metal oxide (MeOx )-based 32Gb test chip developed in 24 nm technology was presented [4]. Concerning CBRAM, the industry seems to have converged on devices based on metal oxide (as the CuTe/GdOx 4Mb CBRAM [5] and more recently the CuTe/MeOx -based 16Gb CBRAM [6]). Oxide electrolytes, with respect to chalcogenide-based ones, improve the data retention, but at the cost of higher operating and forming voltages. In order to reduce the forming voltage (down to a forming free behavior), hybrid CBRAM devices, where dopant species in the metal oxide (giving rise to VO ) are used to ease the filament formation by facilitating the Cu injection in the resistive layer, were also presented [7]. The materials used in the NVM stack and the integration scheme have a strong influence on the memory performance [8, 9]. Figure 2a shows the memory window (ROFF /RON ) versus the cycling performances for different reported OxRAM (red symbols) and CBRAM (black symbols) technologies. A trade-off exists between memory window and endurance. CBRAM technologies, compared to OxRAM ones, can achieve a higher memory window at the expense of the endurance performances. It is possible with some RRAM stacks to improve both large window margin and high endurance, but at the price of degraded thermal stability. Figure 2b presents the low-resistance state (LRS/RON ) and the high-resistance state (HRS/ROFF ) as a function of the programming current for some selected technologies presented in Fig. 2a. In all samples, RON is determined by the compliance current; the higher the current the lower the resistance, whatever the technology. On the other hand, ROFF strongly depends on the integrated materials. Figure 3 illustrates the evolution of resistance variability for a wide range of resistance values obtained for different programming conditions on different memory stacks and further fundamental variability of OxRAM was studied in the paper by A. Grossi [10]. The resistance variability is reduced for low resistance value obtained by increasing the programming current [11]. One of the fundamental issues of OxRAM is that it is difficult to completely “heal” the filament during reset. This results in the lower resistance at OFF state (high-resistance state) with respect to the preforming one and in a large variability of the OFF state from cell to cell and during cycling. For a given resistive value, the variability seems to be slightly dependent on the memory stack. In order to study the impact of programming conditions on performances and reliability, 1T-1R OxRAM devices integrated in 28 nm CMOS platform [12] were fully characterized. The OxRAM active layer consists of ALD HfO2 , sandwiched between TiN and Ti/TiN electrodes [8, 12]. The first operation the cell is subjected to is the forming operation. This is a unique step, and it requires higher voltages than the subsequent operating (SET/RESET) ones. Figure 4a, b respectively shows

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Fig. 2 (a) ROFF /RON versus endurance for the different RRAM technologies. (b) RON and ROFF values as a function of the programming current (ICOMP ) corresponding to some of the data presented in (a)

Fig. 3 Resistance variability (cell to cell and cycle to cycle) for a wide range of resistance values σR [Log10(R)]

100

10–1

10–2

HfO2/Ti GoS2/Ag HfO2/Hf

10–3

3

4

5

6

μR [Log(Ω)]

the forming/SET time and voltage dependence for the HfO2 /Ti OxRAM cells. An exponential dependence between the forming/SET time and the applied voltage exists. SET time shorter than 100 ns has been achieved at 1 V. However, Fig. 5a shows that higher programming voltages (~2 V) are required in order to improve the tail bits of the low-resistance state distribution. The experimental data have been measured on several tens of OxRAM cells through 500 SET/RESET cycles

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a

b

102

37

104

Icomp=150μA 103

Icomp=250μA

100

tset [ns]

tforming [μS]

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resolution limit Roff~70kΩ (Vreset=1.3V) Roff~300kΩ (Vreset=1.5V) 0.8

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Fig. 4 (a) Exponential dependency between switching time and SET voltage (b) switching time and voltages for the HfO2 /Ti-based OxRAM cells [8]

Fig. 5 (a) Experimental RON distribution for different SET voltages and fixed pulse width (pulse width = 100 ns) and programming current for HfO2 /Ti-based OxRAM cells. (b) Experimental resistance value distribution versus programming conditions (RON vs. ICOMP , ROFF vs. VRESET )

to capture both spatial and cycle-to-cycle variations. Figure 5b demonstrates that RON and ROFF values can be adjusted by tuning the SET current (ICOMP ) and the RESET voltage (VRESET ), respectively. Lowering ICOMP improves the device endurance (Fig. 6) and reduces the power consumption [8] at the expense of a higher RON and lower memory window. The higher RON can be partially compensated with a higher RESET voltage that allows increasing of the ROFF value to maintain the resistance window. However, the RESET voltage cannot exceed 1.5 V across the OxRAM in order to limit the electrical stress for OxRAM reliability.

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Fig. 6 Experimental pulse-cycling endurance test for a SET compliance current (ICOMP ) of 1 mA (top) and 180 μA (bottom) [8]. Pulse width = 10 μs, VSET = 1 V, VRESET = 1.3 V

Fig. 7 5×106 s (68 days) data retention at 150 ◦ C for three conditions: Cond A: Pulses of 10 μs, Cond B: Same condition but with long forming (10 ms), Cond C: Same condition but with long forming/RESET/SET operations (10 ms) [13]

Data retention has been recorded at 150 ◦ C up to 68 days. The devices were initially programmed in LRS and HRS with different SET/RESET conditions. The results presented in Fig. 7 confirm the excellent thermal stability of both the ON and the OFF states [13]. Failure temperatures of 130 ◦ C at 10 years have been extracted for a programming current of about 100 μA using an Arrhenius plot [14, 15]. Thermal stability could be further improved by engineering the resistive switching layer [14, 15]. By means of electrical characterization and ab initio Vo diffusion barrier calculations, works published in [14, 15] demonstrated that Al incorporation in HfO2 provides better Ron retention of the devices due to their shorter bond lengths associated with their higher atomic concentration at the cost of a slightly higher forming voltage.

Resistive Random Access Memory (RRAM) Technology: From Material,. . .

39

2 Selector Candidates 2.1 General Requirements To truly exploit the potential of RRAM as a high-density memory, the memory cells are required to be densely packed in vast cross-bar (crosspoint) arrays (CBAs) offering terabits of high-density solid-state storage [16]. In CBA fabricated using lithography feature size F, each cell’s attainable footprint can be 4F2 , as shown in Fig. 8a [17]. For accurate reading and low-power writing, a strong nonlinearity defined as NL = I(VREAD )/I(VREAD /2) in I-V characteristics is required at every crosspoint to prevent the leakage current flow through the neighboring non-selected cells – known as sneak current issue [16–21]. The worst-case scenario would involve addressing a cell in HRS surrounded by cells in LRS, which form an effective sneak current path (Fig. 8b), which would lead to misread. This can be solved by employing a serially connected Selector element with every RRAM cell (1S1R design), which provides for sufficient NL, effectively suppressing sneak current flow and allowing the use of partial-bias write schemes [18, 19], which can reduce the overall power consumption of the CBA. Example characteristics of an RRAM cell with a selector with NL ~103 are shown in Fig. 9 [22]. The key requirements for a selector are high NL (also called Selectivity) over 106 and ability to drive high ON currents translated into current density over 1 MA/cm2 , as also specified in the ITRS 2013 [23]. Moreover, not to limit the overall performance and reliability of the memory element, all other properties of the selector, such as switching speed, cycling endurance, array yield, scalability, operation temperature (>85 ◦ C), and specially variability [21] should be better than that of the memory element [16]. To enable vertical stacking of the CBAs, the processing temperature shall be compatible with BEOL process (102 104 seconds @ 85 ◦ C) [41]

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Fig. 17 (a) Multi-gate configuration for the study of the switching phenomenon in CoO NWs. Adapted with permission from [107]. Copyright (2011) American Chemical Society. (b) Example of heterostructured Au-NiO-Au NW. Reprinted with permission from [113]. Copyright (2009) American Institute of Physics. (c) MgO/NiO core-shell nanowire. Adapted with permission from [110]. Copyright (2009) American Chemical Society. (d) Ni/NiO core-shell nanowire). (d) Ni/NiO core-shell nanowire. Adapted with permission from [111]. Copyright (2011) American Chemical Society

system integration, it allows an optimal electric field distribution or confinement in (almost) gate-all-around design or in heterostructure NWs like in Fig. 17b. Lai et al. [106] exposed ZnO NWs to Ar plasma to modify the surface defect density, greatly improving the multistate capability and obtaining a marked reduction of the programming voltages, thanks to the decrease of the barrier thickness at the electrode/oxide interface. In another work by Nagashima et al. [107], uniform exposure of CoO NWs to oxygen-rich gaseous environments highlighted the importance of redox events in the bipolar RS and a multi-gate configuration allowed to identify the switching region close to the cathode (Fig. 17a). Moreover, memory retention and endurance were found to depend on the gaseous environment. Device configurations in which the switching occurs in the plane also permits chemical analysis of the switching region. Cu atom diffusion was tracked along ZnO NWs, and the formation of Cu islands was accounted for bipolar switching with large ON/OFF ratio >105 , long retention time >2 × 106 s and low threshold voltages 108 /cm2 )

High (>108 /cm2 ) [124] No

Integration issues

Low Array of 1D-1R nanopillar devices [130]

Difficult

20–1000 nm (same as feature size) Laboratory level

100 nm – 100 μm [116, 121] Laboratory level

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20–1000 nm [118]

10–300 nm [116, 117]

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NS Hexagonally packed spheres

AAO Hexagonally packed cylinders

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BCP and DSA Hexagonally packed cylinders, square-packed spheres, Lamellae, gyroids 5–50 nm [119, 120] 10–200 nm [122] Pre-industrial [123] 1/v0,Set

 Vswitch,Set 0

ISet VdV, v0,Reset ≤ v0,Set

(3) The inequality may hold even when the scan rate v0,Reset is higher than v0,Set since the current during reset is significantly higher than during set. v0,Reset can thus be significantly higher than v0,Set and the energy dissipated during the reset step would still be higher than during the set step. As long as the inequality holds the reset step will take place at a higher temperature than the set step, as suggested in the first explanation of US. This claim is further strengthened when the reset step takes a shorter time than the set one, as then heat losses are reduces. Heat leakage was shown by Chang et al. [38] to affect the device temperature and thus its I-V characteristics. We suggest another possible mechanism for US for which the reset step occurs at a higher temperature than the set step. The mechanism is based on a competition between the rate of oxygen transfer at the anode and the rate of transport of oxygen through the oxide bulk. This competition was shown [25, 28] to control the direction from which the filament of vacancies grows. As discussed before, when the rate of transfer of oxygen out of the oxide, i.e. injection of oxygen vacancies into the oxide at the TE acting as the anode, is higher than the rate at which they are removed from the anode side through the bulk towards the cathode, then the filament grows from the anode side towards the cathode side as shown, schematically, in Fig. 6. In the opposite case, when the rate of oxygen vacancy supply at the anode is limited while they are quickly swept across the oxide, then the filament grows from the cathode side, (Fig. 5). This allows understanding the reset in unipolar switching as follows. A highly conducting filament is formed during the set step connecting the anode and the cathode. The filament is not only highly conducting for electrons but also for ions (allows rapid oxygen ion propagation through the filament of vacancies). In the reset step the electron current increases significantly beyond the compliance current but the voltage is below the one during the set step. Thus heating is significant but the driving force lower than in the set step. This changes the ratio between the rate of vacancy injection at the anode and vacancy removal through the bulk as compared to the ratio for the set step. The reasons for a possible change in the ratio between the rate of vacancy injection and removal in the set and reset steps is as follows. The current of vacancies at the TE anode depends exponentially on the voltage drop there and temperature (an increase in temperature has two opposite effects, decreasing the impact of the voltage drop and increasing the exchange current coefficient) [27]. The current through the bulk is roughly linear in the voltage drop on the bulk which is close to the one in the set step. The ion conductivity, in the reset step, is significantly higher than in the set step both due to the higher vacancy concentration and the higher temperature and the ion current is expected to be higher than in the set step. The rate of supply of vacancies at the TE anode may become lower than the rate

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of removal trough the bulk. Therefore, applying a second positive voltage to the TE anode may reduce the concentration of vacancies under the anode leading to a local destruction of the filament under the TE as shown schematically in Fig. 5 and to an increase in resistance i.e. to reset. The filament can be repaired under a higher voltage (of same polarity) and lower temperature which enhances the ratio between the (increased) vacancy supply rate at the TE anode and (decreased) rate of vacancy transport through the bulk. This result in a new accumulation of vacancies under the anode, i.e. at the location that was depleted of vacancies during the reset step. Thus the active region of the device becomes the region under the TE. In unipolar devices which are operated under a single polarity all the time, the composition has gradually to change [23, 39]. This is in particular so when switching is controlled by drift. For positive TE this is due to injection of oxygen vacancies into the device and the blocking nature of the BE when prepared on a dense non permeable substrate. Thus the concentration of oxygen vacancies should gradually increase with time, short circuiting the device. For negative TE the vacancy concentration should gradually decrease, turning the resistance too high.

9 Memory In devices to serve as memristors, memory requires freezing the state generated first by electroforming and later by switching. A change of a state involves ion motion. This imposes two opposing requirements. For long term memory the ion mobility should practically vanish while for switching it should be high. The solution is that the ion mobility changes with the applied voltage being high for high voltage and practically vanishes when the voltage is switched off. (By “practically vanishes” we mean being many orders of magnitude lower). The motion of the ions is hindered by a barrier. This enables memory. To go over the barrier during switching two options exist. Either the temperature is raised or the barrier height is lowered. The increase in temperature was mentioned before. It takes place only under a high current which requires an appropriate high applied voltage. Thus one can impose either a low or high temperature by the applied voltage. The other option to achieve ion motion, is by lowering the potential barrier. This requires an interface and cannot take place in a uniform bulk for the following reason. The barrier lowering needs to be close to about 1 eV and has to take place within the hopping distance of the ion, i.e. ~0.2 nm [40]. However, an applied voltage of a few volts does not drop within an homogeneous bulk over that small distance. To reach a 1 V drop per 0.2 nm, e.g. for a sample 50 nm thick, would require an applied voltage of 250 V. This high voltage, and the corresponding current, would result in excessive heating and device breakdown. The situation is different at interfaces between two phases. There a significant voltage drop of close to one volt may occur, as in poor electrodes. In this case the applied voltage can control the ion current without requiring heating. However, the power IV applied will result in heating. Thus, though heating is not a prerequisite for crossing the

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barrier and leading to high current, heating will be the result of that crossing. A grain boundary can also serve as the interface of high impedance. However, in view of the expected heating the grain boundary may be lost by grain growth. We are not aware of devices based on switching by overcoming a potential barrier without heating. It is concluded that heating and cooling are always involved in memristor operation. The temperature reached depends on both the electrical power supplied and the rate of heat losses [38]. The temperature reached can be close to 1000 ◦ C [21]. The latter measurement locates the hot zone at an interface between two solid phases. However, in many cases the heating can be joule heating along the filament. Other measurements using optical means [41] show the average device temperature which, as expected, is lower than the high, local one [21].

10 Necessary Condition for Memory In devices for which the ion mobility does not vanish under low voltage, no long term memory can exist. The reason is that electroforming and set steps induce chemical polarization which would drive material diffusion and a non equilibrium defect distribution would relax rather quickly. (Relaxation will occur by ambiploar diffusion taking advantage of the presence of both mobile ions and electrons). The I-V relations under cyclic voltage may exhibit hysteresis without memory. It is now shown that when I-V relations measured under TVC of low frequency, do not cross the origin, no long term memory exists [17]. I.e. of the I-V curve through the origin (V = 0, I = 0) is a necessary condition for memory. The measured current, It , under a time varying driving force contains three components: electron, Ie , ion, Iion and displacement, Idis , current [42, 43], I t = I e + I ion + I dis

(4)

In the one dimensional configuration the current It is uniform at any given moment. Under low frequency of TVC the displacement current can be neglected. If memory prevails then the ion mobility vanishes for vanishing voltage and the current left under low voltage is the electron one, Ie which is then uniform. The latter must cross the origin, as for a uniform electron current Ie ∝V [8, 44]. Hence It = 0 at V = 0 when memory prevails under low frequency TVC. It = 0 at V = 0 when I-V curve self-cross at the origin or the upper and lower parts of the hysteresis loop overlap there without self-crossing. It is in many cases difficult to determine from the experimental results, when the curve passes very close to the origin, whether the I-V curve crosses the origin. This may be the result of a low ion mobility which is many orders of magnitude lower than that of the electrons. The low ion mobility is sufficient to affect the space charge hence the electron current but it is difficult to decide whether the I-V curves pass strictly through the origin or not. In some cases it is apparent from the curves

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chronology that the curve does not cross the origin though it seems to be very close to it. This is exhibited in Fig. 2 for an ion mobility two orders of magnitude lower than that of the electrons. Overlapping of an I-V curve usually takes place over a finite voltage range, not a single point. Following the time evolution of the curve in Fig. 2 can prove that it do not self-cross at the origin. In case of doubt a memory test has to be performed.

11 Hysteresis Hysteresis can be obtained in a device based on an MIEC with the mobility of both ions and electrons being fixed, i.e. independent of the applied voltage, while the temperature is kept constant. This type of hysteresis is shown in Fig. 2. The reason for hysteresis in this case is a difference in the response of ions and electrons to an applied voltage [16]. The difference is twofold: (a) the mobility of the ions and electrons is different, (b) the driving forces are different. While the electrons are driven by the applied voltage via the gradient in the electron electrochemical potential, ∇ μ˜ e , the ions are driven by the gradient in the ion electrochemical potential, ∇ μ˜ ion . The latter, under local equilibrium, can be expressed as a combination of the gradient in the electrochemical potential of the electrons, ∇ μ˜ e , and the gradient in the chemical potential of the neutral component the ions of which are mobile, ∇ μ˜ x . Under an applied voltage material motion and polarization takes place hence the second contribution does not vanish in most cases,∇ μ˜ x = 0, and the driving force for electrons and ions is different. Thus, the change in the differential resistance in this case of hysteresis, is not due to switching and there is no memory. Hysteresis leading to Fig. 2 depends on the rate of change of the voltage [17]. For a periodic signal, as TVC, hysteresis disappears under opposite limits, (a) when the frequency is low and the ion and electron current come close to the steady state ones and (b) when the frequency is high to the extent the ions can hardly redistribute within half a cycle. Hysteresis is high for frequencies within these limits. Hysteresis may appear again at very high frequencies but for a different reason as the ions practically do not respond [15]. This hysteresis reflects charging of the electrodes by the electron current, only. The dependence of hysteresis on TVC frequency is in contrast to the extremely weak dependence of the I-V curves which exhibit switching [10, 45–47]. When hysteresis without abrupt change in the differential resistance is observed, accompanied by I-V curves crossing which seems to occur at the origin, it is not evident that this represents indeed genuine switching and memory. It can be the short term hysteresis mentioned above which may come seemingly close to the origin without really crossing it. In this case, low voltage resistance measurements should be done to determine if memory exists. Alternatively the I-V relations should be measured over a wide range of TVC frequencies. If short term hysteresis exists then the hysteresis curve depends strongly on frequency, otherwise the I-V curve depends weakly on the voltage cycle frequency over many orders of magnitude.

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12 I-V Curve Crossing We have argued that a necessary condition for memory is I-V curve crossing of the origin under TVC of relative low frequency for which the displacement current can be neglected. I-V curve crossing outside the origin is not related to long term memory. Crossing outside the origin can occur in devices with constant ion mobility, hence without memory, and without a mechanism for fast switching. It can appear if a-symmetry exists in the contact potential with the electrodes, in the rate of oxygen transfer across the two electrodes or in the oxygen partial pressure at the two electrodes [42, 43]. Crossing can also occur when the voltage is a-symmetric either in the amplitude of the positive and negative polarity or because the rate of voltage increase is different from the rate of decrease. One a-symmetry exists in most cases as the bottom electrode is applied on an impervious substrate in contrast to the top electrode that is exposed to air. Thus the exchange rate of oxygen with the ambient may be significantly higher at the TE than at the BE. Further a-symmetry can arise in the nano bulk due to non uniform distribution of impurities and due to non-uniform stress. Akoi et al. [10] have shown that an ion mobility that is not constant, depends on the applied voltage but does not vanish, can yield I-V curve crossing in a device which is symmetric and the applied voltage is also symmetric. This device cannot exhibit memory as the mobility does not vanish under vanishing voltage. This demonstrates that I-V curve crossing at the origin is not a sufficient condition for long term memory.

13 Low Current and Compliance Current Limiting the current to low levels can eliminate switching. For intermediate voltage levels unique I-V relations exist which show switching between resistance states but not according to bipolar and unipolar switching characteristics [31]. Those I-V relations are explained by the co-existence of filaments not fully developed at least one originating from the TE and one from the BE. Under the applied voltage one increases while the other decreases which yields occasionally a minimum in the current. The two partial filaments may be at different locations or opposing with a gap in between. The low current suggests that heating is low and the filament is governed by the applied voltage and thus can increase or decrease by oxygen vacancy drift under the applied voltage. This, however, is only an approximation. The device breaks down after 5–6 cycles. This indicates that some heating does develop, the filament structure is not strictly reversible under changing the applied voltage polarity and damage accumulates gradually leading to breakdown. Goux et al. [23] argue that depletion of oxygen vacancies under the anode in a reset step results in intermediate resistance states if the applied voltage is stopped before the high resistance state (HRS) is fully recovered.

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The current in many cases, but not always, has to be limited to avoid damage, as mentioned before. A resistor in series with the device can provide a solution as it controls the maximum available current under a given applied voltage. However, this claim holds only for the total current through the MOM device. The current consists of three contributions, Eq. (4), and under switching a high transient, ionic current can exist compensated by a displacement one. This may lead to a vacancy distribution resulting in a LRS having a resistance lower than the planned one according to the compliance current [48].

14 Electrodes The metal electrodes can be of four types: (a) inert ones which allow oxygen exchange with the ambient e.g. through grain boundaries, (b) inert ones which allow oxygen storage in the grain boundaries [1], (c) reactive electrodes which form an oxide layer between them and the oxide of the MOM device and (d) inert electrodes which practically block oxygen exchange with the ambient. This refers also to bottom electrodes of type (a) applied on a dense oxygen blocking substrate. For the sake of the present discussion all electrodes except for the fourth one, are similar in the sense that they allow a change in the oxygen concentration in the oxide of the MOM. Whether oxygen is exchanged with the ambient through the grain boundaries, is stored in the grain boundaries or is exchanged with a tarnishing layer formed on a reactive electrode makes no difference in the phenomenological explanation of the device operation. It is only the material blocking electrode that is basically different as it does not allow changes in the overall composition of the oxide. In the latter case only local polarization can take place, within the oxide. However, under a high voltage of a few hundred mV or more, bubbles with oxygen may form, being trapped, depending on voltage polarity, under the upper blocking electrode or under the oxide [39, 48]. If closed bubbles exist, oxygen exchange between the oxide and the bubbles has to be considered and viewed at as oxygen exchange between the oxide in the MOM device and the ambient. An example for the first two types of electrodes is platinum which as a thin layer of ~10 nm allows oxygen exchange with the ambient and for thicker layers mainly allows oxygen storage in grain boundaries [1] Ti reacts with the oxide on which it is applied, e.g. HfO2 . This results in two oxide in series: HfO2 /TiO2 /Ti [49]. The question then arises which oxide serves as the “insulator” oxide in the MOM, in which the filament is formed and which oxide serves as a source and sink for oxygen vacancies. The oxide with a lower standard free energy of formation (higher |G0 |) serves as the more stable “insulator” oxide while the other serves as the source and sink for vacancies. In the example mentioned, HfO2 is the “insulator” and TiO2-x the source and sink for oxygen vacancies. The situation is slightly different in the pair of oxides TaO2 /Ta2 O5 based on the same metal Ta. At the contact between the two oxides the oxygen partial pressure is the same. When removing oxygen from Ta2 O5 while forming there a filament, oxygen reaches the Ta2 O5 /TaO2 interface and oxidizes TaO2 to Ta2 O5 . When oxygen is pumped electrochemically in the opposite

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direction, Ta2 O5 at the interface is reduced to TaO2 . Thus the interface TaO2 /Ta2 O5 serves as the source and sink for oxygen vacancies [50]. Gold electrodes serve as inert electrodes with high impedance for oxygen exchange with the ambient. However, oxygen can be exchanged at the electrode periphery. Hence gold electrodes can be considered, only approximately, as blocking electrodes for oxygen exchange [17]. It is important to indicate the substrate of the MOM device in order to decide whether it is blocking oxygen transfer or whether it can serve as source and sink for oxygen. One has also to specify the BE whether it can exchange oxygen with the oxide. In the latter case the fact that a substrate is impervious is of little significance under TVC, in particular for bipolar switching since oxygen can, alternately, be exchanged between the oxide and the BE.

15 Effect of Humidity The presence of water vapor in the ambient may have an effect on the MOM performance. This has been demonstrated for Pt/SrTiO3-δ /Pt [18]. It is shown to be a surface effect by adsorbed water molecule which change the space charge in the oxide and thus a Schottky barrier. Li et al. [51] report on a significant effect of moisture in various MOM devices. The water molecules are assumed to be adsorbed on the free surface and in grain boundaries and to decompose under an applied voltage that exceeds the water decomposition voltage. A water molecule can interact with a reduced oxide forming two OH·O groups [52], H2 O (g) + V··O + OxO → 2OH·O

(5)

This allows propagation of protons in the oxide by hopping from one oxide ion to a nearby one. In this case proton conductivity has also to be taken into consideration on top of the oxygen one. Messerschmitt et al. [18] argue that in the case they report (Pt/SrTiO3-δ /Pt) no OH ·O could be detected spectroscopically in the oxide bulk, which supports the explanation of a sole surface effect. Acknowledgement This work was supported by the Israel Science Foundation ISF under grant No. 699/11. The author thanks Dima Kalaev, Dan Ritter, Avner Rothschild and Eilam Yalons for many helpful discussions.

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Probing Electrochemistry at the Nanoscale: In Situ TEM and STM Characterizations of Conducting Filaments in Memristive Devices Yuchao Yang, Yasuo Takahashi, Atsushi Tsurumaki-Fukuchi, Masashi Arita, M. Moors, M. Buckwell, A. Mehonic, and A. J. Kenyon

Abstract Memristors or memristive devices are two-terminal nanoionic systems whose resistance switching effects are induced by ion transport and redox reactions in confined spaces down to nanometer or even atomic scales. Understanding such localized and inhomogeneous electrochemical processes is a challenging but crucial task for continued applications of memristors in nonvolatile memory, reconfigurable logic, and brain inspired computing. Here we give a survey for two of the most powerful technologies that are capable of probing the resistance switching mechanisms at the nanoscale – transmission electron microscopy, especially in situ, and scanning tunneling microscopy, for memristive systems based on both electrochemical metallization and valence changes. These studies yield rich information

This chapter was originally published as a paper in the Journal of Electroceramics: Yuchao Yang, Yasuo Takahashi, Atsushi Tsurumaki-Fukuchi, “Probing electrochemistry at the nanoscale: in situ TEM and STM characterizations of conducting filaments in memristive devices,” J Electroceramics, Vol. 39, nos 1–4 (2017), Pages 73–93. DOI: http://dx.doi.org/10.1007/s10832017-0069-y. Y. Yang Key Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics, Peking University, Beijing, China e-mail: [email protected] Y. Takahashi · A. Tsurumaki-Fukuchi · M. Arita Graduate School of Information Science and Technology, Hokkaido University, Sapporo, Japan e-mail: [email protected]; [email protected] M. Moors Peter Grünberg Institute, Forschungszentrum Jülich, Wilhelm-Johnen-Straße, Jülich, Germany e-mail: [email protected] M. Buckwell · A. Mehonic · A. J. Kenyon () Department of Electronic & Electrical Engineering, University College London, Torrington Place, London, UK e-mail: [email protected] © Springer Nature Switzerland AG 2022 J. Rupp et al. (eds.), Resistive Switching: Oxide Materials, Mechanisms, Devices and Operations, Electronic Materials: Science & Technology, https://doi.org/10.1007/978-3-030-42424-4_5

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about the size, morphology, composition, chemical state and growth/dissolution dynamics of conducting filaments and even individual metal nanoclusters, and have greatly facilitated the understanding of the underlying mechanisms of memristive switching. Further characterization of cyclic operations leads to additional insights into the degradation in performance, which is important for continued device optimization towards practical applications. Keywords Resistive random access memory · Conducting filament · Transmission electron microscopy · Scanning tunneling microscopy · In situ · Electrochemical reactions

Resistive Random Access Memories (ReRAMs), or memristors [1], have tremendous potential for applications in nonvolatile embedded or storage class memories [2, 3], as well as in-memory logic that overcomes the von Neumann bottleneck [4]. They are also envisaged to form the basis of power-efficient neuromorphic systems by implementing plasticity similar to that of biological synapses [5]. Consequently, extensive efforts have been devoted to research into this novel class of devices, including studies of switching materials, device structures, scalability, integration, and so on. In particular, it is very important to understand the fundamental operation mechanisms of ReRAM in order to guide device-related studies. It is well known that the resistance switching effects in memristors are usually modulated by ionic transport and subsequent conducting filament formation/dissolution processes occurring at dimensions around 10 nm, and even down to atomic scales [6–8], hence elucidating the switching mechanisms requires advanced characterization techniques capable of resolving the nanoscale switching regions formed randomly in the devices. Here we give a survey of two of the most important technologies in understanding the switching mechanisms of ReRAM – transmission electron microscopy (TEM), especially when applied in situ, and scanning tunneling microscopy (STM). We will discuss the principles and designs behind these techniques, and show how they have furthered the understanding of the nature and dynamic evolution of conductive filaments. Finally, the remaining challenges in the understanding of memristive mechanisms will be briefly discussed.

1 In Situ TEM Characterization of Metal Filament-Based ReRAM 1.1 Sample Structures Enabling In Situ TEM Observations TEM is a widely adopted technique in the study of ReRAM, including experiments performed on both cation migration-based conductive bridge random access memories (CBRAMs) and anion migration-based valence change memories (VCMs). It is

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capable of achieving direct visualization of the nanoscale localized filaments that are thought to be responsible for resistance switching. TEM is a microscopic imaging technique in which a beam of electrons is transmitted through an ultra-thin specimen (thickness < 100 nm) and an image is subsequently formed from the interaction between the electrons and the sample. Due to the small de Broglie wavelength of electrons, and especially thanks to recent technological advancements such as the introduction of spherical aberration correctors, state-of-the-art TEM instruments have reached unparalleled resolutions beyond the angstrom scale, making TEM one of the most powerful technologies to resolve the structural details of conducting filaments [9–12]. In addition, analytical studies of the filaments can be realized utilizing complementary techniques in TEM, such as energy dispersive X-ray spectroscopy (EDS or EDX), electron energy loss spectroscopy (EELS), and so on, providing further information about the composition and chemical states of filaments. Besides static characterization, in situ TEM observation allows simultaneous monitoring of both electrical switching behavior and real-time evolution of microstructure. Such in situ TEM studies have been widely performed to study ReRAM devices, and have greatly facilitated the understanding on the filament growth and dissolution dynamics as well as detailed electrochemical processes involved in resistance switching. Various sample structures have been carefully designed in order to meet the specific challenges of in situ TEM observations of filament dynamics. In general, the samples should represent the ReRAM devices studied in terms of essential attributes or structures, so that the findings acquired from the model system can be applicable to ReRAM developments. The samples should also be thin enough (typically 10 nm), limiting the lateral imaging resolution

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and therefore the minimum switching area. Local heating effects at higher currents may also damage or remove the coating, affecting the conductivity and resolution of the tip. STM is a powerful alternative for CAFM and addresses most of these problems. STM is a valuable tool in probing nanoscale features and electrical behaviour simultaneously, as the probe can act as both an electrode and a map. STM uses an atomically sharp metallic needle to scan a conductive sample surface, while a voltage is applied between the needle and sample. The field between the tip and the sample allows the local redox and ion transport processes at the heart of RS to be initiated and observed [69]. Unlike in contact-mode CAFM, there is no mechanical contact between the tip and the surface, thus mechanical deformation of the sample is excluded. By holding either the needle height or tip-sample current constant and measuring the other variable, it is possible to map both the topography of the sample and its conductivity. Electrons tunnel through the vacuum gap between the tip and the sample surface. By using quantum mechanical perturbation theory under the assumption of a spherical tip apex with the radius r the tunnelling current IT can be approximated for low bias voltages UB by the following equation: IT ∼ UB • ρ (EF ) • e−2k•(r+z) The exponential dependence of the measured tunnelling current on the tip-sample distance z results in a nearly exclusive contribution of the outermost atom of the STM tip to the tunnelling process. Thus, STM offers a greatly increased spatial resolution compared to CAFM. Furthermore, the dependence of tunnelling current on the local electron density ρ(EF ) at the Fermi level provides information on the electronic properties of the sample, which can be studied by scanning tunnelling spectroscopy (STS). However, the additional dependence on the electronic states of both the sample and the tip can complicate the interpretation of STM images due to the mixture of electronic and topographic information. Although not the focus of this review, it is of note that STM measurements in the extended field of resistance switching led to the validation of the “atomic switch” by Terabe et al. [8]. Additionally, by using switching time as a kinetic parameter that is, in contrast to the current, independent of the electronic properties, studies on pure ion conductors have been possible [70]. For resistance switching studies on transition metal oxides, STM has not been as widely used as CAFM. The main reason for this is the necessity of sufficient sample conductivity, not only in the low resistance state (LRS) but also in the high resistance state (HRS), to exclude surface charging effects. However, this issue can be avoided or minimised in many cases either by extrinsic doping [71, 72] or thermal reduction [73], enabling quantum mechanical tunnelling even on macroscopic insulators without significantly influencing ionic processes. The first resistance switching phenomena induced by STM were found on ultrathin SiO2 and Al2 O3 films. At the end of the last century Watanabe et al. observed local dielectric breakdown in SiO2 thin films by scanning the surface

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with a high negative tip potential. They attributed this to additional defect states formed by hot electron injection from the STM tip [74, 75]. Most switched areas showed metallic conductance after treatment, characterised as hard breakdown, whereas some smaller areas displayed non-metallic transport properties that were characterised as soft breakdown [75]. Magtoto et al. showed similar effects on an Al2 O3 bilayer structure [76]. However, both effects were found to be irreversible. By carefully tuning the film thickness and the scanning parameters, Kurnosikov et al. were finally able to perform intentional reversible switching events, considered a precursor of soft breakdown, between different conductance states in Al2 O3 [77]. The history of the study of resistance switching is strongly correlated with the investigation of high-κ materials, which are also of great interest in charge-based memories such as DRAM. The ReRAM community also benefited from the great research effort in controlled growth of high-κ materials. In particular, perovskites were of interest. Chen et al. investigated the resistance switching properties of Nbdoped SrTiO3 in a combined STM/STS and XPS study [71]. By performing “write scans” using increased positive tip voltages ≥2 V they could show an increase of electron density in the following “read out scans” at lower voltages (corresponding to the LRS, see Fig. 20b, d). This observation was accompanied by an increase of

Fig. 20 STM images of Nb-doped SrTiO3 (STON) after scanning the marked area with positive tip voltages ≥2 V (a and b) and with negative tip voltages ≤ −2 V (c and d) and a tunnelling current set point of 0.5 nA; (e) dI/dV-V curves obtained at LRS (corresponding to the ON area) and HRS (corresponding to the OFF area). Reprinted from Ref. [71] with permission. For comparison, the dI/dV-V curves for the as-prepared STON and LRS are given in the inset. (f-I)–(f-V) Current mapping as obtained from STM measurements on Pt-doped Nb2 O5 subject to different tip biases. Reprinted from Ref. [72] with permission

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Fig. 21 CITS-STM images of an Au/HfO2 /In0.53 Ga0.47 As cell structure measured with (a) positive and (b) negative tip voltage. Reprinted from Ref. [78] with permission

the Ti3+ content in the sample and the creation of additional donor-like levels near the conduction band, detected in the dI/dV-V spectra. By using “write scans” with a negative tip voltage ≤ −2 V the electron density, and thus the surface conductivity, was significantly reduced (corresponding to the HRS, see Fig. 20a, c) showing the reversibility of the switching events. In the HRS both the Ti3+ signal and the state density of the donor-like levels became significantly lower (Fig. 20e). This supports the notion that oxygen vacancies have an important role in the resistance switching process of SrTiO3 . Another similar example is that of a Pt-doped Nb2 O5 RRAM device [72]. Figure 20f-I shows the state of the pristine device; by increasing the tip voltage from 1 V to 3 V the number of conductive spots increases, indicating a SET process (Fig. 20f-II to Fig. 20f-IV). By inverting the tip voltage to −3 V, conductive spots disappear due to a RESET process (Fig. 20f-V). The localized regions showing reversible conductance levels are shown in Fig. 20f, in agreement with the observation of formation and dissolution of conducting filaments observed by TEM in oxide-based ReRAM devices (e.g. Figs. 16–18). Hota et al. demonstrated local resistance switching on complete Au/HfO2 /In0.53 Ga0.47 As cells [78]. In this study, current imaging tunnelling spectroscopy (CITS) was used to show the formation of conductive filaments consisting of partially reduced hafnium oxide during the SET process of a ReRAM cell. In CITS, an I-V curve is recorded at each pixel of an STM image, resulting in a conductance map of the surface [79]. By applying an increased positive tip voltage the authors could show non-uniform distributed spikes in the current profile, representing locations where conducting filaments had formed (Fig. 21a). Applying the opposite tip polarity reverses this effect (Fig. 21b). These CITS imaging results are once again consistent with previous TEM observations of conducting filaments. The correlation between resistance changes induced by electrical stress and an increased defect concentration has been discussed since the study of resistance switching began, but the influence of the film morphology on the local distribution

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Fig. 22 (a) STM image of a sputter deposited SiOx film showing enhanced conductivity at column edges; (b) and (c) I-V curve obtained with STM spectroscopy showing resistance switching between two distinct states. Reprinted from Ref. [82] with permission

of these defects was not clear. STM measurements on thin CeO films indicated the significant role of grain boundaries [80]. These distinguished areas in polycrystalline systems have a strongly increased defect level. Thus they may behave as very active leakage paths in high-κ gate dielectrics, as well as active switching centres in ReRAM cells. Mehonic et al. showed an enhanced conductivity at the edges of the columnar structures of sputter deposited silicon-rich SiO2 (SiOx where x ≈ 1.3) films [81]. These edges offer sites for the nucleation of oxygen vacancies and silicon nanoinclusions, which were found to be integral constituents of conductive filaments in SiOx resistance switches [62, 63]. By placing the STM tip above a column edge and applying the appropriate voltage the sample could be reversibly switched between HRS and LRS [82]. As shown in Fig. 22a these conductive pathways around the columns are around 5–30 nm in diameter, similar to the scale of filaments shown by TEM observations (Figs. 16 and 17), suggesting that silica based ReRAM cells may be scaled down to small nanometer-scale dimensions in order to achieve very high levels of integration. The high sensitivity of STM can also be used to study the switching properties of highly conducting oxide materials, whose properties are inaccessible with other techniques. Moors et al. demonstrated the resistance switching activity of SrRuO3 thin films [73]. This strong electron conducting perovskite was generally viewed as an inactive switching component and was therefore used as a common electrode material in ReRAM cells. This is due to the fact that the resistance switching in SrRuO3 is confined to only slight changes in the electronic conductance and therefore cannot be probed by most techniques. However, with the high spatial resolution and surface resistance sensitivity of STM, resistance switching in SrRuO3 was successfully observed, where the switching area could be scaled down to approximately 2 nm in diameter [73].

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Fig. 23 (a) STM image of a vacuum annealed TaOx film after scanning the marked area with a cathodic tip voltage of −5 V; (b) I-V curves measured on switched and unmodified regions of the strongly reduced sample; (c) STM image of an atmosphere exposed TaOx film after scanning the marked area with an anodic tip voltage of +5 V; (d) I-V curves measured on switched and unmodified regions of the post-oxidised sample. Reprinted from Ref. [73] with permission

In the same study, the authors also investigated the switching properties of the macroscopic insulator Ta2 O5 , demonstrating the applicability of STM to a wide spectrum of transition metal oxides [73]. Here, two different switching mechanisms were observed, depending on the stoichiometry of the samples. In the case of highly reduced TaOx films, the LRS was attained under a cathodic tip potential by reducing the TaOx locally to metallic Ta, leading to an Ohmic I-V characteristics (Fig. 23b). In contrast, re-oxidized films exposed to ambient conditions showed a LRS under anodic tip potential by creating additional oxygen vacancies, resulting in non-Ohmic behaviour (see Fig. 23d). Along with STM based resistance switching studies on classical oxide materials, more advanced material systems have also been investigated. Plecenik et al. studied the I-V characteristics of epitaxially grown c-axis oriented YBa2 Cu3 O7−x thin films [83]. This is a material known to be a high temperature superconductor [84].

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Using a Pt-Ir STM tip as a top electrode, the authors observed a temperaturedependent resistance switching effect. Here, only the resistance of the HRS was increased significantly with decreasing temperature; the LRS was unaffected. At a fixed temperature, the resistance of the LRS decreased when the maximal current or voltage value was increased, while the resistance of the HRS remained stable. Dubost et al. investigated a new form of resistance switching within the Mott insulator compound GaTa4 Se8 [85]. By applying electric pulses with an STM tip to the sample, an electronic phase separation concomitant with a lattice deformation could be generated. In the transited state both metallic and strongly insulating domains with a size ranging between 30 and 50 nm coexisted within the semiconducting material. Finally, in order to reach the maximum scalability of resistance switching devices, the electrical characterisation of single nanoparticles became a focus of the ReRAM community. Here, the high resolution of STM and its ability to precisely contact nanoscale objects was crucial. Gambardella et al. investigated Co nanoparticles embedded in a TiO2 matrix and showed local resistance switching in the tunnel conductivity at the level of a single nanoparticle by applying voltage pulses through the STM tip [86]. Hota et al. integrated Au nanoparticles in an Nb2 O5 matrix and studied their influence on the conductive filament formation and rupture during the SET/RESET process [87]. STM measurements using the CITS technique evidenced an enhanced filament formation and rupture in the presence of nanodots. The authors considered that the large effective surface of the Au/oxide interface resulted in an increased oxygen ion storage at the nanodot locations. Chakrabarti et al. used a copper-zinc-tin-sulphide shell to encapsulate Au nanoparticles [88]. These complex particles showed two transitions in the tunnelling conductance and, hence, multilevel switching following the application of different voltage pulses with the STM tip. Another promising approach is the use of carbon nanotubes as switching elements due to their relatively simple integration in silicon technology [89]. Ageev et al. showed that vertically aligned carbon nanotubes grown on a metallic substrate by plasma enhanced chemical vapour deposition could switch between two conductance states with different voltage pulses [90]. The proposed switching mechanism related to the internal electric field strength of a nanotube caused by a voltage pulse induced instantaneous deformation [91].

6 Concluding Remarks In summary, we have given an overview of the in situ TEM and STM characterizations that have been performed to disclose the localized electrochemical processes in different types of resistance switching devices. As a high resolution technique with versatile and powerful analytical capabilities, in situ TEM studies employing carefully-designed sample structures have not only visualized the formation of metal filaments and identified their static properties, but also clarified detailed filament dynamics, including the growth directions and geometries. These findings give rise

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to a generalized picture for filament growth, in which the different growth modes can be explained by detailed kinetic parameters including ion mobility and redox rate. The resistance switching in oxide-based ReRAM manifests as formation and rupture of oxygen-deficient conduction channels, e.g. filaments in the TiOx Magnéli phase, driven by an applied electric field and/or thermal effects. Furthermore, TEM imaging during cyclic operations has revealed the dependence of filament characteristics on compliance currents and nucleation positions, and thus offered implications for device reliabilities. In contrast to the conventional CAFM method, the adoption of STM in resistance switching characterization has the advantages of eliminating tip-sample contactinduced deformations and greatly improved spatial resolution, and have been used to understand the resistance switching mechanisms in a wide spectrum of materials ranging from transition metal oxides, highly conductive oxides and superconductors to Mott insulators, nanoparticles and carbon nanotubes. Thanks to these microscopic studies, our understanding of the switching mechanisms of ReRAM have been significantly improved recently, which will in turn facilitate the modelling and optimization of the devices. Despite the encouraging progress in understanding the switching mechanisms especially that of CBRAM devices, continued research efforts are required to further clarify the detailed switching mechanisms – particularly in the case of VCM devices, which are more difficult to study. In addition, it will be of significance to establish correlations between structural evolutions at the microscopic level and the variation, degradation and failure of resistance switching devices, which can be used to guide future device optimizations. It is also imperative to further correlate the microstructural findings acquired from TEM and STM characterizations with the switching kinetics of ReRAM devices that are relevant to the time-scales of detailed physicochemical processes [92–94], as well as establishing the role of moisture or ionic carriers such as hydroxyl groups in the process of interfacial reactions and charge transfers [95, 96]. Encouraging progress has also been made on these subjects recently, but lies outside the scope of this review. Looking forward, TEM and STM techniques will undoubtedly continue to play important roles in disclosing the detailed physicochemical mechanisms of resistance switching systems, and the findings from these studies may be of general significance for device engineering, physical chemistry, materials science, and nanotechnology. Acknowledgements Y.Y. acknowledges financial support from National Science Foundation of China (61674006, 61421005, 61376087 and 61574007), Beijing Municipal Science & Technology Commission Program (Z161100000216148) as well as the “1000 Youth Talents Program” of China and also thanks Mr. Jingxian Li for his assistance. M.B., A.M. and A.J.K. gratefully acknowledge financial support from the Engineering and Physical Sciences Research Council (EPSRC). Y.T., A.T.F. and M.A. acknowledge financial support from the Japan Society for the Promotion of Science (JSPS, KAKENHI, 15H01706, 16H0433906 and 16 K18073). Y.Y. prepared Sect. 1–2. Y.T., A.T.F. and M.A. prepared Sect. 3–4. M.M., M.B., A.M. and A.J.K. prepared Sect. 5. All authors contributed to Sect. 6, revised and discussed the whole manuscript at all stages.

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Nanoscale Characterization of Resistive Switching Using Advanced Conductive Atomic Force Microscopy–Based Setups Mario Lanza, Umberto Celano, and Feng Miao

Abstract Conductive atomic force microscopy (CAFM) is a powerful tool for studying resistive switching at the nanoscale. By applying sequences of I–V curves and biased scans, the write, erase, and read operations in a dielectric can be simulated in situ. CAFM can be used to monitor the inhomogeneities produced by a previous device-level stress, for example, conductive filaments’ formation and disruption. In this case, the removal of the top electrode may be a problem. One attractive solution is to etch the top electrode using the CAFM tip for dielectric surface analysis, and one may also etch the dielectric to observe the shape of the filament in three dimensions. The genuine combination of electrical and mechanical stresses via CAFM tip can lead to additional setups, such as pressure-modulated conductance microscopy. In the future, new experiments and CAFM-related techniques may be designed to deepen into the knowledge of resistive switching. Keywords Electrical characterization · Conductive atomic force microscopy · Resistive switching · Scalpel SPM · Pressure-modulated conductance microscopy

This chapter was originally published as a paper in the Journal of Electroceramics: Mario Lanza, Umberto Celano, Feng Miao, “Nanoscale characterization of resistive switching using advanced conductive atomic force microscopy based setups,” J Electroceramics, Vol. 39, nos 1–4 (2017), Pages 94–108. DOI: http://dx.doi.org/10.1007/s10832-017-0082-1. M. Lanza () Institute of Functional Nano & Soft Materials, Collaborative Innovation Center of Suzhou Nano Science & Technology, Soochow University, Suzhou, China e-mail: [email protected] U. Celano IMEC, Heverlee (Leuven), Belgium F. Miao National Laboratory of Solid State Microstructures, School of Physics, Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing, China © Springer Nature Switzerland AG 2022 J. Rupp et al. (eds.), Resistive Switching: Oxide Materials, Mechanisms, Devices and Operations, Electronic Materials: Science & Technology, https://doi.org/10.1007/978-3-030-42424-4_6

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1 Introduction Conductive atomic force microscopy (CAFM) is a technique widely used to evaluate the local currents flowing across thin ( 10 V. Interestingly, subsequent I– V curves revealed that only the locations with VBD ~ 5 V showed high resistivity recuperation (reset), indicating that in NVMs the electrically weak locations are responsible for the RS (see Fig. 2). Similar examples can be found in Ref. [16]. If sequences of current maps are measured at a random location of the sample (Fig. 1b), it may not be necessary to repeat the experiments so many times at different locations, because the read/write/read/reset/read sequence is being reproduced at all the pixels of the image scanned, which allows getting statistical information. As an example, Fig. 3 shows, the read scan of a NiO oxide in which some concentric areas have been sequentially stressed with positive/negative biases in order to simulate write/erase operations. The sizes of the spots change in each region, and the current/size of the spots can be statistically analyzed. References [13, 27, 37–39] show read/write/read/erase/read like sequences of current maps, proving an entire RS cycle in different materials (SrTiO3 , HfO2 , and NiO). An additional advantage of using sequences of current maps is that, as the stressed areas are usually above the micrometer range, the atomic rearrangements responsible for the RS can be easily monitored with standard chemical techniques, such as X-ray photoelectron spectroscopy (XPS) [40]. The second option is to perform a read-like scan applying a bias near VQN in order to characterize the topography and conductivity of the sample, and based on that information select a specific location/area to investigate if that location

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Fig. 3 Current images of Ni1 + δ O/Pt film. Before observation, fourfold overwriting was performed (left) in the air and (right) in a vacuum. (Reproduced with permission from Ref. [40]. Copyright American Institute of Physics)

promotes RS by means of I–V curves/current maps. The place to analyze with the tip can be selected based on the features observed in the topographic maps (valleys, hillocks, plateaus) or in the current maps (insulating/conductive spots). In Ref. [37], the authors scanned the surface of polycrystalline HfO2 films, grown by atomic layer deposition (ALD) and annealed at 400 ◦ C, by applying a voltage of −2.6 V, and observed a characteristic pattern with insulating grains surrounded by conductive grain boundaries (GBs), shown in Fig. 4a. Further sequences of I– V curves collected at grains and GB locations revealed that only GBs drove RS (Fig. 4b). It should be highlighted that, as the annealing temperature (TA ) used to induce the polycrystallization was only 400 ◦ C, the GBs could be only observed in the current maps (at higher temperatures, GBs in HfO2 can also be observed in the topographic maps [41], but those open GBs usually do not exhibit RS [23]). When measuring tip-induced RS, it should be highlighted that standard CAFMs may present some important limitations. The first one is that most CAFMs can only apply low voltages up to ±10 V, and they typically only hold 3 orders of magnitude current sensing capability. This may be insufficient when measuring RS, especially to monitor the forming process. The second is the absence of a current limitation when applying a constant or ramped voltage stress. Most commercial CAFMs have a specific saturation level, but that does not imply that the real current flowing through the tip/sample system is limited by the equipment. Therefore, using the standard electronics of the CAFM to perform write/erase operations (I–V curves or scans) may lead to additional damage in the dielectric [23], leading to a wider and irreversible CFs showing sizes and driving currents that may not be representative of switchable CF ones. To solve these two problems, a low noise source meter or semiconductor parameter analyzer (SPA) can be used to apply large current limited voltages to the tip/sample system [42–44]. An additional problem is that, when investigating bipolar RS in silicon and/or transition metal oxides (TMOs), local anodic oxidation (LAO) may take place if the measurement is performed with a

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Fig. 4 (a) Third current map measured on a 6 nm thick HfO2 stack showing the polycrystalline structure of the film. The scale bars represent 100 nm, and the current image was collected by applying −2.6 V. (b) Typical cyclic voltammograms measured on GBs, the red spots in panel (a), and on the nanocrystals, the blue spots in panel (b). The dashed gray area is the typical I–V window that can be captured with a commercial CAFM, which is insufficient to observe RS. (Modified and reprinted with permission from [37]. Copyright Wiley-VCH 2015)

CAFM working under air atmosphere. The reason is that the relative humidity (RH) of the environment creates a water meniscus at the tip-sample junction, and it has been observed that when injecting electrons from the tip an oxide can be grown at the surface of these materials due to water molecule disassociation [45]. This problem can be avoided by measuring in dry atmospheres, such as dry nitrogen (RH < 0.5%), high vacuum (10 N/m is generally required. Previous works have shown the existence of a threshold value (ca. tens of nN) for the load force to achieve a stable tip-sample electrical contact [69]. Here we operate safely over that value, scanning our tip at hundreds of nN. The latter results in a stable electrical contact between tip and sample, which is limited in physical size by the size of the diamond crystallite which is responsible for the current collection. In other words, while the actual tip-sample contact size is amplified by the load force, the high electrical lateral resolution of CAFM is preserved. Note that the actual value for the removal rate depends on many parameters such as material type and deposition technique, layer thickness, and absorbed contaminants. During the entire removal phase, a small DC voltage is applied between the tip-sample system to induce the current used as medium of contrast in the CAFM maps. This bias is generally very small in case of CBRAM between 10 and 50 mV, and it needs to be increased for VCM in range 100–500 mV. Finally, the observation of the CFs in case of VCM cell is done in high vacuum condition (10−5 mbar) to limit the presence of environmental oxygen during the analysis. As SPM tomography is a destructive technique, a crater is formed in the region of interest whereby a large fraction of the removed material is accumulating on the side of the scan area and on the tip body

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[70]. Figure 7 refers to the case of a VCM cell, but similar results are obtained in case of CBRAM devices [71–73]. (b) Tomogram formation and 3D reconstruction After the acquisition of the set of 2D images, the three-dimensional reconstruction leads to a 3D–data set for the structural and electrical properties. This procedure starts with the displacement of the 2D images set in a 3D matrix by means of a dedicated MATLAB routine [65]. The slices are generally considered to be evenly spaced in the third dimension although non-equidistant spacing can be implemented if required. The newly generated 3D matrix is imported in a graphic rendering software (e.g., Avizo) where each slice is aligned. This step can be done using dedicated error-minimization algorithms between subsequent slices, or manually aligning consecutive slices by means of alignment markers. At this point, the software can execute different interpolations to reconstruct the missing information between slices. Generally, a linear interpolation based on the value of the nearby slices is preferred for our purpose. Recently other groups have proposed the usage of dedicated software for 3D rendering such as 3D Slicer [67]. The 3D tomogram will show the 3D distribution of the current (if CAFM is used for the probing); it goes without saying that the proper selection of the current level used in 3D will determine the shape and size of the object shown.

3.2 Filament Observation by Scalpel SPM The direct observation of the CFs in 3D is a key enabler to clarify the role of each interface inside the RS cell and understand the growth mechanism of the filaments. The latter is tremendously dependent on many properties of the switching materials such as ion mobility, ion supply, and the ionic species to name a few [73]. In other words, each material system requires its dedicated characterization and direct CF observation, as a large deviation is often observed between reality and the theoretical predictions. As an example of Scalpel SPM application, we have performed the 3D observation of the CFs for VCM and CBRAM devices that have been subjected to a few tens of cycles before the analysis [72, 73] (at the device level, using a probestation connected to the two pads of the MIM structure). For both cells, the electrical programming (not shown) is made of an initial electroforming process followed by a bipolar resistive-switching behavior with two stable states, that is, a high-resistance (HRS) and a low-resistance (LRS) one. The change in resistance can be triggered by using a voltage variation (±2 V for CBRAM) and (±1 V for VCM) whereby we limit the current through the device at 50 μA (CBRAM) in order to avoid the breakdown of the oxide and to limit the degradation. This is achieved by connecting the (TiN) bottom electrode of the memory element to the drain of a selector transistor in a one-transistor-one-resistor (1T1R) configuration [74]. The details of each cell and the 3D tomogram are shown in Fig. 8. Both cells have a comparable thickness for the oxide layer (Fig. 8b) and were programmed under

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Fig. 8 Direct 3D observation of CFs in CBRAM and VCM. (a) The cross-point cell is programmed in the LRS by a 1T1R configuration. (b) The CBRAM stack and (c) the VCM cell structure are reported together with the 2D set of the CAFM slices acquired on the CF location. (d) 3D interpolation of the CBRAM and (e) VCM filament in the LRS state. (Reprinted with permission from Ref. [72, 73]. Copyright American Chemical Society 2015)

similar electrical conditions. Interestingly, the VCM CF shows reduced conductivity after the top electrode is removed as compared to the CBRAM case. This is evident by comparing the difference in the color scale of the 2D dataset (Fig. 8b, c). The latter is consistently observed in multiple observations both in VCM and CBRAM done with various tips. After removing the top electrode with Scalpel SPM, a relatively high current (few nA) is flowing in the CF when probed with a few tens of mV in the case of CBRAM. Vice versa, for VCM a strongly reduced current (few pA) is detected. This difference originates from the different chemical nature of the CFs. Indeed in CBRAM, the Cu in the electrolyte is fairly stable against the ambient, and its LRS value remains fairly unaffected after the top electrode removal. On the other hand, the intimate nature of the defects (oxygen vacancies) constituting the CFs in VCM and in particular their much higher reactivity with the environmental oxygen will lead to a re-oxidation of the top part of the filament such that in the top layer the conductivity is lost. This adds some complexity in the measurement of CFs relying on oxygen vacancies for their conductive state, as the spontaneous passivation of the CF will require controlled environment for the analysis and lowcurrent sensitivity [73]. The set of CAFM slices representative of the CFs are aligned and interpolated to obtain a 3D tomogram for both CBRAM (Fig. 8d) and VCM (Fig. 8e). In both cases, we suppress the low-current contribution in the 3D tomogram in order to highlight only the highly conductive features. The inert counter electrode is visible at the bottom. The 3D cross-sections shown in Fig. 8d, e clearly indicate the conical shape of the CFs in 3D. In Fig. 8d the CF (display threshold 5 nA, blue region) shrinks in dimensions when moving from TE to BE, that is, from the Cu/oxide interface towards the oxide/TiN interface. The cross-sectional area of the CF shrinks from ≈493 nm2 on the Cu-side down to ≈200 nm2 on the side of the inert electrode.

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These areas should be considered affected by a 10% over estimation error arising from the potential tip-induced artifact of the technique as described elsewhere [65]. Figure 8e shows the CF of the VCM device (iso-surface at 50 pA, blue region). The area of the observed CF is smaller as compared to the CBRAM case and shows a constriction of ≈40 nm2 close to the (TiN) bottom electrode. The 3D tomograms unambiguously reveal that the CFs have the narrowest part close to the bottom (inert) electrode. It is also clear that the volume of the Cu filament can be approximated by a truncated cone, while the VCM filament shows a more elongated shape. The complete set of 2D CAFM slices, the animated cross-section and other images of the CFs are available elsewhere [72]. It should be noted that a conductivity decrease in sequences of CAFM scans at the same location could have two interpretations: (i) conductivity reduction in the sample, and (ii) conductivity reduction of the tip (due to wearing). Therefore, one could think that the shrinking of the CFs shown in Fig. 8d, e may be related to tip degradation. This hypothesis can be easily discarded, thanks to the presence of the TiN bottom electrode which is continuously visible during the entire material removal process with no appreciable changes in conductivity, thus representing a good sanity check for the tip quality during Scalpel SPM. However, the advantages of Scalpel SPM need to be also considered in view of a list of open points which might limit its applications and complicate the interpretation of the results. For example, the usage of the same tip for removal and probing represents a limit to the tip’s material that at high forces can undergo a fast degradation. Moreover, this also limits to the usage of diamond problems which are not equally indicated for every measurement. In addition, in material systems where the oxygen vacancies concentration can be mechanically modulated, the application of high pressure can induce parasitic effects thus complicating the interpretation of results.

3.3 Scalpel SPM for Site-Specific and Failure Analysis Particularly for its simple sample preparation and rapid filament localization, Scalpel SPM can be easily applied for the study of single device or failure analysis [75]. In particular for the intrinsic stochastic nature of the ionic motion in confined volumes, filamentary-based RS cells represent an interesting class of devices to study during or after failure. For example, Scalpel SPM has been used to unravel the presence of two different types of CFs observed in CBRAM, namely, a broken and non-broken CF both associated with the HRS. By selective cell programming and 3D observation of the CFs, two distinctive morphologies of the erased CFs have been shown in case of abrupt and progressive type of reset. When the I–V (reset) characteristic was abrupt, broken CFs were generally observed. Vice versa, for cells showing a progressive reset transitions, non-broken CFs were found. The latter has been supported by the analytical fitting of the I–V characteristics which indicated for two erased CFs either a tunnel-barrier of quantum-point-contact description [76, 77]. These findings, partially reported in Fig. 9, suggest that due to the stochastic

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Fig. 9 Site-specific Scalpel SPM application. (a) Electrical characteristic and tomographic observation of the CF related to the abrupt type of reset in CBRAM. (b) Electrical characteristic and tomographic observation of the CF related to the progressive type of reset in CBRAM. (c) Multiple attempts of filament formation observed in a SiOx -based sample. Schematic of the SiOx -based sample and unipolar I–V switching characteristic reported in the top inset. (Reprinted with permission from Refs. [67, 75]. Copyright American Chemical Society 2015 and The Royal Society of Chemistry)

nature of the ionic motion, the final shape of the CF after the reset transition has to be interpreted on the basis of the starting point (i.e., original size of the CF constriction) which determines the final shape. In Fig. 9a, the case of an abrupt reset is shown in the electrical characteristic. This shows a sudden decrease of the current during the reset voltage sweep which is related with a broken CF when using Scalpel SPM for its observation. On the contrary, Fig. 9b reports the case of a progressive reset transition generally associated with a uniform increase in resistance of the memory cell during the reset. In this case, the direct observation of the CF suggests the presence of a continuous filament determining the transport inside the filament as confined in a nanosized constriction. More recently, our approach has been used by others for the analysis of unipolar switching operations in SiOx -based devices [67]. Buckwell and co-authors investigated the impact of a relatively strong electroforming events (voltage stress up to ±20 V) in 37-nm thick oxide, where a tungsten needle in direct contact with the sample’s surface is used to induce the CFs [67]. They could observe the presence of multiple filaments extending over hundreds of nanometers, suggesting that some growth paths may not be suitable for the filamentation thus favoring the CF formation within preferential regions inside the oxide.

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4 Pressure Modulated Conductance Microscopy The pressure-modulated conductance microscopy (PMCM) is a powerful method for identification of conduction channels in memristive devices [78, 79]. Figure 10a schematically illustrates the experimental setup of the PMCM in the atmosphere. A non-conducting AFM tip, which is not electrically connected to the device, is used to apply a mechanical force (in contact mode) to the top electrode of a crossbar memristive device with sandwiched structure (bottom electrode/memristive material/top electrode). In the meanwhile, the variation of the voltage dropped on the structure under a certain low current bias is simultaneously monitored as an output signal of the AFM controller. As a result, a resistance map versus tip position can be obtained together with the topographic information of the device. As the tip scans over a conduction channel region through which the current mainly flows, it causes the compression of the channel length or the hopping/tunneling distance [79– 82]. A resistance dip subsequently appears on the resistance maps. A representative system which has been intensively investigated is TiOx -based memristive devices. The first experimental data regarding the observation of conduction channels are shown in Fig. 10b [79]. While the device’s topography is shown in the top image, the middle and bottom images present the device’s conductance (G = I/Vb ) images as a function of the tip position in ON and OFF states (respectively). Before any electrical operation was applied on the device (electroforming process) [83], a relatively uniform conductance image was obtained in the scanned region (as shown in Fig. 10b, bottom image). After the device was electroformed and switched ON to a low resistance state by applying a bias voltage, a local conductance peak (as shown in the middle image) with spatial dimension about 40 nm appeared. By comparing the AFM topography image with the corresponding resistance map collected simultaneously, the exact location of the active switching region sandwiched between the top and bottom electrodes can be identified. A typical resistance map of a TaOx -based memristive device at a low resistance state (ON state) is shown in Fig. 10c. Only single resistance dip (yellow–red dot in Fig. 10c) was observed, indicating that there was only one dominant active switching region in this device. After locating the active switching region by the PMCM, a focused ion beam system (FIB) can be used to anatomize the identified channel. Figure 10d shows a transmission electron microscopy (TEM) image of the obtained crosssection of the conduction channel area. More detailed analyses of the elemental compositions and atomic structures of the conduction channel thus become feasible [80]. PMCM can also be utilized to study the transport properties of memristive devices. F. Miao et al. systematically studied the mechano-electrical response of TiOx -based devices by using PMCM [80–82]. The summarized results are shown in Fig. 11, which plots the relative conductance change under compressive strain (εzz ) as a function of the unperturbed conductance G(0):

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Fig. 10 (a) Experimental setup (side view). The device was under a certain current bias and the voltage dropped on the device was measured, while a scanning AFM tip was used to produce local mechanical modulation, yielding a resistance/conductance map versus tip position. (b) The conductance images (middle and bottom) and topographical map (top) of a TiOx -based device. (c) The resistance map of a TaOx -based memristive device exhibiting a resistance dip (the red dot, highlighted by the dashed square in the magnified inset) versus tip position, displays the conduction channel. Color scale: measured resistance of the device. The black dashed line in the inset represents the position cross-sectioned across by FIB. (d) TEM image of the conduction channel region identified from PMCM. (Reprinted with permission from Refs. [78, 79]. Copyright Wiley-VCH 2011 and American Chemical Society 2004)

g =

G (εzz ) − G(0) G(0)

(1)

For very resistive devices with G  GQ (where conductance quanta GQ = 2e2 /h or ≈ 80 μS), εg is relatively large, ~10–30%, suggesting tunneling mechanism [81]. For very conductive devices with G > 2GQ , g is much smaller, < ~3%, mainly due to the metallic nature of the conduction channel. For devices with conductance G ~ 1–2 conductance quanta GQ , “inverse” switching centers, that is, those with negative values of g were observed. Such observation indicates that there were one or two highly transmitting quantum conduction channels sandwiched between the bottom and top electrodes. The conduction channels can be treated as a tiny Fabry-Perot cavity for electrons, exhibiting phase coherent in nanoscale at room temperature. As electron waves propagate through the channel between two partially reflecting barriers, the incoming and multiple reflected electron paths

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0.3 L0

0.2

Δg (εzz = 1%)

0.1 0.0

–0.1 –0.2 –0.3 10

100

1000

G(0) (μs)

Fig. 11 Relative change in conductance under 1% compressive strain as a function of the unperturbed conductance G(0). The red circles and blue triangles are used to differentiate the data points with positive and negative values. The left and right dotted lines denote G = GQ and G = 2GQ , respectively. Insets: schematic representation of microscopic atomic configurations for devices with G(0)  GQ , G(0) ~ GQ , and G(0) GQ , respectively. (Reprinted with permission from Ref. [80]. Copyright American Physical Society 2008)

interfere, causing periodic oscillations in the transmission coefficient as a function of interelectrode spacing. Quantitatively, the transmission coefficient of an electron through two barriers T is parametrized by [84]. T =

16γ 2 (1 + γ )4 + (1 − γ )4 − 2(1 + γ )2 (1 − γ )2 cos (2k2 L)

(2)

where γ = k2 /k1 , k1 is the wave vector in the electrodes, and k2 in the conduction channel, L is the length of the channel and reduced from the initial length L0 by δL = L − L0 = uzz L0

(3)

where the local compressive strain uzz at a depth d is approximately uzz ∼

d3 3   F 2π E x 2 + y 2 + d 2 5/2

(4)

inside an elastic medium under a force F applied at a point at x, y = 0 [85]. Small changes in L will thus cause a positive, negative, or oscillatory response in T, as

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Fig. 12 (a) Periodic oscillations in the transmission coefficient as a function of the interelectrode distance, calculated using Eq. (2) and k2 = 1010 m−1 . Dotted line: γ = 0.5, Solid line: γ = 1. (b) PMCM image (right) exhibiting a conductance dip as a function of tip position. Data were taken at uzz (0, 0) = 3.8%. Simulation (left) calculated using Eq. (5), L0 = 1.15 nm and γ = 0.5. Color scale: G/G(0). (Reprinted with permission from Ref. [80]. Copyright American Physical Society 2008)

shown in Fig. 12a. In order to obtain T as a function of tip position (x, y), we could substitute Eqs. (2) and (4) into (3). For each spin-degenerate channel,   G (x, y) = 2e2 / h T (x, y)

(5)

In Fig. 12b, by considering the value of the initial length L0 as 1.2 nm, the calculated image of G(x, y) versus tip position (x, y) reproduces the features observed in experimental data. Besides conductance dips, quantum oscillations were also observed for devices with conductance ~1–2 GQ , If the initial channel length L0 is located close to the right side of a local minimum in T (as shown in Fig. 12a), with increasing force that reduces L, T first decreases to a minimum as the AFM tip reaching the center of the conduction channel, then increases as the tip moves away. Such W-shaped ring (Fig. 13a, left panel) was observed in experiments. In another case, similarly,

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Fig. 13 (a) W-shaped ring. Right panel: simulation result calculated using Eq. (5), L0 = 1.45 nm and γ = 0.5. Left panel: data obtained at uzz (0, 0) = 6%. (b) M-shaped ring. Right panel: simulation result calculated using Eq. (5), L0 = 1.59 nm and γ = 0.5. Left panel: data obtained at uzz (0, 0) = 2%. Color and vertical scale: G/G(0). (c) Experimental data: line traces across one conduction channel under the compressive strain uzz (0, 0) = 2.4% (upper trace) and uzz (0,0) = 6.5% (lower trace). (Reprinted with permission from Ref. [80]. Copyright American Physical Society 2008)

if the initial channel length is located close to the right side of a local maximum in T, a M-shaped ring (Fig. 13b, left panel) can also be observed. These quantum oscillation data can be simulated with the model presented above, by taking specific values of L0 (L0 = 1.45 nm in Fig. 13a and L0 = 1.59 nm in Fig. 13b, right panels). A strong evidence to validate this model is the experimental realization of tuning an inverse switching center (Fig. 13c, top panel) into oscillations as a W-shaped ring (as shown in Fig. 13c, bottom panel) while the applied strain increased.

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5 Conclusion CAFM is a powerful technique to analyze RS at the nanoscale. The CAFM can be used to induce the switching (set/reset transitions) and/or to read the conductivity changes. The locations that promote RS within a specific area can be discerned, and the size of the filaments and the currents driven can be quantified. The ability of CAFM to apply mechanical stresses can be used to perform advanced characterization, such as 3D tomography and PMCM. The main drawback of the CAFM technique when analyzing RS is the fast wearing of the tips, which makes necessary to corroborate all observations statistically. Acknowledgments M. L. acknowledges support from the Young 1000 Global Talent Recruitment Program of the Ministry of Education of China, the National Natural Science Foundation of China (grants no. 61502326, 41550110223, 11661131002), the Jiangsu Government (grant no. BK20150343), the Ministry of Finance of China (grant no. SX21400213), and the Young 973 National Program of the Chinese Ministry of Science and Technology (grant no. 2015CB932700). The Collaborative Innovation Center of Suzhou Nano Science & Technology, the Jiangsu Key Laboratory for Carbon-Based Functional Materials & Devices, and the Priority Academic Program Development of Jiangsu Higher Education Institutions are also acknowledged.

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SiO2 -Based Conductive-Bridging Random Access Memory Wenhao Chen, Stefan Tappertzhofen, Hugh J. Barnaby, and Michael N. Kozicki

Abstract We present a review on the subject of conductive-bridging random access memory (CBRAM) based on copper- or silver-doped silicon dioxide. CBRAM is a promising type of resistive nonvolatile memory which relies on metal ion transport and redox reactions to form a persistent conducting filament in a high-resistance film. This effect may be reversed to return the device to a high-resistance state. Such control over resistance can be used to represent digital information (e.g., high = 0, low = 1) or produce multiple discrete or even continuous analog values as required by advanced storage and computing concepts. Many materials have been used in CBRAM devices, but we concentrate in this chapter on silicon dioxide as the ionconducting layer. The primary benefits of this approach lie with the complementary metal–oxide–semiconductor process compatibility and the ubiquity of this material in integrated circuits, which greatly lower the barrier for widespread usage and permit integration of memory with silicon-based devices. Our discussion covers materials and electrochemical theory, including the role of counter charge in these devices, as well as the current understanding of the nature of the filament growth. Theory of operation is supported by descriptions of physical and electrical analyses of devices, including in situ microscopy and impedance spectroscopy. We also provide insight into memory arrays and other advanced applications, particularly in neuromorphic computing. The radiation tolerance of these devices is also described.

This chapter was originally published as a paper in the Journal of Electroceramics: Wenhao Chen, Stefan Tappertzhofen, Hugh J. Barnaby, “SiO2 based conductive bridging random access memory,” J Electroceramics, Vol. 39, nos 1–4 (2017), Pages 109–131. DOI: http://dx.doi.org/10. 1007/s10832-017-0070-5. W. Chen () · H. J. Barnaby · M. N. Kozicki School of Electrical, Computer, and Energy Engineering, Arizona State University, Tempe, AZ, USA e-mail: [email protected] S. Tappertzhofen Department of Engineering, University of Cambridge, Cambridge, UK © Springer Nature Switzerland AG 2022 J. Rupp et al. (eds.), Resistive Switching: Oxide Materials, Mechanisms, Devices and Operations, Electronic Materials: Science & Technology, https://doi.org/10.1007/978-3-030-42424-4_7

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1 Introduction In the era of information explosion, the sharing, storage, and analysis of information is happening all the time at every corner of the world. The increasing popularity of virtual reality (VR), artificial intelligence (AI), and Internet of Things (IoT) also pose great challenge for efficient data manipulating. The desire for high-density, fast-speed, and low-power nonvolatile memory has never been greater. Conventional magnetic hard disk drives (HDDs) are being relegated to backup duty in data centers as their inherent high latency, high power consumption, considerable bulk, and fragility mean that they are less able to play in the new mobile markets [1]. NAND Flash bests HDDs in terms of latency and portability [2]. The scaling anxiety of planar NAND has been greatly relieved because of recent breakthroughs in 3D integration [3]. However, the programming speed and endurance of NAND Flash still cannot meet the requirements of many applications. In addition, the lack of ionizing radiation immunity of floating gate technology hinders its usage in the realm of medical equipment and space-based systems where radiation tolerance is required [4]. The reliability of NAND flash becomes even worse with continuous shrinking of device size since less than hundred electrons are stored in the floating gate for 1× nm technology node, and single electron loss will introduce great variations in gate threshold voltage. Resistive switching random access memory (RRAM or ReRAM) is a type of emerging nonvolatile memory (NVM) technology. The resistive switching phenomenon was first reported as early as the late 1960s [5] in binary oxide-based devices [6, 7]. It was reported that the device resistance was tunable after a relatively high-field dielectric soft breakdown. The device performance at that time was not good enough for memory applications. However, due to the advances in modern micro/nanofabrication and thin-film deposition technology, the device performance was greatly improved, and it gained significant attention from both academy and industry [8–10]. RRAM device has a simple metal–insulator–metal (MIM) structure in which an insulating thin film is sandwiched between two metal electrodes. The resistance of the sandwiched insulating layer can be changed between high- and low-resistance states by externally applied voltage, thereby the bit information, that is, “0” and “1,” is represented. Many models have been proposed to explain the resistance switching behavior, among which the “filament” model is the most popular [11]. In the “filament” model, the change in resistance is associated with the formation and dissolution of conductive filament in an otherwise insulating material. Due to its numerous merits [12], such as fast programming speed (in nanoseconds), excellent endurance (up to 1012 cycles), and lower power consumption (~1 pJ/bit), RRAM is recognized to be one of the most promising alternatives to Flash. Based on the “filament” model, three distinct switching mechanisms have been identified for the RRAM devices, that is, a unipolar switching RRAM, a bipolar switching RRAM with conducting oxide filament, and a bipolar switching RRAM with metallic filament [10]. NiO-based devices are usually unipolar switchable [13] – unipolar means that the device can be programmed and erased by voltage

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with the same polarity. It is believed that Joule heating plays an important role in switching process [14], and the large switching current of NiO RRAM is not desirable for low-power memory applications. Many transition metal oxides have been tried for resistive switching including both binary oxides, such as HfOx [15–17], TaOx [18, 19], and TiOx [20, 21], and complex oxides, such as SrTiO3 [22–24], in which a bipolar switching characteristic is often observed. Different from unipolar RRAM, the programming and erasing of bipolar RRAM is achieved by applying voltage with opposite polarity. The conductive filament in bipolar RRAM is composed of a highly reduced oxide phase in which the metal valance state deviates from its stoichiometric value. Such oxygen-deficient phases can be generated and recovered through a field-induced drift of oxygen anions [25]. The need for oxygen transport (or change of metal valance state) in switching process has led to this technology known as OxRAM (or VCM, valance change memory) [26]. The third RRAM type has a similar switching mechanism to the second one in terms of its voltage requirement. It also requires voltage with opposite polarity for programming and erasing. However, instead of oxide filament, it has metallic filament, which relies on electrochemical redox reactions and the transport of metal ions (typically Ag or Cu ions) [27]. This type of RRAM is called conductive-bridging RAM (CBRAM), programmable metallization cell (PMC), or electrochemical metallization (ECM) memory. As has been discussed, CBRAM and OxRAM have many similarities. For example, both of them are bipolar-type memory and rely on ion transport to form the conductive filament(s). However, a key difference between them is that in OxRAM both electrodes are inert, while one electrode in CBRAM has to be electrochemically oxidizable in order to supply metal ions for filament formation. The active electrode is usually made of Ag or Cu, while the inert electrode can be W, TiN, Pt, etc. The thin solid electrolyte layer in between can be chalcogenide glass, oxides, amorphous Si, or multilayered film. Examples of solid electrolyte used in CBRAM are presented in Table 1. The underlying electrochemical interactions in CBRAM are generally reviewed in Sect. 2, and a discussion of electrochemical process for CBRAM composed of different materials system is also provided in [77]. Chalcogenide-based CBRAM has been commercialized in the form of discrete nonvolatile memory components, indicating that the operating characteristics of the technology are sufficiently robust for demanding markets [46, 78].

Table 1 Examples of material systems used in CBRAM devices Chalcogenide glasses (ChG) Gex Sey [28–36] Gex Sy [32, 46–53] Ge-Te [60] Ge-Sb-Te [65] As2 S3 [72] Znx Cd1-x S [75]

Dielectrics SiO2 [37–44] Ta2 O2 [54–58] WO3 [61–63] Al2 O3 [66–70] a-Si [73, 74] GdOx [76]

Layered Cux S/SiO2 [45] Ge0.2 Se0.8 /Ta2 O5 [59] CuS/CuO [64] Gex Se1-x /SiO2 [71]

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Whereas chalcogenide-based CBRAM devices have proven to be viable replacements for certain types of nonvolatile memory devices, there is still some unwillingness, particularly with major integrated circuit foundries, to incorporate these materials into back-end-of-line (BEOL) processing. Ironically, a potential solution to the reticence surrounding “new materials” lies with Cu diffusion in deposited silicon dioxide films, as both materials are commonplace in advanced ICs. Cu migration in dielectrics has been a persistent problem for semiconductor manufacturers who wished to adopt Cu interconnect [79], but Cu-SiO2 -based CBRAM exploits this “problem” to enable controlled transport of Cu and metallic bridge switching in the SiO2 . This approach has drawn increasing attention in recent years since the devices exhibit similar switching characteristics to those based on chalcogenide glasses while possessing inherently greater CMOS compatibility. In this chapter, we present a review of the developments in SiO2 -based CBRAM using either Cu or Ag as active electrode.

2 Physicochemical Principles and Materials 2.1 Filament Growth in SiO2 CBRAM The filament growth in chalcogenide-based CBRAM has been well described in many works [9, 80]. It is generally accepted that a metallic filament grows from inert electrode toward active electrode, resulting in a conical shape with a thicker body near inert electrode and a thinner body near active electrode. However, due to the low ion mobility in many oxides, the direction of filament growth in SiO2 based CBRAM may be different. Some of the recent works suggest that the filament in thin-film oxide grows from active electrode toward inert electrode; therefore, a reversed conical filament is formed [81–83]. Based on these works, a filament growth model for Cu-SiO2 CBRAM has been proposed and is depicted in Fig. 1. First, one should notice that the line with solid circle marker in Fig. 1 is a typical switching curve of Cu-SiO2 CBRAM. The x-axis is the applied voltage, which is referenced from the Cu top electrode to the inert metal bottom electrode. The y-axis is the corresponding current through the two-terminal device. In the initial high-resistance state (i), it has only small amount of Cu ions close to the Cu electrode, which could be due to incidental incorporation of Cu during device fabrication. Under positive bias, the Cu electrode will lose electrons through an oxidization process and generates Cu ions (Cu → Cu2+ + 2e− ). Cu ions in SiO2 will drift toward the inert electrode along the electric field. Different from ions in chalcogenide materials, the Cu ion moves much slower in SiO2 , and thus, the reduction of Cu ion occurs before it reaches inert electrode by capturing electrons tunneling through thin SiO2 film (Cu2+ + 2e− → Cu). As long as there are enough electrons tunneling through and reducing Cu ions, a filament will start growing from the active electrode toward inert electrode (ii) until a bridge between the terminals is

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Fig. 1 Schematic of filament growth and dissolution in Cu-SiO2 CBRAM. (© 2015 IEEE. Reprinted with permission from Ref. [84])

formed (iii). At this point, the device is switched to a low-resistance state (LRS) and the current increases dramatically until limited by current compliance. This HRS to LRS transition is also known as the set process, which is marked by the arrow on right side of the figure. Since the ion concentration close to Cu electrode is higher than the reset of SiO2 film, the formed filament has a thicker body at Cu electrode and a thinner body at inert electrode, resulting in a reversed conical shape. Reset is essentially an opposite process of the set process. The conductive filament will be oxidized and dissolved into the SiO2 matrix if a negative voltage is applied, and then it switches back to HRS (iv). The reset process is initiated at the inert electrode/oxide interface, which is the weakest part of the filament. The LRS to HRS transition is marked by the blue arrow on left side of the figure. It should be noted that the above model illustrates only one out of many possible mechanisms for filament growth in thin-film oxides, but it is good enough to explain the common approach of resistive switching and the primary redox reactions in SiO2 -based CBRAM. Indeed, due to the variations in thin-film properties, fabrication conditions, and characterization environment, inconsistent filament morphology and growth direction have been reported across different works. Some in situ microscopy of oxide-based CBRAM also show a reversed filament growth, that is, from inert electrode toward active electrode [85, 86]. In addition, recent electrochemistry studies point out that water moisture in SiO2 may affect the growth dynamics in significant way [87]. A detailed discussion on this will be provided in a later section.

2.2 Cation Conduction in SiO2 Thin Films Classical solid electrolytes such as silver iodide (AgI) show essentially no electronic conduction. In contrast, higher chalcogenides can be doped to become mixed ionic– electronic conductors (e.g., Ag-GeS [88] or Ag-GeSe [89]). Oxides such as SiO2 , Ta2 O5 , or Al2 O3 are not considered as classical electrolytes, but at the nanoscale,

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they can conduct cations. This is exploited in oxide-based CBRAMs. The diffusion coefficient of singly ionized cations in bulk SiO2 has been measured by capacitancevoltage measurements and Rutherford backscattering spectroscopy [90]. When extrapolated to room temperature, the diffusion coefficient of Cu+ and Ag+ would be DCu ≈ 10−21 cm2 /s and DAg ≈ 10−23 cm2 /s, respectively. With the ion drift velocity for high-field ionic drift given as vD =



Dze E , E0 exp kB T E0

(1)

a typical switching voltage of VSET = 0.5 V and a SiO2 film thickness of 20 nm (i.e., an electric field of E = 250 kV/cm), one would calculate a switching time of more than a year. Here, kB is the Boltzmann constant and E0 = 1 MV/cm [91]. Even if the effective length of cation migration is reduced to 1 nm, the calculated switching time is still orders of magnitude higher than observed in experiments. It is difficult to explain higher diffusion coefficients by Joule heating in SiO2 -based CBRAMs (in contrast to OxRAMs based on the Valence Change Mechanism [92]), as switching is reported even in the pA range [93]. Recently, redox reactions of Ag or Cu at the interface with SiO2 [38, 43] have been studied by cyclic voltammetry (CV), and the estimated diffusion coefficients are much higher than reported for bulk materials. Figure 2 depicts exemplary cyclic voltammograms (first cycle of a pristine cell and a subsequent cycle) of a Cu/SiO2 /Pt CBRAM device. The current peaks jp are attributed to anodic and/or cathodic redox reactions. As a three-electrode configuration is difficult to use in vertical thin-film structures, specific redox reactions cannot simply be identified by the peak positions. However, we can use the standard redox potentials (Table 2) to discuss which reactions are most likely to be observed [38, 94]. For the pristine device (no cations present), Cu is at first oxidized to Cu2+ given this reaction is thermodynamically more favorable and jp,ox(1) is attributed to this reaction. The oxidation to Cu+ takes place at higher absolute voltages. When the voltage direction is changed, Cu+ is reduced to Cu (jp,red(2) ) and afterward Cu2+ to Cu (jp,red(1) ). There might be also a reduction of Cu2+ to Cu+ at even lower voltages. Some Cu+ ions may not be reduced during the first cycle, and an oxidation to Cu2+ takes place at the beginning of the second cycle (jp,ox(2) , which is not observed in the first cycle). Apparently, both cation species can be found in SiO2 . X-ray absorption spectroscopy reveals that Cu2+ is the more mobile ion species than Cu+ , and thus, Cu2+ is believed to dominate the switching effect [95]. From the CV curves, the ion concentration and diffusion coefficient can be estimated [96]. In contrast to AgI, the ion concentration in SiO2 depends on the device operation. When the voltage sweep rate ν is high, only a short time to generate ions is available, and thus, the ion concentration cion is lower compared to low sweep rates (cion accounts for all ion species, including cations and counter charges, see below). Due to ion–ion interactions similar to what is observed in concentrated solution conditions, the effective diffusion coefficient of the ions depends on cion [38]. Figure 3 depicts the ionic diffusion coefficients of Ag- and Cu-based SiO2 and

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Fig. 2 Cyclic voltammetry of a Cu/SiO2 /Pt CBRAM device. (Reproduced from Ref. [38] with permission by the Royal Society of Chemistry)

Table 2 Standard redox potentials of some selected redox reactions [94]

Reaction Me+ /Me (Eϕ,1 ) Me2+ /Me (Eϕ,2 ) Me2+ /Me+ (Eϕ,3 ) 2H+ + 2e− → H2 O2 + 4H+ + 4e− → 2H2 O

Me = Cu 0.52 V 0.34 V 0.16 V 0 (exactly) 1.23 V

Me = Ag 0.8 V – 1.98 V

Fig. 3 Ionic diffusion coefficient of Ag- and Cu-based SiO2 (data from Refs. [38, 97]) and Ta2 O5 (data from Ref. [98]) CBRAMs

Ta2 O5 cells, respectively. Note that the diffusion coefficient shown here is that of the limiting ionic species. As there is a difference between Ag- and Cu-based cells (assuming similar redox reactions at the counter electrode), Dion is most likely the diffusion coefficient of Ag or Cu ions, respectively.

2.3 Electrochemical Reactions and the Role of Counter Charge Early simplified switching models [99] only accounted for the anodic oxidation at the active electrode, and the role of the counter electrode was almost ignored. When no cations at the filament tip or at the counter electrode are available, a counter reaction is required to compensate the reaction at the opposite electrode.

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Electroneutrality is given by either a redox reaction at the counter electrode or counter charges including hydroxide ions OH or electrons. Surprisingly, the compensation of the anodic oxidation just by electrons (leakage current) has been found to be less likely by various switching studies in variable atmospheres [87]. The electrode reaction may, therefore, be represented by 2H2 O + 2e– → 2OH– + H2

(2)

In Eq. 2, the OH is the counter charges. As previously mentioned, the overall ion concentration cion consists of all involved ions and the contribution of cationscMe+ , and OH cOH− cannot be clearly separated by measurement (assuming no electronic conductivity): cion = cMe+ + cOH−

(3)

However, for Ag-based devices and for Cu-based devices, cMe+ ≈ [Ag+ ] ≈ cOH− and 2 cMe+ ≈ 2 [Cu2+ ] ≈ cOH− are a reasonable approximation, respectively. Knorr et al. first reported the impact of water on switching in organic thin-film junctions [101], followed by experiments for Ta2 O5 - and SiO2 -based devices [100, 102]. While Tsuruoka et al. reported on the strong impact of the ambient humidity on the SET voltage VSET of Cu/SiO2 /Pt devices, no effect is observed for Ta2 O5 based devices (Fig. 4a). FT-IR studies revealed that for Ta2 O5 , incorporated water is not removed in vacuum [100]. However, in a recent study, Mannequin et al. showed that the sensitivity to the water partial pressure pH2 O depends on the deposition conditions [103]. The influence of the ambient atmosphere on SiO2 devices is not due to a watertriggered increase of the ion mobility. Figure 4b depicts CV curves for a Cu/SiO2 /Pt CBRAM for variable pH2 O [87]. The electrochemical response is increased by the increase of pH2 O, and so is the ion concentration while the diffusion coefficient remained nearly constant. More importantly, the electromotive force (emf) depends strongly on pH2 O (Fig. 5a) [87]. In a high input-impedance emf measurement, the impact of the ion mobility is completely suppressed. The cell voltage VCell is directly linked to the emf voltage by the ratio of the ionic and electronic transfer numbers [105]. By tuning pH2 O, VCell can be reproducibly increased and decreased (inset Fig. 5a). The more hydroxide ions can be formed, the more cations are injected into the oxide. Thus, cion depends on the catalytic activity of counter electrode material. Electrodes like Pt, Ir, or Ni show a high ion concentration compared to electrode materials like Zr or Ti as expected from their hydrogen evolution potential [104].

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Fig. 4 Impact of (a) the ambient pressure on the resistive switching characteristics of SiO2 - and Ta2 O5 -based systems (Reproduced from Ref. [100] with permission by John Wiley and Sons), and (b) the impact of the water partial pressure pH2 O on CV curves of Cu/SiO2 /Pt CBRAMs. (Reproduced from Ref. [87] with permission by the American Chemical Society)

3 Device Characterization 3.1 Recent Advances and Challenges in In Situ Electron Microscopy The filamentary model was proposed based on the electrical characteristics of the device, including the dramatic change in current and the observation that the onstate resistance does not scale with electrode size [34]. However, direct evidence of filament existence is required to support such hypothesis. Electron microscopy (EM) is a versatile technology to monitor the filament in CBRAMs and to characterize the switching in situ (or in operando). There are three EM techniques to be distinguished: • Scanning electron microscopy (SEM) • Transmission electron microscopy (TEM) • Scanning transmission electron microscopy (STEM) The first ex situ images of conductive filaments in CBRAM-type switches were reported by Guo et al. in 2007 in a Ag/H2 O/Pt system [106], in which the conductive filament after switching was analyzed by SEM. Since then, this simple but efficient

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Fig. 5 Role of OH− on redox reactions in SiO2 -based CBRAMs. (a) Impact of pH2 O on the cell voltage VCell and, thus, on the emf voltage. The cell voltage can be reproducibly increased and decreased (shown in inset). Reproduced from Ref. [87] with permission of the American Chemical Society. (b) Impact of the ion concentration on the counter electrode materials’ hydrogen evolution potential. (Reproduced from Ref. [104] with permission by the Royal Society of Chemistry)

technique has been widely adopted to image filaments grown in many CBRAMs, including SiO2 -based CBRAM [82, 107]. Figure 6 shows a SEM image of filament growth in Ag/SiO2 /Pt planar CBRAM. As shown in Fig. 6d, a Ag filament appears after 30-V voltage applied on Ag electrode for 210 s. The filament has a conical shape with a thicker part close to Ag electrode. Rather than a continuous metallic filament usually observed in chalcogenide-based CBRAM [108], the filament in SiO2 , shown in Fig. 6, is composed of many discrete Ag particles distributed on the surface or penetrated into SiO2 layer. This granulated filament can be a result of low ionic mobility and redox reaction rate in SiO2 material. An early TEM imaging of physical filament was reported by Zhi et al., in which real-time filament growth in a Ag/Ag2 S/W CBRAM was characterized in situ [109]. Later, ex situ TEM studies on the growth of filaments in Ag/SiO2 /Pt were reported by Yang et al. [82]. In contrast to the devices studied by Zhi et al., the authors fabricated planar structures with a lateral gap in between the Ag and Pt electrode (gap length ≈200 nm). A pristine device and the device after switching and after erase are shown in Fig. 7a–c, respectively. Figure 7d, e depicts the I/V curves for switching and erase. Interestingly, more than one filament is formed (indicated by arrows) in the gap. Moreover, the filament grows from the Pt electrode toward the Ag electrode, which is consistent with the classical electrochemical theory [10]. In another device, where the authors studied the formation of the metal bridge by ex situ SEM, the filament appears to grow from the Ag electrode toward the inert electrode. More recently, Yang et al. published a study on resistive switching analyzed by in situ TEM [110]. In this study, the authors deposited a thin layer (~10 nm) of SiO2 on

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Fig. 6 Dynamic filament growth in planar Ag/SiO2 /Pt CBRAM. (a) As-fabricated device, (b– d) stressed for 10 s, 150 s, 210 s at 30 V with compliance current of 10 μA. (Reprinted with permission from John Wiley and Sons: Advanced Functional Materials, Ref. [107])

Fig. 7 Ex situ resistive switching of a Ag/SiO2 /Pt lateral device on suspended Si3 N4 TEM windows. The scale bar for a–c is 200 nm. (a) Pristine state of the device after fabrication. The device structure is shown in the inset. (b) Device after resistive switching and (c) after erase. (d, e) The I/V curves for switching and reset, respectively. (Reprinted with permission from Macmillan Publishers Ltd.: Nature Communication, Ref. [82], copyright 2012)

a sharp and movable W-tip to contact the oxide with a Ag wire forming a W/SiO2 /Ag layer structure. The in situ observations indicate a growth of the Ag filament (within the oxide) toward the W electrode and part dissolution of the filament upon reset. However, the current response during the switching looks significantly different from what is typically observed in crossbar devices in ambient conditions. Again, this could be attribute to the absence of OH− ions acting as counter charges. In the

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Fig. 8 Model to explain the effective growth direction of the filament and the filament shape depending on the redox rate Γ i and ion mobility μ of a particular ion i (i.e., Ag+ or OH− ). (a) For a high mobility and high redox rate, a thick filament grows from the inert electrode toward the active electrode. (b) In case both mobility and redox rate are small, the nanoparticle intrusion is only a few nanometer while the ions are sufficiently fast reduced by electrons. (c) For low mobility and a high redox rate, larger clusters are formed within the oxide and appear to migrate while the driving force is applied. (d) For a high mobility but low redox rate, a thin filament dendrite is formed, growing again from the inert electrode toward the active electrode. (Reprinted with permission from Macmillan Publishers Ltd.: Nature Communication, Ref. [110], copyright 2014)

same study, the authors fabricated Au/SiO2 /Au devices by FIB cut with Ag, Cu, Pt, and Ni particle inclusions in the oxide matrix. By applying a voltage between the Au electrodes, the particles migrate within the oxide. The authors concluded that their observations can be best explained by dynamic nanoparticles within the oxide which are formed and migrate depending on a complex interplay between the redox rate (i.e., how fast ions are generated) and the ion mobility (see Fig. 8). This interplay could explain not only the different growth directions observed for CBRAMs but also the different sizes and shapes of filaments observed by in situ and ex situ TEM. Furthermore, the redox rate and ion mobility may be different on the local scale and subject to the ambient conditions as well. It stands to reason that the electron perturbation into the switching material during in situ TEM could affect the formation, reduction, and migration of cations (and could even act as counter charges). With a typical TEM electron-beam current well below I = 1 μA (ne = I/e ≈ 6 × 1012 electrons per second), an acceleration energy of E = 200 keV = m0 v2 /2, and the electron mass m0 = 9.12 × 10−31 kg, the electron velocity is v ≈ 2 × 108 ms−1 . Each electron is then separated on average by v/ne ≈ 30 μm, and thus, with a sample thickness usually below 100 nm statistically, less than one electron is found in the specimen at a given moment. Hence, unintentional interactions of the electron beam with cations might seem to

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be a minor problem. However, especially at low switching currents below 100 nA, electron-beam-induced artifacts might be inevitable. A more serious concern is the device geometry. For purely lateral devices where the electrodes are patterned by electron-beam lithography, for example, the switching gap distance (e.g., 200 nm [82]) is significantly larger than for vertical devices (usually below 20 nm). Furthermore, devices prepared by FIB cut can suffer from ion-beam-induced damage [111]. In most cases, the geometry and surface-tovolume ratio is different from that of vertical devices, and filaments could be formed (in part at least) at the surface of the oxide matrix rather than inside. For lateral devices, the electrodes might be also affected by unintentional surface oxidation during device fabrication, which results in a chemically different electrolyte/active electrode interface. Moreover, switching in high vacuum is reported to be different from switching in ambient conditions for many CBRAM and even VCM systems [100, 112, 113], in particular SiO2 -based devices [87]. Thus, environmental electron microscopy should be considered for further research in more realistic conditions.

3.2 In Situ Spectroscopy Besides monitoring the filament growth by electron microscopy, in situ spectroscopy would also be highly desirable. However, most spectroscopic techniques like Xray photoelectron spectroscopy [87] (XPS) or X-ray absorption spectroscopy [95] (XAS) require large device areas (in the order of ≈50 μm × 50 μm, for example) and are generally not sensitive enough to study the formation of a filament with an area of π(5 nm)2 ≈ 100 nm2 . In the case of XPS, ultrahigh-vacuum conditions are required and the X-rays can interact with the switching material and cations as well. Recently, Di Martino et al. reported on a new spectroscopic technique, namely nanoscale plasmon-enhanced spectroscopy (NPES), which allows study of the switching process in ambient conditions by the interaction of incident light with the filament and electrodes, which form a plasmonic system [114]. These interactions affect the spectra of the backscattered light and are advantageously very sensitive to atomic reconfigurations in the switching gap. Another advantage of this technique is that nanoscale vertical crossbar structures, similar to those in practical memory arrays, can be analyzed with a simple measurement setup. The authors could in situ probe the resistive switching of a Ag/SiO2 /Au device, and the results indicate that filament particles remain in the gap during reset and the filament can grow at different positions from cycle to cycle. However, the drawback of the technique is that the interpretation of the backscattered spectra is challenging, as it is not a direct imaging of the filament within the insulator. The choice of the electrodes is also limited to materials (like Au and Ag), which allow sufficient interactions with the incident light.

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3.3 Impedance Spectroscopy Impedance spectroscopy (IS) is a simple but powerful electrical method that has been extensively used to investigate electrochemical systems, such as batteries, electroplating, and corrosion [115]. In impedance spectroscopy, the characteristics of interfaces and electrolytes can be equivalent to electrical circuits of capacitor, resistor, and inductor combination [116]. In recent years, this nondestructive method has been widely employed to explore the materials and electrical properties of resistive switching devices and numerous meaningful results have been obtained, including a percolation network identified in a Ag/a-Si CBRAM [117], a layered electrolyte with high- and low-doped region found in a Ag/Gex Sey CBRAM [118], and a filament model observed for a TiO2 -based OxRAM [119]. The impedance response of Cu-SiO2 CBRAM was also reported in [42]. Figure 9a shows the IS results of as-fabricated Cu-SiO2 CBRAM devices with different sizes [42]. The as-fabricated devices were not being electrically switched; thus, it is basically a well-preserved MIM capacitor with no physical damages in the dielectric layer. The IS results are presented in a Cole–Cole plot format, in which the abscissa is the real part and the ordinate is the imaginary part of the measured impedance. As shown in Fig. 9a, the experimental results (symbols) are well fitted to a parallel RC network (red lines). The extracted resistance and capacitance values for devices with different sizes are shown in Fig. 9b. The extracted resistance and capacitance values agree well with the classical resistance (Rideal ) and capacitance (Cideal ) theory, respectively, that is, resistance changes inversely with area and capacitance is proportional to area. The extracted dielectric constant is ~5, which is slightly greater than pure bulk SiO2 (3.9). This could be attributed to the incorporation of Cu atoms into SiO2 during device fabrication [120]. In addition to as-fabricated devices, programmed devices were also IS characterized. Figure 10 gives the IS results obtained on a 500 × 500 μm2 device that has been programmed into a range

Fig. 9 (a) Impedance spectra of virgin-state Cu/SiO2 CBRAM with different sizes: symbols are experimental data, solid lines are simulation data, and inset picture shows the equivalent RC circuit used for fitting. (b) Extracted resistance and capacitance value vs. device size. (© 2016 IEEE. Reprinted with permission from Ref. [42])

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Fig. 10 Impedance spectra of a 500 × 500 μm2 Cu/SiO2 CBRAM switched to various resistance states; inset picture shows the equivalent RC circuit used for fitting. (© 2016 IEEE. Reprinted with permission from Ref. [42])

of resistance states (from 230  to 55 k) prior to IS measurement. By inputting the programmed resistance and capacitance values of the as-fabricated device into the above parallel RC circuit model, the fitting results can be obtained. As can be seen in Fig. 10, the fitting curves (red lines), which show excellent agreement with the experimental data (symbols), indicate that the device capacitance is independent of resistance states. This noncorrelation between resistance and capacitance indicates that the multilevel resistive switching occurs only in localized conducting region, which has negligible size compared to the device. The change of resistance state is attributed to the modulation of filament dimension and/or number.

4 Device Performance 4.1 Technology Comparison Research on novel nonvolatile memory devices is mainly driven by the slow programming and high voltage of state-of-the-art Flash memories. The aim is to achieve ultrafast programming times, preferably below 20 ns. Furthermore, reduction of the power consumption is important for mobile applications and logicin-memory. NAND Flash is currently dominating the memory market and has replaced NOR Flash in many applications. The difference between NOR and NAND Flash is different circuitry between individual memory cells, making NAND Flash dense and NOR Flash relatively quick to access. To achieve a low-programming energy

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Table 3 Comparison of critical performance parameters of NAND and NOR Flash, and CBRAM and VCM cells, respectively NAND Flash [121] NOR Flash [121] CBRAM1 VCM1

Cell size (in F2 ) 4 to 62 6 to 11 4 to 6 [123] 4 to 6 [123]

Switching speed (ns) 104 to 105 104 104

5 10

5 ns

103

–

50

[67]

[66]

[63]

[62] [70]

103 350 60

[8]

[60]

[69]

102

–

>200

OFF/ON ratio Operation speed (s) Endurance (cycles) Ref. >102 50 μs 2 · 107 [53]

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conduction. Therefore, to be competitive with flash memories, there should always be additional mechanisms involved in the switch, such as redox reactions or ionic conduction, which involve a configuration change of atoms or ions. The most common RS processes related to electronic and electrostatic mechanisms include the following: charge (electrons) trapping/detrapping [60], tunneling at the interface [72] and charge trapping/detrapping in the bulk [73] in inorganic perovskites; intentionally created phases such as metal nanoparticles [74] in binary oxides; and unintentionally created charge traps, interstitials, and antisites in organic-inorganic perovskites [75]. In addition, strongly correlated materials present two additional types of switching: Mott metal-insulator transition leading directly to RS [76] and the creation of metallic charge traps resulting in electron trapping/detrapping Mott transition-assisted RS [77]. The benchmark characteristics of the perovskite-based devices with RS due to changes mainly in electronic subsystem are presented in Table 3. The oxygen vacancies (defects) migration model explained in the previous section can also be explained by the trap-controlled SCLC model [80]. While the ¨ first model is valid when there is a considerable density of V O in the material, the second one is applicable to any kind of electron traps, such as metallic ¨ nanoparticles, even if there are no V O present. As illustrated in Fig. 5 and reported for a Pt/Nb : SrTiO3 /Pt stack [72], positive bias leads to charge trapping at the Pt/Nb : SrTiO3 single crystal Schottky junction and, by tunneling effect, to the LRS. Applying negative bias results in charge detrapping and leads to the HRS by increasing the Schottky barrier height and tunneling barrier width. The charge trapping/detrapping RS mechanism is also active in hybrid organic/ inorganic perovskites, such as CH3 NH3PbX3 (X = I− , Br− or Cl− ) − MAPbX3 (with Methyl Ammonium cation group CH3 NH+ 3 in A site). Charge traps [75] are introduced during the materials processing procedure [81], and can thus be controlled for the optimization of the RS properties. Hybrid perovskites [79] have the advantage of low temperature processing in comparison to ordinary inorganic perovskites and have also shown some promising switching properties. Some transition metal oxide perovskites and perovskite-derived compounds (such as La2−x Srx CuO4 and YBa2 Cu3 O7−y , Lax Sr1−x MnO3 , SrIrO3 , and LaNiO3 ) belong to the strongly correlated materials group with incomplete d- and f electronic shells, leading to narrow energy bands. These materials exhibit unusual properties, such as high-Tc superconductivity [82], colossal magnetoresistance [83], Anderson localization [84], and Mott transition [85]. The main problem related to the investigation of these interesting materials is that their properties can no longer be described by mean-field theories; each electron in non-completely filled shells has a complex influence on its neighbors. In the ReRAM community, there have been some trials to use Mott insulator to metal transition (IMT) as a phenomenon responsible for RS. The devices based on Mott insulators have been reported to present different type of switching: filamentary-type in perovskites (e.g., V1–x Crx O3 ) [76] and in binary oxides (NiO) [86], filamentary-type initiated by nucleation at the binary oxide (CeO2 )/perovskite (La0.67 Ca0.33 MnO3 ) interface

Ag/Pr0.7 Ca0.3 MnO3 /Pt

Pt/LaAlO3 /SrTiO3 /Al

Au/MAPbI3−x Clx /F : SnO2 (FTO)/glass

Pr0.7 Ca0.3 MnO3

LaAlO3 /SrTiO3

MAPbI3−x Clx

LaNiO3 : CaZrO3 Pt/LaNiO3 : CaZrO3 /SrRuO3

SrRuO3 : LaAlO3 Pt/SrRuO3 : LaAlO3 /SrRuO3

Complete structure Pt/Nb : SrTiO3 /Pt

Storage medium Nb : SrTiO3

PLD

Wet chemistry, spin coating PLD

RF-magnetron sputtering PLD

Deposition technique Single crystal Switching model Bipolar, trap-assisted barrier modulation Bipolar, charge trap/detrap Bipolar, charge trap/detrap Bipolar, charge trap/detrap; Electron trap/detrap; Mott transition assisted Electron trap/detrap; Mott transition assisted

Table 3 Examples of perovskite-based devices with RS due to changes in electronic subsystem

–

–

102

102

–

–

>100

>2000

100 μs (SET), 1 ns (RESET) –

103 4

–

200 ns

Endurance (cycles) –

100

OFF/ON ratio Operation speed 105 –

[77]

[77]

[79]

[78]

[73]

Ref. [72]

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Fig. 5 The trap/detrap and tunneling of electrons. Left: when a positive voltage is applied to the electrode, this results in narrowing of the barrier width and induces HRS-to-LRS switching. Applying a negative voltage to the electrode results in the recovery of the original barrier width due to charge trapping and induces an LRS-to-HRS switching

[87] and interface-type (Pr0.7 Ca0.3 MnO3 ) [88]. In the Mott transition model, an oxide that is nominally metallic becomes insulating through interactions between electrons. As shown in Fig. 6, the electron bandwidth (kinetic energy W) becomes smaller than the onsite Coulomb repulsion (U) forming the Hubbard bands [90] with an energy gap. When electrons are totally independent, the density of states (DOS) forms a half-filled ellipse with the Fermi level EF in the middle (Fig. 6a), characteristic of a metal. In the weak correlated regime (small U), electrons are described as quasiparticles, and the Fermi liquid model accounts for the narrowing of the peak (Fig. 6b). In strongly correlated metals, the spectrum exhibits a characteristic 3-peak structure: the two Hubbard bands, which originate from local “atomic” excitations and broaden by the hopping of electrons away from the atom, and the quasiparticle peak near EF (Fig. 6c). The Mott IMT occurs when the electron interactions are sufficiently strong to cause the quasiparticle peak to vanish as the spectral weight of the low-frequency peak is transferred to the high-frequency Hubbard bands (Fig. 6d) [89]. One of the first explanations on how Mott transition can lead to non-volatile RS was given by Rozenberg et al. [91], who proposed a theoretical model for RS in strongly correlated transition metal oxide heterostructures. Experimentally metastable RS was shown for Ca2 RuO4 (layered perovskite) [92]. This Mott insulator at ambient conditions becomes conductive due to an electric-field-induced bulk Mott transition. Unfortunately, the IMT follows a structural transition, and the crystal shatters when the voltage is decreased. However, the metallic state could be sustained for a long time when a small electrical current was applied. Another attempt was carried out by Chen et al. [77], who used the Mott transition to create nanometallic traps and switch between metallic and insulating states in these traps. The mechanism in this case could be referred to as electron trapping/detrapping

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Fig. 6 DOS of electrons in a material varies as a function of the local Coulomb interaction between them. (a) Independent electrons, (b) weak correlation, and (c) strong correlation regimes. (d) The Mott metal-insulator transition. (Copyright 2004 by AIP Publishing, Ref. [89])

Mott transition-assisted RS. Band insulating perovskites (LaAlO3 and CaZrO3 ) were doped with electronic conducting perovskites (LaNiO3 and SRO) below the percolation threshold, creating thereby homogeneously distributed electronic charge traps. Depending on the work function of the electrodes, a Schottky-like barrier modulation due to an electron trapping/detrapping process was observed. As a result of the applied electric field, electron traps were created in nanometallic particles by the Mott IMT transition. This phenomenon is appealing for RS applications because it allows ultimate scaling due to the high density of charge carriers, even at the nm scale where semiconductor FETs relying on doping fail due to a lack of charge carriers.

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Ferroelectric Polarization Controlled Mechanisms

In non-centrosymmetric materials (usually crystals with perovskite structure) the lack of an inversion center below the phase transition temperature allows for the appearance of spontaneous polarization. In ferroelectric materials, spontaneous polarization can be switched by an electrical field between at least two equivalent orientations in a continuous but nonlinear way (ferroelectric hysteresis [35]). The magnitude of the external electric field required to reverse the macroscopic polarization is called ferroelectric coercive field (Ec ). The inherent bistability has drawn the attention of both academic and industrial communities, and is already applied in non-volatile ferroelectric random access memories (FeRAM) [93]. FeRAM memories are based on the electrical destructive readout of the memory state by application of a specific large voltage (higher than the coercive field of the ferroelectric) and by measuring the output current (a “spike” in current occurs when the ferroelectric polarization switches, which is otherwise absent). The magnitude of the current depends on the total polarization charge on a ferroelectric capacitor, which shrinks with every new semiconductor technology node, thus hindering unlimited miniaturization due to the limited sensitivity of the sense amplifiers [14]. Another approach is to use ferroelectrics in a field effect transistor (FET) stack instead of, or in addition to, the gate insulator. Ferroelectric FETs are based on the shift of the voltage threshold (Vt , the voltage needed to fully open the transistor, ON voltage) by the coercive field of the ferroelectric Ec [94]. In this case, the property used is not the polarization itself, but the coercive field which defines the useful memory window [94]. Scaling issues below the 180 nm semiconductors node are essentially related to low Ec (e.g., 100 kV/cm for PbZrx Ti1–x O3 ) and not to an insufficient thickness reduction of the ferroelectric materials [95]. Ferroelectricity can be employed in ReRAMs in two ways: as ferroelectric diodes [68], for which a polarization switching induces a modulation of the Schottky-like barrier; and as ferroelectric tunnel junctions [96], for which the tunnel junction barrier is modified. In the work reported by Blom et al. [68], a clear signature of a Schottky diode formation together with the ferroelectric modulation was reported. A Schottky junction was created between the PbTiO3 , a p-type wide bandgap semiconductor, and the active top Au electrode, due to the Pb vacancies created during deposition. The counter (bottom) electrode was heavily hole-doped La0.5 Sr0.5 CoO3 and, independently of the ferroelectric polarization direction, showed ohmic behavior. A 2-orders change in current was observed depending on the polarization direction, thus creating an early proof of RS based on a ferroelectric diode. In another work by Jiang et al. [97], the RS measured in BiFeO3 thin films was attributed to the Schottky barrier height modulation by the film polarization charges near the interface with the top electrode. Another heterostructure showing RS with ferroelectric materials as active elements is the ferroelectric tunnel junction (FTJ). When the thickness of the ferroelectric film reaches a few nanometers, tunneling starts to be the main conduction mechanism (in defect-free junctions). In FTJs, any asymmetry between the two metal/ferroelectric interfaces will give rise to an asymmetric electrostatic potential

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Fig. 7 (a) Sketch of the experiment on a 180 nm wide Pt/Co/BiFeO3 /CCMO capacitor. (b) Piezoresponse force microscopy imaging (phase images) for different resistance states. From left: Virgin state, ON state, and successive intermediate states with increasing resistances. (c) Resistance of the different states. (Copyright 2013 by ACS Publications, Ref. [98])

distribution caused by the ferroelectric polarization [98]. Switching the polarization orientation, the tunneling barrier width and height change, resulting in large changes in the tunnel current (as shown in Fig. 7). As pointed out in the introduction, ferroelectric diodes and FTJs constitute a special case of interface-type RS for which the resistance varies in a pseudo-continuous way. The ON and OFF (LRS and HRS) states constitute the limits corresponding to two orientations of the ferroelectric polarization over the complete electrode area. The progressive resistance evolution between these two extreme states is correlated to the switching of the ferroelectric polarization from up to down through the progressive nucleation in several zones with limited propagation. There is thus a direct correlation between the intermediate resistance values and the ferroelectric domain population [12] (area of the particular ferroelectric domain orientations). As defect-mediated currents can obscure the tunneling conduction, until recently the main hurdle of these devices was the manufacturing of ultrathin defect-free ferroelectric junctions. The most promising examples of ferroelectric-based memristive devices are presented in Table 4.

3.2 Studies of Conduction Mechanisms in Resistive Switching Perovskites As shown in the previous sections, devices showing interface-type RS usually present bipolar-type switching. To explain the ion reconfiguration produced by RS in perovskites, different scenarios have been considered depending on the given metal/oxide interface. These scenarios have been elaborated by analyzing the electrical transport behavior of the switching device to reveal the governing conduction mechanism for each resistance state (HRS and LRS) [100]. Particularly, their isothermal I(V) characteristics are useful to distinguish if the conduction of

Au/BiFeO3 /La0.5 Sr0.5 CoO3

Co/BiFeO3 /Ca0.96 Ce0.04 MnO3

Au/Co/BaTiO3 /La0.67 Sr0.33 MnO3

AFM tip/PbZr0.2 Ti0.8 O3 / La0.7 Sr0.3 MnO3

BiFeO3

BiFeO3

BaTiO3

PbZr0.2 Ti0.8 O3

Storage medium Complete structure BiFeO3 Pt/BiFeO3 /SrRuO3

PLD

Ferroelectric tunnel junction

Deposition technique Switching model PLD Bipolar, Schottky barrier modulation PLD Bipolar, Schottky barrier PLD Ferroelectric tunnel junction PLD Ferroelectric tunnel junction

Table 4 Examples of RS in ferroelectric diodes and tunnel junctions

~100 ms

10 ns

102 500

100 ns

104

–

900

>103

Endurance OFF/ON ratio Operation speed (s) (cycles) 103 1 μs 106

[99]

[96]

[98]

[68]

Ref. [97]

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Fig. 8 I(V) characteristics of an Ag/La0.7 Ca0.3 MnO3 /Pt device in a double-logarithmic plot, positive bias. Arrows indicate sweeping directions. The values of different slopes and VT are listed in the plots. For comparison, the TELC (dashed line), PF emission (dotted line), and FN tunneling (dashed-dotted line) are also included. (Copyright 2006 by American Physical Society, Ref. [101])

the device is related to the existence of an ohmic behavior (I~V), a SCLC (with 3 different regions), Sch or PF emissions or FN tunneling (see Table 1). For example, as shown in Fig. 8, an electric-field-trap-controlled SCLC was proposed to explain the RS behavior of Ag/La0.7 Ca0.3 MnO3−δ (LCMO) interface [101] for films grown by PLD at 873 K on Pt/Ti/SiO2 /Si substrates. The I(V) characteristics of the HRS for positive voltages are characterized by three I ∼ Vm regions, with typically m = 1 at low V(V < Von ), m = 2 for intermediate voltages (Von < V < VT ), and m = 8–10 for V > VT (values of the slopes in log-log plot specified in Fig. 8 and fitted regions indicated by straight solid lines). The authors explained the conduction by an Ag/LCMO interface-controlled hole injection in a SCLC mechanism with traps exponentially distributed in energy. The hysteresis and asymmetry in the I(V) curves are due to trapping/detrapping processes of the hole carriers. For comparison, theoretical PF, FN, and TELC (thermionic emission limited conduction) I(V) characteristic curves were included in Fig. 8, demonstrating the pertinence of the SCLC conduction mechanism. More recently, a similar approach based on the analysis of the isothermal I(V) curves was carried out for La1-x Srx CoO3-δ (LSCO) [102], a perovskite with high oxygen mobility for which the existence of RS has been demonstrated [102–104]. In particular, Fu et al. [102] investigated the RS of Ag/LSCO polycrystalline films (200 nm thick) grown by PLD on Pt/Ti/SiO2 /Si substrates. They showed that the transport was also controlled by a SCLC mechanism with traps exponentially distributed in energy (I ∼ Vm ) and with different m values depending on the SCLC regimes explored (see Fig. 9). Both the positive and the negative voltage ranges were interpreted as the signature of a SCLC mechanism with three defined regions with a noticeable slope difference (m = 1, 2 and 12 in log-log plot). However, when comparing with the previous Ag/LCMO results (Fig. 8) [101] it is clear that for the low voltage range, there are not sufficient data to properly fit the m value for the HRS (slope ~ 1); that there is an additional region with m ~ 3–4 not indicated in the figure and, finally, that the high-slope region corresponding to m = 12 is

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Fig. 9 I(V) characteristics of an Ag/LSCO/Pt/Ti/SiO2 /Si device in a double-logarithmic plot: (a) positive bias and (b) negative bias. (Copyright 2014 by AIP Publishing, Ref. [102])

not well defined. This is particularly evident when analyzing the dependence of γ = d log I/d log V. In this work [102], the expected constant value equal to m (for I ∼ Vm ) was not observed. Thus, further investigation is required to fully assess the conduction mechanism of these LSCO films. In relation with this work and for similar Ag/LSCO interfaces [104], a detailed study of the I(V) characteristics for both the LRS and HRS states at different temperatures was recently reported. In this case, a La0.7 Sr0.3 CoO3 film (100 nm thick) was grown epitaxially on a LaAlO3 single crystal (001) by conventional metal organic deposition and four Ag electrodes were hand-painted on top [104, 105]. Typical conduction mechanisms through metal-oxide interfaces can be distinguished by analyzing the dependence of their derivative [106]. γ = d log I/d log V against V1/2 (γ (V1/2 )): an ohmic, or a SCLC conduction will show no dependence (constant γ of 1 or 2, respectively), a Sch or PF conduction will show a linear dependence corresponding to a straight line (differing in the intercept: 0 for Sch and 1 for PF) [100]. As explained in [104], despite the difference in composition and nature of the films (polycrystalline and epitaxial), the works reported on Ag/La0.7 Sr0.3 CoO3−δ interfaces by Acha et al. [104] and on Ag/La0.5 Sr0.5 CoO3−δ interfaces by Fu et al. [102] present a similar γ (V1/2 ) behavior. For increasing V, γ evolves gradually from 1 to a maximum value (slightly higher than 2 for the HRS at low temperature) and then decreases smoothly by further increasing V (see Fig. 10). This complex γ vs. V1/2 curve can be reproduced by considering the circuit elements depicted in the inset of Fig. 10b, consisting of a nonlinear PF element and two ohmic resistances. This model shows close similarities to those used for metal-YBaCuO (YBa2 Cu3 O7 ) [107] and metalmanganite [108] junctions. The quasi-linear parts of the γ (V0.5 ) curve can be related to a nonlinear element associated to the PF conduction. A parallel ohmic element (R1 ) is needed to reproduce the quasi-ohmic dependence observed at low voltage, while the ohmic element in series (R2 ) should be considered to limit the nonlinear

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Fig. 10 γ as a function of V1/2 of an Ag/LSCO/LaAlO3 device at different temperatures for the programmed (a) LRS and (b) HRS. The inset is a schematic of the circuit elements used to model the I(V) characteristics. (Copyright 2016 by AIP Publishing, Ref. [102])

conduction, producing the maximum and the concomitant decrease in γ observed at higher voltage.

3.3 Memristive Devices Based on Perovskites The most important parameters to be competitive with today’s emerging and standard non-volatile memories (NAND FLASH benchmarks included as comparison) are as follows: cell size 10 years (>3 · 108 s), write time ∼10−8 s (FLASH 10−4 s), read time 103

100 ns

[78]

[77]

[118]

[117]

[97]

[98]

[62]

>103

104

[8]

102

100 ns

0.5 ms

5

103

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to the heterostructure properties, to the fact that binary oxides have been much more studied and have already reached full optimization and development, but also, in some cases, to limitations in the measurement procedures. For example, to measure ultrafast switching responses, microwave measurements (e.g., GHz frequency band with coplanar waveguides [119]) have been used to characterize binary oxides, but not yet for ternary oxides (to the best of our knowledge). Pulse mode measurements at the sub ns regime imply additional complications, because MIMs (metal-insulator-metal, plane capacitors) and CBAs (crossbar arrays for RS [120]) configurations are not suitable for electrical characterization at microwave frequencies or sub ns pulses. Proper measurements need to address the transmission line formalism and use adequate configurations, such as coplanar waveguides [111].

4 Material Aspects of Valence-Change Interface-Type Resistive Switching In this section, attention is drawn to the materials’ properties that control the RS in metal/perovskite/metal memristive devices showing interface-type switching mediated, mainly, by the valence change mechanism. Instead of an exhaustive review of all RS mechanisms and materials parameters, we focus on the most common and better understood mechanism, that is, the valence change mechanism, and on the parameters identified to have the highest impact on the RS response. These include cation doping, oxygen off-stoichiometry, the use of additional layers, and the effect of the electrode materials. A brief subsection is devoted to an extrinsic parameter: the effect of the atmosphere, in particular to the relative humidity and oxygen partial pressure. The microstructure of the material is also important. Oxygen vacancies are known to be attracted by crystalline defects, such as edge dislocations in low angle boundaries [121] or surfaces/interfaces [122]. In addition, their migration velocity (diffusion coefficient) can be different at the defects or in amorphous materials [123]. Depending on the material, the oxygen vacancy transport along dislocations and grain boundaries can be either strongly suppressed (e.g., STO [124]) or strongly enhanced (e.g., LSMO [125]). In the last case, grain boundaries can act as preferential conduction paths for vacancies, accumulating more easily at the electrode and changing the potential barrier at the electrode/oxide interfaces. ¨ There have been a few approaches to increase the density of defects (mainly V O ) in titanates, such as using amorphous Nb-doped SrTiO3 as a functional layer with ¨ increased as-grown V O density and donor-induced dislocation sites [123]. Lee et al. [126] proposed a new material engineering route (nano-scaffold) with increased the ¨ concentration of V O confined at the vertical hetero-interfaces, leading to improved switching uniformity and tunability. Thus, both crystalline and amorphous defect engineering play an important role in reaching competitive high endurance and retention of the non-volatile memory elements.

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4.1 Role of Doping As mentioned in Sect. 2, the perovskite structure offers an exceptional playground for investigating a variety of material properties such as ferroelectricity, magnetism, ionic conduction, and superconductivity. Doping is an effective way of varying the amount and type of charge carriers, as well modifying its band structure by creating new energy levels within the bandgap. The conduction behavior of the material can be drastically modified, as for example from insulating to semiconducting, by doping STO with Nb cations [127]. Heterovalent cation doping in perovskites usually leads to an increase in n- or p-type conductivity depending on the electronic structure of the dopant. In addition, some perovskites present a self-doping mechanism (variation in oxygen stoichiometry concomitant to a change in the oxidation state of the cations) and a simple annealing step under a controlled atmosphere can lead to the stabilization of the RS behavior. Both external and self-doping are closely related to the oxygen stoichiometry of the material since the under- or overstoichiometric oxygen allows the stabilization of lower or higher oxidation states of the constituent cations, respectively.

4.1.1

Role of Cation Doping

Cation doping has been widely reported to induce lattice and charge disorder in perovskites and can, in some cases, trigger or stabilize RS. In particular, doped manganites (such as Pr1−x Cax MnO3 [128–131], La1−x Cax MnO3 [130, 132, 133], and La1−x Srx MnO3 [134]) are receiving a lot of attention in the RS field. For the multiferroic BiFeO3 (BFO) perovskite, Yang et al. [67] showed a relationship between the Ca2+ A-site doping and the appearance of memristive behavior in the I(V) characteristics of a SRO/Bi0.9 Ca0.1 FeO3−δ (BCFO)/SRO device (Fig. 11a). To explain the appearance of RS, an indirect effect of the Ca2+ doping is recalled [67]: tocompensate for the hole carriers generated by acceptor ¨ O can be spontaneously generated to keep the overall doping, oxygen vacancies V

Fig. 11 (a) I(V) characteristics of an SRO/BCFO/SRO device in a semi-log plot as a function of Ca doping (x content in Bi1−x Cax FeO3−δ ). (b) Linear I(V) characteristics of an SRO/BCFO/SRO device showing a rectifying behavior both in HRS and LRS. (c) Schematic diagram describing the switching mechanism of BCFO films. (Adapted by permission from Macmillan Publishers Ltd.: Nature Materials [67], copyright (2009))

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charge neutrality and maintain a stable Fe3+ valence state. This V O generation is a common behavior in acceptor-doped oxides [135]. These positively charged point defects would then move in BCFO under the application of an external electrical ¨ field, leading to an effective V O accumulation at the negatively biased electrode, and to the subsequent appearance of n-type conductivity in this region (see Fig. 11c). ¨ The V O depleted region at the opposite electrode possesses p-type conductivity induced by acceptor doping. The rectifying p-n junction (shown in Fig. 11b) created through the asymmetric distribution of oxygen vacancies is believed to be at the origin of the RS behavior in BCFO. The whole oxygen-vacancy migration process is reversible upon application of the reverse bias. Fujii et al. [136] studied the effect of adding or removing n-type carriers (electrons) at a SRO/SrTi1-x Nbx O3 (Nb:STO) interface. The number of carriers was tuned by increasing the Nb content of the films, which acts as a donor dopant. The SRO/Nb:STO junction can be regarded as a high-work-function metal in contact with a n-type semiconductor, thus creating a Schottky barrier (this will be further developed in Sect. 4.3.1). Increasing the amount of n-type charge carriers at the junction decreases the Schottky barrier width and can increase the current in two ways: by increasing the number of generated carriers, and by the appearance of a tunneling current through the Schottky barrier. As a result, when the barrier becomes too small, the RS behavior of the junction is lost. This was confirmed by the disappearance of the hysteresis for the highest doping content when varying the Nb-doping content of the films (from 0.02 to 2 at %). For an Au/BFO/Pt stack You et al. [137] showed that the controlled implantation of Ti in the Pt bottom electrode prior to the deposition of BFO (as switching material) could help control and enhance the stability of the RS response. This is explained by the controlled diffusion of the implanted Ti into the BFO layer during its high temperature deposition (650 ◦ C). The Ti dopants act as switching centers. In this particular case, Ti is believed to trap and release oxygen vacancies in a controlled manner under application of an external electrical field. By applying a positive bias to the Au top electrode, oxygen vacancies migrate to the Pt bottom electrode and become trapped at the Ti switching centers at the BFO/Pt interface. These vacancies act as donor impurities and lower the Schottky barrier at this interface. This puts the device in LRS. Upon application of the reverse bias, Ti releases the vacancies and the device switches back to the HRS.

4.1.2

Role of Oxygen Stoichiometry

Certain perovskite oxides, such as BiFe2 + /3+ O3−δ or LaMn3 + /4+ O3+δ , are known for showing what is called a “self-doping” mechanism, where the constituent cations present several oxidation states. By changing the oxygen content, the overall charge neutrality is conserved by the corresponding decrease or increase of the cations’ valence state.

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The key role played by oxygen in RS has been reported for perovskite oxides thin films such as PCMO and LCMO. Kim et al. [129] indicated that an Au/PCMO/Pt device showed an increased OFF/ON resistance ratio after an anneal under oxygen atmosphere. They explain the appearance of memristance through the oxygen over stoichiometry (induced by annealing), which is compensated by the formation of cation vacancies, as shown in Eq. (4): δ Pr1−x Cax MnO3 + O2 → Pr1−x Cax MnO3+δ = (Pr1−x Cax )1−y y Mn1−z z O 2 (4) where  represents cation vacancies and δ the excess of oxygen. The formation of cation vacancies is then electronically equilibrated by an increase in the manganese valence state from Mn3+ to Mn4+ X-ray photoelectron spectroscopy (XPS) measurements confirmed the presence of a higher concentration of Mn4+ relative to Mn3+ for the oxygen-annealed PCMO film surface. The presence of Mn in a mixed valence state leads to a strong correlation of the electrons at the Au/PCMO interface. This interface is believed to exhibit a Mott transition as a function of the carrier concentration (controlled by the oxygen-annealing process) [129]. This transition enables the cell to switch from HRS to LRS. A similar effect induced by oxygen annealing was obtained by Dong et al. for a Mo/LCMO/Pt cell [133]. Finally, Xu et al. [138] showed that Pt/LaMnO3 (LMO)/Nb:STO presents a higher OFF/ON ratio when LMO is fabricated using lower oxygen partial pressures ¨ ¨ (i.e., larger V O concentration). The presence of V O favors the n-type conductivity by adding electrons to the conduction band. These additional carriers can change ¨ the Schottky barrier at the Pt/LMO interface by the field-mediated drift of V O . Both the role of the electrode material and of the annealing conditions of a M/Nb:STO/In stack (with M = Al, W and Cu) were investigated by Zhong et al. [139]. Prior to the I(V) measurements, different anneals were carried out in O2 , ¨ Ar, and in a Ar:H2 (5%) mixture to control the V O concentration in Nb:STO. Very different electrical characteristics were obtained depending on the annealing conditions and on the electrode material used. Globally, the resistance window decreased by annealing the stacks in O2 (except for Cu/Nb:STO/In). The highest OFF/ON ratio was obtained by annealing the stacks in Ar, except for W/Nb:STO/In, for which the anneal led to a complete loss of the RS behavior. This study shows that the optimization of the switching characteristics is not an easy task. Particularly, there is no “universal anneal” to optimize the RS response. Each new memristive device stack will potentially have a different response depending on its RS mechanism, the electrode used, as well as its cation and oxygen equilibrium stoichiometry at each oxygen partial pressure. Table 6 summarizes the different studies presented in this section of the effect of doping (cation doping and oxygen stoichiometry) on the RS characteristics of selected perovskite materials. Table 6 includes the composition, complete structure, deposition technique, the material property which has been modified, its effect on the functionality, if a forming step is required, and the evidenced conduction mechanisms for each of these studies.

Au/SRO/Nb:STO

Au/BFO/Pt

Au/PCMO/Pt

SrRuO3 /Nb : SrTiO3

BiFeO3 (BFO)

Pr0.7 Ca0.3 MnO3 (PCMO)

Composition Complete structure Bi0.9 Ca0.1 FeO3−δ (BCFO) SRO/BCFO/SRO epitaxial on (001)-STO

PLD

PLD

PLD

Deposition technique PLD

Not specified

Not specified

Mn3+ /Mn4+ ratio tuning by ¨ V O leading to correlated electrons and a possible Mott transition V O content increase in film by in situ annealing in O2

¨

Schottky emission

¨

Ti acts as V O No reservoir, improving the control over the switching by modulation of the Schottky barrier

HRS: Schottky thermionic emission LRS: tunneling through Schottky barrier

Evidenced conduction mechanisms Not specified (rectifying behavior)

Controlled Ti implantation/diffusion into BFO

Yes

Tuning of the Schottky barrier width

V O content increase in film Nb-doping content

¨

Effect on the functionality Forming required? Creation of p-n Not specified junction at SRO/BCFO interface through ¨ V O accumulation

Material property modified Cation doping (Ca2+ )

Table 6 Effect of doping (cation doping and oxygen stoichiometry) on the RS characteristics of selected perovskite-based devices

[129]

[137]

[136]

Ref. [67]

264 S. Bagdzevicius et al.

Pt/LaMnO3 /Nb : STO

M/Nb:STO/In (M = Al, W, Cu)

Nb:SrTiO3

Commercial Nb:STO

Laser molecular beam epitaxy

Mo/LCMO/Pt RF reactive on Pt/Ti/SiO2 /Si magnetron sputtering

LaMnO3

La0.7 Ca0.3 MnO33 (LCMO)

Increased OFF/ON ratio when increasing ¨ V O content in the LMO film RS window tuned by changing M and anneal conditions

V O content during deposition and by in situ annealing Annealing in different atmospheres prior to I(V) measurements (in O2 , Ar and Ar:H2 mixture)

¨

RS appears after increasing the oxygen content of the films

¨

V O content during deposition

Not specified

Not specified

Not specified

Ohmic Schottky emission PF emission SCLC

Ohmic Schottky emission PF emission SCLC

Not specified

Not specified

[139]

[138]

[133]

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4.2 Role of Additional Layers (Multilayers) A number of groups have tried to artificially engineer the metal/perovskite interface by adding layers of a different material and thus modifying the memristive behavior of the whole stack. For example, interlayers can be used to tune the electronic band structure at the interface by locally adding or removing charge carriers. The addition of a new material at the interface will also change the charge injection by acting as a series resistance, or could show a rectifying behavior due to the creation of a previously absent Schottky or p-n junction. Furthermore, in some cases the interlayer can also act as an “oxygen reservoir” to capture/release oxygen ¨ in a controlled way, facilitating the creation/annihilation of V O , which could generate/remove carriers and/or trap states at the interface. Sawa et al. [134] reported on the effect of adding a very thin insulating Sm0.7 Ca0.3 MnO3 (SCMO) layer at the Ti/La0.7 Sr0.3 MnO3 (LSMO) metallic junction with n = 0, 1, 3, 5 or 250 unit cells. SrRuO3 (SRO) was used as bottom electrode since it forms an ohmic contact with manganites [140]. The final Ti/(n)SCMO/LSMO/SRO device is shown in Fig. 12a together with the respective I(V) characteristics for n = 0, 1, and 5. The initial Ti/LSMO/SRO device (n = 0) shows symmetric and almost ohmic I(V). When increasing the number of insulating SCMO layers, the device shows an asymmetric and rectifying behavior, with RS properties. From this experiment, it was concluded that the additional SCMO layer offers trapping sites at the Ti/LSMO interface, modifying the electronic properties of the junction. A similar experiment was carried out by Fujii et al. [136] after studying the effect of adding or removing n-type carriers in Au/SRO/Nb:STO (described in the previous section). An artificial interface was created between SRO and Nb:STO films to tune the trap density and vary the tunneling current. Five unit cells (~2 nm) of either heavily donor-doped La0.25 Sr0.75 TiO3 (La:STO) or undoped STO were inserted between the SRO and the Nb:STO (see Fig. 12b). This led to an increase or decrease of the trap states density, respectively, when compared to the SRO/Nb:STO (1at %

Fig. 12 I(V) characteristics in a semi-log plot of (a) a Ti/(n)SCMO/LSMO/SRO device for different n unit cells of SCMO. (b) An Au/X/SRO/Nb:STO device where X = heavily carrierdoped La0.25 Sr0.75 TiO3 or insulating SrTiO3 . The corresponding stacks used for each I(V) curve are shown on the right for both cases. (Reprinted from [55] with permission from Elsevier). (c, d) Band diagrams for Nb:STO-based devices 1 and 3, respectively. (Adapted from Ref. [136])

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Nb) junction. SRO/La:STO/Nb:STO offers a very narrow barrier for the electrons to tunnel through (as depicted in the band diagram in Fig. 12c). This is corroborated by the quasi-ohmic I(V) characteristics (Fig. 12b), as well as the absence of RS. When undoped STO is used as interfacial layer, the absence of traps (otherwise generated by impurity-dopants) leads to a decrease in current. By introducing the STO interlayer a strong rectifying behavior is observed, due to the increase of the barrier width (Fig. 12d). In this case, the absence of trap states also prevents the formation of a hysteretic I(V) curve. To improve the RS in a La0.7 Ca0.3 MnO3 memristive cell, a thin layer of the highly reactive metal Sm (which readily oxidizes in air) was introduced between the top molybdenum electrode and the functional layer [8]. The observed switching is attributed to the electromigration of oxygen ions (O2− ), causing the formation and dissolution of an SmOx insulating layer at the interface. In a different study [70], a TiOx interlayer was used to improve the switching characteristics of a LCMObased device compared to only using an active Ti electrode (Ti/TiOx /LCMO/Pt vs Ti/LCMO/Pt). Pr0.7 Ca0.3 MnO3 [63] was also investigated for its RS properties in a M/MIEC/M cell. An intentionally deposited Al2 O3 layer on top of the PCMO helped increase the OFF/ON ratio and improved the RS (multilevel with no electroforming required). In all these cases, the RS is confined at the active metal (Sm, Ti, Al, etc.)/MIEC interface. The HRS is achieved by oxidizing the electrode and switching to the LRS is achieved by the reverse reduction reaction of the active metal oxide to a pure metal. Finally, Ortega-Hernandez et al. [141] showed that adding an additional CeO2−x layer in a Ag/CeO2−x /La0.8 Sr0.2 MnO3 /CeO2−x /Ag stack (in a top-top electrode configuration) decreased the operating voltage and considerably increased the uniformity and the resistance window. This interlayer played the role of “oxygen reservoir” facilitating the oxygen migration from and toward the active LSMO switching material and allowing to lower the switching voltages after a preliminary forming step at +5 V. Table 7 summarizes the details the perovskite memristive cells and most important characteristics of the studies on the effect of introducing additional layers to the metal-perovskite oxide-metal structure.

4.3 Role of the Electrode Electrodes constitute a very important part of the interface-type memristive cell as they determine the properties at the metal/oxide junction. For interfacial-type RS in perovskite oxides, there are at least two key parameters to take into account for the choice of the electrode material: its work function (WF), which will dictate the electron injection, and its oxygen affinity, related to how easily the material will oxidize. These two aspects will be developed in detail next.

Au/SRO/La:STO/Nb:STO PLD Au/SRO/STO/Nb:STO

Mb/Sm/LCMO/Pt

SrRuO3 /Nb : SrTiO3

La0.7 Ca0.3 MnO3

RF-sputtering

Complete MIM structure Ti/SCMO(n)/LSMO/SRO

Composition La0.7 Sr0.3 MnO3

Deposition technique PLD

Addition of a Sm interlayer between Mb and LCMO

Device architecture modifications n unit cells of SCMO between Ti and LSMO n = 0, 1,3, 5,250 Addition of La:STO or STO interlayers

Increased OFF/ON ratio and stabilization of RS

Charge injection control at SRO/Nb:STO junction

Effect on the functionality OFF/ON ratio increase by increasing n

Table 7 Effect of additional layers on the RS characteristics of selected perovskite-based devices

No

Yes

Forming required? Yes

Ref. [134]

HRS: Schottky [136] thermionic emission LRS: tunneling through Schottky barrier Not specified [8]

Evidenced conduction mechanisms Not specified

268 S. Bagdzevicius et al.

Ti/TiOx /LCMO/Pt

Al/Al2 O3 /PCMO/Pt

Ag/CeO2−x /LSMO/ CeO2−x /Ag

La0.7 Ca0.3 MnO3

Pr0.7 Ca0.3 MnO3

CeO2−x /La0.8 Sr0.2 MnO3

Chemical solution deposition and atomic layer deposition

Sputtering

PLD

Increased No OFF/ON ratio and stabilization of RS Suppression of electroforming step Addition of 3 nm Suppression of No Al2 O3 between the electroforming Al and PCMO step but higher operation voltage Addition of Lower operation Yes (+5 V) 5–10 nm voltage and CeO2−x in OFF/ON ratio between Ag and increase LSMO

Addition of 20 nm TiOx between Ti and LCMO

Not specified

Not specified

Not specified

[141]

[63]

[70]

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Fig. 13 Linear I(V) characteristics of a TE/PCMO/SRO device with TE = SRO, Pt, Au, Ag, or Ti as top electrode materials. The top-left inset shows a schematic of the device. The bottom-right inset shows the resistance of the junction for different top electrodes with subtracted contribution of the SRO bottom electrode. (Reprinted from Ref. [140], with the permission of AIP Publishing)

4.3.1

Work Function (WF)

When putting a metal in contact with a semiconductor, their Fermi levels will align creating either a Schottky barrier or an ohmic contact. The one that will be created depends on the type and amount of charge carriers in the semiconductor, as well as its electron affinity and the WF of the metal. Sawa et al. [140] reported on the RS properties of a top electrode (TE)/PCMO/SRO device with different TE materials. Metals with different WFs were used, such as Pt (~5.7 eV), Au (= 5.1 eV), Ag (= 4.3 eV), and Ti (= 4.3 eV) [142]. In addition, the SRO conductive perovskite oxide (WF = 5.3 eV) [55] was also used as top electrode. They observed that all metals (except Ti) form an ohmic contact with PCMO, and that the overall resistance of the device increases with decreasing WF (see Fig. 13), with the exception of SRO that offers the lowest resistance. This is consistent with the model of a Schottky junction created between a low work-function metal and a p-type semiconductor such as PCMO. When decreasing the WF, the hole carriers need more energy to be thermally injected in the semiconductor. The opposite is true for an n-type semiconductor: a Schottky junction will be created when in contact with a high work-function metal, and low work-functions favor ohmic contact. This was confirmed in several reports using Nb:STO as functional material [143, 144]. However, Sawa et al. [140] observed that the WF of the electrode only cannot account for the observed electrical behavior. The use of a Ti top electrode in a Ti/PCMO/SRO heterostructure was shown to introduce nonlinearity in the I(V) characteristics, as well as hysteretic behavior. The device resistance also increased when compared to Ag as top electrode. This cannot be explained by a WF difference since Ag and Ti have a very similar ones (close to 4.3 eV). They proposed a new model where an increase in density of interface states would lead to a band bending causing the junction to present rectifying properties. This increase would be the result of an accumulation of defects, such as oxygen vacancies, at the metal/oxide junction.

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Table 8 summarizes the details of the perovskite memristive cells and the most important characteristics of the different studies presented in this section related to the influence of the WF of the electrode in the RS behavior.

4.3.2

Oxygen Affinity

In the case of a metal/oxide junction, the appearance of RS is also related to the Gibbs free energy of oxidation of the electrode. By using photoemission spectroscopy (PES) X-ray absorption spectroscopy (XAS) to probe the chemical states of the key elements at the metal/oxide interface in several heterostructures, Yamamoto et al. [130] showed that RS can be linked to the formation of a nanometer-thick passivation layer. This layer can form spontaneously at the electrode/oxide interface depending on the electrode material, or more particularly on its free energy of oxidation. Pt/PCMO/Au and Ag/LCMO/Au devices show ohmic I(V) characteristics with no RS. When using Al as top electrode, both devices show a rectifying behavior and a hysteresis in the I(V) curves, which is also the case for a third La0.33 Sr0.67 FeO3 (LSFO)/Au device (see Fig. 14a–c). PES measurements of the Al 2p core level states at the Al/oxide junction have shown that for a low Al thickness (