NOVEMBER 2012 IEEE MTT-V060-I11 (2012-11) [60, 11 ed.]

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NOVEMBER 2012

VOLUME 60

NUMBER 11

IETMAB

(ISSN 0018-9480)

Editorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . G. E. Ponchak Guest Editorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F. Lin and H. Luong

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PAPERS

Theory and Numerical Methods Even- and Odd-Mode Analysis of Thick and Wide Transverse Slot in Waveguides Based on a Variational Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W. Wenzhi, Y. Sheng, L. Xianling, J. Ronghong, T. S. Bird, Y. J. Guo, and G. Junping Generalized Time-Domain Adjoint Sensitivity Analysis of Distributed MTL Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A. S. Saini, M. S. Nakhla, and R. Achar Formal Expression of Sensitivity and Energy Relationship in the Context of the Coupling Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M. Martinez-Mendoza, F. Seyfert, C. Ernst, and A. Alvarez-Melcon Passive Components and Circuits A High Slow-Wave Factor Microstrip Structure With Simple Design Formulas and Its Application to Microwave Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . W.-S. Chang and C.-Y. Chang Design of Transmission-Type th-Order Differentiators in Planar Microwave Technology . . . . . . . . . . . . . . . . . . M. Chudzik, I. Arnedo, A. Lujambio, I. Arregui, I. Gardeta, F. Teberio, J. Azaña, D. Benito, M. A. G. Laso, and T. Lopetegi A Directivity-Enhanced Directional Coupler Using Epsilon Negative Transmission Line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A. Pourzadi, A. R. Attari, and M. S. Majedi Electron Devices and Device Modeling Systematic Compact Modeling of Correlated Noise in Bipolar Transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J. Herricht, P. Sakalas, M. Ramonas, M. Schroter, C. Jungemann, A. Mukherjee, and K. E. Moebus Hybrid and Monolithic RF Integrated Circuits A Monolithic AlGaN/GaN HEMT VCO Using BST Thin-Film Varactor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C. Kong, H. Li, X. Chen, S. Jiang, J. Zhou, and C. Chen Design of Low Phase-Noise Oscillators and Wideband VCOs in InGaP HBT Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D. Kuylenstierna, S. Lai, M. Bao, and H. Zirath

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(Contents Continued on Back Cover)

(Contents Continued from Front Cover) An Improved Wideband All-Pass I/Q Network for Millimeter-Wave Phase Shifters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S. Y. Kim, D.-W. Kang, K.-J. Koh, and G. M. Rebeiz 180 and 90 Reflection-Type Phase Shifters Using Over-Coupled Lange Couplers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H. R. Fang, X. Tang, K. Mouthaan, and R. Guinvarc’h Theoretical Analysis and Practical Considerations for the Integrated Time-Stretching System Using Dispersive Delay Line (DDL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B. Xiang, A. Kopa, Z. Fu, and A. B. Apsel Gain-Bandwidth Analysis of Broadband Darlington Amplifiers in HBT-HEMT Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S.-H. Weng, H.-Y. Chang, C.-C. Chiong, and Y.-C. Wang Optimized Load Modulation Network for Doherty Power Amplifier Performance Enhancement . . . . S. Chen and Q. Xue A 7.9-mW 5.6-GHz Digitally Controlled Variable Gain Amplifier With Linearization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T. B. Kumar, K. Ma, and K. S. Yeo Reconfigurable Dual-Channel Multiband RF Receiver for GPS/Galileo/BD-2 Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D. Chen, W. Pan, P. Jiang, J. Jin, T. Mo, and J. Zhou A 1.2-V 5.2-mW 20–30-GHz Wideband Receiver Front-End in 0.18- m CMOS . . . . C.-H. Li, C.-N. Kuo, and M.-C. Kuo All-Digital RF Modulator . . .. . . . M. S. Alavi, R. B. Staszewski, L. C. N. de Vreede, A. Visweswaran, and J. R. Long Instrumentation and Measurement Techniques Experimental Characterization of Oscillator Circuits for Reduced-Order Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P. Umpiérrez, V. Araña, and F. Ramírez Surface-Charge-Layer Sheet-Resistance Measurements for Evaluating Interface RF Losses on High-Resistivity-Silicon Substrates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S. B. Evseev, L. K. Nanver, and S. Milosaviljević 16-Term Error Model in Reciprocal Systems . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . K. Silvonen, K. Dahlberg, and T. Kiuru RF Applications and Systems Modified Least Squares Extraction for Volterra-Series Digital Predistorter in the Presence of Feedback Measurement Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Y.-J. Liu, W. Chen, J. Zhou, B.-H. Zhou, F. M. Ghannouchi, and Y.-N. Liu Peak-Power Controlling Technique for Enhancing Digital Pre-Distortion of RF Power Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C. Nader, P. N. Landin, W. Van Moer, N. Björsell, P. Händel, and D. Rönnow Peak-Power Controlled Digital Predistorters for RF Power Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P. N. Landin, W. Van Moer, M. Isaksson, and P. Händel Multi-Gb/s Analog Synchronous QPSK Demodulator With Phase-Noise Suppression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A. Ç. Ulusoy and H. Schumacher A 60-GHz Active Receiving Switched-Beam Antenna Array With Integrated Butler Matrix and GaAs Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C. E. Patterson, W. T. Khan, G. E. Ponchak, G. S. May, and J. Papapolymerou In Vitro Dosimetry and Temperature Evaluations of a Typical Millimeter-Wave Aperture-Field Exposure Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J. Zhao Passive Wireless Temperature Sensor Based on Time-Coded UWB Chipless RFID Tags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D. Girbau, Á. Ramos, A. Lázaro, S. Rima, and R. Villarino

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LETTERS

Corrections to “An Ultra-Broad-Band Reflection-Type Phase-Shifter MMIC With Series and Parallel LC Circuits” . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M. M. Honari, R. Mirzavand, and A. Abdipour Authors’ Reply to “Comments on Unique Extraction of Metamaterial Parameters Based on Kramers–Kronig Relationship” . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Z. Szabó, G.-H. Park, R. Hedge, and E. P. Li

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Information for Authors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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Special Issue on Biomedical Applications of RF/Microwave Technologies . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . Special Issue on Phased-Array Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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Digital Object Identifier 10.1109/TMTT.2012.2224934

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 11, NOVEMBER 2012

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Editorial

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HIS TRANSACTIONS has been successful in reviewing approximately 100 papers per month and reducing the average submission to online posting of accepted papers time to 27 weeks. This would not be possible without the help of the reviewers and the Associate Editors. The Associate Editors obtain reviews of the papers and provide me with their guidance on the acceptance or rejection of papers. This often requires them to review the paper themselves, and considering that the Associate Editor handles approximately ten papers per month, you can imagine the heavy work load that they carry for the good of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) and the microwave engineering profession. With this editorial, I am sad to announce the retirement of two Associate Editors. Prof. Wendy Van Moer, Vrije Universiteit Brussel, Brussels, Belgium, has provided excellent service to the IEEE MTT-S for the past two years, but she must retire to spend more time with her university position. Prof. John Papapolymerou must also retire as an Associate Editor, but John is retiring because he has accepted the position of Editor-in-Chief of the IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS. I have valued his work as an Associate Editor for me for six years, and I wish him success in his new role and service that he will be providing to the IEEE MTT-S. Of course, I cannot continue without Associate Editors, and I am pleased to announce the appointment of two Associate Editors. Dr. TzyySheng Horng, National Sun Yat-Sen University, Kaohsiung, Taiwan, and Dr. Roberto Gómez-García, University of Alcalá, Alcalá de Henares, Madrid, Spain. They have already been hard at work for four months and I already am very thankful that they accepted my invitation to serve the IEEE MTT-S. Their biographies are included in this editorial so you can learn more about them. Finally, if you see Wendy, John, Tzyy-Sheng, Roberto, or any of the other Associate Editors of this TRANSACTIONS, please thank them for their service. George E. Ponchak, Editor-in-Chief NASA Glenn Research Center Cleveland, OH USA44135

Tzyy-Sheng Horng (S’88–M’92–SM’05) was born in Taichung, Taiwan, on December 7, 1963. He received the B.S.E.E. degree from National Taiwan University, Taipei, Taiwan, in 1985, and the M.S.E.E. and Ph.D. degrees from the University of California at Los Angeles (UCLA), in 1990 and 1992, respectively. Since August 1992, he has been with the Department of Electrical Engineering, National Sun Yat-Sen University, Kaohsiung, Taiwan, where he was the Director of the Telecommunication Research and Development Center (2003–2008) and Director of the Institute of Communications Engineering (2004–2007), and where he is currently a Professor and the Advanced Semiconductor Engineering Inc. (ASE Inc.) Chair Professor. He has authored or coauthored over 100 technical publications published in IEEE journals and conferences proceedings that are mostly within the IEEE MTT-S. He holds over ten patents. His research interests include RF and microwave integrated circuits (ICs) and components, RF signal integrity for wireless system-in-package, digitally assisted RF technologies, and green radios for cognitive sensors and Doppler radars. Dr. Horng has served on several Technical Program Committees of international conferences including the International Association of Science and Technology for Development (IASTED) International Conference on Wireless and Optical Communications, the IEEE Region 10 International Technical Conference, the IEEE International Workshop on Electrical Design of Advanced Packaging and Systems (EDAPS), the Asia–Pacific Microwave Conference (APMC), the IEEE Radio and Wireless Symposium (RWS), and the Electronic Components and Technology Conference (ECTC). He has also served on the Project Review Board in the Programs of Communications Engineering and Microelectronics Engineering at the National Science Council, Taiwan. He is the founder chair of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) Tainan Chapter and a member of the IEEE MTT-S Technical Committee MTT-10 and MTT-20. He was the recipient of the 1996 Young Scientist Award presented by the International Union of Radio Science, the 1998 Industry–Education Cooperation Award presented by the Ministry of Education, Taiwan, and the 2010 Distinguished Electrical Engineer Award presented by the Chinese Institute of Electrical Engineering, Kaohsiung Branch, Taiwan. Digital Object Identifier 10.1109/TMTT.2012.2216811 0018-9480/$31.00 © 2012 IEEE

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Roberto Gómez-García (S’02–M’06–SM’11) was born in Madrid, Spain, in 1977. He received the Telecommunication Engineer and Ph.D. degrees from the Polytechnic University of Madrid, Madrid, Spain, in 2001 and 2006, respectively. His doctoral dissertation concerned the analysis, design, and development of high-selective and tunable microwave bandpass filters based on signalinterference techniques. During 2004, 2008, and 2011, he was with the C2S2 Department, XLIM Research Institute (formerly IRCOM), University of Limoges, Limoges, France. During 2011–2012, he has also spent several one-week research stays with the Telecommunications Institute, University of Aveiro, Aveiro, Portugal. Since April 2006, he has been an Associate Professor with the Department of Signal Theory and Communications, University of Alcalá, Alcalá de Henares, Madrid, Spain. He is a Reviewer for several IET, EuMA, and Wiley publications. His current research interests are the pursuit of new concepts to design fixed/tunable high-frequency filters and multiplexers in planar, hybrid and monolithic microwave integrated circuit (MMIC) technologies, multifunction circuits, and novel software-defined radio and radar architectures. Dr. Gómez-García is a reviewer for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, IEEE MICROWAVE MAGAZINE. He is a member of the Technical Review Board for the European Microwave Conference, the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS), the IEEE Radio and Wireless Symposium, the IEEE International Symposium Circuits and Systems, and the IEEE Radar Conference. He is also a member of the IEEE MTT-S Filters and Passive Components and IEEE CAS-S Analog Signal Processing Technical Committees. He was the recipient of a 2007 Early Career Travel Grant to assist with the IEEE MTT-S International Microwave Symposium.

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Guest Editorial

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E ARE honored and delighted to introduce several accepted papers from the 2011 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT2011) to the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) community. RFIT is a relatively new and small focused forum for crossed disciplines in microelectronics and microwaves. It was established firstly as a workshop in Singapore in 2005 and became a symposium in 2009. The 2011 RFIT Symposium was held in Beijing, China, from November 30 to December 2, 2011, and it will move around IEEE Region 10. RFIT provides a forum for the integrated circuit and technology communities to meet and present the latest developments in integrated circuit design and technology and system integration with an emphasis on wireless communication systems and emerging applications such as terahertz, biology and health care, as well as emerging 3-D integration technologies. The 2011 RFIT received 87 contributed submissions from 14 countries, and accepted 42 papers after a peer-review process. An additional ten invited papers were presented in the program. The symposium consists of one day of tutorial and two days of technical sessions with a total of over 90 delegates. All presenters were invited to submit expanded versions of their papers, and several groups of authors submitted their papers. The papers were handled in the same way as all other submissions by the editorial staff and reviewed according to the same standards as other regular papers. Furthermore, they had to expand the technical content of the paper compared to the RFIT paper, which is not easy. We wish to express a special acknowledgment to this TRANSACTIONS’ Editor-in-Chief, Dr. George E. Ponchak, for his unstinting help and advice. We express our gratitude to the expert reviewers who donated their time and effort to make detailed reviews of these papers. Finally, we are grateful to the authors for submitting their contributions and for their efficient working relationships with the editors and reviewers to meet the publication schedule. FUJIANG LIN, Guest Editor Department of Electronic Science and Technology University of Science and Technology of China Hefei, 230027 China HOWARD LUONG, Guest Editor Department of Electronics and Computer Engineering Hong Kong University of Science and Technology Clear Water Bay, Kowloon, Hong Kong

Fujiang Lin (M’93–SM’99) received the B.S. and M.S. degrees from the University of Science and Technology of China (USTC), Hefei, China, in 1982 and 1984, respectively, and the Dr.-Ing. degree from the University of Kassel, Kassel, Germany, in 1993, all in electrical engineering. In 1995, he joined the Institute of Microelectronics (IME), Singapore, as a Member of Technical Staff, where he pioneered practical RF modeling for monolithic microwave integrated circuit (MMIC)/RF integrated circuit (RFIC) development. In 1999, he joined HP EEsof, as the Technical Director, where he established the Singapore Microelectronics Modeling Center, providing accurate state-of-the-art device and package characterization and modeling solution service worldwide. From 2001 to 2002, he started up and headed Transilica Singapore Pte. Ltd., a research and development design center of Transilica Inc., a Bluetooth and IEEE 802.11 a/b wireless system-on-chip (SoC) company. The company was acquired by Microtune Inc. After the close of Transilica Singapore in 2002, he joined Chartered Semiconductor Manufacturing Ltd., (now GLOBALFOUNDRIES), as Director, where he led the SPICE modeling team in support of company business. In 2003, he rejoined IME as a Senior Member of Technical Staff, where he focused on upstream research and development initiatives and leadership toward next waves. In 2010, he returned to USTC as a Full Professor under the Chinese National “Thousand Talents Program.” He has authored or coauthored over 100 scientific papers. He holds five patents. His current research interest is in the development of CMOS as a cost-effective technology platform for millimeter-wave and terahertz SoCs for communication and medical applications. Dr. Lin has served IEEE activities in different functions since 1995, including as chair of the IEEE Singapore Microwave Theory and Techniques (MTT)/Antennas and Propagation (AP) Chapter, committee member of the Singapore Section, reviewer board member for several transactions or journals, and Technical Program Committee (TPC) member of numerous conferences such as RFIC and ESSCIRC. He is an initiator and a co-organizer of international workshops and short courses at APMC99, SPIE00, ISAP06, and IMS07. He and his team recently initiated and organized the IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), Singapore. He was the recipient of the 1998 Innovator Award presented by EDN Asia Magazine. Digital Object Identifier 10.1109/TMTT.2012.2217773 0018-9480/$31.00 © 2012 IEEE

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Howard Luong (S’88–M’91–SM’02) received the B.S., M.S., and Ph.D. degrees in electrical engineering and computer sciences (EECS) from the University of California at Berkeley, in 1988, 1990, and 1994, respectively. Since September 1994, he has been with the electrical and electronic engineering faculty of the Hong Kong University of Science and Technology, Kowloon, Hong Kong, where he is currently a Professor. In 2001, he took a one-year sabbatical leave to develop a new wireless product with Maxim Integrated Products Inc., Sunnyvale, CA. He coauthored Low-Voltage RF CMOS Frequency Synthesizers (Cambridge Univ. Press, 2004) and Design of Low-Voltage CMOS SwitchedOpamp Switched-Capacitor Systems (Kluwer, 2003). His research interests are in RF and analog integrated circuits and systems for wireless and portable applications. Prof. Luong is an associate editor for the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS. He is a Technical Program Committee member of many conferences including the Custom Integrated Circuits Conference (CICC), European Solid-State Circuits Conference (ESSCIRC), Asian Solid-State Circuits Conference (A-SSCC), and IEEE International Symposium on Radio-Frequency Integration Technology (RFIT). He has been a guest editor for both the 2011 and 2012 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS special issues of CICC papers. He was a Technical Program co-chair for the 2011 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT) and the 2008 IEEE Asian Pacific Conference on Circuits and Systems (APCCAS). He was an associate editor for the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING from 1999 to 2002.

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IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 11, NOVEMBER 2012

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Even- and Odd-Mode Analysis of Thick and Wide Transverse Slot in Waveguides Based on a Variational Method Wang Wenzhi, Ye Sheng, Liang Xianling, Member, IEEE, Jin Ronghong, Member, IEEE, Trevor S. Bird, Fellow, IEEE, Y. Jay Guo, Senior Member, IEEE, and Geng Junping, Member, IEEE

Abstract—Based on a new variational method, an even- and oddmode analysis of transverse coupling slot between waveguides is presented. The proposed method is capable of dealing with slots of finite wall thickness. It uses multiple incident waves with symmetry to simplify the field distribution in the vicinity of the slot, enabling the adoption of one-expansion-term trial functions with sufficient accuracy, even in the instance of wide slots. Analytical solutions are provided, and the calculated results demonstrate excellent agreement with those of numerical simulation. The computation time with the new formulation is, however, significantly shorter. Index Terms—Coupling slots, even- and odd-mode analysis, finite wall thickness, variational method, wide slots.

I. INTRODUCTION

T

RANSVERSE coupling slots in waveguides are widely used for applications, such as directional couplers and power dividers. Over the years, a variety of methods have been developed for analyzing the properties of slots in waveguides. In one approach, Stevenson [1] developed a rigorous method for calculating the scattering parameters of coupling slots near resonance. Later, Lewin [2] and Pandharipande and Das [3] proposed approximate methods based on similar ideas in which slots were treated as equivalent antennas. Sangster [4] applied a variational method to the analysis of single transverse slots, through which a good balance was achieved between accuracy and complexity. The most attractive advantage of the above methods is the existence of analytical solutions, which can be employed to provide a useful estimate before a more detailed analysis is undertaken. However, all the methods mentioned

Manuscript received March 27, 2012; revised August 09, 2012; accepted August 10, 2012. Date of publication September 20, 2012; date of current version October 29, 2012. This work was supported by “973” (2009CB320403), the Natural Science Foundation of Shanghai under Grant 10ZR1416600, the Doctoral Fund of Ministry of Education of China under Grant 20090073120033, the National Science and Technology Major Project of the Ministry of Science (2011ZX03001-007-03), the National Science Fund for Creative Research Groups under Grant 60821062, and the Scientific Research Foundation for the Returned Overseas Chinese Scholars, State Education Ministry. W. Wenzhi, Y. Sheng, L. Xianling, J. Ronghong, and G. Junping are with the Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai 200030, China (e-mail: [email protected]; [email protected]; [email protected]; [email protected]; [email protected]). T. S. Bird and Y. J. Guo are with the Commonwealth Scientific and Industrial Research Organisation (CSIRO), Information and Communication Technologies (ICT) Centre, Epping N.S.W. 1710, Australia (e-mail: [email protected]; [email protected]). Digital Object Identifier 10.1109/TMTT.2012.2215624

above assume a zero wall thickness, which limits their usefulness in some situations. For more detailed study, numerical techniques such as the method of moments (MoM) [5]–[7], finite-difference time domain method [8], [9], the finite-element method [10], and the mode-matching method [11]–[13] can be used to analyze slotted waveguide with finite wall thickness to great practical accuracy. Compared with approximate analytical methods, however, greater programming effort and computer execution time are required, which can be prohibitive for large-scale problems that may require adaptive optimization. When the coupling slot is considered from the point of view of scattering in waveguides, most existing methods employ single wave incidence as a precondition for analysis [4]–[7]. For instance, the analysis of a slotted rectangular waveguide mode directional coupler is usually based on a single that is incident on one of the four ports. The slot properties can then be obtained by describing the field distribution in the vicinity of the slot, which is usually achieved by selected basis function expansion. Previous work has shown that this is an effective way of analyzing narrow slot problems. However, when considering wide slots, more expansion terms are required to represent the complex field distribution near wide slots. In this case, solutions obtained from the current analytical methods are often too complex to be practical. Therefore, their use is normally limited to narrow slots, usually with aspect ratio greater than 10. Based on a variational method, an even- and odd-mode analysis is described in this paper, dealing with the problem of a wide transverse slot with finite wall thickness in the common broad wall of two rectangular waveguides. A general variational expression is first derived, which includes the effect of finite wall thickness. Multiple incident waves with specific symmetry, namely, even- and odd-mode incident waves, are then employed to simplify the field distribution in the vicinity of the slot, enabling the adoption of one-expansion-term trial functions with sufficient accuracy even for wide slots. Therefore, the method provides a useful analytical solution of scattering parameters for a thick or wide transverse slot in waveguide. This paper is organized as follows. In Section II, the theory is described, including the derivation of the variational expression, the selection of trial functions and solutions of scattering parameters. Computed results from this formulation are presented in Section III and these are compared with data obtained from HFSS. The results are also discussed in Section IV, which is followed by a conclusion in Section V.

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on

and

(2) on

, where

boundary by

is the incident wave input from port and is the scattering wave in region generated by corresponding magnetic current at . This latter magnetic field is represented

(3) is the magnetic dyadic Green’s function of where region . and are the unknown quantities of (1) and (2), which will be approximated by trial functions. Performing the integration over after scalar multiplying on both sides of (1), and similarly over after scalar multiplying on both sides of (2), results in two equations containing vectors and , namely, (4) Fig. 1. Geometry of a transverse slot in the common broad wall of two rectangular waveguides. (a) Perspective view. (b) Sectional view.

and (5) where

(6) and Fig. 2. Region division.

II. THEORY (7)

A. Derivation of Variational Expression The geometry of a transverse slot in the common broad wall of two rectangular waveguides is shown in Fig. 1. For simplification, the original problem is transformed using the equivalence principle into an equivalent one through region division [5], [7]. As depicted in Fig. 2, the region division is performed by placing electric walls at boundaries and . Each electric wall is appended with two sheets on either side with magnetic currents and , where is the electric field on in the original problem, . Therefore, the slot area is divided into three regions. According to the continuity conditions for tangential component of magnetic field at and , two equations are obtained for waves incident at each port, which are

(1)

Combining (4) and (5), we obtain

(8) denotes the compound scattering parameter of the where coupling slot with arbitrary incident waves, which will be discussed later. According to (8), a general variational expression of stationary homogeneous form [4], [14] for is given by (9) It is shown in Appendix A that (9) is stationary with respect to small variations in and . In this new expression, the effect of finite wall thickness is now included. It is also worth

WENZHI et al.: EVEN- AND ODD-MODE ANALYSIS OF THICK AND WIDE TRANSVERSE SLOT IN WAVEGUIDES

SPECIFICATION

OF

EVEN-

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TABLE I AND ODD-MODE INCIDENT WAVES

noting that (9) should be valid in the case of two uniform waveguides with arbitrary cross sections connected on their sidewalls through a single slot (aperture) with arbitrary shape if is replaced by the normal vector of the slot (aperture) boundary. B. Trial Functions Before discussing the trial functions that could be suitable for (9) in case of a wide transverse slot, consider even- and odd-mode incident waves specified in Table I for calculating different slot scattering parameters. We have used and to denote the normalized forward and backward traveling mode of waveguide , . Other scattering parameters can be obtained from those listed in Table I by employing symmetry and reciprocity of the structure, and are not considered here. Each mode consists of two or four symmetric incident waves input from different ports, resulting in symmetric and similar distribution of and . For instance, when calculating network scattering parameters and , such symmetry and similarity are shown in Figs. 3 and 4, where only the -components of and are required because they predominate in this situation. The results shown in Figs. 3–5 were obtained from HFSS, with the dimensions of the waveguides and the slot set as mm, mm, mm, mm, mm, mm, and mm. The aspect ratio of the slot is 2.6 and the operating frequency is 14.25 GHz. A negative magnitude corresponds to the electric field with an opposite direction. In Fig. 3(a), the phase values around mm are not provided due to the instability of calculation when the corresponding magnitude is close to zero. For comparison, the results with a single incident wave input from Port 1 are also given in Fig. 5. It is shown that the specified even- and odd-mode incident waves simplify the distribution of and , and thus enable the trial functions to have similar and simple forms with only one expansion term, which should be sufficiently accurate even in case of a wide slot. Hence, appropriate trial functions are proposed as follows for even modes:

Fig. 3. -component of (a) Along -axis at

and with even modes obtained from HFSS. mm. (b) Along -axis at mm.

Fig. 4. -component of (a) Along -axis at

and with odd modes obtained from HFSS. mm. (b) Along -axis at mm.

and for odd modes,

(10)

(12)

(11)

(13)

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(16b) The right-hand sides of (16) are obtained according to usual mode analysis [15], as well as symmetry and reciprocity of the structure, which indicate that and . The scale factor is obtained by minimizing (14). Expressions for , , , and are listed in Appendix B. Given that , and combining (16) and (8), we obtain (17) , is a linear We see that the compound scattering parameter, combination of and . In the same way, use is made of odd-mode incident waves for calculating and , as indicated in Table I. Similarly, an additional superscript is employed in certain symbols. Substituting (12) and (13) into (9) gives the compound scattering parameter for odd modes as

Fig. 5. -component of and with single wave incidence input from mm. (b) Along -axis Port 1 obtained from HFSS. (a) Along -axis at mm. at

where the superscript and denote even and odd modes, respectively. and are arbitrary factors, which will be eliminated in (9), . and are the complex scale factors between and corresponding to different modes specified in Table I, and this will be discussed in Section II-C. C. Solutions of Slot Scattering Parameters 1) and : Consider initially even-mode incident waves for calculating and , which are specified in Table I. Similarly, an additional superscript is employed in certain symbols to denote the even modes. Substituting (10) and (11) into (9), and given that , which indicates that , we obtain an expression of the compound scattering parameter with even modes, given as

where

(14)

(18) The scale factor is obtained by minimizing (18) as described for the even modes. The corresponding result is (19) , , The expressions for Appendix B. Combining (17) and (19), from

, and and

are also listed in

can now be obtained (20) (21)

where tively. 2)

and and

are obtained from (14) and (18), respec: In the same way, we obtain

(22)

(23) (15) and

where the incident waves are chosen as shown in Table I. The scale factors and are obtained by minimizing (22) and (23). Expressions for , , , , , and are given in Appendix B. It can be shown that (24)

(16a)

(25)

WENZHI et al.: EVEN- AND ODD-MODE ANALYSIS OF THICK AND WIDE TRANSVERSE SLOT IN WAVEGUIDES

Combining (24) and (25),

and

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are obtained from (26) (27)

3)

and

: Similarly, we obtain

(28)

(29) where the incident waves are chosen as shown in Table I. The scale factors and are obtained by minimizing (28) and (29), and the results are given in Appendix B. In this case, we obtain

(30)

(31) Combining (17), (19), (24) and (25), (30) and (31), are expressed as

, and

(32) (33)

III. RESULTS A MATLAB code was developed for the new formulation and results obtained were compared with values calculated from the Ansoft HFSS v10 software package. Fig. 6 shows the calculated results of , , , and for a coupling slot with an aspect ratio of 2.6, which was previously discussed in Section II-B, for the frequency range from 12 to 18 GHz. Results obtained from the new formulation are in excellent agreement with HFSS where the error is within about 0.2 dB and 2 for all scattering parameters, as shown in Fig. 6. The error is seen to increase to around 0.3 dB and 6 for at the lowest frequencies in the band. In Fig. 7, results are given for another slot with an aspect ratio of 2, this time in -band. Although has a magnitude error up to 0.3 dB, , , and are of acceptable accuracy and the overall errors are within 0.1 dB and 3 . Characteristics of the error of and are similar to those of and . In Table II, we compare the computation times of the two methods for obtaining the results shown in Fig. 6. The operating

Fig. 6. Scattering parameters of a coupling slot in -band. (a) Magnitude. (b) Phase. (c) Error in magnitude. (d) Error in phase. The dimensions are mm, mm, mm, mm, mm, mm, and mm.

computer has a dual-core CPU running at 2.80 GHz and a RAM of 4 GB. Since the MATLAB code was not developed for parallel processing purposes, only one processor was used during the computation. However, the new formulation is still much faster

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TABLE II COMPARISON OF COMPUTATION TIME WITH PROPOSED METHOD AND HFSS

THE

IV. DISCUSSION It is found that for a relatively short slot in terms of wavelength, accurate results for may not be achievable. The reason is because in the simplification of the trial functions the -component of is ignored. For a short slot with mm (0.38 at center frequency of 14.25 GHz, where denotes the wavelength in open space), the normalized magnitudes of the - and -component of with even mode incident waves are given in Fig. 8. In this situation, it is seen that the -component has now become significant, which also occurs when considering . It is believed that the method would provide better results if more appropriate trial functions were employed for even modes, e.g.,

(34)

(35) and are complex scale factors obtained by miniwhere mizing the corresponding variational expression of . However, introducing the -component in trial functions will significantly complicate the solutions, and thus is not considered further here. With the presently chosen simple shape function there is a restriction on the slot length, which is (36) Fig. 7. Scattering parameters of a coupling slot in -band. (a) Magnitude. (b) Phase. (c) Error in magnitude. (d) Error in phase. The dimensions are mm, mm, mm, mm, mm, mm, mm, and mm.

than HFSS with two processors employed, saving over 99% of the computation time.

In addition, for best accuracy, the slot aspect ratio is recommended to be greater than 2.5. For a multiple slots problem, the proposed method should be useful for providing an estimate before a more detailed analysis is undertaken. The scattering parameters that are obtained in Section II-C could be used to establish the equivalent circuit of an isolated slot, generally as a network with a series element.

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HFSS. A restriction is proposed as to achieve such accuracy. The aspect ratio of slots can be as small as 2, but it is recommended to be greater than 2.5. For a multiple slots problem, the proposed method could be used to provide a useful estimate before a more detailed analysis is undertaken. It is believed that by employing more appropriate trial functions with corresponding simplification of the formulas may help to solve the limitation of short slots (in terms of wavelength), which could be followed up as a refinement of the method. APPENDIX A Here we demonstrate the stationary nature of the variational functional (9). Taking the first variation on both sides of (9) with respect to , we have

Fig. 8. Normalized magnitude of - and -component of with even modes mm, mm, obtained from HFSS. The dimensions are mm, mm, mm, mm, and mm. (a) Along -axis at mm (b) Along -axis at mm.

The problem, e.g., a waveguide coupler with multiple slots, can then be considered as equivalent to a cascaded circuit and solved initially. To deal with the external mutual coupling between the slots, mutual impedances or admittances of the slots could be calculated [16], [17], possibly using the even- and odd-mode functions or other slot based functions, and applied to obtain the generalized scattering matrix [18] of the problem. Finally, a full-wave simulation or optimization could be carried out to achieve a more accurate result or an optimal design.

(37) According to (8), (37) can be simplified as

(38) It is easy to find that

V. CONCLUSION Based on a new variational method, an even- and odd-mode analysis of broadwall transverse coupling slot between waveguides is proposed, which is capable of dealing with the effect of finite wall thickness. A general variational expression of compound scattering parameter is first derived and simple trial functions are then determined from specified even- and odd-mode incident waves. Each mode consists of two or four symmetric incident waves, enabling the adoption of one-expansion-term trial functions with sufficient accuracy even in the instance of wide slots. With the variational expression and corresponding trial functions, compound scattering parameters with respect to even- and odd-mode incident waves are acquired. Combining the results, analytical solutions of the slot scattering parameters are achieved, which should be useful for practical design and optimization. Calculated results demonstrate excellent agreement with those of HFSS with errors within 0.2 dB and 3 . The computation time is, however, significantly shorter than with

(39) (40)

(41) (42) and

(43)

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Substituting (39)–(43) into (38), we obtain

(52)

(53)

(54)

(55)

(44) According to (1) and (3), (44) finally becomes

Odd modes, (45)

In the same way, it can be found that (46) Equation (45) and (46) indicate that (9) satisfies stationary properties with respect to small variations in and .

(56)

(57)

APPENDIX B Listed here are the useful expressions obtained from the proposed even- and odd-mode trial functions. Note that and ( and , ), which are in the form of summation of an infinite series, converge at the speed of or . Typically 60 terms should be enough for their evaluation. Even modes,

(58)

(59) (47) (48)

(60)

(49)

(61)

(62) (50) (63)

(51)

(64)

WENZHI et al.: EVEN- AND ODD-MODE ANALYSIS OF THICK AND WIDE TRANSVERSE SLOT IN WAVEGUIDES

In the above expressions,

(65) (66)

(67) (68)

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[12] Z. Jiang and Z. Shen, “Mode-matching analysis of large aperture coupling and its applications to the design of waveguide directional couplers,” Proc. Inst. Elect. Eng.—Microw., Antennas, Propag., vol. 150, no. 6, pp. 422–428, 2003. [13] M. M. Fahmi, J. A. Ruiz-Cruz, and K. A. Zaki, “ - and -plane wideband ridge waveguide couplers,” Int. J. RF Microw. Comput.-Aided Eng., vol. 18, no. 4, pp. 348–358, 2008. [14] H. Levine and J. Schwinger, “On the theory of electromagnetic wave diffraction by an aperture in an infinite plane conducting screen,” Commun. Pure Appl. Math., vol. 3, no. 4, pp. 355–391, Dec. 1950. [15] R. E. Collin, Field Theory of Guided Waves. New York: IEEE Press, 1991, ch. 7. [16] R. Shavit and R. Elliott, “Design of transverse slot arrays fed by a boxed stripline,” IEEE Trans. Antennas Propag., vol. AP-31, no. 4, pp. 545–552, Jul. 1983. [17] T. S. Bird, “Mutual coupling in finite coplanar rectangular waveguide arrays,” Electron. Lett., vol. 23, no. 22, pp. 1199–1201, 1987. [18] A. Enneking, R. Beyer, and F. Arndt, “Rigorous analysis of large finite waveguide-fed slot arrays including the mutual internal and external higher-order mode coupling,” in IEEE AP-S Int. Symp., 2000, vol. 1, pp. 74–77.

(69) (70)

(71) (72) is the angular frequency, is the permittivity, wavenumber, and is the wave impedance.

is the

REFERENCES [1] A. F. Stevenson, “Theory of slots in rectangular wave-guides,” J. Appl. Phys., vol. 19, pp. 24–38, Jan. 1948. [2] L. Lewin, “Some observations on waveguide coupling through medium-sized slots,” Proc. Inst. Elect. Eng—Monographs, vol. 107, pt. C, pp. 171–178, Sep. 1960. [3] V. M. Pandharipande and B. N. Das, “Coupling of waveguides through large apertures,” IEEE Trans. Microw. Theory Techn., vol. MTT-26, no. 3, pp. 209–212, Mar. 1978. [4] A. J. Sangster, “Variational method for the analysis of waveguide coupling,” Proc. Inst. Elect. Eng., vol. 112, pp. 2171–2179, 1965. [5] S. R. Rengarajan, “Characteristics of a longitudinal/transverse coupling slot in crossed rectangular waveguides,” IEEE Trans. Microw. Theory Techn., vol. 37, no. 8, pp. 1171–1177, Aug. 1989. [6] H.-Y. Yee, “Slotted waveguide directional coupler characteristics,” IEEE Trans. Microw. Theory Techn., vol. 38, no. 10, pp. 1497–1502, Oct. 1990. [7] A. J. Sangster and H. Wang, “A generalized analysis for a class of rectangular waveguide coupler employing narrow wall slots,” IEEE Trans. Microw. Theory Techn., vol. 44, no. 2, pp. 283–290, Feb. 1996. [8] W. Ren et al., “Full-wave analysis of broad wall slot’s characteristics in rectangular waveguides,” IEEE Trans. Antennas Propag., vol. 52, no. 9, pp. 2436–2444, Sep. 2004. [9] Kantartzis, N. V. Tsiboukis, and D. Theodoros, “Higher order FDTD schemes for waveguide and antenna structures,” in Synthesis Lectures on Computational Electromagnetics. San Rafael, CA: Morgan & Claypool, 2006, ch. 7. [10] J. K. Park and S. W. Nam, “A general rigorous analysis of arbitraryshaped multiaperture-coupled directional coupler between two dissimilar rectangular waveguides crossing with an arbitrary angle,” Microw. Opt. Technol. Lett., vol. 18, pp. 43–46, May 1998. [11] T. Sieverding, U. Papziner, and F. Arndt, “Mode-matching CAD of rectangular or circular multiaperture narrow-wall couplers,” IEEE Trans. Microw. Theory Techn., vol. 45, no. 7, pp. 1034–1040, Jul. 1997.

Wang Wenzhi received the B.S. degree in information engineering and M.S. degree in electromagnetic and microwave technology from Shanghai Jiao Tong University, Shanghai, China, in 2009 and 2011, respectively, and is currently working toward the Ph.D. degree at Shanghai Jiao Tong University. His research interests include microwave antennas, phased arrays, calibration techniques for arrays, guided wave theory, and waveguide components.

Ye Sheng was born in Guangdong Province, China, in October 1983. He received the B.S. degree in information engineering from the South China University of Technology, Guangzhou, China, in 2006, the M.S. degree in electromagnetic and microwave technology from Shanghai Jiao Tong University, Shanghai, China, in 2009, and is currently working toward the Ph.D. degree at Shanghai Jiao Tong University. His main research interests are high-gain planar antennas for wireless communications, especially high-efficiency array antennas for mobile satellite communication.

Liang Xianling (M’11) received the B.Sc. degree in electronic engineering from Xi’dian University, Xi’an, China, in 2002, and the Ph.D. degree in electric engineering from Shanghai University, Shanghai, China, in 2007. From 2007 to 2008, he was a Postdoctoral Research Fellow with the Institut National de la Recherche Scientifique (INRS), Université du Quebec, Montréal, QC, Canada. In December 2008, he joined the Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China, as a Lecturer. He has authored or coauthored over 90 papers in refereed journals and conference proceedings. His current research interests include microwave and millimeter-wave antennas, integrated antennas, wideband and active antennas, and phased arrays. Dr. Liang was the recipient of the 2008 Award of Shanghai Municipal Excellent Doctoral Dissertation, the 2009 Nomination of National Excellent Doctoral Dissertation, and the 2010 Best Paper Award presented at the International Workshop on Antenna Technology: Small Antennas, Innovative Structures, and Materials.

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Jin Ronghong (M’09) received the B.S. degree in electronic engineering, M.S. degree in electromagnetic and microwave technology, and Ph.D. degree in communication and electronic systems from Shanghai Jiao Tong University, Shanghai, China, in 1983, 1986, and 1993, respectively. In 1986, he joined the Faculty of the Department of Electronic Engineering, Shanghai Jiao Tong University, where he has been an Assistant, a Lecturer, an Associate Professor, and currently a Professor. From 1997 to 1999, he was a Visiting Scholar with the Department of Electrical and Electronic Engineering, Tokyo Institute of Technology. From 2001 to 2002, he was a Special Invited Research Fellow with the Communication Research Laboratory, Tokyo, Japan. From 2006 to 2009, he was a Guest Professor with the University of Wollongong, Wollongong, N.S.W., Australia. He is also a Distinguish Guest Scientist with the Commonwealth Scientific and Industrial Research Organisation (CSIRO), Sydney, Australia. He has authored or coauthored over 200 papers in refereed journals and conference proceedings and coauthored two books. He holds 38 patents in antenna and wireless technologies. His main areas of research interest are antennas, electromagnetic theory, numerical techniques of solving field problems, and electromagnetic compatibility (EMC). Dr. Jin is a Senior Member of the Chinese Institute of Electronics. He was the recipient of a National Technology Innovation Award, a National Nature Science Award, and a Shanghai Science and Technology Progress Award.

Trevor S. Bird (S’71–M’76–SM’85–F’97) received the B. App. Sc., M. App. Sc., and Ph.D. degrees from the University of Melbourne, Melbourne, Australia, in 1971, 1973, and 1977, respectively. From 1976 to 1978, he was a Postdoctoral Research Fellow with Queen Mary College, University of London, London, U.K., followed by five years as a Lecturer with the Department of Electrical Engineering, James Cook University, Douglas, Qlds, Australia. In 1982 and 1983, he was a Consultant with Plessey Radar, London, U.K. In December 1983, he joined the Commonwealth Scientific and Industrial Research Organisation (CSIRO), Sydney, Australia. He has held several positions with CSIRO, culminating with Chief Scientist, ICT Centre. He is currently a CSIRO Fellow and Principal of Antengenuity, a specialist consulting firm, an Adjunct Professor with Macquarie University, and a Guest Professor with Shanghai Jiao Tong University. He is a member of the Editorial Board of the Journal of Infrared, Millimeter and Terahertz Waves, and IET Microwaves, Antennas and Propagation. He is listed in Who’s Who in Australia. Dr. Bird is a Fellow of the Australian Academy of Technological and Engineering Sciences and the Institution of Electrical Technology (U.K.). He is an Honorary Fellow of the Institution of Engineers (Australia). He was a Distinguished Lecturer for the IEEE Antennas and Propagation Society (1997–1999), chair of the New South Wales joint AP/MTT Chapter (1995–1998, 2003), chairman of the 2000 Asia–Pacific Microwave Conference, member of the New South Wales Section Committee (1995–2005), and vice-chair and chair of the Section (1999–2000 and 2001–2002, respectively). He was a member of the Administrative Committee of the IEEE Antennas and Propagation Society (2003–2005) and a member of the College of Experts of the Australian Research Council (ARC) (2006–2007) He was an associate editor for the IEEE TRANSACTIONS ON ANTENNAS AND PROPAGATION (2001–2004) and editor-in-chief (2004–2010). He is currently president elect of the IEEE Antennas and Propagation Society and chair of the Antennas and Propagation Society’s Publication Committee. He was the recipient of the 1988, 1992, 1995, and 1996 John Madsen Medal of the Institution of Engineers (Australia) for the best paper published annually in the Journal of Electrical and Electronic Engineering (Australia). In 2001, he was a corecipient of the H. A. Wheeler Applications Prize Paper Award of the IEEE Antennas and Propagation Society. He was the recipient of CSIRO medals in 1990 for the development of an Optus-B satellite spot beam antenna, in 1998 for the multibeam antenna feed system for the Parkes radio telescope, and in 2011 for lifetime achievement. He was the recipient of an IEEE Third Millennium Medal in 2000 for outstanding contributions to the IEEE New South Wales Section. Engineering projects that he played a major role in were bestowed awards by the Society of Satellite

Professionals International (New York, NY) in 2004, the Engineers Australia in 2001, and the Communications Research Laboratory, Japan, in 2000. In 2003, he was the recipient of a Centenary Medal for service to Australian society in telecommunications and was also named Professional Engineer of the Year by the Sydney Division of Engineers Australia. He was also the recipient of the M. A. Sargent Medal in 2012 by Engineers Australia for sustained contributions to electrical engineering.

Y. Jay Guo (SM’96) received the Bachelors and Masters degrees from Xidian University, Xi’an, Shaanxi, China, in 1982 and 1984, respectively, and the Ph.D. degree from Xian Jiaotong University, Xi’an, Shaanxi, China, in 1987. Since 2005, he has been with Commonwealth Scientific and Industrial Research Organisation (CSIRO), Sydney, Australia, where he managing a number of portfolios of research programs including Smart and Secure Infrastructure, Broadband Networks and Services, and Broadband for Australia and Safeguarding Australia. From August 2005 to January 2010, he was the Research Director of the Wireless Technologies Laboratory, CSIRO ICT Centre. Prior to joining CSIRO, he held various senior positions with Fujitsu, Siemens, and NEC. He is an Adjunct Professor with the University of New South Wales, Macquarie University, and University of Canberra. He was a Guest Professor with the Chinese Academy of Science (CAS) and Shanghai Jiao Tong University. He has authored or coauthored 82 journal papers and 130 refereed international conference papers. He has authored three technical books. He holds 18 patents. His research interest includes reconfigurable antennas and radio systems, antenna arrays, wireless positioning, and multigigabit wireless communications. Dr. Guo has chaired numerous international conferences. He is general chair of IWAT2014 and patronage and publicity chair of IEEE ICC2014. He was the Technical Program Committee (TPC) chair of 2010 IEEE WCNC and 2007 and 2012 IEEE ISCIT. Since 2009, he has been the executive chair of Australia China ICT Summit. He was guest editor of the “Special Issue on Antennas and Propagation Aspects of 60–90 GHz Wireless Communications” of the IEEE TRANSACTIONS ON ANTENNAS AND PROPAGATION and the “Special Issue on Communications Challenges and Dynamics for Unmanned Autonomous Vehicles,” of the IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS. Dr. Guo is a Fellow of the Institution of Engineering and Technology (IET). He was the recipient of a 1997 honorary Ph.D. degree by the University of Bradford, Bradford, U.K., for his research achievements in Fresnel antennas. He was the recipient of the 2007 Australian Engineering Excellence Award, the 2007 and 2012 CSIRO Chairman’s Medal, and the 2012 CSIRO Newton Turner Award.

Geng Junping (M’08) received the B.S. degree in plastic working of metals, the M.S. degree in corrosion and protection of equipment, and the Ph.D. degree in circuit and system from the Northwestern Polytechnic University, Xi’an, China, in 1996, 1999, and 2003, respectively. From 2003 to 2005, he was a Postdoctoral Researcher with Shanghai Jiao Tong University. In April 2005, he joined the faculty of Electronic Engineering Department, Shanghai Jiao Tong University, where he is currently an Associate Professor. He has authored or coauthored over 150 refereed journal and conference papers, two book chapters, and one book. He holds 34 patents with over 30 pending. He has been involved with electromagnetic compatibility (EMC) for high altitude platform station (HAPS), multiantennas for terminals, smart antennas, and nanoantennas. His main research interests include antennas, electromagnetic theory, and computational techniques of electromagnetic and nanoantennas. Dr. Geng is a member of the Chinese Institute of Electronics (CIE). He was the recipient of a Technology Innovation Award of the Chinese Ministry of Education (2007) and a Technology Innovation Award of the Chinese Government (2008).

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Generalized Time-Domain Adjoint Sensitivity Analysis of Distributed MTL Networks Amaninder Singh Saini, Member, IEEE, Michel S. Nakhla, Life Fellow, IEEE, and Ramachandra Achar, Senior Member, IEEE

Abstract—In this paper, a generalized approach is presented for time-domain adjoint sensitivity analysis of lossy multiconductor transmission lines (MTLs) with respect to electrical and/or physical parameters. While the new approach provides all the advantages of an adjoint sensitivity analysis, it is independent of the specifics of the MTL macromodel used. Several numerical examples are presented to demonstrate the validity and accuracy of the proposed approach. Index Terms—Circuit simulation, coupled transmission lines (TLs), high-speed interconnects, parametric variations, sensitivity, signal integrity, transient analysis.

I. INTRODUCTION

T

HE continually increasing operating frequencies and sharper edge rates coupled with the higher density/complexity of modern integrated circuits and microwave applications has made interconnect analysis and optimization a challenging task. Effects such as reflections, crosstalk, and propagation delays associated with the interconnects have become critical factors, and improperly designed interconnects can result in increased signal delay, ringing, and false switching [1]. Interconnections are ubiquitous, being present at various levels of the design hierarchy such as on-chip, packaging structures, multichip modules (MCMs), printed circuit boards (PCBs), and backplanes. At higher frequencies, lumped interconnect models become inadequate and distributed multiconductor transmission line (MTL) models based on Telegrapher’s equations become necessary. Interconnects play an important role in determining the performance of modern multifunction designs. These performance metrics include operating frequency, density, power consumption, and area. For example, shortening interconnects can reduce the problem of delay and reflections while providing for higher density. However, a higher density can lead to excessive crosstalk between adjacent interconnects. Designers must make proper tradeoffs, often between conflicting design requirements, to obtain the best possible performance. Therefore, efficient and accurate sensitivity analysis of circuit response with respect to interconnect parameters becomes significantly imManuscript received April 19, 2012; revised July 29, 2012; accepted July 31, 2012. Date of publication September 07, 2012; date of current version October 29, 2012. The authors are with the Department of Electronics, Carleton University, Ottawa, ON, Canada, K1S 5B6 (e-mail: [email protected]; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2214053

portant in identifying critical design components, in tolerance assignments, and in optimizing the overall interconnect performance [2]–[11]. Sensitivity analysis of circuits in terms of first-order derivatives can be found in the literature [2]–[13]. In [3], the authors presented a new algorithm for direct sensitivity analysis of transmission-line (TL) circuits modeled using the matrix rational approximation (MRA) [14] and subsequently expanded its scope in [4] to include delay-based MTL macromodels. Recently, they presented a generic method for direct sensitivity analysis of distributed interconnects independent of the details of the macromodel used [5]. Using direct sensitivity analysis [2]–[5], the sensitivity of all the outputs with respect to a single parameter can be obtained. However, designers are typically interested in knowing the sensitivity of a particular output with respect to several parameters. In this case, direct sensitivity approach becomes computationally expensive as the number of solutions required increases with the number of parameters. To address this difficulty, adjoint sensitivity analysis [12] was first introduced for lumped circuits by Director and Rohrer, based on Tellegen’s theorem [15], [16]. Using the adjoint analysis [12], sensitivities of a single output with respect to all parameters of interest can be evaluated at once, providing more practical and significant computational advantages. An alternate method based on variational approach can also be found for adjoint sensitivity analysis of lumped circuits [7], [13] and for the special case of single lossless TL macromodels [8]. In this paper, an efficient algorithm based on a variational approach for adjoint sensitivity analysis of multiconductor TL circuits is presented ([6] describes a brief conceptual description of the related work based on Tellegen’s theorem). An important additional advantage of the proposed algorithm is that its formulation is independent of the specifics of the MTL macromodel used (i.e., the proposed method can be adopted in conjunction with a wide variety of MTL macromodels that are available in the literature, without requiring to re-derive the constituting sensitivity relations for each case). This paper is organized as follows. In Section II, a formulation of circuit equations is provided. The proposed adjoint method based on variational approach is described in Section III. The application of the proposed approach in terms of numerical examples is demonstrated in Section V and conclusions are presented in Section VI. II. FORMULATION OF CIRCUIT EQUATIONS Consider a general circuit consisting of [3] linear and nonlinear components and distributed TLs. The corresponding

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modified nodal analysis (MNA) equations can be written in the time domain as (1)

In this section, details of the proposed time-domain adjoint sensitivity analysis for circuits including the general case of distributed MTL networks are given.

(2)

A. Problem Formulation

where and •

III. DEVELOPMENT OF THE PROPOSED ADJOINT SENSITIVITY CONCEPT FOR DISTRIBUTED MTLs

is the vector of unknowns corresponding to node voltages, independent and dependent voltage source currents, and inductor currents; is an input vector with entries determined by the independent current and voltage sources; is a vector related to nonlinear elements and is the total number of MNA variables; • are constant matrices describing the lumped memoryless and memory elements, respectively; • , is a selector matrix that maps the vector of terminal currents entering the TL into the nodal space of the circuit, where , , is number of coupled lines in the th TL, and is the total number of distributed TLs in the circuit; • is the time-domain admittance matrix of the th TL, where and are the vectors corresponding to terminal currents and voltages, respectively; and “ ” denotes the convolution operator. The distributed elements have a direct representation in the Laplace domain, but do not have direct representation in time domain. In order to overcome this problem, several time-domain macromodels have been proposed in the literature, such as method of characteristics (MoC) (which does not guarantee passivity [17], [18]), MRA (which guarantees passivity [14]), and delay extraction-based passive compact time-domain (DEPACT) macromodel (which provides delay extraction along with guaranteed passivity [19]). For evaluating sensitivities of circuit responses, the conventional direct sensitivity approach is based on differentiating (1) with respect to a specific parameter . One of the major challenges with the direct sensitivity approach is that if the circuit contains number of parameters, then to evaluate circuit sensitivities, a perturbed set of equations have to be solved times, which can become prohibitively CPU expensive. To address this problem, the adjoint sensitivity concept for lumped circuits was introduced in [12]. The initial derivation of an adjoint sensitivity [12] was based on Tellegen’s theorem [15], [16]. The main advantage of using the adjoint sensitivity approach is that the sensitivity with respect to all the parameters of interest can be found by simulating only two systems: original and adjoint. An alternate method based on variational approach can also be found for adjoint sensitivity analysis of lumped circuits [7], [13] and for the special case of single lossless TL macromodels [8]. The main focus of this paper is to extend the adjoint approach for time-domain sensitivity analysis of general lossy MTL networks. The new method is based on the variational approach and the related details are given below.

Consider (1) and an objective function whose value is to be optimized at time with respect to a particular circuit parameter as given by (3) where is a scalar function [13]. To perform optimization, we need the derivative , which can be obtained by differentiating (3) with respect to as (4) where (5) is the sensitivity vector of circuit variables with respect to a parameter . Using the direct sensitivity approach [5], is obtained by differentiating (1) as follows: (6) where

(7) As can be seen from (6) and (7), evaluating with respect to variables requires the solution of (6) and (7) times, making the process computationally expensive. In order to address this difficulty, Section III-B provides a new adjoint sensitivity approach for circuits including distributed TL interconnect networks. B. Proposed Adjoint Sensitivity Approach for Distributed TL Interconnects Using the variational approach [13], we define an auxiliary variable . Multiplying (6) by and integrating with respect to gives

(8)

SAINI et al.: GENERALIZED TIME-DOMAIN ADJOINT SENSITIVITY ANALYSIS OF DISTRIBUTED MTL NETWORKS

Substituting get

in (8) and using integration by parts, we

(9)

The sensitivity function in (15) can be obtained in terms of the solution of the original system (1) and the corresponding adjoint equations (11)–(14) as

(16) is found from the dc analysis of the original system

where (1) as

It is to be noted that, contrary to (6) and (7), (9) allows us to avoid calculating explicitly. This is possible if can be found such that [using (9) and (4)]

(10) is referred to as the adjoint MNA variable vector where [20]. Taking transpose of both sides and substituting in (10) gives

(11) where

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(17) is the Laplace transform of . where If is the electrical or physical parameter of the th TL, then in (7) becomes (18) and the middle term of the right-hand side (RHS) in (16) becomes (19)

where and can be found by simulating the adjoint and original systems, respectively. Next, the details of evaluation of in (19) in a closed-form is given in Section III-C. C. Evaluation of the Sensitivity of the MTL Admittance Matrix

It is to be noted that and are the terminal voltage and current vectors of the th TL in the adjoint system, respectively. Next, (12) can be written in the Laplace domain as

Consider the th TL containing coupled lines with , , , and as per-unit-length (p.u.l.) resistance, inductance, conductance, and capacitance matrices, respectively. The p.u.l. parameters can be constant or frequency dependent (FD). The corresponding p.u.l. impedance and admittance matrices of the MTL network are given by [10]

(14)

(20)

(12) (13)

(21) where is the Laplace transform of . The adjoint system is defined by (11) and (14). However, the solution of (11) is not unique until the initial conditions are defined, which can be obtained by substituting (9) in (4)

The frequency-domain admittance matrix [10] is given by

of the MTL

(22) (23) (24)

(15) and explicitly, is selected to be To avoid calculating equal to zero. This implies that an adjoint system is simulated forward in time, from 0 to , with initial conditions set to 0 (i.e., ).

are diagonal matrices defined as (25) (26)

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is the length of the TL and (36) .. .

with

.. .

..

being the th eigenvalue of

.

(27)

.. . and

(28) is the corresponding eigenvector matrix related by (29)

Using (34), (35), and (36), ated. D. Evaluation of Objective Function

and

can be evalu-

, the Sensitivity of the

The sensitivity of the admittance matrix can be evaluated by substituting (32)–(36) into (31). Next, using the sensitivity of the admittance matrix and (19), the sensitivity of the objective function (16) is computed as follows:

Next, (23) can be rewritten as (30) Differentiating (30) with respect to

(37)

gives

where (38) (39) and denote the fast Fourier transform (FFT) and inverse fast Fourier transform (IFFT) operators, respectively. (31)

in (31), To proceed further with the evaluation of individual derivatives, namely, , , , and are required and are evaluated as follows. 1) Evaluation of : Differentiating (29) with respect to gives (32) Normalizing the magnitude of spect to gives

and differentiating with re-

(33) Next, (32) and (33) can be written in a matrix form as (34)

can be evaluated. Using (28) and (34), can be obtained by differentiating (24) with respect to and using (20), (27), (28), and (34). 2) Evaluation of and : Differentiating (25) and (26) with respect to results in

(35)

E. Summary of Computational Steps A summary of the computational steps for the proposed adjoint sensitivity analysis are given as follows. Step 1) Simulate the original circuit (1) from to to get . Step 2) Replace all the nonlinear elements in the original circuit with linear time-varying elements . The independent sources for adjoint circuit are evaluated using . Simulate the adjoint circuit (11)–(14) from to with zero initial conditions to get . Step 3) Use from Step 1), from Step 2) and (16) to find the sensitivity of the objective function (4). It is to be noted that the concept of self-adjoint can also be used in case the circuit under consideration consists entirely of lossless TLs [21], [22]. However, practical high-speed interconnect circuits contain lossy TLs in addition to active and nonlinear components. Moreover, in many cases, the p.u.l. parameters of the TLs can be FD. The proposed approach can be easily adapted to the case of TLs with FD p.u.l. parameters. This can be accomplished by representing the p.u.l. FD parameters by rational functions using techniques such as vector fit [23]–[25], and subsequently synthesizing them as lumped equivalent circuits. IV. COMPARISON WITH PERTURBATION AND DIRECT SENSITIVITY ANALYSIS TECHNIQUES In this section, a brief discussion of the computational cost of the proposed technique versus the perturbation [11] and directbased [2]–[5] sensitivity techniques is given.

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Using the perturbation technique, the MNA equations described by (1) and (2) are solved at each time point twice corresponding to the nominal and perturbed value of the parameter under consideration. Hence, for parameters, the main computational cost for the perturbation technique is (40) Fig. 1. Circuit containing three lossy coupled TLs [11] (Example 1).

where is the number of time points, is the number of Newton–Raphson iterations at the time point , and and are the computational times for LU decomposition and forward-backward substitutions, respectively. Using the direct sensitivity approach, (1) and (6) can be solved simultaneously avoiding the need for an additional LU decomposition at each time point while solving (6). However, an extra forward-backward substitution is needed at every time point for each parameter under consideration. Hence, for parameters, the main computational cost using the direct approach is (41)

as a change in the objective function due to 1% change in the parameter as (44) A. Example 1 The circuit considered in this experiment is shown in Fig. 1 [11]. It contains three lossy coupled TLs numbered by sub-circuits 1–3. The lengths of the TLs in sub-circuits 1–3 are 0.2, 0.5, and 0.3 m, respectively. The electrical parameters of TL #1 are nH/m, nF/m, m, and mS/m. The parameters of TL #2 are

Similarly, the adjoint approach requires the solution of (1) and (11). However, in contrast to the direct approach where (6) is parameter dependent, (11) is independent of any specific parameter. As a result, (11) needs to be solved only once independent of the number of parameters. Hence, for parameters, the main computational cost using the adjoint approach is

nH/m nF/m m

(42)

mS/m The parameters of TL #3 are

if the LU factors are stored while solving (1); otherwise

H/m (43) is the computational cost associated with evaluating where the numerical integration in (16). In the computational results presented in Section V, we used (43) to avoid the additional memory required to store the LU factors. In addition to extending all the advantages of the adjoint sensitivity analysis approach to distributed TLs, the proposed method is generic and is compatible with any MTL macromodel. V. NUMERICAL EXAMPLE In this section, four numerical examples are presented to demonstrate the validity and accuracy of the proposed method. Here, Examples 1 and 2 demonstrate the validity and accuracy of the proposed method. Example 3 illustrates the adoption of the proposed algorithm in an optimization problem. Example 4 illustrates the computational savings using the proposed algorithm. In all the examples, a relative sensitivity is defined

nF/m

m

mS/m

The applied voltage is a trapezoidal pulse with a rise and fall time of 1 ns, a pulsewidth of 7 ns, and a magnitude of 2 V. All nonlinear resistors follow the relation. The output response and the relative sensitivity are computed for the voltage at node in Fig. 1. The voltage response at node is shown in Fig. 2. The corresponding adjoint circuit is shown in

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Fig. 2. Transient response of the circuit shown in Fig. 1 at node

.

Fig. 3. Adjoint circuit corresponding to Fig. 1 with an impulse source

Fig. 5. Relative sensitivity of the output voltage TL #1 of Fig. 1.

with respect to

of

Fig. 6. Relative sensitivity of the output voltage TL #3 of Fig. 1.

with respect to

of

.

Fig. 7. Circuit containing a lossy coupled TL (Example 2). Fig. 4. Relative sensitivity of the output voltage Fig. 1.

with respect to

of

Fig. 3. The time-domain relative sensitivities with respect to , of TL #1 and of TL #3 were lumped resistor computed using the proposed method. A comparison of the relative sensitivity obtained using the proposed approach and the direct approach [5] are shown in Figs. 4–6. As seen, the results from both of the approaches match accurately.

B. Example 2 In this experiment, a nonlinear circuit is considered (Fig. 7), containing a lossy coupled TL with a length of 0.05 m. The physical parameters of the TL are shown in Fig. 8. The applied voltage is a trapezoidal pulse with rise and fall times of 0.5 ns, a pulsewidth of 2 ns, and a magnitude of 5 V. The nonlinear resistors follow the relation and , where . The output response and the relative sensitivity are computed for the voltage at node

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Fig. 8. Physical parameters of lossy coupled TLs of Fig. 7.

Fig. 11. Adjoint circuit corresponding Fig. 7 with an impulse source

Fig. 9. Transient response of the circuit shown in Fig. 7 at nodes .

Fig. 10. Transient response of the circuit shown in Fig. 7 at node

.

and

Fig. 12. Relative sensitivity of output voltage the circuit in Fig. 7.

with respect to

for

Fig. 13. Relative sensitivity of output voltage , of the TL in Fig. 7.

with respect to width,

.

in Fig. 7. The voltage responses at nodes and are shown in Figs. 9 and 10, respectively. The corresponding adjoint circuit is shown in Fig. 11. The time-domain relative sensitivity of with respect to different parameters are computed using the proposed approach and are compared with the direct approach [5] in Figs. 12 and 13. It can be seen that both the approaches match reasonably well. The observed minor deviation is due to the numerical tolerance settings for integrating the differential equations (6) and (7) and

in calculating the convolution integrals (16) that are associated with the two approaches under consideration. To observe the effect of the degree of nonlinearity on the accuracy of the proposed method, the relationship for was changed to and the experiment was repeated. Even

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Fig. 16. Adjoint circuit corresponding to Fig. 15.

TABLE I SENSITIVITY OF DISSIPATED POWER

Fig. 14. Relative sensitivity of output voltage . the circuit in Fig. 7 and

with respect to

for TABLE II COMPUTATIONAL COST COMPARISON FOR EXAMPLE 4

D. Example 4

Fig. 15. Circuit containing a lossy coupled TL (Example 3).

for this case, as shown in Fig. 14, the computed relative sensitivities from both the direct and proposed approaches were in good agreement. C. Example 3 The nonlinear circuit considered in this example is shown in Fig. 15 containing a lossy coupled TL with a length of 0.05 m. The physical parameters of the TL are shown in Fig. 8. The applied voltage is a trapezoidal pulse with rise and fall times of 0.5 ns, a pulsewidth of 2 ns, and a magnitude of 5 V. The nonlinear resistor follows the relation , where . The objective function considered is the average power dissipated by the load ns ns

ns

(45)

The power dissipated by the load in the original circuit is 35.05 mW. The corresponding proposed adjoint circuit is shown in Fig. 16. The result of the proposed adjoint approach is compared with that from the perturbation method. The relative sensitivity with respect to the physical parameters , , and are shown in Table I, which further validates the accuracy of the proposed method.

To demonstrate the efficiency of the proposed method, a relatively large circuit consisting of 3626 lumped components (resistors, inductors, and capacitors) and a TL network is considered. For sensitivity calculations, we selected at random 200 parameters corresponding to lumped components and four p.u.l. parameters corresponding to the TL network. The computational cost comparison using the proposed adjoint sensitivity with the direct and perturbation techniques is given in Table II. VI. CONCLUSIONS A generalized approach for time-domain adjoint sensitivity analysis of lossy distributed MTLs in the presence of nonlinear terminations is described. The method is based on the variational approach and enables sensitivity analysis of interconnect structures with respect to both electrical and physical parameters while providing significant computational cost advantages. While the new approach provides all the advantages of an adjoint sensitivity analysis, its formulation is independent of the specifics of the MTL macromodel used. This makes the proposed method applicable to a wide variety of macromodels available in the literature. The proposed approach can also be easily extended to include the case of FD p.u.l. parameters. REFERENCES [1] R. Achar and M. S. Nakhla, “Simulation of high-speed interconnects,” Proc. IEEE, vol. 89, no. 5, pp. 693–728, May 2001.

SAINI et al.: GENERALIZED TIME-DOMAIN ADJOINT SENSITIVITY ANALYSIS OF DISTRIBUTED MTL NETWORKS

[2] J.-F. Mao and E. S. Kuh, “Fast simulation and sensitivity analysis of lossy transmission lines by the method of characteristics,” IEEE Trans. Circuits Syst. I, Fundam. Theory Appl, vol. 44, no. 5, pp. 391–401, May 1997. [3] A. Dounavis, R. Achar, and M. S. Nakhla, “Efficient sensitivity analysis of lossy multiconductor transmission lines with nonlinear terminations,” IEEE Trans. Microw. Theory Techn., vol. 49, no. 12, pp. 2292–2299, Dec. 2001. [4] N. M. Nakhla, A. Dounavis, M. S. Nakhla, and R. Achar, “Delay-extraction-based sensitivity analysis of multiconductor transmission lines with nonlinear terminations,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 11, pp. 3520–3530, Nov. 2005. [5] N. M. Nakhla, M. Nakhla, and R. Achar, “A general approach for sensitivity analysis of distributed interconnects in the time domain,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 1, pp. 46–55, Jan. 2011. [6] A. S. Saini, M. S. Nakhla, and R. Achar, “Time-domain adjoint sensitivity of high-speed interconnects,” in IEEE 19th Elect. Perform. Electron. Packag. Syst. Conf., 2010, pp. 153–156. [7] T. Ahmed, E. Gad, and M. C. E. Yagoub, “An adjoint-based approach to computing time-domain sensitivity of multiport systems described by reduced-order models,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 11, pp. 3538–3547, Nov. 2005. [8] C.-W. Ho, “Time-domain sensitivity computation for networks containing transmission lines,” IEEE Trans. Circuit Theory, vol. CT-18, no. 1, pp. 114–122, Jan. 1971. [9] N. K. Nikolova, J. W. Bandler, and M. H. Bakr, “Adjoint techniques for sensitivity analysis in high-frequency structure CAD,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 1, pp. 403–419, Jan. 2004. [10] S. Lum, M. S. Nakhla, and Q. J. Zhang, “Sensitivity analysis of lossy coupled transmission lines,” IEEE Trans. Microw. Theory Techn., vol. 39, no. 12, pp. 2089–2099, Dec. 1991. [11] S. Lum, M. Nakhla, and Q. J. Zhang, “Sensitivity analysis of lossy coupled transmission lines with nonlinear terminations,” IEEE Trans. Microw. Theory Techn., vol. 42, no. 4, pp. 607–615, Apr. 1994. [12] S. Director and R. A. Rohrer, “The generalized adjoint network and network sensitivities,” IEEE Trans. Circuit Theory, vol. CT-16, no. 3, pp. 318–323, Aug. 1969. [13] Z. Ilievski, H. Xu, A. Verhoeven, E. J. W. ter Maten, W. H. A. Schilders, and R. M. M. Mattheij, “Adjoint transient sensitivity analysis in circuit simulation,” in Scientific Computing in Electrical Engineering, Presented at SCEE-2006, ser. Math. Industry. Berlin, Germany: Springer-Verlag, Sep. 17–22, 2006, vol. 11, pp. 183–189. [14] A. Dounavis, X. Li, M. S. Nakhla, and R. Achar, “Passive closed-form transmission-line model for general-purpose circuit simulators,” IEEE Trans. Microw. Theory Techn., vol. 47, no. 12, pp. 2450–2459, Dec. 1999. [15] B. Tellegen, “A general network theorem, with applications,” Philips Res., Philips Res. Rep., 1952, vol. 7, pp. 259–269. [16] P. Penfield, R. Spence, and S. Duinker, “A generalized form of Tellegen’s theorem,” IEEE Trans. Circuit Theory, vol. CT-17, no. 3, pp. 302–305, Aug. 1970. [17] J. F. Branin, “Transient analysis of lossless transmission lines,” Proc. IEEE, vol. 55, no. 11, pp. 2012–2013, Nov. 1967. [18] F. Y. Chang, “The generalized method of characteristics for waveform relaxation analysis of lossy coupled transmission lines,” IEEE Trans. Microw. Theory Techn., vol. 37, no. 12, pp. 2028–2038, Dec. 1989. [19] N. M. Nakhla, A. Dounavis, R. Achar, and M. S. Nakhla, “DEPACT: Delay extraction-based passive compact transmission-line macromodeling algorithm,” IEEE Trans. Adv. Packag., vol. 28, no. 1, pp. 13–23, Feb. 2005. [20] K. Singhal and J. Vlach, Computer Methods for Circuit Analysis and Design, 2nd ed. New York: Van Nostrand, 1994. [21] M. H. Bakr and N. K. Nikolova, “An adjoint variable method for timedomain TLM with wideband Johns matrix boundaries,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 2, pp. 678–685, Feb. 2004. [22] P. A. W. Basl, M. H. Bakr, and N. K. Nikolova, “Theory of self-adjoint -parameter sensitivities for lossless non-homogenous transmissionline modelling problems,” IET Microw. Antennas Propag., vol. 2, no. 3, pp. 211–220, Apr. 2008. [23] B. Gustavsen and A. Semlyen, “Rational approximation of frequency domain responses by vector fitting,” IEEE Trans. Power Del., vol. 14, no. 3, pp. 1052–1061, Jul. 1999. [24] N. Nakhla, A. E. Ruehli, M. S. Nakhla, R. Achar, and C. Chen, “Waveform relaxation techniques for simulation of coupled interconnects with frequency-dependent parameters,” IEEE Trans. Adv. Packag., vol. 30, no. 2, pp. 257–269, May 2007.

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[25] C. Chen, D. Saraswat, R. Achar, E. Gad, M. Nakhla, and M. C. E. Yagoub, “A robust algorithm for passive reduced-order macromodeling of MTLs with FD-PUL parameters using integrated congruence transform,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 27, no. 3, pp. 574–578, Mar. 2008. Amaninder Singh Saini (S’10–M’12) received the B.Eng. degree in electrical engineering from Carleton University, Ottawa, ON, Canada, in 2009, and is currently working toward the M.A.Sc. degree in electrical and computer engineering at Carleton University.

Michel S. Nakhla (S’73–M’75–SM’88–F’98– LF’12) received the Ph.D. degree in electrical engineering from the University of Waterloo, Waterloo, ON, Canada, in 1975. He is currently a Chancellor’s Professor of Electrical Engineering with Carleton University, Ottawa, ON, Canada. From 1976 to 1988, he was with Bell-Northern Research, Ottawa, ON, Canada, as the Senior Manager of the computer-Aided Engineering Group. In 1988, he joined Carleton University, as a Professor and the Holder of the Computer-Aided Engineering Senior Industrial Chair established by Bell-Northern Research and the Natural Sciences and Engineering Research Council of Canada (NSERC). He is the founder of the High-Speed Computer-aided Design (CAD) Research Group, Carleton University. He serves as a technical consultant for several industrial organizations and is the principal investigator for several major sponsored research projects. He has authored or coauthored more than 300 peer-reviewed papers, two books, six multimedia books on signal integrity, and seven chapters in different books. His research interests include modeling and simulation of high-speed circuits and interconnects, nonlinear circuits, RF and microwave circuits, parallel processing, multidisciplinary optimization, and neural networks. Dr. Nakhla serves on various international committees, including the Standing Committee, IEEE International Signal Propagation on Interconnects Workshop (SPI), the Technical Program Committee, IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS), the Technical Program Committee, IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), and the CAD Committee (MTT-1), IEEE MTT-S. He is an associate editor for the IEEE TRANSACTIONS ON ADVANCED PACKAGING and the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. He has also served as a member of many Canadian and international government-sponsored research grants selection panels.

Ramachandra Achar (S’95–M’00–SM’04) received the B. Eng. degree in electronics engineering from Bangalore University, Bangalore, India in 1990, the M. Eng. degree in microelectronics from the Birla Institute of Technology and Science, Pilani, India, in 1992, and the Ph.D. degree from Carleton University, Ottawa, ON, Canada, in 1998. He is currently a Professor with the Department of Electronics Engineering, Carleton University. Prior to joining the faculty of Carleton University in 2000, he worked in various capacities with leading research laboratories, including the T. J. Watson Research Center, IBM, Yorktown Heights, NY (1995), Larsen and Toubro Engineers Ltd., Mysore, India (1992), Central Electronics Engineering Research Institute, Pilani, India (1992), and the Indian Institute of Science, Bangalore, India (1990). He is a consultant for several leading industries focused on high-frequency circuits, systems, and tools. He has authored or coauthored over 180 peer-reviewed papers in international transactions/conferences, six multimedia books on signal integrity, and five chapters in different books. His research interests include signal/power integrity analysis, circuit simulation, parallel and numerical algorithms, electromagnetic compatibility (EMC)/electromagnetic interference

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(EMI) analysis, microwave/RF algorithms, modeling/simulation methodologies for sustainable and renewable energy, and mixed-domain analysis. Dr. Achar is a practicing Professional Engineer of the Province of Ontario. He is a Distinguished Lecturer (DLP) of the IEEE Circuits and Systems Society (CASS). He was the general co-chair of the IEEE International Conference on Electrical Performance of Electronic Packages and Systems (EPEPS-2010, 2011). He was International Guest Faculty (on the invitation of the Department of Information Technology, the Government of India) under the SMDP-II Program. He also currently serves on the Executive/Steering/Technical-Program Committees of several leading IEEE international conferences, such as EPEPS, EDAPS, ECTC, SPI, ASP-DAC, etc., and on the Technical Committees of EDMS (TC-12 of CPMT) and CAD (MTT-1). He is a founding faculty

member of the Canada–India Center of Excellence, a member of the Canadian Standards Committee on Nanotechnology and chair of the joint chapters of the CAS/EDS/SSC Societies of the IEEE Ottawa Section. He was the recipient of several prestigious awards, including the Carleton University Research Achievement Award (2010 and 2004), the Natural Science and Engineering Research Council of Canada (NSERC) Doctoral Medal (2000), the University Medal for outstanding doctoral work (1998), the Strategic Microelectronics Corporation (SMC) Award (1997) and the Canadian Microelectronics Corporation (CMC) Award (1996). He was also a corecipient of the IEEE Advanced Packaging Best Transactions Paper Award (2007). His students have also been the recipients of numerous Best Student Paper Awards in international forums.

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Formal Expression of Sensitivity and Energy Relationship in the Context of the Coupling Matrix Monica Martinez-Mendoza, Member, IEEE, Fabien Seyfert, Christoph Ernst, Member, IEEE, and Alejandro Alvarez-Melcon, Senior Member, IEEE

Abstract—Precise formulas to express the formal relationship between the time average stored energy in the resonators of a lowpass filter network and the sensitivity of the reflection -parameter with respect to the coupling matrix terms are demonstrated in this paper, considering the normalized frequency axis. These relationships are found in the modern context of the coupling matrix, and for both diagonal and general nondiagonal coupling elements of the matrix. The results are valid for any type of coucoupling matrix. Different pling topology represented by the examples are included as validation. Furthermore, important implications and applications derived from the new relationships are highlighted. Index Terms—Bandpass filters, resonator filters, sensitivity, tolerance analysis.

I. INTRODUCTION

T

HE relationship between the stored energy in the elements of an LC N-port network and the sensitivity of the -parameters with respect to each or element was first discussed in [1]. In that paper, the sensitivity was defined as the variation of the -parameters with respect to independent variations in the L or C elements of the network under evaluation. Later, coupling matrices representing low-pass filter networks became fashionable and started to be widely used. The coupling matrix concept was first introduced by Atia and Williams [2] in the early 1970s, where it was applied to symmetric waveguide filters. The representation of microwave filters in matrix form is especially useful because it provides a very precise model of the network and simultaneously allows to operate on the coupling matrix in a very simple way. These operations may be useful to simplify the synthesis process, to simulate complex networks in a simpler way, or to reconfigure Manuscript received April 27, 2012; revised August 23, 2012; accepted August 24, 2012. Date of publication September 24, 2012; date of current version October 29, 2012. This work was supported in part by the Spanish Ministry under Research Project TEC2010- 21520-C04-04, by the European FEDER funds, and by the European Space Agency (ESA) under Networking Partnering through Initiative 22736/09/NL/GLC. M. Martinez-Mendoza and A. Alvarez-Melcon are with Information Technologies, Technical University of Cartagena, Cartagena E-30202, Spain (e-mail: [email protected]; [email protected]). F. Seyfert is with the Institut National de Recherche en Informatique et en Automatique (INRIA), 06560 Sophia-Antipolis, France (e-mail: [email protected]). C. Ernst is with the Microwave and Millimetre-Wave Section (TEC-ETM), European Space Technology and Research Centre (ESA/ESTEC), 2201 AZ Noordwijk, The Netherlands (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2216286

the filter topology into another configuration more suitable for the specific practical implementation. Another advantage of the coupling matrix is that it represents some of the real physical properties of the circuit elements. Each coupling matrix element is related to a specific circuit element in the final prototype. The nondiagonal matrix elements represent the couplings between the resonators of the network, and their values provide information about the magnitude of these couplings. On the other hand, the diagonal coupling elements are related to the differences in the resonant frequencies of the resonators with respect to the center frequency of the filter. matrices, where Although the initial matrices were is the order of the filter, coupling matrix forms were incoupling matrix form troduced some years later [3]. The includes information about the input and the output port, and is widely used in the microwave community since it presents sevmatrix form. Among eral advantages with respect to the these advantages are the possibility to implement fully canonical filters with a nonzero direct coupling term, and the possibility to include frequency invariant reactance (FIR) elements in the network, allowing to synthesize symmetric or asymmetric responses. Although the coupling matrix can be a representation of an LC network in certain cases (synchronously tuned filters), it is important to highlight that there is no direct equivalence between the variation of an element in an LC network and the coupling matrix. There variation of an element in the are two reasons for this observation. First, a coupling is related is varied, two to two resonators, thereby if a coupling term elements are being affected in the LC network represented by the coupling matrix. Second, the LC network presented in [1] does not consider the possibility to include FIR elements. Thereby, a variation in a FIR element, which is expressed as a variation , cannot be translated into the in a diagonal coupling term variation of an element of the LC network with no FIR elements. In this context, although there is no direct equivalence between isolated variations in L or C elements and variations in and , a close relationship the coupling matrix terms between the stored energy in the elements of the network and the sensitivity of the reflection -parameter with respect to the coupling matrix was already nodiagonal elements of the ticed in [4]–[6]. Nevertheless, precise formulas to express this relationship were not known and the obtained results were just based on observations at that time. This paper presents precise formulas to express the formal relationship between the time average stored energy in the resonators of a low-pass filter network, and the sensitivity of the

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From this we compute the -parameters as

(3)

Fig. 1. General low-pass circuit related to the coupling matrix framework (for simpler notations, the capacitors have been numbered and ending with ). starting with

where a similar notation as in [7] and [8] has been used, and is the th element of the solution vector of the system shown in (2), when the excitation is placed in the th element of the excitation vector . If we set , some differential calculus yields for the sensitivities

reflection -parameter with respect to the coupling matrix terms considering the normalized frequency axis. Sensitivity in the real passband domain can be obtained by using the standard low-pass to bandpass transformation. These relationships are found in the modern context of the coupling matrix, and for both diagonal and general nondiagonal coupling elements of the coupling matrix. It is important to remark that the obtained results are based on the coupling matrix, thus they are only valid for transfer functions fulfilling the narrowband approximation. Different examples will be used to illustrate the implications and to highlight applications derived from the novel relationships. II. SENSITIVITY OF THE -PARAMETERS In this section, following the same ideas as [7] and [8], we derive formulas for the sensitivities of the -parameters with respect to the couplings. The low-pass circuit we consider is detailed in Fig. 1: all nondiagonal couplings are here frequency invariant admittance inverters (FIR), the diagonal ones constant susceptances modeling the frequency shift of each resonator (i.e., the FIR elements mentioned previously), the input and output loads, as well as all capacitors are normalized to one. At a given frequency , we define the sensitivity of the scattering parameter with respect to as (1) The nodal equations ruling the behavior of the circuit in Fig. 1 are expressed in terms of the voltage vector as follows: (2) where • : admittance matrix with all elements 0, except for and ; size ; • : identity matrix up to and ; size ; • : coupling matrix; size ; • is the voltage vector, and is the excitation vector; • by definition.

(4)

(5) (6) (7) Latter formulas are, up to sign changes, equivalent to those found in [8] where a dual circuit based on impedance inverters and inductive series resonators was implicitly used. III. RELATIONSHIP BETWEEN SENSITIVITIES AND REACTIVE ENERGY In this section, we come to the main goal of this paper, namely, the derivation of relationships between sensitivities and the reactive energy stored in the resonators. We suppose that the network is excited by only one source at a time. When source is active (i.e., ), we define the generic parameter , while when source is active (i.e., ), we define in a similar manner . Depending on which voltage is considered, these quantities have different physical interpretations. • For , the expression represents the average reactive energy stored in capacitor . • For , the expression represents the average power dissipated in the unit admittance at the access ports. After some manipulations, we find (8) (9) (10) (11)

MARTINEZ-MENDOZA et al.: FORMAL EXPRESSION OF SENSITIVITY AND ENERGY RELATIONSHIP IN CONTEXT OF COUPLING MATRIX

where is the amplitude of the incident wave. Equation (9) is obtained from the definition of and the circuital equation (2), and (11) is a direct consequence of (4). We obtain in the same manner the relation between and the sensitivity of . For the remainder of this paper, we will suppose that the input powers are normalized to 1 W, which yields the following normalized equations:

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computed from its edge port parameters, here the -parameters. Precisely we have (see [1], [9], and [10])

(19)

(12) (20) (13) Combining (12) and (13) with (5)–(7) completes the correspondence between sensitivities (in fact, their modulus) and the reactive stored energies (or dissipated power at the loads)

(14) (15) (16)

IV. IMPLICATIONS AND APPLICATIONS An important implication of the equations derived in Section III is to yield bounds on the sensitivities in terms of physical quantities: the reactive stored energies for or dissipated powers for . To handle the sensitivity of the modulus of with respect to diagonal couplings (away from reflection zeros) remark that

(17) which yields (18) This is an important result since it shows that the time average stored energy of a resonator is a maximum boundary of the sensitivity of the -parameter. Thus, the time average stored energy in the resonators of a filter can be used to predict a maximum deviation in the reflection parameter of the filter for a specific manufacturing tolerance affecting the resonator dimensions. This was already intuitively noticed in [4] and [5], but a mathematical proof was not available at that time. Another interesting interpretation cast some light on the global structure of the sensitivity parameters. The reactive energy derives from an energy function verifying the edge port conservation rule, provided the considered network is lossless: the total reactive energy of a lossless network can therefore be

and both expressions are equal to the group delay for auto-reciprocal characteristics . In view of (12) and (13), this shows that and the global sensitivities, i.e., , depend only on the filter response. In particular, they do not depend on the coupling matrix topology chosen to realize the filter. In other words, the filtering characteristic sets the global sensitivity, whereas the repartition of the latter in each single resonator is driven by the coupling topology. Equations (12)–(16) reveal that coupling schemes with an equally distributed time average stored energy among the resonators will exhibit a lower sensitivity boundary of the reflection -parameters. In this sense, studies targeted to equally distribute the time average stored energy in the resonators of a filter with the aim of improving the power-handling capability of the structure [11], [12] can be employed to find structures with low sensitivity. V. VALIDATION AND REMARKS In this section, the results previously derived will be illustrated through several simple examples. The examples will deal with different transfer functions and different filter topologies. The first objective of this study is to show the coincidence between the absolute value of the reflection -parameter variation with respect to diagonal coupling matrix elements and the time average stored energy in the resonators related to that diagonal elements. In order to do this, a second-order Chebyshev transfer function with 25-dB return losses has been synthesized. The transfer function is labeled as in Fig. 2. If the filter network representing is synthesized into an inline configuration [see Fig. 3(a)], the coupling matrix results as follows: (21)

On the other hand, if the filter network representing is synthesized into a transversal configuration [see Fig. 3(b)], the coupling matrix results as follows: (22)

The time average stored energy in the resonators of the inline and the transversal networks, as well as the absolute value of the reflection -parameter variation with respect to diagonal

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Fig. 2. Second-order Chebyshev transfer function without finite transmission and with one transmission zero above the passband . zeros

Fig. 3. Filter topologies. (a) Inline. (b) Transversal. (c) Extended Box.

Fig. 5. Absolute value of the variation with respect to each diagonal couand time average stored energy (measured pling matrix element . Transfer function (seeFig. 2) in joules) in its associated resonator in transversal configuration [see Fig. 3(b)].

average stored energy in its associated resonator are exactly equal. As stated by (19), the total stored energy is the same in both topologies (see Figs. 4 and 5). This total energy is, however, better balanced between resonators in the inline topology as compared to the transversal one. The maximal sensitivity (across all diagonal couplings) is, therefore, for most frequencies, lower in the inline topology. The second target is to show that the total sensitivity of with respect to the diagonal coupling matrix terms is different for different transfer functions, independently of their filter topology. Note that the total sensitivity of with respect to the diagonal coupling matrix terms equals the sum of the stored energy in the resonators of the networks, which is known to be constant for a given transfer function [11], [12]. A different transfer function to the one used in the previous examples (see in Fig. 2) have been synthesized in a transversal configuration. This new transfer function exhibits a transmission zero at rad/s, and presents 25 dB of return losses. It is labeled as in Fig. 2, and its coupling matrix results

(23)

Fig. 4. Absolute value of the variation with respect to each diagonal couand time average stored energy (measured pling matrix element . Transfer function (see Fig. 2) in joules) in its associated resonator in inline configuration [see Fig. 3(a)].

coupling matrix elements and , are shown in Figs. 4 (inline topology) and 5 (transversal topology). As predicted by (12), Figs. 4 and 5 show that the sensitivity of with respect to each diagonal coupling matrix element and the time

The total sensitivity of with respect to the diagonal coupling matrix terms for both transfer functions and of Fig. 2 is shown in Fig. 6. Note that the total sensitivity with respect to diagonal terms equals the total time averaged stored energy in the network, and thus it also equals the group delay of the transfer function under study if the available power is [11], [12]. It is known that the time averaged stored energy in a network changes if the transfer function represented by the network is changed. Thus, it is expected that the total sensitivity of with respect to

MARTINEZ-MENDOZA et al.: FORMAL EXPRESSION OF SENSITIVITY AND ENERGY RELATIONSHIP IN CONTEXT OF COUPLING MATRIX

Fig. 6. Total sensitivity of with respect to the diagonal coupling matrix and shown in Fig. 2. terms for

Fig. 7. Sensitivity of for transfer function

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Fig. 8. Sixth-order Chebyshev transfer function with two asymmetric finite transmission zeros below the passband.

with respect to the general coupling matrix elements of Fig. 2 in inline and transversal configurations.

the diagonal coupling matrix terms varies for different transfer functions. As expected, we notice that the sensitivity of is clearly higher than the sensitivity of in the frequency range of the passband closer to the transmission zero of , but lower in the other region. The next target is to show that the sum of the coupling sensitivities is different for different topologies implementing the same transfer function. In order to do that, the total sensitivity of with respect to the general coupling matrix elements (nondiagonal) for of Fig. 2 implemented in inline and transversal configurations is shown in Fig. 7. It is observed that both traces are different, the total sensitivity with respect to the couplings in the transversal network being larger. This was intuitively expected since the number of couplings in both topologies is different (the transversal topology implements four main couplings, whereas the inline topology is formed with just three main couplings). To sum up, when including couplings in the global sensitivity, the sensitivity becomes dependant on the topology. Besides, there is no longer equality with the group delay, although an upper bound involving the group delay could still be computed for each specific topology.

Fig. 9. Stored energies for second to forth resonator, and for both, solution and solution .

Note that the sensitivity of with respect to the individual general coupling matrix elements for transfer function of Fig. 2 in inline and transversal configurations are also plotted in Fig. 7. Similar plots have been obtained from the time average stored energy and the dissipated power in the ports by applying (14)–(16), although they are not included in Fig. 7 because exactly the same results are obtained. Finally, the last target is to compare the sensitivities of two different implementations of the same transfer function with the same topology. This will allow to choose the best coupling matrix from the point of view of optimum sensitivities during a practical implementation of a filter. In order to compare two different implementations of the same transfer function with the same topology, the sixth-order transfer function shown in Fig. 8 will be synthesized. The selected topology is the extended box [see Fig. 3(c)]. The extended box filter configuration was introduced in [13], and it is known

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to have several solutions for a given coupling matrix synthesis problem [14]. This offers some flexibility in order to select the solution with the best sensitivity behavior. Two different coupling matrices and , shown at the top of this page, have been synthesized using the software package Dedale-HF [15]. Fig. 9 shows, for both solutions, the stored energy parameters with respect to the normalized frequency ( and are the same for both solutions; hence, they are not plotted). It is observed that the solution is extremely sensitive with respect to the resonant frequency of the second resonator, and this on the lower border of the passband (see in Fig. 9). This is confirmed by the value of its frequency shift , which indicates that resonator 2 is heavily de-tuned with respect to the central frequency. It suggests that solution achieves a better balance of the total stored energy here. This, in turn, will result, as shown in this paper, in a lower global maximum sensitivity, obtained here in both solutions for the element around . Due to the equation (14) solution, will also outperform when considering maximal sensitivities (e.g., over the frequency range ) with respect to the couplings and . Of course, due to the invariance of , the solution performs “better” than when looking at the sensitivities related to the fourth and fifth resonators. VI. CONCLUSION Precise formulas to express the formal relationship between the time average stored energy in the resonators of a low-pass filter network and the sensitivity of the reflection -parameter with respect to the coupling matrix terms have been presented in this paper. The relationships have been described in the modern context of the coupling matrix for both diagonal and general coupling elements of the matrix. Furthermore, important implications have been derived from the new relationships found in this paper, allowing to establish maximum sensitivity boundaries. The latter were obtained from energy considerations for the special case of the classical low-pass

prototype, yielding some insight about how to perform practically with the computation of the reactive energies. Another, but more abstract way to go is certainly to extend, in all generality, Kishi’s energy theory to networks with constant inverters and FIR elements. REFERENCES [1] G. Kishi and T. Kida, “Energy theory of sensitivity in lcr networks,” IEEE Trans. Circuit Theory, vol. CT-14, no. 4, pp. 380–386, Dec. 1967. [2] A. Atia and A. Williams, “Narrow-bandpass waveguide filters,” IEEE Trans. Microw. Theory Techn., vol. MTT-20, no. 4, pp. 258–265, Apr. 1972. [3] R. J. Cameron, “Advanced coupling matrix synthesis techniques for microwave filters,” IEEE Trans. Microw. Theory Techn., vol. 51, no. 1, pp. 1–10, Jan. 2003. [4] M. Martínez-Mendoza, A. Álvarez-Melcón, and C. Ersnt, “Investigation of the relationship between sensitivity and stored energy,” in 40th Eur. Microw. Conf., Paris, France, Oct. 26–Sep. 1, 2010, pp. 970–973, IEEE. [5] M. Martínez-Mendoza, J. A. Lorente, C. Ersnt, and A. Álvarez-Melcón, “Prediction of fabrication yield from low-pass prototype in a butterworth direct-coupled cavity filter,” in 41st Eur. Microw. Conf., Manchester, U.K., Oct. 9–14, 2011, pp. 736–739. [6] M. Martínez-Mendoza, C. Ersnt, J. A. Lorente, A. Álvarez-Melcón, and F. Seyfert, “On the relation between stored energy and fabrication tolerances in microwave filters,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 7, pp. 2131–2141, Jul. 2012. [7] S. Amari, “Sensitivity analysis of coupled resonator filters,” IEEE Circuits Syst. II, Analog Digit. Signal Process., vol. 47, pp. 1017–1022, Oct. 2000. [8] S. Amari and U. Rosenberg, “On the sensitivity of coupled resonator filters without some direct couplings,” IEEE Trans. Microw. Theory Techn., vol. 51, no. 6, pp. 1767–1773, Jun. 2003. [9] G. Kishi and K. Nakazawa, “Relations between reactive energy and group delay in lumped-constant networks,” IEEE Trans. Circuit Theory, vol. CT-10, no. 1, pp. 67–71, Mar. 1963. [10] C. Ernst, V. Postoyalko, and N. Khan, “Relationship between group delay and stored energy in microwave filters,” IEEE Trans. Microw. Theory Techn., vol. 49, no. 1, pp. 192–196, Jan. 2001. [11] C. Ernst, “Energy storage in microwave cavity filter networks,” Ph.D. dissertation, School Electron. Elect. Eng., The Univ. Leeds, Leeds, U.K., 2000. [12] C. Ernst and V. Postoyalko, “Comparison of the stored energy distribution in a -type and a -type prototype with the same power transfer function,” in IEEE MTT-S Int. Microw. Symp. Dig., Anaheim, CA, Jun. 13–19, 1999, vol. 3, pp. 1339–1342.

MARTINEZ-MENDOZA et al.: FORMAL EXPRESSION OF SENSITIVITY AND ENERGY RELATIONSHIP IN CONTEXT OF COUPLING MATRIX

[13] R. J. Cameron, A. R. Harish, and C. J. Radcliffe, “Synthesis of advanced microwave filters without diagonal cross-couplings,” IEEE Trans. Microw. Theory Techn., vol. 50, no. 12, pp. 2862–2872, Dec. 2002. [14] R. J. Cameron, J.-C. Faugere, F. Rouillier, and F. Seyfert, “An exhaustive approach to the coupling matrix synthesis problem application to the design of high degree asymmetric filters,” Int. J. RF Microw. Comput.-Aided Eng. (Special Issue), vol. 17, no. 1, pp. 4–12, Jan. 2007. [15] F. Seyfert, Dedale-HF. INRIA, Sophia-Antipolis, France, 2006. [Online]. Available: www-sop.inria.fr/apics/Dedale/

Monica Martinez-Mendoza (S’07–M’11) was born in Cartagena, Murcia, Spain, in 1983. She received the Telecommunications Engineer and Ph.D. degrees from the Technical University of Cartagena (UPCT), Cartagena, Spain, in 2006 and 2011, respectively. In 2007, she joined the Telecommunication and Electromagnetic Group, UPCT, as a Research Assistant, where she was involved in the development of novel transversal filtering structures for satellite systems. From September 2008 to August 2009, she was a Young Graduate Trainee (YGT) with the European Space Agency (ESA), European Space Research and Technology Centre (ESTEC), Noordwijk, The Netherlands, during which time her research was focused on microwave filter theory. From November 2011 to June 2012, she was with the Institute of Telecommunications and Multimedia Applications (iTEAM), Technical University of Valencia (UPV), Valencia, Spain, where she was involved with multiplexers synthesis and design. Her scientific interests include the analysis and design of microwave filters and multiplexers with innovative technologies. Dr. Martinez-Mendoza earned the doctoral degree under the ESA Networking Partnering Initiative. She was the recipient of a postdoctoral Humboldt Research Fellowship to work at the Ferdinand-Braun-Institut, Berlin, Germany.

Fabien Seyfert received the Engineering degree from the Ecole Superieure des Mines de St. Etienne, St. Etienne, France, in 1993, and the Ph.D. degree in mathematics from the Ecole Superierure des Mines de Paris, Paris, France, in 1998. From 1998 to 2001, he was with Siemens, Munich, Germany, as a Researcher specializing in discrete and continuous optimization methods. Since 2002, he has been a Researcher with the Institut National de Recherche en Informatique et en Automatique (INRIA), Sophia-Antipolis, France. His research interests are focused on the development of efficient mathematical procedures

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and associated software for signal processing, including computer-aided techniques for the design and tuning of microwave devices.

Christoph Ernst (M’96) received the Dipl.-Ing. degree in electrical engineering from the University of Dortmund, Dortmund, Germany, in 1996, and the Ph.D. degree from The University of Leeds, Leeds, U.K. in 2001. As a Member of Staff with the European Space Agency (ESA), European Space Research and Technology Centre (ESTEC), Noordwijk, The Netherlands, he actively evaluates, initiates, and manages activities in the field of passive hardware for satellite-based systems from concept to product development in addition to providing support to ESA satellite projects. His research interests include novel RF and microwave techniques and technologies and the design of novel microwave passive hardware, in particular microwave filter networks.

Alejandro Alvarez-Melcon (M’99–SM’07) was born in Madrid, Spain, in 1965. He received the Telecommunications Engineer degree from the Technical University of Madrid (UPM), Madrid, Spain, in 1991, and the Ph.D. degree in electrical engineering from the Swiss Federal Institute of Technology, Lausanne, Switzerland, in 1998. In 1988, he joined the Signal, Systems and Radiocommunications Department, UPM, as a Research Student, where he was involved in the design, testing, and measurement of broadband spiral antennas for electromagnetic measurements support (EMS) equipment. From 1991 to 1993, he was with the Radio Frequency Systems Division, European Space Agency (ESA), European Space Research and Technology Centre (ESTEC), Noordwijk, The Netherlands, where he was involved in the development of analytical and numerical tools for the study of waveguide discontinuities, planar transmission lines, and microwave filters. From 1993 to 1995, he was with the Space Division, Industry Alcatel Espacio, Madrid, Spain, and was also with ESA, where he collaborated in several ESA/ESTEC contracts. From 1995 to 1999, he was with the Swiss Federal Institute of Technology, École Polytechnique Fédérale de Lausanne (EPFL), Lausanne, Switzerland, where he was involved in the field of microstrip antennas and printed circuits for space applications. In 2000, he joined the Technical University of Cartagena, Cartagena, Spain, where he currently develops his teaching and research activities. Dr. Alvarez Melcón was the recipient of the Journée Internationales de Nice Sur les Antennes (JINA) Best Paper Award for the best contribution to the JINA’98 International Symposium on Antennas, and the Colegio Oficial de Ingenieros de Telecomunicación (COIT/AEIT) Award for the best Ph.D. thesis in basic information and communication technologies.

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A High Slow-Wave Factor Microstrip Structure With Simple Design Formulas and Its Application to Microwave Circuit Design Wei-Shin Chang and Chi-Yang Chang, Member, IEEE

Abstract—This paper proposes a new microstrip slow-wave structure. The unit cell comprises a Schiffman section of meander line and a shunt open-circuited stub. No via-holes and ground-plane patterns are required. Simple design formulas can be used to obtain line parameters, such as the characteristic impedance and phase velocity. According to the analysis, the characteristic impedance and slow-wave factor of the proposed slow-wave line can be independently controlled by merely two layout parameters. The proposed uniplanar structure only requires a single-layer substrate and is simply constructed using the conventional printed circuit board manufacturing process. A branch-line and a rat-race coupler were designed and fabricated using the proposed structure to demonstrate its feasibility. Their sizes are only 8.49% and 4.87% of the conventional ones, respectively. This novel slow-wave structure should find wide applications in compact microwave circuits.

TABLE I COMPARISON OF MICROSTRIP SLOW-WAVE STRUCTURES

Index Terms—Branch-line coupler, microstrip line, periodic structure, rat-race coupler, slow-wave structure.

I. INTRODUCTION

A

MICROSTRIP line plays an important role in microwave circuits since it can be fabricated by photolithographic processes and is easily integrated with passive and active microwave devices. The length of the conventional microstrip line is dominated by the dielectric constant [1] so that the circuit constructed by the conventional microstrip line cannot reduce the phase velocity less than of the free-space light velocity. Therefore, the circuit may occupy a large area, which results in a serious problem for miniaturization. To reduce the circuit size, the high dielectric-constant substrate may be employed. Slow-wave guiding structures have been extensively studied to reduce the circuit size [2]–[20]. The mechanism behind the slow-wave propagation is to separately store the electric and magnetic energies as much as possible in the guided-wave media. Among these structures, this paper focuses on the microstrip slow-wave structures where the conductor-backed ground plane is required. For the microstrip line, slow-wave Manuscript received March 25, 2012; revised August 14, 2012; accepted August 20, 2012. Date of publication September 20, 2012; date of current version October 29, 2012. This work was supported in part by the National Science Council (NSC), Taiwan, under Grant NSC 99-2221-E-009-050-MY3. The authors are with the Institute of Communications Engineering, National Chiao Tung University, Hsinchu 300, Taiwan (e-mail: aa494412338@hotmail. com; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2216282

structures can be constructed in multilayer substrates [6]–[8]. However, to simplify the fabrication process and to maintain the low cost, the slow-wave structures with only a single-layer substrate are more preferable [9]–[20]. They can be realized on a single-layer substrate with a periodic dielectric constant [9], or they have the periodic perturbations on the signal and ground planes [10]–[20]. Nonetheless, they may not have a simple and efficient synthesis method so that the try and error procedure would be necessary for the prescribed characteristic impedance and slow-wave factor. In addition, the substrate of some structures may be required to be suspended due to the defected ground plane. In [19], we propose a slow-wave transmission line with the signal strips and the inserted ground strips periodically loaded in the internal part of the conventional microstrip line. It has a simple structure and a higher slow-wave factor compared to the previous studies. However, the adjustment of the dimensional parameters in this structure influences the characteristic impedance and the slow-wave factor simultaneously so that the control of these two parameters would not be straightforward. In addition, it may be difficult or impossible to drill many via-holes in a small region due to fabrication tolerances and substrate intensity. Table I compares several microstrip slow-wave structures. In this paper, we propose a novel slow-wave microstrip structure that comprises a Schiffman section of meander line and a shunt open-circuited stub. Its dimensions are easily synthesized for the prescribed characteristic impedance and slow-wave factor. In other words, the characteristic impedance and the slow-wave factor can be controlled individually, which solves the problem mentioned above. The proposed slow-wave

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characterized by the characteristic impedance agation constant as follows [21]:

and the prop-

(1) (2) and are the total inductance and capacitance of the where unit cell, respectively. The idea behind the proposed slow-wave structure is that the inductance is mainly attributed to the high-impedance meander line (i.e., ), and the capacitance is primarily controlled by the shunt open-circuited stub (i.e., ). As a result, we can choose as high as possible first and then determine according to . Furthermore, in practical calculations, all inductances and capacitances associated with the meander line portion and the shunt stub portion should be taken into account in each unit cell. In applications, is usually long to obtain large capacitance, and the coupling is small for wide coupled lines. Thus, in the following discussion, for simplicity, we ignore the coupling between the meander line and the shunt open-circuited stub and the influence of the T-junction effect. First, consider the high-impedance meander line in the unit cell, as shown in Fig. 1(b). The configuration of the meander line can be regarded as the parallel coupled lines where one end is connected, which forms a Schiffman section. For fixed and , the image impedance and phase constant of a Schiffman section are given by [22] (3) Fig. 1. (a) Proposed slow-wave microstrip structure. (b) Meander line portion : characteristic impedance of the miand its equivalent lumped elements. . (c) Open-circuited stub and its equivalent lumped crostrip line with a width and : characteristic impedances of the microstrip line with elements. widths and , respectively.

line has an extremely low fabrication cost due to the conventional single-layer printed circuit board (PCB) process without via-holes and ground-plane patterns. The design equations and characteristics of the proposed slow-wave structure are examined in detail. Finally, we design a branch-line and a rat-race coupler using the proposed transmission line to demonstrate its applications.

(4) where and are the even- and odd-mode impedances of the parallel coupled lines, respectively. is the electrical length , of the transmission line. In the proposed unit cell, is the propagation constant of the microstrip line with where and a width . Since in the real situation , (4) is further reduced to (5) Moreover, on the basis of the Taylor-series expansion of cosine function, (4) can also be written as (6)

II. PROPOSED SLOW-WAVE STRUCTURE Fig. 1 depicts the schematic of the proposed slow-wave microstrip structure. Each unit cell consists of a meander line and a shunt open-circuited stub. The lengths of the unit cell corresponding to the meander line portion and the shunt stub portion are and , respectively, and their total transverse widths are both . Thereby, the length and width of the unit cell are and , respectively. The spacings between adjacent lines are all . The line width of a meander line is . Thus, . The characteristic impedances of the meander line with a width and the shunt stub with a width are and , respectively. The slow-wave transmission line is

The propagation constant

of a Schiffman section is (7)

Comparing (5) and (6), is proportional to , and consequently from (7), is proportional to as well as to the frequency. The inductance and the capacitance due to the meander line in the unit cell can be calculated as follows: (8)

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(9) The second part of the above two equations corresponds to the three short lines with a length in Fig. 1(b). Now, consider the shunt open-circuited stub in the unit cell, as shown in Fig. 1(c). The inductance and the capacitance due to this portion are derived as (10) (11) where and are the characteristic impedance and propagation constant, respectively, of the microstrip line with a width . and are the characteristic impedance and propagation constant, respectively, of the microstrip line with a width . Summarizing from (8)–(11), the per-unit-length inductance and capacitance in the proposed unit cell are (12) (13) It is worthwhile to discuss the proposed unit cell and the above equations in more detail. Note that the longer the length is, the smaller the characteristic impedance is. Thereby, increases based on (11). Under this condition, since is mainly determined by , will increase. is primarily controlled by , and is attributed to the meander line portion so that is almost not influenced by belonging to the shunt open-circuited stub. In summary, as becomes longer, increases and remains almost constant. Consequently, from (1), the characteristic impedance of the unit cell becomes smaller. This indicates that can be easily changed by adjusting for fixed and . Since usually , , and in practical applications, from (8)–(11), and can be simplified as follows: (14) (15) Accordingly, and are both proportional to so that from (1), remains constant as changes. Moreover, according to (2), is proportional to . These two properties are very important in the design of the proposed slow-wave line since we can control the propagation constant and the slow-wave factor by adjusting without changing . To demonstrate the property of the proposed structure, the substrate with a dielectric constant and a thickness mm is taken as an example. The electrical parameters of the microstrip line in the design equations (i.e., , , , , , , , and ) are quickly obtained by using the circuit simulator AWR Microwave Office [23]. The commercial full-wave electromagnetic (EM) simulation software Sonnet [24] is used to compare the calculated and simu-

Fig. 2. (a) Slow-wave factor, (b) characteristic impedance , and (c) perat 0.9 GHz for unit-guided wavelength loss versus total transverse width mm (35.36- case), mm (50- case), and mm (70.7- case).

lated results. In the following discussion, we fix mm (i.e., ) based on the allowable fabrication process and mm (i.e., mm). Taking the frequency at 0.9 GHz as an example, Fig. 2(a) plots the slow-wave factor defined by versus total transverse width , where is the free-space wavelength and is the guided wavelength of the proposed slow-wave line. It is seen that the proposed structure has a very high slow-wave

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Fig. 3. Characteristic impedance

versus length

for

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mm.

factor. Furthermore, the slow-wave factor increases as the width of the unit cell increases, and these two parameters are linearly proportional to each other. The results from the equations and the EM simulations are in good agreement with each other. The small discrepancy between the calculated and simulated results is mainly due to the coupling between the shunt open-circuited stub and the meander line. This is especially obvious for the mm case since the coupling is stronger for narrow coupled lines. Fig. 2(b) shows the characteristic impedance of the proposed slow-wave line versus . Apparently, as varies from 2.5 to 4 mm, the slow-wave factor increases significantly, whereas remains almost constant. This is consistent with the theoretical results. For the substrate with a loss tangent of 0.0021 in the simulation, Fig. 2(c) gives the per-unit-guided wavelength loss versus for the three slow-wave lines with different . The simulated result indicates that the loss has a small variation as changes. Fig. 3 shows the characteristic impedance versus length for mm. Apparently, the longer the length is, the smaller the characteristic impedance is, which corresponds with the above discussion. The calculated and simulated results are consistent with each other. To observe the dispersive property of the proposed structure, take the dimensions in Fig. 2 as an example. For mm, Fig. 4(a) plots the slow-wave factor versus frequency from 0.5 to 1.3 GHz, which covers more than the operating frequency range in the following circuit examples. Fig. 4(b) shows the simulated characteristic impedance versus frequency for different (i.e., different slow-wave factors). The calculated and simulated results indicate that both the slow-wave factor and the characteristic impedance remain almost constant with respect to the frequency. Again, for the substrate with a loss tangent of 0.0021 in the simulation, Fig. 4(c) gives the per-unitguided wavelength loss of the proposed slow-wave structure. At 0.9 GHz, the loss of the proposed unit cell with is approximately 0.9343 dB and decreases as the frequency increases. The proposed structure has a larger loss compared to the 50- conventional microstrip line, which is 0.4418 dB , where is the guided wavelength of the 50- conventional microstrip line on the substrate at 0.9 GHz.

Fig. 4. (a) Slow-wave factor, (b) simulated characteristic impedance , and mm, (c) per-unit-guided wavelength loss versus frequency for mm (35.36- case), mm (50- case), and mm (70.7case).

For mm as an example, Fig. 5 shows the simulated -parameters of the proposed slow-wave line consisting of five unit cells. The frequency where drops quickly corresponds to the cutoff frequency. Since the same in the three cases implies almost the same based on (14), the larger is, the smaller the characteristic impedance and the cutoff frequency are. Therefore, the structure with mm (i.e., ) has the smallest cutoff frequency among the three cases.

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Fig. 5. Simulated -parameters of the proposed structure with five unit cells mm, mm (35.36- case), mm (50- case), for mm (70.7- case). and

Fig. 6. Configuration of the proposed branch-line coupler. Circuit dimensions: mm, mm, mm, mm, mm, mm, mm, mm, mm, mm, mm, and mm.

III. APPLICATION OF THE PROPOSED SLOW-WAVE STRUCTURE To demonstrate the proposed structure, one branch-line and one rat-race coupler were designed and implemented. Both circuits were fabricated on the Rogers RO4003 substrate with a dielectric constant of 3.38, a loss tangent of 0.0021, and a thickness of 0.203 mm. The circuit simulator AWR Microwave Office [23] and the full-wave EM simulation software Sonnet [24] were used to obtain the electrical parameters in the design equations and to perform the simulation, respectively. The measurements were carried out using an Agilent 8720ES network analyzer. The design steps of the proposed unit cell are summarized as follows. Step 1) Identify the characteristic impedance and slowwave factor of the slow-wave line. Set the transverse width of the unit cell arbitrarily since this width will be adjusted for the specific slow-wave factor in Step 4). The procedure of choosing arbitrarily here has almost no effect on the calculation of in Step 3). This feature has been illustrated in Fig. 2(b). Step 2) Determine the width and spacing of the Schiffman section of meander line. Usually, for large and small area, the values of and are very small and should be limited by the allowable fabrication process. Once and are given, the even- and odd-mode impedances and of a Schiffman section can be obtained. According to (3), (4), and (7), we calculate and . Step 3) From (1) and (8)–(13), the length is available for the specific . Step 4) As mentioned earlier, the adjustment of has almost no effect on . Hence, calculate from (2) and (8)–(13) for the specific slow-wave factor. As a result, the unit cell with the prescribed and slow-wave factor is achieved. Step 5) Replace the conventional microstrip line with the designed structure. Finally, the circuit is simulated with a full-wave EM simulator to take the effects of couplings, discontinuities, and junctions into account.

Fig. 7. Photograph of the fabricated branch-line coupler.

A. Branch-Line Coupler The branch-line coupler comprises four line sections, two of which have the characteristic impedance of 35.36 , and two of which have the characteristic impedance of 50 . The proposed slow-wave structure is used to replace these four transmission lines. The slow-wave factor is chosen as 5.6 for the 35.36- and 9.2 for the 50- conventional microstrip line. First, we set mm arbitrarily. Here, mm and mm are fixed so that mm, , and . Thus, and from (3) and (4), and (7). Applying (1) and (8)–(13), the lengths of the unit cell for the shunt stub portion are obtained as mm for and mm for . From (2) and (8)–(13) with the prescribed slow-wave factor, we calculate mm for the 35.36line and mm for the 50- line. The proposed branch-line coupler was designed at the center frequency of 940 MHz. On the basis of the calculated values and after slightly fine tuning the whole circuit using the full-wave EM simulator,

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Fig. 9. Configuration of the proposed rat-race coupler. Circuit dimensions: mm, mm, mm, mm, mm, mm, mm, mm, and mm.

Fig. 8. Performance (port 1 excitation) of the branch-line coupler. (a) Simulated and measured responses. (b) Amplitude imbalance. (c) Phase imbalance.

Fig. 6 depicts the final layout of the branch-line coupler along with its physical dimensions. Fig. 7 shows the photograph of the fabricated branch-line coupler with a size of 23.025 mm 8.7 mm, which is , where is the guided wavelength of the 50- conventional microstrip line on the substrate at the center frequency. The simulated and measured performances of the branch-line coupler are given in Fig. 8. The measured and are 3.485 and 3.65 dB at the design frequency of 940 MHz, respectively. According to Fig. 8(b) and (c), from 0.83 to 1.05 GHz, the measured amplitude imbalance between and is less than 0.9 dB, and the measured phase difference is 90 1 . Over this frequency range, the measured result shows that the return loss and the isolation are better than 12.02 and 13.63 dB, respectively, corresponding to a fractional bandwidth of 23.4%. Compared to the conventional branch-line coupler, the proposed one has almost the same bandwidth and a slightly larger insertion loss. It reduces the area to 8.49% of the conventional branch-line coupler.

Fig. 10. Photograph of the fabricated rat-race coupler.

B. Rat-Race Coupler The rat-race coupler consists of one and three line sections with the characteristic impedance of 70.7 . Again, mm and mm are chosen. The slow-wave factor is 9.6 for both the and line sections. Following the same design procedure as in the previous example, the proposed rat-race coupler was designed at the center frequency of 930 MHz. Fig. 9 depicts the final physical layout and dimensions of the proposed rat-race coupler. Fig. 10 displays the photograph of the fabricated rat-race coupler. The size of the coupler is 25.05 mm 9.65 mm, which is , where is the guided wavelength of the 50- conventional microstrip line on the substrate at the center frequency. The proposed rat-race coupler has only

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Fig. 11. In-phase operation (port 1 excitation) of the rat-race coupler. (a) Simulated and measured responses. (b) Amplitude imbalance. (c) Phase imbalance.

4.87% area of the conventional one. It has almost the same bandwidth and a slightly larger insertion loss compared to the conventional rat-race coupler. For -port (port 1) excitation, Fig. 11 shows the simulated and measured results. The measured and are 3.55 and 3.32 dB at the design frequency of 930 MHz, respectively. The measured result shows that the return loss and the isolation are better than 22.8 and 24 dB from 0.84 to 1.015 GHz, respectively, corresponding to a fractional bandwidth of 18.9%. Over this frequency range, from Fig. 11(b) and (c), the measured amplitude imbalance between and is less than 0.64 dB, and the measured phase difference is less than 5 . For the signal applied to -port (port 4), the simulated and measured responses of the rat-race coupler are illustrated in Fig. 12. At the design frequency of 930 MHz, the measured is 3.65 dB, and the measured is 3.42 dB. According to the measured result, the return loss and the isolation are better than 21.5 and 24 dB from 0.84 to 1.015 GHz,

Fig. 12. Out-of-phase operation (port 4 excitation) of the rat-race coupler. (a) Simulated and measured responses. (b) Amplitude imbalance. (c) Phase imbalance.

respectively. Across this frequency band, Fig. 12(b) shows that the measured amplitude imbalance between and is less than 0.26 dB, and Fig. 12(c) indicates that the measured phase difference is between 173 and 186.4 . IV. CONCLUSION In this paper, a new type of slow-wave transmission line consisting of a Schiffman section of meander line and a shunt opencircuited stub has been presented. The proposed slow-wave line has an extremely low fabrication cost due to its single-layer, no via-hole, and no ground-plane-pattern structure. The design formulas and processes are well demonstrated to control the characteristic impedance and the slow-wave factor. Due to the flexibility and easy realization of this slow-wave structure, it has been used to design the miniaturized branch-line and ratrace couplers. Good agreement between the simulated and measured responses is observed. Therefore, the proposed slow-wave

CHANG AND CHANG: HIGH SLOW-WAVE FACTOR MICROSTRIP STRUCTURE

structure is very appropriate for compact microwave components and monolithic microwave integrated circuits (MMICs). REFERENCES [1] J. S. Hong and M. J. Lancaster, Microstrip Filters for RF/Microwave Applications. New York: Wiley, 2001. [2] L. Zhu, “Guided-wave characteristics of periodic coplanar waveguides with inductive loading-unit-length transmission parameters,” IEEE Trans. Microw. Theory Techn., vol. 51, no. 10, pp. 2133–2138, Oct. 2003. [3] T. S. D. Cheung and J. R. Long, “Shielded passive devices for siliconbased monolithic microwave and millimeter-wave integrated circuits,” IEEE J. Solid-State Circuits, vol. 41, no. 5, pp. 1183–1200, May 2006. [4] D. Kaddour, H. Issa, A. L. Franc, N. Corrao, E. Pistono, F. Podevin, J. M. Fournier, J. M. Duchamp, and P. Ferrari, “High- slow-wave coplanar transmission lines on 0.35 m CMOS process,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 9, pp. 542–544, Sep. 2009. [5] A. A. M. Ali, H. B. El-Shaarawy, and H. Aubert, “Miniaturized hybrid ring coupler using electromagnetic bandgap loaded ridge substrate integrated waveguide,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 9, pp. 471–473, Sep. 2011. [6] C. K. Wu, H. S. Wu, and C. K. C. Tzuang, “Electric–magnetic–electric slow-wave microstrip line and bandpass filter of compressed size,” IEEE Trans. Microw. Theory Techn., vol. 50, no. 8, pp. 1996–2004, Aug. 2002. [7] Y. Yun, “A novel microstrip-line structure employing a periodically perforated ground metal and its application to highly miniaturized and low-impedance passive components fabricated on GaAs MMIC,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 6, pp. 1951–1959, Jun. 2005. [8] Y. Zhang and H. Y. D. Yang, “Ultra slow-wave periodic transmission line using 3-D substrate metallization,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2008, pp. 891–894. [9] S. K. Srivastava and S. P. Ojha, “Reflection and anomalous behavior of refractive index in defect photonic bandgap structure,” Microw. Opt. Technol. Lett., vol. 38, no. 4, pp. 293–297, Aug. 2003. [10] J. S. Hong and M. J. Lancaster, “A novel microwave periodic structure-the ladder microstrip line,” Microw. Opt. Technol. Lett., vol. 9, no. 4, pp. 207–210, Jul. 1995. [11] V. Radisic, Y. Qian, R. Coccioli, and T. Itoh, “Novel 2-D photonic bandgap structure for microstrip lines,” IEEE Microw. Guided Wave Lett., vol. 8, no. 2, pp. 69–71, Feb. 1998. [12] F. R. Yang, K. P. Ma, Y. Qian, and T. Itoh, “A uniplanar compact photonic-bandgap (UC-PBG) structure and its applications for microwave circuits,” IEEE Trans. Microw. Theory Techn., vol. 47, no. 8, pp. 1509–1514, Aug. 1999. [13] C. S. Kim, J. S. Park, D. Ahn, and J. B. Lim, “A novel 1-D periodic defected ground structure for planar circuits,” IEEE Microw. Guided Wave Lett., vol. 10, no. 4, pp. 131–133, Apr. 2000. [14] Q. Xue, K. M. Shum, and C. H. Chan, “Novel 1-D microstrip PBG cells,” IEEE Microw. Guided Wave Lett., vol. 10, no. 10, pp. 403–405, Oct. 2000. [15] G. A. Lee, H. Y. Lee, and F. De Flaviis, “Perforated microstrip structure for miniaturising microwave devices,” Electron. Lett., vol. 38, no. 15, pp. 800–801, Jul. 2002.

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[16] K. W. Eccleston and S. H. M. Ong, “Compact planar microstripline branch-line and rat-race couplers,” IEEE Trans. Microw. Theory Techn., vol. 51, no. 10, pp. 2119–2125, Oct. 2003. [17] K. O. Sun, S. J. Ho, C. C. Yen, and D. van der Weide, “A compact branch-line coupler using discontinuous microstrip lines,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 8, pp. 519–520, Aug. 2005. [18] J. Wang, B. Z. Wang, Y. X. Guo, L. C. Ong, and S. Xiao, “A compact slow-wave microstrip branch-line coupler with high performance,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 7, pp. 501–503, Jul. 2007. [19] W. S. Chang and C. Y. Chang, “Novel microstrip periodic structure and its application to microwave filter design,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 3, pp. 124–126, Mar. 2011. [20] J. Q. Huang, Q. X. Chu, and H. Z. Yu, “A mixed-lattice slow-wave transmission line,” IEEE Microw. Wireless Compon. Lett., vol. 22, no. 1, pp. 13–15, Jan. 2012. [21] R. E. Collin, Foundations for Microwave Engineering, 2nd ed. New York: McGraw-Hill, 1992. [22] B. M. Schiffman, “A new class of broadband microwave 90-degree phase shifters,” IRE Trans. Microw. Theory Techn., vol. MTT-6, no. 4, pp. 232–237, Apr. 1958. [23] “Reference Guide Microwave Office,” AWR, El Segundo, CA, 2003. [24] “EM User’s Manual,” Sonnet Softw. Inc., Liverpool, NY, 2004. Wei-Shin Chang was born in Taipei, Taiwan, on September 15, 1986. She received the B.S. degree in physics from National Taiwan Normal University, Taipei, Taiwan, in 2009, and is currently working toward the Ph.D. degree in communication engineering at National Chiao-Tung University, Hsinchu, Taiwan. Her research interests include the analysis and design of periodic structures and microwave circuits.

Chi-Yang Chang (M’95) was born in Taipei, Taiwan, on December 20, 1954. He received the B.S. degree in physics and M.S. degree in electrical engineering from National Taiwan University, Taipei, Taiwan, in 1977 and 1982, respectively, and the Ph.D. degree in electrical engineering from The University of Texas at Austin, in 1990. From 1990 to 1995, he was an Associate Researcher with the Chung-Shan Institute of Science and Technology (CSIST), where he was in charge of the development of uniplanar circuits, ultra-broadband circuits, and millimeter-wave planar circuits. In 1995, he joined the faculty of the Department of Communication Engineering (since 2009, Department Electrical Engineering), National Chiao-Tung University, Hsinchu, Taiwan, as an Associate Professor, and in 2002, became a Professor. His research interests include microwave and millimeter-wave passive and active circuit design, planar miniaturized filter design, and monolithic-microwave integrated-circuit (MMIC) design.

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Design of Transmission-Type th-Order Differentiators in Planar Microwave Technology Magdalena Chudzik, Student Member, IEEE, Israel Arnedo, Member, IEEE, Aintzane Lujambio, Student Member, IEEE, Ivan Arregui, Member, IEEE, Ion Gardeta, Fernando Teberio, José Azaña, Member, IEEE, David Benito, Miguel A. G. Laso, Member, IEEE, and Txema Lopetegi, Member, IEEE

Abstract—In this paper, we propose and demonstrate a new technique for the design of arbitrary-order differentiators, intended for ultra-wideband (UWB) applications in microwave coupled-line technology. The technique employs an exact analytical series solution for the synthesis problem derived by the authors from the coupled-mode theory. This solution allows for the synthesis of microwave devices with arbitrary frequency responses, only limited by the principles of causality, passivity, and stability. The method has been successfully applied in the past to the design of two-port waveguide and transmission-line components operating in a reflection-type configuration. Here, the synthesis technique is extended to coupled-line structures, where the input port is matched at all frequencies and the reflected signal is redirected to the coupled port, enabling an effective transmission-type operation for the device. First-, second-, third-, and fourth-order UWB differentiators have been successfully designed, fabricated, and measured, validating the general design technique proposed. Index Terms—Circuit synthesis, coupled lines, coupled-mode theory, microstrip technology, microwave differentiators, ultra-wideband (UWB).

I. INTRODUCTION

A

N th-order differentiator is a device that performs the mathematical operation of differentiation providing as an output signal the th derivative of an arbitrary input signal in the time domain. The differentiation operation can be used directly in signal peak detection and in positive-going or negative-going slope recognition. Besides, differentiators have been used extensively in several areas such as signal processing or pulse generation [1]–[20]. Particularly, they constitute an important element in the analysis of signals in radar and sonar systems [1], in the processing of biomedical or biomechanical data [2], and in the calculation of geometrical parameters in image processing [3]. Manuscript received March 14, 2012; revised August 04, 2012; accepted August 07, 2012. Date of publication September 14, 2012; date of current version October 29, 2012. This work was supported by the Spanish Ministerio de Ciencia e Innovación under Project TEC2011-28664-C02-01. The work of M. Chudzik was supported by the Spanish Ministerio de Educación under a Formación de Profesorado Universitario (FPU) Grant. M. Chudzik, I. Arnedo, A. Lujambio, I. Arregui, I. Gardeta, F. Teberio, D. Benito, M. A. G. Laso, and T. Lopetegi are with the Electrical and Electronic Engineering Department, Public University of Navarre, 31006 Pamplona, Navarre, Spain (e-mail: [email protected]). J. Azaña is with the Institut National de la Recherche Scientifique-Energie, Matériaux et Télécommunications (INRS-EMT), Montréal, QC, Canada H5A 1K6. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2214398

Moreover, they play a significant role in reconfigurable pulse shapers [4] and in photonic-based microwave waveform generators [5]. Several strategies to perform the differentiation operation are summarized below, taking into consideration the frequency range and operational bandwidth. An elementary differentiator circuit proposed for analog electronics consists of an RC network in conjunction with an operational amplifier, where the current flowing through the capacitor is proportional to the derivative of the voltage across the capacitor [6]. The use of an operational amplifier in the design leads to the fact that this solution is restricted to low-frequency signals. Higher frequencies of operation have been achieved using digital techniques. For instance, a second-order recursive digital differentiator was obtained by inverting the transfer functions of integrators and stabilizing them [7]. Furthermore, a closed-form method for the design of higher order digital differentiators using an eigenfilter approach was proposed [8]. Although a good performance has been obtained, digital differentiators are, in general, limited by the operational frequency and bandwidth, which results from the maximum achievable sampling frequency. A wider bandwidth solution can be achieved by using optical devices. A relevant number of studies have been presented to perform differentiation of signals in the optical domain, where integrated-optic transversal filter topologies [9], concatenated bulk-optics interferometers [10], and all-fiber approaches based on fiber gratings [11]–[13] must be remarked. An important body of recent work concerns the specific use of photonic technologies for differentiation of microwave waveforms [14]–[16]. Photonic components offer broadband operation; however, their integration with microwave devices remains troublesome. Taking into account the recent interest in terahertz radiation, it is also worth noting the work on terahertz differentiators, pointing out the pioneering time-resolved experiments to obtain the first-order derivative of an arbitrary waveform using gratings of sub-wavelength period [17]. Finally, all-microwave techniques to design differentiators will also be surveyed here. A basic first-order differentiator for a limited bandwidth has been proposed in simulation by Tsai and Jeng in [18] applying a transmission-line approach to approximate differentiation operation. An approximated solution in the -domain was also developed by Hsue et al. in [19] to implement first- and second-order differentiators, whose transfer functions are emulated using shunt stubs combined with serial lines. Recently, Nguyen and Caloz designed first- and second-

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TH-ORDER DIFFERENTIATORS

order microwave differentiators using the time-derivative effect of directional coupled-line couplers, which is constrained by the tradeoff between the duration of the input pulse and the target coupler central frequency [20]. A particularly interesting application for microwave differentiators is their use in signal processing and pulse generation for ultra-wideband (UWB) systems [21]–[24]. UWB is a radio technology approved by the Federal Communications Commission (FCC) for unlicensed operation in the frequency range from 3.1 to 10.6 GHz for signals with power spectral density below 41.2 dBm/MHz [25]. Numerous applications have been targeted for UWB technology, including high data-rate wireless communication [26], [27], homeland security [28], and specialized radar imaging [29], [30]. UWB pulse generators based on differentiation operation can be, in general, divided into static and dynamic devices. A static pulse generation aims at obtaining the fixed pulse shapes that optimally fit the FCC mask [31], [32], while dynamic systems offer real-time adaptation to different spectral specifications by overlapping successive derivatives of an input pulse [18]. In this paper, a solution for the exact design of microwave components with customized frequency responses in an effective transmission-type configuration is applied to the synthesis of arbitrary-order differentiators in symmetrical coupled lines for UWB specifications. The used synthesis method has already been successfully applied in the design of two-port waveguide and transmission-line devices with nearly any target frequency response in reflection [33], but with the transmission frequency response limited to minimum phase functions due to the fact that the signal can take just a single path between the input and the output port of the device [34]. The configuration proposed here allows us to avoid the necessity of separating the incident and reflected signals by using an additional directional coupler or circulator, which introduce losses and increase the size and complexity of the final device in designs with reflection-type operation. The novel differentiators demonstrated in this paper present multiple advantages. They are synthesized in conventional microstrip coupled-line technology, which allows us to redirect the reflected output signal to the separated coupled port, providing effective transmission-type operation with the full design flexibility offered by the synthesis in reflection. The applied synthesis method is exact and it provides structures with smooth profiles. Therefore, the solution obtained does not require the usual multistage optimization with electromagnetic simulators. Moreover, the method does not limit the operational bandwidth of the designed device, facilitating the accomplishment of the UWB requirements. In addition, the proposed technique provides great flexibility to select the desired frequency response, and therefore, the design is not restricted by any means to integer-order derivatives. This paper is organized as follows. Section II presents the synthesis method for symmetrical coupled lines employed, together with the theoretical analysis based on the even- and oddmode decomposition. Section II-A analyzes the ideal case of coupled lines of equal even and odd propagation constants and Section II-B is focused on the synthesis method for microstrip coupled lines, where the effect of different even and odd prop-

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Fig. 1. Scheme of the nonuniform side-by-side symmetrical coupled lines, is an input port, is a transmitted port, is a coupled port, and where is an isolated port.

agation constants must be taken into account. In Section III, a detailed design procedure for a fourth-order differentiator is shown together with the simulation and measurement results for first-, second-, third-, and fourth-order differentiators. Finally, in Section IV, main conclusions are presented. II. SYNTHESIS METHOD FOR SYMMETRICAL COUPLED LINES The even- and odd-mode decomposition is a widely known procedure for the analysis of uniform and nonuniform side-byside symmetrical coupled lines. According to this procedure, expressions to calculate the frequency-dependent scattering parameters, and , can be formulated as [35]–[37] (1) (2) where the ports are numbered as in Fig. 1, and and are the reflection coefficients for the even and odd modes, respectively, when ports 2 and 4 are terminated with a matched load. In order to ensure effective transmission-type operation for the target devices implemented using symmetrical coupled lines, it is necessary to have the input port, , matched at all frequencies, redirecting the reflected signal to the coupled port, . Applying these conditions to (1) and (2), it can be deduced that the desired performance is obtained for (3) Thus, when (3) is satisfied, then the aforementioned rameters become

-pa(4) (5)

It is interesting to note that for the effective transmissiontype operation achieved, the frequency response is not limited to minimum phase functions, as was the case for the -parameter in two-port devices [33], [38]. In Sections II-A and II-B, the mathematical expressions (3)–(5) will be applied to the synthesis of devices with effective transmission-type operation in two different cases. A. Synthesis Method for Coupled Lines, Where Even- and Odd-Mode Propagation Constants are Equal, , and Do Not Vary Along the Propagation Direction The synthesis method for symmetrical coupled lines employed in this paper is based on the general synthesis theory

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for two-port transmission lines and waveguides, previously developed by the same authors [33]. Following that theory, in order to synthesize a device with a given frequency response, , limited only by causality, stability, and passivity, the coupling coefficient, , between the forward and backward traveling waves along the propagation direction, , of the fundamental mode in the two-port structure needs to be calculated. To do this, the exact analytical series solution for the coupling coefficient given as follows in (6) will be employed:

In order to obtain the physical parameters of the synthesized device, the even characteristic impedance, , is calculated by analytically solving the equation [33] (10) which results in (11) where is the even characteristic impedance at the input end of the device. Similarly, the odd characteristic impedance, , can be calculated using (12) being the odd characteristic impedance at the input with end of the device. B. Synthesis Method for Coupled Lines in Microstrip Technology

(6) where

for

and (7)

is the inverse Fourier transform of the target frequency response, , expressed as a function of the propagation constant, . It is worth noting that the only approximations introduced to obtain the synthesis solution of (6) are to consider single-mode operation in the two-port structure, as well as to assume that the propagation constant does not vary with for a given frequency along the device, and that does not vary with frequency [33]. In order to apply the method to symmetrical coupled lines (four-port structures), the following procedure is employed. If the even and odd modes of the coupled-line structure feature the same propagation constant, , for a given frequency, then the design condition (3) can be rewritten as . Applying the sign inversion property reported in [33] for the relationship between and , the design condition can be finally rewritten as , where and are the coupling coefficients for the even and odd modes, respectively. Hence, for the target frequency response, , that will be implemented in the -parameter of the synthesized structure, and can be calculated regarding (5) as (8) (9)

In Section II-A, a general method has been presented for the synthesis of symmetrical coupled lines featuring equal even and odd propagation constants that do not vary along the propagation direction. For that case, expressions have been obtained for the required even and odd characteristic impedances, and . In the case of coupled lines in microstrip technology, considered in this section, several restrictions will be imposed, which require modifications over the previously calculated values for and . Firstly, it is necessary to fulfill the inequality [35] (13) for each , which can be enforced by multiplying all the values of by an adequate constant , and by dividing all the values of by the same factor . This operation does not alter the values of the coupling coefficients, as can be easily seen in (10). However, it causes a mismatch between the calculated even and odd characteristic impedances and the values required at the ports. Thus, in order to match the impedances at the ports, avoiding unwanted reflections, a useful property for the relationship between and and the coupling coefficients, and , will be exploited. In particular, if and are multiplied by a tapering function, , then and are altered just by adding the term . This property can be readily demonstrated using (10)–(12), and allows us to taper the beginning and end of the device to achieve the desired port impedances. If the tapering function, , is smooth enough, i.e., , then its effect on and is negligible and the frequency response of the synthesized coupled-line device remains almost unaltered. Finally, for our case of interest of coupled lines in microstrip technology, equality between the propagation constants of the even and odd modes, and , is not maintained [35]. Several

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Fig. 3. Coupling coefficient of the fourth-order differentiator.

Fig. 2. Target (black dashed line), simulated (dark grey dotted line), and measured (light grey solid line): (a) magnitude and (b) phase of the frequency response of the fourth-order differentiator. The UWB mask is also included (black solid line).

techniques have been proposed to compensate them [39]–[41]. Here, the difference in propagation constant between the even and odd modes is accounted for by redistributing and along the propagation direction, , using the even- and odd-mode effective permittivities, and , respectively. This redistribution produces a global compression in the -direction of the values of and a global expansion of the values of , with respect to the positions obtained in a structure with , where is the propagation constant of a single microstrip line implemented in the same substrate. In this way, the even and odd modes propagating at different speeds are affected at each time instant by the same pair of even and odd impedances, as in the case of equal speed propagation. Furthermore, the propagation constants and vary in the -direction due to the changes of the effective permittivities, and , calculated from the pairs of and . It leads to local compressions or expansions in the -direction in the global redistribution process. An algorithm to compensate the distribution of the even and odd characteristic impedances is proposed here. The characteristic impedances, and , obtained for the case of equal even and odd propagation constants (taken as the of a single microstrip line), operated by factor , and multiplied by a tapering function, , and the effective permittivity of

Fig. 4. Even (black line) and odd (grey line) characteristic impedance of the fourth-order differentiator.

Fig. 5. Even (black lines) and odd (grey lines) characteristic impedance of the fourth-order differentiator after multiplying by the constant (solid lines) and after the windowing process (dashed lines).

the single microstrip line, , are set as input parameters of the algorithm, together with the physical parameters of the microstrip substrate employed. Input of the algorithm:

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Physical parameters of the microstrip substrate. Output of the algorithm:

Algorithm: For

Fig. 6. Even (black lines) and odd (grey lines) characteristic impedance of the fourth-order differentiator before (dashed lines) and after (solid lines) the compensation process.

Calculation of and

and

for

in the microstrip substrate;

Once the values of and have been obtained, the physical parameters of the device are finally calculated using the LineCalc tool of Agilent ADS software. This step allows us to obtain the conductor strip widths, , and separations, , along the propagation direction, , for the designed coupled-line structure (see Fig. 1).

Fig. 7. Physical dimensions of the fourth-order differentiator: separation be(grey line). tween the coupled lines, (black line), and width of the lines,

III. DESIGN OF FIRST-, SECOND-, THIRD-, AND FOURTH-ORDER DIFFERENTIATORS IN MICROSTRIP FOR UWB APPLICATIONS The frequency response of an ideal is given by the expression

th-order differentiator

(14) . where Taking into account the novelty of the fourth-order differentiator for the microwave community, the design of this device is discussed here in detail. Additionally, the results of simulations and measurements for the set of first-, second-, third-, and fourth-order differentiators designed for UWB applications are given at the end of the section. Following (14), the magnitude and phase of the target frequency response, , are calculated for and the results are shown in Fig. 2 (black dashed line). The differentiator has been designed for a frequency range from 3.1 to 7.4 GHz, which gives a good compromise between energetic efficiency and maximum bandwidth for UWB signals. For the differentiators designed in the entire UWB band (up to the frequency of 10.6 GHz), the level of the response at the lowest frequency of 3.1 GHz would be very low. For frequencies higher than 7.4 GHz, is defined with a symmetrical form in order to avoid abrupt variations in the frequency response; otherwise, abrupt changes in the device spectral response would provoke

Fig. 8. Simulated (dotted line) and measured (solid line) the fourth-order differentiator.

-parameter for

long responses in the time domain, which would translate into an undesired (and unnecessary) increase of the length of the synthesized device [42]. Following the synthesis procedure detailed in Section II, the required coupling coefficient, , is calculated using (6) and (7) for the target frequency response, , where is equal to 6.8 (a Rogers RO3010 substrate with mm, will be used). The result is shown in Fig. 3. Next, and are obtained by applying (8) and (9). The even and odd characteristic impedances are then calculated

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Fig. 9. Photograph of the fabricated prototype of fourth-order differentiator.

Fig. 12. Photograph and physical dimensions of the first-order differentiator: separation between the coupled lines, (black line), and width of the lines, (grey line).

Fig. 10. Time-domain input signal.

Fig. 11. Output signal calculated from the measured frequency response of the synthesized fourth-order differentiator (grey line) compared with the ideal fourth-order derivative of the input signal (black line).

applying (11) and (12) and assuming standard characteristic impedance at the ports, . The results obtained are given in Fig. 4. In order to separate and , the even characteristic impedance is multiplied (and the odd characteristic impedance is divided) by the constant (Fig. 5, solid lines). For this example, the value of is carefully chosen to satisfy the inequality (13), which has to be fulfilled when the characteristic impedance compensation procedure is completed (Fig. 6, solid line). The Nuttall’s Blackman–Harris window [43] is applied (Fig. 5, dashed lines) to guarantee good matching with the 50- standard ports. Since microstrip technology is used to implement the resulting device, the even and odd modes will propagate at different velocities, making it necessary to apply the compensation algorithm presented in Section II, whose results are shown in Fig. 6 (solid line). Finally, the physical parameters of the fourth-order differentiator synthesized in microstrip coupled-line technology are

Fig. 13. Target (black dashed line), simulated (dark grey dotted line), and measured (light grey solid line): (a) magnitude and (b) phase of the frequency response of the first-order differentiator. The UWB mask is also included (black solid line).

calculated using the LincCalc tool, and the results are shown in the Fig. 7, where and are defined as in Fig. 1. The designed device has been simulated using Agilent ADS Momentum and the results are presented in Figs. 2 and 8 with dotted lines. The simulation results for the magnitude and phase of the -parameter (dark grey dotted line) are compared with the target specifications for the fourthorder differentiator given in (black dashed line) in Fig. 2,

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Fig. 14. Simulated (dotted line) and measured (solid line) the first-order differentiator.

-parameter for

Fig. 15. Output signal calculated from the measured frequency response of the synthesized first-order differentiator (grey line) compared with the ideal firstorder derivative of the input signal (black line).

Fig. 16. Photograph and physical dimensions of the second-order differentiator: separation between the coupled lines, (black line), and width of the (grey line). lines,

showing very good agreement. Moreover, as it can be seen in Fig. 8, the -parameter is below 20 dB in the entire frequency range of interest, ensuring a good matching at the input port. The prototype has been fabricated using a numerical milling machine (Fig. 9). The measurements have been carried out using an Agilent 8722 vector network analyzer (VNA) and they are in

Fig. 17. Target (black dashed line), simulated (dark grey dotted line), and measured (light grey solid line): (a) magnitude and (b) phase of the frequency response of the second-order differentiator. The UWB mask is also included (black solid line).

Fig. 18. Simulated (dotted line) and measured (solid line) the second-order differentiator.

-parameter for

very good agreement with the target specifications and simulated results (Figs. 2 and 8, solid lines). Small discrepancies can be attributed mainly to the fabrication tolerances, mismatch in the connector joints, and losses of the device, which were not taken into account either during the design procedure or during the simulation. In order to fully verify the features of the design, a simulation of the signal differentiation has been carried out in the time do-

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Fig. 19. Output signal calculated from the measured frequency response of the synthesized second-order differentiator (grey line) compared with the ideal second-order derivative of the input signal (black line).

Fig. 20. Photograph and physical dimensions of the third-order differentiator: separation between the coupled lines, (black line), and width of the lines, (grey line).

main using the measured data of the synthesized structure. For this purpose, an input signal, i.e., a Gaussian pulse with a frequency spectrum limited within the band of interest from 3.1 to 7.4 GHz has been selected (Fig. 10). This signal is introduced into the synthesized differentiator for which the output signal (Fig. 11) is obtained as a convolution between the input signal and the impulse response obtained as the inverse Fourier transform of the measured -parameter, Fig. 2 (light grey solid line). Very good coincidence has been achieved between the obtained output signal and the ideal fourth-order derivative of the input signal. An additional ringing in the long time tail of the output signal is due to multiple reflections in the device connectors. Finally, in order to confirm the capabilities and flexibility of the novel method proposed to synthesize arbitrary-order differentiators, first-, second-, and third-order differentiators have been also designed in the same frequency range. Furthermore, a set of arbitrary-order differentiators can be used in the development of a dynamic system of pulse generation for UWB applications [4], [16], [18]. The physical dimensions of the first-, second-, and third-order differentiators are given in Figs. 12, 16, and 20, respectively. All the devices obtained have been simulated, fabricated (see insets in Figs. 12, 16, and 20), and measured. The results of the simulations and measurements are compared with the target frequency specifications and are presented

Fig. 21. Target (black dashed line), simulated (dark grey dotted line), and measured (light grey solid line): (a) magnitude and (b) phase of the frequency response of the third-order differentiator. The UWB mask is also included (black solid line).

Fig. 22. Simulated (dotted line) and measured (solid line) the third-order differentiator.

-parameter for

for the first-, second, and third-order differentiators in Figs. 13 and 14, Figs. 17 and 18, and Figs. 21 and 22, respectively. Moreover, time-domain results of the output signal calculated from the measured frequency responses of these differentiators are

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Fig. 23. Output signal calculated from the measured frequency response of the synthesized third-order differentiator (grey line) compared with the ideal third-order derivative of the input signal (black line).

given in Figs. 15, 19, and 23 for the input signal presented in Fig. 10. In all cases, a very good agreement is achieved between the target specifications, simulations, and measurements, confirming the very good performance of the novel method proposed to design arbitrary-order differentiators in planar microwave technology for broadband UWB signals. Additionally, the low values registered for the -parameter in all the designed devices reveal that a good matching is obtained at the input port of the devices over the entire frequency range, as intended. IV. CONCLUSION A novel technique for the design of arbitrary-order microwave differentiators has been proposed. The technique employs an exact analytical series solution for the inverse scattering problem formulated using the coupled-mode theory in the microwave range. Effective transmission-type operation is achieved by properly implementing the device in coupled-line technology. The simulation and measurement results, obtained for first-, second-, third-, and fourth-order UWB differentiator prototypes have been compared with the theoretical specifications, validating the presented design technique. The devices obtained can be particularly interesting for UWB pulse generation, including reconfigurable strategies based upon the combination of the successive derivatives of the incoming signal. ACKNOWLEDGMENT The authors would like to express their gratitude to TAFCO Metawireless S. L., Noain, Navarre, Spain, for its help and support. REFERENCES [1] M. I. Skolnik, Introduction to Radar Systems. New York: McGrawHill, 1980, pp. 399–408. [2] S. Usui and I. Amidror, “Digital-low pass differentiation for biological signal processing,” IEEE Trans. Biomed. Eng., vol. BME-29, no. 10, pp. 686–692, Oct. 1982. [3] B. V. K. V. Kumar and C. A. Rahenkamp, “Calculation of geometric moments using Fourier plane intensities,” Appl. Opt., vol. 25, no. 6, pp. 997–1007, Mar. 1986.

[4] M. H. Asghari and J. Azaña, “Proposal and analysis of a reconfigurable pulse shaping technique based on multi-arm optical differentiators,” Opt. Commun., vol. 281, no. 18, pp. 4581–4588, Sep. 2008. [5] J. P. Yao, “Photonics for Ultrawideband communications,” IEEE Microw. Mag., vol. 10, no. 4, pp. 82–95, Jun. 2009. [6] P. Horowitz and W. Hill, The Art of Electronics, 2nd ed. Cambridge, U.K.: Cambridge Univ. Press, 1989. [7] M. A. Al-Alaoui, “Novel approach to designing digital differentiators,” Electron. Lett., vol. 28, no. 15, pp. 1376–1378, Jul. 1992. [8] S.-C. Pei and J.-J. Shyu, “Analytic closed-form matrix for designing higher order digital differentiators using eigen-approach,” IEEE Trans. Signal Process., vol. 44, no. 3, pp. 698–701, Mar. 1996. [9] N. Q. Ngo, S. F. Yu, S. C. Tjin, and C. H. Kam, “A new theoretical basis of higher-derivative optical differentiators,” Opt. Commun., vol. 230, no. 1–3, pp. 115–129, Jan. 2004. [10] Y. Park, J. Azaña, and R. Slavík, “Ultrafast all-optical first- and higherorder differentiators based on interferometers,” Opt. Lett., vol. 32, no. 6, pp. 710–712, Mar. 2007. [11] M. Kulishov and J. Azaña, “Long-period fiber gratings as ultrafast optical differentiators,” Opt. Lett., vol. 30, no. 20, pp. 2700–2702, Oct. 2005. [12] N. K. Berger, B. Levit, B. Fischer, M. Kulishov, D. V. Plant, and J. Azaña, “Temporal differentiation of optical signals using a phase-shifted fiber Bragg grating,” Opt. Exp., vol. 15, no. 2, pp. 371–381, Jan. 2007. [13] M. A. Preciado, V. Garcia-Muñoz, and M. A. Muriel, “Ultrafast alloptical th-order differentiator based on chirped fiber Bragg gratings,” Opt. Exp., vol. 15, no. 12, pp. 7196–7201, May 2007. [14] Q. Wang, F. Zeng, S. Blais, and J. Yao, “Optical ultrawideband monocycle pulse generation based on cross-gain modulation in a semiconductor optical amplifier,” Opt. Lett., vol. 31, no. 21, pp. 3083–3085, Nov. 2006. [15] J. Xu, X. Zhang, J. Dong, D. Liu, and D. Huang, “High-speed all-optical differentiator based on a semiconductor optical amplifier and an optical filter,” Opt. Lett., vol. 32, no. 13, pp. 1872–1874, Jul. 2007. [16] Y. Park, M. H. Asghari, R. Helsten, and J. Azaña, “Implementation of broadband microwave arbitrary-order time differential operators using a reconfigurable incoherent photonic processor,” IEEE Photon. J., vol. 2, pp. 1040–1050, Dec. 2010. [17] A. Filin, M. Stowe, and R. Kersting, “Time-domain differentiation of terahertz pulses,” Opt. Lett., vol. 26, no. 24, pp. 2008–2010, Dec. 2001. [18] C. Y. Tsai and S. K. Jeng, “Design of an ultra-wideband waveform shaping network using an analog microwave differentiator array fed by a Gaussian pulse signal,” in IEEE AP-S Int. Symp. and USNC/URSI Nat. Sci. Meeting, Albuquerque, NM, 2006, pp. 1307–1310. [19] C.-W. Hsue, L.-C. Tsai, and K.-L. Chen, “Implementation of first-order and second-order microwave differentiators,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 5, pp. 1143–1147, May 2004. [20] H. V. Nguyen and C. Caloz, “First- and second-order differentiators based on coupled-line directional couplers,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 12, pp. 791–793, Dec. 2008. [21] I. Arnedo, J. D. Schwartz, M. A. G. Laso, T. Lopetegi, D. V. Plant, and J. Azaña, “Passive microwave planar circuits for arbitrary UWB pulse shaping,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 7, pp. 452–454, Jul. 2008. [22] P. Rulikowski and J. Barrett, “Adaptive arbitrary pulse shaper,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 5, pp. 356–358, May 2008. [23] P. Rulikowski and J. Barrett, “Application of nonuniform transmission lines to ultra wideband pulse shaping,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 12, pp. 795–797, Dec. 2009. [24] J. Han and C. Nguyen, “A new ultra-wideband, ultra-short monocycle pulse generator with reduced ringing,” IEEE Microw. Wireless Compon. Lett., vol. 12, no. 6, pp. 206–208, Jun. 2002. [25] “Part 15 rules for unlicensed RF devices,” FCC, Washington, DC, Aug. 2006. [Online]. Available: http://www.fcc.gov/oet/info/rules [26] R. J. Fontana, “Recent system applications of short-pulse ultra-wideband (UWB) technology,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 9, pp. 2087–2104, Sep. 2004. [27] G. R. Aiello and G. D. Rogerson, “Ultra-wideband wireless systems,” IEEE Microw. Mag., vol. 4, no. 2, pp. 36–47, Jun. 2003. [28] P. Withington, H. Fluhler, and S. Nag, “Enhancing homeland security with advanced UWB sensors,” IEEE Microw. Mag., vol. 4, no. 3, pp. 51–58, Sep. 2003.

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TH-ORDER DIFFERENTIATORS

[29] I. Gresham, A. Jenkins, R. Egri, C. Eswarappa, N. Kinayman, N. Jain, R. Anderson, F. Kolak, R. Wohlert, S. P. Bawell, J. Bennett, and J.-P. Lanteri, “Ultra-wideband radar sensors for short-range vehicular applications,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 9, pp. 2105–2122, Sep. 2004. [30] A. G. Yarovoy, L. P. Ligthart, J. Matuzas, and B. Levitas, “UWB radar for human being detection,” IEEE Aerosp. Electron. Syst. Mag., vol. 21, no. 3, pp. 10–14, Mar. 2006. [31] T.-Y. Tzou and F.-C. Chen, “New 0.18- m CMOS pulse generator for impulse radio ultra-wideband communication systems,” Microw. Opt. Technol. Lett., vol. 49, no. 2, pp. 342–345, Feb. 2007. [32] H. Sheng, P. Orlik, A. M. Haimovich, L. J. Cimini Jr., and J. Zhang, “On the spectral and power requirements for ultra-wideband transmission,” in Proc. IEEE Int. Commun. Conf., Anchorage, AK, May 2003, vol. 1, pp. 738–742. [33] I. Arnedo, M. A. G. Laso, F. Falcone, D. Benito, and T. Lopetegi, “A series solution for the single-mode synthesis problem based on the coupled-mode theory,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 2, pp. 457–466, Feb. 2008. [34] I. Hunter, Theory and Design of Microwave Filters, ser. Electromagn. Wave 48. London, U.K.: IEE Press, 2001. [35] R. Mongia, I. Bahl, and P. Bhartia, RF and Microwave Coupled-Line Circuits. Norwood, MA: Artech House, 1999. [36] T.-R. Cheng, T.-W. Pa, and C.-W. Hsue, “Inverse scattering of nonuniform, symmetrical coupled lines,” IEEE Microw. Guided Wave Lett., vol. 8, no. 7, pp. 260–262, Jul. 1998. [37] A. Lujambio, I. Arnedo, M. Chudzik, I. Arregui, T. Lopetegi, and M. A. G. Laso, “Dispersive delay line with effective transmission-type operation in coupled-line technology,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 9, pp. 459–461, Sep. 2011. [38] M. J. Erro, I. Arnedo, M. A. G. Laso, T. Lopetegi, and M. A. Muriel, “Phase-reconstruction in photonic crystals from -parameter magnitude in microstrip technology,” Opt. Quantum Electron., vol. 39, no. 4–6, pp. 321–331, Jun. 2007. [39] S. L. March, “Phase velocity compensation in parallel-coupled microstrip,” in IEEE MTT-S Int. Microw. Symp. Dig., 1982, pp. 410–412. [40] S. Uysal and H. Aghvami, “Synthesis, design, and construction of ultrawide-band nonuniform quadrature directional couplers in inhomogeneous media,” IEEE Trans. Microw. Theory Tech., vol. 37, no. 6, pp. 969–976, Jun. 1989. [41] S.-M. Wang, M.-Y. Hsieh, C.-H. Chiang, and C.-Y. Chang, “Microstrip directional coupler with nearly ideal tem coupler performance,” Electron. Lett., vol. 41, no. 11, pp. 651–653, May 2005. [42] M. Chudzik, I. Arnedo, I. Arregui, A. Lujambio, M. A. G. Laso, D. Benito, and T. Lopetegi, “Novel synthesis technique for microwave circuits based on inverse scattering: Efficient algorithm implementation and application,” Int. J. RF Microw. Comput.-Aided Eng., vol. 21, no. 2, pp. 164–173, Mar. 2011. [43] A. H. Nuttall, “Some windows with very good sidelobe behavior,” IEEE Trans. Acoust. Speech, Signal Process., vol. ASSP-29, no. 1, pp. 84–91, Feb. 1981.

Magdalena Chudzik (S’08) was born in Warsaw, Poland, in 1984. She received the B.Sc. and M.Sc. degrees in electrical and computer engineering from the Warsaw University of Technology, Warsaw, Poland, in 2007 and 2009, respectively, and is currently working toward the Ph.D. degree in electrical and electronic engineering at the Public University of Navarre, Pamplona, Navarre, Spain. Her research interests include coupled-mode theory, periodic structure devices, and passive devices in microwave, millimeter-wave, and terahertz technologies. Mrs. Chudzik was the recipient of a Formación de Profesorado Universitario (FPU) Grant of the Spanish Ministry of Education and Science.

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Israel Arnedo (S’05–M’11) was born in Tudela (Navarre), Spain, in 1980. He received the Telecommunication Engineering, M.Sc., and Ph.D. degrees from the Public University of Navarre, Pamplona, Navarre, Spain, in 2004, 2007, and 2010, respectively. He is currently an Assistant Professor with the Electrical and Electronic Engineering Department, Public University of Navarre, where he has collaborated on research projects supported by the Spanish Government, the Natural Sciences and Engineering Research Council of Canada (NSERC), and the European Commission. He is cofounder of the spin-off company TAFCO Metawireless, Noain, Navarre, Spain. He is a Reviewer for several international scientific journals. His research interests are microwave, millimeter-wave, and terahertz fields, including periodic structure devices, coupled-mode theory, inverse-scattering synthesis, and their applications in UWB systems, space and satellite technology, and biomedical engineering research. Dr. Arnedo was the recipient of a Formación de Profesorado Universitario (FPU) grant of the Spanish Ministry of Education and Science. He was also the recipient of a 2012 José Castillejo Grant of the Spanish Ministry of Education.

Aintzane Lujambio (S’09) was born in San Sebastián (Guipúzcoa), Spain, in 1982. She received the Telecommunication Engineering degree and M.Sc. degree from the Public University of Navarre, Pamplona, Navarre, Spain, in 2006 and 2010, respectively, and is currently working toward the Ph.D. degree in electrical and electronic engineering at the Public University of Navarre. She has collaborated in research projects supported by the Spanish Government and the European Commission. Her research interests include algorithms for microwave filter design, inverse scattering synthesis methods, and UWB systems.

Ivan Arregui (S’08–M’12) received the Telecommunication Engineering degree and M.Sc. degree from the Public University of Navarre, Pamplona, Navarre, Spain, in 2005 and 2008, respectively, and is currently working toward the Ph.D. degree in electrical and electronic engineering at the Public University of Navarre. He is currently an Assistant Professor with the Electrical and Electronic Engineering Department, Public University of Navarre. He is cofounder of the spin-off company TAFCO Metawireless, Noain, Navarre, Spain. He is a Reviewer for several international scientific journals. His research interests include periodic structure devices, numerical techniques for inverse scattering synthesis, and design of passive components for communications satellites. Mr. Arregui is a member of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S). He was the recipient of a grant from the Spanish Ministry of Science and Innovation.

Ion Gardeta was born in Barañáin, Spain, in 1984. He received the Telecommunication Engineering degree from the Public University of Navarre, Pamplona, Navarre, Spain, in 2009, and the M.Sc. degree in advanced networking from Edinburgh Napier University, Edinburgh, U.K., in 2011. Since 2012, he has been with the Network Operations Centre, MTN Satellite Communications, Santander, Spain. Mr. Gardeta was the recipient of a grant from the Government of Navarre, Spain, to support his reserach related to microwave coupled lines for UWB systems.

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Fernando Teberio received the Telecommunication Engineering degree and M.Sc. degree from the Public University of Navarre, Pamplona, Navarre, Spain, in 2009 and 2011, respectively, and is currently working toward the Ph.D. degree in electrical and electronic engineering at the Public University of Navarre. His research interests include periodic structure devices and design of passive components for communications satellites.

José Azaña (M’03) received the Telecommunication Engineer degree and Ph.D. degree in telecommunication engineering from the Universidad Politécnica de Madrid (UPM), Madrid, Spain, in 1997 and 2001, respectively. He is currently a Professor and a Canada Research Chair with the Institut National de la Recherche Scientifique—Centre Energie, Matériaux et Télécommunications (INRS-EMT), Montréal, QC, Canada. His research interests cover a wide range of topics, including ultrafast photonics, optical signal processing, all-fiber and integrated-waveguide technologies, fiber-optic telecommunications, all-optical computing, measurement of ultrafast events, light pulse interferometry, and microwave waveform generation and manipulation. He has authored or coauthored over 300 publications in top scientific journals and technical conferences, including nearly 150 contributions in high-impact peer-reviewed journals (with most publications appearing in IEEE, Optical Society of America (OSA), and Nature publications). He has also contributed many invited and co-invited journal publications and presentations at leading international meetings. Prof. Azaña has been the recipient of several prestigious awards and distinctions at institutional, national, and international levels, including the 2008 IEEE Photonics Society Young Investigator Award and the 2009 IEEE Microwave Theory and Techniques Society (IEEE MTT-S) Microwave Prize.

David Benito was born in Huesca, Spain, in 1965. He received the M.Sc. and Ph.D. degrees in electrical engineering from Polytechnic University, Madrid, Spain, in 1992 and 1999, respectively. Since 1992, he has been an Associate Professor, and since 2010, a Full Professor, with the Electrical Engineering Department, Public University of Navarre, Pamplona, Navarre, Spain. He is cofounder of the spin-off company TAFCO Metawireless S.L., Noain, Navarre, Spain. He has authored or coauthored over 80 international papers and conference contributions. His main research interests include the analysis/synthesis techniques of photonic/electromagnetic-bandgap structures, microwave and photonic metamaterials, and their applications to microwave photonics and radio-over-fiber systems. He has coordinated several research projects supported by the Spanish Government and European Union (EU) concerning fiber-optic communications and microwave engineering.

Miguel A. G. Laso (S’99–M’03) received the M.Sc. and Ph.D. degrees in telecommunications engineering from the Public University of Navarre, Pamplona, Navarre, Spain, in 1997 and 2002, respectively. From 1998 to 2001, he was with the Electrical and Electronic Engineering Department, Public University of Navarre, as a Doctoral Fellow. From 2001 to 2006 he was an Assistant Professor, and since 2006, an Associate Professor, with the Public University of Navarre, where he has been involved with teaching and research duties in optical communications and microwave engineering. From 2002 to 2003, he was also a Research Fellow with the Payload Systems Division, European Space Research and Technology Centre (ESRTC), European Space Agency (ESA), Noordwijk, The Netherlands. He is cofounder of TAFCO Metawireless S.L., Noain, Navarre, Spain (a spin-off company of the Public University of Navarre). He has authored or coauthored dozens of papers and contributed to major conferences. He has also led projects with public and private funding. His current research interests comprise periodic structures, photonic/electromagnetic-bandgap structures, inverse scattering problems, and synthesis techniques for filters, especially in the microwave and millimeter-wave frequency range, and their applications for telecommunications. Dr. Laso is a member of several professional and scientific international associations, including the Optical Society of America (OSA), the International Society for Optics and Photonics (SPIE), and the American Society for Engineering Education (ASEE). He was the recipient of a grant from the Spanish Ministry of Education and Science (1998–2001) and the European Space Agency (2002–2003). He was the recipient of several prizes, including the Spanish National Prize to the Best Doctoral Dissertation in Telecommunications (2002) of the Spanish Telecommunications Engineers Association (COIT/AEIT) and the Junior Research Award of the Public University of Navarre (2003). He was also the recipient of the 2005 Spanish National Prize for the Best Project in Innovation in Higher Education of the Spanish Ministry of Education and Science.

Txema Lopetegi (S’99–M’03) was born in Pamplona, Navarre, Spain, in 1973. He received the M.Sc. and Ph.D. degrees in telecommunication engineering from the Public University of Navarre, Pamplona, Navarre, Spain, in 1997 and 2002, respectively. Since 1997, he has been with the Electrical and Electronic Engineering Department, Public University of Navarre, initially as an Assistant Professor, and since 2006, as an Associate Professor. In 2002 and 2003, he was with the Payload Systems Division, European Space Research and Technology Center (ESTEC), European Space Agency (ESA), Noordwijk, The Netherlands, as a Post-Doctoral Researcher. He is a cofounder of the spin-off company TAFCO Metawireless S.L., Noain, Navarre, Spain. His current research interests include metamaterials and synthesized structures in microwave and terahertz technologies, as well as coupled-mode theory and synthesis techniques using inverse scattering. Dr. Lopetegi was the recipient of a 1999 and 2000 grant from the Spanish Ministry of Education.

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1

A Directivity-Enhanced Directional Coupler Using Epsilon Negative Transmission Line Aref Pourzadi, Amir Reza Attari, and Mohammad Saeed Majedi, Student Member, IEEE

Abstract—In this paper, a high directivity parallel coupled line coupler using the negative (ENG) transmission line is proposed. With the aid of even- and odd-mode analysis, it is shown that by using ENG transmission lines in a parallel coupled line coupler, the even- and odd-mode phase velocities can become equal at a desired frequency. Hence, the directivity of a coupler can be infinite theoretically. The coupler circuit model and closed-form relations for lumped elements of this model are presented. In addition, a design procedure for microstrip implementation of this coupler is proposed. Based on the proposed procedure, a 10-dB ENG directional coupler is designed at 2 GHz and validated by full-wave simulations. This coupler is fabricated and measurement results are presented. Experimental results show maximum directivity of nearly 40 dB at 1.95 GHz. Index Terms—Directional coupler, directivity, even/odd modes, metamaterial, negative transmission line.

I. INTRODUCTION

A

MICROSTRIP directional coupler with parallel coupled lines is one of the most useful devices in microwave and millimeter-wave frequencies; however, this kind of coupler suffers from poor directivity. This deficiency results from inequality of odd- and even-mode phase velocities of the parallel coupled line coupler in microstrip structures [1]. For increasing the directivity of a parallel coupled line coupler, several methods have been introduced in the literature, which include lumped-element compensation [2]–[7], modifying parallel coupled line structure [8]–[11], using multilayer microstrip configuration [12], using the negative refractive index line [13], [14], and directivity enhancement using inductor or capacitor loading [15]–[18]. Some of these methods are not easy to fabricate [10]–[12], [17], [18] and some of them do not have closed-form design equations [11]–[14]. The lumped-element compensation method leads to broad directivity bandwidth, but the parasitic effects of lumped elements affect the coupler performance at high frequencies [2]–[7]. Since 2002, by introducing the composite right–left-handed (CRLH) transmission line, it has been broadly used in radiated wave devices [19], [20] and guided wave components [21], [22]. Manuscript received March 28, 2012; revised August 13, 2012; accepted August 21, 2012. This work was supported in part by the Research Institute for Information and Communication Technology (ICT). A. Pourzadi and M. S. Majedi are with the Communications and Computer Research Center, Ferdowsi University of Mashhad, Mashhad, Iran (e-mail: [email protected]; [email protected]). A. R. Attari is with the Department of Electrical Engineering, Ferdowsi University of Mashhad, Mashhad, Iran (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2216283

Fig. 1. ENG transmission line unit cell.

The CRLH transmission line unit cell is constituted of a series LC resonator and a shunt LC resonator. It can be shown that the CRLH transmission line has left-handed characteristic at low frequencies and right-handed characteristic at high frequencies. In addition to the CRLH transmission line, there are two other types of transmission lines based on metamaterials that have simpler structures. The epsilon negative transmission line proposed in [23] and [24] has a unit cell that is constituted of a series inductance and a shunt LC resonator. The mu negative (MNG) transmission line introduced in [25] also has a unit cell that is constituted of series LC resonator and a shunt capacitance. It is easy to show that the effective permittivity of the ENG transmission line and the effective permeability of the MNG transmission line are negative at low frequencies. In this paper, a novel method for increasing the directivity of a parallel coupled line coupler along with a design procedure is presented. It will be shown that using the ENG transmission line in a parallel coupled line coupler equalizes the even- and odd-mode phase velocities at a desired frequency. This equality leads to theoretically infinite directivity of the parallel coupled line coupler. Recently, in [15]–[18], design methods for high directivity compensated couplers by inductor or capacitor loading are presented. These design methods need an iterative procedure, whereas in this paper, with the aid of transmission-linebased metamaterials theory, a direct analysis and design method is presented that leads to exact results. II. THEORY A. ENG Transmission Line Theory A unit cell of ENG transmission line is shown in Fig. 1. According to the transmission line theory, the effective permittivity and permeability of the ENG transmission line are determined as follows [24]:

0018-9480/$31.00 © 2012 IEEE

(1)

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Fig. 2. Four-port backward parallel coupled line coupler. Fig. 3. Backward parallel coupled line coupler using ENG transmission lines.

where is the length of the unit cell. By applying a periodic boundary condition, the phase constant of the ENG transmission line can be obtained as follows [24]:

(2) At low frequencies , there is a band rejection region because of positive permeability and negative permittivity. At , the value of permittivity becomes zero and the ENG transmission line has infinite wave length property at this frequency.

Fig. 4. Unit cell circuit model of ENG parallel coupled line coupler.

B. Parallel Coupled Line Coupler The parallel coupled line coupler is a four-port device, the structure of which is shown in Fig. 2. The electromagnetic fields of the coupled transmission lines influence each other and this leads to a power exchange between transmission lines. The parallel coupled line coupler is analyzed by using the even- and odd-mode excitation. The existing electromagnetic fields in this structure can be presented as a superposition of the even and odd modes. In the analysis of a parallel coupled line coupler, for simplicity, it is usually assumed that the phase velocities of the even and odd modes are the same, and hence, the electrical lengths for both modes are equal ; however, it is not exact. Directivity of a directional coupler is defined as (3) If the nonidentical values are considered for the even- and odd-mode electrical lengths, and can be calculated as follows:

(4)

(5) and are the even- and odd-mode characteristic where impedances, respectively, and is the port impedance.

Fig. 5. Equivalent circuit model of: (a) even and (b) odd mode for the unit cell of ENG parallel coupled line coupler.

When the even- and odd-mode electrical lengths are equal , becomes 0, and this results in an infinite directivity. In Section II-C, it will be shown that the even- and odd-mode electrical lengths can become equal at a determined frequency by using ENG transmission lines. C. Even and Odd Modes The schematic of the ENG parallel coupled line coupler is shown in Fig. 3. The unit cell circuit model of this coupler is indicated in Fig. 4. As can be seen, this circuit model is constituted of the ENG transmission line components, as well as a coupling capacitance and mutual inductances between parallel coupled lines. Fig. 5(a) and (b) shows the even- and odd-mode equivalent circuits, respectively. The circuit models of both modes have identical topology, but their components have different values. The even- and odd-mode characteristic impedances are calculated as follows: (6) (7)

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where and are, respectively, the series branch impedance and the shunt branch admittance of the even-mode circuit model. and , respectively, are also the series branch impedance and the shunt branch admittance of the odd-mode circuit model. The phase constant for both modes are calculated as follows:

3

As mentioned previously, for increasing the directivity of parallel coupled line coupler, we should have at the desired frequency. We define as follows: (18) has a constant nonpositive value. Using (6) and (7) and (16)–(18), the values of and can be obtained as follows:

(8)

(19a) (19b) (19c) (19d) Finally, according to Fig. 5, we have

(9) (20a) (20b)

The even- and odd-mode electrical lengths are given by (10) (11) where is the number of unit cells. As mentioned in Section II-B, for increasing the directivity, the electrical lengths of both modes should be equal. By equating (10) and (11), the frequency at which the evenand odd-mode electrical lengths become equal is obtained as follows: (12)

III. DETERMINATION OF EQUIVALENT CIRCUIT ELEMENTS In this section, the closed-form equations for lumped elements of the ENG coupler circuit model are presented in order to achieve high directivity. For a specific coupling, the even- and odd-mode characteristic impedances of a parallel coupled line coupler with the electrical length of are determined as follows [26]:

(20c) (20d) It should be noted that the square root of has both the negative and positive signs . Since the parameters of the equivalent circuit model have positive values, it can be easily shown that the sign of in (19a)–(19d) should be positive. According to (20), there are four equations and five unknown values. The parameters of and can be obtained directly from (20a)–(20d), respectively. For calculating the values of and , one of them should be assumed arbitrarily. In this paper, with regard to the limitations of manufacturing, an appropriate value is considered for . In Section V, there is a discussion about the effect of the value on the coupler performance. By assuming a suitable value for , the other four unknown parameters are obtained as follows: (21a) (21b) (21c)

(13)

(21d)

(14)

It can be shown that all of the above element values are real and positive. Since in the presented design method we have used the periodic boundary condition, the number of unit cells has to be chosen large enough so that the results become accurate. However, it should be noted that the values of circuit model elements are related to the selected value of , and hence, manufacturing limitations for microstrip realization of these elements should also be considered for the proper selection of number of unit

coupling (dB) (15) According to (8) and (9), we have (16) (17)

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and are related to the geometrical parameters of and according to the equations given in [27]. Approximate expressions for obtaining and are also given as follows [27]: where

nH (25) Fig. 6. Microstrip implementation of the ENG coupler unit cell.

(26) pF

Fig. 7. Schematic of a five-unit-cell ENG parallel coupled line coupler.

cells. In Section V, the performance of a typical coupler for different values of will be examined. IV. MICROSTRIP IMPLEMENTATION The presented equivalent circuit model for the unit cell of ENG parallel coupled line coupler (Fig. 4) can be implemented using the microstrip technology. Figs. 6 and 7 illustrate a unit cell of the proposed microstrip ENG coupler and the schematic of a five-unit-cell ENG coupler, respectively. As shown in Fig. 6, the unit cell of the microstrip ENG coupler consists of coupled transmission lines and two stub inductors shorted to the ground plane by via-holes. The microstrip implementation of the ENG coupler unit cell (Fig. 6) can be accurately mapped to the equivalent circuit of the ENG coupler (Fig. 4). It should be noted that the value of is the sum of coupled transmission line capacitor and stub capacitor (22)

In a parallel coupled line circuit model, the following expresand [27]: sions are given for (23) (24)

(27)

and are, respectively, the width and length of the where microstrip line and is the thickness of the strip. All dimensions in above relations are in micrometers. As pointed out in Section III, for a specific coupling at a desired center frequency, all circuit model elements can be obtained. The circuit model elements are also dependent on the geometrical parameters of the structure. Hence, the geometrical parameters of the structure can be obtained in order to achieve the desired coupling characteristics. Briefly, the design procedure of the ENG parallel coupled line coupler with enhanced directivity can be summarized as follows. Step 1) Calculate and from (13) and (14). Step 2) Obtain the value of according to the number of ENG unit cells. Step 3) Determine and from (18) and (19). Step 4) Choose a suitable value for . Step 5) Use (21) to determine the values of equivalent circuit model parameters. Step 6) For the calculated values of and , apply (23)–(25) and use an appropriate optimization algorithm to determine and . Step 7) Calculate from (27). Step 8) Subtract from and obtain . Step 9) Use (25)–(27) and determined values of and in order to obtain and . V. SIMULATION RESULTS To demonstrate the proposed design procedure in Section IV, a 10-dB five-unit-cell ENG coupler is designed at 2 GHz. This coupler is shown in Fig. 7. Table I summarizes the calculated parameters of the presented ENG coupler. These parameters are obtained for a system impedance of 50 . The circuit is simulated on Rogers RO4003 substrate with a dielectric constant of 3.36 and thickness of 0.813 mm. The computed dimensions of the structure are not exact because the formulas of microstrip implementation are approximate. Therefore, dimensions of the designed ENG coupler need to be optimized in full-wave software for achieving the desired characteristics. The initial and final values of the ENG coupler dimensions are compared in Table II.

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TABLE I CALCULATED PARAMETERS OF THE DESIGNED ENG PARALLEL COUPLED LINE COUPLER

TABLE II INITIAL AND FINAL VALUES OF THE ENG COUPLER DIMENSIONS

Fig. 8. Comparison of circuit simulation and full-wave simulation results. and parameters. (b) and parameters. (a)

The results of circuit simulation and full-wave simulation results are compared in Fig. 8. The ADS and HFSS softwares are used for the circuit and full-wave simulations, respectively. The transmission matrix of the even and odd modes can be used to describe the characteristics of an -cell ENG coupler. For the even mode, the transmission matrix of a unit cell is computed as follows:

Fig. 9. Electrical lengths of the even and odd modes.

(28) and where structure, we have

are given by (20). For

cells of the (31) (29)

In the same manner, the transmission matrix of the odd mode for cells of the structure can be computed. The transmission matrix of a transmission line with length of , characteristic impedance of , and phase constant of is as follows: (30) Hence, the electrical lengths of both modes can be computed from (29) and (30) as follows:

The electrical lengths of the even and odd modes are plotted in Fig. 9. As expected, the electrical lengths of the two modes are equal to each other at 2 GHz. Fig. 10 shows the full-wave simulated directivity and coupling level for the proposed and the conventional 10-dB directional couplers. As evidenced by this figure, at the center frequency directivity of the proposed coupler is enhanced nearly 43 dB compared with the conventional directional coupler. However, the operation bandwidth of the proposed coupler that can be defined according to directivity or coupling parameters is narrow. This is due to the proposed coupler design having been carried out at a single frequency. For the proposed coupler, the directivity in a 7.5% bandwidth, from

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Fig. 10. Full-wave simulated directivity and coupling level for the proposed and the conventional 10-dB directional couplers.

VALUES

TABLE III OF ENG COUPLER CIRCUIT MODEL PARAMETERS FOR THREE DIFFERENT VALUES OF

Fig. 12. Even- and odd-mode electrical lengths of three ENG couplers with different values of .

VALUES

OF

TABLE IV ENG COUPLER CIRCUIT MODEL PARAMETERS FOR DIFFERENT NUMBER OF CELLS

Fig. 11. Circuit simulated directivity of three ENG couplers with different . values of

1.92 to 2.07 GHz, is above 20 dB and the maximum variation of the coupling level in this frequency range is 0.47 dB. Now we discuss the effect of the value on the coupler performance. Table III summarizes the values of ENG coupler circuit model parameters for three different values of . Fig. 11 shows the circuit simulated directivity of the corresponding three couplers. As seen, by increasing , directivity bandwidth of the coupler becomes wider. This property can be justified with the aid of even- and odd-mode electrical lengths of the couplers. According to Fig. 12, for larger values of , the even- and odd-mode electrical lengths are approximately near to each other within a broader frequency range and this leads to a wider directivity bandwidth. However, it should be noted that choosing large values for is limited by fabrication considerations. As mentioned before, considering more unit cells for ENG coupler design leads to more accurate results. In Table IV, the circuit parameters of five ENG couplers, corresponding to a different number of cells, are presented. To provide a reasonable comparison between these couplers, the value of in Table IV

Fig. 13. Circuit simulation results of the proposed ENG coupler for different parameter. (b) Directivity. values of . (a)

is selected proportional to . In other words , which is a parallel inductance in the equivalent circuit model, has an admittance inversely proportional to . The circuit simulated coupling and directivity of the couplers presented in Table IV are shown in Fig. 13. As seen in this figure, for , the results are sufficiently accurate.

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Fig. 16. Comparisons of measured and simulated directivity.

Fig. 14. Photograph of the fabricated ENG directional coupler.

frequency shift, as well as deterioration of the isolation and coupling level. Fig. 16 shows the full-wave simulated and measured directivity of the coupler. Maximum directivity of nearly 40 dB has been measured for the fabricated coupler, whereas directivity of a conventional microstrip coupled line coupler is lower than 15 dB. The measured directivity is limited by the measuring devices. For the proposed coupler, the directivity remains above 20 dB in an 8.7% bandwidth, from 1.86 to 2.03 GHz. In this frequency range, the maximum variation of the coupling level is 0.54 dB. VII. CONCLUSION In this paper, a new type of directivity-enhanced parallel coupled line coupler based on ENG transmission line has been proposed, and by using a simple circuit model, a design procedure has been provided for this coupler. This circuit model shows that the even- and odd-mode phase velocities become equal at a specific frequency, and hence, directivity of the coupler is improved. Microstrip implementation of the proposed ENG coupler has also been described and a 10-dB high-directivity directional coupler was designed at 2 GHz. This coupler was fabricated and its experimental results were compared with simulation results. Measured data show that maximum directivity of the coupler is nearly 40 dB at 1.95 GHz. Directivity of the coupler is also greater than 20 dB within an 8.7% bandwidth from 1.86 to 2.03 GHz. REFERENCES

Fig. 15. Comparison of full-wave simulation and measurement results. (a) and parameters. (b) and parameters.

VI. EXPERIMENTAL RESULTS For experimental verification, the designed and simulated ENG coupler is fabricated. Fig. 14 shows a photograph of the fabricated coupler. Fig. 15 compares the full-wave simulated and measured scattering parameters of the coupler. The frequency of maximum isolation is measured at 1.95 GHz, which is slightly (about 0.05 GHz) different from the full-wave simulation result. During the course of performing full-wave simulations, we found that the frequency response of the coupler is severely sensitive to the length of stubs and the input ports discontinuities. Hence, the fabrication tolerance leads to

[1] S. L. March, “Phase velocity compensation in parallel-coupled microstrip,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 1982, pp. 410–412. [2] M. Dydyk, “Accurate design of microstrip directional couplers with capacitive compensation,” in IEEE MTT-S Int. Microw. Symp. Dig., May 1990, vol. 1, pp. 581–584. [3] M. Dydyk, “Microstrip directional couplers with ideal performance via single-element compensation,” IEEE Trans. Microw. Theory Techn., vol. 47, no. 6, pp. 956–964, Jun. 1999. [4] J. L. Chen, S. F. Chang, and C. T. Wu, “A high-directivity microstrip directional coupler with feedback compensation,” in IEEE MTT-S Int. Microw. Symp. Dig., 2002, vol. 1, pp. 101–104. [5] R. Phromloungsri, M. Chongcheawchamnan, and I. D. Robertson, “Inductively compensated parallel coupled microstrip lines and their applications,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 9, pp. 3571–3582, Sep. 2006. [6] R. Phromloungsri, V. Chamnanphrai, and M. Chongcheawchamnan, “Design high-directivity parallel-coupled lines using quadrupled inductive-compensated technique,” in Asia–Pacific Microw. Conf., 2006, pp. 1380–1383.

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[7] L. F. Franti and G. M. Paganuzzi, “Wideband high directivity microstrip couplers for microwave integrated circuits,” in Proc. 10th Eur. Microw. Conf., Warsaw, Poland, Sep. 1980, pp. 377–381. [8] S. Uysal and H. Aghvami, “Synthesis, design, and construction of ultrawide-band non uniform quadrature directional couplers in inhomogeneous media,” IEEE Trans. Microw. Theory Techn., vol. 37, no. 6, pp. 969–976, Jun. 1989. [9] S.-F. Chang, J.-L. Chen, Y.-H. Jeng, and C.-T. Wu, “New high-directivity coupler design with coupled spurlines,” IEEE Microw. Wireless Compon. Lett., vol. 14, no. 2, pp. 65–67, Feb. 2004. [10] J. Shi, X. Y. Zhang, K. W. Lau, J. X. Chen, and Q. Xue, “Directional coupler with high directivity using metallic cylinders on microstrip line,” Electron. Lett., vol. 45, no. 8, pp. 415–417, Apr. 2009. [11] C.-S. Kim, Y.-T. Kim, S.-H. Song, W.-S. Jung, K.-Y. Kang, J.-S. Park, and D. Ahn, “A design of microstrip directional coupler for high directivity and tight coupling,” in 31st Eur. Microw. Conf., Sep. 2001, pp. 24–26. [12] D. Jaisson, “Multilayer microstrip directional coupler with discrete coupling,” IEEE Trans. Microw. Theory Techn., vol. 48, no. 9, pp. 1591–1595, Sep. 2000. [13] R. Islam and G. V. Eleftheriades, “Printed high-directivity metamaterial MS/NRI coupled-line coupler for signal monitoring applications,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 4, pp. 164–166, Apr. 2006. [14] Y.-H. Chun, J.-S. Hong, J.-Y. Moon, and S.-W. Yun, “High directivity directional coupler using metamaterial,” in 36th Eur. Microw. Conf., Sep. 10–15, 2006, pp. 329–331. [15] S. Lee and Y. Lee, “An inductor-loaded microstrip directional coupler for directivity enhancement,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 6, pp. 362–364, Jun. 2009. [16] S. Lee and Y. Lee, “A design method for microstrip directional couplers loaded with shunt inductors for directivity enhancement,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 4, pp. 994–1002, Apr. 2010. [17] S. Gruszczynski and K. Wincza, “Generalized methods for the design of quasi-ideal symmetric and asymmetric coupled-line sections and directional couplers,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 7, pp. 1709–1718, Jul. 2011. [18] K. Wincza and S. Gruszczynski, “Method for the design of low-loss suspended stripline directional couplers with equalized inductive and capacitive coupling coefficients,” Microw. Opt. Technol. Lett., vol. 51, no. 2, pp. 315–319, Feb. 2009. [19] C. Caloz and T. Itoh, “Array factor approach of leaky-wave antennas and application to 1-D/2-D composite right/left-handed (CRLH) structures,” IEEE Microw. Wireless Compon. Lett., vol. 14, no. 6, pp. 274–276, Jun. 2004. [20] L. Sungjoon, C. Caloz, and T. Itoh, “Metamaterial-based electronically controlled transmission-line structure as a novel leaky-wave antenna with tunable radiation angle and beamwidth,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 1, pp. 161–173, Jan. 2005. [21] L. I-Hsiang, M. DeVincentis, C. Caloz, and T. Itoh, “Arbitrary dual-band components using composite right/left-handed transmission lines,” IEEE Trans. Antennas Propag., vol. 52, no. 4, pp. 1142–1149, Apr. 2004. [22] C. Caloz, A. Sanada, and T. Itoh, “A novel composite right-/left-handed coupled-line directional coupler with arbitrary coupling level and broad bandwidth,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 3, pp. 980–992, Mar. 2004. [23] A. Lai, K. M. K. H. Leong, and T. Itoh, “Infinite wavelength resonant antennas with monopolar radiation pattern based on periodic structures,” IEEE Trans. Antennas Propag., vol. 55, no. 3, pp. 868–876, Mar. 2007.

[24] J. H. Park, Y. H. Ryu, J. G. Lee, and J. H. Lee, “Epsilon negative zerothorder resonator antenna,” IEEE Trans. Antennas Propag., vol. 55, no. 12, pp. 3710–3712, Dec. 2007. [25] J. H. Park, Y. H. Ryu, and J. H. Lee, “Mu-zero resonance antenna,” IEEE Trans. Antennas Propag., vol. 58, no. 6, pp. 1865–1875, Jun. 2010. [26] D. M. Pozar, Microwave Engineering, 3rd ed. New York: Wiley, 2005. [27] K. C. Gupta, R. Garge, I. Bahl, and P. Bhartia, Microstrip Lines and Slotlines, 2nd ed. Norwood, MA: Artech House, 1996.

Aref Pourzadi was born in Tehran, Iran, in 1985. He received the B.S. degree from Azad University, Tehran, Iran, in 2009, and is currently working toward the M.S. degree at the Ferdowsi University of Mashhad, Mashhad, Iran. He is currently with the Computer and Communication Research Center, Ferdowsi University of Mashhad. His current research interests include metamaterials and passive circuitry for microwave applications.

Amir Reza Attari was born in Mashhad, Iran, on September 20, 1971. He received the B.S. and M.S. degrees in electrical engineering from the Sharif University of Technology, Tehran, Iran, in 1994 and 1996, respectively, and the joint Ph.D. degree in electrical engineering from the Sharif University of Technology, Tehran, Iran, and University Joseph Fourier, Grenoble, France, in 2002. In 2004, he joined the Department of Electrical Engineering, Ferdowsi University of Mashhad, Mashhad, Iran, where he is currently an Associate Professor. His research interests are antennas, passive microwave devices, and numerical methods in electromagnetic.

Mohammad Saeed Majedi (S’10) was born in Shiraz, Iran, on May 7, 1983. He received the B.S. degree in electrical engineering from the Ferdowsi University of Mashhad, Mashhad, Iran, in 2006, the M.S. degree in electrical engineering from the Sharif University of Technology, Tehran, Iran, in 2008, and is currently working toward the Ph.D. degree in electrical engineering at Ferdowsi University of Mashhad. He is currently with the Communications and Computer Research Center, Ferdowsi University of Mashhad. His research interests include microwave circuit design, wave propagation, metamaterials, and antenna design.

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Systematic Compact Modeling of Correlated Noise in Bipolar Transistors Jörg Herricht, Paulius Sakalas, Member, IEEE, Mindaugas Ramonas, Michael Schroter, Senior Member, IEEE, Christoph Jungemann, Senior Member, IEEE, Anindya Mukherjee, and Kai Erik Moebus

Abstract—A systematic method for the integration of correlated shot-noise sources into compact models (CMs) is presented, which significantly improves the accuracy of predicted high-frequency noise in transistors. The developed method relies on a system theory approach, and hence, is not limited to specific CM or device type. In this paper, the method is applied to the CM HICUM, which serves a vehicle for verification purposes. The method and its implementation were verified for SiGe heterojunction bipolar transistors based on measured data for frequencies up to 50 GHz, as well as on device simulation data up to 500 GHz, obtained from simulations of both hydrodynamic and a Boltzmann transport model. Index Terms—Boltzmann transport equation (BTE), compact modeling, correlated noise, heterojunction bipolar transistor (HBT), high-frequency (HF) noise, hydrodynamic (HD) model, minimum noise figure (NF).

I. INTRODUCTION

F

OR implementing a high-frequency (HF) system, the design effort and cost of the associated HF front-end circuit modules represent a significant bottleneck. Hence, efficient circuit design and simulation requires so-called compact models (CMs), which capture very accurately the device characteristics over a wide bias, frequency, temperature, and geometry range [1], including such characteristics as noise and distortion that are important figures-of-merit for HF and power applications [2]. The most recent silicon–germanium (SiGe) heterojunction bipolar transistor (HBT) process technology development has Manuscript received March 29, 2012; revised July 30, 2012; accepted August 02, 2012. Date of publication September 17, 2012; date of current version October 29, 2012. This work was supported by BMBF under CATRENE Project RF2THz and by the German Research Foundation under DFG Project SCHR 695/3-1. J. Herricht, M. Schroter, and A. Mukherjee are with the Chair for Electronic Devices and Integrated Circuits (CEDIC), Institut für Grundlagen der Elektrotechnik und Elektronik, Technische Universität Dresden, 01062 Dresden, Germany. P. Sakalas is with the Institut für Grundlagen der Elektrotechnik und Elektronik, Technische Universität Dresden, 01062 Dresden, Germany (e-mail: [email protected]). M. Ramonas is with the State Scientific Research Center, Fundamental Physics, Fluctuation Research Laboratory, Vilnius 01108, Lithuania. C. Jungemann is with the Institut for Theoretische Elektrotechnik, Rheinisch-Westfälische Technische Hochschule (RWTH), Aachen University, 01062 Aachen, Germany. K. E. Moebus is with Texas Instruments Incorporated, Dallas, TX 75243 USA. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2216284

spurred rapidly increasing interest in millimeter-wave and terahertz applications (e.g., [3]). As a consequence, the accurate description of HF noise correlation in CMs has become important for circuit design. However, commercial circuit simulators can only handle uncorrelated noise sources for largesignal models, and access to simulator code by model developers is usually restricted. Some simulators (such as Advanced Design System (ADS) and MWOffice) offer the definition of a frequency-independent noise correlation factor for two-ports, but even this option cannot be applied to CMs with frequencydependent noise correlation. Since today’s advanced CMs are being released in Verilog-A (VA) format, several approaches for implementing HF noise correlation using adjunct networks in large-signal CMs have been published over the past few years [4]–[8]. Unfortunately, these models still exhibit a variety of issues that makes them either inconvenient to use or inaccurate at high frequencies. The approach presented in this paper overcomes these issues in a general way and has been verified against data from both measurements up to 50 GHz and advanced device simulations up to 500 GHz. This paper is organized as follows. After a detailed review of existing HF noise correlation models in Section II, the fundamentals of describing noise in electrical networks are briefly summarized in Section III. The latter concludes with the pitfalls in existing circuit simulators and provides the basics for deriving a systematic and general approach for integrating correlated noise sources in Section IV. This approach is applied to bipolar transistors in Section V with the details of the implementation shown in Section VI. Finally, model verification results are presented in Section VII. II. REVIEW OF THE CORRELATED NOISE REALIZATION IN LARGE-SIGNAL MODELS Generally, VA enables a much faster model development compared to the (classical) coding within a simulator. However, the implementation of certain equations, such as those for non-quasi-static (NQS) effects and correlated noise, into a CM using VA is not straightforward since it has to be done through adjunct networks. To our best knowledge, the first implementation of noise correlation in a CM using VA was presented in [4]. However, the realization of the imaginary part of the correlation did not allow a frequency-dependent analysis and factor made the approach inconvenient for practical applications. Another solution based on a T-equivalent circuit (EC) was published in [7] using collector charge partitioning. However, the latter causes the magnitude of the transconductance, and thus also the power spectral density (PSD) of the collector current, , to increase with frequency rather than to decrease [8], [9].

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Another approach for compact modeling of correlated noise was recently described in [8]. It is based on noise generated in the neutral base and emitter region. Minority carrier noise transport through the base/collector (BC) space charge region (SCR) is assumed, the meaning of which is unclear since there are no minorities in the transfer current transported through the BC SCR. The model is implemented as adjunct RC delay network, which is realized via transformed control sources. The impact of the SCR on the total delay time is modeled using a simplified delay factor . The impact of on the noise behavior depends on the technology. For advanced SiGe HBTs used in this paper, evaluations have shown an impact of at frequencies beyond 500 GHz so that can be neglected. The impact of the factor may be more important in III–V HBTs where the delay in the BC SCR is more pronounced. The deviation of the results with the simplified factor becomes observable beyond 500 GHz and the error reaches just 20% at 1 THz. As will be shown later, for advanced HF SiGe HBTs, the frequency dependence of the collector terminal diffusion noise is due to the influence of hole current noise, but not due to the impact of electron noise related to the transport through the BC SCR. It is an established fact that the noise correlation related time constant is associated with the delay of the transfer current and minority charge [1], [10]. However, although the implementation in [8] uses HICUM as a vehicle, it does not make use of the corresponding NQS delay times, which have been implemented in HICUM/L2 for many years using adjunct networks. Instead, the noise related time constant in [8] is fixed to 75% of the total forward transit time based on a fit of measured data. According to hydrodynamic (HD) model simulation results of the advanced SiGe HBTs shown in Fig. 1, the ratio of the BC SCR and total transit time is about 33% and the ratio of the base transit time to the is 35%. In our CM simulations, we have used 68% of the , which is the sum of the collector and the base transit time. The fixed value of noise delay time to 75% of the related only due to transport through BC SCR results to an error of minimum noise figure (NF) at high frequencies already at current densities below peak , as is shown in the Section VII. An assumption that the transfer time through the BC SCR represents a major portion of in [8] is based on the device simulations with a commercial tool of SiGe HBT with a base layer width nm [11] might be not accurate enough. Well-calibrated HD simulations of the investigated SiGe HBT in this study with even smaller nm show that the transit time portion in the base is of the same order as (Fig. 1) and the noise delay is less than 75% of the . The fixed portion of in the noise model can lead to large discrepancies depending on the technology. For example, the noise delay in the IFX 200-GHz SiGe HBTs is of 33% of the total transit time. The model verification in [8] was performed only up to 26 GHz and for a high-voltage SiGe HBT with of 36 GHz as well as up to 34 GHz for a GaAs HBT with of 36 GHz. Those devices have definitely larger compared to the nm of a referenced device [11] and wider collector. In contrast, as shown in Fig. 1, in advanced millimeter-wave HBT technologies (e.g., [12] and [13]), the transit time components in the emitter and base regions are of the same

Fig. 1. Net doping profile (dashed line) and accumulated transit time (solid mA m V and line) in a 250-GHz SiGeC HBT at V.

order as , and thus have to be considered. The general network theory of noise used in [4]–[6], [8], and [14] was, to our best knowledge, first published in [15]. Based on [15], the basic approach for systematically including noise correlation in a CM was derived and applied to 150-GHz SiGe HBTs in [5] and [6]. As mentioned earlier, this model was still frequency limited due to VA related implementation issues. Therefore, it was extended in [16] and verified toward a wider frequency range (up to 0.5 THz at least) on different advanced SiGe HBT technologies. However, the resulting approximation in the VA implementation still led to a reduced accuracy for frequencies larger than about . This issue was addressed in [16] where an improved implementation was applied to advanced SiGe HBT technologies and proved to be valid for a wider frequency range [17]. As an extension, this paper describes a systematic approach for including noise correlation in CMs in an as simple as possible way and verification on measured noise data up to 50-GHz frequency. The approach is not limited to a specific device type or model. III. NOISE THEORY Noise calculations of linear and time invariant systems (called systems hereinafter) aim at the characterization of such linear systems by e.g., the noise factor or [18]. The latter calculations utilize the output PSD, which is shaped by the number of intrinsic noise sources in the system. Thus, the system shown in Fig. 2(a), consisting of inherent usually correlated noise sources , has to be modeled appropriately. The corresponding model can be derived in the following four steps. Step 1) Linear system in Fig. 2(a) is replaced by the noisefree system shown in Fig. 2(b), which is characterized by noise sources at the input. Step 2) Similar to the algorithm used in circuit simulators, the model in Fig. 2(b) is replaced by the system [shown in Fig. 2(c)] with only one equivalent noise source . The root mean square (rms) output noise value of the new system [see Fig. 2(c)] is the same as for the systems in Fig. 2(a) and (b). The transfer

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simulators utilizing (4). A solution of this problem is proposed in Section IV. Both (3) and (4) are used for the calculation of the noise factor according to (5) as noise of the generator immittance. with Neglecting noise correlation sources overestimates the predicted s of bipolar transistors at high frequencies. The resulting error is visible for operating frequencies of for the 150-GHz SiGe process [5], [6]. Hence, it is desirable to provide CMs in commercial circuit simulators that account for correlated noise sources. Since it is unlikely that the built-in noise calculation in circuit simulators will be modified to allow for an easy integration of correlated noise sources, the model integration has to be adapted to the methods existing in today’s circuit simulators.

Fig. 2. (a) Linear noisy system with noise sources. (b) Noise-free model (a) with noise sources at the input. (c) Model of (b) with one equivalent noise linking the syssource at the input. (d) Schematic of the transfer function tems in (b) and (c).

function , linking the variables in Fig. 2(c), .. .

in Fig. 2(b) to

IV. SYSTEMATIC METHOD FOR CORRELATED NOISE INTEGRATION IN CMs Since commercial circuit simulators can only handle uncorrelated noise sources, an appropriate transformation has to be derived that converts a network with correlated noise sources [cf. Fig. 2(a)] into a modified network with noncorrelated noise sources according to (6)

(1)

where , , and are the equivalent noise source, the transfer matrix, and a column vector of the original inherent noise sources, respectively. A visualization of (1) is shown in Fig. 2(d). Step 3) The analytical calculation of the transfer function by means of symbolic methods originating from the alternating current theory, yielding (1). Step 4) The PSD at the system output is calculated according to [5], [6] (2) and are the adjoint transfer where and input PSD matrices, respectively, the -matrix of the autocorrelated PSD and cross-correlated PSD for the inherent noise sources. Solving (2) yields (3) This equation can be further simplified for the special case of a system with uncorrelated noise sources, resulting in (4) The above equation is similar to the basic noise equation used in commercial circuit simulators [19]. Obviously, the correlation of inherent noise sources cannot be captured in commercial

where is the appropriate transformation matrix to be determined according to the following requirements. 1) The resulting transfer matrix should retain all elements from unchanged (i.e., no additional factors) so that the immittance of the original network is preserved. 2) Consequently, can include additional summands only. The latter can be represented as controlled sources. 3) The modified network should be easy to derive based on the original one. As a consequence, the main diagonal of the transformation matrix is populated by 1s only. For the sake of an easy and unique calculation, is defined as an upper triangular matrix reading

.. .

.. .

..

.

.. .

(7)

where represent the factors of the additional sources. The transformation principle is illustrated with the help of a system with one output and two inputs, as shown in Fig. 3(a). Such a system represents the noise correlation model in bipolar and unipolar transistors. The transformation must not change (2) as is evident from Fig. 3 and (1), which is determined according to Fig. 3(b). Thus, (8)

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. Thus, the elements of the off-diagonals in (11) have to be zero, yielding the desired factor (14) of the additional controlled source . Note that and following [cf. (2)] are PSD matrices and have nothing to do with well-known -parameters. Inserting (14) into (11) yields

(15) According to (6), the correlated noise sources and can now be transformed into uncorrelated noise sources and and an additional controlled source (16)

Fig. 3. (a) System with one output and two inputs. (b) Transformation principle. (c) System after transformation with one output and two transformed inputs.

where and are the transformed transfer matrix and the transformed inputs, respectively. Equation (6) is of special importance when constructing the EC diagram for the model later on. Based on (2), this yields for the middle part of Fig. 3(b), (9) with [for the left part of Fig. 3(b)] (10) which is supposed to be a diagonal matrix whose main diagonal consists of -elements only (modified PSD1). The -elements follow from (10) and read for the present system

(11) From Fig. 3(c), it follows that (12) After inserting

, this results in

This equation is especially important when deriving the resulting EC for the presented approach and can be interpreted as follows. • is replaced by the sum of and . • is replaced by . While integrating the sum replacing into the EC network, one has to pay attention to the type of correlated noise sources that exist in the system before they are replaced by uncorrelated noise sources and additional controlled sources. The two different source types (current and voltage sources) allow for the following four different flavors. 1) Noise voltage source correlated with noise voltage source . The sum is a series connection of and the voltage-controlled voltage source (VCVS) . The factor is dimensionless. 2) Noise voltage source correlated with noise current source . The sum is a series connection of and the current-controlled voltage source (CCVS) . The factor is a transimpedance with the unit . 3) Noise current source correlated with noise current source . The sum is a parallel connection of and the current-controlled current source (CCCS) The factor is dimensionless. 4) Noise current source correlated with noise voltage source . The sum is a parallel connection of and the voltage-controlled current source (VCCS) . The factor is a transadmittance with the unit S. The proposed approach can be extended for use with correlated noise sources. The factor is then calculated recursively,

(13) and recovers (2). The off-diagonals of the input matrix are populated with zeros only in case the noise sources are uncorrelated [cf. (4)]. The same condition is applied to the diagonal matrix

(17) where for the

and

(18)

1The

modified PSDs are denoted as -elements for the sake of a clear distinction from the original PSDs. This is necessary because the transformation may change the PSD’s properties.

. The recursion formula

-elements reads

where

.

HERRICHT et al.: SYSTEMATIC COMPACT MODELING OF CORRELATED NOISE IN BIPOLAR TRANSISTORS

V. HBT NOISE CORRELATION MODEL COMMERCIAL CIRCUIT SIMULATOR

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FOR

The previously described approach is applied to the van der Ziel noise model of a bipolar transistor [20]. This requires the conversion (including PSDs) of the injection-based T-circuit of the actual noise model into the practically more useful transportbased -circuit. The conversion is given in [20] and [21]. The resulting PSDs are valid for the shot-noise sources and depicted in Fig. 5 and are detailed below. 1) PSD of the base shot-noise source (19) Fig. 4. Power spectral densities of collector terminal current noise versus fremA m V and V, calculated quency at with a Galene III HD model for [12] device.

dc base current through internal BE diode; dc current gain of internal transistor in common emitter configuration; ratio ( 0.5) of minority charge related NQS delay time to ; forward base transit time of the internal transistor. 2) PSD of the collector shot-noise source (20) dc transfer current 3) Cross PSD (correlation between

. and

) (21)

Fig. 5. Noise model of the intrinsic HBT with correlated noise sources and after [20] and [21]. Note: , , and .

Ratio ( 1) of transfer current related NQS delay time to the small-signal transfer current. Strong frequency dependence of the PSD of the collector terminal current fluctuations for idealistic SiGe HBT with a base layer width of nm in [8] was explained by the dominant delay in the BC SCR. Fig. 4 shows the frequency dependence of the collector terminal fluctuation spectral density, simulated with a Galene III HD solver for investigated technology SiGe:C HBTs. The main contribution to the frequency dependence of diffusion noise (cf. solid line in Fig. 4) comes from the collector current fluctuations due to hole scattering in the device. The electron part of the terminal noise itself (cf. dashed line in Fig. 4) is weakly frequency dependent and saturates at very HF. This is typical for SiGe HBTs and justifies the usage of (20). The model in [8] considers for electrons only the impact of the conduction current in the BC SCR region while ignoring the capacitive effect of the SCR, which is also part of the Ramo-Shockley theorem [22]. The comparatively weak roll-off of the terminal PSD of the electron current fluctuations in a broad frequency range (Fig. 4) shows that the delay in the BC SCR takes place, but it is not the dominant one in total . Thus, the factor used in [8] can be neglected. For the nm SiGe: C HBTs, and should be considered, as is seen in Fig. 1 Nevertheless, the model in [8] may be a good approach for III–V HBTs

Fig. 6. Noise model of the intrinsic transistor with all uncorrelated noise at the input, for representing the sources including an additional CCCS indicates that the CCCS at node 1 is controlled impact of the correlation. ( by the noise current source at node 2. Likewise, the reversed case (CCCS at the output) may be considered without loss of generality, but one has to use . The variable to be used can be chosen based on the simplicity of the resulting terms.)

due to intervalley electron scattering related increased delay in the BC SCR [23], [24]. The systematic development of an HBT noise model with uncorrelated noise sources relies on (19)–(21) for the PSD and the model shown in Fig. 5. According to flavor 3 described earlier, has to be replaced by the parallel connection of and the CCCS , while is simply set to . The resulting model is shown in Fig. 6. A comparison of the models in Figs. 5 and 6 again yields (16). The factor and the -elements utilized by the model depicted in Fig. 6 are calculated after (14) and (15), respectively.

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In order to ensure the comparability with respect to the derivation in Section II, the PSD (19)–(21) are merged in a single 2 2 matrix representing the PSDs at the input (22) The factor of controlled source reads according to (14) (23) where

. The

-elements reads according to (15) Fig. 7. VA code of the noise correlation model.

(24) which results in

(25) where

and (26)

Note that the radicand has to satisfy the condition , resulting in . Theoretically this condition is fulfilled [25] since the ratio holds regardless of drift or diffusion transport and since . In practice, the condition has to be enforced during parameter extraction. Equations (23), (25), and (26) are the basis for the new model implementation using VA, which is described below. VI. MODEL IMPLEMENTATION It is advantageous to consider the specifics of both circuit simulators and programming language before implementing the model equations using VA. Circuit simulators calculate an overall PSD, which, instead of using (4), is calculated as (27) Thus the realization of via VA is complicated by squared magnitude of the product of the transfer function and the square root of the PSD . In contrast, (4) would require to implement the -elements only, leading to a simpler algebraic equation. Thus far, model development has been carried out in the frequency domain, whereas circuit simulators are based on solving finite-difference equations. This has to be taken into account when deriving reactive components. In order to solve the described problem, the square roots of the -elements are calculated according to (27) instead of using the original -elements. The square roots of (25) and (26) read (28) and (29)

Equations (23), (28), and (29) can be easily integrated into VA code of any HBT CM including HICUM v2.31, as shown in Fig. 7. The functions “white_noise” assigns a frequency-independent noise source to the equivalent circuit. Furthermore, the variables “betadc,” “ibei,” “it,” “alit,” “alqf,” respectively, correspond to the variables and , respectively, in (19)–(21). The VA code is then automatically compiled, e.g., within an Agilent ADS circuit simulator.

VII. CORRELATED NOISE MODEL VERIFICATION The experimental verification of the new noise model is a challenging task. Modern process technologies with peak values beyond 250 GHz exhibit a correlation of base and collector shot noise for frequencies beyond 20 GHz, while most noise measurement setups cover frequencies only up to 20 GHz. In this paper, noise measurements were performed up to 50 GHz. Moreover, for faster process technologies, such as those in [3], [12], and [13], the verification was extended to 500 GHz by employing advanced device simulation. The implemented noise correlation model was verified for measured data in a frequency range of 1–50 GHz [16], [17] for both a 0.18- m SiGe–BiCMOS process with peak GHz [26] and a 0.13- m SiGe-BiCMOS process featuring peak values of 250 GHz [12]. Since the results for the first mentioned process are very similar to those in [16] and [17], only results for the latter process are shown below. The investigated SiGe:C HBT has an emitter area of m . For verifying the new compact noise correlation model up to very high frequencies beyond available on-wafer noise measurement capabilities, 2-D device simulation with advanced transport models were employed. Here, the solution of the Boltzmann transport equation (BTE) serves as the ultimate reference, while HD transport allows faster simulation for, e.g., CM parameter extraction. Both the BTE solver SHE [27] and the HD simulator Galene III [28] were calibrated during the recently completed DOTFIVE project and include noise contributions from the electron and hole scattering in the conduction and valence bands, as well as from Shockley–Read–Hall recombination and impact ionization. The noise was calculated from the HD simulation using a Langevin-type model. The

HERRICHT et al.: SYSTEMATIC COMPACT MODELING OF CORRELATED NOISE IN BIPOLAR TRANSISTORS

Fig. 8. Forward Gummel plot. Open circles and triangles represent measured V. m . data

Fig. 9. versus collector current density. Open symbols are measured data, solid line is HICUM, stars are HD, black triangles are BTE.

doping profile used for building the 2-D structure was based on a SIMS profile of the SiGe:C HBT. As an extension to the comparisons for the intrinsic device presented in [17], the external parasitic capacitances and series resistances were taken into account in the HD results and partially (only resistive parasitics are included) also in the BTE results. Fig. 8 shows the measured forward Gummel characteristics and Fig. 9 shows the corresponding transit frequency . These characteristics are compared to data obtained from both device simulation and HICUM/L2. For the collector current and , all models yield good agreement with the experimental data, thus establishing the basis for noise verification far beyond the frequency limit of the available noise measurement equipment. The accurate prediction of the base current from device simulation is always difficult due to usually unknown transport parameters at the emitter contact. Here, only the CM is able to describe the measurements accurately over a large bias range. Note that a similar level of agreement has also been obtained for the maximum oscillation frequency and the -parameters, which are not shown here due to the lack of space. Noise measurements were carried out with the automated tuner systems MT982E (1–8 GHz) and MT984A01 (8–50 GHz) from Maury Microwaves. The noise parameters were de-embedded to DUT level using a correlation matrix technique. The bias point for measuring and comparing the noise parameters was selected at V and mA m . This is slightly below peak , where the thermal noise of the base

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Fig. 10. Minimum NF versus frequency at mA m and V. Open circles are measured data, the dashed line is the results of the noise model without correlation, and the dotted line (“RC delay”) is the results of the model in [8].

resistance is already somewhat reduced leading to a higher relative contribution of the collector and base short noise with their correlation. Fig. 10 shows the minimum NF as a function of frequency. Both device simulation (BTE, HD) and CM with correlation (HICUM) agree very well with the measured data up to 50 GHz. HICUM remains very close to the device simulation even far beyond the measurement limit. Turning off the noise correlation (labeled with “no corr”) leads to a significant deviation above about 15 GHz that increases with frequency. The error becomes about 80% at 100 GHz compared to measured data, implying that including correlation is required for accurate noise parameter predictions in millimeter-wave and terahertz circuit design. Also note that the noise modeling approach from [8] deviates by more than 2 dB at 500 GHz. This is probably due to inconsistent fitting parameter (based on simulated delay distribution in SiGe with a very short nm [11]). Model [8] was also applied to other high-speed technologies described in [17] and [24], and in all the cases, was underestimated The equivalent noise resistance in Fig. 11 varies only a little with frequency, indicating a fairly constant transistor input impedance up to about 100 GHz. All models agree with the experimental data within the uncertainties of both measurements and device simulation. HD simulation and HICUM with noise correlation appear to describe the measurement a little better than the BTE. The observed difference is caused by missing the capacitive external parasitics in the BTE data. Above about 100 GHz, the models start deviating from each other, with HICUM having a somewhat different shape of the increase with frequency than both HD and BTE, which differ much less in shape. The cause of this difference is still unknown and may be related to the fact that HICUM equations are based on drift-diffusion transport. Fig. 12 shows the phase and magnitude of the optimum source reflection coefficient as a function of frequency. For the magnitude at low frequencies, HICUM results are on top of the measured data, while HD results show about 7% deviation. At higher frequencies, the HD results start to coincide with the measurements and appear to continue with them beyond the measurement equipment limit. For the phase, device simulation and CM agree very well at low

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Fig. 11. Noise resistance versus frequency at V.

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 11, NOVEMBER 2012

mA

m and

Fig. 13. Minimum NF, , and noise resistance GHz. versus collector current density at

(normalized to 50 )

the associated shot noise start to dominate and cause the correlation to become relevant, while the results of the new model are in between HG and BTE. Model [8] at 10 GHz shows good agreement with HICUM in this paper, and thus is not shown in Fig. 13. Since the presented noise correlation model employs the total transit time along with both minority charge and transfer current related NQS delay factors, it is also valid for other types of HBTs, including high-voltage versions and those based in III–V materials. The model has already been experimentally verified for InP-based HBTs. Fig. 12. Phase and magnitude of optimum source reflection coefficient versus frequency at mA m and V.

frequencies, but start to exhibit slight deviations at very high frequencies. In general, for calculating the , four noise parameters (e.g., , , , and ) are needed. These can be obtained from transferring the internal noise sources to the two equivalent noise sources and at the input port. The resulting chain matrix representation contains the PSDs and cross-PSDs for calculating the noise parameters. The expression for contains , , and , while the equivalent noise resistance only depends on , and contains only and . Therefore, especially for , the impact of the internal noise source correlation is weaker than for at frequencies up to about 100 GHz. Beyond this limit, the impact of the correlation becomes pronounced even in . Fig. 13 shows and as a function of collector current density at 10 GHz. Good agreement of the model for bias-dependent and up to 30 GHz was demonstrated in [17]. At higher frequencies, due to increased losses and lower device gain, the bias dependence of and is difficult to measure, especially at lower bias. Therefore, for covering an as broad as possible current range, the comparison between HICUM, device simulation, and measured and are shown here at 10 GHz. At low current densities, the agreement with measurements is excellent for all models, including the CM without correlation. However, the latter increasingly deviates beyond about mA m since the minority charge and

VIII. CONCLUSIONS A systematic method for including noise correlation into CMs was presented. The resulting adjunct network is simple and overcomes the frequency related limitations of previous models. The developed method relies on a system theory approach, and hence, is not limited to a specific CM or device type and can be used with any (commercial) circuit simulator. The derived approach was implemented in the CM HICUM/L2, which served as a vehicle for verification purposes. Comparison of the new model within HICUM to experimental data of a 250-GHz SiGe:C HBT yields excellent agreement up to 50 GHz. Model verification was further extended beyond the measurement equipment capability by employing calibrated advanced device simulation. The comparison to data obtained from solutions of both an HD and a Boltzmann transport model exhibits very good agreement even up to 500 GHz. Note that the noise model validity is not limited to 500 GHz. Turning off the noise correlation leads to large deviations (e.g., 80% at 100 GHz) in the minimum NF at higher frequencies (beyond about 15 GHz) and higher collector current densities. This clearly shows that HF noise correlation has to be taken into account for HF circuit design. ACKNOWLEDGMENT The authors are thankful to P. Chevalier, D. Celi, and A. Chantre, all with ST Microelectronics, Crolles, France, for providing wafers. The authors also thank B. Ardouin, XMOD Technologies, Bordeaux, France, for support with HICUM model parameter extraction and W. Schwarz, Technische Universität Dresden, Dresden, Germany, for discussions on system

HERRICHT et al.: SYSTEMATIC COMPACT MODELING OF CORRELATED NOISE IN BIPOLAR TRANSISTORS

theory. S. M. Hong, Universität der Bundeswehr München, Munich, Germany, is acknowledged for BTE simulations. The authors are also extend thanks to the Allstron Corporation, Taoyuan, Guey Shan County, Taiwan, for their support with the HF probes. The IEEE MTT-14 Low Noise Techniques Subcommittee is acknowledged for helpful discussions. REFERENCES [1] M. Schroter and A. Chakravorty, Compact Hierarchical Bipolar Transistor Modeling with HICUM. Singapore: World Sci., 2010. [2] , J. D. Cressler, Ed., The Silicon Heterostructure Handbook. New York: CRC, 2005. [3] M. Schroter, G. Wedel, B. Heinemann, C. Jungemann, J. Krause, P. Chevalier, and A. Chantre, “Physical and electrical performance limits of high-speed SiGeC HBTs—Part I: Vertical scaling,” IEEE Trans. Electron Devices, vol. 58, no. 11, pp. 3687–3696, Nov. 2011. [4] C. C. McAndrew, G. Coram, A. Blaum, and O. Pilloud, “Correlated noise modeling and simulation,” in Proc. WCM, 2005, pp. 10–45. [5] J. Herricht, “Beiträge zur verbesserten Modellierung von Rauschen und nichtlinearen Verzerrungen in integrierten Bauelementen und Hochfrequenzschaltungen,” Dr.-Ing. thesis, Fakultät Elektrotech. Informationstech., TU Dresden, Dresden, Germany, 2006. [6] P. Sakalas, J. Herricht, A. Chakravorty, and M. Schroter, “Compact modeling of high frequency noise correlated noise in HBTs,” in Proc. IEEE Bipolar BiCMOS Circuits Technol. Meeting, 2006, pp. 279–282. [7] M. Rudolph, F. Korndörfer, P. Heinemann, and W. Heinrich, “Compact large-signal shot-noise model for HBTs,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 1, pp. 7–14, Jan. 2008. [8] K. Xia, G. Niu, and Z. Xu, “A new approach to implementing highfrequency correlated noise for bipolar transistor compact modeling,” IEEE Trans. Electron Devices, vol. 59, no. 2, pp. 302–308, Feb. 2012. [9] J. Jacob, A. DasGupta, M. Schroter, and A. Chakravorty, “Modeling non-quasi-static effects in SiGe HBTs,” IEEE Trans. Electron Devices, vol. 57, no. 7, pp. 1559–1566, Jul. 2010. [10] K. Kumar and A. Chakravorty, “Modeling high-frequency noise in SiGe HBTs using delayed minority charge,” in IEEE Bipolar BiCMOS Circuits Technol. Meeting, 2011, pp. 184–187. [11] K. A. Moen, J. Yuan, P. S. Chakraborty, M. Bellini, J. D. H. Ho, H. Yasuda, and R. Wise, “Improved 2-D regional transit time analysis for optimized scaling of SiGe HBTs,” in Proc. IEEE Bipolar BiCMOS Circuits Technol. Meeting, 2010, pp. 257–260. [12] G. Avenier, M. Diop, P. Chevalier, G. Troillard, N. Loubet, J. Bouvier, L. Depoyan, N. Derrier, M. Buczko, C. Leyris, S. Boret, S. Montuclat, A. Margain, S. Pruvost, S. T. Nicolson, K. H. Yau, N. Revil, D. Gloria, D. Dutartre, S. P. Voinigescu, and A. Chantre, “0.13 m SiGe BiCMOS technology fully dedicated to mm-wave applications,” IEEE J. SolidState Circuits, vol. 44, no. 9, pp. 2312–2321, Sep. 2009. [13] B. Heinemann, R. Barth, D. Bolze, J. Drews, G. G. Fischer, A. Fox, O. Fursenko, T. Grabolla, U. Haak, D. Knoll, R. Kurps, M. Lisker, S. Marschmeyer, H. Rücker, D. Scmidt, M. Schubert, R. Tillack, C. Wipf, D. Wolansky, and Y. Yamamoto, “SiGe HBT technology with of 300 GHz/500 GHz and 2.0 ps CML gate delay,” in Int. Electron Devices Meeting Tech. Dig., 2010, pp. 688–691. [14] Z. Xu, G. Niu, and R. M. Malladi, “Compact modeling of collector base junction space charge region transit time effect on noise in SiGe HBTs,” in IEEE Silicon Monolithic Integr. Circuits in RF Syst. Top. Meeting, 2010, pp. 180–183. [15] G. Elst and H. Schreiber, “Rauschanalyse linearer Netzwerke mit korrelierten Rauschquellen,” Nachrichtentech. Elektron., Berlin, Germany, 34, Nr. 11, 1984, pp. 428–430. [16] P. Sakalas and J. Herricht, “High frequency noise in SiGe HBTs, practical modeling, challenges,” in IEEE MTT-S Int. Microw. Symp. SiGe HBTs Towards THz Operation Workshop, 2010. [Online]. Available: http://www.ims2010.org/pdf/program_book_2010.pdf, [CD ROM]. [17] P. Sakalas, J. Herricht, M. Ramonas, and M. Schroter, “Noise modeling of advanced technology high speed SiGe HBTs,” in Proc. IEEE Bipolar BiCMOS Circuits Technol. Meeting, 2010, pp. 169–172. [18] H. A. Haus, W. R. Atkinson, G. M. Branch, W. B. Davenport, H. A. Fonger, W. A. Harris, W. W. Harrison, W. W. McLeod, E. K. Stodola, and T. E. Talpey, “Representation of noise in linear twoports,” Proc. IRE, vol. 48, no. 1, pp. 69–74, Jan. 1960. [19] R. Rohrer, L. Nagel, R. Meyer, and L. Weber, “Computationally efficient electronic-circuit noise calculations,” IEEE J. Solid-State Circuits, vol. SSC-6, no. 4, pp. 204–213, Apr. 1971.

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[20] A. van der Ziel and G. Bosman, “Accurate expression for the noise temperature of common emitter microwave transistors,” IEEE Trans. Electron Devices, vol. ED-31, no. 9, pp. 1280–1283, Sep. 1984. [21] A. van der Ziel, Noise in Solid State Devices and Circuits. New York: Wiley, 1986. [22] H. Kim, H. Min, T. W. Tang, and Y. J. Park, “An extended proof of the Ramo–Schockley theorem,” Solid State Electron., vol. 34, pp. 1251–1253, 1991. [23] P. Sakalas, M. Schröter, and P. Zampardi, “Investigation of shot noise reduction mechanism in InGaP with different base thickness,” in Proceedings of the 18th International Conference Noise and Fluctuations, T. Gonzalez, J. Mateos, and D. Pardo, Eds. College Park, MD: Amer. Inst. Phys., 2005, pp. 303–306. [24] A. Shimukovitch, P. Sakalas, P. Zampardi, M. Schröter, and A. Matulionis, “Investigation of electron delay in the base on noise performance in InGaP heterojunction bipolar transistors,” Phys. Status Solidi RRL 4, vol. 11, pp. 335–337, 2010. [25] J. te Winkel, “Drift transistor, simplified electrical characterization,” Radio Electron. Eng., vol. 36, pp. 280–288, 1957. [26] M. Racanelli, K. Schuegraf, A. Kalburge, A. Kar-Roy, B. Shen, C. Hu, D. Chapek, D. Howard, D. Quon, F. Wang, G. U’ren, L. Lao, H. Tu, J. Zheng, K. Bell, K. Yin, P. Joshi, S. Akhtar, S. Vo, T. Lee, W. Shi, and P. Kempf, “Ultra high speed SiGe NPN for advanced BiCMOS Technology,” in Int. Electron Devices Meeting Tech. Dig., 2001, pp. 336–339. [27] S.-M. Hong and C. Jungemann, “Electron transport in extremely scaled SiGe HBTs,” in Proc. IEEE Bipolar BiCMOS Circuits Technol. Meeting, 2008, pp. 67–74. [28] C. Jungemann, B. Neinhüs, S. Decker, and B. Meinerzhagen, “Hierarchical 2-D DD and HD noise simulations of Si and SiGe Devices—Part I: Theory,” IEEE Trans. Electron Devices, vol. 49, no. 7, pp. 1250–1257, Jul. 2002. Jörg Herricht received the Ing. degree in industrial electronics from the Ingenieurschule für Elektrotechnik und Maschinenbau Lutherstadt Eisleben, Lutherstadt Eisleben, Germany, in 1991, and the Dipl.-Ing. and Dr.-Ing. degrees from the Technische Universität Dresden, Dresden, Germany, in 1996 and 2006. Since April 2000, he has been with the Institut für Elektrotechnik und Elektronik, Technische Universität Dresden. His research interests concern HF noise and nonlinear distortion compact and device level modeling, system theory, and circuit design in general.

Paulius Sakalas (M’06) received the Ph.D. degree in physics and mathematics from Vilnius State University, Vilnius, Lithuania, in 1990. In 1983, he joined the Fluctuation Phenomena Laboratory, Semiconductor Physics Institute, Lithuanian Academy of Sciences, Vilnius, Lithuania. In 1991, he was a Quest Researcher with the Eindhoven University of Technology. In 1996 and 1997, he was a Visiting Scientist with the Physical Electronics Laboratory and Photonics and Microwave Laboratory, Chalmers University of Technology, Göteborg, Sweden. From 1998 to 1999, he was a Guest Research with CNET France Telecom, Grenoble, France. From 1999 to 2000, he was with the Microwave Electronics Laboratory, Chalmers University of Technology, where he was involved with HF noise in MOSFETs, pseudomorphic HEMTs (pHEMTs), and monolithic microwave integrated circuits (MMICs). He is currently one of the leading Scientists with the Fluctuation Research Laboratory, Semiconductor Physics Institute, State Center for Physical Sciences and Technology, Vilnius, Lithuania. He is also currently a Senior Research and Laboratory Manager with the Institute für Electrotechnik und Electronik, Technische Universität Dresden, Dresden, Germany. He has authored or coauthored over 110 papers and conference proceedings. He is a Reviewer for European Microwave Week, Microwave Journal, Solid State Electronics, and the International Journal of Microwave Science and Technology. He is a Lead Guest Editor for the Hindawi Publishing Corporation “Special Issue on Carbon Nanotube and Graphene Transistors for High Frequency Applications.” His research interests concern HF measurements, calibration issues, noise, load–pull measurements, cryogenic measurement, compact and device level modeling of microwave and low-frequency noise, power characteristics in SiGe, AIIIBV HBTs, HEMTs, MOSFETs, carbon nanotube transistors, and low-noise amplifiers (LNAs). Dr. Saklas is a permanent member of the IEEE MTT-14 Low Noise Techniques Subcommittee. He has organized three workshops within the frame of

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the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS): San Francisco, CA (2006), “Noise in SiGe and III–V HBTs and circuits: Opportunities and challenges,” Boston, MA (2009), “State-of-the art of low-noise III–V narrow bandgap and silicon FET technologies for low-power applications,” Anaheim, CA (2010), and “SiGe HBTs towards THz operation.” He was a member of the 2004 Technical Program Committee (TPC), SPIE Symposium on Fluctusations and Noise, Conference Noise and Information in Nanoelectronics, Sensors and Standards. He is a reviewer for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, the IEEE TRANSACTIONS ON ELECTRON DEVICES, and the IEEE JOURNAL OF SOLID-STATE CIRCUITS.

Mindaugas Ramonas received the M.S. and Ph.D. degrees in physics from the Vilnius University, Vilnius, Lithuania. in 1998 and 2003, respectively. He is currently a Senior Research Fellow with Fluctuation Research Laboratory, Semiconductor Physics Institute, State Center for Physical Sciences and Technology, Vilnius, Lithuania. From 2006 to 2011, he was on a leave at the Bundeswehr University München, Munich, Germany. He currently works in cooperation with Rheinisch-Westfälische Technische Hochschule (RWTH) Aachen University, Aachen, Germany. His main research interests are Monte Carlo modeling of electron transport and noise in semiconductor materials and physics-based numerical device modeling.

Michael Schroter (M’93–SM’08) received the Dr.-Ing. degree in electrical engineering and “venia legendi” degree in semiconductor devices from the Ruhr-University Bochum, Bochum, Germany, in 1988 and 1994, respectively. Until 1996, he was with Nortel and Bell Northern Research, Ottawa, ON, Canada, as a Team Leader and Advisor prior to joining Rockwell (later Conexant), Newport Beach, CA, where he managed the RF Device Modeling Group. Since 1999, he has been a Full Professor with the Technishe Universität Dresden (TUD), Dresden, Germany, and a Research Professor with the University of California at San Diego, La Jolla. He is a cofounder of XMOD Technologies, Bordeaux, France. During a two-year leave of absence from TUD (2009–2011), as Vice President of RF Engineering with RFNano, Newport Beach, CA, he was responsible for the device design of the first production-type carbon-nanotube field-effect transistor (FET) process technology. He was on the Technical Advisory Board of RFMagic (now Entropic Inc.), a communications system design company in San Diego, CA. He was the Technical Program Manager for DOTFIVE (2008–2011) and has assumed the same role for DOTSEVEN (2012–2016), which are large European research projects for advancing high-speed SiGe HBT technology towards terahertz applications. He authored the standard bipolar transistor compact model HICUM. He coauthored Compact Hierarchical Modeling of Bipolar Transistors with HICUM, a textbook on bipolar transistors, as well as over 140 peer-reviewed publications and four textbook chapters. Dr. Schroter is a member of the ITRS RF-AMS Subcommittee and the BCTM Subcommittee on Modeling and Simulation.

Christoph Jungemann (M’97–SM’06) received the Dipl.-Ing. and Dr.-Ing. degrees in electrical engineering from Rheinisch-Westfälische Technische Hochschule (RWTH) Aachen University, Aachen, Germany, in 1990 and 1995, respectively, and the “venia legendi” degree in “theoretische elektrotechnik” from the University of Bremen, Bremen, Germany, in 2001. From 1990 to 1995, he was a Research and Teaching Assistant with the Institut für Theoretische Elektrotechnik, RWTH, Aachen University. From 1995 to 1997, he was with the Research and Development Facility, Fujitsu Ltd., Kawasaki, Japan. From 1997 to 2002, he was a Chief Engineer with the Institut für Theoretische Elektrotechnik und Mikroelektronik, University of Bremen. From 2002 to 2003, he spent a one-year sabbatical with the Center for Integrated Systems, Stanford University, Stanford, CA. From 2003 to 2006, he was a Research Associate with the Technical University Braunschweig, Braunschweig, Germany. From 2006 to 2011, he was a Professor of microelectronics with Bundeswehr University, Munich, Germany. Since 2011, he has held the Chair of Electromagnetic Theory with RWTH, Aachen University. His main research interests include physics-based simulation of semiconductor devices, transport in inversion layers, and noise modeling. Dr. Jungemann was an editor of the IEEE TRANSACTIONS ON ELECTRON DEVICES (2007–2010). He was a corecipient of the 2005 IEEE Electron Devices Society Paul Rappaport Award.

Anindya Mukherjee received the B.Tech and M.Tech degrees in electronics engineering from the University of Calcutta, Kolkata, India, and is currently working toward the Ph.D. degree at the Chair for Electron Devices and Integrated Circuits, Technische Universität Dresden, Dresden, Germany. Prior to joining the Technische Universität Dresden, he was with Astra Microelectronics, Hyderabad, India.

Kai Erik Moebus received the Dipl.-Ing. and Dr.-Ing. degrees in electrical engineering on semiconductor devices from the Chair for Electron Devices and Integrated Circuits, Technische Universität Dresden, Dresden, Germany in 2006 and 2011, respectively. In 2011, he joined the Advanced CMOS Group, SPICE Modeling Laboratory, Texas Instruments Incorporated, Dallas, TX, as a SPICE Modeling Specialist. His main research interests include bipolar transistor optimization in process and circuit development, high-voltage MOSFETs (focusing on CM development and geometry-dependent parasitics), as well as thermal modeling of power semiconductor devices (especially deep trench isolation (DTI)/silicon-on-insulator (SOI) structures and the metallization influence).

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A Monolithic AlGaN/GaN HEMT VCO Using BST Thin-Film Varactor Cen Kong, Hui Li, Xiaojian Chen, Shuwen Jiang, Jianjun Zhou, and Chen Chen

Abstract—A monolithic AlGaN/GaN HEMT voltage-controlled oscillator (VCO) using a barium–strontium–titanate (BST) thin-film varactor is presented. The fabrication process of the VCO is fully compatible with the standard process of GaN HEMT monolithic microwave integrated circuits (MMICs). An improved equivalent circuit model of the fabricated BST varactor for microwave application was developed for the MMIC VCO circuit design. The experiment MMIC VCO exhibits 1-GHz tunable bandwidth at the central frequency of 7 GHz when the BST varactor bias changed from 0 to 24 V. An output power of 17 dBm and phase noise of 81 dBc/Hz (at offset of 100 kHz) are obtained at drain bias of 8 V and BST varactor of 0 V. The results indicate that the monolithic BST varactor is suitable for microwave application, and the integration of the BST varactor can be successfully applied to develop various tunable GaN MMICs. Index Terms—AlGaN/GaN HEMT, barium–strontium–titanate (BST) varactor, monolithic microwave integrated circuit (MMIC) process, monolithic voltage-controlled oscillator (VCO).

I. INTRODUCTION

B

ARIUM–STRONTIUM–TITANATE (BST) is a well-known ferroelectric material with its excellent electrical characteristics at microwave frequencies of large electric-field dependent permittivity and low dielectric loss. It has been widely used in the past to build voltage tunable capacitors for tuning elements in various tunable filters, phase shifters, oscillators, and delay lines [1], [2]. Due to its good linearity and excellent microwave noise properties, AlGaN/GaN HEMTs are attractive not only for high power amplifiers (PAs), but also for low phase-noise voltage-controlled oscillators (VCOs) and low-noise amplifiers (LNA). Therefore, gallium–nitride (GaN)-based monolithic microwave integrated circuits (MMICs) has become increasingly important for future communication systems [3]. VCOs are perhaps one of the most ubiquitous elements in all the communication systems, wired or wireless. In a wireless Manuscript received February 14, 2012; revised June 19, 2012; accepted July 02, 2012. Date of publication August 13, 2012; date of current version October 29, 2012. This paper is an expanded paper from the IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), Beijing, China, November 30, 2011. C. Kong, H. Li, X. Chen, J. Zhou, and C. Chen are with the Science and Technology on Monolithic Integrated Circuits and Modules Laboratory, Nanjing Electronic Devices Institute, Nanjing 210016, China (e-mail: [email protected]; [email protected]). S. Jiang is with the State Key Laboratory of Electronic Thin-Film and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2209442

system, the quality of communication links is largely dependent on the performance of VCOs [4], [5]. The figure-of-merit of the VCO is primarily determined by the quality of the used capacitor and the RF voltage that can be applied across the capacitor [6]. Generally, a reversed-bias semiconductor junction is typically used as the tuning capacitor in a VCO, wherein the applied voltage changes the depletion width, and hence, the tuning capacitance. Hence, the varactor must operate carefully in the reversed-bias region to avoid forward conduction and excess shot noise. There is a limit to the RF voltage swing that can be impressed upon the capacitor, and this imposes an inherent limitation on the lowest achievable phase noise in the VCO [7]. This is in sharp contrast to the BST varactor, which can handle high RF voltage swings because there is no equivalent of a forward-biased junction, as in the case of the conventional semiconductor varactor. Besides, the factor of a semiconductor varactor is improved with bias increasing. Thus, while increased resonator is desirable, the increased RF voltage peak plus dc tuning voltage risks forward biasing the semiconductor junction. This is known as the junction-bias effect and can be normally minimized by using an array of back-to-back varactors. The BST varactor does not suffer this consequence, but until now, many BST-based VCO circuits were realized by integrating the BST varactor in a hybrid manner [8], [9]. The integration of BST varactor monolithically into GaN MMICs is very promising for multifunction MMIC development. However, there are certain difficulties about this integration process. First, the growth of high-quality BST film is much more difficult than homogenous growth in semiconductors since there are very different properties (crystal structure, growth stress, annealing conditions, etc.) between BST and GaN. Secondly, the oxidation atmosphere that is an inherent process step in BST thin-film growth may lead to an irreversible degradation of the GaN HEMT. Besides, there is no suitable dry-etch process for BST film varactor patterning, therefore, a serious problem exists in order to keep the performances of the other circuit components during BST contained MMIC chip fabricating. All of these will result in a big challenge for BST-based MMIC development. In this paper, a monolithic AlGaN/GaN HEMT VCO using BST metal–insulator–metal (MIM) varactors is presented. Based on [10], a VCO with better performance was obtained through choosing a better AlGaN/GaN material (higher electron mobility, lager sheet carrier density) and improving the integration processes (especially the anneal process of the BST thin film). The fabrication process is fully compatible with the standard GaN MMIC process. An equivalent circuit model of the fabricated BST varactor in the microwave frequency

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Fig. 1. SEM photograph of the BST varactor.

band was developed for VCO circuit design. The experimented VCO shows an oscillation in a frequency range between 6.5 7.5 GHz. An output power of 17 dBm and a phase noise of 81 dBc/Hz (at 100 kHz) are obtained while the bias of the drain is 8 V and the BST varactor voltage is 0 V.

Fig. 2. Breakdown voltage of the BST varactor.

II. BST VARACTOR A. The BST Thin-Film Fabrication The BST thin film was deposited on a GaN substrate by RF magnetron sputtering, which is usually used in MMIC process. The thickness of the BST film is 250 nm. Considering the tunability and the loss tangent of the BST thin film, a Ba Sr TiO material was used as sputtering targets. Experiment results indicated that a lower loss tangent of the BST film would be obtained with a substrate temperature of 750 C. A conventional annealing process was done after BST film depositing. Through annealing at 750 C in O , the oxygen vacancies in the BST film, which were formed through sputtering, are reduced. Therefore, the loss tangent of the deposited BST film is improved. The SEM photograph of the fabricated BST varactor was shown in Fig. 1. B. Characteristics of the BST Varactor For GaN MMIC application, an important characteristic of the varactor is breakdown voltage. Through measuring with a Tektronix 370B Programmable Curve Tracer, the breakdown voltage of the BST varactor was exceeded 100 V (Fig. 2). A 130-V breakdown voltage of the BST varactor was obtained. It indicates that the BST varactor is suitable for GaN HEMT MMIC application. The C–V curves (Fig. 3) of the BST varactor were measured with an Agilent B1500 semiconductor device analyzer at 1 MHz. About 35% (400 620 fF) varactor tuning was obtained while the bias was ranging from 0 to 12 V and the loss tangent was remained less than 0.025. The resulting unloaded quality factor of the BST varactor is more than 40 at 1 MHz. The microwave characteristics of the thin-film BST varactor were obtained from scattering parameter ( -parameter) measurements. The two-port -parameters of the on-wafer BST varactor was measured by an Agilent 8510C vector network analyzer (VNA) and Cascade Microtech coplanar ground–signal–ground (G–S–G) probes from 0.1 to 26.5 GHz.

Fig. 3. C–V curves of the BST varactor.

The as-tested -parameters were then transferred into admittance parameters ( -parameters), and the microwave characteristics of the BST varactor can be determined by (1) and (2) as follows: (1) (2) The microwave characteristics of the BST varactor are shown in Fig. 4. About 50% varactor tuning was obtained with 15-V bias at 6 GHz [see Fig. 4(a)], and the cutoff frequency is dependent on the bias voltage. A cutoff frequency of 17.5 GHz was obtained with a bias voltage of 0 V. The quality factor is about 20 from 1 to 4 GHz [see Fig. 4(b)]. The result indicates that the BST varactor is suitable for microwave application, but the poor factor of the BST varactor will affect the phase noise of the VCO. C. Model of the BST Varactor To design the VCO circuit accurately, an improved equivalent circuit model [11] of the BST varactor at microwave frequency has been developed, as shown in Fig. 5, where and

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as the ratio of maximum-to-minimum capacitance, shown in (4), as follows: (3)

(4) By using the developed model, the performance of the fabricated BST varactor is fitted appropriately. The measured results and the simulated results are compared in Fig. 6. III. VCO DESIGN

Fig. 4. Microwave characteristics of the BST varactor. (a) Capacitance. (b) Quality factor.

Fig. 5. Equivalent circuit of the BST varactor.

are metal series inductance and resistance of the bottom and top electrodes, respectively. and represent the impedance between the electrode and substrate. The nonlinear capacitor represents the capacitance of the varactor. is the resistance of the varactor due to the dielectric loss of the BST thin film. The capacitance of the nonlinear capacitor dependent on the controlling voltage is shown in (3) [12]. is the peak capacitance at the zero applied electric field. At the voltage , the capacitance is reduced to . The tunability is defined

The simulation of the VCO was done by using Agilent Advanced Design System (ADS) 2009. As shown in Fig. 7, a common-source AlGaN/GaN HEMT topology was adopted. The resonators are placed at the HEMT gate side in which the BST varactor was in series with the inductor, and the HEMT source side in which the BST varactor was shunted with the inductor. To present convenient voltage control, the BST varactors are formed by two capacitors in series. The inductors in the resonator are planar spiral inductors. The tuning voltage was supplied through the resistances ( and ), which are formed by the GaN active layer. The gold was used to contact the VCO circuit and the ground (not the via-hole). The inductors and represent the inductance of the gold. The dc blocking capacitors and the decoupling capacitors are the traditional SiN MIM capacitors with a capacitance of 10 pF. The active device is an AlGaN/GaN HEMT with a gate width of 200 m. The improved EEHEMT (a commercial HEMT model) model is adopted in the simulation and the model parameters were extracted by the Agilent Integrated Circuit Characterization and Analysis Program (ICCAP). Upon further work [14], the improved and were shown as

(5) In the expressions, is the pinch-off capacitance between the gate and source, and is the capacitance between the gate and drain when the gate voltage is large enough. is the pinch-off voltage. are used to describe the dispersion in or due to drain voltage. are fitting parameters. The adopted model of the planar spiral inductor is shown in [13], and the model of the varactor is shown in Fig. 5. All the scattering parameters of these models are measured by Agilent 8510C VNA, which is connected to set of coplanar (GSG) probes on a Cascade probe station, and the dc parameters of

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Fig. 7. Schematic of the VCO circuit for simulation.

Fig. 8. Simulation result while the resonators are placed at source side and gate side.

First of all, the closed loop of the VCO was evaluated, which was done by an ADS oscillator probe. The result of the loop gain is shown in Fig. 8. HB simulation was then done to present output power of the VCO. Through comparing the simulation result, the result indicates that a better output power flatness is obtained by tuning the resonator that is placed at the gate terminal (as shown in Fig. 9). Meanwhile, the VCO exhibits a frequency range of 1 GHz with a central frequency of 7 GHz. Since the controlling voltage of the BST varactor is larger than other semiconductor varactors, the tuning gain of the VCO is 40 MHz/V. IV. MONOLITHIC INTEGRATION TECHNOLOGY

Fig. 6. Measured and simulated results of the BST varactor. (a) -parameters @ 0 V. (b) -parameters @ 15 V. (c) Capacitance.

the GaN HEMT are measured by an Agilent 4142B dc source, which is also connected with the same GSG probes.

To solve the problems mentioned in Section I, a new compatible integration process, as shown in Fig. 10, was developed for BST varactor integration. The BST thin film is deposited when the ohmic contacts, inter-device isolation, and bottom electrode are finished, before the Schottky gate process. Since the higher ohmic contacts anneal temperature of the GaN HEMT (850 C) would affect the performance of the BST film, the Schottky gate characteristic

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Fig. 9. Small-signal simulation result while the resonator is placed at the gate side.

Fig. 11. Cross section of the VCO fabrication process.

Fig. 10. Simple flowchart of the integration process.

of the fabricated HEMT would be degraded at the high temperature of the BST film growth. The Ti–Au metals are always used in GaN HEMT MMIC process; however, they cannot be used as the bottom electrode of the BST varactor directly. Since the volume of the gold atom is small, while the BST thin film is deposited at 750 C, the gold atoms would diffuse into the BST film, which will affect the breakdown characteristic of the BST film. The Pt metal is chosen because of its good stability, and it would block the diffusion of the gold atoms. The bottom electrodes of the BST varactor are finally formed by Ti/Au/Pt multilayer metals with good adhesion, low resistivity, and good stability. The BST film can hardly be patterned by dry etching, therefore wet etching is used to pattern the film. Considering that the wet etching process would affect the performance of the other components, the BST thin film is patterned immediately after depositing. After finishing the lithograph step, the 1:40 diluted HF is used to etch BST thin film. After BST thin-film patterning, the other processes to fabricate the VCO are the standard GaN HEMT MMIC integration processes. Fig. 11 shows the cross section of the fabricated VCO. The GaN HEMT has 0.3- m gate length with a gate width of 200 m. The size of the BST varactor is 20 10 m . An SEM photograph of the fabricated MMIC VCO is shown in Fig. 12. The chip dimension is 1.6 1.2 mm .

Fig. 12. SEM photograph of the fabricated VCO.

V. EXPRIMENTAL RESULT The fabricated VCO was packaged in a metal test fixture for RF measurement, as shown in Fig. 13. The bias voltage was provided by an Agilent 3362 dc source, and the output signal was tested by an R&S FSU43 spectrum analyzer. The HEMT’s gate and drain bias were set to be 0 and 8 V, respectively, which was experimentally optimized between the phase noise and the tuning frequency range. As shown in Fig. 14, the zero-bias oscillation frequency is 6.56 GHz with output power of 17.2 dBm. The bias current of the GaN HEMT is about 60 mA. The operative current of the VCO when oscillating is about 73 mA. The power consumption of the circuit is 88%. The output power at the fundamental resonance and the oscillation frequency at a different tuning voltage are plotted in Fig. 15. The oscillator exhibits 1-GHz ( 14%) bandwidth at 7-GHz center frequency. The realized relative bandwidth is larger than other GaN VCOs, which were achieved by metal–semiconductor–metal (MSM) capacitor or diode

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TABLE I COMPARISON: THIS VCO VERSUS OTHER GaN VCOs

Fig. 13. Photograph of the packaged VCO.

Fig. 14. Measured output spectrum of fundament and second harmonic at V, V, and V.

Fig. 16. Phase-noise measurement versus offset frequency at V, and V.

V,

Fig. 15. Oscillation frequency and output power versus the varactor control voltage.

(Table I). The tuning gain was measured to be 41 MHz/V, which is due to the high control voltage of the BST varactor. The VCO demonstrated single-sideband (SSB) phase noise (Fig. 16) of 81 dBc/Hz @ 100 kHz and 110 dBc/Hz @ 1 MHz while the bias of the drain, gate, and varactor were 8,

Fig. 17. Phase-noise measurement versus tuning voltage at V.

V and

0, and 0 V, respectively. The VCO exhibits a phase-noise slope of 30 dB/decade. The performance demonstrates that the factor of the BST varactor is enough for microwave application. Fig. 17 shows the phase noise at 100 kHz along the bandwidth.

KONG et al.: MONOLITHIC AlGaN/GaN HEMT VCO

VI. CONCLUSION An AlGaN/GaN HEMT MMIC VCO incorporating BST thin-film MIM varactors has been presented. The VCO exhibits 1-GHz tunable bandwidth at a central frequency of 7 GHz when the BST varactor voltage changed from 0 to 24 V. An output power of 17 dBm and the phase noise of 81 dBc/Hz (at offset of 100 kHz) and 110 dBc/Hz (at offset of 1 MHz) are obtained while the bias of the drain is 8 V and the BST varactor is 0 V. By carefully designing an integrated BST thin-film varactor process, the fabrication process is fully compatible with the standard GaN MMIC integrated process. Using the BST varactor to replace the semiconductor varactor will simplify the design of MMICs. The developed process in this study can be applied to develop various tunable MMICs. Further study of GaN MMIC VCOs with new composite thin-film varactors is under development for phase-noise improvement. REFERENCES [1] A. Tombak, J.-P. Maria, F. T. Ayguavives, G. T. Stauf, A. I. Kingon, and A. Mortazawi, “Voltage-controlled RF filters employing thin-film barium strontium titanate tunable capacitors,” IEEE Trans. Microw. Theory Techn., vol. 51, pp. 462–467, Feb. 2003. [2] H. Xu, C. Sanabria, N. K. Pervez, S. Keller, U. K. Mishra, and R. A. York, “Low phase-noise 5 GHz AlGaN/GaN HEMT oscillator inteTiO thin film,” in IEEE MTT-S Int. Microw. grated with Ba Sr Symp. Dig., 2004, vol. 3, pp. 1509–1512. [3] J. Shealy, J. Smart, M. Poulton, R. Sadler, D. Grider, S. Gibb, B. Hosse, B. Sousa, D. Halchin, V. Steel, P. Garber, P. Wilkerson, B. Zaroff, J. Dick, T. Mercier, J. Bonaker, M. Hamilton, C. Greer, and M. Isenhour, “Gallium nitride (GaN) HEMT’s: Progress and potential for commercial applications,” in Gallium Arsenide Integr. Circuit Symp. Dig., Oct. 2002, pp. 243–246. [4] M. J. Underhill, “Fundamentals of oscillator performance,” Electron. Commun. Eng. J., vol. 4, no. 4, pp. 185–193, Aug. 1992. [5] B. Razavi, “A study of phase noise in CMOS oscillators,” IEEE J. Solid-State Circuits, vol. 31, no. 3, pp. 326–343, Mar. 1996. [6] M. J. Underhill, “The need for better varactor diodes in low phase noise oscillators,” in IEE Microw. Millim.-Wave Oscillators and Mixers Colloq., Dec. 1998, pp. 5/1–5/6, (Ref. 1998/480). [7] T. H. Lee and A. Hajimiri, “Oscillator phase noise: A tutorial,” IEEE J. Solid-State Circuits, vol. 35, no. 3, pp. 326–336, Mar. 2000. [8] A. Victor, J. Nath, D. Ghosh, S. Aygun, W. Nagy, J.-P. Maria, A. I. Kingon, and M. B. Steer, “Voltage controlled GaN-on-Si HFET power oscillator using thin-film ferroelectric varactor tuning,” in Proc. 36th Eur. Microw. Conf., Sep. 2006, pp. 87–90. [9] M. Al-Ahmad, C. Loyez, N. Rolland, and P.-A. Rolland, “Wide BSTbased tuning of voltage controlled oscillator,” in Proc. Asia–Pacific Microw. Conf., 2006, pp. 468–471. [10] C. Kong, H. Li, S. Jiang, J. Zhou, X. Chen, and C. Chen, “A monolithic AlGaN/GaN HEMT VCO using BST film varactor,” in IEEE Int. Radio-Freq. Integration Technol. Symp., 2011, pp. 197–200. [11] L.-Y. V. Chen, R. Forse, D. Chase, and R. A. York, “Analog tunable matching network using integrated thin-film BST capacitors,” in IEEE MTT-S Int. Microw. Symp. Dig., vol. 1, pp. 261–264.

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[12] D. R. Chase, L.-Y. Chen, and R. A. York, “Modeling the capacitive nonlinearity in thin-film BST varactors,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 10, pp. 3215–3220, Oct. 2005. [13] N. A. Talwalker and C. P. Yue, “Analysis and synthesis of on-chip spiral inductors,” IEEE Trans. Electron Devices, vol. 52, no. 2, pp. 176–182, Feb. 2005. [14] Z. WeiBin, “Improvement of the equivalent capacitance equation in FET’S large signal model,” Res. Progr. Solid-State Electron., vol. 32, no. 2, pp. 105–109, Apr. 2012. [15] C. Zhi-Qun, C. Yong, L. Jie, Z. Yu-Gang, L. Zhi-Mei, and C. Jing, Ga N/GaN HEMT “Novel composite-channel Al Ga N/Al MMIC VCO with low phase noise,” J. Infrared Millim. Waves, vol. 26, no. 4, pp. 241–245, Aug. 2007. [16] C. Huifang, W. Xiantai, C. Xiaojuan, L. Weijun, and L. Xinyu, “An 8 GHz high power AlGaN/GaN HEMT VCO,” J. Semicond., vol. 31, no. 7, pp. 252–256, Jul. 2010. [17] X. Lan, M. Wojtowicz, M. Truong, F. Fong, M. Kintis, B. Heying, I. Smorchkova, and Y. C. Chen, “A -band monolithic AlGaN/GaN VCO,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 6, pp. 407–409, Jun. 2008. [18] X. Lan, M. Wojtowicz, I. Smorchkova, R. Coffie, R. Tsai, B. Heying, M. Truong, F. Fong, M. Kintis, C. Namba, A. Oki, and T. Wong, “A -band low phase noise monolithic AlGaN/GaN HEMT VCO,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 7, pp. 425–427, Jul. 2006. [19] Z. Q. Cheng, Y. Cai, J. Liu, Y. Zhou, K. M. Lau, and K. J. Chen, “A low phase-noise -band MMIC VCO using high-linearity and low-noise Ga N/GaN HEMTs,” IEEE composite-channel Al Ga N/Al Trans. Microw. Theory Techn., vol. 55, pp. 23–29, Jan. 2007.

Cen Kong was born in Xichang, China, in 1984. He received the B.S. and M.S. degrees in microelectronics and materials science and engineering from the University of Electronic Science and Technology of China, Chengdu, China, in 2006 and 2010, respectively. He is currently an Assistant Engineer with the Science and Technology on Monolithic Integrated Circuits and Modules Laboratory, Nanjing Electronic Devices Institute, Nanjing, China. His research activities include the integration of ferroelectric and semiconductor materials, ferromagnetic and semiconductor materials, and the integration process of isomeric material. His current interest focuses on the development of the new integration process. Hui Li was born in Nanchang, China, on March 11, 1970. He received the Bachelor degree in microwave technology from the University of Science and Technology of China, Hefei, China, in 1992. He is currently a Professor of microwave technology with the Nanjing Electric Devices Institute (NEDI), Nanjing, China, where he has been since 1992. His research activities include microwave filter and GaAs device modeling and GaN device modeling. He has been responsible for GaAs MMIC process design kit (PDK) development for the NEDI GaAs MMIC process. His current interest focuses on the integration of isomeric material. Xiaojian Chen, photograph and biography not available at time of publication. Shuwen Jiang, photograph and biography not available at time of publication. Jianjun Zhou, photograph and biography not available at time of publication. Chen Chen, photograph and biography not available at time of publication.

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Design of Low Phase-Noise Oscillators and Wideband VCOs in InGaP HBT Technology Dan Kuylenstierna, Member, IEEE, Szhau Lai, Student Member, IEEE, Mingquan Bao, and Herbert Zirath, Fellow, IEEE

Abstract—A method for design of low phase-noise balanced-Colpitts (BC) fixed-frequency oscillators (FFOs) and wideband voltage-controlled oscillators (VCOs) is presented. Analytical expressions describe how to design an oscillator for best phase noise, given a limited factor and a certain active device. The theory and needs only two free parameters: the impedance level tapping ratio of the resonator. It is described how to chose and for low phase noise and large tuning range, respectively. The design method is verified with a low phase-noise FFO and a wideband VCO, both designed in InGaP HBT technology. The BC FFO presents a phase noise of 112 dBc/Hz at 100-kHz offset from a 9.2-GHz carrier. The wideband VCO implemented in the same technology presents a minimum phase noise of 106 dBc/Hz at 100-kHz offset from a 9-GHz carrier. Over the frequency range of 8.4–9.7 GHz, the phase noise is better than 102 dBc/Hz and the output power is 7 0.5 dBm. The wide tuning range, constant output power, and relatively constant and low phase noise are achieved due to double pairs of tuning varactors, one between emitters and one between collectors. To the authors’ best knowledge, this type of double-tuned BC VCO topology has not been previously published. Index Terms—Balanced Colpitts (BC), double tuned, oscillator, phase noise, voltage-controlled oscillator (VCO), wideband.

I. INTRODUCTION

L

OW phase-noise voltage-controlled oscillators (VCOs) with sufficient tunability (about 10%–20%) is a bottleneck in high data-rate wireless communication systems. With cost as the driving factor, there is a strong demand for fully integrated monolithic microwave integrated circuit (MMIC) VCOs with low phase noise. It has been shown that InGaP HBT technology, with its low flicker-corner frequency and high breakdown voltage, is a good choice for design of low phase-noise VCOs. In particular, balanced Colpitts (BC) or

Manuscript received April 20, 2012; revised August 21, 2012; accepted August 22, 2012. Date of publication September 28, 2012; date of current version October 29, 2012. This work was carried out at the GigaHertz Center under a joint research project financed by the Swedish Governmental Agency of Innovation Systems (VINNOVA), Chalmers University of Technology, Sivers IMA AB, and Ericsson AB, D. Kuylenstierna and S. Lai are with the GigaHertz Centre, Department of Microtechnology and Nanoscience (MC2), Chalmers University of Technology, SE-412 96 Göteborg, Sweden (e-mail: [email protected]). M. Bao is with the Microwave and High Speed Electronics Research Center (MHSERC), Ericsson AB, SE-431 84 Mölndal, Sweden. H. Zirath is with the GigaHertz Centre, Department of Microtechnology and Nanoscience (MC2), Chalmers University of Technology, SE-412 96 Göteborg, Sweden, and also with the Microwave and High Speed Electronics Research Center (MHSERC), Ericsson AB, SE-431 84 Mölndal, Sweden. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2216893

Hartley VCOs in InGaP HBT present state-of-the-art phase noise for MMIC VCOs [1], [2]. The good phase-noise performance of Colpitts oscillators is associated with superior cyclostationary noise properties [3]. The cyclostationary properties depend in turn on the capacitive division ratio for the feedback resonator. The optimum phase noise is achieved for a specific division ratio [3], [4] that generally cannot be maintained over a VCO’s tuning range if the oscillator is tuned with a single tuning varactor. The single-ended Colpitts topology is extended to a balanced version in [5]. To avoid tuning the capacitors in the feedback network, and thus affecting the optimum feedback condition, the oscillator is proposed to be tuned with additional varactors in parallel to the resonant tank [5]. This implementation, which is not a true Colpitts oscillator, has the drawback of rather small tunability as varactors constitute only a fraction of the total tank capacitance. If the size of the tuning varactors is increased in comparison to the capacitances in the feedback network, the modified Colpitts topology will deviate considerably from a true Colpitts, the waveforms will be distorted, and phase noise degraded. Tuning range can be significantly improved by utilizing hyperabrupt varactors [6]. However, hyperabrupt varactors are generally not available in commercial MMIC processes, where the base–collector junction is normally utilized as tuning element. To achieve higher tunability in a conventional MMIC process with an abrupt collector junction, the varactor must contribute to a larger fraction of the total tank capacitance. A solution is to tune more than one circuit element. A very wideband single-ended VCO with three tuning elements was presented in [7] and a double-tuned common-collector BC VCO integrated in SiGe HBT technology was presented in [8]. Besides increasing the tuning range, tuning several circuit elements also allows for balancing of resonator impedance level and capacitance division ratio so that the oscillator can maintain good cyclostationary properties over the tuning range without being voltage limited [9]. This paper presents a simple and systematic method to determine optimum and for a common-base BC oscillator. The two parameters and , together with the angular oscillation frequency , are sufficient to calculate the component values of the oscillator. The theory is then extended to tunable oscillators. A novel double-tuned balanced Colpitts (DTBC) topology with tuning varactors between both collectors and emitters is proposed, and it is shown how the optimum component values of this topology can be determined. The two BC oscillators are implemented in a GaAs–InGaP HBT MMIC technology.

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KUYLENSTIERNA et al.: DESIGN OF LOW PHASE-NOISE OSCILLATORS AND WIDEBAND VCOs

This paper is organized as follows. Section II presents the design methods describing how to chose the circuit elements for low phase noise and wide tuning range. Section III presents how the theory is applied to implement the circuits in GaAs–InGaP HBT MMIC technology. Section IV presents the experimental result. Finally, Section V concludes this study. II. THEORY AND SIMULATIONS A single-sideband phase-noise spectrum is qualitatively described by Leeson’s equation [10]

(1) where is the quality factor of the resonator, is the oscillation power, is the effective noise factor, and is the corner frequency between the 20- and 30-dB/decade slope. From (1), the efficiency of increasing for improved phase noise is evident, any doubling of will theoretically result in a 6-dB improvement in phase noise at a given offset frequency. Several papers have investigated how to improve for integrated inductors, particularly for Si where substrate loss degrades significantly. For III–V technologies, as discussed in this paper, the substrate is essentially lossless and the factor is limited primarily by metal loss. In reality, the achievable factors are limited by technology, e.g., substrate loss tangent and metal sheet resistance. For an oscillator with integrated resonant tank, the factor is typically 50 in the frequency range of 5–10 GHz. Further, the active device is generally decided when the designer starts the design of his oscillator. Left to be controlled are the topology and values of the passive components. The time-invariant expression in (1) is sufficient for qualitatively predicting the shape of the phase-noise spectrum in an oscillator. A quantitative prediction of phase-noise levels requires time-variant analysis [3], [4]. The goal of this paper is not to come up with another theory for calculation of phase noise, but rather to propose a design methodology for minimum phase noise, when technology and topology for the oscillator are chosen. A question to be answered is: How to systematically determine the optimum values of the passive components without using an optimization routine? The topology to be examined is the BC oscillator [5] that is theoretically [3] and experimentally [1] proven to provide good phase noise. Firstly, the question: How to minimize phase noise of an oscillator based on a resonator with fixed factor? is addressed. The investigation is then extended to tunable oscillators with the question: How to maintain phase noise and signal power over the tuning range? A. Models and Simulations The subsequent analysis relies on a good harmonic balance (HB) simulation algorithm and accurate models for active and passive components. In this section, passive elements are assumed to be ideal with no self-resonant frequency. Losses in reactive elements are expressed in terms of a finite factor that, for simplicity, is assumed to be frequency independent and constant for all elements.

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Tuning varactors are described with a linear model (2) where is the capacitance under tune voltage is the maximum varactor capacitance, i.e., when a semiconductor varactor is near forward bias, and is fractional tunability of the varactor. The active device is a four-finger GaAs–InGaP HBT from WIN Semiconductors, Tao Yuan Shien, Taiwan. It has emitter-finger width and length of 1 and 20 m, respectively. The HBT is represented by an in-house developed model, the Chalmers–Mitsubishi HBT model [11]. To improve phase-noise simulations, the model is complemented with low-frequency noise sources at the base and collector, respectively [12]. A limitation in the analysis is that the used computer-aided design (CAD) software, Agilent Advanced Design System (ADS), treats noise sources linearly and not cyclostationary [13]–[17], which would give more accurate near-carrier phase-noise predictions. However, as previously mentioned, the focus of this paper is not on modeling accuracy, but rather on topology and how to systematically chose the circuit elements for optimum performance. To keep things simple, we thus stick to the linear noise representation, which is straightforward to implement in the used model and CAD software. In this case, the limitation in accuracy, focusing on phase noise at 100-kHz offset, is also minor as the used device has a flicker-corner frequency in the order of 40 kHz. If the focus is phase noise closer to carrier or if another technology, e.g., CMOS, with higher corner frequency is used; the procedure in this paper is still applicable, but cyclostationary device models are mandatory. B. Low Phase-Noise BC Oscillator Fig. 1 shows a common-base BC oscillator that is the basis of this study. Its resonator, including feedback tapping capacitors, can be characterized by only three parameters: characteristic impedance (3) angular center frequency (4) and capacitive division ratio (5) Using (3)–(5), the component values in the tank can be calculated (6) (7) (8) (9)

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Fig. 2. Influence of capacitive division ratio . (a) Phase noise versus base-bias voltage with as a parameter. (b) Oscillator load lines captured at optimum bias for different values of . Fig. 1. Schematics of common-base BC oscillator.

The resonator loss is characterized by that, for simplification, is assumed to be the same for all components. If the tank is depicted as a parallel resonator, the loss may be represented by a parallel resistor (10) Other elements in the oscillator, e.g., for the base bias, for the dc current, and for extraction of the output signal, should be chosen so that they will not affect the oscillator’s performance. can easily be chosen sufficiently high so that its influence on the oscillator can be neglected. Similarly, can be chosen small enough in order to eliminate any pulling effects. The major complication is the emitter resistance that will appear in parallel to , and thus load the resonator’s factor (see Fig. 1). has to be chosen sufficiently high in order to have little influence on the factor, but still not too high, as it will then consume significant dc power as it carries all current of the oscillator. The influence of each parameter will be investigated by simulations based on the models in Section II-A. The target is to design the oscillator for minimum phase noise at a given factor. In the subsequent simulation, is assumed, which is a reasonable value in a III–V technology with semi-insulating substrate. The resonant frequency of the tank is set to GHz. The base resistance is set to , which is quite sufficient to isolate the voltage source used for bias. The emitter resistance deserves some considerations before presenting the simulation results; it has to be set properly. As seen in Fig. 1, appears parallel to so its resistance should be higher than, or at least equal to, the equivalent parallel resistance of . Utilizing inserted in (9), the emitter resistance can be expressed as (11) For a given , the oscillator synthesis is now about determining only two parameters: and . The target parameter in this study is oscillator phase noise. Besides, output power

and harmonic content are also important parameters. However, it will turn out that all parameters of the oscillator generally are good when phase noise reaches its optimum, occurring right before the transistor goes into compression. The first parameter to be investigated is . Increasing reduces the conduction angle and the impulse sensitivity function (ISF) [3] with lower phase noise as a result. However, the voltage swing over the tank is also affected by . For large values, the phase noise will increase due to reduced voltage swing over the resonant tank [compare (1)]. There exists an optimum value of , representing the best tradeoff between ISF and power swing. In [3], Hajimiri and Thomas demonstrate with simulations that the optimum is about for a bipolar oscillator. In a later study by Andreani et al., the optimum is analytically shown to be [4]. In both [3] and [4], a constant dc current is assumed, and the target is to minimize an oscillator figure-of-merit (FOM) trading phase noise versus dc power consumption [18]. In this study, the target is on minimum phase noise, a slightly higher value of can then be expected, as reduction in voltage swing may be partly compensated by increased dc current and larger current swing. To deduce the optimum value of , phase noise is plot versus base-bias voltage (the parameter determining collector dc current) with as a parameter. Fig. 2 shows phase noise at 100-kHz offset versus for different , in the simulation and . The lowest phase noise is obtained for at a bias voltage V. Fig. 2(b) shows load lines captured at the bias points for minimum phase noise, it is seen that the voltage swing is reduced, but current swing increased as the value of is increased. It can also be noted that the minimum phase noise does not differ much when is changed from 0.25 to 0.55, i.e., the phase-noise minimum is flat, as stated in [4]. Once an optimum is found, the next step is to determine impedance level that was fixed to in the search for optimum (presented in Fig. 2). also has a strong effect on voltage and current waveforms, the higher , the higher the current and lower the voltage swing. To investigate the effect of , is fixed to , and phase noise simulated versus with as a parameter (the results are shown in Fig. 3), note that the emitter resistance is changed according to (11). It is found that phase noise is improved with lowered

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Fig. 3. Influence of the resonator impedance level when capacitive divi. (a) Phase noise versus base-bias voltage with as a sion ratio is , captured at optimum bias parameter. (b) Oscillator load lines for different points.

. Until , the improvement is independent of , while for , the phase noise at low bias voltages is degraded, but a lower minimum value is reached at a higher bias. Fig. 3(b) shows load lines captured at bias points of minimum phase noise, according to Fig. 3(a). It is obvious that for high-resistance load lines, the oscillator is voltage limited, while for the lowest resistance , it is current limited. Due to finite on-resistance, the voltage swing is also reduced as is lowered. The careful reader may object that the optimum may change as is changed. However, that is not the case, which is easily verified by repeating the sweep in Fig. 2 for a lower value of , and can be considered as independent parameters with reasonable accuracy. The above simulations are completely theoretical without taking into account any practical issues with component values. In reality, too low values of and may result in physically too large/small components and/or currents exceeding the breakdown limitations of the given technology. For , , and an oscillation frequency of 10 GHz, the component values become pH, pF, pF, and , values that are realizable in MMIC technology. The simulated performance for an oscillator with these component values is shown in Fig. 4, as base bias is chosen as , and the output is taken through pF. Note, as mentioned in the beginning of this section, that all parameters are well optimized, despite that phase noise was the only target parameter in the optimization. The minimum phase noise of 119 dBc/Hz @ 100-kHz offset from the carrier occurs for a bias current mA, which is right where the transistor enters the compression region and the output power is maximized. Fig. 5(a) shows waveforms and the load line at the phase-noise minimum for the optimized oscillator. It is seen that the oscillator operates in class-C with the current peak well centered around the voltage minimum.

Fig. 4. Simulated performance of the optimized fixed-frequency oscillator. (a) Oscillation power versus base-bias voltage. (b) Phase noise and pushing [pF]. characteristics. (c) Harmonic content. (d) Pulling figure for different

characteristics in Fig. 4, except for frequency and phase noise, would remain unchanged when the oscillator is tuned. Phase noise would change according to (1), i.e., 6-dB increase each time frequency is doubled. However, in real VCOs, there are generally no tunable resonators maintaining impedance while frequency is tuned. Instead VCOs are generally based on varactors, i.e., variable capacitors. Its capacitance can be described by the simple relation in (2), where the fractional tunability can have different voltage dependence, as will be discussed in Section III. In this section, the voltage dependence is not discussed. In an oscillator, the tunability of the varactor translates to a fractional frequency tuning of if the varactor capacitance is the only capacitance in the tank. In a Colpitts oscillator, the capacitance is divided between and . Tuning both and is practically difficult due to arrangement of the bias network. In particular, the bias network for is complicated to arrange, while the supply for is straightforward, as it is symmetrically placed between the two emitters and ground [see Fig. 6(a)]. An example of a VCO tuned by was presented in [19]. Tuning , but not , is not utilizing the tuning varactor fully, the effective tunability is reduced and can be expressed as follows: (12)

C. Wideband VCOs The optimum condition for a fixed-frequency oscillator was derived in Section II-B. To make this oscillator tunable, the best would be a frequency-invariant active element and a tunable resonator maintaining its impedance while the frequency is tuned. In this case, the load line of Fig. 5(b) and all oscillator

Besides, reduced tuning efficiency, tuning only has the drawback of changing the division ratio so the oscillator will deviate from the optimum with respect to phase noise, as derived in Section II-B. Fig. 7(a) shows how output power and phase noise varies with frequency for different values of as is

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Fig. 5. Waveforms of the optimized oscillator. (a) Voltage and current in time domain. (b) Load line of the oscillator.

Fig. 7. Simulated tunability for true-Colpitts oscillator tuned by that is [see Fig. 6(a)]. (a) Output power versus frechanging a factor quency. (b) Phase noise versus frequency.

maintain and ingly reduced as

constant, and have to be correspondis increased. Defining a ratio (14)

The symbolical expressions (8) and (9) for the capacitance values of the Colpitts oscillator can be recalculated as capacitance is gradually moved to . The new values become (15) and (16)

Fig. 6. Common-base BC VCOs. (a) True Colpitts tuned by C2. (b) Modified Colpitts with effectively tunable inductance. (c) DTBC VCO.

tuned, a fractional tunability is assumed for , and it is stepped in linear steps. If the untuned value of is lower than the optimum , the phase noise will initially drop as is increased when is reduced. The maximum output power occurs about for larger the slopes and . To avoid the large variations in phase noise and output power occurring when is tuned, BC oscillators are, instead, often tuned by a varactor in parallel to the tank inductance [5], this implementation can be seen as an effectively tunable inductance (13) As seen from (13), the effective inductance is reduced as is reduced, and the oscillation frequency is correspondingly increased. In the schematics [see Fig. 6(b)], the capacitance appears in parallel to the series combination of and . To

, the better the tunability of the oscillator in The larger Fig. 6(b). However, the introduction of is a deviation from the true Colpitts topology in Fig. 1 with its good waveforms previously discussed. Increasing will distort the waveforms; the peak current will no longer be centered at the voltage minimum. Fig. 8 shows that the waveforms of the modified Colpitts topology in Fig. 6(b) deviates little from a true Colpitts if . For larger values of , the deviation will be significant and the phase noise considerably worse compared to a true Colpitts oscillator [see Fig. 9(a)]. To illustrate how an inductively tuned oscillator is changed while is tuned, Fig. 10 shows phase noise and power variation with frequency for different . For the oscillator tuned by , the effective tunability was given in (12). For an oscillator tuned by , the varactor appears in parallel to the series combination and the effective tunability can be expressed (17) Neither of the two different ways of tuning the BC VCO, tuned by , as in Fig. 6(a), or effectively tuned inductance, as in Fig. 6(b), takes full advantage of the varactor, i.e., the varactor tunability is diluted by fixed capacitance. Both tuning methods also causes variations in phase noise and output power, which is a problem in wideband applications.

KUYLENSTIERNA et al.: DESIGN OF LOW PHASE-NOISE OSCILLATORS AND WIDEBAND VCOs

Fig. 8. Oscillator waveforms for fixed-frequency modified Colpitts oscillators . (a) Voltage and current in time domain. (b) Oscilwith different values of lator load lines

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Fig. 11. Simulated tunability for wideband double-tuned VCO [see Fig. 6(c)], , . The two varactors are tuned a factor . (a) Output power versus frequency. (b) Phase noise versus frequency.

effective capacitance tunability in an oscillator tuned by and can be expressed as follows:

Fig. 9. Phase noise versus collector current fixed-frequency modified Colpitts . (a) Phase noise. (b) Frequency. oscillators with different values of

(18) It is not possible to derive any optimum and for an optimum tradeoff between phase noise and flat output power, as these factors both also strongly depend on the physical properties of the varactors. However, as an example of the potential for a DTBC VCO, Fig. 11 shows phase noise and output power versus frequency for the VCO with , , and . From (18), the capacitance tunability for and is , corresponding to a fractional frequency tunability of that is near , which would be obtained if the varactor tunability was fully utilized. In Fig. 11, the fractional frequency tunability is slightly lower, . III. CIRCUIT IMPLEMENTATIONS

Fig. 10. Simulated tunability for modified Colpitts oscillator [see Fig. 6(b)] changing a factor . (a) Output power versus with a varactor frequency. (b) Phase noise versus frequency.

From (12) and (17), it is realized that the tunability of the VCOs in Fig. 6(a) and (b) can be improved by increasing either or . It is also seen in Figs. 7 and 10 that the two parameters and affects the variations in phase noise and output power. An improved tuning range can be achieved with a DTBC, e.g., as the common-collector implementation proposed in [8]. A DTBC in a common-base configuration, where both and are implemented as varactors, can be designed as in Fig. 6(c). Tuning the two varactors simultaneously improves not only the tuning range, but also allows for flattening the output power and trading phase-noise variations over the tuning range by changing the proportions between and . The

The theories presented in Section II describe how to chose the optimum component values for oscillators and VCOs. Simply implementing these values in MMIC technology is not straightforward. Lumped elements, e.g., capacitors and inductors, are associated with parasitics, resulting in effective inductance/capacitance deviating from given values. Further, interconnecting lines will also act as series inductances adding to the given values. A commonly used approach in MMIC design is to start from analytical formulas, e.g., (6)–(9), and then optimize and tune the solution using CAD software to compensate for parasitic effects and layout constraints. This approach has the problem that the designer will never know or be able to verify whether he is near the optimum solution in any other way than just judging the achieved performance. Further, multidimensional optimization of nonlinear circuits (like oscillators) is time consuming and may be associated with convergence problems. This paper proposes that the passive resonator is analyzed individually and its target parameters , , and matched to the optimum solutions, as presented in Section II. Removing active elements and bias circuitry, the passive resonant tank of the BC oscillator in Fig. 1 can be drawn as in Fig. 12(a). The

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Fig. 13. Micrograph of low-impedance oscillator.

Fig. 12. Schematic and layout of balanced resonators.

critical parameters of the resonator can then be calculated from impedances and (19) (20) (21)

A. Low Phase-Noise MMIC Oscillator The realization of a low phase-noise MMIC oscillator can be reduced to the design of a layout that mimics the ideal tank and , as derived in Section II-B in Fig. 12(a) in terms of with as high a factor as possible. Fig. 12(b) shows the layout of a resonator implemented in WIN Semiconductors’ InGaP HBT technology. The inductance is realized as a 50- m-wide transmission line, utilizing metal 1 and 2 in parallel for maximum factor. The capacitances and are implemented as metal–insulator–metal (MIM) capacitors. For a compact layout, is designed and electromagnetic (EM) simulated. The midpoint grounding between the two capacitors connecting the emitters is removed and the capacitors are replaced with one capacitor of half the size. The resonator is EM simulated and the results matched to an ideal resonator in Fig. 14(a)–(c). It is clearly seen that, around the oscillation frequency, the layout can be represented by the ideal lumped resonator as far as it concerns the critical parameters , , and . At other frequencies, there are significant differences between the layout and the ideal resonator, e.g., there is a series resonance in the branch that the careful reader can identify in Fig. 14(a). However, at a first approximation, the waveforms and the oscillator’s performance are determined primarily by the behavior around the os-

Fig. 14. Comparison of ideal lumped resonator and layout of the low factor. (b) Resistance at the emitter port. impedance resonator. (a) (c) Resistance at the collector port.

cillation frequency. Commenting on Fig. 14, the ideal resonator also shown in the figure has , , and . The value of is ironically close to the conventional rule-of-thumb [3]. According to Section II-B, is better, but when coming to the physical implementation, the factor is reduced with increased due to increased size of . The simulations of the low phase-noise MMIC oscillator are shown together with the measurements in Fig. 18. The simulated phase noise is 117 dBc/Hz @ 100-kHz offset, which compares well to the simulations of the ideal resonator in Section II-B. B. DTBC VCO To demonstrate the design of wide-tuning range oscillators, a DTBC VCO was implemented in WIN Semiconductors’ dedicated InGaP HBT VCO process (H01U-10). The design [see

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Fig. 16. Measured performance of a varactor with seven fingers of length factor at 7 GHz extracted from the 60 m and width 15 m. (a) CV. (b) Deloach structure.

Fig. 15. DTBC VCO. (a) Schematics. (b) Micrograph.

Fig. 15(b)] utilizes the same four-finger HBT as the fixed-frequency oscillator in Section III-A. For lowest phase noise, special high- finger varactors are utilized. Fig. 16 shows varactor capacitance and factor versus bias voltage for a 7 15 60 m varactor. The factor, measured from a 6-GHz Deloach structure, is better than 30 for all tuning voltages, and the varactor’s tuning ratio is about for tuning voltages between and V. The capacitance per unit area of these varactors is lower compared to MIM capacitors. For this reason, the varactor is complemented with a series inductance to achieve an effective capacitance that is larger than the varactor capacitance. This implementation has the drawback of reducing the tank- factor that will be limited by series resistance from the sheet resistance in the metal strip constituting the series inductance. As the tank- factor is limited by inductance rather than varactor capacitance, the highest factor occurs when the varactor bias voltage approaches the forward region where the varactor capacitance is the highest. The top varactors, between the collectors, have six fingers of width 10 m and length 40 m, while the varactors between the two emitters have six fingers of width and length 12 and 100 m, respectively. The inductance is realized with 50- m wide transmission lines. Fig. 17 shows the simulated factor and impedance at three different varactor-bias conditions. The quality factor is about , the impedance level , and the

Fig. 17. Simulation of the resonator in the double-tuned VCO. (a) (b) Resistance at the emitter port. (c) Resistance at the collector port.

factor.

tapping ratio – , depending on bias voltage. The performance at V is fit with an ideal resonator with parameters , , , and . The prototype VCO [see Fig. 15(b)] is designed with different bias pads for base, collector, and the two tuning varactors. The tuning varactors are tuned relative to the emitter and collector, respectively. In order to suppress noise from bias lines, the layout [see Fig. 6(c)] is highly symmetrical with custom-designed decoupling capacitors. The design is also very compact, occupying an area of only 800 1050 m . Simulated performance of the VCO are shown together with measurements in Fig. 20. IV. EXPERIMENTS AND RESULTS The fixed-frequency oscillator and the double-tuned VCO were characterized on-wafer. Phase noise was measured with the Agilent E5500 phase-noise system using the discriminator

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Fig. 18. Measured (markers) and simulated (lines) performance versus baseV. bias voltage for the low-impedance oscillator under bias point of (a) Collector current. (b) Frequency. (c) Output power. (d) Phase noise.

Fig. 20. Measured characteristics versus varactor voltage for the DTBC VCO V and mA. (a) Oscillation frequency. under bias point of (b) Output power. (c) Phase noise.

Fig. 19. Phase noise versus offset frequency for low-impedance oscillator at V and V.

Fig. 21. Phase noise versus offset frequency for the DTBC VCO, measured at V, mA, and V. a bias point of

method. Frequency and output power were measured with an Agilent 8565EC spectrum analyzer, power calibrated using an E4419B power meter. The output power of the differential circuits was measured from one output while the other was terminated in 50 , combining the two outputs in a balun would give nearly 3-dB higher output power. Firstly, the base voltage was tuned with respect to phase noise and output power. Fig. 18 shows measured characteristics of the fixed frequency oscillator compared to simulations. The agreement between simulations and measurements is good; collector current, oscillation frequency, and power are all well predicted. The phase noise is well predicted until a collector current of 60 mA, corresponding to V, where the transistor enters the compression region with less accurate prediction of phase noise. As previously mentioned, the accuracy in this region can probably be improved if noise sources are treated cyclostationary [13]. Fig. 19 shows measured phase noise

versus offset frequency at a collector current of 60 mA for the fixed-frequency oscillator. The double-tuned VCO was measured with the same setup as the fixed frequency oscillator. First the varactor voltage was set to V for both varactors and the base voltage increased until minimum phase noise was reached at V, corresponding to mA. The collector voltage was V. Finally, after fixing and , the varactor voltages were tuned, and the VCO characteristics recorded for each tuning voltage. Measured frequency and output power versus varactor voltage are compared to simulated results in Fig. 20. The results are presented as a function of varactor voltage ; the actual tuning voltages are V and V. Under all bias conditions, the measured and simulated output power agrees within the measurement accuracy and the measured oscillation frequency is about 0.2–0.3 GHz higher than

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TABLE I STATE-OF-THE-ART LOW PHASE-NOISE MMIC VCOs, BENCHMARKED WITH RESPECT TO TUNING BANDWIDTH

in simulations, indicating a too low estimate of the varactor capacitance. The measured phase noise is about 5 dB higher than in simulations, associated with the inaccurate prediction when the transistor goes into compression. However, as predicted by simulations in Section II, the phase noise and output power are both rather invariant over the tuning range. Fig. 21 shows phase noise versus offset frequency for V, the varactor voltage providing the best phase noise. It is seen that the measured corner frequency is located about kHz, which is rather high compared to conventional BC VCOs in InGaP HBT, e.g., for the fixed-frequency oscillator in Fig. 19, no corner-frequency is detected. This may indicate that the varactors are at least partly responsible for the up-conversion of low-frequency noise [20]. Despite the slightly high corner frequency, the DTBC VCO presented in this paper presents state-of-the-art low phase noise for wideband VCOs. Table I benchmarks VCOs in open literature versus a FOM (22) where is the highest phase noise measured within the tuning bandwidth and is the offset frequency where is measured. The DTBC VCO reported in this paper is the only VCO maintaining a phase noise better than 102 dBc/Hz at 100-kHz offset over a frequency range of 1.3 GHz or more. Note that the FOM in (22) excludes the dc power consumption, in contrast to the power-normalized FOM [18] often used for VCOs in CMOS technology. The reason for excluding the power consumption is that this paper focuses on absolute performance rather than low power consumption. The power consumption of the DTBC VCO is 7 95 mW which is high compared to many other oscillators, but not disqualifying in applications, e.g., microwave links. V. CONCLUSIONS Methods for design of low phase-noise and wide-tuning range BC oscillators and VCOs have been presented. The validity of the methods is verified by implementations in InGaP HBT technology. A novel DTBC VCO with varactors between both emitters and collectors presents a phase noise better than 102

dBc/Hz at 100-kHz offset, over a 1.3-GHz tuning range with a nearly constant output power about 7 dBm. To the authors’ best knowledge, no other VCO published maintains such low phase noise over that tuning bandwidth. ACKNOWLEDGMENT WIN Semiconductors, Tao Yuan Shien, Taiwan, is acknowledged for engagement and support of this study. REFERENCES [1] H. Zirath, R. Kozhuharov, and M. Ferndahl, “Balanced Colpitt-oscillator MMICs designed for ultra-low phase noise,” IEEE J. Solid-State Circuits, vol. 40, no. 10, p. 691, Oct. 2005. [2] M. Bao, Y. Li, and H. Jacobsson, “A 25 GHZ ultra-low phase noise InGaP/GaAs HBT VCO,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 11, pp. 751–753, Nov. 2005. [3] A. Hajimiri and L. T. H. Thomas, “A general theory of phase noise in electrical oscillators,” IEEE J. Solid-State Circuits, vol. 33, no. 2, pp. 179–194, Feb. 1998. [4] P. Andreani, X. Wang, L. Vandi, and A. Fard, “A study of phase noise in Colpitts and LC-tank CMOS oscillators,” IEEE J. Solid-State Circuits, vol. 40, no. 5, pp. 1107–1118, May 2007. [5] R. Aparicio and A. Hajimiri, “A noise-shifting differential Colpitts VCO,” IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1728–1736, Dec. 2002. [6] H. Zirath, “Low phase-noise balanced Colpitt InGaP–GaAs HBTVCOs with wide frequency tuning range and small VCO-gain variation,” in IEEE Asia–Pacific Microw. Conf., Bangkok, Thailand, Dec. 11–14, 2007. [7] M. Tsuru, K. Kawakami, K. Tajima, K. Miyamoto, M. Nakane, K. Itoh, M. Miyazaki, and Y. Isota, “A triple-tuned ultra-wideband VCO,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 2, pp. 346–354, Feb. 2008. [8] A. Esswein, D. A. Gunther, R. Weigel, A. Aleksieva, and M. Vossiek, “A low phase-noise SiGe Colpitts VCO with wide tuning range for UWB applications,” in Proc. 5th Eur. Microw. Integr. Circuits Conf., Paris, France, 2010, pp. 452–455. [9] D. Ham and A. Hajimiri, “Concepts and methods in optimization of LC VCOs,” IEEE J. Solid-State Circuits, vol. 36, no. 6, pp. 896–909, Jun. 2001. [10] D. Leeson, “A simple model of feedback oscillator noise spectrum,” Proc. IEEE, vol. 54, no. 2, pp. 329–330, Feb. 1966. [11] I. Angelov, K. Choumei, and A. Inoue, “An empirical HBT largesignal model for CAD,” Proc. IEEE, vol. 13, no. 6, pp. 518–533, Jun. 2003. [12] S. Lai, D. Kuylenstierna, I. Angelov, B. Hansson, R. Kozhuharov, and -boosted BC compared to conventional BC and crossH. Zirath, “ coupled VCOs in InGaP HBT technology,” in IEEE Asia–Pacific Microw. Conf., Yokohama, Japan, Dec. 7–10, 2010, pp. 386–389. [13] F. Bonani, S. Guerrieri, and G. Ghione, “Noise source modeling for cyclostationary noise analysis in large-signal device operation,” IEEE Trans. Electron Devices, vol. 49, no. 9, pp. 1640–1647, Sep. 2002.

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[14] J.-C. Nallatamby, M. Prigent, M. Camiade, A. Sion, C. Gourdon, and J. Obregon, “An advanced low-frequency noise model of GaInP–GaAs HBT for accurate prediction of phase noise in oscillators,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 5, pp. 1601–1612, May 2005. [15] P. Traverso, C. Florian, M. Borgarino, and F. Filicori, “An empirical bipolar device nonlinear noise modeling approach for large-signal microwave circuit analysis,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 12, pp. 4341–4352, Dec. 2006. [16] C. Florian, P. Traverso, and F. Filicori, “The charge-controlled nonlinear noise modeling approach for the design of MMIC GaAs-pHEMT VCOs for space applications,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 4, pp. 901–912, Apr. 2011. [17] M. Rudolph, F. Lenk, O. Llopis, and W. Heinrich, “On the simulation of low-frequency noise upconversion in InGaP/GaAs HBTs,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 7, pp. 2954–2961, Jul. 2006. [18] A. Wagemans, P. Ballus, R. Dekker, A. Hoogstraate, H. Maas, A. Tombeur, and J. Van Sinderen, “A 3.5 mW 2.5 GHz diversity receiver and a 1.2 mw 3.6 GHz VCO in silicon-on-anything,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., 1998, pp. 250–251. [19] M. Bao, Y. Li, and H. Jacobsson, “A 21.5/43-GHz dual-frequency balanced Colpitts VCO in SiGe technology,” IEEE J. Solid-State Circuits, vol. 39, no. 8, pp. 1352–1355, Aug. 2004. [20] J. W. M. R. Rogers, J. A. Macedo, and C. Plett, “The effect of varactor nonlinearity on the phase noise of completely integrated VCOs,” IEEE J. Solid-State Circuits, vol. 35, no. 9, pp. 1360–1367, Sep. 2000. [21] R. Kozhuharov, D. Kuylestierna, and H. Zirath, “24 GHz InGaP-GaAs HBT push-push VCO with broadband tuning range,” in Proc. 4th Eur. Microw. Integr. Circuits Conf., Rome, Italy, 2009, pp. 242–245. phase noise in bipolar [22] A. Fard and P. Andreani, “An analysis of colpitts oscillators (with a digression on bipolar differential-pair LC oscillators),” IEEE J. Solid-State Circuits, vol. 42, no. 2, pp. 374–384, Feb. 2007. [23] D. Hauspie, E. Park, and J. Craninckx, “Wideband VCO with simultaneous switching of frequency band, active core, and varactor size,” IEEE J. Solid-State Circuits, vol. 42, no. 7, pp. 1472–1480, Jul. 2007. [24] A. D. Berny, A. M. Niknejad, and R. G. Meyer, “A 1.8-GHz LC VCO with 1.3-GHz tuning range and digital amplitude calibration,” IEEE J. Solid-State Circuits, vol. 40, no. 4, pp. 909–917, Apr. 2005.

Dan Kuylenstierna (S’04–M’07) was born in Göteborg, Sweden, in 1976. He received the M.Sc degree in engineering physics and Ph.D. degreee in microtechnology and nanoscience from the Chalmers University of Technology, Göteborg, Sweden, in 2001 and 2007, respectively. He is currently an Assistant Professor with the Microwave Electronics Laboratory, Department of Microtechnology and Nanoscience (MC2), Chalmers University. His main scientific interests are MMIC design, reconfigurable circuits, frequency generation, and phase-noise metrology. Dr. Kuylenstierna was the recipient of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) Graduate Fellowship Award in 2005.

Szhau Lai (S’12) was born in Taoyuan, Taiwan, in 1985. He received the B.S. degree in electrical engineering from National Chiao-Tung University, Hsinchu, Taiwan, in 2008, the M.S. degree in electrical engineering from the Chalmers University of technology, Göteborg, Sweden, in 2009, and is currently working toward the Ph.D. degree in microtechnology and nanoscience at the Chalmers University of Technology. His research interest includes the design of VCOs, noise modeling, and VCO phase-noise analysis. Mr. Lai was the recipient of the Transistor Modeling Competition of the 2012 IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS).

Mingquan Bao received the B.S. and M.S. degrees in electrical engineering from Zhejiang University, Hangzhou, China, in 1985 and 1988, respectively, and the Ph.D. degree in radar remote sensing from the University of Hamburg, Hamburg, Germany, in 1995. From 1995 to 1997, he was with the Institute of Oceanography, University of Hamburg. From 1997 to 2000, he was with the Center for Remote Imaging Sensing and Processing, University of Singapore, Singapore. From 2000 to 2001, he was with the German Aerospace Center (DLR), Cologne, Germany, where his research focus was on interferometric radar remote sensing. Since 2001, he has been with the Microwave and High-Speed Electronics Research Center, Ericsson AB, Mölndal, Sweden. He has authored over 30 papers in refereed journals and conferences. He holds several U.S. and European patents. His research interests include RF integrated circuit (RFIC) designs such as low-noise amplifiers (LNAs), mixers, and VCOs in silicon and GaAs technologies.

Herbert Zirath (S’84–M’86–SM’08–F’11) received the M.Sc. and Ph.D. degrees from the Chalmers University of Technology, Göteborg, Sweden, in 1980 and 1986, respectively. Since 1996, he has been a Professor of high-speed electronics with the Department of Microtechnology and Nanoscience, (MC2), Chalmers University. In 2001, he became the Head of the Microwave Electronics Laboratory, Chalmers University of Technology. He currently leads a group of approximately 40 researchers in the area of high-frequency semiconductor devices and circuits. He works part time with Ericsson AB, Mölndal, Sweden, as a Microwave Circuit Expert. He has authored or coauthored over 300 refereed journal/conference papers. He holds four patents. His main research interests include foundry-related MMIC designs for millimeter-wave applications based on both III–V and silicon devices, SiC- and GaN-based transistors and circuits for high-power applications, device modeling including noise and large-signal models for field-effect transistor (FET) and bipolar devices, and InP-HEMT devices and circuits.

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An Improved Wideband All-Pass I/Q Network for Millimeter-Wave Phase Shifters Sang Young Kim, Student Member, IEEE, Dong-Woo Kang, Associate Member, IEEE, Kwang-Jin Koh, Member, IEEE, and Gabriel M. Rebeiz, Fellow, IEEE

Abstract—This paper presents the design and analysis of an improved wideband in-phase/quadrature (I/Q) network and its implementation in a wideband phased-array front-end. It is found that the addition of two resistors in the all-pass I/Q network results in improved amplitude and phase performance versus capacitance loading and frequency, which is essential for wideband millimeter-wave applications. A prototype 60–80-GHz phased-array front-end based on 0.13- m SiGe BiCMOS is demonstrated using the improved quadrature all-pass filter and with 4-bit phase-shifting performance at 55–80 GHz. Application areas are in wideband millimeter-wave systems. Index Terms—Active phase shifter, beam-forming network, BiCMOS analog integrated circuit, in-phase/quadrature (I/Q) network, phase shifter, phased array, quadrature network, smart antenna.

I. INTRODUCTION

E

LECTRONIC phase shifters are essential for phased arrays, and have been implemented using passive and active networks in CMOS and SiGe technologies [1]–[19]. The active approach is based on an in-phase/quadrature (I/Q) network, and phase interpolation is achieved by adding the I/Q signals with appropriate amplitudes and polarities (Fig. 1) [11]–[19]. A low-loss accurate I/Q network is therefore an important circuit element of the active approach for precise phase shifting. To circumvent the loss in traditional R–C-based passive quadrature generators such as RC–CR bridge or R–C polyphase filters, a new quadrature all-pass filter (QAF) based on an L–C series resonator was proposed in [16]. The QAF Manuscript received April 13, 2012; revised July 19, 2012; accepted July 25, 2012. Date of publication August 31, 2012; date of current version October 29, 2012. This work was supported by the Toyota Research Institute of North America (TRINA). S. Y. Kim was with the Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA 92093 USA. He is now with Marvell Semiconductor, Santa Clara, CA 95054 USA (e-mail: sangykim@ucsd. edu). D.-W. Kang was with the Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA 92093 USA. He is now with Samsung Electronics, Suwon, Korea (e-mail: [email protected]). K.-J. Koh was with the Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA 92093 USA. He is now with the Electrical and Computer Engineering Department, Virginia Polytechnic Institute and State University, Blacksburg, VA 24061 USA (e-mail: kkoh@vt. edu). G. M. Rebeiz is with the Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA 92093 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2212027

Fig. 1. Active phase-shifter architecture.

utilizes a second-order series resonance and provides a wideband quadrature signal with maximum 3-dB voltage gain, and has been implemented in several wideband phased-array chips [14]–[19]. However, at millimeter waves, the QAF loading capacitance due to the vector modulator can be comparable to the internal QAF capacitance, and this results in significant I/Q errors. In fact, this problem was known in [16], and it was recommended that the loading capacitance be chosen to be 0.1–0.2 of the filter capacitance ( ) for reduced phase errors. At millimeter-wave frequencies, this is not possible in many cases, and therefore, an improved QAF network that is not sensitive to the loading capacitance is required. This paper presents the analysis of such a network, and its implementation in a wideband 60–80-GHz phased-array front-end. II. ACTIVE PHASE-SHIFTER ARCHITECTURE The active phase-shifter architecture is presented in Fig. 1. An I/Q network and two variable gain amplifiers (VGAs) are used in a differential mode for sign reversal, and the VGA outputs are summed in the current domain to create the final vector with arbitrary phase shift. The output phase relies on the gain ratio between the I- and Q-paths, and this results in a robust design against process, supply voltage, and temperature variations. Phase synthesis based on the interpolation of quadrature vectors is a linear operation and is independent of frequency, guaranteeing wideband operation. The fundamental limitation of the phase accuracy and the operating bandwidth is given by the quadrature network. A. Analysis of Phase Synthesis Based on Signal Interpolation To investigate the effect of the amplitude and phase errors in the quadrature network on the output phase accuracy, define a quadrature signal set as , where and are the I/Q amplitude mismatch and phase imbalance of the basis I/Q and , respectively. The linear combination of the vectors , reference vectors is

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Fig. 2. Contour plot of I/Q errors (quadrature phase error, , and ampli) in a quadrature network for 3-bit (region I, tude mismatch, ), 4-bit (region II, ) and 5-bit ) operation. (region III,

where and are amplitude weights determined by the output phase . The phase error and amplitude error of the output signal are given by (1) and (2), respectively,

(1)

dB

(2)

with number of phase bits, and ( , for , for and for ). When ( 90 phase bit), and , respectively, consistent with intuition ( , if ). should be to avoid any phase overlap between different phase bits, guaranteeing -bit phase resolution. Fig. 2 presents contour plots of and for several cases of . To achieve 3-, 4-, and 5-bit accuracies, the I/Q errors should be inside regions I–III, respectively. For example, for 5-bit phase accuracy, needs to be less than 5 with a maximum of 1.5 dB of I/Q amplitude error in the quadrature network.

Fig. 3. (a) Typical R–C-based lumped passive quadrature networks: RC–CR network, (b) R–C polyphase filter (one stage), and (c) L–C resonance-based quadrature networks. The differential version is called the QAF filter [16].

networks are in high signal routes such as local oscillator (LO) or IF rather than the RF path [20]–[22]. Quadrature signals can also be generated without any voltage loss using an L–C resonance technique, which is shown in Fig. 3(c) for the single-ended version (where and ). The transformation to a differential all-pass network having equal I and Q magnitude for all and wider bandwidth (due to lower factor), called a QAF, is described in [16]. The transfer function of the QAF is

where

III. QUADRATURE SIGNAL GENERATION A. R–C-Based and L–C Resonator Quadrature Generators The traditional RC–CR network has been widely used for narrowband quadrature signal generation [see Fig. 3(a)]. To extend the operation bandwidth, multistage R–C polyphase filter of which a single stage is shown in Fig. 3(b) has been used. However, the limitation of these I/Q networks is the loss, which tends to increase significantly with the number of stages for wideband operation. Therefore, the main applications of these

(3)

. For practical applications with , where the QAF results in 2–3-dB voltage gain over a wideband frequency range (3:1), which is much better than the R–C-based I/Q networks [16]. The QAF can generate any phase difference between two outputs by changing the resistor value ( ) in Fig. 3(c): i.e., in general, the replacement of with will generate of phase difference between the output ports. B. Performance Comparison Fig. 4 shows the performance comparison between the polyphase filters and the QAF, when driven by ideal voltage source and with no capacitance loading. For a fair comparison, the polyphase filters are also driven in an all-pass mode where the quadrature-phased differential input, , is tied to the in-phase differential input, in Fig. 3(b), resulting in equal I/Q amplitude for all and quadrature phase splitting at the pole frequency [22]. The poles of each stage in the two- and three-stage polyphase filters are also set at the

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Fig. 5. Input and output impedance of the I/Q networks shown in Fig. 4. (a) Input differential impedance and (b) output differential impedance for one dB and dB at 37 GHz of the I/Q outputs. For QAF, (0.53 ) to 132 GHz (1.88 ). Fig. 4. Performance comparisons between quadrature networks. (a) R–C one-, , and ) and QAF ( ). two-, and three-stage polyphase filters ( , (b) Quadrature phase error and gain characteristics versus normalized angular , fF, frequency for the QAF and polyphase filters. pH, and GHz.

same value. The three-stage polyphase filter shows the widest I/Q phase bandwidth at the expense of high loss. The I/Q phase-error characteristic of the QAF is equivalent to that of the second-order polyphase filter, but the QAF achieves 6-dB higher voltage gain than the second-order polyphase filter. The QAF can achieve more than 100% bandwidth with an I/Q phase error 5 and with 2.6 dB of voltage gain. Another difference between the polyphase filters and the QAF is that the QAF provides real input and output impedances over a wide bandwidth, while the input and output impedances of the polyphase filter are capacitive (Fig. 5) [16]. Typically input and output return losses of the QAF are 10 dB over more than 240% bandwidth.

The insertion of a series resistance in the high- branches of and reduces the network and its sensitivity to the loading capacitance (Fig. 6). In this case, the I/Q transfer function of (3) is modified as (4), and separates the negative real poles farther through decreasing by . does not disturb any zero location. Since the quadrature phase relation is set by the geometry of the zero positions, the I/Q phase characteristics of (4) are identical to those of (3)

(4)

C. Improvement of the QAF Under Loading Capacitance , will cause I/Q errors in A parasitic loading capacitance, the QAF and these errors are large at millimeter-wave frequencies since can be comparable to the filter capacitance . Decreasing ratio by increasing while kept constant can relieve this problem [16]. However, at millimeter-wave frequency, this will drop the impedance of the QAF network too low; hence, making it hard for the preceding stage to drive the QAF.

Fig. 7 presents the simulated QAF I/Q phase errors and magniversus at tude mismatches with several values of . The I/Q errors are suppressed with the increase of and the QAF is insensitive to the parasitic capacitance when at . The penalty is loss, as shown in Fig. 8, and the maximum loss to desensitize at is 6 dB when (Fig. 8 is done for ). The added benefit of is that it increases the QAF input impedance by and increases

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Fig. 6.

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reduction in the QAF using

to desensitize the loading capacitance.

Fig. 7. I/Q errors (phase errors and amplitude mismatches) in the QAF under , with several values of in Fig. 6. capacitive loading,

Fig. 8. Amplitude response of the improved QAF versus

.

the load impedance on the previous amplifier stage (thus lowering its power). An in-depth look at the frequency response of the QAF with a loading capacitance and the corresponding effect of is shown in Fig. 9. The simulations are done for a QAF with a natural , i.e., and . It is seen that the phase mismatch between the I and Q outputs for C is the same as , but with a shift in frequency due to the loading [see Fig. 9(a)]. The addition of an serves to reduce the factor of the network and widen the frequency response at the expense

Fig. 9. (a) I/Q phase error when increases . (b) I/Q phase increases . (c) I/Q amplitude mismatch when error when increases . (d) I/Q amplitude mismatch when increases . (e) I and Q voltage gain when increases . increases . (f) I and Q voltage gain when

Fig. 10. IBM 8HP metal stack-up.

of loss, as shown in Fig. 9(b). In effect, the I/Q response can be re-centered for a specific value and an is not really

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Fig. 11. Circuit schematics of the wideband millimeter-wave phase-shifter front-end.

needed. However, the amplitude mistmatch between the I and Q output is greatly affected by the loading [see Fig. 9(c)] and the addition of to the network improves the mismatch to 1.5 dB (from 4 to 5 dB) over a wide frequency range [see Fig. 9(d)], and allows the design of wideband 5-bit phase shifters. In reality, the choice of depends on and can be minimized with proper scaling of the QAF impedance together with optimizing the loading transistor size. Finally, process, voltage, and temperature (PVT) simulations are done for the QAF with a loading capacitance of . Considering the process variations of , , and and temperature range from 40 to 110 , the I/Q phase and amplitude error at the center frequency are less than 14.5 and 4.8 dB, respectively when . However, if , the phase error is less than 7.5 and the amplitude error is reduced to 0.2 dB at the center frequency. IV. WIDEBAND 60–80-GHz PHASE-SHIFTER DESIGN The active phase shifter is designed using a 0.13- m SiGe BiCMOS process (IBM 8HP). The IBM 8HP supports seven metal layers including two thick metal layers, AM m and LY m , for low loss of the RF routing (Fig. 10). The SiGe npn transistors with a peak cutoff frequency of 200 GHz, metal–insulator–metal (MIM) capacitors 1 fF m and spiral inductors are provided in the design kit, but in this study, coplanar waveguide (CPW) transmission lines are used as the inductors using shorted stubs. The transition between the 50transmission line and the ground–signal–ground (G–S–G) pad is designed using an electromagnetic (EM) simulator (Sonnet

[23]) to provide a 50- impedance and 25-dB reflection coefficient. The active phase-shifter circuit is shown in Fig. 11. First, the single-ended RF input signal is amplified by a three-stage low-noise amplifier (LNA), and then converted to a differential signal using an active balun. Next, the differential quadrature signals are generated using a QAF loaded with and the I/Q signals are sent to a vector modulator. One output of the vector modulator is terminated in 50 for single-ended -parameter measurements. A common-emitter topology is adopted for the LNA to provide low-noise matching and 50- input matching (Fig. 11). The first stage is biased at 1.0 mA m, which is the middle bias point between the lowest noise figure (NF) and the maximum power gain. The input matching is done using a single shunt inductor at the gate for the minimum chip area. The second and third stages are biased to maximize the gain. The LNA consumes 9.3 mA from a 1.5-V supply (14 mW) and achieves a simulated voltage gain of 19 dB at 70 GHz, and with dB at 55.5–73.0 GHz. The simulated NF is 8 dB and the 1-dB compression point is 19 dBm (when simulated with a 50output port). The active balun is realized using a two-stage differential amplifier by grounding one of the differential inputs of the first stage. In order to provide additional common-mode rejection, resistors are placed at the drain of the current source transistors (Fig. 11). Simulations indicate that the output signal has an amplitude imbalance of 0.7 dB and the phase error of 2.2 at 70 GHz. The simulated balun voltage gain is 7.9 dB at 70 GHz for a current of 11.2 mA.

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Fig. 12. Microphotograph of the wideband 60–80-GHz phase-shifter front-end (1.15 0.92 mm including pads).

After a buffer stage with a simulated voltage gain of 1.3 dB at 70 GHz, the differential quadrature signals are generated by the improved QAF network (Fig. 11). From the desired center frequency and reasonable QAF impedance ( ), the initial and values can be determined ( for , ). In this design, the estimated loading capacitance is fF, which results in , which causes an I/Q phase error of 18 and an amplitude mismatch of 6 dB at the center frequency (see Fig. 7). After bandwidth extension by lowering [16] and EM simulation, the final optimized values of and are , pH, and fF. By choosing , I/Q errors are greatly minimized and the input impedance doubles to 40 . The vector modulator is composed of two Gilbert-cell type VGAs [16], [17] and the desired phase signal is synthesized by adding the current-domain I/Q signals with the proper gains at the output nodes (Fig. 11). The 180 phase shifting is done by switching the tail current ( and ) and the variable gain function is done by changing the bias current of the I/Q branches (Ibias and Qbias). The vector modulator consumes 11.6 mA from a 3-V supply with a voltage gain including the QAF of 3.2 dB at 70 GHz. V. MEASUREMENT RESULTS All measurements are done on-wafer using an Agilent E8361A vector network analyzer with extenders to 110 GHz. A standard short-open-load-thru (SOLT) calibration to the -band GSG probe tips is first done using the Cascade 138–357 calibration substrate [24], and the measurements include the GSG pad transition loss. Several chips were measured and resulted in similar measurements. Fig. 12 presents the chip microphotograph of the wideband active phase-shifter front-end. The overall chip size is 1.15 0.92 mm including pads with a power consumption of 108 mW (LNA: 9.3 mA, 1.5 V, balun: 11.6 mA, 3.0 V, buffer: 8.6 mA, 3.0 V, vector modulator: 11.6 mA, 3.0 V). The power consumption is relatively high due to the wideband design of

Fig. 13. Measured and simulated

and

for 16 phase states.

Fig. 14. Measured and simulated gain response for 16 phase states and rms gain error.

60–80 GHz. Also, since this was a demonstration circuit for the improved QAF, low-power techniques, such as interstage transformer neutralization, were not used. Fig. 13 presents the measured input and output matching characteristics for 16 phase states. It is seen that is 10 dB at 60–80 GHz, and is 10 dB at 60–73 GHz. The measured does not agree well with simulations and this could be partly due to slight imbalances in the differential output port (one is internally loaded with 50 and the other is connected to the GSG pad) and partly due to the inaccurate capacitance EM simulation. The measured average power gain is 11.0–14.7 dB at 60–79 GHz and agrees well with simulations. The peak-to-peak gain variation is 2.3 dB, and the root mean square (rms) gain variation is 1.3 dB at 60–78 GHz for the 4-bit phase states (Fig. 14). Fig. 15 presents the measured 4-bit phase responses from 60 to 80 GHz. The phase shifter results in an rms phase error of 9.1 at 60–78.5 GHz, and 5.6 at 70–77.5 GHz, showing wideband 4-bit performance.

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Fig. 15. Measured phase response and rms phase error.

Fig. 18. Measured gain and rms errors at different temperatures.

Fig. 16. Measured quadrature phase error and amplitude error.

Fig. 18 presents the measured gain and rms errors at different temperatures up to 67 GHz (limited by the test setup). The gain drops by 10 dB from 20 to 110 . In the future, this gain drop can be compensated using proportional-to-absolute-temperature (PTAT) biasing circuits, as shown in [8]. On the other hand, the rms phase and gain errors remains the same, showing that the vector modulator amplifiers track each other over a wide temperature range. VI. CONCLUSIONS

Fig. 17. Measured and simulated NF.

An accurate method to measure the QAF performance is to compare the measured 0 and 90 responses of the active phase shifter [16]. Fig. 16 shows that the I/Q phase and amplitude error of the improved QAF is 9.5 and 0.5 dB for 55–78.5 GHz, respectively, which is a proof that the improved QAF does generate accurate I/Q signals under high capacitive loading. Both follow the response predicted in Fig. 9. The measured NF ranges is 9–11.6 dB at 63–75 GHz and agrees well with simulations (Fig. 17). The NF is nearly independent of the phase states because the LNA/active-balun gain is high enough to ignore the NF variation in the vector modulator. The measured 1-dB gain compression point is 27 dBm at 70 GHz (not shown).

This paper has presented an improved QAF and its implementation in a 60–80-GHz active phase shifter using 0.13- m SiGe BiCMOS technology. It has been demonstrated that with the inclusion of an in the QAF, the capacitive loading problem is mitigated and the I/Q phase and amplitude errors are minimized. This technique is especially suited for wideband millimeter-wave circuits, which naturally result in high values and cannot be tuned using narrowband techniques. A prototype wideband receiver resulted in state-of-the-art I/Q amplitude and phase balance at 55–78 GHz even with a loading of 0.5–0.8. ACKNOWLEDGMENT The authors thank Dr. J. Lee and K. Shiozaki, both with the Toyota Research Institute of North America (TRINA), Ann Arbor, MI, for technical discussions. REFERENCES [1] T. M. Hancock and G. M. Rebeiz, “A 12-GHz SiGe phase shifter with integrated LNA,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 3, pp. 977–983, Mar. 2005.

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[2] F. Ellinger, H. Jackel, and W. Bachtold, “Varactor-loaded transmission-line phase shifter at -band using lumped elements,” IEEE Trans. Microwave Theory Techn., vol. 51, no. 4, pp. 1135–1140, Apr. 2003. [3] D.-W. Kang and S. Hong, “A 4-bit CMOS phase shifter using distributed active switches,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 7, pp. 1476–1483, Jul. 2007. [4] D.-W. Kang, J.-G. Kim, B.-W. Min, and G. M. Rebeiz, “Single and -band transmit/receive phased-array silicon RFICs four-element with 5-bit amplitude and phase control,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 12, pp. 3534–3543, Dec. 2009. [5] C. F. Campbell and S. A. Brown, “A compact 5-bit phase-shifter MMIC for -band satellite communication systems,” IEEE Trans. Microw. Theory Techn., vol. 48, no. 12, pp. 2652–2656, Dec. 2000. [6] Y. Ayasli, S. W. Miller, R. Mozzi, and L. K. Hanes, “Wide-band monolithic phase shifter,” IEEE Trans. Microw. Theory Techn., vol. MTT-32, no. 12, pp. 1710–1714, Dec. 1984. [7] C.-Y. Kim, D.-W. Kang, and G. M. Rebeiz, “A 44–46-GHz 16-element SiGe BiCMOS high-linearity transmit/receive phased array,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 3, pp. 730–742, Mar. 2012. [8] S. Kim and G. M. Rebeiz, “A low-power BiCMOS 4-element phased array receiver for 76–84 GHz radars and communication systems,” IEEE J. Solid-State Circuits, vol. 47, no. 2, pp. 359–367, Feb. 2012. [9] S. Kim, O. Inac, C.-Y. Kim, and G. M. Rebeiz, “A 76–84 GHz 16-element phased array receiver with a chip-level built-in-self-test system,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2012, pp. 127–130. [10] J.-L. Kuo, Y.-F. Lu, T.-Y. Huang, Y.-L. Chang, Y.-K. Hsieh, P.-J. Peng, I.-C. Chang, T.-C. Tsai, K.-Y. Kao, W.-Y. Hsiung, J. Wang, Y. A. Hsu, K.-Y. Lin, H.-C. Lu, Y.-C. Lin, L.-H. Lu, T.-W. Huang, R.-B. Wu, and H. Wang, “60-GHz four-element phased-array transmit/receive system-in-package using phase compensation techniques in 65-nm flip-chip CMOS process,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 3, pp. 743–756, Mar. 2012. [11] M. Chua and K. W. Martin, “1 GHz programmable analog phase shifter for adaptive antennas,” in Proc. IEEE Custom Integr. Circuits Conf., May 1998, pp. 71–74. [12] Y. Yu, P. G. M. Baltus, A. Graauw, E. Heijden, C. S. Vaucher, and A. H. M. Roermund, “A 60 GHz phase shifter integrated with LNA and PA in 65 nm CMOS for phased array systems,” IEEE J. Solid-State Circuits, vol. 45, no. 9, pp. 1697–1709, Sep. 2010. [13] M. Elkhouly, S. Glisic, F. Ellinger, and J. C. Schyett, “A 60 GHz four channel beamforming transmitter in 0.25 m SiGe BiCMOS technology,” in IEEE Eur. Microw. Integr. Circuits Conf., Oct. 2011, pp. 25–28. [14] M. Elkhouly, C.-S. Choi, S. Glisic, C. Scheytt, and F. Ellinger, “Millimeter-wave beamforming circuits in SiGe BiCMOS,” in IEEE Bipolar/BiCMOS Circuits Technol. Meeting, Oct. 2010, pp. 129–132. [15] I. Sarkas, M. Khanpour, A. Tomkins, P. Chevalier, P. Garcia, and S. P. Voinigescu, “W-band 65-nm CMOS and SiGe BiCMOS transmitter and receiver with lumped I-Q phase shifters,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2009, pp. 441–444. [16] K.-J. Koh and G. M. Rebeiz, “0.13- m CMOS phase shifters for -, -, and -band phased arrays,” IEEE J. Solid-State Circuits, vol. 42, no. 11, pp. 2535–2546, Nov. 2007. -band 8-element phased[17] K.-J. Koh and G. M. Rebeiz, “An - and array receiver in 0.18- m SiGe BiCMOS technology,” IEEE J. SolidState Circuits, vol. 43, no. 6, pp. 1360–1371, Jun. 2008. [18] K.-J. Koh, J. W. May, and G. M. Rebeiz, “A millimeter-wave (40–45 GHz) 16-element phased-array transmitter in 0.18- m SiGe BiCMOS technology,” IEEE J. Solid-State Circuits, vol. 44, no. 5, pp. 1498–1509, May 2009. -band two-antenna [19] D.-W. Kang, K.-J. Koh, and G. M. Rebeiz, “A four-simultaneous beams SiGe BiCMOS phased array receiver,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 4, pp. 771–780, Apr. 2010. [20] M. A. F. Borremans, C. R. C. De Ranter, and M. S. J. Steyaert, “A CMOS dual-channel, 100-MHz to 1.1-GHz transmitter for cable applications,” IEEE J. Solid-State Circuits, vol. 34, no. 12, pp. 1904–1913, Dec. 1999. [21] F. Behbahani, Y. Kishigami, J. Leete, and A. A. Abidi, “CMOS mixers and polyphase filters for large image rejection,” IEEE J. Solid-State Circuits, vol. 36, no. 6, pp. 873–887, Jun. 2001. [22] K.-J. Koh, M.-Y. Park, C.-S. Kim, and H.-K. Yu, “Subharmonically pumped CMOS frequency conversion (up and down) circuits for 2-GHz WCDMA direct-conversion transceiver,” IEEE J. Solid-State Circuits, vol. 39, no. 6, pp. 871–884, Jun. 2004.

[23] Sonnet. ver. 11.52, Sonnet Softw. Inc., North Syracuse, NY. [24] “Cascade impedance standard substrate,” Cascade Microtech, Beaverton, OR, P/N: 138–357. [Online]. Available: http://www. cmicro.com

Sang Young Kim (S’05) received the B.S. degree in electrical engineering from Seoul National University (SNU), Seoul, Korea, in 2003, the M.S. degree in electrical engineering from the University of Southern California (USC), Los Angeles, in 2005, and the Ph.D. degree in electrical and computer engineering from the University of California at San Diego (UCSD), La Jolla, in 2012. He is currently with Marvell Semiconductor, Santa Clara, CA. His research interests include analog, RF and millimeter-wave integrated circuits, phased arrays in silicon technologies and high-speed I/O.

Dong-Woo Kang (S’04–A’07) received the B.S, M.S, and Ph.D. degrees in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2001, 2003, and 2007, respectively. From September 2007 to September 2010, he was a Postdoctoral Research Fellow with the Department of Electrical and Computer Engineering, University of California at San Diego (UCSD), La Jolla. He is currently with Samsung Electronics, Suwon, Korea. His research interests include CMOS/SiGe integrated circuits (ICs) for microwave and millimeter-wave phased-array systems.

Kwang-Jin Koh (S’06–M’09) received the B.S. degree in electronic engineering (with first-place honors) from Chung-Ang University, Seoul, Korea, in 1999, the M.S. degree in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2001, and the Ph.D. degree in electrical and computer engineering from the University of California at San Diego, La Jolla, in 2008. In November 2011, he joined the Electrical and Computer Engineering Department, Virginia Polytechnic Institute and State University, Blacksburg, as an Assistant Professor. From 2001 to 2004, he was with the Electronics and Telecommunications Research Institute (ETRI), Daejeon, Korea, where he was engaged in the research and development of RF and analog CMOS integrated circuits for wireless communication systems such as WCDMA, CDMA, and WLAN 802.11 a/b/g systems. From 2008 to 2010, he was with the Portland Technology Group (PTD), Intel Corporation, as a Senior Engineer, where he was involved in the development of voltage-controlled oscillators (VCOs) and phase-locked loops (PLLs) in Intel 32- and 22-nm CMOS processes for Intel microprocessors and radios applications. From 2010 to 2011, he was with the Broadcom Corporation, as a Senior Staff Scientist, where he developed RF integrated circuits (RFICs) for digital TV tuner systems-on-a-chip. His research interests include integrated radio and radar systems in silicon technologies for wireless communications, wireless sensing and detection, and imaging applications at RF, microwave, millimeter-wave, and sub-millimeter-wave regimes. Mr. Koh was the recipient of the 2002 Best Paper Award of the IEEE SolidState Circuits Society and Electron Device Society, Seoul Chapter. His Ph.D. works on integrated phased arrays on silicon technologies have been reported to the U.S. Pentagon as part of a Defense Advanced Research Projects Agency (DARPA) War Report as one of the major accomplishments of 2007. He was also the recipient of the 2010 Best Team of the Year Award of the Teledyne Scientific Corporation (formerly the Rockwell Scientific Corporation) in recognition of his phased-array designs.

KIM et al.: IMPROVED WIDEBAND ALL-PASS I/Q NETWORK FOR MILLIMETER-WAVE PHASE SHIFTERS

Gabriel M. Rebeiz (S’86–M’88–SM’93–F’97) received the Ph.D. degree from the California Institute of Technology, Pasadena. He is currently the Wireless Communications Industry Chair Professor of electrical and computer engineering with the University of California at San Diego (UCSD), La Jolla. From 1988 to 2004, he was at The University of Michigan at Ann Arbor. From 1988 to 1996, he contributed to planar millimeter-wave and terahertz antennas and imaging arrays, and his group has optimized the dielectric-lens antennas, which is the most widely used antenna at millimeter-wave and terahertz frequencies. His group also developed 6–18- and 40–50-GHz eight- and 16-element phased arrays on a single silicon chip, and the first millimeter-wave silicon passive imager chip at 85–105 GHz. His group also demonstrated high- RF MEMS tunable filters at 1–6 GHz and the new angular-based RF MEMS capacitive and high-power high-reliability RF MEMS metal-contact switches. As a consultant, he helped develop the USM/ViaSat 24-GHz single-chip SiGe automotive radar, phased arrays operating at -, -, -, -, -, and -band for defense and commercial applications, the RFMD RF MEMS switch, and the Agilent RF MEMS switch. He is the Director of the UCSD/Defense Advanced Research Projects Agency (DARPA) Center on RF MEMS Reliability and Design Fundamentals. He has authored

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or coauthored over 500 IEEE publications. He authored RF MEMS: Theory, Design and Technology (Wiley, 2003). He has graduated 42 Ph.D. students and 15 post-doctoral fellows. He currently leads a group of 21 Ph.D. students and post-doctoral fellows in the area of millimeter-wave RF integrated circuits (RFICs), tunable microwaves circuits, RF MEMS, planar millimeter-wave antennas, and terahertz systems. Prof. Rebeiz is a National Science Foundation (NSF) Presidential Young Investigator. He has been an associate editor for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES. He has been a Distinguished Lecturer for the IEEE Microwave Theory and Techniques Society (IEEE MTT-S), IEEE Antennas and Propagation Society (AP-S), and IEEE Solid-State Circuits Society. He was the recipient of an URSI Koga Gold Medal Recipient, the 2003 IEEE MTT-S Distinguished Young Engineer, the IEEE MTT-S 2000 Microwave Prize, the IEEE MTT-S 2010 Distinguished Educator Award, the 2011 IEEE AP-S John D. Kraus Antenna Award, the 1997–1998 Eta-Kappa-Nu Professor of the Year Award, the 1998 College of Engineering Teaching Award, the 1998 Amoco Teaching Award given to the best undergraduate teacher at The University of Michigan at Ann Arbor, and the 2008 Teacher of the Year Award of the Jacobs School of Engineering, UCSD. His students have been the recipients of a total of 20 Best Paper Awards of IEEE MTT-S, RFIC, and AP-S conferences.

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180 and 90 Reflection-Type Phase Shifters Using Over-Coupled Lange Couplers Hongzhao Ray Fang, Student Member, IEEE, Xinyi Tang, Member, IEEE, Koen Mouthaan, Member, IEEE, and Régis Guinvarc’h, Member, IEEE

Abstract—Reflection-type phase shifters (RTPSs) of 180 and 90 using over-coupled Lange couplers to obtain multioctave bandwidth are presented. A thorough theoretical analysis of the effect of coupler parameters on the RTPS performance is provided. The impact of coupler parameters on the RTPS performance is further illustrated with vector plots. Each measured phase shifter is comprised of an over-coupled Lange coupler, two low-loss single-pole double-throw switches, and two pairs of LC reflection loads on a Rogers RO4003C substrate with a thickness of 0.8 mm (32 mil) and 1.5 mm (60 mil). By using the 1.5-mm substrate, the coupling can be increased. Phase shifts of 90 and 180 using Lange couplers with 2–3-dB coupling in steps of 0.2 dB are designed, fabricated, and measured. The experimental results show that an over-coupling of 2.2 dB is able to obtain a return loss larger than 10 dB over a 127% bandwidth from 550 to 2450 MHz for all states. Worst case measured insertion loss and phase error on the 0.8-mm substrate with an over-coupling of 2.8 dB is 2.0 0.8 dB and 5.8 , respectively, for both 180 and 90 phase states. On the 1.5-mm substrate with an over-coupling of 2.4 dB, they are 1.8 1 dB and 16 , respectively, for both phase states. Index Terms—Lange coupler, reflection-type phase shifter (RTPS).

I. INTRODUCTION

P

HASE shifters are important components with applications in phased arrays and smart antenna systems for fast and accurate beam forming and beam steering. Recently, more applications, such as multifunction and multiband phased-array radars, require phase shifters with a bandwidth beyond an octave. There are four main types of phase shifter topologies capable of an octave bandwidth: the switched line, loaded line, high pass/low pass, and reflection type [1]. Realizing a wider bandwidth is a challenge, especially for the larger 180 and 90 phase shifts. In the switched-line phase shifter, two or more transmission lines of differing lengths are used to realize specific phase shifts. While it has the advantages of simplicity and Manuscript received March 21, 2012; revised August 08, 2012; accepted August 10, 2012. Date of publication September 28, 2012; date of current version October 29, 2012. H. R. Fang, X. Tang, and K. Mouthaan are with the Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117583 (e-mail: [email protected]; [email protected]; [email protected]). R. Guinvarc’h is with SONDRA, Supélec, 91190 Gif-sur-Yvette, France (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2216892

Fig. 1. Block diagram of the RTPS with a Lange coupler.

a stable phase response over temperature, it is susceptible to insertion-loss resonances due to long line lengths and the switches [1]. The loaded-line topology realizes phase shifts by switching between different susceptances loaded on a transmission line. However, this topology has broadband performance only for smaller phase shifts below 90 [1], [2]. The high-pass/low-pass topology switches between a high-pass (phase advance) and a low-pass (phase delay) state to obtain a phase shift. However, more elements are required if more than an octave bandwidth is required for phase bits larger than 90 [1]. The reflection-type phase shifter (RTPS), however, is capable of more than an octave bandwidth for the 180 phase bit and even wider bandwidths for smaller phase bits [1]. Additionally, it requires few discrete elements and the performance is highly repeatable. For the convenience of computer control and immunity to control voltage fluctuations, the digital RTPS is preferred. The block diagram of a typical digital RTPS is shown in Fig. 1. It consists of a 90 coupler, with the through and coupled ports connected to identical loads via a switch. The isolated port is the output port of the RTPS. At each state, the input signal from port 1 is divided between the through and coupled ports with a 90 phase difference. The reflected signals from each load sum up at the isolated port of the coupler. The desired phase shift is obtained by switching between the two loads while maintaining good return loss and insertion loss over the desired bandwidth. The RTPS first proposed by Hardin et al. [3] has been further developed with a variety of topologies and substrates using various types of hybrids and couplers [4]–[15]. Other technologies, such as microelectromechanical systems (MEMS), were also attempted for the RTPS achieving a bandwidth of 100% [16], [17]. Broadband 180 and 90 reflection loads using LC’s were also developed, leading to an RTPS of an octave bandwidth [18]. A thorough analysis of the RTPS with a nonideal 3-dB coupler was also performed to provide an estimate of the relationship between the phase-shift error and the return loss

0018-9480/$31.00 © 2012 IEEE

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and isolation of the coupler [19]. However, the analysis neglects higher order terms and this underestimates the phase error of a wideband RTPS. In this paper, the analysis of the RTPS unifies the effects arising from the imperfections of the quadrature coupler on the overall performance of the RTPS. The analysis provides designers an accurate estimate of the maximum phase error and maximum amplitude imbalance in relation to the coupler’s return loss and isolation for a decade bandwidth. It is shown that increasing the coupling of the coupler beyond 3 dB extends the overall bandwidth of the RTPS to more than two octaves (120%). This is demonstrated by realizing RTPSs with overcoupled Lange couplers on Rogers RO4003C 0.8- and 1.5-mm substrates. The Lange couplers were designed with coupling values from 2 to 3 dB in steps of 0.2 dB and are terminated with the reflective loads derived from [18]. To the best of our knowledge, this is the first time RTPSs based on over-coupled Lange couplers using standard printed circuit board (PCB) manufacturing processes on low-cost Rogers substrates are realized and reported with a measured bandwidth of 127% from 550 to 2450 MHz. This is a significant improvement from the typical RTPSs using a standard 3-dB coupler. II. ANALYSIS OF RTPS WITH IDEAL COUPLED-LINE COUPLER MODEL A. RTPS With Over-Coupled Coupled-Line Coupler The scattered power waves of the coupler, shown in the block diagram of the RTPS in Fig. 1, are given by

(1)

where is the reflection coefficient of the reflective load shown in Fig. 1. By performing arithmetic manipulation for and , the following relations are obtained:

(2)

(3) To facilitate the analysis of the RTPS shown in Fig. 1, the Lange coupler is modeled by an ideal coupled-line coupler model with the assumption that each line couples only to the nearest neighbor [20]. By symmetry, the -parameters of the coupler are simplified with the following coefficients:

(4)

Fig. 2. and of the RTPS using an ideal coupler at various coupling values with ideal open and short circuit as Load 1 and Load 2, respectively.

where and relate to the reflection, coupling, transmission, and isolation coefficients, respectively. Subsequently, the and of the RTPS, belonging to each state, can be obtained as

(5) (6)

Equations (5) and (6) show that an ideal 3-dB coupler with infinite return loss and isolation, together with a perfect 90 phase difference between through and coupled ports, translates to the following ideal parameters of the RTPS: infinite return loss, zero state-to-state amplitude imbalance (the amplitude difference between state 1 and state 2), and zero phase error (the difference between the realized phase shift and the desired phase shift). From (6), it also becomes clear that the near the center frequency of the RTPS is dominated by the factor in the second term. Assuming that the reflection load is lossless, this suggests that the RTPS requires the through and coupled ports of the coupler to couple sufficiently such that throughout the desired bandwidth of the RTPS. To extend this condition for a wider bandwidth, the coupling coefficient of the coupler, , can be increased to a coupling larger than 3 dB. This is demonstrated in a simulation study using AWR’s Microwave Office (MWO) circuit simulator. In this study, the ideal coupled-line coupler model is used, and Load 1 and Load 2 are replaced by an ideal open circuit and short circuit , respectively. The single-pole double-throw (SPDT) switch used in this study is also assumed ideal. The and of the RTPS using the ideal coupled-line coupler model with coupling coefficients, and dB are presented in Fig. 2. As coupling increases, the frequency range where is satisfied also increases, resulting in an overall extension

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Fig. 3. RTPS 10-dB return-loss bandwidth versus coupler’s coupling for several coupler return loss/isolation values.

in amplitude bandwidth in the RTPS. While the amplitude response is flat at the center frequency in the case of the 3-dB coupler, slight rippling is observed for coupling values larger than 3 dB. The return-loss bandwidth also increases. For the case of the 3-dB coupler, there is only a single frequency point where that results in a single resonant dip in . Coupling larger than 3 dB results in two resonant dips that shift symmetrically away from the center frequency. This leads to a significant extension of the return-loss bandwidth beyond two octaves. In using an ideal coupler for this study, the -parameters of both states are exactly the same. Thus, only the response for one state is shown in Fig. 2. The phase error is also observed to be zero throughout the frequency band for both the 180 and 90 phase shifts. In conclusion, the overall bandwidth of the ideal RTPS increases beyond 120% when a coupler with more than 2.2-dB coupling is used. This trend is shown in Fig. 3 and is found to be the same for the 90 RTPS.

Fig. 4. Vector plots of individual terms in of the RTPS for an ideal 3-dB , 1.5 , and 1.8 . coupler with 20-dB return loss and isolation at State 1 and State 2 refer to the RTPS terminated with ideal open and short circuit, respectively.

B. Impact of Return Loss and Isolation of Coupler In case of an ideal coupler, of the RTPS is 0 and is . In this case, (6) also implies that the phase shift is simply defined by the reflection loads of the two states such that (7) However, for an imperfect coupler, the finite return loss and isolation of the coupler will contribute to error terms in (5) and (6). In the nonideal case, the impact on of the three terms in (6) (denoted by and , respectively) can be further illustrated with a vector plot of these three terms. Here, a 3-dB coupler with a return loss and isolation of 20 dB is assumed and Load 1 and Load 2 are still assumed to be an ideal open and short circuit, respectively. The three terms, of in (6) at , 1.5 , and 1.8 are shown in Fig. 4. The resultant vector is also shown as bold dashed arrows. Thus, for a single frequency point, a total of four vectors are plotted per state. From Fig. 4, it is observed that is insignificant and can be neglected. At , it is almost nonexistent and is not

Fig. 5. , amplitude imbalance, and phase shift of RTPS for both state 1 (open) and state 2 (short) using the circuit models of a 3-dB coupler of various return loss and isolation values.

shown. This is because the through and coupled coefficient of the coupler, represented by and in (6), are approximately equal in magnitude and exhibit a quadrature relationship within the operating band of the coupler. Thus, the summation of the square of these two vectors results in the cancellation of both

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Fig. 6. Relationship with return loss/isolation of the coupler over a decade bandwidth. (a) Maximum amplitude imbalance. (b) Maximum phase error.

Fig. 8. Typical measured RO4003C.

-parameters of 3-dB Lange coupler on Rogers

TABLE I SUMMARY OF VARIOUS SIX-FINGERED LANGE COUPLERS 0.8- AND 1.5-mm ROGERS RO4003C SUBSTRATE

ON

Fig. 7. Relationship between phase bandwidth and coupling for several coupler return loss/isolation values in the ideal 180 RTPS.

terms. Together with below 1.8 , the third term, in (6), , has insignificant impact on within the operating frequency band. Thus, (6) reduces to for (8) for It is also observed that represents the of the coupler and is typically very small below 1.8 . Among the three terms, the second vector, , has the largest magnitude and thus dominates both the absolute phase and amplitude response of . This is valid in the coupling region near where . As the frequency of operation deviates from , it reduces in magnitude due to decreased coupling of the coupler, as observed in Fig. 4 when . It is noted that and vanish when return loss and isolation are infinite.

Fig. 9. Example of fabricated RTPS on 1.5-mm (60 mil) Rogers 4003C.

It becomes clear from (8) and Fig. 4 that the amplitude imbalance and phase error exist as long as the coupler does not have an infinite return loss and isolation. As return loss decreases, the magnitudes of belonging to each state become increasingly unequal. Since the two vectors are in opposite direction, the amplitude imbalance for the 180 RTPS is the worst case among

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Fig. 10.

and

of the 180 RTPS for various couplings on a 0.8-mm-thick RO4003C substrate for: (a) State 1 and (b) State 2.

Fig. 11.

and

of the 180 RTPS for various couplings on a 1.5-mm-thick RO4003C substrate for: (a) state 1 and (b) state 2.

all the phase states. This is the main cause for the amplitude imbalance of the two states in the RTPS. With deteriorating return loss and isolation, it can also be seen from (8) that the absolute phase will deviate from that governed by . To demonstrate the impact of the return loss and isolation of the coupler, another set of simulations of the RTPS is performed from 100 to 3000 MHz using the 3-dB coupled-line model with return loss and isolation of 15 dB, 20 dB, and infinity. Load 1 and load 2 are still ideal open and short circuits at the through and coupled ports. The , amplitude imbalance and phase shift of the RTPS are shown in Fig. 5. For an ideal 3-dB coupled-line coupler with infinite return loss and isolation, and for the two different states are equal without any phase error throughout the entire band. This conclusion can be inferred from (6) where an infinite coupler return loss and isolation reduces the equation to only for both states, resulting in zero amplitude imbalance. Beyond the range of 0.4 and 1.6 , the insertion loss significantly increases due to significant under-coupling of the coupler, leading to . When the return loss and isolation of the coupler deteriorate, the and of the two states of the RTPS begin to deviate

from each other. Additionally, the maximum amplitude imbalance increases with decreasing return loss and isolation with and 2 . This relationship the maximum occurring at 0.1 is shown in Fig. 6(a). It is found that the maximum amplitude imbalance, occurring at 0.1 and 2 , is the same regardless of coupling value. As observed in Fig. 5, the maximum phase error, occurring approximately at 0.25 and 1.75 , also increases with decreasing return loss and isolation. The relationship between maximum phase error and return loss and isolation is shown in Fig. 6(b) for both 180 and 90 phase shifts. The maximum phase error slightly decreases when the coupling increases from 3 to 2 dB. A larger maximum phase error can also be expected for the 180 phase shifter, Thus, for a coupler return loss and isolation of more than 25 dB, the maximum phase error of a two-octave 90 and 180 RTPS are 6 and 8 , respectively. Fig. 7 presents the phase bandwidth for a phase error of 5 for several coupling values given the coupler’s return loss and isolation for a 180 RTPS. It shows that phase bandwidth increases when coupling increases. It should be noted that for an RTPS with a coupler return loss and isolation larger than 30 dB, the maximum phase error is less than 5 .

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Fig. 12. Amplitude imbalance of the 180 and 90 RTPS for various couplings on: (a) 0.8- (b) 1.5-mm-thick RO4003C substrate.

Fig. 13. Phase shift of the 180 and 90 RTPS for various couplings on: (a) 0.8- and (b) 1.5-mm-thick RO4003C substrate.

In conclusion, it is shown that multioctave performance can be achieved for the RTPS using an over-coupled quadrature coupler. However, to minimize amplitude imbalance and phase error of the RTPS, the coupler’s return loss and isolation parameters should be maximized throughout the entire operating bandwidth. Excessive rippling in the insertion loss can also occur if coupling exceeds 2 dB. In addition, the through and coupled port should also exhibit a quadrature relationship over the same operating bandwidth. III. REALIZATION OF RTPS USING OVER-COUPLED LANGE COUPLERS Multiple 90 and 180 RTPS using Lange couplers with six fingers centered at 1.5 GHz are designed and measured. The Lange couplers are designed with coupling coefficients between 2–3 dB in steps of 0.2 dB on Rogers 4003C 0.8- and 1.5-mm substrates with standard PCB manufacturing processes. Top and bottom metallization thickness is approximately 0.018 mm. Special attention has been given to maximize return loss and

isolation. Gold bond wires with a diameter of 0.025 mm (1 mil) are used for bonding at the tips of the fingers. The Lange couplers are measured with the HP8510C VNA calibrated with a customized thru-reflect-line (TRL) calibration kit. The calibration removes the effects of the SMA connectors and tapers between the feed and the SMA connector. From 0.1 to 2.5 GHz, the measured maximum phase imbalance between the through and coupled ports is 92 2 for all couplers. The typical measured response of a fabricated 3-dB Lange coupler on a 1.5-mm RO4003C substrate is shown in Fig. 8. The measured parameters of all the designed Lange couplers are summarized in Table I. It is observed from Table I that the Lange couplers designed on the 0.8-mm substrate exhibit better return loss and isolation. This is due to the smaller transitioning tapers used between the 50- feeds and the Lange coupler. However, given the PCB fabricator’s minimum spacing of 100 m, the Lange couplers on the 0.8-mm substrate can only achieve a maximum coupling of 2.8 dB. On the 1.5-mm substrate, a maximum of 2 dB is obtained with the same limitations.

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Fig. 14. Measured group delay of the 18 RTPS realized on 32- and 60-mil Rogers RO4003C substrate.

In place of the ideal open and short circuits mentioned in Section II, Loads 1 and 2 are now realized with discrete parallel and series LC resonators, respectively [18]. This also provides the flexibility of tuning out the phase errors caused by imperfections in the circuit. The values of these components are initially calculated from [18] and further optimized in the circuit simulator. The inductors and capacitors used to construct the LC loads are CoilCraft’s 0402CS series [21] and Murata’s GRM0402 series [22], respectively. The SPDT switch, Hittite HMC545, has a maximum insertion loss of 0.5 dB up to 2.5 GHz. A typical RTPS using a six-fingered Lange coupler on 1.5-mm RO4003C substrate is shown in Fig. 9. The measured and of the realized 180 RTPS on the 0.8- and 1.5-mm substrate are presented in Figs. 10 and 11, respectively. States 1 and 2 refer to the RTPS terminated with parallel and series LC loads, respectively. Since the -parameters of the 90 RTPS are similar, they are not shown. From the plots of and , it is observed that the amplitude and return-loss bandwidth of the RTPS increase as the coupling of the Lange coupler increases from 3 to 2 dB. A decrease of the return loss at the center frequency is also observed. FortheRTPSusingthe2-dB coupler,return loss deteriorates to 9.5 dB at 1.7 GHz. This is seen in Fig. 11 and it follows the trend shown earlier in Figs. 2 and 3. In the practical case, however, the return loss and isolation of the Lange coupler fabricated on the 1.5-mm substrate is only larger than 20 dB up to 2.5 GHz. This results in significant amplitude imbalances and bandwidth differences between the two states. As expected, the overall amplitude imbalance of the 180 RTPS is worse than the 90 RTPS for all cases, regardless of substrate thickness. This is observed in Fig. 12. Maximum amplitude imbalance within the 10-dB return-loss bandwidth is 1.3 dB and occurs in case of the 180 RTPS on the 1.5-mm substrate with 2-dB coupling. The points of maximum amplitude imbalance occur at the high-frequency edges and near the center frequency where over-coupling is largest. This is due to the nonideal return loss and isolation of the coupler and is aggravated by the amplitude imbalance between the through and coupled ports of the coupler. In comparison, the RTPSs realized

Fig. 15. RTPS 10-dB return-loss bandwidth versus coupler’s coupling.

TABLE II SUMMARY OF MEASURED PERFORMANCE PARAMETERS OF 18 REALIZED RTPSs

on the 0.8-mm substrate exhibits more than 50% less amplitude imbalance. This is attributed to the higher return loss and isolation of the Lange coupler on the 0.8-mm substrate. Fig. 13 presents the measured phase shift of the RTPS fabricated on the 0.8- and 1.5-mm substrate, respectively. The maximum phase error of the 180 RTPS is approximately 7.5 and 16 for the 0.8- and 1.5-mm substrate, respectively. Similar to amplitude imbalance, the lower phase error exhibited by the former is due to the higher return loss and isolation of the Lange coupler on the 0.8-mm substrate. For the couplers’ measured return loss and isolation range between 26–31 dB on the 0.8-mm substrate and 20–25 dB on the 1.5-mm substrate, the measured maximum amplitude imbalance and maximum phase error are very close to the predictions previously shown in Fig. 6. Note that the amplitude imbalance

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TABLE III COMPARISON OF PARAMETERS FOR VARIOUS RTPSs

and phase error do not occur in case of an over-coupled coupler with infinite return loss and isolation, as demonstrated in Section II-A. The measured group delays of all the realized circuits are presented in Fig. 14. A minimum insertion loss of approximately 1 dB can be observed across the two states from Figs. 10 and 11 due to the losses of the HMC545 switch and the conductive losses of the Lange coupler. Since the power emerging from the coupled and through ports of the coupler propagates twice through the switch, the loss is doubled. In addition, the same power also propagates through the Lange coupler twice, resulting in further losses. In this design, the insertion loss due to the series and parallel LC is insignificant due to the low resistive losses of these components. The inductors and capacitors are specified to have a minimum factor of 35 and 70 [22] at 900 MHz, respectively. As predicted by the ideal cases shown in Fig. 3, the measured results also show that the bandwidth of the RTPS increases with coupling. This trend is presented in Fig. 15 for the measured results. For the same amount of coupling, it can be observed that the measured bandwidth is wider than the ideal cases. This is due to the losses introduced by the Lange couplers extending the condition to a larger bandwidth. Note that this slight bandwidth extension occurs at the expense of an increased insertion loss. Finally, from the summarized performance of the fabricated RTPSs, shown in Table II, the optimum amount of coupling for the widest 10-dB return-loss bandwidth is 2.2 dB. For a coupling of 2.2 dB, the RTPS has a bandwidth of 127%. The return-loss bandwidth presented in the table is valid for all states. IV. COMMENTS AND DISCUSSION The measured performance of various published RTPSs is summarized in Table III. The reported phase error is for the frequency range presented in the same table. CMOS designs

are left out deliberately as they are typically much narrower in bandwidth and exhibit higher insertion losses compared to other technologies. In comparison with other designs, the proposed RTPS demonstrates that a larger usable bandwidth beyond two octaves can be achieved by using an over-coupled Lange coupler. In addition, it is realized using low-cost fabrication methods and materials. By maximizing the return loss and isolation parameters of the quadrature coupler, this wide bandwidth can be obtained without compromising phase error and amplitude imbalance. This was implied in Figs. 4–6 and the measured results in Table II. Using a thinner substrate improves the return loss and isolation because of the smaller transitions, but over-coupling is more difficult to realize. It was found that a line spacing between 60–75 m is required to obtain the desired 2.2-dB over-coupling on the 0.8-mm substrate. This requires special and more costly PCB processes. A low-cost alternative could be to design on substrates with 35.6- m-thick copper to increase the edge coupling. Laser etching machines with micrometer-sized beams can also be employed to ablate the fine gaps between the coupling fingers for sub-100- m gaps. Other alternatives include the use of two Lange couplers in tandem for tighter coupling, but at the expense of size and more bond wires. Additionally, broadside couplers in multilayer realizations can also obtain the desired coupling together with high return loss and isolation. However, the substrate and prepreg should be carefully chosen to ensure that the coupler operates in TEM mode to equalize even- and odd-mode velocities. This will ensure optimum return loss and isolation. The implementation is also more tedious and expensive. Finally, the return loss and isolation at the high-frequency points of a planar Lange coupler can be further improved by using a substrate with permittivity closer to 1, such as Rogers RO5880, at the expense of size, cost, and substrate rigidity. It

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is noted from simulations that a ceramic-based substrate with higher permittivity increases dispersive effects, resulting in poorer return loss and isolation performance at the high-frequency edge. Thus, it is less suitable for an RTPS that requires a large bandwidth. V. CONCLUSION Multioctave bandwidth 180 and 90 RTPSs using over-coupled Lange couplers are presented. The theoretical analysis using vector analysis is shown. The relationship between amplitude imbalance and phase error, versus return loss and isolation is established. This allows the worst case prediction of the amplitude imbalance and phase error over a decade bandwidth given the coupler’s parameters. Eighteen 180 and 90 RTPS utilizing Lange couplers of coupling values in steps of 0.2 dB are also designed and measured. For the largest 10-dB return-loss bandwidth, it is found that a coupling of approximately 2.2 dB is optimum. REFERENCES [1] R. V. Garver, “Broad-band diode phase shifters,” IEEE Trans. Microw. Theory Techn., vol. MTT-20, no. 5, pp. 314–323, May 1972. [2] I. J. Bahl and K. C. Gupta, “Design of loaded-line p-i-n diode phase shifter circuits,” IEEE Trans. Microw. Theory Techn., vol. MTT-28, no. 3, pp. 219–224, Mar. 1980. [3] R. H. Hardin, E. J. Downey, and J. Munushian, “Electronically-variable phase shifters utilizing variable capacitance diodes,” Proc. IRE, vol. 48, no. 5, pp. 944–945, May 1960. [4] C. S. Lin, S. F. Chang, C. C. Chang, and Y. H. Shu, “Design of a reflection-type phase shifter with wide relative phase shift and constant insertion loss,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 9, pp. 1862–1868, Sep. 2007. [5] J. C. Wu, T. Y. Chin, S. F. Chang, and C. C. Chang, “2.45-GHz CMOS reflection-type phase-shifter MMICs with minimal loss variation over quadrants of phase-shift range,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 10, pp. 2180–2189, Oct. 2008. [6] S. Cheng, E. Öjefors, P. Hallbjöurner, and A. Rydberg, “Compact reflective microstrip phase shifter for traveling wave antenna applications,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 7, pp. 431–433, Jul. 2006. [7] H. R. Ahn and W. Ingo, “Asymmetric ring-hybrid phase shifters and attenuators,” IEEE Trans. Microw. Theory Techn., vol. 50, no. 4, pp. 1146–1155, Apr. 2002. [8] T. Yahara, Y. Kadowaki, H. Hoshika, and K. Shirahata, “Broad-band 180 phase shift section in band,” IEEE Trans. Microw. Theory Techn., vol. MTT-23, no. 3, pp. 307–309, Mar. 1975. [9] S. Lucyszyn and I. D. Robertson, “Synthesis techniques for high performance octave bandwidth 180 analog phase shifters,” IEEE Trans. Microw. Theory Techn., vol. 40, no. 4, pp. 731–740, Apr. 1992. [10] S. Lucyszyn and I. D. Robertson, “Two-octave bandwidth monolithic analog phase shifter,” IEEE Microw. Guided Wave Lett., vol. 2, no. 8, pp. 343–345, Aug. 1992. [11] S. Lucyszyn and I. D. Robertson, “Decade bandwidth hybrid analogue phase shifter using MMIC reflection terminations,” Electron. Lett., vol. 28, pp. 1064–1065, 1992. [12] D. C. Boire, G. S. Onge, C. Barratt, G. B. Norris, and A. Moysenko, “4:1 bandwidth digital five bit MMIC phase shifters,” in IEEE Microw. Millim.-Wave Monolithic Circuits Symp., 1989, pp. 69–73. [13] D. C. Boire and R. Marion, “A high performance 6–18 GHz five bit MMIC phase shifter [using MESFETS],” in IEEE Gallium Arsenide Integr. Circuit Symp., 1995, pp. 267–270.

[14] L. Gu, W. Che, and D. Liu, “Design investigation of a compact broadband reflection-type PIN phase shifter,” in Int. Antenna Technol. Workshop, 2011, pp. 328–331. [15] D. Kim, Y. Choi, M. G. Allen, J. S. Kenney, and D. Kiesling, “A wideband reflection-type phase shifter at -band using BST coated substrate,” IEEE Trans. Microw. Theory Techn., vol. 50, no. 12, pp. 2903–2909, Dec. 2002. [16] S. Lee, J. H. Park, H. T. Kim, J. M. Kim, Y. K. Kim, and Y. Kwon, “Low-loss analog and digital reflection-type MEMS phase shifters with 1:3 bandwidth,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 1, pp. 211–219, Jan. 2004. [17] J. Lampen, S. Majumder, C. Ji, and J. Maciel, “Low-loss, MEMS based, broadband phase shifters,” in IEEE Int. Phased Array Syst. Technol. Symp., 2010, pp. 219–224. [18] K. Miyaguchi, M. Hieda, K. Nakahara, H. Kurusu, M. Nii, M. Kasahara, T. Takagi, and S. Urasaki, “An ultra-broad-band reflection-type phase shifter MMIC with series and parallel LC circuits,” IEEE Trans. Microw. Theory Techn., vol. 49, no. 12, pp. 2446–2452, Dec. 2001. [19] J. Zborowska and T. Morawski, “Analysis of the microwave phase shifter with a non-ideal 3 dB coupler,” Int. J. Electron., vol. 60, pp. 757–765, 1986. [20] W. P. Ou, “Design equations for an interdigitated directional coupler,” IEEE Trans. Microw. Theory Techn., vol. MTT-23, no. 2, pp. 253–255, Feb. 1975. [21] Coilcraft Design Support Tools Coilcraft, Cary, IL. [Online]. Available: http://www.coilcraft.com/design_tools.cfm [22] Murata Chip Monolithic Ceram. Capacitors, Smyrna, GA, Feb. 2012. [Online]. Available: http://www.murata.com/products/catalog/index.html#c_2 Hongzhao Ray Fang (S’09) received the B.Eng. and M.Eng. degrees from the National University of Singapore, Singapore, in 2006 and 2010, respectively, and is currently working toward the Ph.D. degree at the National University of Singapore. From 2006 to 2008, he was with Excelics Semiconductor Inc., as a Design Engineer engaging in hybrid microwave circuit and packaging designs for T/R modules and GaAs power amplifiers. His research interests include active and passive circuits for microwave and millimeter-wave applications. Xinyi Tang (S’09–A’10–M’11) received the B.S. degree from the Huazhong University of Science and Technology, Wuhan, China, in 2006, and the Ph.D. degree from the National University of Singapore, Singapore, in 2011. He is currently a Research Fellow with the Department of Electrical and Computer Engineering, National University of Singapore. His research interests include microwave circuit and antenna arrays. Dr. Tang was a recipient of the Best Student Poster Paper Award of the 2007 IEEE International Conference on Electron Device and Solid-State Circuits. Koen Mouthaan (S’94–M’04) received the M.Sc. and Ph.D. degrees in electrical engineering from the Delft University of Technology, Delft, The Netherlands, in 1993 and 2001, respectively. Upon completion of his doctoral degree, he joined the Radar Group, TNO Physics and Electronics Laboratorium, The Hague, The Netherlands. He subsequently joined SkyGate, a company that designs phased-array antennas for consumer applications. In 2003, he joined the RF and Microwave Group, National University of Singapore, Singapore, as an Assistant Professor. His research interests include active and passive integrated circuits for microwave and millimeter-wave applications. Régis Guinvarc’h (S’02–A’03–M’04) received the B.S. and M.S. degrees and Ph.D. degree from the Institut National des Sciences Appliques (INSA), Rennes, France, in 2000 and 2003, respectively, all in electrical engineering. From 2000 to 2003, he was with the Etienne Lacroix Company, as a Research Engineer, where he was engaged in research on microwave remote sensing through discrete random media. Since 2004, he has been an Associate Professor with Supélec ONERA NUS DSTA Research Alliance (SONDRA), Supélec, Gif-Sur-Yvette, France, where he is involved with antennas and HF surface wave radar. Dr. Guinvarc’h was the recipient of a Conventions Industrielles de Formation par la Recherche (CIFRE) grant.

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Theoretical Analysis and Practical Considerations for the Integrated Time-Stretching System Using Dispersive Delay Line (DDL) Bo Xiang, Member, IEEE, Anthony Kopa, Member, IEEE, Zhongtao Fu, Member, IEEE, and Alyssa B. Apsel, Senior Member, IEEE

Abstract—In this paper, we perform the theoretical analysis and experimental demonstration of an on-chip implementation -band nanosecond scale time-stretching (TS) system in a of a 130-nm IBM 8RF CMOS process. The theory of the TS system is applicable to general TS systems. In this study, we explain the impact of the time-bandwidth product (TBP) on practical design considerations and derive the error and distortion of a general TS system based on a dispersive delay line with perfect linear group delay and all pass amplitude characteristic. We also derive the time resolution of a general TS system using both the principle of uncertainty as well as the short time Fourier transform method. This fundamental result enables a designer to understand the qualitative relationship between the TBP and the best possible resolution of the TS system. Finally, we experimentally demonstrate the TS system on chip with nanosecond group-delay variance and 12–16-GHz bandwidth. This demonstration indicates the potential for implementation of more complicated time-scaling signal-processing systems on chip, as well as a quantification of the error and distortion for such systems. Index Terms—Bandpass filter (BPF), distortion analysis, distributed amplifier (DA), error analysis, short time Fourier transform (STFT) integrated dispersive delay line (DDL), time-bandwidth product (TBP), time resolution, time stretching (TS), voltage-controlled oscillator (VCO).

I. INTRODUCTION

I

N MODERN communication systems, signals of very high frequency and ultra-wide bandwidth are of great interest. It is a challenge for many conventional signal-processing schemes to process these signals, for applications such as signal detection and data conversion. One possible solution is to reduce the burden on conventional signal-processing schemes by slowing down the signal with a time-stretching (TS) system. Such a Manuscript received March 15, 2012; revised August 14, 2012; accepted August 20, 2012. Date of publication September 13, 2012; date of current version October 29, 2012. This paper is an expanded paper from the 12th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Santa Clara, CA, January 15, 2012. B. Xiang and A. B. Apsel are with the Department of Electrical and Computer Engineering, Cornell University, Ithaca, NY 14853 USA (e-mail: [email protected]; [email protected]). A. Kopa is with Integrated Defense Systems, Raytheon, Andover, MA 01810 USA (e-mail: [email protected]). Z. Fu is with Assembly and Test Technology Development (ATTD), Sort Test Technology Development (STTD), Intel Corporation, Hillsboro, OR 97124 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2215623

Fig. 1. Illustration of a typical TS system.

is the slope of the group delay.

system is capable of performing temporal manipulation on timewindowed or pulsed signals. A typical TS system can stretch and compress a pulse signal [1]. Stretching a signal in time will alleviate the burden on sampling rate, enabling a low-frequency sampler to measure a high-frequency signal [1], while compressing a signal will enhance signal-to-noise ratio (SNR) at the given transmitter power [2]. The idea of TS originates from chirped radar design [2]–[4]. The technique is based upon the application of dispersive devices that implement a frequency-dependent group delay. Fig. 1 provides a basic idea of a typical TS system. The input signal is modulated with an up-chirped carrier, whose instant frequency increases with time, and then sent through the dispersive filter. Since different frequency components of the chirped signal experience different group delays in the dispersive filter, the output signal is expected to be a stretched version of the input signal. While the TS system was first proposed by Caputi in the 1970s [3], theory of the TS system can be traced back to 1960s [4]. The photonic TS system is known for its ultrafast high-accuracy operation in applications such as data conversion [5]. Various photonic TS ADCs have been implemented with highly dispersive devices, such as dispersion compensated fiber (DCF) [5] and single-mode fiber (SMF) [6], yielding a high time-bandwidth product (TBP) of the system. Han and Jalali performed practical analysis of the photonic TS system including loss and dispersion of the optical fiber, modulation scheme, the effect of TBP, etc. [7], [8]. However, detailed theory of TS systems in the RF frequency range is lacking. Systems operating in this range have a much lower TBP such that error and distortion calculation are critically important. This study provides the theoretical basis of TS system operating in the RF frequency range and can be applied to TS in other operating ranges with proper adjustment. Furthermore, we address the important question of error

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or distortion in signals in the time domain as they pass from the input to output. We theoretically describe how energy in the input signal is converted to the output, and how well this energy (and therefore, the signal envelope) can be resolved in time. There is clear motivation for considering systems in the RF frequency range. Even though there are several state-of-the-art TS systems, none of them have achieved on-chip integration. Optical TS systems have the advantage of extremely large stretch factors ( 250) and very fine resolution ( 100 fs) [5]. However, they require costly and bulky elements, including DCFs, a mode-lock laser, and electrooptic modulators [5]–[8]. The on-board microwave TS system, which employs microstrip chirped electromagnetic bandgap (CEBG) delay lines, is capable of stretching ultra-wideband (UWB) signals (3 10 GHz) [1], but its size is on the order of the wavelength of the carriers (10 30 cm), and grows bigger as the dispersion becomes stronger [1]. The major challenge in implementing an on-chip TS system lies in the size optimization and loss compensation of the dispersive filter. The only previous integrated dispersive delay line (DDL) utilizes the dispersion near the cutoff frequency of the distributed amplifier (DA), and therefore realizes an increase in the group delay coupled with an associated increase in the loss [9]. In this study, we utilize bandpass filters (BPFs) to compensate for the loss and further enhance the dispersion of the DA. We also describe the time resolution of this and other systems analytically based on the uncertainty principle and use this to determine the fidelity of the stretched signal under different system conditions. With the improved integrated DDL, we successfully implemented the -band TS system in a 130-nm CMOS process. This paper is organized as follows. Section II provides the theoretical analysis of an ideal TS system. We mathematical derive a description of the stretching process, the error in this conversion, distortion, and the time resolution of this process. Section III introduces the design and implementation details of the integrated TS system. Section IV shows the simulation and experimental demonstration of the TS system. Section V presents a conclusion of this study. II. DESCRIPTION AND THEORY OF TS SYSTEM A. System-Level Description In a TS system (Fig. 2), a time-windowed or pulsed signal is sent through a dispersive device, mixed against a chirped carrier generated by a second dispersive device, and then applied to a third dispersive device. The dispersion slopes , , and (group-delay variation over bandwidth) determine the functionality of the TS system: stretching, compression, or time reversal [3]. Kolner provided the detailed mathematical derivation illustrating that the function of the first and third dispersive device in time domain resembles the spatial paraxial diffraction [10], [11]. The second dispersive device functions as a lens in time domain, which provides quadratic phase modulation to the incoming lightwave. That is the reason why the second dispersive device is regarded as the time-lens [10], [11]. A similar technique is taken to realize CEBG-based TS system for UWB signals [1]. Photonic TS systems have a similar structure, utilizing the DCF as the dispersive device [5]. For our system, we

Fig. 2. Space–time duality between spatial magnification and time stretch [3], [10], [11].

Fig. 3. Proposed TS system with linear chirp modulation and linear DDL.

minimize the number of the dispersive devices to reduce area and allow on-chip integration. We use a ramping voltage-controlled oscillator (VCO) to generate the linearly chirped carrier, as shown in Fig. 1. An on-chip system as proposed here should have a similar functionality in a much smaller area. B. Theory of an Ideal TS System In this section, we provide the theoretical basis and tools to analyze an ideal TS system with the following assumptions. First, the ramping VCO generates a perfect linearly chirped carrier. Second, the DDL has all-pass amplitude response with perfectly linear group-delay characteristic. Third, the input signal is a time windowed signal and it is synchronized with the chirped carrier. Last, the carrier frequency range is much higher than the signal bandwidth. With these assumptions, we redraw Fig. 1 as Fig. 3 with the characteristics of both the chirped carrier in time domain and the DDL transfer function in frequency domain, which can be represented as (1) (2) (3) represents the length of the input signal, As shown in Fig. 3, and represents the dispersion of the DDL. is valid within the time window of input signal (0 to ) and is

XIANG et al.: THEORETICAL ANALYSIS AND PRACTICAL CONSIDERATIONS FOR INTEGRATED TS SYSTEM

valid within the operating frequency range ( to ). The signals at different locations of the system are represented in both time domain as and frequency domain as ( ). Input signal is modulated against the chirped carrier, generating , expressed as

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Equation (9) can then be rewritten as

(11) (4) (5) When signal

passes through the DDL

, we obtain

The integral term in (11) resembles a Fresnel integral, except for the amplitude term . Numerical integration indicates that the major contribution of Fresnel integral comes from the vicinity around the point where the phase term equals zero, or equivalently, near the time point of (12)

(6) Applying inverse Fourier transform, we can obtain

This point can also be obtained by setting , regarded as the stationary phase point [4]. At the time locations far away from the stationary phase point, the phase term experiences fast variations and tends to cause cancellation with their adjacent points in the integral. As a result, we can approximate the result by replacing the integral limit with . The numerical integration of the Fresnel integral indicates that should be proportional to (13)

(7)

With the previous assumption that the carrier frequency range is much higher than the input signal bandwidth, it is valid to conclude that the input signal changes much slower than the carrier. In the integral from to , the input signal can be represented with . Therefore, we can rewrite the integral in (11) as follows:

The integration in the frequency domain is a Fresnel integration [2], [4], which can be calculated as (8) (14) Equation (7) can then be simplified as

Substituting (13) and (14) back into (11), we can obtain the output signal represented with the input signal (9)

Up to now, the derivation is accurate without involving any approximation. However, calculation of the integral is complicated by the nonsteady state characteristic of the signal. In order to calculate the integral term of (9), we rewrite the phase term as

(10)

(15) This analysis is a special case of the principle of stationary phase (PSP) analysis, which is based on the same assumption that the integral of a signal modulated against a fast varying phase can be represented with the integral of vicinity of the stationary phase point [4]. PSP analysis is capable of dealing with nonlinear chirp and nonlinear dispersion as well. Here, we introduce the stretch factor, represented as the ratio of output signal time duration over input signal time duration (16a)

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with (3), the stretching factor can be illustrated as (16b) Substituting (16) back into (15), we obtain (17) Equation (17) intuitively explains the stretching process, the input signal duration is stretched by a factor of , the amplitude shrinks by a factor of , which agrees with the law of energy conservation. The chirp function is still linear with the identical bandwidth of the input signal, only the chirp rate reduces by a factor of . After envelope detection, the output signal envelope is obtained (18) C. Distortion Analysis of an Ideal TS System As we mentioned before, the analysis of Section II-B is also regarded as the PSP analysis. Since the signal is not in steady state, we approximate the conversion from frequency to time by calculating around the stationary phase point where the signal contribution is greatest. The error of the approximation arises from (14) when moving the input signal out of the integral and representing it with its value at stationary phase point [4]. Haggarty successfully provided the error estimation to this approximation by performing series expansion with saddle point integration [12]. The error bound is given in percentage of the ideally stretched signal in (18)

(19) where is the stationary phase point shown in (12), and stands for the second derivative of the phase term of the integral in (9) [12]. In order to minimize the error, we need to choose a smooth signal whose is relatively small. This explains the errors and distortions associated with stretching of an input square pulse [4], [13]. Apart from this requirement, a square pulse passed through a TS system is distorted because it has large skirts in frequency domain exceeding the operating frequency range of the chirped carrier and the DDL [4], [13]. The distortion of the square pulse worsens with the decreasing TBP [14]. Therefore, the best input signal pulse shape to exploit the benefit of the TS system should be smooth and frequency limited. The best option would be a Gaussian pulse. In practice, it is very difficult to construct a Gaussian signal, instead, we need to use other plausible signals as replacement. A straightforward choice is a sinusoid. Complete analysis concerning all the error terms with edge effects is beyond the scope of this paper. In the remainder of the paper, we take the sinusoid signal as the input signal of the TS system. Equation (19) indicates that the error bound exhibits time dependence. It is necessary to analyze the distortion raised by the

Fig. 4. Distortion analysis of ideal TS system.

stretching process. In order to do that, we take the fast Fourier transform (FFT) of the stretched pulse envelope with the input of a sinusoid signal. The distortion factor is evaluated as the ratio of the desired signal intensity over the total intensity of undesired spectral components (higher order harmonics). The distortion factor shown in Fig. 4 is translated into decibels. A higher distortion factor results in less distortion in the output signal. Here we consider another variable, TBP. In our system, there are two blocks characterized by TBP, one is at the chirped carrier generation and the other is at DDL. These are defined as follows: (20) Since distortion analysis gives more information than error analysis in the dynamic operation of the TS system, we perform the distortion analysis with respect to different . The distortion factor increases with an increasing . A higher leads to more cycles of the chirped carrier inside the signal envelope. As a result, more details of the signal envelope can be described by the chirped carrier. When exceeds a certain value ( 200 in our case), the distortion factor will experience saturation around 62 dB. This sets the limit for the integrated TS system if we intend to use it for data conversion. Considering the analysis assumes a noiseless system, the SNR and distortion ratio will be worse in the presence of the noise. By inspecting the distortion, we can estimate the upper limit of the effective number of bits (ENOB) a TS-ADC can achieve. Since our system has the TBP of four with the distortion of 25 dB, the upper limit of the ENOB of our system is 3.8 bits. This TS system can be used for detection and characterization of the pulsed signal or time-windowed signal. One thing to mention here is that the carrier frequency range of the TS system analyzed in this study is limited to the RF and microwave range. It can be utilized to predict the photonic TS system, but the analysis requires more practical considerations, such as the dispersion characteristics of the optical fiber [5]–[8]. Furthermore, Fig. 4 shows that the distortion changes with TBP at a slope of 20 dB/decade, which means TBP has the linear relationship with the distortion of system. D. Time-Resolution Analysis of the Ideal TS System In Section II-C, we analyze the error and distortion of the ideal TS system. In this section, we perform the analysis fo-

XIANG et al.: THEORETICAL ANALYSIS AND PRACTICAL CONSIDERATIONS FOR INTEGRATED TS SYSTEM

cusing on the time domain of the signal. This is critically important for TS applications since understanding how accurately the energy at the input is resolved at the output in time will determine the utility of the system. Previous analysis has not rigorously described this. Kolner [10] and Han and Jalali [7] only commented on the time resolution or time aperture of the photonic TS system, which has 100 THz of carrier frequency and very large TBP, but did not provide analysis. This study deals with the time resolution of the general TS system operating at a lower frequency range with medium or low TBP. The results can also be applied to the photonic TS system with proper adjustment. Equation (9) indicates that the input signal, with proper chirp modulation, and the stretched signal form a pair of Fourier transforms [4], [10]. This can be more obvious if we define a new variable as (21) Due to (3), represents the dispersion slope and has the unit of hertz. Rewriting (9) with this newly defined variable, we obtain

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on the input signal , we are unable to point out the corresponding point on the output signal . Instead, the energy within a certain time slot of the input signal gets stretched into the correspondent time slot of the output signal. Even though the Fourier transform pair contains carrier information, the envelope detection will capture the energy inside each time slot, which is more critical for time-stretch systems that seek to improve sampled performance. Therefore, the lower limit of the time slot of the input signal is defined as the time resolution of the TS system. Since the output signal is the stretched version of the input signal, we can obtain the following scaling equation between the input and output time axis: (26a) (26b) From (25) and (26), (27) With (16), we can provide the estimation of the time resolution (28)

(22) where . As can be seen from (22), and have similar waveform shape, is connected to with a scale factor of . represents the chirp rate of the input chirped pulse and represents the dispersion slope of the DDL. The signal and form a pair of Fourier transforms. The signal has the envelope of the input signal and the quadratic phase term indicating a chirping rate of . In other words, the instantaneous frequency is changing along the time axis. A typical analysis that provides solutions to the signal of this category is joint time-to-frequency analysis. Due to the principle of uncertainty in the Fourier transform of (22) [15], (23) With (21), we obtain

. where In this case, the input signal can be divided into a number of slots with given time resolution, expressed as (29) We can examine the time resolution and the number of time slots with different stretching time (assuming is fixed). When , , dominates . In the extreme case when , there is no stretch effect at all, the output signal is identical to the input signal, therefore, the time resolution can be infinitely small and the number of time slots (represented as in the following sections) can be infinitely large. As increases, the time resolution increases and decreases. When , dominates and the time resolution has the upper bound limitation of (30a)

(24) Substituting (3) into (24) leads us to the following relation: (25) Usually the principle of uncertainty can be illustrated with the time-frequency resolution cells [15]. Notice this is a stretching process, the input signal is stretched into the output signal by the stretching factor of , expressed in (16). In this case, we can modify the time-frequency resolution cells to input time, output time resolution cells. The principle of uncertainty is very important in determining the time resolution of the TS system and it can be explained as follows. For a specific point

the number of time slots has the lower bound limitation of (30b) This is a very interesting feature of the TS system stating that even if the TS system employs a DDL with very large dispersion, the time resolution of the TS system is determined by the chirp rate of the chirped carrier and the number of time slots ( ) is determined by the TBP of the chirped modulated input signal. Fig. 5 shows the change of the time resolution and with respect to different stretching time (DDL delay variance) . Like the simulation in Section II-C, the parameters are chosen based on the integrated TS system, ns, GHz, ranges from 0.2 to 5 ns. The simulation is

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Fig. 5. (a) Time resolution and (b) number of time slots delay variance.

changes versus DDL

Fig. 7. Dispersion enhanced DA.

B. Design of an Active DDL With Multipath Approach

Fig. 6. Chirp generation. (a) Ramping VCO. (b) AM modulation.

performed in MATLAB, and is chosen from 0.2 to 5 ns to illustrate the trend of the time resolution with respect to decreasing the ratio (range from 5 to 1/5). A larger yields better time resolution to both input signal and stretched signal. One reason is that TS system with larger contains more carrier cycles inside the signal envelope, which is capable of carrying more information and better characterizing the input signal envelope as compared to the lower situation [8]. This is also the reason why photonic TS systems perform better than their microwave counterparts. III. CIRCUIT DESIGN AND IMPLEMENTATION Until now, implementations of TS systems have been large. Microstrip TS systems utilize microstrip DDLs with the length of 28 cm [1], while the photonic systems utilize kilometer-long DCF [5]–[7]. In this section, we describe the implementation of the -band TS system utilizing standard CMOS process. This is possible through the replacement of the dispersive elements with circuit counterparts performing analogous signalprocessing functions and resulting in the chirped carrier generation scheme shown in Fig. 6. A. Chirped Carrier Generation The ramping VCO [see Fig. 6(a)] is an LC-tank type VCO with a control signal applied to the varactor. As the control voltage (Vctrl) ramps with time, it alters the instantaneous frequency of the VCO output, yielding an up-chirped carrier from 12 to 16 GHz. The ramping VCO is followed by a two-stage amplitude modulation (AM) circuit [see Fig. 6(b)], which is capable of adjusting the envelope of the input pulse signal. As a result, an up-chirped pulse signal is obtained.

In the previous work, the active DDL is achieved with a three-stage cascaded DA that employs a dispersion enhanced section as the filter section inserted between the adjacent amplifiers. In the dispersion enhanced section, the inductor of the conventional section is replaced with the parallel LC tank, which can be described by an effective inductance with frequency dependence (Fig. 7) [9], [15]. When the parallel LC tank approaches its resonance frequency, the effective inductance increases accordingly. Therefore, the dispersion enhanced section exhibits stronger dispersion than the conventional section [9]. Since the cascaded DA structure provides only one path for the signal, it can be regarded as a single-path approach. One intrinsic drawback of this approach is its largest dispersion comes with the highest loss. In order to further improve the dispersion and provide gain compensation at higher frequencies, we propose to design the active DDL with a multipath approach [16]. The signal is first divided into several frequency channels and each channel is assigned with different group delays while the amplitude information of the spectral contents is preserved. The overall transfer function of the active DDL is similar to a BPF with designated group-delay characteristic, which is linear in our case. Fig. 8(a) shows the proposed design utilizing three paths. Three BPFs [17] are employed for frequency division and a three-stage cascaded DA of the previous work are utilized to provide group-delay assignment to each channel. The outputs of the three channels are launched into the different locations of the cascaded DAs. The output of Channel 3, which contains higher frequency components, is sent through more stages of DAs, while the output of Channel 1, which contains lower frequency components, is sent through fewer stages of DAs. Compared to the previous active DDL, the multipath design provides another degree of freedom in gain compensation. Since Channel 3 passes through most number of DA stages, it will experience more gain than Channel 1 and 2. Therefore, we use four-stage BPFs for Channel 1 and 2 to compensate for the gain variations, while Channel 3 employs a three-stage BPF. Furthermore, the output of Channel 3 is launched into the gate line of the DA, while the outputs of Channel 1 and 2 are launched into the drain

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TABLE I ELEMENT VALUES IN FIG. 9

Fig. 8. (a) Improved DDL with three paths. (b) Filter responses of Ch1 through Ch3.

Fig. 10. Comparison of gain (red in online version) and group delay (blue in online version) of the single path DDL using cascaded DAs and improved multipath DDL.

C. Comparison of Single-Path and Multipath Approaches From the description of Section III-B, we can conclude that the multipath approach is an improved version of the single-path approach. It fully utilizes the dispersion generated in the singlepath approach and provides gain compensation at the same time. Fig. 10 shows the comparison in simulated gain and dispersion characteristic of both approaches. The multipath approach improves the 6-dB bandwidth from 15 to 15.5 GHz, and enhances the dispersion from 0.9 to 1.5 ns. Fig. 9. (a) BPF of channel 3. (b) BPF of channel 1 and channel 2.

IV. MEASUREMENT RESULTS AND DISCUSSION line. Therefore, the BPF of Channel 3 is loaded with a 50- resistor [see Fig. 9(a)], whereas the BPFs of Channel 1 and 2 employ an open drain structure to provide high output impedance [see Fig. 9(b)] [16]. The element values of Fig. 9(a) and (b) is shown in Table I. The measured frequency response of each channel is presented in Fig. 8(b). It is 1 GHz lower than the simulated results (Fig. 10) because of the parasitic capacitances of the integration and the output pads.

In this section, three sets of experimental demonstrations are performed to prove the stretching functionality of the TS system. The measurement setup follows the system block diagram in Fig. 1. In order to perform these experiments, a 1-ns input pulse with a sinusoidal pulse shape is generated. The shaped pulse has better performance over the square pulse because it exhibits a much smaller out of band ripple. The control signal (Vctrl) applied to the ramping VCO is synchronized

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Fig. 11. (a) On-chip generation of Vctrl. (b) Clock and Vctrl waveforms. (c) Different outputs with various Vctrl.

with the input pulse signal. A 50-GHz oscilloscope is utilized to detect the envelope of the output signal. The first demonstration shown in Fig. 11 is to prove that the dispersion is well controlled and the major contribution comes from improved DDL as we expected. We use the circuit in Fig. 11(a) to generate the Vctrl. Fig. 11(b) shows that the Vctrl is synchronized with the clock signal and as we increase the Vslew, the slope of the Vctrl is varying, resulting in a different chirping range. Fig. 11(c) shows the outputs of the TS system with 1-ns input modulated onto the carriers with different chirping range. When the Vslew is very small, Vctrl is not changing, shown as the red curve (in online version) in Fig. 11(b), the carrier is not chirped and the output is preserved as 1 ns. As the Vslew increases, the slope of the Vctrl increases, shown as the blue curve (in online version) in Fig. 11(b), and generates a chirped carrier that covers a portion of the frequency range of the improved DDL. As a result, the output signal is partly stretched. When the Vslew further increases, the slope of the Vctrl, shown as black curve in Fig. 11(c), increases to such an extent that the chirped carrier generated by the VCO shares the same frequency operation range as the improved DDL, the output signal will be fully stretched into 2 ns. The second experiment demonstrates the stretching of a single pulse. Fig. 12(a) and (b) shows the simulation results of the 1-ns pulse being stretched into a 2-ns pulse, while Fig. 12(c) and (d) exhibits the measurement results. The third experiment employs two subsequent sinusoid-shaped pulses as the input signal. Fig. 12(e) and (g) shows the simulation and measurement results of the two input pulses, respectively. Both pulses have 1-ns pulsewidth and are separated by 1 ns in time. After going through the TS system, both pulses are stretched and separated by 2 ns, shown in Fig. 12(f) for simulation and (h) for measurement. The total temporal length of the two pulses is stretched from 2 to 3 ns, which corresponds to the

Fig. 12. Top four figures show the single pulse case. (a) and (b) Simulated input and output pulses. (c) and (d) Measured input and output pulses. Bottom four figures show the double pulse case. (e) and (f) Simulated input and output pulses. (g) and (h) Measured input and output pulses.

Fig. 13. Integrated

-band TS system.

dispersion of the improved DDL. We can explain the measured output signals with the theory of Section II. From the distortion analysis, we can obtain the highest distortion factor of 25 dB (Fig. 4) with TBP of 4. In the test setup, we utilize the equivalent time oscilloscope for envelope detection. By inspecting the envelope, we can estimate the distortion of the output signal envelope. The estimated distortion of the stretched single pulse is 12 dB, it is worse than the estimated distortion of an ideal TS system with the same TBP (4) in Fig. 4 because the integrated TS system suffers from the nonidealities of including the noise of the active components, imbalance of differential-to-single ended AM modulation, nonlinearities of the chirp generation and DAs, ripples in gain and group delay, etc. Due to the limitation of the quantitative measurement of the uncertainty, we can explain the time resolution of the integrated TS system with a qualitative perspective. The input signals of both the single

XIANG et al.: THEORETICAL ANALYSIS AND PRACTICAL CONSIDERATIONS FOR INTEGRATED TS SYSTEM

pulse case and double pulse case exhibit sharp peaks. If the TS system is designed with a relatively large TBP, it is capable of capturing more details of these peaks, yielding the output signals with sharp peaks as well. While on the other hand, if the TS system is designed with a relatively low TBP, it is incapable of capturing sharp peaks, and the output peaks will be relatively flat as compared to the input. Since our integrated TS system has relatively low TBP, the time resolution is relatively low, thus the peaks of both output signals exhibit smooth and flat tops. If we were to have larger TBP, we can expect the top part to be sharper and to follow the ideally stretched pulse more accurately. V. CONCLUSION In this paper, we developed the theory analysis of a general TS system, providing the estimation of error, distortion, and time resolution. It also provides a qualitative explanation of the relationships between these features (error, distortion, and time resolution) and the TBP. Even though the analysis is based upon operation in the RF range, it can be modified and applied to the photonic TS system. Since the photonic TS system is usually equipped with large TBP ( 100–1000), it is still favorable to use a photonic TS system for high accuracy operations such as data conversion. The RF TS system, on the other hand, is limited by its TBP ( 10) in performing high-accuracy operations. It can be employed for other applications that have lower requirements on the accuracy such as pulse detection in UWB range. It can also be utilized for data conversion with lower accuracy. Furthermore, we present an experimental implementation of the first on-chip -band nanosecond TS system in a 130-nm CMOS process with the total area of 1 mm 4.5 mm (Fig. 13). Compared with previous counterparts in chirped radar communication, UWB signal processing, and optical ADCs, this TS system achieves more stretching per unit size, enabling on-chip integration. It employs the active structure, the DA, to compensate for the on-chip loss. Compared to the previous integrated DDL in [9], this study employs a multipath approach to further enhance and fully employ the dispersion of the previous DDL. This TS system shows sufficient stretching ability on the pulsed signal. Furthermore, this system shows the potential to realize more complicated time-scaling functionalities in addition to stretching. For instance, pulse compression is achievable if the input signal is modulated with a down-chirped carrier.

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[2] C. E. Cook and M. Bernfeld, Radar Signals, An Introduction to Theory and Application. New York: Academic, 1968. [3] W. J. Caputi, “Stretch: A time-transformation technique,” IEEE Trans. Aerosp. Electron. Syst., vol. AES-7, no. 2, pp. 269–278, Mar. 1971. [4] J. R. Klauder, “The theory and design of chirp radars,” Bell Syst. Tech. J., pp. 809–820, Jul. 1960. [5] J. Chou, O. Boyraz, D. Solli, and B. Jalali, “Femtosecond real-time single-shot digitizer,” Appl. Phys. Lett., vol. 91, Oct. 2007, Art. ID 161105. [6] A. S. Bhushan, P. V. Kelkar, B. Jalali, O. Boyraz, and M. Islam, “130-GSa/s photonic analog-to-digital converter with time stretch preprocessor,” IEEE Photon. Technol. Lett., vol. 14, no. 5, pp. 684–686, May 2002. [7] Y. Han and B. Jalali, “Photonic time-stretched analog-to-digital converter: Fundamental concepts and practical considerations,” J. Lightw. Technol., vol. 21, no. 12, pp. 3085–3103, Dec. 2003. [8] Y. Han and B. Jalali, “Time-bandwidth product of the photonic timestretched analog-to-digital converter,” IEEE Trans. Microw. Theory Techn., vol. 51, no. 7, pp. 1886–1892, Jul. 2003. [9] B. Xiang, A. Kopa, and A. Apsel, “A novel on-chip active dispersive delay line (DDL) for analog signal processing,” IEEE Microw. Wireless Compon. Lett., vol. 20, pp. 584–586, Oct. 2010. [10] B. H. Kolner, “Space–time duality and the theory of temporal imaging,” IEEE J. Quantum Electron., vol. 30, no. 8, pp. 1951–1963, Aug. 1994. [11] M. A. Foster, R. Salem, and A. L. Gaeta, “Ultra-high-speed optical processing using space–time duality,” Opt. Photon. News, vol. 22, no. 5, pp. 29–35, May 2011. [12] R. D. Haggarty, “A method of signal design employing saddle point integration,” MIT Lincoln Lab., Cambridge, MA, May 1961. [13] E. L. Key, E. N. Fowle, and R. D. Haggarty, “A method of designing signals of large time-bandwidth product,” in IRE Int. Conven. Rec., 1961, pp. 146–155. [14] T. Virolainen, J. Eskelinen, and E. Haeggstrom, “Frequency domain low time bandwidth product chirp synthesis for pulse compression side lobe reduction,” in IEEE Int. Ultrason. Symp., 2009, pp. 1526–1528. [15] T. T. Y. Wong, Fundamentals of Distributed Amplification. Boston, MA: Artech House, 1993. -band [16] B. Xiang, A. Kopa, Z. Fu, and A. B. Apsel, “An integrated nanosecond time-stretching system using improved dispersive delay line (DDL),” in IEEE 12th Silicon Monolithic Integr. Circuits in RF Syst. Top. Meeting, Jan. 2012, pp. 151–154. [17] T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits. Cambridge, U.K.: Cambridge Univ. Press, 2004. Bo Xiang (S’09–M’12), photograph and biography not available at time of publication.

Anthony Kopa (S’03–M’09), photograph and biography not available at time of publication.

Zhongtao Fu (S’03–M’08), photograph and biography not available at time of publication.

REFERENCES [1] J. D. Schwartz, J. Azana, and D. V. Plant, “A fully electronic system for the time magnification of ultra-wideband signals,” IEEE Microw. Theory Techn., vol. 55, no. 2, pp. 327–334, Feb. 2007.

Alyssa B. Apsel (S’94–A’02–M’03–SM’10), photograph and biography not available at time of publication.

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Gain-Bandwidth Analysis of Broadband Darlington Amplifiers in HBT-HEMT Process Shou-Hsien Weng, Student Member, IEEE, Hong-Yeh Chang, Member, IEEE, Chau-Ching Chiong, Member, IEEE, and Yu-Chi Wang

Abstract—Broadband Darlington amplifiers using a GaAs heterojunction bipolar transistor (HBT) high electron-mobility transistor (HEMT) process are reported in this paper. The gain-bandwidth analysis of the Darlington amplifiers using HEMT-HBT, HBT-HEMT, HEMT-HEMT, and HBT-HBT configurations are presented. The bandwidth, gain, input, and output impedances are investigated with transistor size, feedback resistances, and series peaking inductance. The design methodology of the broadband Darlington amplifier in the HBT-HEMT process is successfully developed, and the direct-coupled technique is also addressed for high-speed data communications. Furthermore, two monolithic HEMT-HBT and HEMT-HEMT Darlington amplifiers are achieved from dc to millimeter wave, and successfully evaluated with a 25-Gb/s eye diagram. The HEMT-HBT Darlington amplifier demonstrates the best gain-bandwidth product with good input/output return losses among the four configurations. Index Terms—Amplifier, GaAs, heterojunction bipolar transistor (HBT), high electron-mobility transistor (HEMT), monolithic microwave integrated circuit (MMIC).

I. INTRODUCTION

D

EMAND FOR high-speed data communications is increasing rapidly in recent years. A few multigigabits/second transceivers have been realized using advanced semiconductor technologies [1], [2]. A broadband amplifier plays an important role in both the transmitting and receiving sites. A distributed amplifier is usually adopted for high-speed applications due to its broad bandwidth [3]. However, the distributed amplifier has a few disadvantages, such as large chip size and high dc power consumption. A Darlington amplifier has potential for high-speed applications due to its compact chip size and broadband performance. The Darlington amplifier was invented by Darlington [4], and it can be a two- or three-transistor cell. Many broadband circuits designed using the Darlington pairs have been reported, Manuscript received July 19, 2012; accepted August 01, 2012. Date of publication September 17, 2012; date of current version October 29, 2012. This work was supported in part by the National Science Council of Taiwan, under Grant NSC 99-2221-E-008-097-MY3, Grant NSC 100-2221-E-008-118, and Grant NSC 101-2221-E-008-072-MY3, under the Atacama Large Millimeter/submillimeter Array–Taiwan (ALMA-T) Research Project, by the WIN Semiconductors Corporation, and by the Chip Implementation Center (CIC). S.-H. Weng and H.-Y. Chang are with the Department of Electrical Engineering, National Central University, Jhongli City, Taoyuan 32001, Taiwan (e-mail: [email protected]). C.-C. Chiong is with Academia Sinica, Institute of Astronomy and Astrophysics, Taipei 106, Taiwan. Y.-C. Wang is with the WIN Semiconductors Corporation, Taoyuan 333, Taiwan. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2215051

such as low noise amplifiers [5], [6], distributed amplifiers [7], broadband mixers [8], power amplifiers [9], and active baluns [10]. The bandwidth of the Darlington amplifier is mainly limited by the base resistor and the Miller multiplication of the transistors. A few techniques have been proposed to improve the maximum oscillation frequency of the heterojunction bipolar transistor (HBT) by reducing the base-to-emitter capacitances, the base-to-collector capacitances [11]–[13], and the base resistance [14], [15]. A substrate transfer process was proposed to improve the characteristics of the device [16]. A mirror-doubler Darlington amplifier achieves a 3-dB bandwidth of up to 85 GHz [17]. A series peaking technique was adopted to extend the 3-dB bandwidth of the Darlington amplifier [18]. A modified Darlington pair was proposed to enhance the bandwidth [7]. The modified Darlington pair consists of an emitter follower and a common-emitter transistor. Adequate attenuation compensation can be obtained when the base and emitter resistances of the emitter follower are cancelled out using the negative resistance generated using the common-emitter transistor [7]. Moreover, a Darlington cascade feedback amplifier employed self-bias and linearizing Darlington cascade topology was proposed to improve both the gain and linearity [19]. A triple Darlington amplifier using the three-transistor cell was proposed to achieve high gain-bandwidth product [20] as compared to the conventional Darlington amplifiers. A modified triple Darlington amplifier was proposed to further enhance the maximum available gain and the gain-bandwidth product of the triple Darlington amplifier [21]. However, the bandwidth of the triple Darlington amplifier is still limited by the base resistance and base-to-emitter capacitance, and dc power consumption is higher than the two-transistor Darlington amplifier. The gain-bandwidth analysis of the Darlington amplifiers using a GaAs HBT high electron-mobility transistor (HEMT) process is presented in this paper. The process offers the monolithic integration of an HBT and a HEMT in a single chip. The HBTs usually feature low noise, high linearity, and current driving capability, while the HEMTs exhibit low noise figure, high-frequency performance, and high input impedance. The designer has the flexibility to use the advantages of the HBT and HEMT in the monolithic microwave integrated circuit (MMIC) design [22]. A distributed amplifier using an HEMT-HBT cascade gain stage was proposed in [23]. The Darlington amplifier composed of a hybrid HBT and HEMT has been patented in [24] for compact size, low voltage, and low noise. The Darlington amplifiers designed using HBT-HEMT processes were reported in [5] and [25]. However, the Darlington pairs are only composed of two HBTs in [5] and [25].

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TABLE I PARAMETERS OF THE SMALL-SIGNAL HBT MODEL

Fig. 1. (a) Small-signal equivalentmodel of the HEMT.

model of the HBT. (b) Small-signal

In this paper, the design and analysis of the Darlington amplifiers using HEMT-HBT, HBT-HEMT, HEMT-HEMT, and HBT-HBT configurations are presented. The four configurations of the Darlington amplifiers are investigated with transistor size, feedback resistance, and series peaking inductance to further improve bandwidth, gain, input, and output matches. Moreover, a systematic design procedure is proposed for the broadband Darlington amplifier. The HEMT-HBT and HEMTHEMT Darlington amplifiers are successfully evaluated with an eye diagram up to 25 Gb/s. This paper is organized as follows. In Section II, the MMIC process and the small-signal models of the HBT and HEMT are described. The gain-bandwidth and input/output impedances of the Darlington amplifiers using the four configurations are investigated in Section III. The designs of the Darlington amplifiers are presented in Section IV. The experimental results and discussions are presented in Section V. A conclusion is provided in Section VI.

TABLE II PARAMETERS OF THE SMALL-SIGNAL HEMT MODEL

II. MMIC PROCESS AND DEVICE CHARACTERISTIC The Darlington amplifiers are designed using a GaAs HBTHEMT process provided by the WIN Semiconductors Corporation. The process provides 2- m InGaP/GaAs HBT and 0.5- m enhancement- and depletion-mode (E/D-mode) HEMT for the circuit design. Two metal layers are available for the interconnection. The HBT exhibits a unity current gain frequency of 32 GHz and a maximum oscillation frequency of 52 GHz. The E-mode HEMT exhibits an of 36 GHz and an of 70 GHz. The metal–insulator–metal (MIM) capacitor with a unit capacitance of 600 pF/mm , a thin-film resistor with a unit resistance of 50 , and spiral inductor are also available in the MMIC process. The Darlington amplifiers are designed using HEMT-HBT, HBT-HEMT, HEMT-HEMT, and HBT-HBT configurations. Only the E-mode HEMT and HBT are used for the Darlington amplifiers due to single dc power supply. The HBT has an emitter area of 2 10 m , and the small-signal equivalentmodel of the HBT is shown in Fig. 1(a). The HEMT has a gate width of 30 m with two fingers, and the small-signal model is shown in Fig. 1(b). The extraction procedures of the HBT and HEMT are based on the literatures [26], [27]. The extracted small-signal parameters of the HBTs and HEMTs with various bias conditions are summarized in Tables I and II, respectively. The selected bias points of the devices follow the design procedure in Section III-E.

III. CIRCUIT TOPOLOGY AND ANALYSIS The schematic of the Darlington amplifier is shown in Fig. 2. The transistors and can be either an HBT or an HEMT. A series peaking technique can be adopted to improve the gain-bandwidth product [18]. Based on the feedback theory [28], the Darlington amplifier is a shunt–shunt feedback configuration composed of an amplifier and a feedback network. The voltage gains of the Darlington amplifiers can be derived with the simplified small-signal models of the HBT and HEMT shown in Fig. 3. and are the intrinsic base resistance and transconductance of the HBT. and are the base-to-emitter and base-to-collector capacitances of the HBT. and are the intrinsic resistance and transconductance of the HEMT. and are the gate-to-source and gate-to-drain capacitances of the HEMT. The calculated voltage gains and input/output impedances are compared with the simulated voltage gains and input/output impedances. To simplify the analysis, the simulated voltage gains and input/output impedances are only based on the intrinsic elements of the extracted HBT and HEMT small-signal models. The calculations agree with the simulations. Therefore, the gain-bandwidth product and input/output return losses can be

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Fig. 4. Small-signal equivalent circuit of the amplifier in the HEMT-HBT Darlington amplifier.

Fig. 2. Schematic of the Darlington amplifier.

Fig. 3. (a) Simplified small-signal equivalent- model of the HBT. (b) Simplified small-signal model of the HEMT.

predicted by the simplified models. Furthermore, the four configurations of the Darlington amplifiers are investigated with the transconductances, intrinsic capacitances and resistances, and series peaking inductances. A. HEMT-HBT Darlington Amplifier Based on the HEMT-HBT configuration and feedback theory, the small-signal equivalent circuit of the amplifier is shown in Fig. 4. Applying Kirchoff’s current law (KCL) to the equivalent circuit at the nodes and , we have (1), shown at the bottom of this page, where is the input current, is the output voltage of the amplifier, is the angular frequency, is the bias resistance, is the equivalent resistance of the feedback resistance parallel with source termination resistance and bias resistance , and is the equivalent resistance of parallel with load impedance . and are the intrinsic resistance and transconductance of the HEMT. and are the gate-to-source and gate-to-drain capacitances of the HEMT. is gate-to-source voltage of the HEMT. and are the intrinsic base resistance and transconductance of the HBT. and are the base-to-emitter and base-to-

Fig. 5. Calculated and simulated voltage gains of the HEMT-HBT Darlington amplifier.

collector capacitances of the HBT. is the base-to-emitter voltage of the HBT. The open-loop gain of the HEMT-HBT Darlington amplifier can be obtained from (1). The derivation of the open-loop gain is proven in Appendix A, and given by (A3). With (A3) and the feedback parameter , the voltage gain of the HEMT-HBT Darlington amplifier can be expressed as (2) and are the input and output voltages of the where HEMT-HBT Darlington amplifier, respectively, is an inverse function of the open-loop gain, and is derived from the feedback network. From (2), the intrinsic parameters of the HEMT and HBT can be varied independently to investigate the gain and bandwidth for the device size selection. The calculated and simulated voltage gains with and without the series peaking technique are plotted in Fig. 5. The calculations agree with the simulations. The gain-bandwidth product can be predicted using (2). The series peaking inductor is adopted to improve the 3-dB bandwidth of the HEMT-HBT

(1)

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Fig. 6. Calculated voltage gains of the HEMT-HBT Darlington amplifier with . various series peaking inductances of

Fig. 7. Calculated voltage gains of the HEMT-HBT Darlington amplifier with . various intrinsic base resistances of

Darlington amplifier. The calculated voltage gains with various series peaking inductances are plotted in Fig. 6, and the proper inductance of can be obtained. The high-frequency roll-off is improved with . The calculated voltage gains with various intrinsic base resistances of are plotted in Fig. 7. With a of 350 pH, the losses at the high-frequency roll-off caused by the intrinsic base resistor , passive components, and interconnection transmission lines can be compensated. The 3-dB bandwidth can be extended from 14 to 25 GHz, and the improvement is over 178%. The calculated voltage gains with various transconductances and are plotted in Fig. 8. The voltage gain enhances when or increases. The voltage gain at the high-frequency roll-off can be significantly enhanced with increasing . With a of 38 mS and a of 150 mS, a gain-bandwidth product of 61.52 GHz can be achieved. The calculated voltage gains with various base-toemitter capacitances of are plotted in Fig. 9(a). The highfrequency roll-off is improved with decreasing . The calculated voltage gains with various capacitance ratios of are plotted in Fig. 9(b). The high-frequency roll-off is improved with increasing the capacitance ratio of . With a of 570 fF and a ratio of 0.22, the broad 3-dB bandwidth can be achieved. The input and output impedances of the HEMT-HBT Darlington amplifier can be expressed as

(3)

Fig. 8. Calculated voltage gains of the HEMT-HBT Darlington amplifier: and (b) with various transconduc(a) with various transconductances of . tances of

and (4) and are input and output impedances of the amwhere plifier without feedback, respectively. The derivations of and are proven in Appendix A and given by (A4) and (A7). The calculated and simulated input impedances of the HEMT-HBT Darlington amplifier are plotted in Fig. 10. The calculations agree with the simulations. The calculated and simulated output impedances of the HEMT-HBT Darlington amplifier are plotted in Fig. 11. The calculated input/output impedances are dominated by the transconductance and feedback resistance. From the calculated results, the input/output impedances can be matched to 50 from dc to 25 GHz. The investigation of the transconductances and feedback resistance will be further discussed in Section III-E.5. B. HBT-HEMT Darlington Amplifier For the HBT-HEMT Darlington amplifier, the small-signal equivalent circuit of the amplifier is shown in Fig. 12. The openloop gain can be derived using the KCL at the nodes and and proven in Appendix B. With the open-loop gain and the feedback parameter , the voltage gain of the HBT-HEMT Darlington amplifier can be derived as (5)

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Fig. 11. Calculated and simulated output impedances of the HEMT-HBT Darlington amplifier.

Fig. 12. Small-signal equivalent circuit of the amplifier in the HBT-HEMT Darlington amplifier. Fig. 9. Calculated voltage gains of the HEMT-HBT Darlington amplifier: and (b) with various (a) with various base-to-emitter capacitances of . capacitance ratios of

Fig. 13. Calculated and simulated voltage gains of the HBT-HEMT Darlington amplifier.

Fig. 10. Calculated and simulated input impedances of the HEMT-HBT Darlington amplifier.

where is derived from the feedback network, is the feedback resistance, is an inverse function of the open-loop gain, and and are the input and output voltages of the HBT-HEMT Darlington amplifier, respectively. The calculated and simulated voltage gains of the HBT-HEMT Darlington amplifier with and without the series peaking technique are plotted in Fig. 13. The gain-bandwidth product can be predicted using (5). The calculated results with the transconductances, intrinsic capacitances and resistances, and series peaking inductance versus frequency are similar to the calculated results in Section III-A. With a of 50 pH, the losses at the higher frequency can be compensated. With a of 205 mS and a

of 35 mS, a gain-bandwidth product of 52.95 GHz can be achieved. With a of 140 fF and a ratio of 5.4, the flat and broad 3-dB bandwidth can be achieved. The input and output impedances of HBT-HEMT Darlington amplifier can be expressed as (6) and (7) where is load impedance, and and are input and output impedances of the amplifier without feedback, respectively. The derivations of and are proven in

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Fig. 16. Small-signal equivalent circuit of the amplifier in the HEMT-HEMT Darlington amplifier. Fig. 14. Calculated and simulated input impedances of the HBT-HEMT Darlington amplifier.

Fig. 17. Calculated and simulated voltage gains of the HEMT-HEMT Darlington amplifier. Fig. 15. Calculated and simulated output impedances of the HBT-HEMT Darlington amplifier.

Appendix B. The calculated/simulated input and output impedances of the HBT-HEMT Darlington amplifier are plotted in Figs. 14 and 15, respectively. From the calculated results, the HBT-HEMT Darlington amplifier exhibits worse input/output return losses as compared to the HEMT-HBT Darlington amplifier due to the lower transconductance of the HEMT.

and series peaking inductance versus frequency are also similar to the calculated results in Section III-A. The peaking inis 300 pH. and are 38 and 39 mS, ductance of is 0.93. The respectively. The capacitance ratio of input and output impedances of HEMT-HEMT Darlington amplifier can be expressed as

(9) C. HEMT-HEMT Darlington Amplifier For the HEMT-HEMT Darlington amplifier, the small-signal equivalent circuit of the amplifier is shown in Fig. 16. The openloop gain can be derived using the KCL at the nodes and and proven in Appendix B. Based on the open-loop gain and the feedback parameter , the voltage gain of the Darlington amplifier can be derived as (8) is calculated from feedback network, where is the feedback resistance, is an inverse function of the open-loop gain, and and are the input and output voltages of the HEMT-HEMT Darlington amplifier, respectively. The calculated and simulated voltage gains of the HEMT-HEMT Darlington amplifier with and without the series peaking technique are plotted in Fig. 17. From (8), the gainbandwidth product can be predicted. The calculated results with the transconductances, intrinsic capacitances and resistances,

and (10) where and are input and output impedances of the amplifier without feedback, respectively. The derivations of and are proven in Appendix B. The calculated/simulated input and output impedances of the HEMT-HEMT Darlington amplifier are plotted in Figs. 18 and 19, respectively. From the calculated results, the HEMT-HEMT Darlington amplifier exhibits broad bandwidth, but worse input/output return losses due to the lower transconductance of the HEMT. The input/output return losses also can be improved by low feedback resistance, but the voltage gain is decreased. D. HBT-HBT Darlington Amplifier The design of the HBT-HBT Darlington amplifier using a 2- m HBT process was reported in [18]. The small-signal equivalent circuit of the amplifier is shown in Fig. 20. With the

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Fig. 18. Calculated and simulated input impedances of the HEMT-HEMT Darlington amplifier.

Fig. 21. Calculated and simulated voltage gains of the HBT-HBT Darlington amplifier.

series peaking inductance are also similar to the calculated results in Section III-A. The peaking inductance of is 270 pH. The capacitance ratio of is 0.35. and are 60 and 73 mS, respectively. The input and output impedances of HBT-HBT Darlington amplifier can be expressed as (12) and (13) Fig. 19. Calculated and simulated output impedances of the HEMT-HEMT Darlington amplifier.

where and are input and output impedances of the amplifier without feedback, respectively. The derivations of and are proven in Appendix B. The HBT-HBT Darlington amplifier exhibits good input/output return losses, but the bandwidth is limited by the intrinsic capacitances and resistances of the HBTs. E. Design Procedure of Darlington Amplifier

Fig. 20. Small-signal equivalent circuit of the amplifier in the HBT-HBT Darlington amplifier.

open-loop gain and the feedback parameter , the voltage gain of the Darlington amplifier can be derived as (11)

where is calculated from feedback network, is the feedback resistance, is an inverse function of the open-loop gain, and and are the input and output voltages of the HBT-HBT Darlington amplifier, respectively. The calculated and simulated voltage gains of the HBT-HBT Darlington amplifier with and without the series peaking technique are plotted in Fig. 21. Based on (11), the investigations with the transconductances, intrinsic capacitances and resistances, and

Based on the analysis of the four configurations for the Darlington amplifier, the design procedure is summarized as follows. 1) Device Size Selection: To achieve broadband performance, a small device size is selected in this paper for low intrinsic capacitances in both the HBT and HEMT. 2) Transconductance Selection of the Transistor : The dc biases of the devices are based on the transconductance selection. To simplify the analysis, we assume the series peaking inductance of , and intrinsic capacitances of and are all zero for the HEMT-HBT Darlington amplifier. The dc voltage gain is a function of the derived from (2) and it can be simplified as

(14) From (14), the voltage gain is dominated by and , and increases with . With the same assumptions, the dc voltage

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TABLE III CALCULATED DC/PASSBAND VOLTAGE GAINS, GAIN-BANDWIDTH PRODUCTS, AND INPUT/OUTPUT RETURN LOSSES OF THE FOUR DARLINGTON AMPLIFIERS

*This circuit was implemented by 2- m HBT process, and the selected HBT size is smaller than that in the HBT-HEMT process.

gains of the HBT-HEMT, HEMT-HEMT, and HBT-HBT Darlington amplifiers can be derived as

(20) and

(15) (21) (16) and

(17) and are bias resistances of the HBT-HEMT where Darlington amplifier, and are bias resistances of the HEMT-HEMT Darlington amplifier, and and are bias resistances of the HBT-HBT Darlington amplifier. The calculated dc voltage gains of the Darlington amplifiers are listed in Table III. The HEMT-HBT configuration exhibits the highest dc voltage gain among the four configurations. 3) Capacitance Ratio Selection: The intrinsic capacitances of the transistor can be obtained as is selected. Based on the analysis in Section III-A, the broad bandwidth can be achieved with a proper capacitance ratio between the transistors and . 4) Bias Selection of the Transistor : From the calculated intrinsic capacitances of the transistor , the bias condition of the transistor and can be obtained. From the discussion in Sections III-A–III-D, the voltage gain can be enhanced at high frequency with high . However, the bandwidth is a design tradeoff between and the capacitance ratio. 5) Feedback Resistor: The feedback resistor is adopted to improve the input/output return losses and the stability of the Darlington amplifier. To simplify the analysis, we assume the series peaking inductances of and , and intrinsic capacitances of and are all zero for the HEMT-HBT and HEMT-HEMT Darlington amplifiers. The input and output impedances are derived from (3),(4), (9), and (10), and they can be simplified as (18)

(19)

The input/output impedances are dominated by the transconductances and feedback resistances. When and increase, the voltage gains increase, but the input and output impedances decrease. The input/output impedances decrease when and decrease, and the low and result in low-voltage gain. The high transconductance provides the design flexibility for the input and output matches and the voltage gain. The design tradeoff is between the transconductance and the device size. The transconductance increases with the device size. However, the bandwidth degrades with increasing the device size. The input/output impedances and voltage gains of the HEMT-HEMT Darlington amplifier are plotted in Fig. 22. The input/output impedances and voltage gains of the HEMT-HBT Darlington amplifier are plotted in Fig. 23. For the HEMT-HEMT Darlington amplifiers, the voltage gain decreases as the input and output impedances are close to 50 due to the lower of the HEMT. For the HEMT-HBT Darlington amplifier, the voltage gains are higher than the HEMT-HEMT Darlington amplifier as the input/output impedances are close to 50 since the HBT provides high . With the same assumptions, the input/output impedances of the HBT-HEMT and HBT-HBT Darlington amplifiers can be derived as (22)

(23) (24) and

(25) For the HBT-HEMT Darlington amplifier, the calculated results are similar to the results of the HEMT-HEMT Darlington. The input/output impedances are difficult to match to 50 due to

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Fig. 22. (a) Calculated input impedances and voltage gains and (b) and calculated output impedances of the HEMT-HEMT Darlington amplifier.

Fig. 23. (a) Calculated input impedances and voltage gains and (b) calculated output impedances of the HEMT-HBT Darlington amplifier.

the lower transconductance of the HEMT. For the HBT-HBT Darlington amplifier, the calculated results are similar to the results of the HEMT-HBT Darlington. The input/output impedances are close to 50 , but the bandwidth are degraded by the intrinsic capacitances and resistances of the HBTs. 6) Series Peaking Inductor: From Section III-E.1 to Section III-E.5, the preliminarily simulated gain-bandwidth product can be obtained. The series peaking inductor is adopted to further improve the gain-bandwidth product, but the stability is degraded with over peaking. The selection of the peaking inductance is a tradeoff between the gain-bandwidth product and the stability. For the HEMT-HBT Darlington amplifier, the input resistance of (3) around the high-frequency roll-off is possibly negative due to the over peaking. The proper series peaking inductance can be selected based on the calculated results in Fig. 6 to achieve broad bandwidth. 7) Layout and EM Simulation: All of the passive components are simulated with a full-wave EM simulator [29] and used in the circuit simulation. The device size is selected for wider bandwidth or higher gain to achieve the design goals.

calculated voltage gains, bandwidth, and input/output return losses of the HEMT-HBT, HBT-HEMT, HEMT-HEMT, and HBT-HBT Darlington amplifiers are summarized in Table III. The HEMT-HEMT Darlington amplifier exhibits the widest bandwidth among the four configurations due to the lower intrinsic capacitance of the HEMT and better input/output return losses are achieved while the voltage gain decreases, but the gain-bandwidth product is degraded based on the discussion in Section III-E.5. The HBT-HEMT Darlington amplifier is similar to the HEMT-HEMT Darlington amplifier. Better input/output return losses can be achieved by degrading the voltage gain. The voltage gain of the HBT-HBT Darlington amplifier is lower than the HEMT-HBT Darlington amplifier. The bandwidth difference between the HBT-HBT and HEMT-HEMT Darlington amplifier is small since the HBT-HBT Darlington amplifier is designed using the 2- m HBT process [18] and the selected HBT size is smaller than that in the HBT-HEMT process. For a broadband amplifier designed using the HBT-HEMT process, the HEMT-HBT Darlington configuration is more attractive among the four configurations due to the best gain-bandwidth product with good input/output return losses. The detail circuit designs are presented in Section IV.

F. Configuration Selection According to the design procedure in Section III-E, the dc bias points of the HEMTs and HBTs are selected, and the extracted small-signal parameters of the devices are summarized in Tables I and II. The HBT usually demonstrates higher transconductance than the HEMT [30]. The

IV. CIRCUIT IMPLEMENTATION A design method is proposed to implement a monolithic Darlington amplifier from dc to millimeter wave. The pro-

WENG et al.: GAIN-BANDWIDTH ANALYSIS OF BROADBAND DARLINGTON AMPLIFIERS

Fig. 24. (a) Schematic and (b) chip photograph of the two-stage HEMT-HBT Darlington amplifier.

posed method is different than the conventional direct-coupled cascade amplifier. A dc level-shift technique was adopted to achieve the conventional direct-coupled cascade amplifier [31]. The circuit performance is degraded due to the additional insertion loss and the mismatch of the dc level-shift networks. It also occupies an additional chip area. Based on the proposed design method, the insertion loss can be eliminated, and the chip size is more compact. The proposed method is only applied to the HEMT-HBT and HEMT-HEMT Darlington amplifiers. The HBT-HEMT and HBT-HBT Darlington amplifiers cannot be designed from dc to millimeter wave since the dc bias points between the first and second stages are not matched. A. HEMT-HBT Darlington Amplifier The HEMT-HBT Darlington amplifier is a monolithic amplifier. The schematic of the two-stage HEMT-HBT Darlington amplifier is shown in Fig. 24(a), and a chip photograph is shown in Fig. 24(b) with a chip size of 1 1 mm . The drain (or collector) bias of the first Darlington pair at the node “A” is designed to provide the gate bias of the second Darlington pair directly. The bias at the node “A” also provides the bias at the node “B” through the resistors and . According to the design procedure in Section III-E, the small device size is selected for the broadband performance. The HBT has an emitter area of 2 10 m . The HEMT has a gate width of 30 m with two fingers. Based on the design procedure and circuit analysis in Section III-A, the capacitance ratios of and are both 0.22. and of the HEMTs are 38 mS. and of the HBTs are 150 mS. With the capacitance ratio, transconductances, and the preliminary simulation, the series peaking inductors and are applied to the input matching networks of the Darlington pairs to extend the 3-dB bandwidth. The series peaking inductances of and are both 350 pH. The resistors and are designed for the dc bias. The feedback resistors and are designed for the input match and the stability. The inductors and , and resistors and are designed as the output matching network. For the bypass networks, an in-band bypass capacitor and two low-frequency bypass capacitors with small resistors are included for the RF ground and stability. The total dc power consumption is 89.6 mW. B. HBT-HEMT Darlington Amplifier The schematic of the two-stage HBT-HEMT Darlington amplifier is shown in Fig. 25(a), and a chip photograph is shown in

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Fig. 25. (a) Schematic and (b) chip photograph of the two-stage HBT-HEMT Darlington amplifier.

Fig. 26. (a) Schematic and (b) chip photograph of the two-stage HEMT-HEMT Darlington amplifier.

Fig. 25(b) with a chip size of 1 1 mm . The Darlington amplifier consists of two Darlington pairs. The device sizes of the HBT and HEMT are the same as the case of the HEMT-HBT Darlington amplifier. The capacitance ratios of and are both 5.4. and of the HBTs are 205 mS. and of the HEMTs are 35 mS. The series peaking inductances of and are both 50 pH. The active load (or ) and capacitor (or ) with a bypass network are designed as the output matching network. Due to the bias consideration, the active loads are all designed using the D-mode HEMT with a total gate periphery of 2 36 m. The total dc power consumption is 95.2 mW. C. HEMT-HEMT Darlington Amplifier The schematic of the two-stage HEMT-HEMT Darlington amplifier is shown in Fig. 26(a), and a chip photograph is shown in Fig. 26(b) with a chip size of 1 1 mm . The HEMT-HEMT Darlington amplifier is designed from dc to millimeter wave. The HEMT has a gate width of 30 m with two fingers. The capacitance ratios of and are both 0.93. and of the HEMTs are 38 mS. and of the HEMTs are 39 mS. The series peaking inductances of and are both 300 pH. The total dc power consumption is 105.6 mW. The output matching network is composed of an active load (or ) with a bypass network (AL-network), and it is different to the output matching network composed of series resistor and inductor with a bypass network (RL-network) in the HEMT-HBT Darlington amplifier. The simulated input impedances of the two output matching networks are shown in Fig. 27, where and are the input impedances of the AL- and RL-networks, respectively. has lower impedance and results in larger loss in the circuit design as compared to the . The RL-network is adopted in the HEMT-HBT and

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Fig. 29. Measured eye diagram of the dc-to-millimeter-wave HEMT-HBT 1 PRBS. Darlington amplifier at 25-Gb/s 2

Fig. 27. Simulated input impedances of the AL-network and RL-network.

Fig. 30. Simulated and measured -parameters of the HBT-HEMT Darlington amplifier.

Fig. 28. Simulated and measured -parameters of the dc-to-millimeter-wave HEMT-HBT Darlington amplifier.

HBT-HBT Darlington amplifiers for the broad bandwidth since the voltage gain at low frequency is dominated by the higher transconductance of the HBT. On the contrary, the AL-network is adopted in the HBT-HEMT and HEMT-HEMT Darlington amplifiers since the voltage gain at low frequency is dominated by the transconductance of the HEMT.

Fig. 31. Simulated and measured -parameters of the dc-to-millimeter-wave HEMT-HEMT Darlington amplifier.

D. HBT-HBT Darlington Amplifier The design of the two-stage HBT-HBT Darlington amplifier using a 2- m HBT process was presented in [18]. The design method is also based on the design procedure described in Section III-E. The capacitance ratios of two HBTs in the Darlington pair are 0.35. The series peaking inductances are both 270 pH. The total dc power consumption is 40.5 mW with a chip size of 1 1 mm . V. EXPERIMENTAL RESULTS AND DISCUSSIONS The Darlington amplifier chips are measured via on-wafer probing. The -parameters are measured by an Agilent E8361A

Fig. 32. Measured eye diagram of the dc-to-millimeter-wave HEMT-HEMT 1 PRBS. Darlington amplifier at 25-Gb/s 2

network analyzer from 10 MHz to 40 GHz and Agilent E5071C network analyzer from 100 kHz to 10 MHz. The output 1-dB compression point and the output third-order intercept point are measured using Agilent E8257D analog

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TABLE IV PERFORMANCE SUMMARY OF THE DARLINGTON AMPLIFIERS

TABLE V COMPARISON OF THE PREVIOUSLY REPORTED TWO-STAGE DARLINGTON AMPLIFIERS AND THIS STUDY

signal generators and an Agilent E4448A spectrum analyzer. The noise figure is measured using an Agilent N8975A noise figure analyzer with a -band down converter and an Agilent 346Ck01 noise source. For the HEMT-HBT and HEMT-HEMT Darlington amplifiers, the eye diagrams are measured to evaluate the capability of the high-speed data communications. A pseudo random bit stream (PRBS) is generated by an Anritsu MP1800A signal quality analyzer with an Anritsu MP1803A multiplexer. The output signal is measured by an Agilent 86100C infinium DCA-J oscilloscope. A. HEMT-HBT Darlington Amplifier The simulated and measured -parameters of the HEMT-HBT Darlington amplifier are plotted in Fig. 28 from 100 kHz to 40 GHz. The Darlington amplifier exhibits a small-signal gain of 13.2 dB, and a 3-dB bandwidth from dc to 25.3 GHz. The measured input/output return losses are better than 6 dB over the 3-dB bandwidth. The measured group delay is 45.2 ps. The measured and at 16 GHz are 0.7 and 7.2 dBm, respectively. The measured average noise figure is 7.8 dB over the 3-dB bandwidth. The measured eye diagram at 25-Gb/s 2 1 PRBS is shown in Fig. 29 with a good eye-pattern opening.

B. HBT-HEMT Darlington Amplifier -parameters of the The simulated and measured HBT-HEMT Darlington amplifier are plotted in Fig. 30 from 100 kHz to 40 GHz. The Darlington amplifier exhibits a small-signal gain of 11 dB, and a 3-dB bandwidth from 1.8 to 26 GHz. The measured input/output return losses are better than 3 dB over the 3-dB bandwidth. The measured group delay is 49 ps. The measured and at 16 GHz are 0.75 and 7.4 dBm, respectively. The measured average noise figure is 8.6 dB over the 3-dB bandwidth. C. HEMT-HEMT Darlington Amplifier -parameters of the The simulated and measured HEMT-HBT Darlington amplifier are plotted in Fig. 31 from 100 kHz to 40 GHz. The Darlington amplifier exhibits a small-signal gain of 10 dB, and a 3-dB bandwidth from dc to 29.8 GHz. The measured input/output return losses are better than 3 dB over the small-signal bandwidth. The measured group delay is 41.4 ps. The measured and at 16 GHz are 1.46 and 10.2 dBm, respectively. The measured average noise figure is 10.2 dB over the 3-dB bandwidth. The measured eye diagram is shown in Fig. 32 with good eye-pattern opening.

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TABLE VI DESIGN PARAMETERS OF THE FOUR DARLINGTON CONFIGURATIONS

D. HBT-HBT Darlington Amplifier The HBT-HBT Darlington amplifier exhibits a small-signal gain of 10.5 dB with a 3-dB bandwidth of 29.5 GHz. The measured is higher than 5 dBm over the 3-dB bandwidth. The measured group delay is 42.6 ps. The measured average noise figure is 7.7 dB over the 3-dB bandwidth. The detail experimental results have been presented in [18]. E. Discussions The measured performances of the four Darlington amplifiers are summarized in Table IV. The measured gain-bandwidth products are higher than the calculated gain-bandwidth products in Table III since the calculated gain-bandwidth products are only based on one-stage Darlington amplifier. The HEMT-HBT Darlington amplifier exhibits the highest gain-bandwidth product of 115.64 GHz among the four configurations due to the high transconductances of the HBTs and described in Section III-E.2. Besides, better input and output return losses can be achieved due to the high transconductances of the HBTs described in Section III-E.5. The measured results agree with the summary in Table III. For the HBT-HEMT Darlington amplifier, the small-signal gain at the high frequency is further improved by the transconductances of the HBTs and . The result agrees with the analysis described in Section III-E.4, but the HBT-HEMT Darlington amplifier cannot be designed from dc to millimeter wave since the dc bias points between the first and second stages are not matched. The HEMT-HEMT Darlington amplifier exhibits the widest bandwidth due to the low intrinsic capacitances. However, the input/output impedances are difficult to match to 50 due to the low transconductance of the HEMT described in Section III-E.5. The measured noise figure of the HEMT-HEMT Darlington amplifier is the highest due to the low small-signal gain of the first stage [32]. As the load effect of second stage is taken into

the consideration, the small-signal gain of the first stage for the HEMT-HEMT configuration is lower than the other configurations. For the HBT-HBT Darlington amplifier, the measurement exhibits the wider bandwidth than the HEMT-HBT Darlington amplifier since the HBT-HBT configuration is designed using a 2- m HBT process [18] and the selected device size is smaller than the HBT selected in the HBT-HEMT process. Therefore, the measured small-signal gain and linearity of the HBT-HBT Darlington amplifier are lower than the measurement of the HEMT-HBT Darlington amplifier. The previously reported two-stage Darlington amplifiers and this study are summarized in Table V. Two figures of merit GBP/ [33] and GBP/ [18] are used to evaluate the circuit performance of the Darlington amplifiers. The HEMT-HBT Darlington amplifier achieves a GBP/ of 3.613 and a GBP/ of 2.223. The HBT-HEMT Darlington amplifier achieves a GBP/ of 2.683 and a GBP/ of 1.651. The HEMT-HEMT Darlington amplifier achieves a GBP/ of 2.945 and a GBP/ of 1.812. The HEMT-HBT Darlington amplifier demonstrates the highest gain-bandwidth product among all the listed two-stage Darlington amplifiers. The Darlington amplifier designed using HEMT-HBT configuration has the potential for high-speed communication applications due to its superior gain-bandwidth performance. VI. CONCLUSION Design and analysis of monolithic HEMT-HBT, HBTHEMT, HEMT-HEMT, and HBT-HBT Darlington amplifiers using a GaAs HBT-HEMT process have been presented in this paper. Based on the small-signal equivalent circuits of the four configurations, the gain, input, and output impedances have been investigated with transistor size, feedback resistance, and series peaking inductance. A systematic design procedure has been proposed for the broadband Darlington amplifier using the

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HBT-HEMT process. The design tradeoff has also been addressed, as well as the direct-coupled technique for high-speed applications. Moreover, the proposed broadband Darlington amplifiers have been carefully verified. The HEMT-HBT Darlington amplifier is more attractive for high-speed applications due to its high gain-bandwidth product, good input/output return losses, and good eye opening. For the HBT-HEMT process, the HEMT is suitable for broadband design due to its low intrinsic capacitances, while the HBT is suitable for high gain design due to its high transconductance. Both the HBT and HEMT can be employed in the circuit design to further enhance the circuit performance. The HBT-HEMT process has great design flexibility for the broadband Darlington amplifier, and it can be further applied to microwave and millimeter-wave linear and nonlinear circuits.

APPENDIX A DERIVATION OF THE OPEN-LOOP GAIN AND INPUT/OUTPUT IMPEDANCES OF THE HEMT-HBT DARLINGTON AMPLIFIER The small-signal equivalent circuit of the amplifier in the HEMT-HBT Darlington amplifier is shown in Fig. 4. Based on (1), the relationships of and can be given by (A1) and (A2), shown at the bottom of the previous page. With (1), (A1), and (A2), the open-loop gain of the amplifier can be expressed as (A3), shown at the bottom of the previous page, where is an inverse function of the open-loop gain and is series peaking inductance. Furthermore, we can obtain the input impedance using (A1) and (A2). The input impedance is given by (A4), shown at the bottom of the previous page, where is input impedance of the amplifier without feedback, and is voltage at the node . For the output impedance, we can derive from the equivalent small-signal model shown in Fig. 33. Appling the KCL at the nodes , , and , we have (A5) and (A6), shown at the bottom of the previous page, where is voltage at the node . With (A5) and (A6), the output impedance is expressed as (A7), shown at the bottom of the previous page, where is input current at the output of the amplifier and is output impedance of the amplifier without feedback.

APPENDIX B DESIGN PARAMETERS OF THE HEMT-HBT, HBT-HEMT, HEMT-HEMT, AND HBT-HBT DARLINGTON AMPLIFIERS The analysis of the input/output impedances and open-loop gain of the HBT-HEMT, HEMT-HEMT, and HBT-HBT Darlington amplifier are similar to the calculated results of the HEMT-HBT Darlington amplifier using the KCL. The design parameters of the four configurations are listed in Table VI. Based on Table VI, we can take the design parameters of the decided configuration to replace the parameters of the equations derived in Appendix A, and the input/output impedances and the open-loop gain can be obtained.

Fig. 33. Small-signal equivalent circuit of the output impedance of the amplifier in the HEMT-HBT Darlington amplifier.

ACKNOWLEDGMENT The chips were fabricated by the WIN Semiconductors Corporation, Taoyuan, Taiwan. The EDA design software was provided by the Chip Implementation Center (CIC), Hsinchu, Taiwan. The authors would like to thank Prof. G. D. Vendelin, Prof. J.-S. Fu, C.-C. Shen, and F.-M. Kuo all with National Central University, Jhongli City, Taiwan, and A. P.-L. Chang, Taiwan Agilent, Jhongli City, Taiwan, for the discussions and measurement help. The RF probes and the RF cables for the on-wafer measurement were provided by the Allstron Corporation, Taoyuan, Taiwan, and the Bo-Jiang Technology Corporation, Tainan, Taiwan, respectively. REFERENCES [1] S. Kaeriyama, Y. Amamiya, H. Noguchi, Z. Yamazaki, T. Yamase, K. Hosoya, M. Okamoto, S. Tomari, H. Yamaguchi, H. Shoda, H. Ikeda, S. Tanaka, T. Takahashi, R. Ohhira, A. Noda, K. Hijioka, A. Tanabe, S. Fujita, and N. Kawahara, “A 40 Gb/s multi-data-rate CMOS transmitter and receiver chipset with SFI-5 interface for optical transmission systems,” IEEE J. Solid-State Circuits, vol. 44, no. 12, pp. 3568–3579, Dec. 2009. [2] M. Yoneyama, Y. Miyamoto, T. Otsuji, H. Toba, Y. Yamane, T. Ishibashi, and H. Miyazawa, “Fully electrical 40-Gb/s TDM system prototype based on InP HEMT digital IC technologies,” J. Lightw. Technol., vol. 18, no. 1, pp. 1262–1268, Jan. 2000. [3] S. Mohammadi, J.-W. Park, D. Pavlidis, J.-L. Guyaux, and J. C. Garcia, “Design optimization and characterization of high-gain GaInP/GaAs HBT distributed amplifiers for high-bit-rate telecommunication,” IEEE Trans. Microw. Theory Techn., vol. 48, no. 6, pp. 1038–1044, Jun. 2000. [4] D. A. Hodges, “Darlington’s contributions to transistor circuit design,” IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 46, no. 1, pp. 102–104, Jan. 1999. [5] K. W. Kobayashi, D. K. Umemoto, T. R. Block, A. K. Oki, and D. C. Streit, “A novel monolithic LNA integrating a common-source HEMT with an HBT Darlington amplifier,” IEEE Microw. Guided Wave Lett., vol. 5, no. 12, pp. 442–444, Dec. 1995. [6] J. Lee and J. D. Cressler, “Analysis and design of an ultra-wideband low-noise amplifier using resistive feedback in SiGe HBT technology,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 3, pp. 1262–1268, Mar. 2006. [7] K. W. Kobayashi, R. Esfandiari, and A. K. Oki, “A novel HBT distributed amplifier design topology based on attenuation compensation techniques,” IEEE Trans. Microw. Theory Techn., vol. 42, no. 12, pp. 2583–2589, Dec. 1994. [8] M.-D. Tsai, C.-S. Lin, C.-H. Lien, and H. Wang, “Broad-band MMICs based on modified loss-compensation method using 0.35- m SiGe BiCMOS technology,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 2, pp. 496–505, Feb. 2005. [9] K. W. Kobayashi, Y. C. Chen, I. Smorchkova, R. Tsai, M. Wojtowicz, and A. Oki, “1-Watt conventional and cascoded GaN-SiC Darlington MMIC amplifiers to 18 GHz,” in IEEE RFIC Symp., Jun. 2007, pp. 585–588.

WENG et al.: GAIN-BANDWIDTH ANALYSIS OF BROADBAND DARLINGTON AMPLIFIERS

[10] S.-H. Weng, H.-Y. Chang, and C.-C. Chiong, “A DC–21 GHz low imbalance active balun using Darlington cell technique for high apeed data communications,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 11, pp. 728–730, Nov. 2009. [11] K. W. Kobayashi, R. Esfandiari, M. E. Hafizi, D. C. Streit, A. K. Oki, L. T. Tran, D. K. Umemoto, and M. E. Kim, “GaAs HBT wideband matrix distributed and Darlington feedback amplifiers to 24 GHz,” IEEE Trans. Microw. Theory Techn., vol. 39, no. 12, pp. 2001–2009, Dec. 1991. [12] K. W. Kobayashi, D. K. Umemoto, R. Esfandiari, A. K. Oki, L. M. Pawlowicz, M. E. Hafizi, L. Tran, J. B. Camou, K. S. Stolt, D. C. Streit, and M. E. Kim, “GaAs HBT MMIC broadband amplifiers from dc to 20 GHz,” in IEEE Microw. Millim.-Wave Monolithic Circuits Symp., May 1990, pp. 19–22. [13] K. W. Kobayashi, R. Esfandiari, A. K. Oki, D. K. Umemoto, J. B. Camou, and M. E. Kim, “GaAs heterojunction bipolar transistor MMIC dc to 10 GHz direct-coupled feedback amplifier,” in GaAs IC Symp., Oct. 1989, pp. 87–90. [14] N. H. Sheng, W. J. Ho, N. L. Wang, R. L. Pierson, P. M. Asbeck, and W. L. Edwards, “A 30 GHz bandwidth AlGaAs–GaAs HBT directcoupled feedback amplifier,” IEEE Microw. Guided Wave Lett., vol. 1, no. 8, pp. 208–210, Aug. 1991. [15] Y. Kuriyama, J. Akagi, T. Sugiyama, S. Hongo, K. Tsuda, N. Iizuka, and M. Obara, “DC to 40 GHz broadband amplifiers using AlGaAs/GaAs HBT’s,” IEEE J. Solid-State Circuits, vol. 30, no. 10, pp. 1051–1054, Oct. 1995. [16] D. Mensa, Q. Lee, J. Guthrie, S. Jaganathan, and M. J. W. Rodwell, “Transferred substrate HBT with 254 GHz ,” Electron Lett., vol. 35, pp. 605–606, Jul. 1999. [17] D. Mensa, Q. Lee, J. Guthrie, S. Jaganathan, and M. J. W. Rodwell, “Baseband amplifiers in transferred-substrate HBT technology,” in GaAs IC Symp., Oct. 1998, pp. 33–36. [18] S.-H. Weng, H.-Y. Cheng, and C.-C. Chiong, “Design of a 0.5–30 GHz Darlington amplifier for microwave broadband applications,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2010, pp. 1189–1192. [19] K. W. Kobayashi, “Linearized Darlington cascode amplifier employing GaAs PHEMT and GaN HEMT technologies,” IEEE J. Solid-State Circuits, vol. 42, no. 10, pp. 2116–2122, Oct. 2007. [20] C. T. Armijo and R. G. Meyer, “A new wideband Darlington amplifier,” IEEE J. Solid-State Circuits, vol. 24, no. 8, pp. 1105–1109, Aug. 1989. [21] C.-S. Lin, M.-D. Tsai, H. Wang, Y.-C. Wang, and C.-H. Chen, “A monolithic HBT broadband amplifier using modified triple Darlington configuration,” in Eur. Microw. Conf., Oct. 2004, pp. 331–334. [22] D. C. Streit, D. K. Umemoto, K. W. Kobayashi, and A. K. Oki, “Monolithic HEMT-HBT integration by selective MBE,” IEEE Trans. Electron Devices, vol. 42, no. 4, pp. 618–623, Apr. 1995. [23] H.-Y. Chang, Y.-C. Liu, S.-H. Weng, C.-H. Lin, Y.-L. Yeh, and Y.-C. Wang, “Design and analysis of a DC-43.5 GHz fully integrated distributed amplifier using GaAs HEMT-HBT cascode gain stage,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 2, pp. 443–455, Feb. 2011. [24] K. W. Kobayashi, “Compact low voltage low noise amplifier,” U.S. Patent 7 619 482 B1, Nov. 17, 2009. [25] K. W. Kobayashi, D. C. Streit, D. K. Umemoto, T. R. Block, and A. K. Oki, “A monolithic HEMT-HBT direct-coupled amplifier with active input matching,” IEEE Microw. Guided Wave Lett., vol. 6, no. 1, pp. 55–57, Jan. 1996. [26] S. Bousnina, P. Mandeville, A. B. Kouki, R. Surridge, and F. M. Ghannouchi, “Direct parameter-extraction method for HBT small-signal mode,” IEEE Trans. Microw. Theory Techn., vol. 50, no. 2, pp. 529–536, Feb. 2002. [27] G. Dambrine, A. Cappy, F. Heliodore, and E. Playez, “A new method for determining the FET small-signal equivalent circuit,” IEEE Trans. Microw. Theory Techn., vol. 36, no. 7, pp. 1151–1159, Jul. 1988. [28] A. S. Sedra and K. C. Smith, Microelectronic Circuits. Oxford, U.K.: Oxford Univ. Press, 2004, pp. 831–833. [29] “Sonnet® User’s Guide,” 12th ed. Sonnet Softw. Inc., North Syracuse, NY, 2009. [30] H. Wang, R. Lai, L. Tran, J. Cowles, Y. C. Chen, E. W. Lin, H. H. Liao, M. K. Ke, T. Block, and H. C. Yen, “A single-chip 94 GHz frequency source using InP-based HEMT-HBT integration technology,” in IEEE RFIC Symp. Dig., Jun. 1998, pp. 275–278. [31] S. Kimura, Y. Imai, and Y. Miyamoto, “Direct-coupled distributed baseband amplifier IC’s for 40-Gb/s optical communication,” IEEE J. Solid-State Circuits, vol. 31, no. 10, pp. 1374–1379, Oct. 1996. [32] G. Gonzalez, Microwave Transistor Amplifiers Analysis and Design. Englewood Cliffs, NJ: Prentice-Hall, 2004, pp. 295–298.

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[33] K. W. Kobayashi, R. Esfandiari, and A. K. Oki, “A novel HBT distributed amplifier design topology based on attenuation compensation techniques,” IEEE Trans. Microw. Theory Techn., vol. 42, no. 12, pp. 2583–2589, Dec. 1994. Shou-Hsien Weng (S’08) was born in Taipei, Taiwan, in 1984. He is currently working toward the Ph.D. degree in telectrical engineering at National Central University, Jhongli City, Taoyuan, Taiwan. His research interests include microwave and millimeter-wave integrated circuits. Mr. Weng was the recipient of the 2012 National Central University Outstanding Student Award.

Hong-Yeh Chang (S’02–M’05) was born in Kinmen, Taiwan, in 1973. He received the B.S. and M.S. degrees in electric engineering from National Central University, Jhongli City, Taoyuan, Taiwan, in 1996 and 1998 respectively, and the Ph.D. degree from the Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan, in 2004. From 1998 to 1999, he was with Chunghwa Telecom Laboratories, Taoyuan, Taiwan, where he was involved in the research and development of code division multiple access (CDMA) cellular phone systems. In 2004, he was a Post-Doctoral Research Fellow with the Graduate Institute of Communication Engineering, National Taiwan University, where he was involved with research on advanced millimeter-wave integrated circuits. In February 2006, he joined the faculty of the Department of Electrical Engineering, National Central University, Jhongli City, Taiwan, where he is currently an Associate Professor. His research interests are microwave and millimeter-wave circuit and system designs. Dr. Chang is a member of Phi Tau Phi.

Chau-Ching Chiong (M’11) was born in Taipei, Taiwan, in 1974. He received the B.S. and M.S. degrees in electrical engineering from National Taiwan University, Taipei, Taiwan, in 1997 and 1999, respectively, and the Ph.D. degree in astronomy from the University of Bonn, Bonn, Germany, in 2003. He then joined the Institute of Astronomy and Astrophysics, Academia Sinica (ASIAA), Taipei, Taiwan, where he is involved in the research and development of the Atacama Large Millimeter Array (ALMA) project. His current research interests include large-array and focal-plane array receiver systems and very low-noise systems in radio astronomical applications using MMICs.

Yu-Chi Wang received the B.S. degree in physics from National Central University, Jhongli City, Taiwan, in 1989, and the M.S. and Ph.D. degrees in materials science and engineering from Rutgers University, New Brunswick, NJ, in 1994 and 1998, respectively. His doctoral dissertation concerned the device and circuit design, metal-beam-epitaxy growth, fabrication, and characterization of In (Al Ga ) P power HEMTs. In 1998, he joined Bell Laboratories, Lucent Technologies, Murray Hill, NJ, where he was a Member of Technical Staff, involved in the compound semiconductor device design and process development for wireless and fiber-optic integrated circuits (ICs). In December 1999, he joined the WIN Semiconductors Corporation, Taoyuan, Taiwan, where he was responsible for InGaP HBT technology development for cellular handset power amplifiers and wireless local area network (WLAN) power amplifiers. He is currently the CEO of the WIN Semiconductors Corporation.

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Optimized Load Modulation Network for Doherty Power Amplifier Performance Enhancement Shichang Chen, Student Member, IEEE, and Quan Xue, Fellow, IEEE

Abstract—In this paper, a new load modulation network (LMN) is proposed for the Doherty power amplifier (DPA). By adjusting the transmission line characteristic impedances in the LMN, efficiency degradation due to the incomplete load modulation caused by the current unbalance between sub-amplifiers can be alleviated. Comprehensive theoretical analysis is conducted to investigate the impact of imperfect current profile on the overall efficiency and give rise to the judicious solution. To validate the new theory, two DPA prototypes based on GaAs pseudomorphic HEMTs are implemented for comparative purposes. Measurement results show that 8% and 13% greater power-added efficiency values are achieved at saturation and 6-dB output back-off point with the proposed method when compared with that of the conventional one. Additionally, the output 1-dB compression point is also improved by 2.9 dB. In particular, to the best of the authors’ knowledge, this work provides a solution to address the inherent lower current driving ability for the peaking amplifier directly at the output part of a single-input DPA. Index Terms—Doherty amplifier, load modulation network (LMN), peak-to-average power ratio (PAPR), power-added efficiency (PAE), power amplifier (PA).

I. INTRODUCTION

M

ODULATED signals for wireless communications such as CDMA-2000, WCDMA, and long-term evolution (LTE) generally have a high peak-to-average power ratio (PAPR). Accordingly, power amplifiers (PAs) have to be very linear in order to prevent in-band distortion and out-of-band emission. Operating at a large back-off region far from saturation is a typical solution, but this inevitably leads to low efficiency and high power consumption. Various efficiency-enhancing techniques have been reported in the literature [1]–[7]. Among them, the Doherty amplifier proves to be the most valid candidate in virtue of structural simplicity, performance, and cost effectiveness. A Doherty power amplifier (DPA) consists of two sub-amplifiers, one is the carrier and the other is the peaking amplifier. Its operation can be roughly divided into two regions: high power and low power, respectively. When input power is low, Manuscript received April 09, 2012; revised August 17, 2012; accepted August 22, 2012. Date of publication September 18, 2012; date of current version October 29, 2012. This work was supported by the Shenzhen Science and Technology Planning Project for the Establishment of the Key Laboratory in 2009 under Project CXB200903090021A. The authors are with the State Key Laboratories of Millimeter Waves, City University of Hong Kong, Kowloon Tong, Hong Kong (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2215625

the peaking amplifier is in the off-state, and only the carrier amplifier operates and it determines the DPA performance. When the input power is high, the two amplifiers contribute to the overall output simultaneously. In an ideal case, it is assumed that the peaking PA turns on at half of the maximum input voltage and has the same maximum current swing at saturation as the carrier PA. Nevertheless, if identical devices are adopted for the two amplifiers, the maximum fundamental current generated by the peaking cell will be smaller due to its lower biasing. Consequently, the load impedances cannot be fully modulated to optimum values and efficiency may degrade using the classic load modulation network (LMN) [8]. A variety of approaches have been devised to achieve identical currents, such as uneven power division [9], [10] different transistor peripheries [11], and bias adaption [12]–[14]. However, each method has its own disadvantages, such as power loss, gain degradation, or requiring extra control circuit. A new load modulated structure was reported recently where the peaking PA can deliver less current than the carrier PA [6], but it requires dual inputs for the two sub-amplifiers. This paper presents a novel LMN for a single-input Doherty amplifier. Its transmission line characteristic impedances are devised according to the current ratio between the two amplifiers, rather than using standardized values in conventional cases. A similar idea was briefly introduced for an asymmetric Doherty amplifier design in [15], but the explanation given was not clear enough. This paper gives a comprehensive theoretical analysis that has never been presented before. With the proposed approach, the modulated load deviation and the efficiency degradation caused by the cell current unbalance can be mitigated. Simulation and measurement results demonstrate considerable efficiency improvement and output power enhancement for the proposed design compared with the conventional one. II. THEORETICAL ANALYSIS A. Analysis of Ideal Doherty Amplifier Fig. 1 shows a simplified operation diagram of the LMN of a DPA. If each transistor is considered as an ideal current source, the impedance seen at the junction point can be expressed as

(1) (2) line after the carrier amplifier acts as an impedance The transformer. The relationship between the voltages and currents

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When input is high, two amplifiers operate simultaneously, and the impedances are given by

(14) (15) In summary, the load of carrier PA is modulated from to , while that of the peaking PA is modulated from to with the increase of the input power.

Fig. 1. Simplified operation diagram of a typical DPA.

at the two sides of this transmission line can be written as follows [16]: (3) (4) By rearranging the above two equations, it gives (5)

B. Typical Problem and Proposed Approach This section analyzes the unbalanced current profile between the carrier and peaking cells and its impact on the DPA efficiency. The proposed design approach will be introduced accordingly. For a transistor working as an ideal voltage control current source with harmonic short circuits provided at output, the drain current components can be expressed in terms of the conduction angle and maximum drain current as [8]

(6) substituting (5) and (6) into (1) and (2), (16) (7) (8)

(17)

moreover, (9)

Noting that

, we can have

(10) (11) The above two equations illustrate that the effective load impedances seen by the current sources are a function of and , as well as the current ratio between the two cells. In general cases, standardized characteristic impedances for the quarter-wavelength line and load are adopted. With further assumption of identical currents at saturation, the effective impedances at different power levels can be easily derived using (10) and (11). When input is low, the peaking PA is completely shut off , and the impedances are given by (12) (13)

where and represent the fundamental currents, dc currents, and conduction angles of the carrier and peaking cells, respectively. is the maximum drain current the transistor can support. Typically, bias conditions for the carrier amplifier and peaking amplifier are set to near pinch-off and below pinch-off , respectively. It can be seen from (17) that the fundamental current of the peaking cell is smaller than that of the carrier cell due to its lower biasing. For further use, a new parameter is defined as the current ratio. Fig. 2 shows the value as a function of different conduction angles for the two sub-amplifiers. It is evident that can significantly differ from 1.0 assumed by the ideal case. For instance, when and , drops to as low as 0.36. If standardized values and are still applied, modulated load impedances at maximum power, as calculated in (10) and (11), will deviate dramatically from . Figs. 3 and 4 depict the normalized (with reference to ) effective load impedances at high-power region for the carrier and peaking amplifiers as a function of different conduction angles. It is evident that, in most cases, these values are deviated from unity. Under these circumstances, efficiency reduction may happen because of impedance mismatch [8], [9]. Moreover, as the load impedances are modulated to larger values for both sub-amplifiers, as shown in Figs. 3 and 4, they get saturated earlier in the high-power region, leading to the

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Fig. 2. Current ratio under different conduction angles for the two amplifiers.

Fig. 4. Normalized load impedance (with reference to using classic LMN at high power.

) for peaking PA

(19) Letting

, it is obtained that (20) (21)

Substituting (20) and (21) into (10), the load impedance seen by the carrier PA at low-power region becomes (22)

Fig. 3. Normalized load impedance (with reference to classic LMN at high power.

) for carrier PA using

reduction of output power. Consequently, at the same back-off power point, the efficiency is degraded when compared with the ideal case. The above analysis implies that the impact of this inherent current unbalance problem should be addressed for DPA performance enhancement. In previous research to resolve this problem, efforts were focused on making the currents in both amplifiers equal. However, it will cause new problems, such as lower gain and mismatch of transistors. Actually, the current difference between the two amplifiers can be kept unchanged, but made use of by a new LMN. As introduced in Section II-A, we can retrieve the optimal load impedance by taking the current ratio into consideration. Rewriting (10) and (11), device load impedances at high power can be derived as follows:

(18)

It shows that by adopting the new characteristic impedance values, the resulting load modulation is from to for the carrier cell, and from to for the peaking cell. Fig. 5 compares the load variation traces against the normalized input voltage for three different cases: ideal Doherty, as described in [8], the DPA based on the conventional LMN and the DPA based on the proposed topology. Two conduction angles and are chosen for illustrative purposes, the value is read from Fig. 2 to be 0.65. It shows that the conventional design has a drastically differing modulation trace from the ideal case. On the other hand, the proposed design exhibits much closer to ideal impedance modulation trend at the high-power region for both sub-amplifiers. Although the load for the carrier PA at the low-power region differs with the ideal case, it can be easily solved by adding a matching network and offset line [11]. It is important to note that the optimum matched impedances are usually complex values because of transistor parasitics. Nevertheless, all the above-mentioned LMNs can provide only pure resistive values so an output matching network with a proper length of transmission line must be inserted between the device and LMN to provide the optimum impedance. Suppose the optimal impedance for carrier amplifier at saturation is , where the reactance is for compensating the parasitic reactance of the transistor at the operation

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Fig. 5. Load impedance variations to the normalized input voltage. Fig. 7. Design process of offset line for the peaking amplifier.

Fig. 6. Simplified schematic diagram for carrier PA in the proposed design, and the matching traces on the Smith chart.

frequency. The fundamental voltage swing denotes the dc supply voltage. When the input power is below the critical value as , the peaking amplifier is in the off-state. If the optimal impedance for the carrier PA is at this point, the fundamental voltage swing is . To achieve the same voltage swing for the two states, . The output matching network and offset line combination is exploited to match distinct loads at different power levels. Fig. 6 shows the diagram of the carrier amplifier and compares the matching traces for the proposed and ideal designs on the Smith chart. It is obvious that the two cases can achieve the same performance in the high-power region because they have identical initial impedance . More importantly, similar performances can also be expected at low power, as long as the matched loads are locating on the same efficiency contour, even though the starting points are different. Regarding the peaking amplifier, its output impedance in the off-state is usually low and capacitive. To prevent reverse current leakage, a section of offset line must be included to transfer

Fig. 8. Schematic diagram of DPA with proposed LMN.

the output impedance seen at the junction point to near open circuit [16]. Fig. 7 illustrates the process, the output impedance (marked by ) is rotated to a high-resistive value on a Smith chart (mark by ) by inserting a proper length of transmission line. It is worth emphasizing that both offset lines have a characteristic impedance of , and their existence keeps the matching intact at the high-power region. On the contrary, characteristic impedances for the conventional design cannot be simply set to due to a deviated load, as shown in Fig. 5, which leads to impedance mismatch in the high-power region. The simplified schematic diagram of the proposed Doherty amplifier is depicted in Fig. 8. Another transmission line should be inserted before the peaking PA to make the phases coherent of the two paths. The input part is eliminated for the sake of simplicity. The line is inserted between the junction point and load for impedance transformation, and its characteristic impedance is calculated as (23)

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Fig. 9. Simulated gain and output power as a function of input power. Fig. 10. Simulated PAE value as a function of output power.

C. Simulation Result In Section II-B, theoretical analysis of the current unbalance problem and corresponding solution has been described. For the validation of this new design strategy, ADS simulation was conducted based on the model for a medium-power pseudomorphic HEMT (pHEMT) ATF-50189. The carrier PA was biased at deep class-AB mode, while the peaking one was biased at class-C mode. Once determining the bias conditions, we could get the corresponding current ratio, the simulated result was . As a consequence, the characteristic impedances and for the proposed topology were calculated to be 35 and 28.7 . Load–pull simulations were performed to find the optimal impedances at different power levels, which were then used to design matching networks and offset lines. For comparative purposes, simulation of the design exploiting conventional approach was also performed. The corresponding LMN characteristic impedance values are 50 and 35.3 , respectively. Besides, the electrical lengths of the carrier offset lines are 65° and 83° for the proposed and conventional DPAs, respectively. The peaking offset lines have the same value of 108°. It needs to be emphasized that although the proposed methodology focused on optimizing characteristic impedance of transmission lines, it is also applicable for designs built on lumped elements whose values can be inferred directly from transmission line characteristics [18]. Fig. 9 compares the simulated output power and gain of the two designs as a function of input power. It can be seen that the performances are very close at the low-power region because the two carrier amplifiers are matched to similar impedances. At the high-power region, output power of the proposed design was enhanced as expected due to the improved load modulation operation. In Fig. 10, power-added efficiency (PAE) as a function of output power is depicted. It is shown that the PAE value at 6-dB output back-off (OBO) is increased from 44% to 53%, accounting for 9% enhancement using the proposed strategy. Moreover, the output 1-dB compression point (OP1dB) is also considerably enhanced, increasing from 27.6 to 30.4 dBm. As expected, the recovery of optimal load impedances for both sub-amplifiers generates higher output power in the proposed design. The power back-off range can be enlarged accordingly,

Fig. 11. Measured power gain and output power as a function of input power of the proposed and conventional DPAs under CW signal.

which leads to overall efficiency enhancement for signals with large PAPR. III. EXPERIMENTAL VERIFICATION A. Efficiency and Output Power Enhancements In order to demonstrate the merits of the proposed topology in terms of output power and efficiency, two DPA prototypes corresponding to the proposed and conventional designs are implemented to operate at 2.14 GHz on a substrate with and a thickness of 31 mil. The same transistors are used as in simulation. The gate bias of the carrier and peaking PAs are adjusted to be 0.30 and 0.25 V, respectively, ensuring a small gain fluctuation for DPA. Drain supply voltages are fixed to 4.5 V for all devices. Fig. 11 shows the measured gain and output power as a function of input power using a continuous wave (CW) signal. As can be noted, the input 1-dB compression point (IP1dB) increases from 19.5 dBm for the conventional design to 22.5 dBm for the proposed one. Regarding the OP1dB, the values are 28.7 and 31.6 dBm, respectively, accounting for a 2.9-dBm enhancement.

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Fig. 12. Measured PAE versus back-off power of the proposed and conventional DPAs under CW signal.

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Fig. 14. Measured drain dc currents of the proposed and conventional DPAs under WCDMA excitation.

Fig. 15. Photograph of the fabricated circuit.

Fig. 13. Measured efficiency of the proposed and conventional DPAs under WCDMA excitation.

PAE characteristic to the back-off power (OP1dB was set as saturation power, corresponding to 0 dB on the -axis) is illustrated in Fig. 12. The values at peak power and 6-dB OBO point are 74% and 53% for the proposed design. In contrast with 66% and 40% for the conventional design, 8% and 13% improvements are achieved, respectively. For a thorough comparison, modulated signal is also used to perform a further investigation. Fig. 13 depicts the measured PAE performance versus back-off power using a 2.14-GHz downlink WCDMA with 5.8-dB PAPR. It is evident that similar characteristics are obtained as the CW signal, PAE values at peak power, and average power (5.8-dB OBO) are boosted by 7% and 8%, respectively, after adopting the new design methodology. Fig. 14 shows the dc current profile of the implemented DPA prototypes as a function of output power under a WCDMA signal. The two fabricated circuits exhibit similar characteristics at the low-power region because of similar matched loads for the carrier PAs. The carrier current is lower for the conventional implementation at the high-power region because its

Fig. 16. Measured IMD3 characteristics of the proposed and classic DPAs under two-tone signal.

gain compression cannot be compensated well due to inadequate load modulation. In other words, it saturates much harder than the counterpart in the proposed DPA. On the other hand, the peaking current for the conventional design is much higher. This attributes a lot to the efficiency degradation, which is also

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Fig. 17. Measured ACLR characteristic of the proposed and classic DPAs under WCDMA excitation.

caused by inadequate load modulation. Fig. 15 presents a photograph of the proposed DPA. The LMN of the conventional DPA is appended for comparison. B. Linearity Performance The linearity assessment is conducted by testing the thirdorder intermodulation distortion (IMD3) using a two-tone signal with 5-MHz spacing. As shown in Fig. 16, they exhibit similar linearity performance at the low-power region, and it is slightly worse for the conventional design around peak power. Besides, it is interesting to note that an IMD3 “sweet spot” is shown in the proposed design near 23-dBm output power, but not in the conventional design. Fig. 17 shows the adjacent channel power ratio (ACLR) to the output power at 5-MHz offset. The two DPAs achieve very close linearity performance across a wide power range, while it became slightly better for the proposed design near saturation. IV. CONCLUSION This paper has introduced a novel LMN design approach for the Doherty amplifier. By taking the current ratio between two sub-amplifiers into consideration, characteristic impedances in the LMN can be devised to overcome imperfect load modulation exists in conventional design. Accordingly, efficiency and output power can be enhanced by this. Following comprehensive theoretical analysis to describe the underlying principles and design procedures, extensive simulation and experimental measurement was carried out to confirm it. Considerable performance improvement was demonstrated in terms of output power an efficiencies. In addition, it is a straightforward, effective, and low-cost approach without any need for additional circuitry. REFERENCES [1] D. C. Cox, “Linear amplification with nonlinear components,” IEEE Trans. Commun., vol. COM-22, no. 12, pp. 1942–1945, Dec. 1974.

[2] F. H. Raab, P. Asbeck, S. Cripps, P. B. Kenington, Z. B. Popovic, N. Pothecary, J. F. Sevic, and N. O. Sokal, “Power amplifiers and transmitters for RF and microwave,” IEEE Trans. Microw. Theory Techn., vol. 50, no. 3, pp. 814–826, Mar. 2002. [3] F. Wang, D. F. Kimball, J. D. Popp, A. H. Yang, D. Y. C. Lie, P. M. Asbeck, and L. E. Larson, “An improved power-added efficiency 19-dBm hybrid envelope elimination and restoration power amplifier for 802.11g WLAN applications,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 12, pp. 4086–4099, Dec. 2006. [4] M. Iwamoto, A. Williams, P.-F. Chen, A. G. Metzger, L. E. Larson, and P. M. Asbeck, “An extended Doherty amplifier with high efficiency over a wide power range,” IEEE Trans. Microw. Theory Techn., vol. 49, no. 12, pp. 2472–2479, Dec. 2001. [5] J. Kim, J. Moon, Y. Y. Woo, S. Hong, I. Kim, J. Kim, and B. Kim, “Analysis of a fully matched saturated Doherty amplifier with excellent efficiency,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 2, pp. 328–338, Feb. 2008. [6] T. M. Hone, S. Bensmida, K. A. Morris, M. A. Beach, J. P. McGeehan, J. Lees, J. Benedikt, and P. J. Tasker, “Controlling active load–pull in a dual-input inverse load modulated Doherty architecture,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 6, pp. 1797–1804, Jun. 2012. [7] J. Moon, J. Kim, J. Kim, I. Kim, and B. Kim, “Efficiency enhancement of Doherty amplifier through mitigation of the knee voltage effect,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 1, pp. 143–152, Jan. 2011. [8] S. C. Cripps, RF Power Amplifiers for Wireless Communications. Norwood, MA: Artech House, 1999. [9] J. Kim, J. Cha, I. Kim, and B. Kim, “Optimum operation of asymmetrical-cells-based linear Doherty power amplifiers—Uneven power drive and power matching,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 5, pp. 1802–1809, Dec. 2005. [10] M. Nick and A. Mortazawi, “Adaptive input-power distribution in Doherty power amplifiers for linearity and efficiency enhancement,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 11, pp. 2764–2771, Nov. 2010. [11] J. Kim, B. Fehri, S. Boumaiza, and J. Wood, “Power efficiency and linearity enhancement using optimized asymmetrical Doherty power amplifiers,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 2, pp. 425–434, Feb. 2011. [12] S. Chen and Q. Xue, “A novel Doherty power amplifier with selfadaptive biasing network for efficiency improvement,” Microw. Opt. Technol. Lett., vol. 53, no. 11, pp. 2586–2589, Nov. 2011. [13] J. Nam and B. Kim, “The Doherty power amplifier with on-chip dynamic bias control circuit for handset application,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 4, pp. 633–642, Apr. 2007. [14] Y.-J.-E. Chen, C.-Y. Liu, T.-N. Luo, and D. Heo, “A high-efficient CMOS RF power amplifier with automatic adaptive bias control,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 11, pp. 615–617, Nov. 2006. [15] J. Son, I. Kim, J. Moon, J. Lee, and B. Kim, “A highly efficient asymmetric Doherty power amplifier with a new output combining circuit,” in IEEE Int. Microw., Commun, Antennas, Electron, Syst. Conf., 2011, pp. 1–4. [16] Y. Yang, J. Cha, B. Shin, and B. Kim, “A fully matched -way Doherty amplifier with optimized linearity,” IEEE Trans. Microw. Theory Techn., vol. 51, no. 3, pp. 986–993, Mar. 2003. [17] D. M. Pozar, Microwave Engineering, 2nd ed. New York: Wiley, 1998. [18] J. Nam, J. H. Shin, and B. Kim, “A handset power amplifier with high efficiency at a low level using load-modulation technique,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 8, pp. 2639–2644, Aug. 2005.

Shichang Chen (S’09) was born in Zhejiang, China, in 1987. He received the B.S. degree in electronic engineering from the Nanjing University of Science and Technology, Nanjing, China, in 2009, and is currently working toward the Ph.D. degree in electronic engineering at City University of Hong Kong. His research interest focuses on high-efficiency PAs.

CHEN AND XUE: OPTIMIZED LMN FOR DPA PERFORMANCE ENHANCEMENT

Quan Xue (M’02–SM’04–F’11) received the B.S., M.S., and Ph.D. degrees in electronic engineering from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 1988, 1990, and 1993, respectively. In 1993, he was a Lecturer with UESTC, where he became an Associate Professor in 1995 and a Professor in 1997. From October 1997 to October 1998, he was a Research Associate, and then a Research Fellow with the Chinese University of Hong Kong, Shatin, Hong Kong. Since 1999, he has been with the City University of Hong Kong, Kowloon, Hong Kong, where he is currently a Professor, the Director of the Information and Communication Research Center, the Deputy Director of the State Key Laboratory (Hong Kong) of Millimeter Waves of China, and the Assistant Head of the Department of Electronic En-

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gineering. Since May 2004, he has been the Principal Technological Specialist with the State Integrated Circuit (IC) Design Base, Chengdu, China. He has authored or coauthored over 180 internationally refereed journal papers and over 70 international conference papers. He is currently an Editor for the International Journal of Antennas and Propagation. His current research interests include microwave passive components, active components, antenna, microwave monolithic ICs, RF identification, and RF ICs. Dr. Xue is currently an associate editor for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES and the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS. He is an elected member of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) Administrative Committee and chair of the IEEE Hong Kong Section Antenna and Propagation/Microwave Theory and Techniques Joint Chapter.

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A 7.9-mW 5.6-GHz Digitally Controlled Variable Gain Amplifier With Linearization Thangarasu Bharatha Kumar, Student Member, IEEE, Kaixue Ma, Senior Member, IEEE, and Kiat Seng Yeo, Senior Member, IEEE

Abstract—This paper presents the design and validation of a compact high-performance digitally controlled variable-gain amplifier (DVGA). By using MOS switches and a linearizer, the designed DVGA demonstrates high linearity and gain flatness over a wide gain control range. The 6-bit DVGA is designed in a commercial 0.18- m SiGe BiCMOS technology achieving a variable gain range from 16.5 to 6.5 dB, a 3-dB bandwidth from dc to 5.6 GHz, a 0.75-dB gain flatness from dc to 4 GHz, both input and output return loss greater than 15 dB, consuming 7.9 mW over the entire gain control range, and has a core circuit area of 170 m 60 m. Index Terms—Digitally controlled, linearizer technique, low power design, millimeter wave, silicon–germanium (SiGe) BiCMOS, 60-GHz communication, variable gain amplifier (VGA).

I. INTRODUCTION

A

UTOMATIC gain control (AGC) is extended to RF transceivers to provide constant signal strength to the analog-to-digital converters (ADCs) in digital baseband, even with varying signal strength across the channel between the transmitter and receiver [1]. The variable gain amplifier (VGA) circuit in the AGC performs the key function of varying the gain and attenuation in accordance with the input signal strength acquired by the digital baseband portion, as shown in Fig. 1. By using the feedback control mechanism, the AGC holds its output signal strength to a predetermined fixed level [2], [3]. In an RF transceiver, the VGA is required to achieve a stable gain control without altering the dc power consumption, bandwidth, stability, input/output return loss, and maintain the signal power strength for digital baseband. Based on the techniques for gain variation, the VGA can be classified as continuous or analog gain control VGA (CVGA) [1]–[10] and discrete step or digital gain control VGA (DVGA) [11]–[14]. In CVGA, the digital baseband requires a digital-toanalog converter (DAC) to control the gain, increasing the circuit complexity. The DVGA can be interfaced directly with the Manuscript received July 04, 2012; revised August 09, 2012; accepted August 10, 2012. Date of publication October 02, 2012; date of current version October 29, 2012. This work was supported in part by the Exploit Technologies Pte Ltd. and Nanyang Technological University (NTU). T. B. Kumar and K. Ma are with VIRTUS, Integrated Circuit Design Centre for Excellence, Nanyang Technological University (NTU), Singapore 639798 (e-mail: [email protected]; [email protected]). K. S. Yeo is with the School of Electrical and Electronic Engineering, Nanyang Technological University (NTU), Singapore 639798 (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2217151

Fig. 1. RF transceiver architecture.

digital baseband without the need for a DAC to accept digital gain control information, as shown in Fig. 1. From the literature, a DVGA can be implemented by switching between various fixed gain stages [12] or by using binary weighted arrays of circuit components selected discretely using switches [11], [13], [14]. This switching either by gain stages or by circuit components is finally reflected in VGA gain step variation. While the switching gain stage DVGA consumes more power and larger die area due to design redundancy, the DVGA with switching between circuit components are compact, consuming less power and die area. Although the state-of-the-art VGA designed in the CMOS process [2]–[4], [6]–[11], [13], [14] has a few advantages, such as large dynamic range with low power consumption, it also possesses transconductance [8] with square law characteristics, shown in (1) as follows: (1) where and are the bias point drain current and the gate-to-source voltage, with as the MOS transistor process parameter. To achieve linear gain variation based on the transistor bias current , the CMOS DVGA requires additional corrective circuits. The proposed DVGA is based on the bipolar devices and simplifies the gain control technique by varying the bias current using digital switches. This method ensures the advantage of implementing a DVGA with simple topology, direct switch control using current mirrors, and avoiding additional corrective circuits. In a CMOS VGA, the dc offset also saturates the next stage amplifier, limiting the bandwidth to start from a higher freHz . To overcome these limitations, the quency than dc CMOS VGA needs additional corrective circuits [8]. A desirable quality of an amplifier is higher linearity, which determines the maximum signal level that can be amplified without any distortion in the output signal. The distortion is caused due to the circuit components entering their nonlinear operating region due to large input signal. The technique of

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Fig. 2. Proposed DVGA. (a) Block diagram. (b) Circuit schematic.

the diode-connected linearizer used in power amplifier designs [15]–[17] improves the linearity of the amplifier, although they require an additional reference voltage that may be higher than the supply voltage to bias the linearizer diode. The proposed design’s simulation performance was described in [18]. This paper proposes the design of a high-performance DVGA based on the digital gain control by using an SiGe BiCMOS HBT as the amplifying device, and the amplifier transconductance is varied in steps by using nMOS switches. In this design, the technique of the diode-connected linearizer is further extended to improve linearity of the proposed DVGA by eliminating additional reference voltage. The proposed DVGA utilizes the circuit architecture advantages of both HBT and MOS devices to easily generate linear gain variation, large dynamic range, wide bandwidth, low power consumption, and compact die size. This paper is organized as follows. Section II describes the circuit topology and deduces the analysis of the proposed design. Section III provides experimental results that are proven using on-wafer measurement. A conclusion is presented in Section IV.

II. CIRCUIT TOPOLOGY AND ANALYSIS A. Circuit Description Fig. 2(a) shows the block diagram of the proposed fully differential DVGA comprises of four cascaded stages: input fixed gain stage, linearizer stage, variable amplifier/attenuator stage, and output buffer stage. The four stages are biased using the nMOS current sinks ( and ), as depicted in Fig. 2(b). Each stage for the proposed DVGA is selected thoughtfully to meet the stringent design requirement. The current sink transistors ( and ) provide a stable dc bias point with fixed drain current and drain to source voltage , making the design stages insensitive to process variations. In the transceiver system, the current for biasing the DVGA amplifier stages and the gain control switches is derived from the common bandgap reference that provides a process–voltage–temperature (PVT) insensitive current. This current is mirrored using MOS transistors to obtain the DVGA bias (Vbias2), as shown in Fig. 2(b), ensuring the biasing current and the of the current sink transistors are constant under the PVT variations. With current mirror biasing, we

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Fig. 4. Small-signal model of the proposed DVGA half-circuit.

Fig. 3. AC equivalent half-circuit schematic.

can either power ON or power down the whole circuit using a digital MOS switch. This power down option helps to switch off the corresponding DVGA when either the transmitter or receiver chain is nonfunctional. This prevents power drain and enables low power transceiver designs. In this design, a digital pin ( ) is provided externally to shutdown V or power ON V the DVGA. Since the differential common emitter (CE) stage consumes smaller dc current compared to the dc current consumption of the overall proposed DVGA, the dc power dissipated across and resistors are insignificant. One of the benefits of the resistors and in the design is to provide a small bandwidth improvement.

B. Small-Signal Analysis of Fixed and Variable Gain Stages The ac equivalent half-circuit of Fig. 2(b), excluding the second-stage linearizer, is shown in Fig. 3. Since the linearizer affects only the large-signal performance, it can be neglected for small-signal analysis. The small-signal model for analysis is shown in Fig. 4. This proposed design is analyzed for small-signal performance parameters for the cascaded gain stages. The input common base (CB) stage of the DVGA provides a return loss greater than 15 dB over wide bandwidth and a fixed gain independent of DVGA gain settings. Since the resistance (50 ) looking into the transistor’s emitter terminal (2) is small, the input pole due to emitter–base junction capacitance (18.4 fF) is shifted to very high frequency (greater than 100 GHz). The base terminal is set to ac ground, nullifying the Miller capacitive contribution, and the input impedance becomes resistive over a wide bandwidth with the smaller resistance (2) achieving a return loss greater than 15 dB for the proposed DVGA (2)

Fig. 5. Linear gain variation current distribution.

where it is assumed that all the HBT transistors have the same base resistance , output resistance , and transistor current amplification factor . represents the transconductance of ( to ) transistors. The CE variable gain stage (third stage of DVGA) is designed with the option to vary the transconductance of transistors that eventually sets the DVGA gain. The dc collector current of and is set by nMOS current sinks , as shown in Fig. 5. The variable gain and attenuation of this stage is achieved by varying the current biasing point of the HBT pair . The total dc emitter current and collector current of the transistors are given by

(3) (4) where the CB current amplification factor , reverse saturation current of the base–emitter junction , ideality factor , and thermal voltage are for the transistor pair ( ). The CE stage transconductance is given by (5)

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Since the DVGA stages are cascaded, its small-signal gain is also determined by the voltage gain of the CE stage given by

(6) When

, the voltage gain is reduced to (7)

From (3), (5), and (7), it can be deduced that the overall . The DVGA small-signal gain is determined by current linear DVGA gain variation is achieved by carefully scaling the nMOS current sinks . The current distribution of determining the linear gain variation based on digital gain control bits is shown in Fig. 5 and is given in (8) and (9) as follows: (8)

Fig. 6. Simulated HBT voltage bias point against input power with and without linearizer.

(9) ( to ) are the constant coefficients of the estiwhere mated linear gain function, are the digital bit value received from digital baseband, and is the dc current corresponding to minimum gain when all the digital control bits are reset. As shown in Fig. 5, by careful selection of the currents ( to ) using the aspect ratio (W/L) of nMOSs ( – ) and using nMOS , the current can be approximated closer to linear gain characteristics for the required range of the proposed DVGA. The DVGA gain and attenuation steps are obtained by selecting the parallel current sources of based on the transistor switches that are controlled using 6-bit digital information, ( to ). The maximum gain for the CE variable gain stage is selected smaller in comparison to the CB input gain stage, and by digitally controlling the attenuation of this stage using transconductance , the whole DVGA gain range can be covered. The input transformed Miller capacitor, which is multiplied by the CE variable gain, determines the dominant pole, and the smaller gain of the CE stage moves the dominant pole to higher frequency improving the DVGA bandwidth. The dominant pole is given by

Fig. 7. Simulated maximum gain and output power against input power with and without linearizer.

the resulting larger parasitic capacitance will place a pole at low frequency, limiting the bandwidth. Device size for this stage is carefully selected by taking this tradeoff into consideration. Based on the small-signal model shown in Fig. 4,

(10)

(11)

where and are the transistor lumped base–emitter and base–collector capacitances, respectively.

For the maximum power transfer, the best scenario is to achieve the conjugate matching between the DVGA stages. The wide bandwidth requirement of the proposed DVGA that starts from dc enforces the design to avoid using decoupling capacitors and the matching circuits between the cascaded stages. Although to minimize the power loss due to inter-stage mismatch and also to meet the special requirement of the wide bandwidth of the proposed design, the cascaded DVGA stages are chosen in such a way that the real parts of the internal impedances between the DVGA stages are larger and comparable than the reactive impedances.

C. Small-Signal Analysis of Output Buffer Stage The output stage (last stage) is the emitter follower buffer to drive the signal power to the next transceiver block. This stage is a common collector (CC) amplifier with topological advantage of a smaller output impedance, which is resistive for a wide bandwidth. This improves the output return loss and it is not influenced by the DVGA gain variation, as shown in (11). Larger device size ( ) for this stage has better driveability, but

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Fig. 8. Simulated temperature.

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and

plots for maximum gain setting with varying

Fig. 10. Microphotograph of the proposed on-wafer DVGA circuit core with I/O pads (GSSG) and digital pads (core area: 170 m 60 m).

Fig. 11. Measured small-signal gain steps of proposed DVGA. Fig. 9. Simulated variations.

and

plots for maximum gain setting with process

D. Large-Signal Analysis of the Linearizer Stage Signal pre-distortion is a widely used linearization technique for improving the linearity of power amplifiers that compensates for the distortion and suppresses adjacent channel interference. This technique ensures that the large- and small-signal transistor transconductance are made equal. One such pre-distortion technique is the base–emitter junction diode linearizer using a heterojunction bipolar transistor (HBT) [16]. Due to the change in bias point of the amplifying HBT, proper design of the base bias circuit is key to achieving high linearity for amplifiers [17]. Unlike the diode-connected linearizers described in [15]–[17] that are connected between a reference voltage and the base of the amplifying HBT, the proposed linearizer is also a diode connected HBT shunted across the amplifying HBT to stabilize the base–emitter voltage bias point, as shown in Fig. 2(b). To explain the operating principle of the proposed linearizer, we first consider the case without a linearizer and then deter-

mine the linearity improvement after introducing the linearizer. As the input RF signal power increases, the voltage across the base–emitter junction of increases, and beyond a certain voltage, the signal peak gets saturated. This results in an average dc voltage drop at the base of the HBT from bias point to , as shown in Fig. 6. This reduced base voltage bias point decreases the large-signal transconductance and results in gain compression. To compensate for this compression and to equate the large-signal transconductance with the small-signal , the base bias point must be moved from to [16]. The same operation can be achieved by fixing the dc voltage of at the point that is same as at in Fig. 6. The diode-connected transistors holds the base bias point of HBTs to a constant value ( 1.2 V) even for large input power levels, as shown in Fig. 6, and improves the linearity of the DVGA. The DVGA linearity simulation shown in Fig. 7 demonstrates the advantage of the proposed linearizer to improve the circuit linearity. From Fig. 7, input is improved by about 12 dB (improved from A to B) and output is unaltered. The gain drop perceived in

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TABLE I PERFORMANCE SUMMARY OF VGAs

minimum measured . simulation noise figure. Core die area (excluding I/O pads).

Fig. 7 is a consequence of introducing the proposed linearizer. The linearizer bypasses a portion of the HBT ( ) base current that is determined by the size of the nMOS current mirror , as shown in Fig. 2(b), and results in the gain drop noticed in Fig. 7. The amount of dc current through the linearizer determines the contribution of the linearizer on the overall linearity by maintaining the fixed base voltage ( 1.2 V) and also on the dc power consumption of the proposed DVGA. By using the proposed linearizer, both the base voltage and the base current for the CE stage are fixed for large input power levels, and thus the DVGA linearity is improved. The proposed linearizer utilizes the tradeoff of improving the DVGA linearity with simple circuit topology and low dc power consumption over the gain reduction. Direct coupling between the DVGA stages is necessary for propagation of the signals from dc. In the proposed DVGA, the linearizer is introduced at the nodes joining the CB and CE differential stages. This proposed linearizer improves the linearity of the DVGA without consuming additional dc power and significant die area. The proposed linearizer circuit has a simplified structure and does not require an additional biasing circuit, unlike the linearizers in [15]–[17]. The integrated diode linearizers described in [16] and [17] are based on an InGaP/GaAs HBT transistor that has better input improvement of about 18 dB, nevertheless these linearizers are operated at a higher supply voltage of 3.4 V that can provide enough headroom for stacking many transistors. Similarly, the linearizer in [15] describes a CMOS equivalent integrated diode linearizer design that has about 0.5-dB input improvement and is also operated at a higher supply voltage of 2.5 V. The linearizers in [15]–[17] are realized for single-ended power-amplifier designs and cannot be adapted in our design that requires a differential

drive. Contrasting the linearizers used in power-amplifier designs [16], [17] that require a reference bias voltage that may be higher than the amplifier supply voltage, this proposed linearizer utilizes the dc level that is dc coupled between the CB and CE gain stages. These benefits of the proposed linearizer makes it an apt choice for this low-power differential direct-coupled DVGA. Fig. 8 shows the simulation plot of output power along with the third harmonic component against the input power for maximum DVGA gain setting with varying temperature. The plot suggests that the third-order intercept point (IP3) and values have minimum change at the output, while the temperature variation has an effect on the input IP3 and . The reason for this behavior can be explained by the temperature sensitivity of the diode-connected transistors in the proposed linearizer that affects the biasing point of the CE stage. The and IP3 simulation plot for maximum DVGA gain in Fig. 9 shows that the proposed linearizer is less sensitive to process variations. The variation of the DVGA’s and IP3 are within 1.5 dB from the nominal (NOM/TYP) value. The DVGA linearity characteristics with temperature and process variations is independent of the DVGA gain setting. III. EXPERIMENTAL RESULTS The proposed DVGA is implemented in a 0.18- m SiGe BiCMOS process and the design is verified on-wafer using an Agilent E8364B PNA network analyzer and HP 8970B noise figure meter. The die microphotograph is shown in Fig. 10. The compact core area of 170 m 60 m enables easy integration of DVGA transceiver system-on-chip (SOC). The DVGA consumes a dc current of 4.4 mA from a supply voltage of 1.8 V. During the power down mode, all the nMOS current sinks

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Fig. 12. Measured return loss and reverse isolation. Fig. 14. Measurement and simulation of

and

.

Fig. 13. Measurement and simulation of maximum and minimum gain.

( ) are shut down and the circuit consumes current in the range of few nanoamperes with outputs disabled. The measurement setup comprises of two ground–signal–signal–ground (GSSG) probes for input and output RF differential pads. Only five dc probes were available in test setup and two are used for VDD and Pwr_Dwn, leaving only three probes for digital gain bits that could be set at a particular time. Hence, the plots could not be taken for the entire gain variation steps and gain range was limited from “ ” for attenuation (minimum gain) to “ ” for maximum gain, as shown in Fig. 11. The measured results are summarized in Table I and the small-signal -parameters are plotted in Figs. 11 and 12. From Fig. 11, the small-signal gain has a good gain flatness for the measured gain steps covering a gain range from 16.5 to 6.5 dB, and it is evident that the bandwidth increases with the decrease of the DVGA gain, as discussed in (10). From the measurement plots in Fig. 12, both the input return loss ( ) and the output return loss ( ) are greater than 15 dB over the complete operational frequency range independent of the DVGA gain setting. Figs. 13 and 14 show the comparison of simulation versus measured -parameter gain ( ) and return losses ( and ), respectively. We observe that the measured gain is dropped by 3.5 dB from the

Fig. 15. Simulation of maximum and minimum gain against process variation of the polysilicon resistors (nominal resistance value: NOM; process variation parameter of the polysilicon resistors: ).

simulation gain, while the bandwidth is increased by 1 GHz. The main contribution for this difference is ascertained to the process variation of the polysilicon resistors that are used as the load for the proposed DVGA amplifier stages. Fig. 15 shows the corner simulation plot for the DVGA gain variation against the statistical process parameter variation of the polysilicon resistors. The plot suggests that the consequence of reduction in the resistance value causes the gain to drop and bandwidth to increase, which is the behavior observed in the measurement results shown in Fig. 13. In addition, the interconnect losses from the differential traces connected from the core DVGA to GSSG measurement pads are partly responsible for the gain drop. The linearity improvement is noticeable in the measurement plot shown in Fig. 16 for maximum and minimum gain setting. The measured results are summarized and compared with high-performance VGAs in Table I. The proposed DVGA has widest bandwidth of 5.6 GHz, finer gain control range from 16.5 to 6.5 dB using 6 bits, consuming less power of 7.9 mW for a fully differential architecture and a compact core area of 0.17 mm 0.06 mm.

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Fig. 18. Measured gain and noise figure at 3 GHz for various digital gain control.

Fig. 16. Measured power output and gain against input power for: (a) maximum gain and (b) minimum gain bit.

the proposed DVGA. In our transceiver system, since the stages before the DVGA of the receiver chain have enough gain and low noise figure, according to the Frii’s formula of the cascaded stages, the contribution of the proposed DVGA’s noise figure is not significant on the overall receiver’s noise figure. IV. CONCLUSION A compact digitally controlled VGA using 0.18- m SiGe BiCMOS technology designed for a wide 3-dB bandwidth of 5.6 GHz, a large gain range from 16.5 to 6.5 dB, and consuming only 7.9 mW has been presented. The diode linearizer stage improves the circuit linearity without increasing the circuit’s dc power consumption and die area. Excellent small-signal performance with flat gain steps over the entire bandwidth and return loss at both input and output reference planes greater than 15 dB is achieved. The die area occupied by the core DVGA is only 170 m 60 m.

Fig. 17. Measured noise figure for various DVGA gain steps.

The newly introduced linearizer has improved the input maintaining output in the range from 5 to 2 dBm. The measured noise figure is plotted for different DVGA gain settings against frequency, as shown in Fig. 17. The plot in Fig. 18 is obtained with the measured gain and the noise figure at 3 GHz for different DVGA gain setting. The digital gain control word depicted along the -axis in Fig. 18 indicates the decimal value representation of the 6-bit binary word with as the most significant bit (MSB) and as the least significant bit (LSB). The plot in Fig. 18 indicates that the noise figure for the amplifier gain setting (gain 0 dB) is almost constant, mainly because the input is a fixed gain amplifier CB stage. The noise figure becomes larger as the DVGA gain becomes smaller and operates as an attenuator ( gain dB). The DVGA noise figure is given by (12) as follows: (12) and ( and ) are the noise figure and where voltage gain of the cascaded CB, CE, and CC amplifier stages of

ACKNOWLEDGMENT The authors are thankful to Tower Jazz Semiconductors Inc., Newport Beach, CA, for providing fabrication service of the design. The authors also thank L. Wei Meng and Y. Wanlan, both with the Nanyang Technological University, Singapore, for assisting with the on-wafer measurement. REFERENCES [1] W. R. Davis and J. E. Solomon, “A high-performance monolithic IF amplifier incorporating electronic gain control,” IEEE J. Solid-State Circuits, vol. SSC-3, no. 4, pp. 408–416, Dec. 1968. [2] I. H. Wang and S. I. Liu, “A 0.18- m CMOS 1.25-Gbps automaticgain-control amplifier,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 55, no. 2, pp. 136–140, Feb. 2008. [3] S. Tadjpour, F. Behbahani, and A. A. Abidi, “A CMOS variable gain amplifier for a wideband wireless receiver,” in VLSI Circuits Symp. Tech. Dig., Honolulu, HI, Aug. 2002, pp. 86–89. [4] C.-H. Wu, C.-S. Liu, and S.-I. Liu, “A 2 GHz CMOS variable-gain amplifier with 50 dB linear-in-magnitude controlled gain range for 10 Gbase-LX4 ethernet,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2004, pp. 484–541. [5] N. Byrne, P. J. Murphy, K. G. McCarthy, and B. Foley, “A SiGe HBT variable gain amplifier with 80 dB control range for applications up to 3 GHz,” in 7th Eur. Wireless Technol. Conf., Amsterdam, The Netherlands, May 2005, pp. 193–196.

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[6] Y. Wang, B. Afshar, L. Ye, V. C. Gaudet, and A. M. Niknejad, “Design of a low power, inductorless wideband variable-gain amplifier for highspeed receiver systems,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 59, no. 4, pp. 696–707, Apr. 2012. [7] Q.-H. Duong, Q. Le, C.-W. Kim, and S.-G. Lee, “A 95-dB linear lowpower variable gain amplifier,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 53, no. 8, pp. 1648–1657, Aug. 2006. [8] H. D. Lee, K. A. Lee, and S. Hong, “A wideband CMOS variable gain amplifier with an exponential gain control,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 6, pp. 1363–1373, Jun. 2007. [9] Y.-Y. Huang, W. Woo, H. Jeon, C.-H. Lee, and J. S. Kenney, “Compact wideband linear CMOS variable gain amplifier for analog-predistortion power amplifiers,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 1, pp. 68–76, Jan. 2012. [10] Z. Li, F. Guo, D. Chen, H. Li, and Z. Wang, “A wideband CMOS variable gain amplifier with a novel linear-in-decibel gain control structure,” in IEEE Int. RFIT Workshop, Sentosa, Singapore, Dec. 2007, pp. 337–340. [11] T. H. Teo and W. G. Yeoh, “Low-power digitally controlled CMOS source follower variable attenuator,” in IEEE Int. Circuits Syst. Symp., New Orleans, LA, May 2007, pp. 229–232. [12] S. Otaka, H. Tanimoto, S. Watanabe, and T. Maeda, “A 1.9-GHz Si-bipolar variable attenuator for PHS transmitter,” IEEE J. Solid-State Circuits, vol. 32, no. 9, pp. 1424–1429, Aug. 2002. [13] M. Meghdadi, M. S. Bakhtiar, and A. Medi, “A UHF variable gain amplifier for direct-conversion DVB-H receivers,” in IEEE Radio Freq. Integr. Circuits Symp., Boston, MA, May 2009, pp. 551–554. [14] D. Im, H.-T. Kim, and K. Lee, “A CMOS resistive feedback differential low-noise amplifier with enhanced loop gain for digital TV tuner applications,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 11, pp. 2633–2642, Nov. 2009. [15] C. C. Yen and H. R. Chuang, “A 0.25- m 20-dBm 2.4-GHz CMOS power amplifier with an integrated diode linearizer,” IEEE Trans. Microw. Wireless Compon. Lett., vol. 13, no. 2, pp. 45–47, Feb. 2003. [16] J. H. Kim, J. H. Kim, Y. S. Noh, and C. S. Park, “High linear HBT MMIC power amplifier with partial RF coupling to bias circuit for W-CDMA portable application,” in Proc. IEEE Int. Microw. Millim. Wave Technol. Conf., Aug. 2002, pp. 809–812. [17] Y. S. Noh and C. S. Park, “PCS/W-CDMA dual-band MMIC power amplifier with a newly proposed linearizing bias circuit,” IEEE J. Solid-State Circuits, vol. 37, no. 9, pp. 1096–1099, Sep. 2002. [18] T. B. Kumar, K. Ma, K. S. Yeo, S. Mou, M. Nagarajan, J. Gu, K. M. Lim, Y. Lu, and H. Yu, “A DC to 4 GHz fully differential wideband digitally controlled variable gain amplifier,” in Proc. IEEE Asia–Pacific Microw. Conf., Yokohama, Japan, Dec. 2010, pp. 2295–2298. [19] P. R. Gray, P. J. Hurst, S. H. Lewis, and R. G. Meyer, “Single-transistor and multiple-transistor amplifiers,” in Analysis and Design of Analog Integrated Circuits, 4th ed. New York: Wiley, 2001, ch. 3, pp. 170–224. [20] S. D’Amico, M. De Matteis, and A. Baschirotto, “A 6.4 mW, 4.9 nV Hz, 24 dBm IIP3 VGA for a multi-standard (WLAN, UMTS, GSM, Bluetooth) receiver,” in Proc. ESSCIRC’06, Montreux, Switzerland, Sep. 2006, pp. 82–85. [21] H.-C. Lee, C.-C. Lin, and C.-K. Wang, “A 290 MHz 50 dB programmable gain amplifier for wideband communications,” in IEEE Asian Solid-State Circuits Conf., Hangzhou, China, Nov. 2006, pp. 379–382. [22] K. Moez and M. I. Elmasry, “A low-noise CMOS distributed amplifier for ultra-wide-band applications,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 55, no. 2, pp. 126–130, Feb. 2008. [23] B. Hur and W. R. Eisenstadt, “CMOS programmable gain distributed amplifier with 0.5-dB gain steps,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 6, pp. 1552–1559, Jun. 2011. [24] C. Liu, Y.-P. Yan, W.-L. Goh, Y.-Z. Xiong, L.-J. Zhang, and M. Madihian, “A 5-Gb/s automatic gain control amplifier with temperature compensation,” IEEE J. Solid-State Circuits, vol. 47, no. 6, pp. 1323–1333, Jun. 2012. [25] H.-Y. M. Pan and L. E. Larson, “A linear-in-dB SiGe HBT wideband high dynamic range RF envelope detector,” in Proc. IEEE Radio Freq. Integr. Circuits Symp., Anaheim, CA, May 2010, pp. 267–270.

Thangarasu Bharatha Kumar (S’12) was born in Thanjavur, India, in 1980. He received the Bachelor of Engineering degree in electronics and communication from the Ratreeya Vidyalaya College of Engineering (RVCE), Bangalore, India, in 2002, the M.Sc. degree in integrated circuit design from the German Institute of Science and Technology, Singapore (a joint degree programme offered by the Nanyang Technological University (NTU), Singapore, and Technische Universitaet Muenchen (TUM), Munich, Germany), in 2010, and is currently working toward the Ph.D. degree at NTU. Since 2010, he has been a Research Associate with VIRTUS, Integrated Circuit (IC) Design Centre for Excellence, Nanyang Technological University (NTU). His research interests include RF and millimeter-wave integrated circuit design. Kaixue Ma (M’05–SM’09) received the B.E. and M.E. degrees from Northwestern Poly-Technological University (NWPU), Xi’an City, China, and the Ph.D degree from Nanyang Technological University (NTU), Singapore. From August 1997 to December 2002, he was with the China Academy of Space Technology (Xi’an), where he became Group Leader of the Millimeter-Wave Group for space-borne microwave and millimeter-wave components and subsystems in satellite payload. From September 2005 to September 2007, he was with MEDs Technologies, as a Research and Development Manager. From September 2007 to March 2010, he was with ST Electronics (Satcom & Sensor Systems), as a Research and Development Manager and Technique Management Committee member of ST Electronics. Since March 2010, he has been with NTU, as a Senior Research Fellow and RF Integrated Circuit (RFIC) Team Leader for 60-GHz transceiver SOC development. As a Principle Investigator (PI)/Technique Leader, he was involved with projects of fund exceeding S$12 million (excluding projects performed in China) and a number of products used in space or ground stations. He has authored or coauthored over 90 journal and conference papers. He has filed eight patents with two pending. His current interests include microwave/millimeter-wave circuits and systems using CMOS, monolithic microwave integrated circuits (MMICs) and low-temperature co-fired ceramic (LTCC). Dr. Ma is a reviewer of several international publications, including the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES and IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS. He was the recipient of the Best Paper Awards of IEEE SOCC2011, the IEEK SOC Design Group Award, the Excellent Paper Award of HSCD2010, and the Chip Design Competition Bronze Award of ISIC2011. Kiat Seng Yeo (M’00–SM’09) received the B.Eng. degree (with Honors) and Ph.D. degree from Nanyang Technological University (NTU), Singapore, in 1993 and 1996, respectively, both in electrical engineering. He is currently an Associate Chair (Research) with the School of Electrical and Electronic Engineering, NTU. He is a widely known authority on low-power RF/millimeter-wave integrated circuit design and a recognized expert in CMOS technology. He has secured over S$30M of research funding from various funding agencies and industry over the last three years. He was the Founding Director of VIRTUS, a S$50M research center of excellence jointly set up by the NTU and Economic Development Board. He has authored or coauthored six books, three book chapters, and 320 international top-tier refereed journal and conference papers. He holds 25 patents. Dr. Yeo is a member of the Editorial Board of the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES. He holds or has held key positions in many international conferences, such as advisor, general chair, co-general chair, and technical chair. He is a board member of the Singapore Semiconductor Industry Association. He was the recipient of the Public Administration Medal (Bronze) on National Day 2009, presented by the President of the Republic of Singapore. He was also the recipient of the Distinguished Nanyang Alumni Award in 2009 for his outstanding contributions to the university and society.

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Reconfigurable Dual-Channel Multiband RF Receiver for GPS/Galileo/BD-2 Systems Dongpo Chen, Wenjie Pan, Peichen Jiang, Jing Jin, Tingting Mo, Member, IEEE, and Jianjun Zhou, Senior Member, IEEE

Abstract—A fully integrated dual-channel multiband RF receiver is designed and implemented for next-generation global navigation satellite systems (GNSSs) in a 0.18- m CMOS process. Its two reconfigurable signal channels can simultaneously process any two types of 2-, 4-, or 20-MHz bandwidth signals mainly located around the RF bands of 1.2 and 1.57 GHz for GPS, Galileo, and BD-2 (aka Compass) systems, while achieving better performance (die area, noise figure, gain dynamic range) than other state-of-the-art GNSS receivers. A digital automatic gain control loop consisting of a variable gain amplifier and nonuniform 4-bit ADC is utilized to improve the receiver’s robustness and performance in the presence of interferences. While drawing 25-mA current per channel from a 1.8-V supply, this RF receiver achieves a total noise figure of 2.5 dB/2.7 dB at 1.2/1.57 GHz, an image rejection of 28 dB, a maximum voltage gain of 110 dB, a gain dynamic range of 73 dB, and an input-referred 1-dB compression point of 58 dBm, with an active die area of 2.4 mm for single channel. Index Terms—Automatic gain control (AGC), global navigation satellite systems (GNSSs), multiband, reconfigurable RF receiver.

I. INTRODUCTION

G

LOBAL navigation satellite systems (GNSS) have provided the fundamental physical quantities of the absolute position, velocity, and time information to users in a variety of civilian applications [1], [2]. Until now, the global positioning system (GPS) developed by the U.S. is the only fully operational GNSS. The European Union’s Galileo positioning system, however, a GNSS in the initial deployment phase, is scheduled to be available in 2013 [3]. China has launched eight navigation satellites (as of June 2011) to construct the next-generation GNSS “BeiDou-2 (BD-2)” (also known as COMPASS), and the systems will be expanded into a fully operational GNSS by 2020 [4]. In order to improve the position accuracy and the operational capability in multipath and jamming environments, the new civil navigation signals called L2C and L5 will be added into the next-generation GPS [5]. For the same motivations as the GPS modernization plan, BD-2 and Galileo systems employ Manuscript received May 27, 2012; revised August 22, 2012; accepted August 24, 2012. Date of publication September 17, 2012; date of current version October 29, 2012. This work was supported by the Chinese National Major Science and Technology Projects Program (2009ZX01031-002-005). The authors are with the Center for Analog/RF Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiao Tong University, Shanghai 200240, China (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2216287

TABLE I LIST OF GNSS SIGNALS

dual bands at B1/B2 and E1/E5, respectively [3], [4]. As summarized in Table I, these GNSS signals are mainly located at the RF bands of 1.2 and 1.57 GHz with 2-, 4-, or 20-MHz bandwidth (BW). Most reported GNSS RF receivers focus on the GPS L1 band and some of them have been integrated into a system-on-chip (SoC) [7]–[13]. The applications of GNSS receivers in extreme environments, however, usually need cooperating from several GNSS bands, or even multiple navigation systems. Recently, some efforts have been made to design multimode and multiband GNSS receivers in [5], [6], [14], and [19], but these RF receivers lack sufficient flexibility for processing all of the GNSS signals. This paper presents the design and implementation of a dual-channel multiband RF receiver for GPS/Galileo/BD-2 systems. The reconfigurable receiver can simultaneously process any two types of GNSS signals listed in Table I, and for antijamming purposes, a digital automatic gain control (AGC) loop is implemented to suppress unwanted interference and to achieve constant optimal signal amplitude at the input of the analog-to-digital converter (ADC), and thus better ADC performance. To further improve the receiver’s robustness, a 4-bit nonuniform adaptive ADC, which has the capability of reducing the degradation of signal-to-noise ratio (SNR) resulted from continuous wave interference (CWI), pulsed wave interference (PWI), and Gaussian interference [17]–[20], is adopted. This GNSS RF receiver enhances the system’s robustness and position accuracy of next-generation the GNSS’s receiving terminal. This paper is organized as follows. Section II describes the GNSS fundamentals and the advantages of dual-channel and multiband reception. Section III discusses the architecture considerations and system performance of the dual-channel multiband GNSS receiver. Section IV presents the detailed circuit implementations. Section V shows the experimental results of the fabricated GNSS receiver. Section VI concludes this paper.

0018-9480/$31.00 © 2012 IEEE

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Fig. 1. Band spectrum of the GNSS signals.

II. NEXT-GENERATION GNSS A. New GNSS signals 1) GPS: The GPS L1 signal is allocated at 1575.42 MHz using binary phase-shift keying (BPSK) modulation, the main lobe of which occupies a BW of 2 MHz [1]. The main drawback of current civil GPS is poor position accuracy, especially in multipath and jamming environments [1], [5]. To overcome those weaknesses, the new civil navigation signal called L2C and L5 will be added into next-generation GPS. The L2C signal with BW of 2 MHz is located at the L2 band (centered at 1227.6 MHz) [5]. The L5 signal is centered at 1176.45 MHz with a BW of 20 MHz [6]. 2) Galileo: The Galileo project is an alternative and complementary to the GPS and is intended to provide more precise position measurements than current civil GPS. As shown in Fig. 1, the Galileo E1 signal is also centered at 1575.42 MHz, but with binary offset carrier (BOC) spreading modulation, occupying a signal BW of 4 MHz. The other Galileo signals, as listed in Table I, i.e., E5a and E5b, are both located near the band of 1.2 GHz and have a signal BW of 20 MHz [3]. 3) BD-2: The first BeiDou system, officially called the BD-1 Satellite Navigation Experimental System, has been offering navigation services mainly for customers in China and its neighboring regions since 2000. The next-generation system, BD-2 System (aka the Compass System), shall be a global satellite navigation system consisting of 35 satellites and is still under construction. Also shown in Fig. 1, the BD-2 B1 band is centered at 1561.098 MHz using quadrature phase-shift keying (QPSK) modulation, which has a signal BW of 4 MHz [4]. Same as the Galileo E5b, another signal of BD-2, the B2, is also using the band of 1207.14 MHz and has a BW of 20 MHz. B. Features of GNSS Signals As shown in Fig. 1, all GNSS signals have the following common characteristics. First, GNSS signals mainly use two RF bands: 1.2 and 1.57 GHz, and the center frequencies of the GNSS signals are concentrated in the tens of megahertz at these RF bands. Based on this feature, a reconfigurable RF front-end can simultaneously process all of the GNSS signals. Secondly, all of the GNSS systems adopt the technology of a direct sequence spread spectrum (DSSS), which provides

processing gain for the receiver [1]–[4]. Generally, the thermal noise with Gaussian distribution dominates the received power strength. In other words, all of the GNSS signals are buried under thermal noise, and the input SNR can go down to about 25 dB [5]. Finally, for achieving larger processing gain, the new GNSS signals usually have wider BW than the existing GPS L1 signals. C. Why Dual-Channel and Multiband in GNSS Receiver The sensitivity and position accuracy of a current GPS system could be extremely deteriorated in some special environments, such as wooded areas, building insides, and under tunnels [5]. In addition, multipath effect and polluted electromagnetic environment are usually present to the GNSS receivers. The simple GPS receiver with single band reception simply cannot provide sufficient availability and navigation accuracy. Employing multiband in GNSS receivers, as stated previously, should be an efficient way to achieve better acquiring and tracking performance [5], [6], [14], [15]. With the dual-channel architecture, the GNSS receivers can simultaneously process the signals from the different GNSS, for example, GPS and BD-2. Consequently, this dual-channel scheme will increase the number of visible satellites for the GNSS receiver and improve the navigation accuracy and availability [15]. D. Design Challenges for Dual-Channel and Multiband GNSS Receivers Based on the characteristics of GNSS signals, some design challenges must be taken in the implementation of dual-channel and multiband GNSS receivers. • The RF front-end must be reconfigurable for the two main RF bands: 1.2 and 1.57 GHz. Meanwhile, the noise figure (NF) and linearity performance of the RF front-end must meet the stringent specifications. • The analog baseband (ABB) should be capable of processing all of the GNSS signals with different BW. In addition, gain control, image rejection, and variable IF should be realized as well. • Traditionally, a 2-bit ADC that uses a buffered temperature compensated X’tal (crystal) oscillator (TCXO) signal as the sampling clock is good enough for the GPS L1 band

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Fig. 3. Frequency plan of the proposed GNSS RF receiver.

Fig. 2. Block diagram of the GNSS receiver.

[10], [11]. However, in the case of GNSS signals with 20-MHz BW, a 4-bit ADC with a faster sampling clock is demanded. Compared with the 2-bit ADC, the 4-bit ADC has better SNR, and thus, better sensitivity [1]. • Antijamming techniques have to be employed to improve the GNSS receivers’ performance and robustness in the presence of polluted electromagnetic environment, especially in the case where the GNSS receivers coexist with other wireless transmitters, such as mobile phone transceivers. III. RECEIVER ARCHITECTURE A. Receiver Architecture The purpose of this research is to design and implement an RF receiver that can simultaneously process all of the GNSS’s signals, as listed in Table I. Dual-channel and low IF architecture [15], as shown in Fig. 2, is proposed to realize a tri-mode (GPS, Galileo, and BD-2) and multiband GNSS RF receiver. The low-IF architecture not only improves the receiver integration level, but avoids the problem of flicker noise [5], [13]. The RF receiver consists of two separate and independent signal channels for simultaneous reception of any two GNSS signals, e.g., GPS L1 and GPS L5, or GPS L2 and BD-2 B1, and so on. Furthermore, most of the building circuit blocks in the receiver are reconfigurable and reusable in both channels to achieve the tri-mode and multiband functionality and lower the design and applications complexity. Each signal channel of the RF receiver is composed of a low-noise amplifier (LNA), a down-conversion mixer (MXR) followed by a programmable gain amplifier (PGA), a complex bandpass filter (BPF), a variable-gain amplifier (VGA) with a digital AGC loop, a 4-bit nonuniform adaptive ADC, along with an integer- phase-locked loop (PLL) and a wideband voltagecontrolled oscillator (VCO). The output of each channel can be taken after the ADC (in the digital domain) or before the ADC (in the analog domain) for testing and application flexibility. The RF signals around 1.2 or 1.57 GHz would be first amplified by the LNA and then down-converted to the IF by the quadrature mixer. The following reconfigurable complex BPF provides channel selection, image rejection, and antialiasing, as

well as gain control for the down-converted GNSS signals. It also provides multiple operational modes for processing various GNSS signals. For GNSS signals with 2- or 4-MHz BW, the complex BPF can be configured with a center frequency of 6 MHz and a BW of 2, 4, 6, or 8 MHz; for GNSS signals with 20-MHz BW, the complex BPF can be configured with a center frequency of 16 MHz and a BW of 5, 10, 15, or 20 MHz. This configurability of the complex BPF enables the RF receiver to process all types of GNSS signals with different BW. B. IF Selection and Frequency Plan The low-IF architecture is more suitable for the GNSS’s receiver than the zero-IF architecture because the zero-IF architecture would suffer from the problems of dc offset and flicker noise from MOS transistors. The IF should be high enough for easy removal of the dc offset and flicker noise. However, a lower IF is desirable for low-power ADC design, and more importantly, for relaxing the image-rejection requirement by moving the image band into the protected GNSS’s guard band, and across these bands, the GNSS signals are dominated by the thermal noise and no other signal is present. In addition, the IF should be reconfigurable to accommodate various GNSS signal BW. The frequency plan for this RF receiver is outlined in Fig. 3 (only one channel shown). Two independent frequency synthesizers based on an integer- PLL provide wideband LO frequencies for each channel with the tuning range from 1.05 to 1.75 GHz, which covers all of the RF bands used by GNSS satellites. Different from mostly reported architectures [5]–[14], the clock signals for the digital AGC loops and ADC blocks, as well as the digital baseband chip, are generated by the third frequency synthesizer with a tiny digital ring oscillator rather than the divided-down local oscillator (LO) signal. Traditionally, the ADC of GPS receivers use a buffered TCXO signal or a clock from the divided LO signals as the sampling clock. However, the LO signals are reconfigurable and should be changed for different operational modes in the case of a multimode and multiband GNSS receiver. In addition, for the GNSS signals with 20-MHz BW, higher sample frequency must be adopted. Based on these reasons, an independent PLL loop with a ring oscillator is designed to provide more flexible clock signals for the ADC and digital AGC loop in this study. This clock generation scheme can save power consumption and increase clocking flexibility. A 62-MHz clock signal is

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Fig. 4. Noise and gain lineup of the proposed RF receiver in the case of a passive or an active antenna.

chosen as the sampling clock for the AGC loops and ADCs in both channels. C. Noise and Gain In consideration of various BW of GNSS signals, the carrier-to-noise ratio (CNR) is more appropriate to quantify noise performance of GNSS RF receivers than SNR. The minimum required CNR for the digital correlator to acquire and track the satellite signals and then to obtain correct navigation messages is 25 dB Hz [5]. In the entire GNSS RF receiver chain, the antenna, RF front-end, and ADC all contribute major noise degradation. Usually the LO signals with average phase noise of 80 dBc/Hz will cause about 0.1-dB loss in the CNR and the image signals will corrupt the down-converted spectrum and degrade the CNR by about 0.1 dB with an image rejection ratio (IMRR) of 16 dB [5]. Gain controls are implemented along the signal channel to optimize the noise and antiinterference performance in the GNSS receiver. To achieve better receiver performance in the presence of interferences, a 73-dB gain dynamic range was implemented in the signal channel. The gain control in the LNA, PGA and BPF, and VGA provides 8-, 18-, and 47-dB gain dynamic range, respectively. The LNA and PGA gain controls are programmable through digital controls from the serial peripheral interface (SPI) to achieve a better tradeoff between the noise and linearity performance in the RF front-end. The gain controls in the BPF and VGA are realized using a digital AGC loop to achieve a constant signal magnitude at the ADC input for optimized ADC performance. Fig. 4 depicts the noise and gain lineup of the entire GNSS RF receiver in the case of a passive or an active antenna. If a passive antenna is adopted, the required NF is 2.8 dB for receiver sensitivity of 143.5 dBm, as shown in Fig. 4. With an active antenna, the receiver sensitivity will be improved and the required NF could be relaxed (e.g., 5-dB NF and 146.3-dBm receiver sensitivity, as shown in Fig. 4.

Fig. 5. Schematic of the dual-band LNA and matching network.

An external SAW filter should be placed in the front of the receiver to suppress the out-of-band jammer resulted from other wireless systems, and to relax the linearity requirement of RF front-end. The in-band third-order intermodulation intercept point (IIP3) specifications of the LNA and MXR are 10 and 5 dBm, respectively. Reference [16] presents a detailed discussion about the interference and linearity of the GNSS receiver. D. Adaptive ADC and Digital AGC for antiJamming Antijamming techniques have rarely been used in civil GNSS receivers because the application of the spectral spreading technique provides additional process gain for the receiver [17]. Nevertheless, due to the polluted electromagnetic environment and coexistence of a GNSS receiver together with other RF transceivers on the same silicon die or printed circuit board (PCB), it is desirable for the GNSS receivers to have sufficient robustness against occasional or intentional jammers [18], [19]. A nonuniform ADC can be adaptively adjusted based on the

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Fig. 6. Schematic of the mixer.

Fig. 8. Schematic of the complex BPF.

Fig. 9. Block diagram of the digital AGC.

Fig. 7. Schematic of the PGA.

power strength of CWI jamming to achieve an optimized conversion gain of the ADC (i.e., the SNR loss in ADC) and thus better receiver performance [18]–[21]. In this proposed GNSS receiver, a 4-bit nonuniform ADC adaptively controlled by a digital AGC is designed for antijamming and performance optimization. IV. CIRCUIT IMPLEMENTATIONS

Fig. 10. Block diagram of the 4-bit flash ADC.

A. Reconfigurable RF Front-End The reconfigurable RF front-end consists of an LNA, a double-balanced mixer, and a PGA. As shown in Fig. 5, the LNA is a pseudodifferential amplifier with an inductive degeneration. With a wideband resistive loading, the LNA can be operating at either 1.2 or 1.57 GHz for GNSS signals shown in Table I. To support either a passive or an active antenna, the LNA has two programmable gain states with a gain step of 8 dB, realized through a switching resistive load.

A single-ended-to-differential conversion circuitry is incorporated in the LNA to provide differential operation for the subsequent circuit blocks and increase the LNA gain by 6 dB. The tail current source along with the compensation feedback capacitor improves the phase and amplitude imbalance of the single-ended-to-differential conversion [22]. In order to easily obtain simultaneous noise and input matching for dual band (1.2 and 1.57 GHz), extra capacitors are placed across

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Fig. 11. Block diagram of the integer-

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PLL and schematic of the dual-core VCO.

the gate and source of input stage [22]. The added slightly degrades the noise performance, but that makes input matching easier. If the size and bias of transistor M1 is given, appropriate noise performance and input matching can be achieved for both the 1.2- and 1.57-GHz bands with proper values of inductance and . The optimized transistor size of M1 and M2 is 160 m 0.18 m, and is 140 fF. The simulated gain of this LNA is 23 and 20 dB at 1.2 and 1.57 GHz, respectively, adequate to suppress the noise contribution from the subsequent stages. The simulated IIP3 is 5.7 and 3.9 dBm and the NF is 2.1 and 2.3 dB at 1.2 and 1.57 GHz, respectively. The double-balanced mixer based on Gilbert’s topology is shown in Fig. 6. The current bleeding technique is adopted in the mixer to reduce the flicker noise contributed from switching pairs while improving the linearity of the mixer at the same time [22]. The dc-bias current and load resistor in the mixer are programmable to provide a slight adjustment of the mixer’s conversion gain. The in-phase and quadrature outputs of the mixer are fed into the PGA, which is implemented between the RF front-end and the baseband complex BPF to relax the noise requirement for the complex BPF and optimize the linearity performance. As shown in Fig. 7, a fully differential Opamp with resistive feedback is utilized to realize the PGA for low noise and high linearity. In the Opamp, as shown at the bottom of Fig. 7, two tunable compensation capacitors ( and ) are used to obtain constant BW. Moreover, an integrated dc-offset cancellation (DCOC) circuit based on a low-pass filter (LPF) is incorporated to suppress the dc component of the output signals. The PGA’s 3-dB BW is set to be 145 MHz and the ripple of the PGA output is kept less than 0.2 dB across all interested GNSS bands (2 30 MHz). The PGA achieves a third-order input intercept voltage point (IIV3) of 1.78 V and an input-referred noise of 14.5 nV Hz. B. Reconfigurable Complex BPF A fifth-order Chebyshev-I complex BPF based on fully differential Opamp-RC integrators, as shown in Fig. 8, is imple-

mented to achieve not only the channel selection, but also the image rejection, gain control, and DCOC [13], [15], [23]. The complex BPF selects the GNSS signal and rejects the image and out-of-band spurious signals and noise. It is implemented by means of two real LPFs quadrature coupled to achieve the frequency shift at the IF frequency . All of the frequency-dependent elements in the LPF should be transformed into a function of from . Therefore, the output of the complex filter (CF) is given by (1) is the cutoff frequency of where is the gain of the LPF, and the LPF. In general, the desired signal in the -branch leads the -branch by 90° and the output of each branch can be written as (2) (3) Equations (2) and (3) are implemented through the quadrature-coupled resistors (highlighted in Fig. 8), which set the frequency shift. In order to reconfigure the center frequency or IF, BW, and gain, all the capacitors and resistors in the filter are implemented as binary arrays that are set to provide two operational modes: the first is MHz and or MHz, while the second is MHz and or MHz. To save power, this filter is also designed to realize the large gain programmability (from 0 to 42 dB at 6 dB per step) and play the role of the VGA block through five variable-gain stages. Followed by a very simple VGA with a small gain step (from 0 to 5.5 dB at 0.5 dB per step), this programmable complex BPF is part of the digital AGC loop to achieve constant power strength at the ADC input. Due to the PGA placed between the mixer and the complex BPF, the noise requirement for the filter is relaxed, and as a

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Fig. 12. Schematic of the CP.

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Fig. 13. Chip microphotograph of the dual-channel GNSS receiver.

consequence, it provides substantial design margin for linearity and silicon area. Moreover, an automatic digital RC tuning block guarantees the frequency accuracy of the set IF and BW. C. Digital AGC and 4-bit Flash ADC As shown in Fig. 9, the complete digital AGC loop is composed of the complex BPF, a digital VGA [20], a digital AGC feedback control loop, and a nonuniform 4-bit flash ADC. Gain controls are realized using this digital AGC loop to achieve constant optimal signal amplitude at the ADC input, and thus, better ADC performance. A 47-dB gain control range is provided by the complex BPF and the digital VGA, which has a linear-in-decibel characteristic and is tunable from 0 to 47 dB with a 0.5-dB gain step. Furthermore, in the presence of jammers, the digital AGC loop generates the signal of a continuous wave (CW) flag if the ADC saturates. With the notification from the CW flag signal, the digital baseband can adaptively adjust the reference signal , which determines the threshold of the ADC, and thus an optimum ADC conversion gain is achieved. In other words, the digital AGC loop, which is adaptively controlled by the digital baseband, can effectively suppress the jamming of CW interference and Gaussian interference [19], [21]. Finally, the digital AGC is more area efficient compared with a traditional analog counterpart since the digital AGC loop is free of huge loop capacitors. Fig. 10 shows the block diagram of the proposed 4-bit flash ADC. The fully differential input and reference signals are fed into 15 parallel pre-amplifiers followed by comparators and RS triggers, and then the relevant 15-bit thermometer code generated by the comparators will be converted to a 4-bit binary code in the 15-to-4 encoder block [18], [24]. D. Synthesizer There are two independent signal channels in this chip, and two separate PLLs provide the wideband quadrature LO signals for each channel. The complete integer- PLL, including the dual-core VCO, the dual-mode prescaler, the phase frequency detector (PFD), the charge pump (CP), the programmable

Fig. 14. Measured phase noise frequency

.

divider, the automatic frequency calibration (AFC), and the buffers, as shown in Fig. 11, is fully integrated. The VCO oscillates at twice the LO frequency and its output is divided by 2 for the quadrature LO signals. A dual-core LC-VCO, as shown on the left-hand side of Fig. 11, is adopted in the PLL [6]. The quality factor of the LC tank is optimized by using top metal inductors and metal–insulator–metal (MIM) capacitors. The VCO gain is set to be around 60 MHz/V to ensure good phase-noise performance. A 4-bit digitally controlled capacitor bank is used to obtain a large VCO tuning range. The capacitor bank is controlled by the AFC using a binary search algorithm. The optimized factor of LC tank is 9.3.

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Fig. 15. Measured output spectrum of ABB with the tuning of IF, BW and gain. (a) GPS L1 mode. (b) BD-2 B1 or Galileo E1 mode. (c) BD-2 B2 and Galileo E5 mode.

Fig. 19. Measured IMRR at BW of 20 MHz.

Fig. 16. Measured IF output spectrum of the GNSS RF receiver with 100-dBm RF input signal in BD-2 B1 mode.

Fig. 17. Measured input

. (a) 1.2-GHz band. (b) 1.57-GHz band.

Fig. 20. Input-referred 1-dB compression point at minimum gain setting.

Fig. 18. Measured transient response of the digital AGC loop.

The proposed CP, which employs two Opamps to solve problems of current mismatch and charge sharing, is shown in Fig. 12. Opamp 1 working as a voltage follower is applied to settle the charge sharing problem [25]. The voltages on parasitic

capacitors at nodes A and B are clamped so no charge transfer would occur. To remove current mismatches, the pMOS current sources are biased by Opamp 2 using the self-bias technique to force them to copy the nMOS sink currents precisely [26]. For power saving, flexibility, and low-cost considerations, a third individual PLL frequency synthesizer based on a ring oscillator is implemented to generate a 62-MHz clock signal for the ADC and AGC loop. V. EXPERIMENTAL RESULTS AND DISCUSSIONS The reconfigurable dual-channel multiband GNSS RF receiver is fabricated in a 0.18- m CMOS process and packaged in a standard 48-pin quad-flat no-leads (QFN) package. The

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TABLE II PERFORMANCE COMPARISON WITH STATES-OF-THE-ART

chip microphotograph is shown in Fig. 13. The active die area for a single channel of the receiver is 2.4 mm , while the whole chip, including two independent signal channels, the test circuits, electrostatic discharge (ESD) circuitry, and the I/O pads, occupies a die area of 2.4 3 mm . The measured phase noise at 1-MHz frequency offset is about 122 dBc/Hz for 1.2-GHz LO and 124 dBc/Hz for 1.57-GHz LO. The measured frequency tuning range of the VCO is from 2.1 to 3.7 GHz. Fig. 14 shows the measured phase noise for the 1.2-GHz band (up) and 1.57-GHz band (down). The measured frequency response of the ABB for various modes (i.e., various IF frequencies, BW, and gain settings) is shown in Fig. 15. The measurements demonstrate the reconfigurable RF receiver’s capability of processing all of the GNSS signals with BW of 2, 4, or 20 MHz. Fig. 16 shows the IF output spectrum of the whole receiver at the moderate gain setting with a 100-dBm RF input signal when reconfiguring MHz and MHz for BD-2 B1 band. As shown in Fig. 16, the measured output CNR is about 25.08 dB, the NF of the GNSS could be obtained by the following equation: dBm dB dB

dBm/Hz kHz

dB (4)

is the measured insertion loss that resulted from where the the input SMA cable and connectors. The measured NF of the entire receiver is 2.5 dB at 1.2 GHz or 2.7 dB at 1.57 GHz. The measured maximum voltage gain is 110 dB with a dynamic range of 73 dB. The measured input , as shown in Fig. 17, is about 12 and 11 dB at 1.2 and 1.57 GHz, respectively. The transient response of the digital AGC loop is presented in Fig. 18. As

Fig. 21. Test bench of the GNSS RF receiver.

shown, the AGC can maintain constant output power (i.e., input power to the ADC) for optimized ADC performance when the input power to the AGC changes with either a small or large step. The measured IMRR is 28 dB for the 20-MHz BW signal, as plotted in Fig. 19. It is slightly less than the simulation results due to I/Q mismatch in the signal chain and LO path. The inputreferred 1-dB compression point (1-dB CP) is 42 dBm 39 dBm at the 1.2- and 1.57-GHz band with minimum gain setting, as shown in Fig. 20. The performance comparison with the states-of-the-art is summarized in Table II. As can be seen, most performance of our proposed dual-channel multiband GNSS RF receiver is better than or as good as the state-of-the-art and it occupies the smallest active silicon area. The worse power consumption is partially because the CF is designed to provide 20-MHz BW,

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TABLE III SUMMARY OF RESULTS OF THE GNSS RECEIVER WITH THE PROPOSED CHIP

Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China, especially T. Yan, Y. Lu, and C. Fan, for their technical and spiritual support. REFERENCES

which needs larger gain BW of the Opamps, and thus, more power consumption. In addition, the 4-bit flash ADC and the wideband PLL and VCO also need more power consumption than the 2-bit ADC and the narrowband frequency synthesizer used in previous studies. As shown in Fig. 21, a test-bench, which is composed of an active antenna, RF PCB, and GPS/compass test platform has been constructed to verify the systemic performances of the proposed RF chip. Due to the restricted platform, only the signals of GPS-L1, Compass-B1, and Compass-B2 can be processed in this test bench. The test results, as presented in Table III, indicated that the proposed RF chip can cooperate with the digital baseband to process GNSS signals very well. VI. CONCLUSIONS A dual-channel multiband RF receiver has been implemented for the next-generation GNSS in a 0.18- m CMOS process. The RF receiver exhibits two independent signal channels for simultaneous reception of tri-mode all-band GNSS signals due to the reconfigurable RF front-end, complex BPF, and wideband frequency synthesizers. While drawing 25-mA current for a single channel from a 1.8-V supply, this RF receiver achieves a total NF of 2.5/2.7 dB at 1.2/1.57 GHz, an image rejection of 28 dB, a maximum voltage gain of 110 dB, a gain dynamic range of 73 dB, and an input-referred 1-dB CP of 58 dBm. The active die area for single channel of the receiver is 2.4 mm . The proposed dual-channel multiband RF receiver can accommodate simultaneous reception of any two types of GNSS signals listed in Table I, which is desirable for better GNSS navigation accuracy and availability, while achieving better performance (die area, NF, gain dynamic range) than other state-ofthe-art GNSS receivers. Moreover, some design efforts have been made to improve the receiver’s robustness and position accuracy in the presence of interferences by utilizing the nonuniform 4-bit ADC and digital AGC loop to provide antijamming capability and optimized performance for the receiver. ACKNOWLEDGMENT The authors would like to thank X. Duo and L. Zhao, both with Semiconductor Manufacturing International Corporation (SMIC), Shanghai, China, for helping with the measurements. Special thanks to all members of the Center for Analog/RF

[1] B. W. Parkinson and J. J. Spilker, Jr., “Global positioning system: Theory and applications (progress in astronautics and aeronautics),” Amer. Inst. Astronaut. Aeronaut., vol. 1, pp. 57–93, 1996. [2] M. S. Braasch and A. J. van Dierendonck, “GPS receiver architectures and measurements,” Proc. IEEE, vol. 87, no. 1, pp. 48–64, Jan. 1999. [3] D. Margaria, F. Dovis, and P. Mulassano, “An innovative data demodulation technique for Galileo AltBOC receivers,” IEEE J. Global Position. Syst., vol. 6, no. 1, pp. 89–96, Jan. 2007. [4] G. Gao, A. Chen, S. Lo, D. Lorenzo, T. Walter, and P. Enge, “Compass-M1 broadcast codes in E2, E5b, and E6 frequency bands,” IEEE J. Select. Topics Signal Process., vol. 3, no. 4, pp. 599–612, Aug. 2009. [5] J. Ko, J. Kim, S. Cho, and K. Lee, “A 19-mW 2.6-mm L1/L2 dualband CMOS GPS receiver,” IEEE J. Solid-State Circuits, vol. 40, no. 7, pp. 1414–1424, Jul. 2005. [6] Y. Moon, S. Cha, G. Kim, K. Park, S. Ko, H. Park, J. Park, and J Lee, “A 26 mW dual-mode RF receiver for GPS/Galileo with L1/L1F and L5/E5a bands,” in IEEE Int. SoC Design Conf., 2008, pp. 421–424. [7] H. Moon, S. Lee, S. Heo, H. Yu, J. Yu, J. Chang, S. Choi, and B. Park, “A 23 mW fully integrated GPS receiver with robust interferer rejection in 65 nm CMOS,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., 2010, pp. 68–79. [8] J. M. Wei et al., “A 110 nm RFCMOS GPS SoC with 34 mW 165 dBm tracking sensitivity,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., 2009, pp. 254–255. [9] D. Sahu, A. Das, Y. Darwhekar, S. Ganesan, G. Rajendran, R. Kumar, B. G. Chandrashekar, A. Ghosh, A. Gaurav, T. Krishnaswamy, A. Goyal, S. Bhagavatheeswaran, K. M. Low, N. Yanduru, S. Dhamankar, and S. Venkatraman, “A 90 nm CMOS single chip GPS receiver with 5 dBm out-of-band IIP3 2 dB NF,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., 2005, pp. 308–309. [10] G. Gramegna et al., “A 56-mW 23-mm single-chip 180-nm CMOS GPS receiver with 27.2-mW 4.1-mm radio,” IEEE J. Solid-State Circuits, vol. 41, no. 3, pp. 540–551, Mar. 2006. [11] T. Kadoyama, N. Suzuki, N. Sasho, H. Iizuka, I. Nagase, H. Usukubo, and M. Katakura, “A complete single-chip GPS receiver with 1.6-V 24-mW radio in 0.18- m CMOS,” IEEE J. Solid-State Circuits, vol. 39, no. 4, pp. 562–568, Apr. 2004. [12] K. W. Cheng, K. Natarajan, and D. J. Allstot, “A current reuse quadrature GPS receiver in 0.13 m CMOS,” IEEE J. Solid-State Circuits, vol. 45, no. 3, pp. 510–523, Mar. 2010. [13] V. D. Torre, M. Conta, R. Chokkalingam, G. Cusmai, P. Rossi, and F. Svelto, “A 20 mW 3.24 mm2 fully integrated GPS radio for location based services,” IEEE J. Solid-State Circuits, vol. 42, no. 3, pp. 602–612, Jul. 2007. [14] G. J. Jun et al., “An L1-band dual-mode RF receiver for GPS and Galileo in 0.18- m CMOS,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 4, pp. 919–927, Apr. 2009. [15] D. Chen, W. Pan, P. Jiang, J. Jin, J. Wu, J. Tan, C. Lu, and J. Zhou, “A reconfigurable dual-channel tri-mode all-band RF receiver for next generation GNSS,” in IEEE Asian Solid-State Circuits Conf., Beijing, China, Nov. 2010, pp. 141–144. [16] J. Li et al., “Low-power high-linearity area-efficient multi-mode GNSS RF receiver in 40 nm CMOS,” in IEEE Int. Circuits Syst. Symp., Seoul, Korea, May 2012, pp. 1291–1294. [17] M. G. Amin and W. Sun, “A novel interference suppression scheme for global navigation satellite systems using antenna array,” IEEE J. Select. Areas Commun., vol. 23, no. 5, pp. 999–1012, May 2005. [18] M. Cloutier et al., “A 4-dB NF GPS receiver front-end with AGC and 2-b A/D,” in IEEE Custom Integr. Circuits Conf., 1999, pp. 205–208. [19] F. Amoroso, “Adaptive A/D converter to surpress CW interference in DSPN spread-spectrum communications,” IEEE Trans. Commun., vol. COM-31, no. 10, pp. 1117–1123, Oct. 1983. [20] D. Chen, T. Yan, J. Jin, C. Mao, Y. Lu, W. Pan, and J. Zhou, “A trimode compass/GPS/Galileo RF receiver with all-digital automatic gain control loop,” Analog Integr. Circuits Signal Process., vol. 58, no. 3, pp. 69–77, 2012. [21] F. Amoroso and J. L. Bracker, “Performance of the adaptive A/D converter in combined CW and gaussian interference,” IEEE Trans. Commun., vol. COM-34, no. 3, pp. 209–213, Mar. 1986.

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[22] J. Wu, P. Jiang, D. Chen, and J. Zhou, “A dual-band GNSS RF front-end with a pseudo-differential LNA,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 58, pp. 134–138, Mar. 2011. [23] J. Tan, L. Wang, D. Chen, and J. Zhou, “A frequency auto-tuning complex filter with 48 dB gain tuning and 65 dB DC-offset rejection,” in IEEE Int. Solid-State Integr. Circuit Technol. Conf., Shanghai, China, Nov. 2010, pp. 451–453. [24] K. Uyttenhove and M. S. J. Steyaert, “A 1.8-V 6-bit 1.3 GHz flash ADC in 0.25 m CMOS,” IEEE J. Solid-State Circuits, vol. 38, no. 7, pp. 1115–1122, Jul. 2003. [25] W. Rhee, “Design of high-performance CMOS charge pumps in phaselocked loops,” in Proc. IEEE Int. Circuits Syst. Symp., 1999, vol. 2, pp. 545–548. [26] L. Jae-Shin et al., “Charge pump with perfect current matching characteristics in phase-locked loops,” Electron. Lett., vol. 36, pp. 1907–1908, 2000. Dongpo Chen received the B.S. and Ph.D. degrees from Zhejiang University, Zhejiang, China, in 2003 and 2008, respectively. He is currently an Assistant Professor with the Center for Analog/RF Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China. His current research interests are related to RF and analog integrated circuits for wireless communication systems.

Wenjie Pan received the B.S and M.S. degrees from Zhejiang University, Zhejiang, China, in 2006 and 2008, respectively, and is currently working toward the Ph.D. degree at Shanghai Jiao Tong University. He is currenly with the Center for Analog/RF Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiao Tong University. His main research interest is high-performance low-power ADC design.

Peichen Jiang received the B.S. degree from the Nanjing University of Posts and Telecommunications, Jiangsu, China, in 2005, the M.S. degree from Shanghai Jiao Tong University, Shanghai, China, in 2008, and is currently working toward the Ph.D. degree at Shanghai Jiao Tong University, Shanghai, China. He is currently with the Center for Analog/RF Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiao Tong University. His main research interests include RF and analog integrated circuits for wireless communication systems using CMOS technology.

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Jing Jin was born in Nantong, Jiangsu, China, in 1983. She received the B.S. degree from the Nanjing University of Science and Technology, Nanjing, China, in 2005, the M.S. degree from Shanghai Jiao Tong University, Shanghai, China, in 2008, and is currently working toward the Ph.D. degree at Shanghai Jiao Tong University, Shanghai, China. She is currently with the Center for Analog/RF Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiao Tong University. Her research interest is frequency synthesizers for wireless communication systems.

Tingting Mo (S’04–M’07) received the B.S. degree in electronic engineering from Shanghai Jiao Tong University, Shanghai, China, in 2001, and the Ph.D. degrees in electronic engineering from the City University of Hong Kong, Hong Kong in 2006. She is currently an Assistant Professor with the Center for Analog/RF Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiao Tong University. Her research interests include RF and microwave/millimeter-wave integrated circuits, especially power amplifiers.

Jianjun Zhou (M’98–SM’05) received the B.S. degree in electronic engineering from Shanghai Jiao Tong University, Shanghai, China, in 1991, and the Ph.D. degree in electrical and computer engineering from Oregon State University, Corvallis, in 1998. From 1998 to 2006, he was with Qualcomm, San Diego, CA, where he was involved with several chips for wireless communications. He lead the efforts on the development of both of the world’s first CMOS TX integrated circuits and the world’s first CMOS transceiver integrated circuits for CDMA, each with a shipment exceeding 100 million units. He was also with Motorola, Fort Lauderdale, FL, where he was engaged in the development of BiCMOS analog/RF integrated ciruitss. In 2007, he became a Professor with the School of Microelectronics, Shanghai Jiao Tong University, and the Director of the Center for Analog/RF Integrated Circuits (CARFIC). His current research interests include analog/RF integrated circuit design for wireless communications and bioelectronics. Dr. Zhou was the recipient of 1998 International Solid-State Circuits Conference Beatrice Winner Award.

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A 1.2-V 5.2-mW 20–30-GHz Wideband Receiver Front-End in 0.18- m CMOS Chun-Hsing Li, Student Member, IEEE, Chien-Nan Kuo, Member, IEEE, and Ming-Ching Kuo, Member, IEEE

Abstract—This paper presents a low-power wideband receiver front-end design using a resonator coupling technique. Inductively coupled resonators, composed of an on-chip transformer and parasitic capacitances from a low-noise amplifier, a mixer, and the transformer itself, not only provide wideband signal transfer, but also realize wideband high-to-low impedance transformation. The coupled resonators also function as a wideband balun to give single-to-differential conversion. Analytic expressions for the coupled resonators with asymmetric loads are presented for design guidelines. The proposed receiver front-end only needs a few passive components so that gain degradation caused by the passive loss is minimized. Hence, power consumption and chip area can be greatly reduced. The chip is implemented in 0.18- m CMOS technology. The experimental result shows that the 3-dB bandwidth can span from 20 to 30 GHz with a peak conversion gain of 18.7 dB. The measured input return loss and third-order intercept point are better than 16.7 dB and 7.6 dBm, respectively, over the bandwidth. The minimum noise figure is 7.1 dB. The power consumption is only 5.2 mW from a 1.2-V supply. The chip area is only 0.18 mm . Index Terms—CMOS, common-gate (CG) low-noise amplifier (LNA), inductively coupled resonators (ICRs), low power, low voltage, mixer, resonator coupling network (RCN), wideband.

I. INTRODUCTION

T

HE applications within the - and -band have ignited intensive research activities. There exist systems of 22–29-GHz short-range radar, 24-GHz industrial–scientific–medical (ISM) band, and local multipoint distribution services (LMDS) [1]–[4]. A wideband receiver is thus preferable to a narrowband one for versatile functions. However, designing a receiver to cover such a wide and high frequency band is challenging because of lossy passive components and low transistor speed. For example, 0.18- m CMOS technology offers the unity current gain frequency only around 55 GHz. More advanced CMOS technology can be adopted to provide Manuscript received April 12, 2012; revised August 19, 2012; accepted August 22, 2012. Date of publication September 17, 2012; date of current version October 29, 2012. This work was supported by the National Science Council, Taiwan, under Grant NSC 100-2220-E-009-013 and Grant NSC 100-2220-E009-056, by the Ministry of Education in Taiwan under the Aiming for the Top University (ATU) Program, and by MediaTek Inc. under a fellowship. C.-H. Li and C.-N. Kuo are with the Department of Electronics Engineering and the Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan (e-mail: [email protected]; [email protected]). M.-C. Kuo is with the Information and Communications Research Laboratories (ICL), Division for Biomedical and Industrial Integrated Circuit Technology, Industrial Technology Research Institute (ITRI), Hsinchu 310, Taiwan (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2216285

higher speed transistors, but with higher cost. Moreover, the supply voltage shrinks with the technology, making the CMOS design more challenging. Hence, appropriate circuit topologies are required to provide wideband operation using as few passive components as possible, while consuming low power in low voltage. -band apMany prior studies were proposed for - and plications. Only a few belong to true wideband operation in silicon-based technologies of CMOS and BiCMOS. A 22–29-GHz ultra-wideband (UWB) pulse-radar receiver in 0.18- m CMOS was proposed using a multistage low-noise amplifier (LNA) with the neutralization technique [1]. However, the proposed circuit requires many inductors, resulting in large area. A receiver front-end using a two-stage LNA and microstrip lines is shown to work from 21 to 29 GHz [5]. Nevertheless, the front-end is bulky because it uses area-consuming transmission lines for impedance matching. A dual-band 24/31-GHz receiver is presented by combining a wideband two-stage LNA and a wideband mixer in a 0.18- m BiCMOS process [6]–[8]. The reported circuit adopts a single-balanced mixer. Hence, LO leakages might desensitize the following stages. A wideband LNA was reported using resistive feedback to work well in the -band [9]. It still requires a wideband mixer and a wideband balun to realize a wideband receiver. The architectures of the aforementioned circuits demand mulissue. Many inductors or tistage amplifiers to tackle the low transmission lines are necessary to sustain a wideband response. However, utilizing a large number of passive components not only introduces high signal loss, but also occupies large chip area. Power consumption is inevitably increased to compensate the loss for enough gain. Consequently, proper circuit topologies should be developed to give wideband operation while dissipating low power and featuring a small form factor. Using the technique of resonator coupling is a promising alternative for wideband operation. Recently, the resonator coupling technique is widely exploited to increase the transmission distance in the wireless power transfer application [10]–[13]. It is also applied to circuits for wireless communication systems, such as a narrowband receiver front-end [14], a wideband LNA design [7], an output load of the mixer [15], a low-power narrowband down-conversion mixer [16], a wideband multimode voltage-controlled oscillator (VCO) [17], and a low noise quadrature VCO [18]. Circuit design, however, is usually assumed to be under a symmetric load condition, which is not necessarily true in many realistic circuit implementations. Furthermore, few physical insights on wideband operations are given. In this paper, a compact 20–30-GHz receiver front-end is designed by using a resonator coupling network (RCN) placed between the LNA and the mixer to realize inter-stage matching. It

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only requires two coupled resonators to support wideband operation. The coupled resonators form a high-order filter to perform functions of a wideband load and wideband impedance transformation simultaneously. Moreover, they act as a wideband balun without paying additional power in realizing single-to-differential conversion. All of the design effort enables the receiver to be realized with a small form factor and low power consumption. The RCN with an asymmetric load condition is analyzed in detail to provide design guidelines. Analytic formulas for the critical coupling condition, passive gain, peak gain frequency separation (FS), and Ripple are presented. In contrast to the conventional coupled-resonator filter design that is commonly applied for narrowband operation [19], the proposed methodology can be adopted for wideband design with a simple and insightful design process. This paper is organized as follows. Section II details the theory of the inductively coupled resonators (ICRs), including the proposed design flow. In Section III, the consideration of the receiver architecture and the design of each building block are presented. The experimental result is shown in Section IV. Finally, Section V concludes this study.

Fig. 1. (a) RCN. The network is coupled either inductively or capacitively. (b) Typical frequency response of the RCN. Gain can be current, voltage, or power gain. is the radian frequency.

II. THEORY OF ICRs An RCN is employed to transfer a signal, in current, voltage, or power domain, from one resonator to the other, as indicated in Fig. 1(a), in which and represent the source and load resistances, respectively. The coupling is conducted either by an inductor or a capacitor . The ICR is especially attractive since it can be realized by an on-chip transformer. This not only leads to small chip area, but also provides single-to-differential conversion without dissipating any power. The RCN is widely adopted to increase the frequency selectivity in bandpass filter design [19]. It can also provide passive gain by impedance transformation, which is particularly attractive to low-power applications [14]. The typical frequency response of the ICR exhibits resonance frequencies of two oscillatory modes at and , as illustrated in Fig. 1(b). If the critical coupling condition is met, the gain levels at and are maximum and equal. This implies that the impedance is matched concurrently at and for both the input and output ports. The peak-to-peak variation, i.e., Ripple, is defined as Ripple

(1)

where is the maximum gain and is the minimum gain at the frequency of . If Ripple is less than 3 dB, the ICR response can be considered as wideband. In this study, the design goal is therefore to make the critical coupling condition occur at two widely separated and simultaneously, and keep Ripple within 3 dB. Although only the ICR case is considered as follows, the same approach can also apply to the capacitively coupled resonators. A. ICR Without Loading Effect Fig. 2(a) shows the ICR circuit of double resonance. One resonator, and , is coupled to the other, and , magnetically. Without loss of generality, the transformer is assumed

Fig. 2. (a) Network of ICRs. (b) Equivalent circuit of the coupled resonators as the transformer is replaced by its -model.

lossless. The coupling coefficient is defined by the mutual inductance between the two coils as [14] (2) Let the resonance frequencies of the uncoupled resonators be defined, respectively, as and with the frequency ratio of [14]. Taking the mutual coupling effect into account, the natural resonance frequencies of the coupled network change. They can be derived in terms of , , and , as and [14]. The governing equation of the resonance frequencies is established as

(3) Consider the coupled resonators in a circuit to analyze signal transfer, as shown in Fig. 2(b). The transformer is replaced with

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its -model equivalent circuit, in which , , and is related to and [20]. The critical coupling condition occurs provided that the ICR input is impedance matched to the source, or , at and [14]. It leads to

where

and

are defined as

(11) (4) where

is the coil turn ratio of the transformer, defined as (5)

From (4), another governing equation of tained as

and

is ob-

Essentially corresponds to the quality factor of the uncoupled loaded resonators. Let the imaginary part of the input admittance be zero. The solution gives the modified resonance frequencies of the ICR 1 with the loading effect. Two parallel and one series resonance frequencies can therefore be found. They are (12)

(6) It concludes from (3), (4), and (6) that the critical coupling and if condition of the ICR can be acquired at both

(13) When

is high, (12) can be simplified as (14)

(7) (8) Namely, those uncoupled resonators need to have the same , and must be equal to the resonance frequencies, i.e., impedance transformation ratio. B. ICR With Loading Effect Resonance occurs at the frequencies that the imaginary part of the input admittance equals to zero. The resistor load in Fig. 2(b) and actually affects the resonance frequencies such that need to be modified. The effect becomes severe especially when the loaded quality factor is low for wideband operation. Note that (7) and (8) still hold for achieving critical coupling at resonance frequencies, even with the loading effect. The two-port admittance matrix of the ICR, , is used to derive the modified resonance frequencies in Fig. 2(b). The optimal transfer occurs when . This input admittance can be derived from the admittance matrix by

(9) Given the critical coupling condition by (7) and (8), the matrix elements of can be easily shown as

and when , As expected, (14) is the same as indicating that the loading effect can be neglected. At and , the input admittance becomes a real value, given by (15) The impedance matching condition is achieved. The ICR can couple the signal with the highest gain. This confirms the critical coupling condition in (7) and (8), even with the loading effect. In essence, this is an impedance transformation process to meet the optimal loading condition. On the other hand, impedance transformation is different at . The input impedance is given as (16) which fails to meet the critical coupling condition. That is, enand . ergy coupling is less efficient than that at Note that coincides with at as . Although it appears that the critical coupling condition is achieved at as , the coupling system exhibits a narrowband response, undesired for the wideband operation. It is also observed that is very close to the minimum gain frequency as is high and is small. C. Signal Gain The passive coupled system in Fig. 2(b) can give signal current or voltage gain, utilizing impedance transformation. This passive gain by the impedance transformation is very useful for the low power application since it does not consume any power.

(10)

1Strictly speaking, is not considered as a resonance frequency of the coupling system since the highest gain is not gained at it in most case, except as as indicated in (16).

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Consider all of the available power from the source is delivered to the load, i.e., (17) If

, it yields to the maximum current gain given by (18)

If

, it achieves the maximum voltage gain given by (19)

The maximum gain is obtained under the impedance matching condition. An ideal transformer gives the maximum gain in the broadband sense. If the turn ratio is set as for the impedance transformation, the maximum current gain can be obtained over infinite bandwidth. In the case of an RCN, the maximum gain occurs only at the resonance frequencies calculated by (12). Gain decreases to a minimum between the two peak gain frequencies, resulting in gain variation. It is critical to make wide separation between the peak gain frequencies, and keep Ripple less than 3 dB. The closed form of the ICR current gain can be derived as (20) After substituting (10) into (20), the current gain can be shown as

(21) where is the frequency normalized to , i.e., . The voltage gain can also be derived by transforming the Norton current source into the Thevenin voltage. Note that the derived gain formulas are exactly matched to the simulation results. It is quite cumbersome to formulate the closed form of the minimum passive gain. Instead, the results are observed numerically. The normalized current gain using (18) and (21) is plotted in Fig. 3, where and are varied. It is clear that the minimum gain occurs at the frequency of , i.e., not equal to . By observing the gain response, is approximately at , the arithmetic average of and . From (18) and (21), Ripple can be acquired as

Ripple

where of FS as

Fig. 3. Normalized passive gain versus at 8.

. (a)

is fixed at 0.5. (b)

is fixed

Note that the actual 3-dB bandwidth is wider than (23) since and correspond to the highest gain that the RCN can provide. It is evident that the resonance frequencies are affected by , the loading effect, and , the coupling. Higher FS can be obtained if the coupling is stronger, but larger Ripple is also introduced. On the other hand, smaller and result in smaller Ripple at the price of narrower FS. Obviously, there exists a tradeoff between FS and Ripple to meet a desired wideband response with an acceptable Ripple level. Fig. 4 shows the comparison between simulation and calculation results of FS and Ripple as and are varied. The calculation results match well with simulation ones. Contour plots can help designers to choose an appropriate combination of and to trade off FS and Ripple. Two plots in Fig. 5 are superposed over the range of and from 0 to 15 and 0 to 1, respectively. The No Solution region represents that the ICR no longer resonates at and , but only at . Actually, it is bounded by , corresponding to zero FS. The contour line of 3-dB Ripple is highlighted via a blue line (in the online version) with circular symbols. The associated component values are summarized in Table I. These parameters are normalized to and so that they can be easily scaled to the frequency band of interest. D. Design Flow of the ICR

(22) . For convenience, we define a parameter

(23)

With the derived transfer functions, FS, and Ripple, the ICR for the wideband impedance transformation can be designed systematically. In the first place, the coil turn ratio is selected according to the ratio. Given the targeted FS and the acceptable Ripple, the values of and can be determined. is obtained since it locates at the center of the interested

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TABLE I COMPONENT VALUES FOR 3-dB RIPPLE

Fig. 4. Comparison between simulation and calculation results of FS and Ripple. (a) is fixed at 0.5. (b) is fixed at 8.

Fig. 6. Design flow of the ICR for wideband applications.

III. WIDEBAND RECEIVER DESIGN

Fig. 5. Contour plots of FS and Ripple versus the coupling coefficient and the quality factor of .

band. is then found from . From (11), , , , and can be determined exactly. A transformer is designed to meet the component values. Additional capacitors can be added if the extracted parasitic capacitance does not meet the requirement. The design flow of the ICR is summarized in Fig. 6. The properties of compact chip area, wideband impedance transformation, and working as a balun make the ICR very suitable for on-chip circuit design. Hence, the ICR is incorporated into the proposed wideband receiver front-end to realize a compact, low power, and low-cost solution. Section III is going to present the details of the receiver design.

The receiver architecture under consideration is shown in Fig. 7 [14]. The direct-conversion architecture is adopted for the sake of a minimal number of components. It also eliminates the need of an image rejection filter. In this study, only the -path is implemented, including an LNA, a balun, and a double-balanced mixer. The -path can be easily incorporated by using the same design. The design needs to provide wideband responses of voltage-to-current conversion in the LNA stage, single-to-differential conversion in the balun, and current-to-voltage frequency conversion in the mixer. Hence, poles associated with the LNA output capacitance , the mixer input capacitance , and other parasitic ones, shall be considered carefully. Fig. 8 shows the proposed wideband receiver front-end. Low power operation is feasible since it only needs a few passive components and amplifier stages. The LNA adopts a commongate (CG) topology, which gives a wideband response not only in gain, but also in noise and linearity. It also directly works as the transconductor stage of the mixer, which is a great benefit in reducing power consumption [14]. The ICR fulfills the balun function and inter-stage impedance transformation. Actually the two coupled resonators absorb the parasitic capacitances from the LNA, transformer, and mixer into the design, which is favorable for bandwidth enhancement of alleviating the issue

LI et al.: 1.2-V 5.2-mW 20–30-GHz WIDEBAND RECEIVER FRONT-END

Fig. 7. Adopted direct-conversion architecture. This study includes the design of an LNA, a balun, and a mixer in the -path.

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Fig. 9. (a) Equivalent circuit for the input matching network. (b) Equivalent drain. circuit for the matching network at the

matching relies on the low quality factor of the input matching network. The input impedance can be derived as (24)

where

Fig. 8. Proposed wideband receiver front-end. The ICR functions as a balun is used as a dc and also provides wideband impedance transformation. blocking capacitor.

due to the mixer input pole and the LNA output pole. Finally, the double-balanced mixer provides the frequency down-conversion and eliminates LO leakages from desensitizing the following stages [14]. The Sections III-A–III-C will detail each block design. A. LNA Design The LNA is a critical block to provide a wideband response, not only in input matching but also in noise figure (NF) and linearity. It was proposed to apply a common-source (CS) structure with a high-order input matching network for wideband operation [21], [22]. However, the approach calls for a large number of inductors, requiring large chip area and increasing NF. In this study, the common-gate low-noise amplifier (CGLNA) is instead chosen, which is in need of only one inductor. The CG-LNA is also advantageous because it has better reverse isolation and stability [23]. The most significant feature is that it provides better noise performance for higher operating frequency since the gate-induced noise is insensitive to ( is the unity current gain frequency) while the CS-LNA is proportional to [24]. The input equivalent circuit of the CG-LNA is established to analyze the input matching, as shown Fig. 9(a), in which is the source resistance and and are the gate-to-source capacitance and the transconductance of , respectively. It requires equal to for impedance matching. tunes out only at the center of the frequency band. Wideband

and

are defined as

(25) representing the quality factor and the resonance frequency of the input matching network, respectively. To have bandwidth of 0.4 , i.e., 40%, needs to be smaller than 2.5. Note that the above derivation assumes infinite output resistance . If is finite, the loading at the drain will affect the input matching. can be adjusted to move back to the desired frequency. The parasitic capacitance at the drain node of introduces a nondominant pole and degrades the LNA bandwidth. For bandwidth enhancement, the inductor is added to form a -network together with the gate-to-drain capacitance of and the gate-to-source capacitance of , as shown in Fig. 9(b). The network is driven by the output short current with the impedance of twice of the output resistance , and loaded by the input resistance expressed as , where is the effective load seen by . The network generates the output current , equal to the LNA output current through the CG transistor. Smaller values present wider bandwidth of the current transfer, but with the price of larger gain ripple [25]. In this study, the network is intentionally designed to provide gain peaking around 28 GHz for the concern of higher ICR loss at in practice. Adding can also minimize the variation of the LNA noise within the interested band. The NF is dominated by in the low operating frequency. noise can be neglected because of high degeneration impedance at its source. However, the degeneration impedance decreases at the high operating frequency due to the parasitic pole at the drain. This causes noise contribution to rise rapidly along with the frequency. boosts

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Fig. 10. Frequency response of the NF and IIP3 as

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 11, NOVEMBER 2012

either is or is included.

Fig. 12. Proposed transformer. , , and are the width and spacing of the primary and secondary coils, respectively. OD is the outside dimension.

Fig. 11. Equivalent circuit of the ICR. Fig. 13. EM simulation results of the proposed transformer.

the LNA gain at and also helps suppress noise. Hence, the noise can be assumed to be mainly contributed by the transistor. Accordingly, the noise factor can be derived as (26) where , , and are process-dependent noise parameters [26]. is dominated by the second factor associated with the channel thermal noise. The only frequency-dependent term is the third one, which has a small weighting factor, implying less sensitivity of the NF to the frequency variation. Actually, noise matching only occurs within a narrow frequency range since no feedback technique is employed. However, can minimize the NF variation within the interested frequency band. Fig. 10 shows the post-layout simulation results of the NF frequency response with and without . The variation becomes smaller than 0.63 dB over the 20–30-GHz band after is added. For the linearity consideration, the CG-LNA has a superior input third-order intercept point (IIP3) as compared to the CS counterpart [27]. In general, the linearity is strongly affected by the LNA output loading [14]. That is, the IIP3 is insensitive to the frequency variation as long as the LNA faces a wideband load. In this study, the wideband load is achieved by the ICR to sustain wideband linearity performance. Fig. 10 shows the post-layout simulation results of the IIP3 with and without as the LNA is loaded with the ICR and the mixer. The IIP3 is degraded as is included. However, the IIP3 is still better than 0.6 dBm. It is worth trading off the linearity for the NF improvement.

Fig. 14. Post-layout simulation results of the NF and the IIP3 of the mixer.

Based on the above discussion, the bias and the transistor size can be designed accordingly. To make equal to , the transistor with higher and smaller size can be chosen or vice versa. A smaller transistor can increase the matching bandwidth, but at the price of higher power consumption and larger . On the other hand, the power consumption can be reduced by choosing a larger transistor, but at the cost of narrower bandwidth and higher noise. To make good tradeoff among the power, NF, and chip area, the bias and the transistor size are designed as 0.77 V and 60 m, respectively. of 0.23 nH is employed to resonate at around 25 GHz. The quality factor is calculated to be 1.4, corresponding to the bandwidth of 17.8 GHz. The LNA only draws 3.8 mA from a 1.2-V supply.

LI et al.: 1.2-V 5.2-mW 20–30-GHz WIDEBAND RECEIVER FRONT-END

Fig. 15. Gain response of each building block, including the LNA, the mixer (including the ICR), and the whole receiver front-end.

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Fig. 18. Measured RF bandwidth.

Fig. 16. Chip micrograph of the proposed receiver front-end.

Fig. 19. Measured IIP3.

Fig. 17. Measured input return loss.

Fig. 20. Measured NF.

B. Mixer Design

– of 0.49 V, near the transistor threshold voltage, are chosen. and are designed as 2 k and 0.3 pF, resulting in IF bandwidth around 300 MHz.

The mixer is implemented in the doubled-balanced configuration for better port-to-port isolation. This is especially critical for the direct conversion receiver. In this study, the LNA is directly utilized as the transconductor stage to reduce the power consumption. Since the mixer linearity is mainly bounded by the transconductor stage, the CG-LNA also benefits in mixer performance due to the degeneration resistance . – transistors act as the switching stage. pMOS transistors are chosen because of better flicker noise performance. Ideally, only one switching path is on at a time. Nonideal switching, however, degrades the noise and the gain performance. To reduce the time interval in which the switching transistors are on simultaneously, local oscillator (LO) power of 1 dBm and

C. ICR Design Once the design of the mixer and the LNA is completed, the ICR is employed to provide wideband signal transfer. Fig. 11 illustrates the equivalent-circuit model [14]. The output and the input impedances of the LNA and the mixer are modeled by , , , and , respectively. , , , and model the parasitic capacitances and the ohmic losses of the transformer, respectively. To ease the analysis, the transformer is assumed lossless. Since the transformer is symmetric to the virtual ground of the secondary coil, the ICR can

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TABLE II PERFORMANCE SUMMARY AND COMPARISON WITH PRIOR STUDIES

be analyzed by using the upper half circuit of Fig. 11. As compared to Fig. 2, the developed ICR theory can be applied directly here. Following the design flow in Fig. 6, the ICR can be designed systematically. In the first place, the coil turn ratio is selected as 1.5 due to the ratio. The targeted FS and the Ripple are around 30% and 3 dB, respectively. From Table I, of around 8 and of 0.3 are chosen. is located at 25 GHz, the center of the interested band. is then found to be 25.34 GHz. of 72 fF, of 163 fF, of 0.6 nH, and of 0.27 nH, are determined accordingly. The designed transformer is shown in Fig. 12, where the port is connected to the LNA, and the and ports are connected to the double-balanced mixer. The width of the primary and secondary coils, and , is chosen as 8 m. The spacing is designed as 6 m to let near the desired value of 0.3. The outside dimension OD is chosen as 130 m to fulfill the and requirement. The electromagnetic (EM) simulation results of the proposed transformer are illustrated in Fig. 13. The extracted transformer parameters are , , , , , and of 0.59 nH, 0.24 nH and 1.6, 0.28, 2.48, and 3 , respectively. Note that , , and are extracted at low-frequency range as the capacitive effect can be neglected. Since the parasitic capacitances from the LNA, mixer, and transformer are close to the and requirement, no additional capacitors are required. The post-layout simulation results of the NF and the IIP3 of the mixer combined with the ICR are shown in Fig. 14. The NF and IIP3 are varied from 11.8 to 15.8 dB and 2 to 4.5 dBm, respectively, within 20–30-GHz range. Fig. 15 illustrates the post-layout simulation results of the gain response of each building block, including the trans-conductance gain of the LNA, the trans-resistance gain of the mixer combined with the ICR, and the conversion gain of the receiver front-end. The unavoidable ohmic loss in the ICR causes around 3-dB lower gain at than that at . Fortunately, using for bandwidth enhancement in the LNA stage can compensate this effect. The proposed receiver shows 3-dB bandwidth from 20 to 33 GHz with a peak conversion gain of 20.8 dB. IV. EXPERIMENTAL RESULTS The wideband receiver front-end is implemented in 0.18- m CMOS technology with around 55 GHz. The chip micrograph is shown in Fig. 16. The die size is 1000 m 670 m, including the bonding pads. The active area is only 0.18 mm .

The measurement is conducted by a chip-on-board setup. DC bias is wire-bonded to a printed circuit board (PCB), while the RF and LO signals are applied using high-frequency probes. The differential IF signal is converted into a single-ended output by an off-chip balun. The front-end only consumes 5.2 mW under a 1.2-V supply. Fig. 17 shows the measured input return loss. The input return loss is better than 17.6 dB within the 20–30-GHz band. Fig. 18 illustrates the measured conversion gain as the LO power and IF frequency are 1 dBm and 3 MHz, respectively. The peak gain is 18.7 dB with 3-dB bandwidth covering from 20 to 30 GHz. The measured result shows a similar trend as that of the simulated one. The parasitic effect caused by bond-wires between the chip ground and PCB ground is also observed. It results in an uneven frequency response. There exits roughly 3-dB gain difference between the measured and the simulated results. The discrepancy might come from the nonaccurate transistor modeling that causes additional unexpected parasitic components. This might be improved by extracting the transistor parasitic capacitances by using EM simulation [28]. The IIP3 is measured by conducting a two-tone test with an FS of 0.1 MHz. Fig. 19 shows the measured IIP3. It is better than 7.6 dBm within the 20–30-GHz band. 1-dB compression point is also measured. It varied from 15.1 to 17.9 dBm, within the 20–30-GHz frequency range. Fig. 20 illustrates the measured NF as the IF frequency is 10 MHz. The minimum NF is 7.1 dB. The rise of the NF at higher frequency band is caused by the gain degradation. Table II summaries the chip performance and makes a comparison with prior studies. It is clear that the proposed receiver front-end shows the lowest power consumption, lowest supply voltage, and occupies the smallest chip area, while keeping good circuit performance in the gain, input return loss, linearity, and bandwidth. V. CONCLUSION A compact low-power wideband receiver front-end using ICRs has been proposed and verified by experimental results. The wideband theory of the ICR with asymmetric loads has been given and guidelines have been provided to design the ICR systematically. Realized in 0.18- m CMOS technology, the receiver achieves 3-dB bandwidth of 20–30 GHz with a peak gain of 18.7 dB. The power consumption is only 5.2 mW from a 1.2-V supply. The occupied chip area is only 0.18 mm .

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The proposed technique can be easily applied to other bands, such as the 57–64-GHz band. ACKNOWLEDGMENT The authors would like to acknowledge the Chip Implementation Center (CIC), Hsinchu, Taiwan, for chip fabrication and measurement support and ANSYS, Taipei, Taiwan, for design support. REFERENCES [1] V. Jain, S. Sundararaman, and P. Heydari, “A 22–29-GHz UWB pulseradar receiver front-end in 0.18- m CMOS,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 8, pp. 1903–1914, Aug. 2009. [2] X. Guan and A. Hajimiri, “A 24-GHz CMOS front-end,” IEEE J. SolidState Circuits, vol. 39, no. 2, pp. 368–373, Feb. 2004. [3] A. Nordbotten, “LMDS systems and their application,” IEEE Commun. Mag., vol. 38, no. 6, pp. 150–154, Jun. 2000. [4] H.-Y. Lin, S. S. H. Hsu, C.-Y. Chan, J.-D. Jin, and Y.-S. Lin, “A wide locking-range frequency divider for LMDS applications,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 54, no. 9, pp. 750–754, Sep. 2007. [5] S.-L. Huang, Y.-S. Lin, and J.-H. Lee, “A low-power low-noise 21–29 GHz ultra-wideband receiver front-end in 0.18 m CMOS technology,” in Proc. IEEE Custom Integr. Circuits Conf., 2011, pp. 1–4. [6] M. El-Nozahi, A. Amer, E. Sanchez-Sinencio, and K. Entesari, “A millimeter-wave (24/31 GHz) dual-band switchable harmonic receiver in 0.18- m SiGe process,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 11, pp. 2717–2730, Nov. 2010. [7] M. El-Nozahi, E. Sanchez-Sinencio, and K. Entesari, “A millimeterwave (23–32 GHz) wideband BiCMOS low-noise amplifier,” IEEE J. Solid-State Circuits, vol. 45, no. 2, pp. 289–299, Feb. 2010. [8] M. El-Nozahi, E. Sanchez-Sinencio, and K. Entesari, “A 20–32-GHz wideband mixer with 12-GHz IF bandwidth in 0.18- m SiGe process,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 11, pp. 2731–2740, Nov. 2010. [9] H.-K. Chen, Y.-S. Lin, and S.-S. Lu, “Analysis and design of a 1.6–28-GHz compact wideband LNA in 90-nm CMOS using a -match input network,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 8, pp. 2092–2104, Aug. 2010. [10] A. Kurs et al., “Wireless power transfer via strongly coupled magnetic resonances,” Science, vol. 317, no. 5834, pp. 83–86, Jul. 2007. [11] S. Han and D. D. Wentzloff, “Wireless power transfer using resonant inductive coupling for 3-D integrated ICs,” in IEEE Int. Conf. 3-D Syst. Integration, 2010, pp. 1–5. [12] A. P. Sample, D. A. Meyer, and J. R. Smith, “Analysis, experimental results, and range adaptation of magnetically coupled resonators for wireless power transfer,” IEEE Trans. Ind. Electron., vol. 58, no. 2, pp. 544–554, Feb. 2011. [13] N. Shinohara, “Power without wires,” IEEE Microw. Mag., vol. 12, no. 7, pp. S64–S73, Dec. 2011. [14] C.-H. Li, Y.-L. Liu, and C.-N. Kuo, “A 0.6-V 0.33-mW 5.5-GHz receiver front-end using resonator coupling technique,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 6, pp. 1629–1638, Jun. 2011. [15] F. Vecchi et al., “A wideband receiver for multi-Gbit/s communications in 65 nm CMOS,” IEEE J. Solid-State Circuits, vol. 46, no. 3, pp. 551–561, Mar. 2011. [16] C. Hermann, M. Tiebout, and H. Klar, “A 0.6-V 1.6-mW transformer-based 2.5-GHz downconversion mixer with 5.4-dB gain and 2.8-dBm IIP3 in 0.13- m CMOS,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 2, pp. 488–495, Feb. 2005. [17] B. Catli and M. M. Hella, “A 1.94 to 2.55 GHz, 3.6 to 4.77 GHz tunable CMOS VCO based on double-tuned, double-driven coupled resonators,” IEEE J. Solid-State Circuits, vol. 44, no. 9, pp. 2463–2477, Sep. 2009. [18] U. Decanis, A. Ghilioni, E. Monaco, A. Mazzanti, and F. Svelto, “A low-noise quadrature VCO based on magnetically coupled resonators and a wideband frequency divider at millimeter waves,” IEEE J. SolidState Circuits, vol. 46, no. 12, pp. 2943–2955, Dec. 2011. [19] J.-S. Hong and M. J. Lancaster, Microstrip Filters for RF/Microwave Applications. New York: Wiley, 2001. [20] C. Alexander and M. Sadiku, Fundamentals of Electric Circuits, 2nd ed. New York: McGraw-Hill, 2004.

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[21] A. Bevilacqua and A. M. Niknejad, “An ultrawideband CMOS low noise amplifier for 3.1–10.6 GHz wireless receiver,” IEEE J. SolidState Circuits, vol. 39, no. 12, pp. 2259–2268, Dec. 2004. [22] A. Ismail and A. A. Abidi, “A 3–10 GHz low noise amplifier with wideband LC-ladder matching network,” IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2269–2277, Dec. 2004. [23] D. J. Allstot, X. Li, and S. Shekhar, “Design consideration for CMOS low noise amplifiers,” in Proc. IEEE RFIC Symp., 2004, pp. 97–100. [24] W. Zhuo et al., “A capacitor cross-coupled common-gate low noise amplifier,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 52, no. 12, pp. 875–879, Dec. 2005. [25] B. Analui and A. Hajimiri, “Bandwidth enhancement for transimpedance amplifiers,” IEEE J. Solid-State Circuits, vol. 39, no. 8, pp. 1263–1270, Aug. 2004. [26] T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits, 2nd ed. New York: Cambridge Univ. Press, 2004. [27] H. Zhang, X. Fan, and E. S. Sinencio, “A low-power, linearized, ultrawideband LNA design technique,” IEEE J. Solid-State Circuits, vol. 44, no. 2, pp. 320–330, Feb. 2009. [28] C. Liang and B. Razavi, “Systematic transistor and inductor modeling for millimeter-wave design,” IEEE J. Solid-State Circuits, vol. 44, no. 2, pp. 450–457, Feb. 2009. [29] I. Gresham, N. Kinayman, A. Jenkins, and R. Point, “A fully integrated 24 GHz SiGe receiver chip in low-cost QFN plastic package,” in Proc. IEEE RFIC Symp., 2006, pp. 329–332. [30] T. Yu and G. M. Rebeiz, “A 22–24 GHz 4-element CMOS phase array with on-chip coupling characterization,” IEEE J. Solid-State Circuits, vol. 43, no. 9, pp. 2134–2143, Sep. 2008. [31] A. Mazzanti, M. Sosio, M. Repossi, and F. Svelto, “A 24 GHz subharmonic receiver front-end with integrated multi-phase LO generation in 65 nm CMOS,” in IEEE Int. Solid-State Circuits Conf., 2008, pp. 216–608. [32] R. M. Kodkani and L. E. Larson, “A 24-GHz CMOS passive subharmonic mixer/downconverter for zero-IF applications,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 5, pp. 1247–1256, May 2008. [33] Y.-H. Chen, H.-H. Hsieh, and L.-H. Lu, “A 24-GHz receiver frontend with an LO signal generator in 0.18- m CMOS,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 5, pp. 1043–1051, May 2008. [34] V. Jain, F. Tzeng, L. Zhou, and P. Heydari, “A single-chip dual-band 22–29-GHz/77–81-GHz BiCMOS transceiver for automotive radars,” IEEE J. Solid-State Circuits, vol. 44, no. 12, pp. 3469–3485, Dec. 2009. Chun-Hsing Li (S’10) received the B.S. degree in electrophysics and M.S. degree in electronics engineering from National Chiao Tung University (NCTU), Hsinchu, Taiwan, in 2005 and 2007, respectively, and is currently working toward the Ph.D. degree at NCTU. After one year of military service as a Second Lieutenant with the Marine Corps, he was a Research Assistant with the RF System Integration Laboratory, NCTU, until June 2009. In Fall 2009, he joined the Department of Electrical Engineering, University of California at Los Angeles (UCLA). In Winter 2010, he was with the Department of Electrical and Computer Engineering, University of California at Santa Barbara. Since April 2010, he has been with NCTU. His current research is focused on RF and terahertz circuit design. Mr. Li was a corecipient of the Best Paper Award of the 13th IEEE International Conference on Electronics, Circuits, and Systems, Nice, France, 2006. He was also the recipient of the 2011 MediaTek Inc. Fellowship.

Chien-Nan Kuo (S’93–M’97) received the B.S. degree in electronic engineering from National Chiao Tung University, Hsinchu, Taiwan, in 1988, the M.S. degree in electrical engineering from National Taiwan University, Taipei, Taiwan, in 1990, and the Ph.D. degree in electrical engineering from the University of California at Los Angeles (UCLA), in 1997. In 1997, he joined ADC Telecommunications, San Diego, CA, as a Member of Technical Staff with the Mobile System Division, where he was involved in wireless base-station design. In 1999, he joined Broadband Innovations Inc. In 2001, he joined the Microelectronics Division, IBM. He is currently an

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Associate Professor with the Department of Electronics Engineering, National Chiao Tung University. His research interests include reconfigurable RF circuit and system integration design, low-power design for the application of wireless sensor networks, and development of circuit-package co-design in the system-in-package (SiP) technique. Dr. Kuo has been a Program Committee member of the IEEE Asian SolidState Circuits Conference since 2005 and of the IEEE Silicon Monolithic Integrated Circuits in RF Systems Conference since 2007. He was a recipient of the IEEE Graduate Fellowship Award in 1996. He was a corecipient of the 2006 Best Paper Award presented at the 13th IEEE International Conference on Electronics, Circuits, and Systems.

Ming-Ching Kuo (S’07–M’09) received the B.S. degree in electrical engineering and M.S. degree from the Institute of Electronics Engineering, National Tsing-Hua University, Hsinchu, Taiwan, in 1998 and 2000, respectively, and the Ph.D. degree in electronics engineering from National Chiao Tung University, Hsinchu, Taiwan, in 2010. In 2001, he joined the System-on-Chip (SoC) Technology Center (STC), Industrial Technology Research Institute (ITRI), Hsinchu, Taiwan, where he contributed to transceiver design for WiFi and Mobile TV applications. In 2011, he joined MediaTek Inc., Hsinchu, Taiwan, as a Technical Manager. He is currently a Manager with the Information and Communications Research Laboratories (ICL), ITRI. His research interests include RF circuit and system integration designs, analog front-end design for medical imaging applications, and development of single photon avalanche diode (SPAD)-based sensors.

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All-Digital RF

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Modulator

Morteza S. Alavi, Student Member, IEEE, Robert Bogdan Staszewski, Fellow, IEEE, Leo C. N. de Vreede, Senior Member, IEEE, Akshay Visweswaran, Student Member, IEEE, and John R. Long, Member, IEEE

Abstract—We present a new all-digital RF in-phase/quadrature ) modulator, in which the orthogonal summing of the and phase data signals is performed in separated interleaved time slots. By employing a 25% duty cycle for the and signals, the modulator can directly reconstruct the continuous-time RF output signal using four digital switch arrays with a power combiner. To verify the proposed concept and its related design procedure, a 65-nm CMOS prototype is implemented. This prototype achieves 12.6-dBm peak output power with 20% peak drain efficiency at 2 GHz. The corresponding error vector magnitude (EVM) for a quadrature phase-shift keying constellation is 3.95% without any predistortion, while providing 6-dBm output power in a 64 quadrature amplitude modulation constellation with a related EVM and drain efficiency of 2.36% and 10%, respectively. The proposed circuit can be used as a pre-driver or a final transmit stage. The firstever truly all-digital RF digital-to-analog converter prototype is thus experimentally demonstrated. (

Index Terms—Balun, class-E power amplifier, digital power amplifier (DPA), digital-to-RF-amplitude converter (DRAC), ) modulator, MOS switch, RF digin-phase/quadrature ( ital-to-analog converter (RF-DAC), transformer, transmitter.

I. INTRODUCTION

U

NTIL THE late 1990s, analog-intensive in-phase/quadrature ( ) (i.e., Cartesian) architectures, as shown in Fig. 1(a), have dominated commercial transmitter implementations [1]. Currently, that classical transmitter architecture is being gradually supplanted by analog and digitally intensive polar implementations, shown in Fig. 1(b)–(c) [2]. The development was motivated by the universal desire to improve power consumption, reconfigurability, noise and integrated circuit (IC) chip area. The recent digitally intensive polar transmitter implementations of Fig. 1(c) have found their way into commercial products. This analog-to-digital architectural transformation is driven by the ever-improving cost advantages and process capabilities of the CMOS technology and various successful implementations have been brought to light, e.g., [3]. The work of Chowdhury et al. [4] proposed a wideband polar modulator, which achieves high output power and high efficiency. In spite of these benefits, polar topologies exhibit some serious drawbacks. First, their phase and amplitude paths use

Manuscript received July 16, 2012; revised July 25, 2012; accepted July 26, 2012. Date of publication August 28, 2012; date of current version October 29, 2012. This work was supported by NXP Semiconductors and the Dutch Technology Foundation Valorisation under Grant STW-VG2. This paper is an expanded paper from the IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), Beijing, China, November 30, 2011 . The authors are with the Department of Microelectronics, Delft University of Technology, 2628CD Delft, The Netherlands. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2211612

Fig. 1. Developments in the RF transmit chain architectures. (a) Traditional approach. (b) Analog-intensive polar RF transmitter. analog-intensive (c) Digitally intensive polar transmitter.

heterogeneous circuits whose delays need to be accurately aligned to avoid spectral distortion at the final recombining stage. Second, the required instantaneous bandwidth is significantly larger than in the approach. The latter aspect can be understood by examining the nonlinear operations that the amplitude and phase undergo during conversion from the representation

0018-9480/$31.00 © 2012 IEEE

(1)

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Fig. 2. Polar modulator bandwidth expansion. Fig. 3. Implementational block diagram of the all-digital

where is the complex-envelope signal. The resulting signal bandwidth expansion can be observed in Fig. 2. Note that besides this bandwidth expansion, there are severe bandwidth restrictions in practical implementations of highly efficient dc-to-dc converters. These facts limit the use of the polar architecture for truly wide-bandwidth operations as required in modern wireless standards such as the third-generation (3G) long-term evolution (LTE) of 3GPP, and fourth-generation (4G) cellular, as well as 802.11n wireless local area network (LAN) connectivity. To overcome these fundamental drawbacks, the fully digital architecture was recently introduced [5]–[7]. This novel architecture aims to maintain the obvious benefits of the digital approach, while avoiding the bandwidth limitations of the polar topology. In this paper, we address this new concept and explain its operation in full detail. Compared to [5]–[7], a rigorous analysis on how the design parameters are obtained and what level of efficiency can be expected will be thoroughly analyzed. In addition, future extensions are discussed on how spectral filtering can be incorporated by means of up-sampling of the original baseband signal. This paper is organized as follows. Section II discusses the concept of this fully digital modulator and describes the orthogonal summing and power-combining network. Section III presents simulation results related to the performance of the proposed modulator. The implementation is unveiled in Section IV, while the measurement results are presented in Section V. II. CONCEPT OF DIGITAL

MODULATOR

In the conventional analog approach of Fig. 1(a), the digital-to-analog converters (DACs) and mixer tend to be rather bulky and power hungry. The proposed approach in Fig. 3 uses a pair of digital-to-RF-amplitude converters (DRACs), which comprise implicit mixers and switch array banks that directly convert the digital signal input to its RF waveform representation. Hence, the circuit functions as an RF digital-to-analog converter (RF-DAC) with a complex-valued digital input and a real-valued output. Note that in such an approach, the traditional analog-circuit issues of calibration and timing misalignment do not present a problem anymore since the digital discrete-time operation is clock-cycle accurate with modern technology supporting sampling rates well in the gigahertz range. This yields ultrafast set-

modulator.

tling of the RF-DAC conversion circuit. Consequently, these digital circuits can ensure fine timing accuracy that is constant (to at least within a clock cycle delay) and not subject to process and environmental changes. In our specific implementation, the output clock of an on-chip local oscillator (LO), which operates at 4 the desired carrier frequency, is first down-converted by a divide-by-4 circuit. As such, it directly provides the required and clocks with their proper phase relationship and duty cycle. The differential in-phase and quadrature-phase clocks at a fundamental frequency of are then “multiplied” by the baseband signals through the implicit mixer and drive the transistor switch arrays. The outputs of the switch arrays are connected to a power-combining network that sums and converts the discrete-time pulses into a continuous-time RF output signal. As stated before, the proposed approach represents an RF-DAC, which as such, does not need the baseband DAC and explicit mixers of Fig. 1(a). Moreover, the bandwidth of the digital modulator is only limited by the passive output power combiner and the speed of the digital circuitry. The main technical challenge is the orthogonal summing of pulses in order to reconstruct the modulated RF signal. A. Orthogonal Summing From digital communications theory, in order to maintain high bandwidth efficiency, the baseband information is generally represented by two orthogonal streams, i.e., and signals, each modulated by the corresponding orthogonal carrier signal (i.e., basis function), and they are then summed. The resulting modulated signal is mathematically expressed as (2) For simplicity, only the positive part (denoted by the superscript) of the differential signal is now considered and only half-circuits are initially shown. The transmitted RF signal is a bandpass filtered version of filter

(3)

Equation (2) indicates that the summation of the and component carrier signals must be orthogonal to avoid non-

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Fig. 4. Conceptual diagram of

MODULATOR

signals. (a)

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%. (b)

%.

linear signal distortion and even transmitted bit errors. In [7], the orthogonality requirements are quantitatively evaluated. In this study, we restrict ourselves to the most important conclusion that is visualized in Fig. 4. Typically, digital carrier signals are represented by rectangular pulses with a % duty cycle that toggle between the ground and supply voltage levels, i.e., between low and high logic levels. Fig. 4(a) shows that summation of these signals yields an undesired third (i.e., contention) state. In contrast, when using a 25% duty cycle for the and clock signals, there is no overlap and their summation provides the correct two-state output signal. This solution could be thought of as a time-division duplexing (TDD), in which the linear addition of the time-shifted and paths is accomplished by allocating separate time slots to enter the information into the system. For the orthogonal summation of the and signals, Fig. 5 gives three possibilities. In the first approach [8], shown in Fig. 5(a), the summation of the and signals is performed by connecting the outputs of unit-weighted ideal current sources. The controlling signals of the current sources are and and are expressed as (4) (5) which indicates the implicit mixer operation. For maintaining the orthogonality of the signals, the and paths need to be ideal, such that one signal path output does not affect the operation of the other. This might require resorting to current source impedance boost techniques, such as cascoding. Unfortunately, stacking of MOS transistors in a cascode structure is difficult in modern low-voltage CMOS technologies and produces excessive amounts of leakage and noise. This can be explained by the fact that, in this approach, the MOS current sources will always work in saturation where of the CMOS device is high (much higher than during the switch-mode operation). Since the thermal noise of a MOS device is given by , where is the Boltzmann constant, is the temperature, is 2/3 in long-channel MOS devices, and is the device transconductance. A high will result in high noise. The second approach, shown in Fig. 5(b) might be realized as a pair of digitally controlled RF-modulated resistor structures, as originally proposed in [3], with each one providing a separate path for the and signals. This approach could benefit

Fig. 5. (a) Analog current source arrays. (b) Two separate digital switch arrays. (c) Digital switch arrays. (d) Switch array structure.

from a simpler circuit, the lack of stacked devices and elimination of the noisy current sources. Since the MOS switch operates either in the off or triode state, less noise is introduced. In addition, because of its switched-mode behavior, it has the potential to produce higher power efficiency [9]. Unfortunately, the final signal summation is difficult to accomplish in this method since the individual outputs are not currents, but voltages. Due to the fact that the individual voltages of the RF outputs of the matching networks need to be added, bulky microwave-type isolator/combiners would be needed. Otherwise, the RF voltage level of the path will affect the impedance of the path, and vice versa. Hence, the orthogonality of this structure will not be preserved. In the third approach, the total summation is done by the addition of the unit-weighted digital switches, as shown in Fig. 5(c), each contributing a finite conductance . The difference between this and the second approach is that previously the and paths were isolated and then are summed up in the voltage domain. In this new approach, the paths are electrically summed, just like in the first approach, but now this addition is in the electrical RF-modulated conductance domain. As a result, this approach selectively exploits the advantages of the first and second approaches, while avoiding their weaknesses. By cumulatively turning on the switches in a sequential

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manner [see Fig. 5(c)], the total conductance of will be increased as

and

paths

(6) (7) where and are the current number of MOS switches of and paths, respectively, in the ON-state. is the total number of MOS switches in each individual path. Moreover, the total resistance of each switch array ( or ) is (8) Equations (6) and (7) indicate that, by controlling the state of the digital switches, the conductance (current capability), and consequently, the output amplitude of the switch banks can be varied (9) (10) Considering (2), (6), (7), (9), and (10) together, the modulator can therefore cover the constellation points of a chosen digital communication standard, e.g., WCDMA. To cover all four quadrants of the constellation diagram, the modulator needs the complementary (or differential) phases of and clocks. According to Fig. 6(a), , , , and have a 25% duty cycle each and a relative phase difference in multiples of 90 . In fact, by swapping between or , the sign bits of the baseband data can be reversed. Each clock then mixes with the baseband data and finally drives the corresponding switch. The combination of the mixer and switch array thus forms the DRAC [see Fig. 6(b)], which is an individual or modulator within the composite RF-DAC. Simulation of a 64 quadrature amplitude modulation (64-QAM) constellation of the proposed approach is shown in Fig. 6(c) and is indicated as follows. First, using four banks of the DRAC, the amplitude and phase of the resultant signal are modulated. Second, by swapping between the differential clocks, the four quadrants of the constellation diagram can be covered. B. Power-Combining Network The transistor switch arrays produce rectangular current pulses with %. These current pulses should be transferred as RF power to the load. Since the digital modulator is pseudo-differential (see Fig. 6), a balun transformer is needed to drive the external 50- single-ended load. In order to deliver maximum power to the load with the highest efficiency, class-E matching described in [12] is chosen because it is well suited for pulse-shaped signals. According to Fig. 6, the digital modulator comprises four separate sections, and the total RF output power is the summation of the power delivered by each individual section. Therefore, the output load for each section can be viewed as .

Fig. 6. Illustration of: (a) an RF-DAC-based orthogonal digital lator, (b) a DRAC, and (c) a post-layout simulation result of 64-point stellation diagram.

moducon-

Fig. 7(a) shows the conventional class-E network [12] terminated with the balanced–unbalanced (balun)-transformed load. However, it is not a good choice for monolithic implementations. The use of two inductors and one transformer substantially increases the occupied area. The series tank filter of and allows only the fundamental current component to pass. Equivalently, the series filter could be replaced by a parallel tank filter, as shown in Fig. 7(b). Although is used as part of the fundamental-frequency selective circuitry, it also could be used as the dc current feed, thus eliminating . This modification is shown in Fig. 7(c). Moreover, a practical transformer consists of magnetizing and leakage inductors [13]. Now, , which is typically large, is luckily eliminated. In addition, this circuit contains only one transformer and does not need the additional inductors. Indeed, and are the magnetizing and leakage inductors of the transformer that is highlighted by the dotted grey box. moves into the secondary side of transformer and is now labeled as . Since the turns ratio of the transformer is , then . Note that the Fig. 7(c) schematic depicts only the in-phase (i.e., ) switch array and not the complete quadrature modulator. Therefore, for the complete quadrature configuration, another and should be added in parallel to the circuit, which is shown in Fig. 7(d). In contrast to the primary side of the transformer, the summation of and signals in the secondary side is done in series. Hence, . As mentioned before, the targeted power-combining network should be differential [see also Section II-A and Fig. 7(e)] and should also act as a balun. The signal summation on the secondary side of is done in the voltage domain, and as a result, . For designing the power-combining network, the values of , , , , , , , and should be derived. Based on [12], the values of and

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value of affects the area, transformer coupling factor , quality factor , and consequently, the output power. The of planar monolithic transformer is usually . Therefore, choosing , the value of (magnetizing inductance) is equal to the leakage inductance of each balun leg [13], which is (13) resonates with

which is (14)

and

and are the parallel and series combinations of , respectively [see Fig. 7(d)–(e)], (15) (16)

, which is shown in Fig. 7(e), is indeed the single-ended matching network impedance of the modulator (17) The output power of Fig. 7(e) expresses as (18) Using (A.35) as the results of the Appendix, (18) can be rewritten as (19) The output power of Fig. 7(c)

is (20)

Moreover, the output voltage is obtained from [12, eqs. 2.4 and 2.31] (21)

Fig. 7. Power-combining network. (a) First step. (b) Developing step. (c) Modsingle-ended. (e) differential digital modulator. ified version. (d)

where is also determined in (A.3). Combining (19)–(21) and the fact that , the output power is depend on , , , and and could be expressed as follows:

(transformer turns ratio) (22) As a result, the desired % %

can be calculated as

(11)

(23)

(12)

If is kept constant, and since most of the time the offchip load impedance is fixed and equal to 50 , (22) and (23) show that if increases then the output power also increases. Moreover, based on (23), if the targeted output power is considered to be in the range , then

where and represent two different functions, which depend on the duty cycle and are described in the Appendix. and resonate at and filter out higher order harmonics. The

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TABLE I MODULATOR FOR DESIGN PARAMETER OF DIGITAL GHz, , nm,

V,

. Note that the modulation orthogonality can be easily proven with the assumption of the linear time-invariant model of the switched PA [see Fig. 5(c)], which is valid when the total switch resistance in (8) is much larger than the matching network impedance in (17). Equivalently, the RF output power in that region of operation is much smaller than its saturation level. Adding an incremental switch conductance will linearly increase the RF output envelope, independent from the total instantaneous conductance level. To validate the equations derived above, the modulator of Fig. 7(e) is simulated in Agilent ADS using the following fixed design parameters: V, GHz, nm, . All of the passive components are considered lossless. Table I reveals design components of the power-combining network for different values of the transformer turns ratio. As is expected from (22) and (23) and confirmed by simulation results, increasing results in higher output power. Moreover, the drain efficiency is %. As is concluded in the Appendix, the efficiency drops in comparison to class E, mainly due to the increase of shunt capacitance (15), which, in turn, increases the modulator dc current. III. ERROR VECTOR MAGNITUDE (EVM) AND ACPR PERFORMANCE OF THE PROPOSED MODULATOR By sequentially and simultaneously increasing the and modulator codes, the summing and orthogonality can be examined in view of the simulation results shown in Fig. 8. As derived in (A.33) and (A.34), the normalized amplitude and phase of the modulator should be and , respectively. Based on the simulation results, there are small deviations from these target numbers, which are shown in Fig. 8(a)–(b). As also concluded in the Appendix, the reason for these amplitude and phase deviations lies in the fact that changing would slightly change the phase and amplitude of the drain node, and consequently, the output node. The error vector magnitude (EVM) is conventionally used for the evaluation of the modulator performance. The EVM calculates the difference between the symbol sampling points of the measured and reference waveforms. The EVM result is defined as the square root of the ratio of the mean error

Fig. 8. Simulation results of power-combining network for equal codes (10 bits of resolution). (a) Amplitude. (b) Phase. (c) Corresponding EVM. (d) First quadrant constellation diagram. (e) Drain efficiency. (f) Output power.

vector power to the mean reference power, expressed in percentage [14]

(24) where is the number of iterations for each point. Fig. 8(c) shows the corresponding EVM calculation based on (24). Simulation results reveal that the EVM for all of the simulation conditions is less than 2.5%, which confirms the orthogonal summing and power-combining operation. Fig. 8(d) shows that the linearity of the modulator is improved when the peak output power is increased. The reason is that for a higher output power, is lower, and consequently, the drain voltage swing is lower. Fig. 8(e) and (f) shows that the drain efficiency and output power are chosen to be maximum when the code is maximum. Moreover, based on Fig. 8(e), the dynamic range of the modulator is about 60 dB, which could correspond to 10 bits of the RF-DAC resolution. As discussed earlier, although the RF-DAC does not need the bulky analog low-pass filters (LPFs), it requires another type of filtering based on a discrete-time digital approach. Let us consider a WCDMA baseband signal in which its data rate varies from 7.5 to 960 kb/s. Fig. 9 illustrates the filtering process. First, the spread-spectrum filter is applied to the in-phase

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Fig. 9. Upsampling and interpolation process of baseband signals.

Fig. 11. DCO. (a) Schematic. (b) Simulation results; first divider. (c) Schematic. (d) Simulation results.

IV. IMPLEMENTATION OF DIGITAL Fig. 10. Simulated WCDMA RF output spectrum for different RF-DAC reso: far-out; close-in range. lutions

and quadrature phase baseband samples while the chip rate is 3.84 MHz. To constrain the occupied RF band, the resulting signals then get pulse shaped. The pulse-shaped oversampling rate is usually 16; therefore, the baseband data rate will increase to 61.44 Mb/s. If these samples ( and shown in Fig. 9) are directly applied to the implicit mixer of the RF-DAC, then the resulting signal will produce spectral images at every 61.44 MHz from the up-converted spectrum of the signal, which are very difficult to filter out. Therefore, it is necessary to interpolate these signals to higher data rates. Moreover, using up-sampling, the quantization noise spreads over a wider operational frequency range, which also improves the dynamic range or resolution. Using three cascaded finite-impulse response (FIR) filter-based interpolators, each with an upsampling factor of , the resulting signal sampling rate is 535 MHz. Consequently, the images repeat every 535 MHz from the desired spectrum, which is now easier to filter out. It should be mentioned that the FIR clocks are synchronized to the carrier clocks using dividers. The simulation results of Fig. 9 are shown in Fig. 10, which also indicates that by increasing the resolution of the RF-DAC , the quantization noise is decreased, and thus, the dynamic range of the WCDMA signal improves. Each extra bit corresponds to a 6-dB improvement in the dynamic range. The far-out spectrum of Fig. 10 shows the sampling image replica of the original signal, which is located 535 MHz away. This reveals that the baseband signals are ultimately upsampled by a factor of 128 (16 8) to spread the quantization noise, thus lowering its spectral density.

MODULATOR

An on-chip 8-GHz digitally controlled oscillator (DCO) is included to generate the clock signals for the digital modulator that targets 3G cellular basestation applications operating at 2 GHz. There are several reasons for the selection of the 8-GHz DCO resonating frequency; namely, to avoid direct DCO leakage to the output in the targeted operating band, as well as injection pulling of the DCO by those outputs. The area occupied by the 8-GHz DCO is also significantly reduced compared to 4- or 2-GHz implementations due to its smaller inductor. Finally, the frequency down-conversion of the 8-GHz signal automatically yields the proper % phase relationship for the 2-GHz and clock signals. Fig. 11(a) shows the DCO core circuit, which is a conventional cross-coupled LC-tank DCO with a pMOS current source. Fig. 11(b) shows the simulation results of the differential output nodes and . In order to be able to construct the constellation diagram and calculate the EVM of the modulator, as was shown in Fig. 6(c), the modulated phase must be measurable. Therefore, the modulator requires a stable phase reference. To achieve that, the DCO is injection-locked to an external 16-GHz oscillator through the tail current source . Since the source nodes of the cross-coupled transistors and exhibit 2 the frequency of their drain nodes, this node is forced to lock to the injected signal (16-GHz reference clock) [15]. It should be noted that for injection locking of the DCO, bias voltage node , and a 3-bit switched-capacitor (varactor) bank should be tuned. The varactor elements force the DCO into the vicinity of 8 GHz so that it could be easily injection locked. These two nodes are applied to the first divide-by-2 circuit [3] [see Fig. 11(c)]. The divider output frequency is 4 GHz and it creates quadrature outputs, which are shown in Fig. 11(d). For the next stage, only one set of differential nodes of the divider is needed.

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Fig. 12. Second divider. (a) Schematic. (b) Simulation results: sign bit selector. (c) Schematic. (d) Simulation results.

As a result, the and nodes drive the second divider, which produces the four clock phases with the aimed duty cycle of 25% at 2 GHz [16] [see Fig. 12(a)]. The clock nodes ( and ) run at 2 the fundamental frequency (4 GHz), while , , , and represent the 2-GHz clock signals with a 25% duty cycle. The simulation result of the second divider is shown in Fig. 12(b). The divide-by-2 and 25% duty cycle signal generation are explained as follows. In each input clock cycle (i.e., the differential nodes of and ), two of the pMOS transistors (e.g., and ) are activated, which makes one of the drain nodes low (e.g., ) and the other (cross-coupled differential drain node, ) high. In this case, the previous state of the nodes and are high and low, respectively. It should be mentioned that also intends to be high (since is also active), but because of the positive feedback of cross-coupled transistors of and , it eventually goes back to low level (see in Fig. 12(b), the small ripple of each node around the ground). Simultaneously, the other two (e.g., and ) are off, thereby generating floating nodes that allow the to remain low, and goes from high to low level because is now in a high level state. Therefore, “ .” This means that, in each half cycle of the input clock, the high-level output voltage of the circuit rings from one node to another node, and consequently, in two cycles of the input clock (divide-by-2), the high-level voltage passes through all of the output nodes (i.e., the circuit generates 25% duty cycle). To cover the four quadrants of the constellation diagram, as was mentioned in Section II-A, the modulator addi-

Fig. 13. Schematic of: (a) implicit mixer unit and (b) 2-bit switch array banks.

tionally needs sign bits. Fig. 12(c) shows the sign-bit circuit for the in-phase clocks, which turns out to be a multiplexer. According to the simulation result of the sign bit circuit [see Fig. 12(d)], when the sign bit is high, then and directly pass through the transmission gate switches to the and nodes. When the sign bit is low, the inputs and are swapped. The same circuit is used for the clock. The four clock signals pass through clock buffers to arrive at the implicit mixer stages. Fig. 13(a) shows one of the unit cells of the implicit mixer, which is realized as a transmission gate based AND gate. The clock signal , which could be any of the , , , or signals of Fig. 6, passes through the transmission gate if the baseband data bit or is asserted and the resulting signal is termed or , which is an up-converted version of the or , respectively. The pull-down nMOS transistor is used for suppressing the carrier leakage. should be appropriately sized to shunt the carrier energy at the gate of the switch array transistor in the unit’s off-state without excessive loading in the unit’s on-state. Fig. 13(b) shows the corresponding equivalent transistor switch array of Fig. 6, which has 2 bits of resolution. Considering the sign bits, it is indeed a 3-bit modulator. The switch arrays are implemented in a pseudodifferential configuration.

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Fig. 14. Plots of drain current (top row), output voltage (middle row), and re, lated constellation points (bottom row) for the codes of: (a) , and (c) . (b)

The and signals drive the gates of the switch array transistors. When the (or ) code is kept constant while the (or ) code is varying, the conductance of the switches change, and consequently, the amplitude and phase of the composite RF output change. In addition, when both the and code changes, the amplitude and phase of the RF output changes because of the orthogonality. The size of the transistor switch is m m . The length of the switches are chosen to be twice the minimum feature length of the corresponding process technology to ensure good matching. The drawbacks are reduced output power, larger clock buffers, and area. To confirm the correct operation of the modulator, three simulations are carried out for three different codes, which are , and , respectively. Fig. 14 shows simulated drain currents of and transistors of Fig. 13 with corresponding output voltages and the related constellation points of the RF output. The corresponding phasors of the constellation points are , , and , versus the expected , , and , thus demonstrating the proper basic operation of the digital modulator. In addition, recall that Fig. 6(c) shows the post-layout simulation results of the 64-point digital modulator. The highest output power is 14.26 dBm and the related calculated EVM is 4.83% according to (24). As was discussed in Section II-B, the transistor switch arrays are connected at the output to the power-combining network, which comprises the balun transformer with input and output tuning capacitors. As was explained in Section II-B, the shunt input and output capacitances of the power combiner are used to fine tune the amplitude and the phase relationship of the signal, as well as the output power at 2 GHz. These capacitances have consisted of a fixed part (with values of , ) and a tuning part (with values of ), which are tuned using nMOS switches. The size of nMOS switches should be carefully chosen since it affects the quality factor, and consequently, the insertion loss of the power-combining network.

Fig. 15. (a) Layout of balun (left) and corresponding lump equivalent circuit. (b) Primary and secondary inductance. (c) Primary and secondary loss resisin 1–5-GHz frequency range. tance. (d) Load reflection coefficient of

These capacitances are realized as fringe interdigitated capacitors, which use metal layers 1–7 of our chosen technology to improve the capacitor density per unit area. Layout of the balun transformer is shown in Fig. 15(a). is generally used to convert the differential signals to a singleended output. It impacts the modulator performance, and hence it needs special attention to its layout [5]. The total size of the transformer is 500 500 m and its turns ratio is 1:1 (with a center tap on its primary winding). The balun inductance covers the frequency range of 1–3 GHz. The resulting -parameter model from an ADS Momentum simulator was converted to an equivalent lumped-circuit model [13], which is used in the time-domain circuit simulations. In this study, the equivalent lumped circuit is a modified version of [13], which is shown in Fig. 15(a). In this modified equivalent lumped model, the mutual inductance between two primary differential legs of the balun is included. Therefore, by using a T-section model for the primary side, the magnetizing inductor is (25)

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where is mutual inductance, is self-inductance of the primary winding [13], and the related coupling factor of the transformer is . Moreover, in this model, all of the parasitic capacitances between the six ports (two inputs, two outputs, , and ground) of the balun are included. In addition , and , are parallel to and , respectively, which could model the metal skin effect or frequency-dependent substrate losses. Fig. 15(b) and (c) compares the simulation results between the Momentum -parameter and the equivalent lumped model for the primary and secondary inductance and series loss resistance versus frequency. According to Fig. 15(b)–(c), the equivalent lumped model well coincides with the Momentum simulation results. Based on other simulation results, the insertion loss of the balun is about 1.7 dB, which causes the drain efficiency of the modulator to drop from almost 33% to about 21%. It should be mentioned that in Fig. 13(b), is connected to the power-combining network via the bond-wire inductor . In addition, the effect of RF pad capacitance should be considered. The effect of these extra passive components is simulated for the 1–5-GHz frequency range and the corresponding load reflection coefficient is shown in Fig. 15(d). Based on simulation results, if nH (which is a typical value for a 1-mm-long bond-wire) and fF, then , which has a very little effect on the functionality of the power-combining network. However, the design steps of the power-combining network consider as a part of .

Fig. 16. (a) Micrograph of the 3-bit 2-GHz all-digital 8-GHz DCO. (b) FR4 PCB board. (c) Mounted chip.

modulator including

V. MEASUREMENT RESULTS As an experimental validation of the proposed orthogonal combining concept, a 3-bit (including one sign bit) direct-digital modulator circuit is fabricated in 65-nm CMOS technology. Fig. 16(a) shows the micrograph of the implemented chip. The total chip area is 1.2 2 mm with the active part of 0.6 1.15 mm . The chip is mounted on an FR4 printed circuit board (PCB) [see Fig. 16(b)] and all of the pads including two RF pads (16-GHz input clock reference and 2-GHz RF output) are wire bonded. The test board is designed such that very short bond-wires could be used for all RF signals, supply, and ground connections. The chip height is about 600 m and it is placed into a designated hole on the FR4 board, which makes the bond-wires even shorter [see Fig. 16(c)]. For the correct operation of electrostatic discharge (ESD) protection circuits, digital control bits are surrounded by ground and supply pads. In addition, as shown in Fig. 16(a), , , and are the digital control frequency bits of the DCO. Also , , and of Fig. 13(b) are used for tuning the power-combining network. Moreover, the baseband digital control bits are - , - , , , , , , , , and . During the measurement process, these digital baseband bits are statically switched on and off. To start the measurements, the chip is first injection locked to a 16-GHz reference signal source. The measured phase noise under injection at 1-MHz offset is approximately 140 dBc/Hz [5]. The dc drain current of the transistor switch arrays is 60 mA

Fig. 17. Measured: (a) output power and (b) output power versus input codes.

at the maximum output power of 12.62 dBm after de-embedding the 0.3-dB loss of the SMA cable. Consequently, the related drain efficiency is 20% ( V), which is considered excellent from the modulator point of view. Fig. 17(a) shows the highest output power and carrier leakage superimposed. The carrier leakage is 71 dBc below the peak output power. In Fig. 17(b), the variation of the output power versus codes is plotted, which indicates the 10.5-dB dynamic range of the modulator. Note that this value agrees with the modulator resolution of 2 bits when the supply is kept constant. Since the carrier leakage is less than 58 dBm, it is possible to increase the resolution of the modulator in a rather straightforward manner to a higher number of bits. In fact, the dynamic range is now more than 70 dB [dynamic range maximum power (12.62) minimum power (–58)]. Therefore, the resolution could be extended to more than 11 bits . Note that the simulated carrier leakage was around 70 dBm. The difference between the simulation and measurement could be as a results of coupling between the clock traces, drain nodes, and digital/RF ground plane.

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TABLE II COMPARISON SUMMARY

Fig. 18. Measured time-domain 4-QPSK. (a) Phase changing. (b) Amplitude changing. (c) Corresponding constellation points. (d) Corresponding EVM.

changing the sign bits, the phase of the RF signal can be adjusted by 90 [see Fig. 18(a)]. In addition, by increasing the code from the lowest to highest, the modulator amplitude is also changed, which is shown in Fig. 18(b). The corresponding constellation points and the related EVM are shown in Fig. 18(c)–(d), which indicate that for the output power less than 6 dBm, the EVM is less than 1.5% in QPSK modes of operation. Note that, in this measurement, six different QPSK points are measured. For the output power higher than 6 dBm, the supply voltage is V, and for the rest V. As a final point, Fig. 19 shows the modulator performance in the 64-QAM constellation mode. The measured time-domain of three different points in each of the four quadrants (12 points in total) are shown in Fig. 19(a)–(d). These points are , , and , respectively. The corresponding constellation points are shown in Fig. 19(a), which are colored by a black “x” that proves the correct operation of the modulator. The whole 64-QAM constellation diagram is shown in Fig. 19(e). The maximum output power in this case is 6 dBm while V and the corresponding maximum drain efficiency is 10%. The related EVM is 2.36%, or equivalently, 32.53 dB, without using any pre-distortion, which is a promising number. It should be mentioned that the constellation diagram can be easily improved in more advanced implementations when using a higher output resolution. In this case, the pre-distortion techniques can be implemented in a straightforward manner. Fig. 19(e) reveals that the first and third quadrant of the constellation diagram have better behavior than the other two quadrants. This is due to mismatch between the clock paths of the four transistor switch arrays. The measurement results are summarized in Table II. VI. CONCLUSION

Fig. 19. Measured time domain: (a) first, (b) second, (c) third, and (d) fourth constellation diagram at quadrant. (e) Corresponding measured 64-point 2 GHz.

The implemented modulator is tested in two different constellation modes, namely, in quadrature phase-shift keying (QPSK) and 64-QAM. For both of these measurements, time-domain RF output signals are captured and saved. Then, fast Fourier transform (FFT) of these signals is calculated and the amplitudes and phases are plotted. In the QPSK mode, by statically

In this paper, a novel all-digital (i.e., Cartesian) RF transmit modulator has been proposed, which operates as an RF-DAC. The concept of orthogonal summing is introduced and elaborated in detail. It is based on a TDD manner of an orthogonal addition. Using this method, a very simple and compact design featuring high-output power, high power efficiency, and low EVM has been realized. The resolution of the experimental RF-DAC presented in this study is only 3 bits (including one sign bit), but this can be increased to 8–12 bits in a straightforward manner for future use in multistandard wireless applications.

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APPENDIX POWER-COMBINING NETWORK EQUATION EXPLANATION Based on [12], and which are expressed as

depend on

,

(A.14)

, and ,

(A.15)

(A.1)

(A.16)

(A.2)

where

and

depend on the following variables:

(A.3) Consequently,

Moreover,

where for

and %,

(A.17) (A.18)

can be expressed as

(A.19) (A.4)

Moreover, and are defined to simplify the equations and these two parameters also depend on , , , , and

(A.5)

(A.20)

is expressed as

are determined in ([12, eq. 3.18]). Therefore, and are %

(A.6)

%

(A.7)

%

(A.8)

As was shown in Fig. 8(e), the maximum drain efficiency of the digital modulator is about half of that of the ideal class-E. The efficiency drop is investigated by considering the effect of the circuit component values on drain current, voltage, and subsequently the resultant dc current and output power. The drain voltage of Fig. 7(c) could be expressed as

(A.21) Consequently,

and

can be expressed as

(A.9) In addition, the Fourier representation of a periodic pulse with % is

(A.10)

(A.22)

therefore, the switch conductance is (A.11) The switch (transistor drain) current depends on

(A.23)

and (A.12)

Applying Kirchoff’s voltage and current law, and equating all cosine and all sine terms, , , and can approximately be estimated (A.13)

(A.24)

ALAVI et al.: ALL-DIGITAL RF

DESIGN PARAMETER ,

OF

MODULATOR

TABLE III CLASS E FOR pF,

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V,

GHz,

pH, AND

where is an incremental factor of power. Simulation results show that this value mostly depends on , and varies between . As was mentioned, the second case is a special case of Fig. 7(d), in which the path is completely deactivated (off). Thus, if the path turn on completely, then the output power will be doubled. For prove of this statement, consider the conventional equation of the quadrature modulator

TABLE IV COMPARISON BETWEEN DERIVED EQUATION AND CIRCUIT SIMULATION

(A.31) If

, then (A.32)

of which the amplitude and phase of the

signal are (A.33) (A.34)

Based on (A.33), the Fig. 7(d) output power is (A.35)

In fact, the phasor representation of drain voltage and output voltage are (A.25)

ACKNOWLEDGMENT

(A.26)

The authors would like to thank A. Akhnoukh, M. Danesh, K. Buisman, M. Pelk, M. Spirito, N. Saputra, D. Calvillo, L. van Schie, A. Kaichouhi, M. de Vlieger, and W. Straver, all with the Technical University of Delft (TU-Delft), Delft, The Netherlands, for their support. The authors extend special acknowledgment to NXP Semiconductors, Eindhoven, The Netherlands, for their support of this project and to the Dutch Technology Foundation for the support of the chip fabrication.

The output power, dc power, and drain efficiency are (A.27) (A.28) (A.29) For validating these equations, two different cases are considered. The first case is related to a conventional class-E circuit [see Fig. 7(c)] with . The second case is the circuit of Fig. 7(d), in which the quadrature switch arrays are off. The design parameters of the two cases are tabulated in Table III. As a result, Table IV compares the derived equations and circuit simulation results of these two cases. Table IV unveils some important conclusions. First, there is a good agreement between the derived equations and circuit simulation results. The small differences between them arises because of neglecting of the higher harmonics of (A.9). Second, since , , and , according to (A.13)–(A.24), these cause an increase of , , , and reduction in quality factor. Consequently, the drain efficiency of the modulator drops compared to a class-E implementation. Third, the phase and amplitude of the drain node, and consequently, the output node depend only on the value of when the other passive components are fixed. Therefore, by sequentially turning on the switches, the phase of output would be changed. Finally, the output power of second case is higher than case one (A.30)

REFERENCES [1] A. A. Abidi, “RF CMOS comes of age,” IEEE J. Solid-State Circuits, vol. 39, no. 4, pp. 549–561, Apr. 2004. [2] A. Matsuzawa, “Digital-centric RF CMOS technology,” in Proc. of IEEE RF Integr. Technol. Conf., Dec. 2007, pp. 122–126. [3] R. B. Staszewski, J. Wallberg, S. Rezeq, C.-M. Hung, O. Eliezer, S. Vemulapalli, C. Fernando, K. Maggio, R. Staszewski, N. Barton, M.-C. Lee, P. Cruise, M. Entezari, K. Muhammad, and D. Leipold, “All-digital PLL and transmitter for mobile phones,” IEEE J. Solid-State Circuits, vol. 40, no. 12, pp. 2469–2482, Dec. 2005. [4] D. Chowdhury, Y. Lu, E. Alon, and A. Niknejad, “An efficient mixedsignal 2.4-GHz polar power amplifier in 65-nm CMOS technology,” IEEE J. Solid-State Circuits, vol. 46, no. 8, pp. 1796–1809, Aug. 2011. [5] M. S. Alavi, A. Viswesaran, R. B. Staszewski, L. C. N. de Vreede, J. R. modulator in 65 nm Long, and A. Akhnoukh, “A 2 GHz digital CMOS,” in Proc. IEEE Asian Solid-State Circuits Conf., Nov. 2011, pp. 277–280. RF transmitter using [6] R. B. Staszewski and M. S. Alavi, “Digital time-division duplexing,” in Proc. IEEE RF Integr. Technol. Conf., Dec. 2011, pp. 165–168. [7] M. S. Alavi, R. B. Staszewski, L. C. N. de Vreede, and J. R. Long, “Orthogonal summing and power combining network in a 65-nm allmodulator,” in Proc. IEEE RF Integr. Technol. Conf., digital RF Dec. 2011, pp. 21–24. [8] P. Eloranta, P. Seppinen, S. Kallioinen, T. Saarela, and A. Pärssinen, “A multimode transmitter in 0.13 m CMOS using direct-digital RF modulator,” IEEE J. Solid-State Circuits, vol. 42, no. 12, pp. 2774–2784, Dec. 2007. [9] P. Cruise, C.-M. Hung, R. B. Staszewski, O. Eliezer, S. Rezeq, D. Leipold, and K. Maggio, “A digital-to-RF-amplitude converter for GSM/GPRS/EDGE in 90-nm digital CMOS,” in Proc. IEEE RF Integr. Circuits Symp., Jun. 2005, pp. 21–24, sec. RMO1A-4.

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[10] A. Pozsgay, T. Zounes, R. Hossain, M. Boulemnakher, V. Knopik, and S. Grange, “A fully digital 65 nm CMOS transmitter for the 2.4-to-2.7 RF DACs,” in Proc. GHz WiFi/WiMAX bands using 5.4 GHz IEEE Int. Solid-Stat Circuits Conf., Feb. 2008, pp. 360–361. [11] X. He and J. van Sinderen, “A low-power, low-EVM, SAW-less WCDMA, transmitter using direct quadrature voltage modulation,” IEEE J. Solid-State Circuits, vol. 44, no. 12, pp. 3448–3458, Dec. 2009. [12] F. H. Raab, “Idealized operation of the class-E tuned power amplifier,” IEEE Trans. Circuits Syst., vol. CAS-24, no. 12, pp. 725–735, Dec. 1977. [13] J. R. Long, “Monolithic transformer for silicon RF IC design,” IEEE J. Solid-State Circuits, vol. 35, no. 9, pp. 1368–1382, Sep. 2000. [14] User Equipment (UE) Conformance Specification, 3GPP TS 34.121-1 V8.7.0, Tech. Specification Group Radio Access Network, Jun. 2009. [15] H. R. Rategh and T. H. Lee, “Superharmonic injection-locked frequency dividers,” IEEE J. Solid-State Circuits, vol. 34, no. 6, pp. 813–821, Jun. 1999. [16] B. Razavi, “Design of high-speed, low power frequency dividers and phase locked loops in deep submicron CMOS,” IEEE J. Solid-State Circuits, vol. 30, no. 2, pp. 101–109, Feb. 1995.

Morteza S. Alavi (S’09) was born in Tehran, Iran. He received the M.Sc. degree in electrical engineering from the University of Tehran, Tehran, Iran, in 2006, and is currently working toward the Ph.D. degree in electrical engineering at the Delft University of Technology, Delft, The Netherlands. His research interest is designing the RF ICs for communication systems.

Robert Bogdan Staszewski (S’94–M’97–SM’05– F’09) received the Ph.D. degree from the University of Texas at Dallas, in 2002. In 1995, he joined Texas Instruments Incorporated, Dallas, TX, where he became a Distinguished Member of Technical Staff. In 1999, he co-started a digital RF processor (DRP) group within Texas Instruments Incorporated with a mission to invent new digitally intensive approaches to traditional RF functions for integrated radios in deeply scaled CMOS processes. From 2007 to 2009, he was a CTO of the DRP group. Since July 2009, he has been an Associate Professor with the Delft University of Technology. Delft, The Netherlands. He has authored or coauthored one book, three book chapters, and 130 journal and conference publications. He holds 100 U.S. patents. His research interests include nanoscale CMOS architectures and circuits for frequency synthesizers, transmitters and receivers.

Leo C. N. de Vreede (M’01–SM’04) received the Ph.D. degree (cum laude) from the Delft University of Technology, Delft, The Netherlands, in 1996. From 1988 to 1990, he was involved in the characterization and physical modeling of CMC capacitors. From 1990 to 1996, he was involved with the modeling and design aspects of high-frequency (HF) silicon integrated circuits (ICs) for wideband communication systems. In 1996, he was became an Assistant Professor involved with nonlinear distortion behavior of bipolar transistors. In 1999, he became an Associate Professor, responsible for the Microwave Components Group, Delft University of Technology, where since that time he has been involved with RF solutions for improved linearity and RF performance at the device, circuit, and system levels. He is cofounder of Anteverta-mw BV, a company that is specialized in RF measurements. He coauthored over 80 IEEE refereed conference and journal papers. He holds several patents. His current interests include RF measurement systems, technology optimization, and circuit concepts for adaptive wireless systems. Dr. de Vreede was a corecipient of the 2008 IEEE Microwave Prize. He was mentor of the 2010 Else Kooi Prize awarded Ph.D. work and the 2011 DOW Energy Dissertation Prize awarded Ph.D. thesis.

Akshay Visweswaran (S’11) was born in New Delhi, India. He received the M.Sc. degree in electrical engineering from the Delft University of Technology, Delft, The Netherlands, in 2009, and is currently working toward the Ph.D. degree at the Delft University of Technology. His professional experience includes having been an Analog/RF Integrated Circuit (IC) Design Engineer with NXP Semiconductors, Eindhoven, The Netherlands, and Conexant Systems India PVT Limited.

John R. Long (S’77–A’78–M’83) received the B.Sc. degree in electrical engineering from the University of Calgary, Calgary, AB, Canada, in 1984, and the M.Eng. and Ph.D. degrees in electronics from Carleton University, Ottawa, ON, Canada, in 1992 and 1996, respectively. For ten years he was with Bell-Northern Research, Ottawa, ON, Canada. From 1996 to 2001, he was an Assistant and then Associate Professor with the University of Toronto. Since January 2002, he has been Chair of the Electronics Research Laboratory, Delft University of Technology, Delft, The Netherlands. His current research interests include high-speed wireline and high-frequency, low-power, and mobile transceiver circuits for integrated wireless communications systems. Prof. Long was general chair and local organizer for the 2006 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), Maastricht, The Netherlands. He is cochair of the 2012 European Microwave Integrated Circuit (EuMIC) Conference. He is a member of the Technical Program Committees for the 2012 European Solid-State Circuits Conference (ESSCIRC). He was the recipient of the Natural Sciences and Engineering Research Council (NSERC) Doctoral Prize and the Douglas R. Colton Medal and Governor General’s Medal for research excellence. He was a corecipient of the 2000 and 2007 Best Paper Award of the International Solid-State Circuits Conference (ISSCC), the 2006 and 2011 IEEE RFIC Symposium, and the 2011 SiRF Meeting.

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Experimental Characterization of Oscillator Circuits for Reduced-Order Models Pedro Umpiérrez, Víctor Araña, Member, IEEE, and Franco Ramírez

Abstract—A new technique is presented to obtain reduced-order models of microwave oscillators from experimental measurements. The models can then be applied to the analysis and design of single-oscillator or multioscillator configurations such as coupled-oscillator systems. The first-order model is given by the derivatives of the oscillator admittance function with respect to the amplitude and frequency. The experimental technique presented here is based on the extraction of these derivatives from the injection-locked response of the oscillator, synchronized to a small-signal source. The new approach to obtain the derivatives has been validated through comparison with the standard method using commercial harmonic-balance software. The experimental setup and all the key aspects related to calibration and equipment requirements are explained in detail. Finally, the proposed technique is applied to characterize a voltage-controlled oscillator at 4.97 GHz. Excellent agreement has been obtained between measurements and simulations. Index Terms—Auxiliary generator (AG) technique, free-running voltage-controlled oscillator (VCO), synchronized VCO, VCO derivatives.

I. INTRODUCTION

N

EW approaches for the exploitation of injection-locked and free-running oscillators have been proposed by different authors. In these studies, oscillator-based circuits have been presented as a suitable and convenient alternative to more conventional solutions for frequency conversion [1]–[7], beamsteering, and power combining in coupled-oscillator systems [8]–[10], signal amplification [11], [12], or, more recently, in applications for frequency and phase modulation and demodulation [13]–[16]. However, and beside the potential of oscillator-based circuits for the aforementioned applications, only a small amount of effort has been devoted to their investigation, which is mostly due to the complexity of their analysis. Due to their autonomous nature, harmonic balance (HB) converges by default to nonoscillatory Manuscript received April 27, 2012; revised August 02, 2012; accepted August 06, 2012. Date of publication September 27, 2012; date of current version October 29, 2012. This work was supported by the Spanish Ministry of Economy and Competitiveness under Contract TEC2011-29264-C03-01 and Contract TEC2011-29264-C03-02 and by the Ramón y Cajal Programme under Contract RYC-2008-02172. P. Umpiérrez and V. Araña are with the Departamento de Señales y Comunicaciones, Universidad de Las Palmas de Gran Canaria, Las Palmas 35017, Spain (e-mail: [email protected]; [email protected]). F. Ramírez is with the Departamento de Ingeniería de Comunicaciones, Escuela Técnica Superior de Ingenieros Industriales y de Telecomunicaciones (ETSIIT), Universidad de Cantabria, Santader 39005, Spain (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2214054

solutions and in the case of multioscillator configurations, this undesired convergence must be avoided in each of the oscillator components. To cope with some of these limitations, the auxiliary generator (AG) technique has been proposed by Suárez [17]. The AG technique has proven to be a powerful and flexible tool for the analysis, design, and optimization of oscillating circuits in free-running and synchronized regimes. It has also been successfully applied to the analysis of coupled-oscillator systems for beam-steering applications. However, as these multioscillator circuits increase in size and complexity, numerical problems arise, related to the size of the equations systems and matrices to be handled in their analysis. A recent example of this is the analysis of coupled-oscillator arrays, where the HB analysis, in combination with the AG technique, is limited to a small number of individual-oscillator elements [9], [10]. In [4], a reduced-order model (semianalytical formulation) was presented for the analysis of autonomous circuits and has been successfully applied to the analysis of frequency dividers [4], injection-locked oscillators, and coupled-oscillator systems containing an arbitrary number of oscillator elements [10]. In [17] and [18], the semianalytical formulation was also applied for the calculation of the phase-noise spectrum of free-running and injection-locked oscillators. This semianalytical formulation is based on a perturbation model about the steady-state solution of the free-running or synchronized solution of the oscillator circuit. In this manner, the system solution for low injection level or weak coupling can be obtained with a much lower computational effort compared to the conventional HB analysis. The reduced-order models involve the calculation of derivatives of the total admittance or impedance function, associated to the individual free-running oscillator, with respect to different state variables. In [4], these derivatives are obtained numerically from HB simulations, using finite differences. Therefore, the reliability of the derivatives is dependent on the models used for the different circuit components. Moreover, if the circuit schematic, internal structure, or models of the linear and nonlinear components are not available, the derivatives required for the reduced-order model could not be accurately estimated. This could also happen when using commercial or third-party oscillators and the provided models do not fit well with measurements. In this paper, a procedure is demonstrated for the experimental extraction of the derivatives of the admittance/impedance function of the elementary free-running oscillator. The new methodology is based on the characterization of the oscillator response when injection locked to a small-signal source. A robust measurement setup will be presented to obtain the derivatives that constitute the reduced-order

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model of the elementary oscillator. To our knowledge, this is the first time that these derivatives are obtained directly from experimental data. This paper is organized as follows. Section II reviews the reduced-order model, explained in detail in [17], with emphasis on the derivative calculation using the AG technique. In Section III, new expressions for the calculation of the admittance derivatives are demonstrated. In Section IV, the practical setup, involving the use of a circulator and other components (for later implementation in the measurement bench) is presented and validated. In Sections V and VI, the measurement assembly and equipment requirements are described, and the calibration procedure and possible limitations are discussed. Finally, the first-order derivatives of a voltage-controlled oscillator (VCO) at 4.97 GHz are obtained from measurements and results are discussed in Section VII. II. REFERENCE SOLUTION: OSCILLATOR DERIVATIVES FROM HB WITH AUXILIARY GENERATOR TECHNIQUE A free-running oscillator exhibits a zero value of total admittance (current to voltage ratio) at any of its nodes [19]. In injection-locked conditions, or when weakly coupled to one or more oscillators, the total admittance will undergo a small variation, which can be predicted by linearizing the admittance function about the free-running solution. The use of an AG [17] for the oscillator analysis enables the oscillator modeling using a single observation node. In fact, with the AG, the free-running oscillator is resolved in a two-tier manner, with the total admittance function , at the fundamental frequency, constituting the outer tier. The derivatives of this admittance function (providing the reduced-order model of the oscillator in the presence of injection or coupling signals) can then be obtained through finite differences. The procedure is described in more detail in the following. For generality, a VCO, with tuning voltage , will be assumed (Fig. 1). The AG shown in Fig. 1 is a voltage generator with amplitude , frequency, , and phase , connected in parallel at the observation node . The AG must fulfill a nonperturbation condition, given by the zero value of the ratio between the current flowing through the generator and its voltage delivered, i.e., , with being the current delivered by AG. The derivatives of the total admittance can then be calculated through finite differences in the variables , , and [4]. As an example, the derivative with respect to is calculated applying small increments in the AG amplitude, while keeping constant the AG frequency and the tuning voltage. The HB system is then solved for , calculating and obtaining the ratio . The derivatives with respect to the other variables are calculated in a similar fashion [4]. In some cases, the oscillator might be expected to operate in injection-locked conditions, synchronized to a small-amplitude independent source. If this source is not directly connected to the observation node , the linearization will require the additional calculation of the derivatives of the complex-admittance function with respect to the real and imaginary parts of the synchronizing source [4].

Fig. 1. Ideal circuit with VCO, injection source, and AG used to characterize VCO regimes and its derivatives. (a) Injection source connected at the same node than the AG. (b) Injection source connected at a different node than the AG.

The method described above has been applied to obtain reduced-order oscillator models, applied in the analysis of injection-locked oscillators [16], frequency dividers [4], and coupled oscillator systems [9], [10]. In fact, the effect of the injection source or coupling network is analyzed using the derivatives obtained with finite differences in HB, which provides a semianalytical formulation of the corresponding system. Good agreement is found between the results provided by the semianalytical formulations and full HB at circuit level. However, the accuracy of the semianalytical formulation (as well as the results obtained with HB) will depend on the reliability of the device and passive element models used in the circuit-level description of the free-running oscillator. Therefore, it would be of great interest to develop a technique enabling the experimental extraction of the admittance function derivatives since this would improve the accuracy and extend the application of the reduced-order models to commercial oscillators without the need of a circuit-level description. A judicious methodology must be developed for the extraction of the admittance-function derivatives since the simulation setup of Fig. 1 cannot be implemented via the laboratory. The increments applied in the derivative calculation through finite differences lead the system to mathematical solutions different from the ones that would be obtained in the test bench. In fact, the connection of an auxiliary source at the same or very similar frequency to the free-running frequency would lead the circuit to a synchronized regime, different from the one in the setup of Fig. 1. In Section III, a method for the experimental derivative extraction is presented to cope with these difficulties. Initially, the method will be thoroughly validated through comparison with the existing simulation technique that has been briefly summarized in this section.

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earization about the steady-state free-running oscillation will be given by

III. PROPOSED METHOD TO EXTRACT THE OSCILLATOR REDUCED-ORDER MODEL Let a small-signal source at the same or similar frequency to the one corresponding to the free-running regime be considered. It is assumed that the oscillator gets injection locked to this source. Linearizing the total admittance function about the free-running regime, the circuit is then ruled by [17] (1) where is the phase shift between the oscillation and the injection source. For two different current/frequency values of this, and , the corresponding synchronized solutions will be given by and with and being the voltages at the observation node for the two sets of values. By replacing each of these values in (1) and subtracting the two equations, the following relationship is obtained:

(7) with being the total admittance of the oscillator at the observation node and the superscripts and stand for the real and imaginary parts of the injection current, respectively. In order to remove the dependence of (7) from the free-run, two particular solutions and , ning solution obtained for different input generator values and are chosen, resulting in

(2) The crucial point is that (2) no longer depends on the freerunning solution , and as shown in the following, will enable the calculation of the admittance-function derivatives in synchronized operation. For instance, by properly choosing two synchronized solution points at the same frequency, i.e., , the derivative of with respect to the amplitude can be easily obtained from (2) as follows:

(8) where and , respectively. To obtain the values of the derivatives and , two more particular solutions are needed to be used in combination with (8), the new equations system being

(3) This derivative (3), in combination with two new solution points and , obtained by varying the input generator frequency, will provide the frequency derivative, which is given by (4) The derivative of the admittance function with respect to any other given parameter , e.g., the tuning voltage in a VCO, can be obtained taking this variable into account in the Taylorseries expansion. In a similar fashion to (1), the following expression is obtained: (5)

(9) The two terms, corresponding to the derivatives of the admittance versus the real and imaginary parts of the injection signal, respectively, are given by (10)

, with being the parameter value at the where free-running solution. By considering slight variations about , two new solution points, and must be obtained. Using the results from (3) and (4), in combination with the previous solution points, we obtain

(6) Finally, if the external generator is connected to a node different [as shown in Fig. 1(b)], the linfrom the observation node

Although the proposed derivative-calculation procedure requires the previous calculation of several solution points, it is important to remark that all of these derivatives can be obtained, precisely, from measurable synchronized solutions, which would not be possible with the increment-based calculation described in Section II. In Section IV, the derivatives of the admittance function obtained with a new alternative setup will be compared, for validation purposes, with the derivatives calculated using the technique summarized in Section II. Although the proposed method-

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Fig. 2. Modifications of the circuit from Fig. 1(a), where a circulator has been included.

Fig. 3. Circuit used to determine the Norton equivalent current of VCO load circuit, which includes injection signal generator, circulator, and load resistor. . Norton equivalent current corresponds with

ology requires some additional simulations, one main advantage is that the derivatives can be calculated both in simulation and measurement, as will be shown later. IV. CIRCUIT MODIFICATIONS, MEASUREMENT ASSEMBLY, AND VALIDATION The circuit shown in Fig. 1(a) must be modified in order to obtain a more realistic assembly with a suitable implementation in the laboratory. Since the injection signal cannot be directly applied at the observation node , a circulator has been included for signal injection, as shown in Fig. 2. The AG is still shown in the circuit schematic, but is used for simulation purposes only. Note that the current taken into account in Fig. 1(a) is now different from the current delivered by the injection source . Therefore, the Norton equivalent current , injected to the oscillator, must be determined. The current can be calculated using the equivalent circuit shown in Fig. 3. The currents and and voltages and , in Fig. 3, are related through the -parameter matrix of the circulator, considering and when the Norton equivalent conditions are imposed. Taking into account that , it is possible to define the Norton current , shown in (11) at the bottom of this page.

Fig. 4. VCO used to validate the proposed method. (a) Equivalent circuit of the VCO under test. (b) Photograph of the circuit. An injection input is available in GHz, the gate network. Free-running frequency in simulation, V, and output amplitude, V. varactor bias,

This equivalent current will be used in equations derived from (1) and (5) when calculating the oscillator derivatives. As will be shown later, an accurate characterization of the circulator and all other passive components is required. For validation, the VCO shown in Fig. 4 will be analyzed using commercial HB software (ADS), in combination with the AG, and its admittance derivatives will obtained following

(11)

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TABLE I SUMMARY OF DATA FOR OUTPUT AMPLITUDE DERIVATIVE

SUMMARY

OF

TABLE II DATA FOR FREQUENCY DERIVATIVE

the proposed procedure and the reference method described in Section II. The oscillator in Fig. 4 has been manufactured on an RO4003C substrate using an NE3210S01 transistor and an MA46H070 varactor diode as the tuning element. The injection port, used to synchronize the VCO, is connected to the gate terminal of the transistor. This port is followed by an attenuator, which improves the robustness of the free-running oscillation when connections and disconnections are performed, i.e., it improves the isolation of the gate network and reduces the sensibility to loading mismatch effects. In order to increase the flexibility of the design, an auxiliary port has been also considered at the output of the oscillator, although it is not used in this application. The oscillator shown in Fig. 4 will be used in the arrangement of Fig. 2 for the calculation of its derivatives with respect to the amplitude, frequency, and varactor-bias voltage. In a first step, the free-running solution is obtained, using the AG in combination with HB, with the drain- and varactor-bias voltages set to V and V, respectively. Once the optimization process is finished, the obtained values should fulfill the nonperturbation condition . The steady-state oscillation frequency and amplitude are GHz and V, respectively. Next, the derivative calculation procedure described in Section III is applied. According to (3), the calculation of two synchronized solutions points for relatively low injection levels is necessary to obtain the derivative . Two input-voltage values will be considered, V and V. Hereinafter, and unless other is stated, the phase origin will be set at the input generator for all the following analyses, i.e., . To obtain and , the varactor-bias voltage and the generator frequency will be set to and , to ensure synchronization for the considered injection voltages and . In a similar fashion, to obtain the synchronized solution amplitudes and phases , the AG frequency is set to , and both and are optimized to fulfill the nonperturbation condition. The obtained

values for the AG amplitudes and phases will correspond to and , respectively. Finally, (11) is applied to obtain and , these producing , with . These equivalent currents and admittances are then used in combination with (3) to calculate the amplitude derivative . A brief summary of the data obtained in the process is shown in Table I. For the calculation of the frequency derivative , the injection amplitude will be set to V and its phase will be set to 0, . Two synchronized solutions points for the two frequency values and , ensuring synchronization for , are necessary, as shown in (4). To obtain the synchronized solutions, both and are optimized to fulfill the nonperturbation condition with for each individual frequency value and . Following a similar procedure, the solutions points and are used in (4) to obtain the frequency derivative . Note that the varactor bias voltage is also kept at the fixed value for all the calculations. Additional summary of data is detailed in Table II. The procedure for the estimation of the derivatives with respect to any other circuit parameter, the varactor-bias voltage is considered here, will now be explained. For the calculation of the derivative using (6), the injection frequency, amplitude, and phase should be kept constant. Here, these values are set to V, , and . Two additional synchronized solution points, obtained for two different varactor bias voltages, i.e., , for and V, ensuring synchronization for the previous injection voltage and frequency, are necessary for the calculation of . Again, the AG is used to avoid HB convergence toward the trivial nonoscillating solution. Both and are optimized to fulfill the nonperturbation condition considering . The obtained synchronized solution points being and . In a similar manner, the varactor-bias voltage derivative is calculated using (6). A summary of collected data is detailed in Table III. An alternative procedure to obtain , although not described in detail in this paper, would be based on the anal-

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TABLE III SUMMARY OF DATA FOR VARACTOR BIAS DERIVATIVE

SUMMARY

OF

TABLE IV DATA FOR INJECTED SIGNAL DERIVATIVES

TABLE V VALUES AND RELATIVE ERRORS

ysis for two different frequencies, keeping the AG phase at a constant value, . The calculation of the derivatives versus the injection signal requires slight modifications to the setup shown in Fig. 2. The generator connected to the circulator and the terminal resistor connected to the oscillator input have to be arranged in the place of each other, respectively. Once rearranged, injection amplitude and phase are set to V and . Four additional synchronized solution points have to be obtained for four injected phase values, , for , while considering . The AG amplitude and frequency values, and , are optimized to fulfill the nonperturbation condition. Equations (8)–(10) are now used to obtain the derivatives and . The data obtained during the process is detailed in Table IV. For this particular case, a progressive constant phase shift has been considered for the injection signal, i.e., . For the validation of the described procedure, the obtained results are compared numerically with the results obtained with the derivatives obtained using the reference method [4]. Table V shows a summary of the obtained derivatives values and the relative errors between reference and proposed calcu-

FOR

DERIVATIVES

lation methodologies. Note that the obtained derivative values are very similar, the total error being bounded to an acceptable margin. As an additional validity check, and for graphical comparison, the solution curves for the injection-locked oscillator in Fig. 4, obtained with three different techniques, are shown in Fig. 5. The solution curves obtained with a full HB simulation are compared with the curves obtained using the derivatives calculated through the proposed and reference procedures in combination with the reduced-order model in (7). Note that for the analysis in (7), the injection source is connected at the input port of the oscillator, the derivatives versus the input generator being involved in this case. The synchronization curves for different values of the injection source amplitude, obtained using the derivatives in Table V, are also shown in Fig. 5. As mentioned before, the simulation results obtained with commercial HB software are used as reference solutions. Solution curves obtained using the derivatives calculated using [4], also shown in Table V, are also superimposed over the results obtained with the proposed method. Due to the Taylor series linearization, synchronization curves obtained with the reduced-order model (7) become less accurate

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Fig. 6. Block diagram of the proposed measurement setup.

Fig. 5. Synchronized ellipses obtained for different values of power injection. Comparison between the obtained results with the derivatives calculated by the proposed method, reference derivatives values, and ADS circuit simulation.

as the injection level increases. However, the solution curves obtained with the three approaches have a very good agreement for low injection levels, as can be seen in Fig. 5. In view of the very good agreement between the proposed derivative-calculation procedure and the reference techniques in Section V, the corresponding laboratory characterization setup is discussed in detail. V. MEASUREMENT SETUP AND VALIDATION For the experimental measurement of the different magnitudes involved in the derivative calculation, i.e., voltage amplitude, phase, equivalent injection current, etc., a first approach of a measurement setup is presented. The proposed assembly is based on the instruments currently available in our laboratory, not discarding other alternatives. The most important features and requirements related to the equipment, measurement methodology, and circuit modifications are discussed in detail in this section. These modifications will be applied to the previously shown circuits, ensuring that the results are consistent with those mentioned in the previous sections. The proposed measurement setup is shown in Fig. 6 and consists, essentially, of two phase-coherent frequency generators ( and ) and one spectrum analyzer. Generator plays the role of the injection source, its phase being considered as reference, while generator will be used to calculate the voltage amplitude and phase at the oscillator load. As can be seen, the signal of the second generator is added to the output of the oscillator-under-test through a power combiner. Thus, monitoring the signal at the output of the power combiner, it will be possible to determine the voltage at the circulator port 1 through a minimum-tracking technique. The load corresponds to the spectrum analyzer, which is used to measure the output voltage . The measurement of the output voltage is based on variation of the amplitude and phase of the generator and the search of the minimum of . A minimum will be observed when the two signals at the inputs of the combiner, and , have similar amplitudes, but opposite phases, i.e.,

and . Therefore, adjusting the amplitude and phase shift of generator with respect to , the minimum of can be identified, corresponding to and . For these values, we can consider that is equal to , but with opposite phase . The amplitude and phase , corresponding to the oscillator output at the circulator port 1, are then obtained through the circulator admittance matrix . This -parameter matrix can be calculated from the -parameter data obtained from a network analyzer. Note that in the proposed assembly, special attention must be paid to the phase coherence between the signal generators and its derivation in time. The two signal generators must keep the phase derivation as low as possible in order to bound measurement errors. The previously described procedure allows the calculation of the amplitude and phase value at the observation node , which, as mentioned previously, will allow the derivative calculation using increments in the relevant parameters of the circuit. For the derivatives calculation, the sequence and values to be fixed will depend on the specific derivative to be calculated, and will be based on the procedure described in Section III. A. Amplitude Derivative For the calculation of the amplitude derivative using (3), two solution points are necessary. As described in Section III, these solution points must be calculated for the same frequency, but for different injection levels. Here, the procedure for the calculation of these solutions, using the setup shown in Fig. 6, is described. First, the amplitude of the injection source is set to a relatively small value . The frequency of both generators, and , is set equal and to a value close to the free-running oscillation frequency to ensure synchronization, i.e., . and have to then be determined for the considered injection level . These values are determined by adjusting the amplitude and phase of to obtain the minimum at the output of the combiner, as previously described, and are used to obtain and from the circulator’s -parameter matrix. Following the same procedure, an additional solution point has to be obtained for a slightly different injection signal level for . For this new set of values, the minimum obtained is . Note that in both cases, the amplitudes of the injection source should be small enough in order to preserve the validity Taylor-series expansion. Once the two solution points and

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have been obtained, the derivative with respect to the amplitude is obtained using (3). B. Frequency Derivative For the calculation of , two additional synchronized solutions must be obtained. In this case, the injection level is set to a fixed value and two slightly different frequencies are considered for the injection source. Firstly, the amplitude of is fixed to a relatively low value, , with phase , and the frequency of the generators is set to a value ensuring synchronization, i.e., . Again, the amplitude and phase of the signal generator are adjusted to obtain a minimum at the combiner output and then the values are estimated. Secondly, the procedure is repeated, now considering a negative increment , i.e., . Once the minimum is identified at the combiner output the values are estimated. With the previously obtained data and applying (4), is obtained. C. Varactor-Bias Derivative In a similar fashion, to calculate the varactor-bias derivative using (6), two solutions for two different varactor-bias voltages are needed. For the calculation of this derivative, the amplitude and frequency of are kept to fixed values, and increments in the varactor bias voltage are considered. The same minimum-tracking procedure is applied to obtain and for and , respectively, and using (6), is obtained. D. Injection Source Derivatives

and

For the calculation of the derivatives, and , required for the linearization (7), four extra synchronized solution points are required as demonstrated in (8) and (9). Furthermore, the magnitude of the injection current for each case is also necessary. Note that several alternative procedures are possible for the calculation of these derivatives, as mentioned in Section IV. However, we must keep in mind the limitation in the injection level, which must be relatively small to preserve the linearity of the solution, is still valid. The increments in the amplitude and frequency of the generator must be chosen with a relatively large separation, to minimize the effects of uncertainties in the measurement, which will be treated in detail later in Section VI. Here, we consider the case where the injection signal can be set to a fixed amplitude value that ensures synchronization at four quite-spaced frequency values. For each frequency value, the signal generator is adjusted as described previously to identify the corresponding minimum. To obtain the magnitudes and phases of and , for a particular operation point of the circuit shown in Fig. 6, the set of amplitudes, phases, and frequency for and must be previously adjusted to obtain the minimum of . Once these amplitude and phase values for the generators are obtained in measurement, they are used in the analysis of the alternative equivalent circuit shown in Fig. 7. Using these values, the oscillator output voltage and current, and , are obtained in

Fig. 7. Implemented system to estimate the ADS simulation software.

and

from the measurement in

simulation through an optimization process, calculating these variables to fulfill . This procedure, is used to obtain and in simulation from measured data. It takes advantage of the realistic characterization of the passive elements used in the real measurement assembly being described as two- or three-port networks. This allows taking into account the influence of cable assemblies, adapters, attenuators, circulators, etc., which can be accurately characterized with a network analyzer or using data provided by the manufacturer ( -parameter files). Note that the passive network connecting the circulator and the input generator has to be replaced by a matched load when the injection source is considered to be connected at the input port of the oscillator. Moreover, in this case, the injection current, , used to calculate injection signal derivative, will be the Norton equivalent current obtained from the signal generator amplitude and the network connected between the generator and oscillator injection input port, i.e., attenuators, cables, and transitions. The estimation of all the required magnitudes for the derivatives calculation, based on measurement data, could be summarized as follows. • Adjustment of the amplitude, frequency, and phase values of and for different operation conditions and for the identification of the minimum at . • Optimization with commercial software, using the previously obtained data, for the estimation of the oscillator output currents and voltages. • Calculation of the Norton equivalent current for each synchronized point. • Calculation of the derivatives using proposed expressions. VI. FINAL LABORATORY ASSEMBLY AND CALIBRATION In this section, practical considerations for the calibration of the proposed measurement setup are discussed in detail. For increased accuracy, all subsystems were calibrated from 4 to 16 GHz to cover at least up to the third harmonic frequency of the oscillation frequency of the oscillator shown in Fig. 4, i.e., GHz. An attenuator is introduced between the oscillator and the circulator to reduce possible loading effects derived from the circulator’s return loss at the different harmonic components. Considering that the accuracy of the measured phase of each variable, voltage, or current is critical, a rigorous calibration of

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Fig. 9. Circuit setup used to calibrate the generators.

Fig. 10. Phase reference, , is the difference between initial phase of and initial phase of . If zero power is detected for a phase, the corrected phase shift would be . Fig. 8. Final laboratory assembly used for injecting signal and measuring both currents and voltages in the point of interests. Connections and subsystems have been labeled.

the network analyzer, used to characterize the passive components, is necessary. Additionally, the phase response, due to torsion, of the cables used for calibration and connection of the proposed assembly must be also measured. In this case, the cable assemblies showed phase deviations smaller than 0.25 at constant room temperature (22 C). Foreseeing the continuous connections and disconnections of the cable and terminal load during the measurement procedure, an additional attenuator is used at the oscillator’s injection port to increase the isolation and robustness of the setup. The signal generators used in this assembly were chosen based on their phase-coherent operation capability. The used generators exhibit a phase derivation about 0.05 /day at 5 GHz, which can be considered stable enough and negligible in comparison to noise and frequency instability of the oscillator under test. As will be shown, a phase calibration of the signal generators is necessary after every restart cycle. This is because the initial phase of reference changes after every restart cycle. The possible phase-calibration problems for the signal generators and some considerations about the accuracy of the measurement process will be explained in detail below. A photograph of the final laboratory assembly is shown in Fig. 8, where all main components have been labeled. On the bottom-left corner, the connections for synchronizing the two signal generators are shown. Note that, for a synchronized operation of the generators, they must allow the shared use of the

same internal oscillators, i.e., the 10-MHz reference and the RF local oscillator used for mixing. In the middle left, the photograph shows the VCO under test and the two additional attenuators, described above, connected to the VCO injection input port and between VCO output and the circulator. At the bottom, the power splitter used to monitor the signal through a spectrum analyzer and a power detector is shown. This power splitter, connected to the spectrum analyzer and power detector, replaces the load in Fig. 6. The input of the splitter is connected, using a cable assembly, to the output of the power combiner shown in Fig. 6. The signal generator is connected to one of the inputs of power combiner using a cable assembly, the other input being connected to the circulator port 3. At the top of the photograph, the dc power supply used for biasing the varactor diode can be seen. Note that special attention has been paid to the bending of cable assemblies, avoiding small-radius curves, using right-angle connectors when necessary. However, although the cables used for the connection of the reference oscillator between signal generators are quite curved, this effect is included in the calibration of the signal generators, not representing a major issue. A. Calibration of Signal Generators All passive elements have been calibrated and measured using a network analyzer. The amplitude and phase calibration of the signal generators requires a more specific arrangement, which involves a power detector, spectrum analyzer, and power combiner. Once the passive components, power combiner, cables, etc., have been characterized and included in the calibration process, the power detector is used to verify that the

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TABLE VI GENERATOR STATUS PARAMETERS USED TO CALCULATE REFERENCE PHASES AT SPECIFIC FREQUENCY

output amplitudes of the generators are in conformity with the equipment specifications, i.e., less than 0.02 dB for any specific output amplitude. Notice that these generators include an automatic level control (ALC) option, a set of internal attenuators being switched as the output level is changed. These internal attenuators have different phase shifting. Thus, the calibration of the operation modes for different amplitude levels is required. Once the generators are configured, and the required connections for the phase-coherent operation have been made, an additional calibration is necessary for the accurate measurement of the phases. In every restart cycle, the individual phases values of the generators are set by the firmware to 0 , no matter the real phase difference between them. Thus, the zero value shown in their displays does not guarantee that they are operating in-phase. It has been verified that the displayed phase value does not correspond to the real phase shift between generators, this phase shift being arbitrarily set after phase coherence is achieved in every startup process. This is why an additional calibration is required to determine this arbitrary phase-shift value and accurately measure the phases. However, although the phase shift is arbitrary, once the generators are phase locked this phase shift will remain constant, no matter the variation on the phase value of the signal generators. Thus, when the phase shift between generators has been determined and the phase offset is properly corrected, setting one of the generators’ phase according to the offset, the two generators will be operating in-phase. Therefore, the determination of this phase shift should be the first step in the phase calibration procedure for the signal generators. This phase shift can be determined by setting the output levels to the same value and through a minimum-tracking technique in combination with a power combiner. Due to the ACL mechanism, if the output level of the generators is changed, the phase shift between generators will also change when internal attenuators are switched automatically with the output level, invalidating the previous phase calibration. Fortunately, an internal attenuator can be used in a quite wide range so only a couple of calibrations will have to be performed, corresponding with the necessary attenuator’s change, to cover the required output levels. For this application, three attenuator values are enough to cover a dynamic range from 40 to 0 dBm. This means that the next step should be the calibration of the arbitrary phase shift between generators (reference shift), as a function of each internal attenuator. The circuit arrangement used to calibrate the generators is shown in Fig. 9. To focus on the main problems of the generators calibration, here, cables and transitions are not considered

Fig. 11. Phase reference when the same attenuators are forced in each generator.

Fig. 12. Phase reference when

and

are forced in each generator.

and the power combiner is assumed perfectly symmetric. Setting the output level of the generators to the same value, for a given internal attenuator, the phase on one of the generators is continuously varied and the output of the power combiner monitored with a spectrum analyzer. When a minimum is detected, considering the same amplitude at the inputs of the combiner, the phase shift between the two signals will be 180 . Therefore, to determine the reference phase shift , the same amplitudes are fixed in generators, one generator phase display, , will be initialized to 180 , and the second generator phase, , is adjusted until a minimum level is detected. The resulting phase

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TABLE VII RELATIVE DETECTED LEVEL FROM MAXIMUM WHEN BOTH AMPLITUDE AND PHASE ARE MODIFIED

will be the reference phase shift, as shown in Fig. 10. Furthermore, the relationship for the corrected phase shift, , is given by (12) as follows: (12) where are phases displayed in generators. The signal generators used in this setup switch between different attenuator values in the following ranges: dBm; dBm; dBm. No calibration is performed to determine the attenuator phase shift, and is necessary, as this phase shift is already included in the phase shift between generators. The phase shift between generators can be calculated by comparison. To compare each combination of attenuators, the generator amplitudes have to be fixed to the same value, and then the internal attenuator corresponding to that value have to be forced. The output levels and the corresponding attenuator values used for each reference phase calculation are shown in Table VI. Note that output levels selected for each attenuator combination have to be included into the attenuation range of both generators. On the other hand, when the same attenuation is set in both generators, the absolute phase shift changes in each generator, but the relative phase shift between generators does not change, as can be seen in Fig. 11. Moreover, as shown in Fig. 6, and explained in Section V, is used as the injection generator and is used to determine the VCO output signal through the identification of the minimum amplitude at the combiner output. Thus, amplitude, , will be almost the same for all measurements, 4 dBm for the measured VCO in Section VII. However, amplitude, , can vary from 40 to 0 dBm. Finally, the phase shift between generators for the combination and cannot be calculated directly because there is not any amplitude combination included between both attenuator ranges. For that reason, phase reference when and are present, has to be carried out from other combinations included in Table VI. More precisely, phase shift for and would be , as shown in Fig. 12. Another important consideration to be mentioned is related to possible errors in the measurement. Ideal zero amplitude at the combiner output, i.e., dBm, means the same input amplitudes and 180 phase shift. When input signals are in-phase

and have the same amplitude, the output amplitude is maximum. In out-of-phase operation, if any of the generator amplitudes or phases are slightly modified, that zero condition is no longer fulfilled. Some relative levels from maximum are shown in Table VII when input amplitude and phase are modified from ideal condition, dBm. In fact, when VCO and generator signals are present at the combiner inputs, errors are induced from VCO amplitude and phase fluctuations, and those errors are directly transferred to the measured data used to calculate derivatives. Therefore, Table VII is used to estimate maximum error in measurements. B. Shortcomings of Measurements Due to its autonomous nature, a VCO exhibits instant variations from free-running frequency as part of low stability characteristic. First, when VCO derivatives are obtained in simulation using the AG technique, as described in Section II, a constant value of oscillation frequency and amplitude is assumed. Second, a low injection level has to be used in order to minimize errors, as discussed earlier, but it entails small synchronization curves (Fig. 5). Third, input frequency values close to turning points of the synchronization curves are considerably noisier than frequency values corresponding to the middle region of the curve [18]. Therefore, selected frequencies for extracting derivatives must avoid the noisy region, and it means that it is necessary to increase the injection level, although the basic ellipse (1) will be less accurate. Notice that as the injection level is increased, the Taylor-series expansion will fail to accurately predict the circuit behavior. For relatively large injection levels, the linearization about the free-running solution will simply no longer be valid. If too low injection levels are used in the measurement procedure, both VCO phase noise and low-frequency stability make it quite difficult to obtain reliable measurements. Moreover, the low stability in the free-running frequency implies that bigger frequency increments, , have to be chosen, and in that case, the injection level must be increased again. However, and despite all of these inconveniences, Section VII will demonstrate the robustness of the measurement setup. Low stability of the VCO has a big influence in the detected level used to validate generator parameters. As described in Section V, when minimum level is detected in the output of power combiner, amplitudes, frequencies and phase from generators are acquired because it means that the inputs have equal

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TABLE VIII DATE FOR CALCULATING THE REFERENCE PHASE AS FUNCTION OF FREQUENCY AND INTERNAL ATTENUATOR

TABLE IX MEASURED DATA TO CALCULATE AMPLITUDE, FREQUENCY, AND VARACTOR BIAS DERIVATIVES

amplitudes and a phase shift of 180 . In practice, due to low stability of the VCO, the minimum level (out-of-phase) has been observed to be at least 35 dB lower compared to the maximum level (in-phase). According to Table VII, it corresponds to a phase error under 2 if amplitudes are supposed equals, within a 0.2-dB accuracy, and if the phase shift is assumed 180 . In fact, although a solution with both errors, 2 in phase and 0.2 dB in amplitude, is obtained, the results can be good enough, as will be shown in Section VII.

TABLE X RELEVANT DATA

TO CALCULATE AMPLITUDE, FREQUENCY, AND VARACTOR BIAS DERIVATIVES

VII. MEASUREMENTS AND FINAL RESULTS Using the setup shown in Fig. 8, measurements have been made to characterize the VCO in Fig. 4. Some steps have been added to the sequence proposed at the end of Section V, resulting as follows. • Calibration of the generators in the considered frequency and input amplitude range. • Measurement of the free-running solution: and . • Measurement of the synchronized solutions when injecting the oscillator using the circulator. • Measurement of the synchronized solutions when injecting by VCO input port. • Calculation of the VCO outputs through optimization in combination with measured data. • Calculation of the derivatives using proposed expressions. As mentioned before, the generators exhibit an arbitrary phase shift when they are turned on, this phase shift being different in every startup process. Thus, the first step is the

obtaining of the reference phase as function of both internal attenuators and frequencies, using the circuit assemble shown in Fig. 9. Following the procedure detailed in Section VI, several phase reference points can be obtained for three combinations of internal attenuators and frequencies of interest. The regression line of those phase reference points agrees with the following expression:

(13) The parameter values required for the evaluation of (13) are detailed in Table VIII.

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TABLE XI MEASURED DATA TO CALCULATE INJECTION SIGNAL DERIVATIVES

TABLE XII RELEVANT DATA AND INJECTION SIGNAL DERIVATIVES

The second step is the measurement of the free-running solution. In this case, measuring the oscillator frequency and amplitude, for a given varactor-bias voltage, has been performed at the circulator output, prior to the combiner connection. The reason is that the measured power will be an initial estimation , and therefore, it will of the required level used in generator be a better initial value to search the zero condition in later measurements. Moreover, the circuit in Fig. 9 can be used to set that power lever at the VCO output. Measurements of the data required to calculate the derivatives can then be performed, as previously described in Section IV. The obtained values are detailed in Table IX. For simplicity, the VCO amplitudes and frequencies are referred to amplitudes in generators. Phases are referred to phase values of the generators and the corrected phase shift (13) is considered. Following the procedure detailed in Section IV, data from Table IX is introduced in commercial software to obtain voltages and currents in the VCO output through optimization. Conand replacing the obsidering the Norton equivalent current tained values in the equations derived in Section III, the derivatives can then be directly calculated. Table X summarize the most relevant data measured for the circuit shown in Fig. 4. The calculation of the derivatives with respect to the injection signal requires a minimum modification in the setup shown in and the input load resistor Fig. 6. The signal generator have to be connected in the place of each other. The obtained measurements and the derivatives with respect to the injection signal, obtained with the procedure detailed before, are shown in Tables XI and XII. Note that the oscillator derivatives have been calculated using an input power of 30 dBm. Once all the derivatives have been calculated, the synchronization curves are obtained using the reduced-order model, considering the injection signal at the circulator port and at the

Fig. 13. Synchronized ellipses when an external signal is injected through the circulator, as shown in Fig. 6. The figure shows measured data and ellipses obtained using the calculated derivatives. The considered input power for the derivatives calculation was 20 dBm.

VCO input port, respectively. These curves are compared with measurements and the results are shown in Figs. 13 and 14. Remember that because of the turning points, delimiting the upper and lower sections of the closed curves, only one of these sections is stable, and therefore, measurable [17]. The curves dBm of Fig. 13 are obtained for the injection levels dBm. The solution curves obtained using and the measured derivatives show very good agreement with measurements. On the other hand, injection signal derivatives dBm. In fact, have been obtained considering injected power is about 7 dB smaller due to cable losses and a 6-dB attenuator connected between the VCO and generator. However, curves and data are referred to generator amplitude for the sake of clarity. The solution curves have been calculated from input generator powers that cover the range from 20 to 10 dBm. In Fig. 14, a slight discrepancy between the measurements and simulations can be observed. Notice that the major discrepancies correspond to values close to the turning points of the synchronization curves. Due to the small variations of the output voltage, these discrepancies are apparently large, but they are only in the order of hundreds of microvolts, being similar in magnitude compared with the results obtained in Fig. 13. Taking into account that the derivatives with respect to the injection source are dependent on other derivatives,

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REFERENCES

Fig. 14. Synchronization ellipses when the external generator signal is injected by the VCO input port. Figure shows measured data and ellipses obtained using the calculated derivatives. The considered input power for the derivatives calculation was 30 dBm.

an accumulation error could also be present. However, and despite of all this, there is a very good agreement between the measurements and the results obtained using the reduced-order model with the oscillator derivatives.

VIII. CONCLUSION A new methodological procedure for the experimental characterization of the derivatives of the admittance/impedance function of oscillator circuits has been presented and demonstrated. The new method, based on synchronized measurements, allows the extension of reduced-order models to commercial or third-party oscillator circuits. In this paper, synchronized solutions have been used for the calculation of the oscillator derivatives with respect to frequency, varactor bias voltage, oscillation amplitude, and injection signal. Several modifications have been introduced to the analyzed circuit in order to facilitate the oscillator characterization in an RF laboratory. The results obtained with the proposed procedure and setup have been compared to the results obtained with a reference method. The obtained derivatives have shown very good agreement compared to the reference values. Special emphasis has been made in the relevant aspects concerning the calibration procedure of the measurement assembly. Finally, the new procedure has been applied to the characterization of a VCO at 4.97 GHz with very good agreement between simulation and measurement results.

ACKNOWLEDGMENT The authors are thankful to Prof. A. Suárez, University of Cantabria, Santander, Spain, for thoughtful discussions and to J. D. Santana, Universidad de Las Palmas de Gran Canaria (ULPGC), Las Palmas, Spain, for his help with the prototypes.

[1] J. Choi and A. Mortazawi, “Design of push–push and triple-push osnoise upconversion,” IEEE Trans. Microw. cillators for reducing Theory Techn., vol. 53, no. 11, pp. 3407–3414, Nov. 2005. [2] Y.-L. Tang and H. Wang, “Triple-push oscillator approach: Theory and experiments,” IEEE J. Solid-State Circuits, vol. 36, no. 10, pp. 1472–1479, Oct. 2001. [3] F. Ramirez, M. Ponton, and A. Suarez, “Nonlinear-optimization techniques for quadruple-push oscillators,” in Eur. Microw. Conf., Munich, Germany, 2007, pp. 1169–1173. [4] F. Ramírez, E. de Cos, and A. Suárez, “Nonlinear analysis tools for the optimized design of harmonic-injection dividers,” IEEE Trans. Microw. Theory Techn., vol. 51, no. 6, pp. 1752–1762, Jun. 2003. [5] K. K. M. Cheng and C. W. Fan, “A novel approach to the analysis of microwave regenerative analog frequency dividers,” IEEE Microw. Guided Wave Lett., vol. 8, no. 7, pp. 266–267, Jul. 1998. [6] J. Dixon, “Nonlinear time-domain analysis of injection-locked microwave MESFET oscillators,” IEEE Trans. Microw. Theory Techn., vol. 45, no. 7, pp. 1050–1057, Jul. 1997. [7] K. Kurokawa, “Injection locking of microwave solid-state oscillators,” Proc. IEEE, vol. 61, no. 10, pp. 1386–1410, Oct. 1963. [8] P. Liao and R. A. York, “A new phase-shifterless beam-scanning technique using arrays of coupled oscillators,” IEEE Trans. Microw. Theory Techn., vol. 41, no. 10, pp. 1810–1815, Oct. 1993. [9] A. Georgiadis, A. Collado, and A. Suarez, “New techniques for the analysis and design of coupled-oscillator systems,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 11, pp. 3864–3877, Nov. 2006. [10] A. Suárez, F. Ramírez, and S. Sancho, “Stability and noise analysis of coupled-oscillator systems,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 4, pp. 1032–1046, Apr. 2011. [11] M. Sarkeshi, R. Mahmoudi, and A. van Roermund, “Efficiency analysis of a limit-cycle class-D amplifier with a random Gaussian excitation,” in IEEE MTT-S Int Microw. Symp. Dig., 2009, pp. 1369–1372. [12] T. Piessens and M. Steyaert, “Behavioral analysis of self-oscillating Class D line drivers,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, no. 4, pp. 706–714, Apr. 2005. [13] E. Main and D. Coffing, “An FSK demodulator for Bluetooth applications having no external components,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 49, no. 6, pp. 373–378, Jun. 2002. [14] B. N. Biswas, A. Bhattacharya, P. Lahiri, and D. Mondal, “A novel scheme for reception using active device microstrip antenna,” IEEE Trans. Microw. Theory Techn., vol. 48, no. 10, pp. 1765–1768, Oct. 2000. [15] F. Ramírez, V. Araña, and A. Suárez, “Frequency demodulator using an injection-locked oscillator: Analysis and design,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 1, pp. 43–45, Jan. 2008. [16] V. Araña, A. Collado, and A. Suárez, “Nonlinear synthesis of phase shifters, based on synchronized oscillators,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 11, pp. 760–762, Nov. 2005. [17] A. Suárez, Analysis and Design of Autonomous Microwave Circuits. Piscataway, NJ: IEEE, Jan. 2009. [18] F. Ramírez, M. Pontón, S. Sancho, and A. Suárez, “Phase-noise analysis of injection-locked oscillators and analog frequency dividers,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 2, pp. 393–407, Feb. 2008. [19] K. Kurokawa, “Some basic characteristics of broadband negative resistance oscillator circuits,” Bell Syst. Tech. J., vol. 48, pp. 1937–1955, 1969.

Pedro Umpiérrez was born in Las Palmas de Gran Canaria, Spain, in 1979. He received the Telecommunication Engineering degree from the Universidad de Las Palmas de Gran Canaria (ULPGC), Las Palmas, Spain, in 2006, and is currently working toward the Ph.D. degree at the ULPGC. In 2007, he joined the Signal and Communication Department, ULPGC. His research interests include coupled oscillators arrays analysis for beam steering.

UMPIÉRREZ et al.: EXPERIMENTAL CHARACTERIZATION OF OSCILLATOR CIRCUITS FOR REDUCED-ORDER MODELS

Víctor Araña (A’94–M’05) was born in Las Palmas de Gran Canaria, Spain, in 1965. He received the Telecommunication Engineering degree from the Universidad Politécnica de Madrid, Madrid, Spain in 1990, and the Ph.D. degree from the Universidad de Las Palmas de Gran Canaria (ULPGC), Las Palmas, Spain, in 2004. He is currently an Assistant Professor with the Signal and Communication Department, ULPGC. He has been the leading Researcher in several Spanish research and development projects and has taken part in a number of Spanish and European projects in collaboration with industries. His research interests include the nonlinear design of microwave circuits, control subsystem units, and communications systems applied to data acquisition complex networks.

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Franco Ramírez was born in Potosí, Bolivia. He received the Electronic Systems Engineering degree from the “Antonio José de Sucre” Military School of Engineering (EMI), La Paz, Bolivia, in 2000, and the Ph.D. degree in communications engineering from the University of Cantabria, Santander, Spain in 2005. He is a Research Associate with the Communications Engineering Department, University of Cantabria, Santander, Spain, working under the Ramón y Cajal Programme of the Spanish Ministry of Science and Innovation. His research interests include phase noise, stability, and the development of nonlinear techniques for the analysis and design of microwave circuits.

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Surface-Charge-Layer Sheet-Resistance Measurements for Evaluating Interface RF Losses on High-Resistivity-Silicon Substrates S. B. Evseev, L. K. Nanver, Member, IEEE, and S. Milosaviljević

Abstract—Surface-charge-layer sheet resistance SCLcurrent–voltage differential measurements on ring-gate metal–insulator–semiconductor field-effect transistor structures are proposed as an alternative to -parameter transmission line and capacitance–voltage measurements to evaluate the interface RF losses on high-resistivity-silicon substrates. Argon implantation is employed to amorphize the silicon surface, thus increasing . The RF attenuation decreases as increases, the SCLif other microwave losses (substrate, metallization, and radiation losses) are kept at the same low level. Full suppression of the surface losses is achieved for high-dose implants, giving SCL6.0 10 , minimum RF losses and voltage independent behavior of both parameters. Index Terms—Argon implantation, coplanar waveguides (CPWs), high-resistivity silicon (HRS), microwave attenuation, metal–insulator–semiconductor field-effect transistor (MISFETs), sheet resistance.

I. INTRODUCTION

C

OPLANAR waveguides (CPWs) on high-resistivity-silicon (HRS) substrates are routinely used in silicon (Si) monolithic microwave integrated circuits (MMICs) as interconnects because these substrates have much lower RF losses than low-resistivity silicon (LRS). To obtain an efficient power transfer and input/output at high (gigahertz) frequencies, it is important to design low-loss bias independent transmission lines (TLs). It is well known that there are several factors contributing to the total CPW losses: substrate losses, metallization losses (“skin effect”), interface or surface-charge-layer (SCL) losses, and radiation losses [1]. The focus of this paper is on the SCL losses, which are normally bias-dependent losses and the main source of attenuation in RF CPWs fabricated on high-quality HRS substrates. More specifically, a relationship between SCL related losses and the sheet resistance of the SCL is established by using a current–voltage (I–V) measurement technique described in [2]. These bias-dependent SCL losses are mainly responsible for the RF CPW attenuation in high-quality HRS substrates with thick metallization layers. Over the last years, several new processing techniques have been developed Manuscript received January 21, 2012; revised July 27, 2012 and August 03, 2012; accepted August 09, 2012. Date of publication September 14, 2012; date of current version October 29, 2012. The authors are with the Delft Institute of Microsystems and Nanoelectronics (DIMES), Delft University of Technology, Delft 2600 GB, The Netherlands (e-mail: [email protected]; [email protected]; [email protected]). Digital Object Identifier 10.1109/TMTT.2012.2215050

such as amorphous ( -Si) [3] or poly-crystalline Si (poly-Si) depositions [4] including a rapid thermal annealing (RTA) option to transform -Si into poly-Si [5], a thin nano-crystalline silicon (nc-Si) layer made by hot-wire chemical vapor deposition [6], and an amorphizing Ar implantation [7], [8], to substantially reduce or completely eliminate the SCL losses. All these methods are designed to reduce the crystallinity of the semiconductor surface layer. The amorphizing Ar implantation produces a large lattice disorder, dislocations, and crystal defects in the Si and a certain amount of implanted atoms is maintained in the Si crystal after the implantation [9]–[11]. However, it is acknowledged that such an Ar implantation is mostly defect and not chemical dominated due to the noble nature of the Ar atoms [9]. Beyond a certain dose and energy, the Ar implanted region is completely amorphized due to a full phase transition from crystalline (c-Si) to an -Si layer. For example, 100% of -Si is observed in [11] for an implantation energy of 150 keV at an Ar dose from 2 10 to 6 10 cm . The aim of the Ar implantation is thus to reduce the mobility and the number of free carriers, and thus increase the resistivity at the interface between the dielectric and Si. In effect, TL structures are generally processed as metal–insulator–semiconductor (MIS) structures, which can be brought from accumulation through depletion into inversion and vice-versa by sweeping the applied bias, thus inducing accumulation/inversion SCLs that become a source of losses. Apart from the actual high-frequency -parameter measurements, the customary way of characterizing such MIS structures is by capacitance–voltage (C–V) measurements, which has been extensively used to study the quality of the different passivation techniques, as for example, in [1] and [3]–[5]. However, neither a single dc parameter (quality factor), nor method has been proposed to characterize the SCL losses caused by mobile carriers at the interface between the dielectric and Si. Besides the applied bias voltage, these losses depend on many other process and design parameters, such as substrate doping or resistivity; interface state density , dielectric charge, and the geometry of the TL. The expediency with which C–V measurements, such those presented in [1] and [3], can be used to characterize SCLs is to some degree limited to the case where thermal oxides are grown on LRS wafers. When other dielectrics or multilayered stacks are deposited, C–V tests are often poorly reproducible from test-to-test due to the local charge trapping/de-trapping in the dielectrics and interfaces that give nonideal effects such as hysteresis and nonmonotonous behavior. Moreover, due to the extremely high series resistance of the HRS substrate, the true

0018-9480/$31.00 © 2012 IEEE

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MEASUREMENTS FOR EVALUATING INTERFACE RF LOSSES ON HRS SUBSTRATES

capacitance values may be underestimated, particularly at high frequencies, where the measurements are preferably conducted due to the reduced measurement noise. It should also be noted that no single C–V parameter has been identified to characterize the SCL losses so that a straightforward comparison between different RF passivation materials or techniques can be made. The is mainly determined, but only partially gives information on the SCL behavior, and for Si surfaces that are far from crystalline, this parameter cannot be extracted. For amorphous Si surfaces for which C–V data can be obtained, an almost constant capacitance value as a function of biasing is a clear indication that a high level of amorphization, and thus also RF passivation, has been obtained. However, the C–V analysis does not deliver a single number to express this. An alternative approach to the C–V characterization based on -parameter measurements has been proposed where the concept of effective resistivity, , is introduced to describe the effectiveness of the surface passivation [12]. However, it is acknowledged that the extraction procedure will be influenced by the TL dimensions and metallization losses, which are physically not related to the properties for which should be a quality factor. For process development of passivation layers, -parameter measurements may also be a complex and costly solution, requiring special network analyzers (NWAs) and the necessary RF calibration and de-embedding may be time consuming. In contrast to the C–V and -parameter methods described above, the I–V method presented in this study supplies a practical parameter that is directly related to the electrical and physical properties of charge carriers at the interface with the passivation layer. Specially designed, but very simple ring-gate MISFET structures are processed along with the TLs, and with these, measurements can be made for extracting a value for the space charge layer (SCL) sheet resistance, , as first introduced in [2]. In this paper, particularly the situation where the Si surface is passivated by an Ar implantation at different doses is investigated. The SCL is readily measured as a function of applied biasing voltage, and will depend on all factors that influence the electrical state of the Si surface, such as the dielectric layer thickness and charges , interface charges , interface state density , and substrate doping . Geometry dependencies and parasitic resistances are eliminated by employing a differential measurement technique. The RF losses determined by -parameter measurements of these TL structures are compared to the SCL , which is found to be very sensitive to variations in the losses related to both the Ar implantation dose and post-processing anneals. The latter may give some measure of re-crystallization of the amorphized Si surface layer, thus decreasing SCL , [5]. II. EXPERIMENTAL PROCEDURES An example of a ring-gate MISFET test structure is illustrated by the photographic image in Fig. 1 and the corresponding schematic cross sections are given in Figs. 2 and 3. Only one metallization layer is applied and the large metal circle in the

Fig. 1. MISFET ring-gate structure with gate length drain distance is 38 m) used for differential SCL-

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m (source-tomeasurements.

center functions both as a contact to the drain region and as a measurement pad. This pad is completely surrounded by a closed metal gate ring, thus avoiding the need to isolate the ends of the gate, and also no second metal is necessary for contacting the drain. The next ring is the source contact and the outer ring is the substrate contact. The source, gate, and substrate rings are connected to square measurement pads. The HRS substrates used in this study are p-type 2–4-k cm (100) 100-mm wafers. First, a 30-nm thermal oxide is grown on each wafer. Through this oxide layer, source and drain regions are implanted with P , 40 keV, 5 10 cm . The substrate contact was made with a 67-keV BF implant to a dose of 5 10 cm patterned on the front of the wafer and with a 40-keV B 5 10 cm implant on the backside of the wafer. The implantations are thermally activated by annealing in a furnace at 900 C for 20 min. The thermal oxide is then removed by wet etching and a stack of 200-nm PECVD TEOS oxide plus 500-nm PECVD oxide is deposited at 400 C to create an isolation layer similar to what is normally used in our TL circuits [14]. A number of dies are then implanted with Ar at 500 keV through a 4- m-thick resist mask that defines the region under the gate to be implanted. Five different implantation doses are applied: 0, 5 10 , 1 10 , 2 10 , and 5 10 cm . Half of the dies are left unimplanted for reference purposes. The other half are implanted with Ar up to amounts that can fully amorphize the Si surface [5]. Contact windows are then plasma etched to the implanted regions for source/drain (S/D) and substrate contacting. After a dip-etch in 0.55% HF to remove native oxide, they are metallized with a 1.4- m-thick layer of sputtered Al/Si(1%), which is also patterned by plasma etching. In the standard process scheme, the processing is completed with an alloy in forming gas anneal at 400 C. In [5], it was shown that this temperature does not modify the effectiveness of the Ar implant, whereas temperature treatments above 500 C do. Therefore, a subsequent post-processing anneal at 500 C was also performed and the wafers were completely measured before and after the 500 C anneal.

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Fig. 2. Schematic cross sections of two adjacent ring-gate MISFET structures with different gate lengths and without Ar implantation as used to calculate . the differential SCL-

The I–V measurements are performed with an Agilent 4156C parameter analyzer on a Cascade Microtech probe-station equipped with DCM200 probes that have a negligible probing series resistance. The CPW -parameter measurements are performed using a Cascade Microtech probe station equipped with ground–signal–ground (G–S–G) high-frequency Infinity probes with a 100- m pitch. An HP8510C NWA operating from 45 MHz to 30 GHz in frequency is employed. An HP4142B modular source is used to apply a dc bias on the signal conductor with respect to the ground conductor and wafer chuck. Fig. 4 shows a schematic 3-D representation of the CPW structure used for the scattering parameter ( -parameter) measurements from which the RF losses are extracted. When an Ar implant is applied, it completely covers the whole Si surface under the CPW structure. The length of the CPW TLs is 0.95 cm, the width of the ground planes is 400 m, the signal line width is 50 m, and the slot gap is 23 m. The CPWs are

Fig. 3. Schematic cross sections of two ring-gate MISFET structures with the , but with two different Ar implantation lengths same gate length, used to calculate the differential SCL. is calculated as indicated in Fig. 2.

designed with a characteristic impedance of 50 RF loss is calculated as Loss

dB cm

and the total

(1)

where and are the transmission and reflection -parameters, respectively, and is the TL length in centimeters. Electromagnetic (EM) simulations were performed with ANSYS (Ansoft) High Frequency Structure Simulation (HFSS) software [13] to estimate the substrate losses and substantiate the experimental measurement results. The substrate losses were estimated to be less than 6% of the total RF loss III. EXTRACTION OF SCLSets of the circular ring-gate MISFETs are designed with the purpose of extracting parameters related to the laterally uniform

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described in [2]. By subtracting the measured S/D resistances and from each other, the differential resistance can then be found as (3) with (4) Fig. 4. Schematic representation of CPW TL used for ments.

-parameter measure-

and (5)

part of the gate region by differential measurements. In Fig. 1, an example is shown of a transistor with a gate length of 40 m. In each set of transistors, the radius to the center of the gate is the same for all devices as marked with a dashed line. Thus, the width of the gate, , can be defined at the center and the total gate perimeter is in all cases. The on-mask metal–gate length is varied and because the depletion widths around the S/D reverse-biased n p diodes are very wide in HRS, around 20 m at zero bias, gate lengths much longer than this are designed. For the results presented here, m, m, and or m. The test structures are used to extract the laterally uniform SCL sheet resistance, , of the surface channel charge under biasing conditions that allow the formation of an inversion layer in most cases. This is achieved for a gate–source voltage, , which is above the threshold voltage, , and a drain–source voltage, , that is well below the pinch-off point, , in the linear part of the output characteristic. The measured S/D resistance is found as (2) Below , the device is in accumulation/depletion and the only currents that then contribute to are the S/D reverse and gate leakage currents. To extract , a differential measurement technique is applied to eliminate the series resistance associated with the S/D contacts and measurement probes that cannot be measured directly [2].

A. Structures Without Ar Implantation In each set of transistors, the total gate perimeter is independent of the gate length and they contain devices each designated in the following by the index , and organized so that , and . In Fig. 2 the cross section of two devices and are shown with the resistive path between source and drain divided into lumped resistors: and are the series resistance of the external source and drain regions, respectively, and is the resistance of the channel. Since the structures are ring shaped, and in some cases, , the radial spreading of the current must be taken into account as

The sheet resistance is therefore proportional to (6) with the radial proportionality factor defined as (7)

B. Ar Implanted Structures The approach described in Section III-A cannot be directly applied if the whole channel region were to be implanted with Ar because the implant would destroy the crystallinity of the Si, resulting in high S/D leakage currents. This induces a high current parallel to the channel current that then cannot be measured on its own, as is described in [2]. To nevertheless make the determination of of the Ar implanted regions possible, a modified differential procedure has to be applied by which only the center of the channel region is implanted with Ar away from the S/D implants. This is illustrated in Fig. 3, where two ring-gate MISFET structures with the same gate length m , but with two different lengths of the Ar implanted channel region, with , are shown together with the lumped resistors used to differentially calculate . In this case, the parasitic source and drain resistances are defined up to the Ar -implanted region given by of the larger from structure. Subtracting the measured resistance then gives (8) The unimplanted channel resistances and can be calculated from measurements on nonimplanted sets of test structures by (4) and (5), as illustrated in Fig. 2. The differential measured resistance can then be found as

(9)

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Since the Ar implant is placed at the center of the gate, . Additionally, and , and further optimization using (6) yields (10) with the radial proportionality factor defined as (11) By plotting for all the possible combinations of Ar imand within test-structure sets with planted gate lengths a fixed gate length as a function of the radial correction factor , the value of can be extracted, and since is determined from the (6). thus also In the structures available in this study, the Ar implant has a center radius of m. In all cases, the gate length m and the different Ar implantation lengths are is and , , , and m. In addition, it should be noted that instead of (10), the could alternatively be determined by (12) with the same proportionality factor as defined by (11). In practice, because and , the exact (10) and (12) can be replaced by the approximation (13) Equations (6) and (13) will be applied in the current paper to calfor unimplanted and Ar implanted cases, culate the SCL respectively.

Fig. 5. SCL differential measurements. (a) Unimplanted (bias-dependent filled symbols) and (b) with Ar implantation of 5 10 cm (bias-independent empty symbols).

IV. ELECTRICAL MEASUREMENT RESULTS

TABLE I DIFFERENTIAL MEASUREMENT RESULTS FOR UNIMPLANTED AND SCL Ar IMPLANTED SAMPLES BEFORE AND AFTER ANNEAL AT 500 C

A. Sheet Resistance Measurements In Fig. 5(a) and (b), plots are shown of the differential resistance measurements that are used as a basis for calculating SCL , as performed on (a) unimplanted and (b) Ar implanted MISFETs. In the unimplanted situation shown in Fig. 5(a), the resulting SCL values are clearly bias dependent, going from 1.2 10 and 1.0 10 to 9.2 10 for and V, respectively. In contrast, the results of the implanted case in Fig. 5(b) are in effect bias independent with SCL , a value which is almost two decades higher than without implantation. Moreover, the spread of the measurement data is larger in the implanted case. This aspect is verified by the relative standard deviation values (RSD%) included in the linear regression analysis presented in Table I, where an overview is given of the sheet resistance found on all types of samples. For unimplanted samples, the RSD% is around 1%, while Ar -implanted samples are more scattered with RSD% values going from 2% up to 11% in the worst case. This scattering of the data is to be expected since for Ar passivated samples, the characteristics of an amorphized Si-surface layer is much less controllable and reproducible than that of a crystalline Si surface. For the samples annealed at

500 C after implantation, the sheet resistance returns to values in the 10 10 range, close to the nonimplanted values, but with the difference that the relative spread is comparable to that of the implanted samples. In Fig. 6, a comparison is made of the SCL for all the different samples. The values increase with implantation dose up until a dose of 2 10 cm , where it saturates at about

EVSEEV et al.: SCL-

MEASUREMENTS FOR EVALUATING INTERFACE RF LOSSES ON HRS SUBSTRATES

Fig. 6. SCL measured at 10-V gate bias versus Ar before and after a 500 C post-processing anneal.

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implantation dose Fig. 8. RF loss at 30 GHz from Ar implanted samples.

10- to

10-V biases for unimplanted and

TABLE II RF MINIMUM AND MAXIM LOSSES MEASURED AT 30 GHz FOR 10- AND 10-V BIASING, RESPECTIVELY, FOR SAMPLES WITH AND WITHOUT Ar IMPLANTATION BEFORE AND AFTER ANNEALING AT 500 C

Fig. 7. RF loss versus frequency at negative 10 V and positive 10 V biases for 5 10 cm Ar implantation dose (empty symbols) and unimplanted (filled symbols) samples.

6.0 10 , almost four decades higher than the nonimplanted value. After annealing, there is a very slight increase of sheet resistance with an implantation dose, but essentially all the implanted samples have a value that is about six times higher than the nonimplanted samples. The anneal does not affect the nonimplanted sample, but the recrystallization that it induces in the implanted samples is quite efficient although apparently not complete. This is in accordance with the expected epitaxial regrowth leaving some residual defects particularly at the interface due to the presence of the argon under the oxide. B. Measurement of RF Losses The measurements of the RF losses follow the same trends as the sheet resistance measurements. In Fig. 7, the losses are plotted as a function of frequency at two different signal line biases, 10 and 10 V, for nonimplanted and Ar implanted (5 10 cm ) TLs. Again the nonimplanted sample shows a clear bias dependence whereas this is suppressed by implantation. Moreover, the desired lower losses are achieved.

The bias dependence from 10- to 10-V signal line voltage at 30 GHz is displayed in Fig. 8 for all implantation doses. Along with the suppression of the bias dependence, the implantation also gives a significant decrease of the losses from 9 dB/cm to less than 2 dB/cm. There is a slight decrease of the losses with increasing implantation dose up until 2 10 cm for which a minimum value is reached. For the unimplanted case Ar , it should be noted that the curve does not reflect any transition from accumulation to inversion, which would be characterized by a minimum in the values of the losses [1]. This is due to the fact that a high (positive) dielectric charge shifts the flatband voltage to (negative) values beyond the 10- to 10-V applied voltage sweep. The RF results, also for post-implant annealed samples, are summarized in Table II and the implantation dose dependence is plotted in Fig. 9. From this graph, it is clear that the increase in losses after annealing of the implanted samples remains quite constant between 0.5–0.6 dB/cm for all implantation values and there is no bias dependence. This is a quite small change as compared to the decades large change in sheet resistance. This

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Fig. 9. Minimum RF losses at GHz versus different Ar implantation doses before and after 500 C post-processing anneal.

probably also reflects the fact that the epitaxial re-growth of the Si during annealing leaves enough damage at the Si surface to suppress changes in the depletion of the re-crystallized Si that nevertheless provides a lower resistive path for the mobile carriers in the inversion layer. The anneal also gives a slight 2-dB/cm reduction of the losses of the nonimplanted sample at 10 V, suggesting that the anneal has altered the conditions in the oxide and/or at the interface. V. DISCUSSION The relationship between the RF losses and SCLis shown in Fig. 10 by plotting the losses at a frequency of 30 GHz and a biasing of 10 V against the corresponding sheet conductance SCLSCL. The losses decrease with decreasing SCLand appear to saturate around 1.7 dB/cm for the two highest implantations doses (un-annealed) that give decades lower conductance than the lighter Ar implants. In the past, it was demonstrated that a similar degree of amorphization used to achieve surface-passivated HRS resulted in a substrate for microwave applications that could be accurately described by its bulk properties [14]. In the latter reference, the impact of surface effects was studied experimentally and via simulations for lumped (inductor and transformer) and distributed (TL and Marchand balun) passive components, as well as a 7.5-GHz traveling-wave amplifier. It was concluded with the passivation implant that the surfaces losses and parameter variations across the wafer were so small that they did not influence the circuit performance. The SCLis a much more sensitive measure of the inversion charge at the surface: even a change of a few percent in losses corresponds to decades of difference in conductance. This is also confirmed by HFSS EM simulations conducted with a screening impedance method using a standard aluminum conductivity of 3.8 10 S/m, an Si substrate conductivity of cm , and SCL sheet resistance and sheet reactance values that were chosen to be equivalent to each other in the first approximation to compensate for the additional coupling capacitance arising between the inversion

Fig. 10. Experimental and HFSS simulation results of the total TL losses at conduction at 10 V, indicating the regions where a 30 GHz versus SCLthe amorphization of the surface is either minimal, allowing strong inversion, or complete so that there is no inversion, as well as the transition region with weak inversion.

layer and the Al. The simulation results are included in Fig. 10, showing that an excellent agreement between the experimental and simulated results is obtained for the full range of SCLvalues. The conductivity of the surface will depend on the degree of disorder created by the Ar implantation, which can be physically explained by trapping centers that arise due to the tails of localized states in amorphous Si, as suggested in [15]: the higher the Ar implantation dose, the higher the number of traps due to Si amorphization. The bias dependence will depend on the ability to create a inversion layer. When any large amount of defects is created at or in the vicinity of the interface, the formation and maintenance of a full SCL is not possible. For the two lighter implantation doses, a slight bias dependence can still be identified when plotting the transconductance as a function of applied gate voltage , as seen in Fig. 11 for Ar implantation length m and gate length m where the applied mV is much smaller than V. This suggests that some weak inversion remains after the 5 10 cm and cm Ar implants, while it is completely suppressed by the 2 10 and 5 10 cm implants. The different conductivity regions are indicated in Fig. 10. The physical change in SCLmay be explained by two effects. For the first, there is a change in the number of free electrons in the inversion layer (inversion layer charge) due to Ar implantation, and secondly, there is a change in the carrier mobility induced by Ar implantation as given by SCL-

(14)

where is the elementary charge, is the number of free electrons in the inversion layer, is the electron effective mobility, and is the inversion layer charge. The change in the quality parameter SCL(or inverse parameter SCL) can directly be related to the change in SCLrelated microwave losses. There are several other individual parameters that influence these losses and they contribute to the final SCLvalue. For example, two samples may have

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created under the gate and it is reasonable to assume that any accumulation layer that may form will not contain enough charge with enough mobility to have any further impact on the RF losses. This conclusion can also be deduced from Fig. 8 due to the constant losses in accumulation, depletion, and inversion. On the other hand, if the SCLis low 10 and bias dependent, the inversion charge can be easily formed and bias-dependent losses will be present in both accumulation and inversion. To measure the of the accumulation layer, it would be necessary to isolate this layer (e.g., with junction or oxide isolation) from the rest of the substrate and these are not readily available. VI. CONCLUSIONS

Fig. 11. Ring-gate MISFET transconductance for a maximum length m and gate length m versus gate bias for different Ar implantation doses.

the same interface trap density , but different inversion layer charge due to, e.g., different fixed dielectric charge , which will result in different microwave losses. Or two samples may have the same fixed dielectric charge , but different effective mobility in semiconductor due to, e.g., different interface trap density . Different would also mean a difference in interface trapped charge, , which will also influence the . All these physical parameters ( , , , and ) will contribute to the single quality parameter SCL, which gives a direct correlation to the RF losses, as shown in Fig. 10. The SCLvalues correlate well with the substrate losses for HRS substrates with 2–4-k cm bulk resistivity. However, when the substrate resistivity is decreased toward LRS substrate values, the substrate losses will drastically increase and become dominant at some point. This point may be estimated by EM simulations or by the following equation for an infinite substrate thickness [1]: (15) and are the effective dielectric constant and the where substrate resistivity, respectively. From this equation, it is found that if the substrate resistivity is reduced from 2 to 4 k cm to 200 cm, then the substrate losses will increase from 0.1 to 1.6 dB/cm and become comparable to the total minimum RF losses of 1.7 dB/cm for the presented CPW lines. Thus, for mediumto low-resistivity substrates, a weak to negligible correlation between SCLand RF losses may be expected. The same conclusion can be drawn from the EM simulations. Finally, on a p-type HRS substrate, we can only study the inversion layer and not the accumulation layer behavior: a useful p-type MISFET cannot be created because the p-type S/D regions will be shorted to the substrate and this short will dominate the I–V characteristics. However, with n-type MISFETs, as in our case, if the measured SCLin inversion is high 10 and constant it means that no inversion layer is

The determination of the SCLby resistance measurements on ring-gate MISFET structures has been demonstrated to be a very sensitive method of evaluating the surface conductivity that governs the parasitic SCL RF losses. It allows the direct comparison of different passivation techniques on HRS substrates independent of other variable factors such as TL geometry and metallization thickness. In the presented experiments using Ar implantations to amorphize the Si surface, the SCLcan be employed as a single parameter to describe the interface-related losses. The experimental and simulation results show that a full suppression of the space-charge layer formation is only reached for very high implantation doses above 2 10 cm , which increase the SCLby decades to 6.0 10 while the minimum losses are achieved. This condition also correlates to a voltage-independent behavior of both the SCLand RF losses. REFERENCES [1] C. Schöllhorn, W. Zhao, M. Morschbach, and E. Kasper, “Attenuation mechanisms of aluminum millimeter-wave coplanar waveguides on silicon,” IEEE Trans. Electron Devices, vol. 50, no. 3, Mar. 2003. [2] S. B. Evseev, L. K. Nanver, and S. Milosaviljević, “Ring-gate MOSFET test structures for measuring surface-charge-layer sheet resistance on high-resistivity-silicon substrates,” in IEEE Int. Microelectron. Test Structures Conf., Mar. 2006, pp. 3–8. [3] B. Rong, J. N. Burghartz, L. K. Nanver, B. Rejaei, and M. van der Zwan, “Surface-passivated high-resistivity silicon substrates for RFICs,” IEEE Electron Device Lett., vol. 25, no. 4, pp. 176–178, Apr. 2004. [4] H. S. Gamble, B. M. Armstrong, S. J. N. Mitchell, Y. Wu, V. F. Fusco, and J. A. C. Stewart, “Low-loss CPW lines on surface stabilized highresistivity silicon,” IEEE Microw. Guided Wave Lett., vol. 9, no. 10, pp. 395–397, Oct. 1999. [5] D. Lederer and J. P. Raskin, “New substrate passivation method dedicated to HR SOI wafer fabrication with increased substrate resistivity,” IEEE Electron Device Lett., vol. 26, no. 11, pp. 805–807, Nov. 2005. [6] C.-J. Chen, R.-L. Wang, Y.-K. Su, and T.-J. Hsueh, “A nanocrystalline silicon surface-passivation layer on an HR-Si substrate for RFICs,” IEEE Electron Device Lett., vol. 32, no. 3, pp. 369–371, Mar. 2011. [7] A. B. M. Jansman, J. T. M. van Beek, M. H. W. M. van Delden, A. L. A. M. Kemmeren, A. den Dekker, and F. P. Widdershoven, “Elimination of accumulation charge effects for high-resistivity silicon substrate,” in Proc. Eur. Solid-State Device Res. Conf., 2003, pp. 3–6. [8] E. Valetta, J. van Beek, A. den Dekker, N. Pulsford, H. F. F. Jos, L. C. N. de Vreede, L. K. Nanver, and J. N. Burghartz, “Design and characterization of integrated passive elements on high-ohmic silicon,” in IEEE MTT-S Int. Microw. Symp. Dig., 2003, vol. 2, pp. 1235–1238. [9] P. Revesz, M. Wittmer, J. Roth, and J. W. Mayer, “Epitaxial regrowth of Ar-implanted amorphous silicon,” J. Appl. Phys., vol. 49, no. 10, Oct. 1978. [10] J. F. Gibbons, “Ion implantation in semiconductors—Part II: Damage production and annealing,” Proc. IEEE, vol. 60, no. 9, pp. 1062–1096, Sep. 1972.

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[11] A. G. Cullis, T. E. Seidel, and R. L. Meek, “Comparative study of annealed neon-, argon-, and krypton-ion implantation damage in silicon,” J. Appl. Phys., vol. 49, no. 10, pp. 5188–5198, Oct. 1978. [12] D. Lederer and J.-P. Raskin, “Effective resistivity of fully-processed SOI substrates,” Solid State Electron., vol. 49, no. 3, pp. 491–496, 2005. [13] Ansoft High Frequency Structure Simulator (HFSS), Release 12.1. ANSYS Inc., Canonsburg, PA [Online]. Available: http://www. ansys.com [14] M. Spirito, F. M. De Paola, L. K. Nanver, E. Valletta, B. Rong, B. Rejaei, L. C. N. de Vreede, and J. N. Burghartz, “Surface passivated high-resistivity silicon as a true microwave substrate,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 7, pp. 2340–2347, 2005. [15] M. H. Cohen, “Review of the theory of amorphous semiconductors,” J. Non-Crystalline Solids, vol. 4, pp. 391–409, 1970.

S. B. Evseev, photograph and biography not available at time of publication.

L. K. Nanver (S’82–M’83), photograph and biography not available at time of publication.

S. Milosavljević, photograph and biography not available at time of publication.

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 11, NOVEMBER 2012

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16-Term Error Model in Reciprocal Systems Kimmo Silvonen, Krista Dahlberg, Student Member, IEEE, and Tero Kiuru, Member, IEEE

Abstract—By taking reciprocity of the error network into account, full and accurate calibration of a 16-term error model can be performed using only four two-port calibration standards or termination pairs. Moreover, there is no need for a nonsymmetrical calibration standard that is strictly required in a more conventional five-standard calibration. Commercially available standard substrates can thus be used. Detailed theory of the reciprocal 16-term error model and a new calibration method are presented. Reciprocity assumption is valid in on-wafer and other measurements when two-tier calibration is applied. However, the calibration scheme allows measurement of nonreciprocal devices too. The usefulness of the new method is confirmed by practical wideband on-wafer measurements. Index Terms—Calibration, network analyzer (NWA), on-wafer measurement, RF device modeling, scattering parameter measurement, 16-term error model.

I. INTRODUCTION

B

ESIDES network analyzer (NWA) and wafer prober calibration [1], [2], different versions of the 16-term error model have gained a lot of interest in the measurement of semiconductor chip scattering parameters, where the parasitics are modeled as a four-port [3], [4]. A possibly nonreciprocal device-under-test (DUT) is typically embedded in a reciprocal error network that is situated between the DUT and a calibrated NWA. A similar 16-term model is also applied to measurement of passive four-port circuits [5], [6]. A common feature to the two cases is the (partial) reciprocity of the system. In general, calibration of the full 16-term model would require five two-port calibration measurements. The 16 equations based on four two-port measurements have only rank of 14, as shown in [7] and [8]. The calibration standards may consist, for example, of different pairs of match, short, or open, in addition to the thru and/or a delay line. At least one of the standards must be nonsymmetrical (NWA Port 1 versus Port 2) in all nonsingular five-standard calibration schemes. A complete listing of

Manuscript received February 03, 2012; revised August 10, 2012; accepted August 10, 2012. Date of publication September 21, 2012; date of current version October 29, 2012. This work was supported in part by the European Space Agency (ESA) Space Research and Technology Centre (ESTEC) under Contract 4000103195. K. Silvonen is with the Circuit Theory Group, Department of Radio Science and Engineering and the School of Electrical Engineering, Aalto University, Espoo FI-00076, Finland (e-mail: [email protected]). K. Dahlberg is with MilliLab, the Centre of Smart Radios and Wireless Research (SMARAD), the Department of Radio Science and Engineering, and the School of Electrical Engineering, Aalto University, Espoo FI-00076, Finland. T. Kiuru is with MilliLab, VTT Technical Research Center of Finland, Espoo FI-00045, Finland. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2217150

the different theoretically possible sets of calibration standards is found in [9]. One of the parameters in an -term error model can always be considered a common scaling factor. Thus, only parameters have to be solved (cf. the so-called 15-term error model [10]). A unique solution can be found from linear equations using only four standards if at least one of the remaining 15 error parameters can be assumed known. The possibilities for reducing the number of unknowns include reciprocity and symmetry conditions [11], [12] or neglecting one or more of the weak leakage paths [13]. The latter procedure was chosen in [4]. In [5] and [6], the scaling factor was solved based on reciprocity, but the reciprocity was not used to reduce the number of calibration standards and corresponding equations. In this paper, the solution is fully based on the reciprocity conditions. The main advantage of the present method is its ability to exactly calibrate the 16-term error model, while only four two-port standard measurements are needed. We do not need any nonsymmetrical custom-made standard pairs (like short-match or open-short) in the calibration set. Yet, such pairs may be used when available. The requirement of a nonsymmetrical standard would make it difficult to use typical commercially available calibration substrates, like Cascade Microtech impedance standard substrate (ISS), with the five-standard 16-term calibration. By leaving out the fifth, possibly less accurate, standard, the calibration accuracy may be improved when compared to the five-standard case. Unlike the conventional eight- or 12-parameter calibration schemes, like line-reflect-line (LRL), line-reflect-match (LRM), short-open-load-thru (SOLT), etc., 16-parameter calibration can also be used in the presence of leakage paths between the DUT terminals. The application range of the described method is limited to de-embedding of reciprocal error networks or parasitics with a pre-calibrated NWA. It is possible to apply the method in modeling directional couplers or other passive four-port networks. Nevertheless, this is an often encountered problem, which is, in practice, solved by a wide variety of methods. The procedure shown here is an accurate closed-form solution that does not involve any approximations or restrictions concerning the DUT. II. THEORY A 16-term error network is defined by four 2 2 -parameter matrices or -parameter matrices as follows [14], [15]:

0018-9480/$31.00 © 2012 IEEE

(1)

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Fig. 1. DUT embedded in an error four-port . A calibrated NWA is connected to ports 0 and 3, representing analyzer ports 1 and 2.

(2)

where and are the incident and reflected voltage waves at the measurement and DUT ports (Fig. 1). The relation between error submatrices or and measured -parameters of a standard or DUT defined by -parameters is as follows [14]: (3) (4) Alternative formulations, based on voltages and currents rather than scattering parameters, were presented in [16]. Due to the linearity of the latter equation, each element of the -matrix can be scaled by a common factor . A scaling of the -matrix is also partly allowed if correctly done. Since each one of the -parameters can be scaled by dividing it by , the same procedure is applicable to the quadrants of the -matrix [9]

dent of the signal direction. There are thus only nine different error terms in a reciprocal 16-term error model if one of the parameters is used for arbitrary scaling. This suggests trying the calibration with only three two-port calibration measurements as in the original Super-TSD approach [14]. In [9], it was concluded that the Super-TSD algorithm gives correct results only under certain rare conditions. Even under reciprocity conditions, one of the error terms must be assumed known in order to find the solution using three standards; the rank of the 12 equations is not more than eight. The fact that an additional standard measurement is needed to get the last independent equation seems to be a “chronic” problem in the calibration theory. In addition to the above-mentioned five- and four-standard cases, a similar situation exists with the eight-parameter error model: two calibration standards produce only six independent equations, although seven are needed [17]. Similarly, in a totally symmetrical eight-term model, two calibration measurements are needed, although only three parameters are unknown. A practical possibility to justify the three-standard 16-term method might be to rely on symmetry if none of the leakage paths can be neglected. However, symmetry assumption would be very questionable in practice because even the slightest changes in probe head positioning may produce considerable nonsymmetry. Unlike symmetry, reciprocity is inherently a law of nature. Relying on such fundamental principles in calibration should be beneficial in terms of accuracy. The scattering parameters of the error matrix show relatively simple reciprocity conditions (9) (10) (11)

(5)

(12)

(6)

(13) (14)

(7) (8) Based on this, the -parameter scaling rule is as follows: if submatrix is multiplied by factor , submatrix must be divided by the same factor. Quadrants and , which represent the port match terms on the diagonal, are not scalable. Arbitrarily scaled -parameters give the same correct calibration results as the unscaled ones. The free choice of the scaling parameter simplifies the error term determination process. The scaling has a more pronounced role in a reciprocal system, because the reciprocity conditions allow finding the exact physically meaningful value of the scaling factor simultaneously with the error terms. III. RECIPROCITY A reciprocal four-port consists of ten different scattering parameters because the six port-to-port parameters are indepen-

or in terms of the four submatrices, (15) (16) (17) (18) where superscript denotes a transpose of a matrix (without conjugation); note the different subscripts in (16) and (17). The main drawback of the scattering parameter approach is the nonlinear equation system in (3). In [9], the -parameters were expressed as a function of -parameters and vice versa. It can be easily seen from the conversion equations that the -matrix of a 16-term error model has more complicated reciprocity conditions than the

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corresponding rameters

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-matrix. Equations (9)–(14) in terms of -pa-

(19) (20) (21) (22) (23) (24) The normal two-port reciprocity condition cannot be applied here. Determinants of submatrices are not equal to 1, nor does the determinant of the whole -matrix equal to 1 unless the arbitrarily chosen scaling parameter is accidentally correct. Yet, after a lot of experimenting, it was concluded that a -parameter formulation might be more convenient for the purpose of this study. The main reason for that is the linearity of the equation system in (4). IV. CALIBRATION Each two-port calibration measurement gives four linear equations in terms of the 16 error parameters (25a)–(25d) [8]

The error network takes into account the rest of the measurement system, like wafer probes, possibly cables or waveguides, and in some cases, device package parasitics. The equations are repeated for all four two-port calibration measurements. The 14 unknowns on the left-hand side are first solved as a function of and using 14 equations. Although may nearly equal 0, parameter always has a robust nonzero value because it is directly related to the signal path transmission scattering parameter . Our attempt on using and as intermediate parameters was not successful, but it rather resulted in singularity errors with symmetric structures. It is somewhat dependent on the calibration standards, which two of the 16 equations from above should be left out of the procedure. One should take all four equations for the thru and delay standards and at least (25a) and (25d) for all other standards. We have neglected (25b) of the third measurement and (25c) of the fourth measurement (or vice versa) in our tests. A slightly different choice of equations may be needed if nonsymmetrical standard pairs are used. We will end up with a set of 14 equations, which are written in matrix form (26) (27)

We might temporarily fix unknown . This will thus become our arbitrary scaling factor, although as another alternative was used in the corresponding eight-term TCX algorithm [17] (28) where (29) (30) Normally we would need a fifth calibration measurement to determine the value of . Now we will get the additional equation from the reciprocity conditions. The following procedure is needed to produce a second-order (instead of a third order) equation for . Let us set

.. .

(31) (32) (25a)–(25d)

are the scattering parameters of a calibration Parameters standard or DUT, while denote the corresponding measured -parameters. In the scope of this paper, are measured with an NWA calibrated at the coaxial or waveguide ports.

Equations (20) and (21) are first multiplied by and tively,

, respec-

(33) (34)

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and finally combined

(35) After a few simple steps, and applying (19)–(24), we will get the following equation: (36)

is the only unknown beAt this moment, parameter cause we can define for preliminary scaling. For reference, the corresponding scaling equation as a function of scattering parameters is (37) Since and are very small leakage terms and transmission terms, we can safely state that (36). Thus,

and larger in (38)

The -parameters above are already known as a function of (and )

Fig. 2. Measurement system for the algorithm testing.

It is sufficient to choose the root that has a smaller magnitude because error term should be very small in practice. This way we have got results, where and (if data is accurate), but other results will appear nonreciprocal because of the wrong scaling. This error network would, however, facilitate correct measurement calibration without further scaling. We can see from (9) and (19) and (14) and (24) that a simultaneous scaling of all the -parameters will not affect the conditions or . Thus, we can re-scale the results to remove the apparent nonreciprocity. As an optional final step, we may force (44) by adjusting the arbitrary scaling parameter

(45)

(39) This produces a second-order equation for unknown (40)

(46) where (41)

The “optimum” value of the scaling factor completely reciprocal error network is

(42)

(47)

(43) Parameter is solved from (40); the correct root must be chosen. One should calculate the terms after the final scaling, as shown below. It appears that a wrong root choice would interchange the values of the error parameters as follows:

that produces a

(48) , , and the other terms . Plus and minus signs in (47) are equally usable in calibration, but the chosen sign affects the phase of the individual error parameters. However, we do not need to know this phase more accurately. On the other hand, we can determine the correct sign at each frequency based on the phase curves of error parameters, as shown in Section V.

where

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Fig. 3. Measured -parameters of the diode calibrated with the 16-term reciprocal calibration method (solid line), WinCal TRL calibration (dashed line) and . (b) Magnitude and phase of . WinCal LRRM calibration (dotted line). (a) Magnitude and phase of

Fig. 4. Magnitude and phase of error parameters

(solid line) and

(dotted line). (a) Magnitude. (b) Phase.

The scaling factor affects all the error parameters in a similar way. After the re-scaling, the final parameter values will be as follows:

(49) (50) (51) (52) (53) (where ) will now fulfill the All the transmission terms reciprocity condition if the measured -parameters are accurate and the standards are well determined. The unknown DUT can finally be solved from (4), as shown in [9]. V. MEASUREMENTS The new 16-term reciprocal calibration algorithm is tested with the measurement system shown in Fig. 2:

• Cascade Microtech probe station with air coplanar probes (ACP); • Agilent E8361C PNA NWA (10 MHz–67 GHz); • Agilent N5260A millimeter head controller; • Agilent N5260-60003 67–110-GHz waveguide transmit/ receive (T/R) modules; • Agilent N5260-60013 combiner assembly with a bias-tee. The NWA is first calibrated at the coaxial ports right before the probe heads using a SOLT and the offset short standards of the Agilent 85059A calibration kit as recommended by the manufacturer. The probe part is then calibrated using the 16-term reciprocal calibration algorithm as a second-tier calibration with the Cascade Microtech ISS. The four known two-port calibration standards that are used in the calibration are thru, match-match, short-short, and open-open. As an example, measured -parameters of an unbiased monolithically integrated diode from United Monolithic Semiconductors (UMS) are presented in Fig. 3. The results of the 16-term reciprocal calibration algorithm are compared with an eight-term thru-reflect-line (TRL) multiline [18], [19] and line-reflect-reflect-match (LRRM) [20] calibrations done with WinCal XE 4.2 software. The measured -parameters with these three calibration algorithms compare very well. The very similar results with all three calibration algorithms are

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Fig. 5. Magnitude and phase of error parameters

(solid line) and

(dotted line). (a) Magnitude. (b) Phase.

Fig. 6. Magnitude and phase of error parameters Phase.

(solid line) and

(dotted line) with an additional leakage path in the error network. (a) Magnitude. (b)

Fig. 7. Magnitude of and of a load pair de-embedded from the error network with increased leakage. WinCal LRRM results from a network without the . (b) . increased leakage are shown for comparison. (a)

partly related to the use of the same calibration standards. This comparison verifies the validity of our approach. The advantage of the 16-term reciprocal calibration algorithm is its ability to take into account the leakage paths between all

the ports. This is demonstrated in Fig. 4, where the magnitudes and phases of error parameters and are presented. In Fig. 5, the magnitudes and phases of the error parameters and are shown. One can deduct from the phase of the error

SILVONEN et al.: 16-TERM ERROR MODEL IN RECIPROCAL SYSTEMS

parameters if the correct sign for scaling factor is chosen. The phase of determines the phase of the error parameters that should change as a function of frequency between 180 and 180 . From Figs. 4 and 5, we can see that the reciprocity condition (where ) is fulfilled in our 16-term reciprocal calibration even under presence of slight measurement inaccuracies. Due to the very small leakage in the example measurements, the capability of the 16-term reciprocal calibration algorithm is demonstrated with a simulation, where the error matrix from the measurements is combined with an additional leakage path. A transmission line between series capacitors is used to increase leakage over the DUT. The 16-term reciprocal calibration is repeated using the calculated -parameters of the combined error network in addition to the known -parameters of the standards and DUT. The results of the 16-term reciprocal calibration algorithm with additional leakage paths are presented in Figs. 6 and 7, where the calibrated -parameters of a well-matched 50- load pair (not used in the calibration) are shown. -parameters of the DUT with eight-term WinCal LRRM low-leakage calibration are presented for comparison. This proves that our 16-term reciprocal calibration algorithm is able to correct measurements under higher leakage levels as well. This can also be seen in Fig. 6 where the magnitudes and phases of the error parameters and of the error network with increased leakage are presented. The leakage is significant compared to the first measurement case shown in Fig. 4. VI. CONCLUSION A novel 16-term calibration method for reciprocal error networks has been presented and demonstrated in this paper. Compared to the general 16-term calibration, the advantage of the new method is that only four calibration standards are needed and nonsymmetrical custom-made standards are not required, while maintaining the ability to model all the leakage paths. This also enables the use of commercial calibration substrates, like ISS, which has been proven in this paper with the on-wafer measurements. Reciprocity is a fundamental law of nature, and thus a solid basis for accurate calibration. ACKNOWLEDGMENT Dr. T. Närhi, European Space Research and Technology Centre (ESTEC), Noordwijk, The Netherlands, as well as Prof. A. Räisänen and Prof. M. Valtonen, both with the Department of Radio Science and Engineering, Aalto University, Espoo, Finland, are thanked for facilitating this research. REFERENCES [1] A. Rumiantsev and N. Ridler, “VNA calibration,” in IEEE Microw. Mag., Jun. 2008, pp. 86–99. [2] Q. Li and K. L. Melde, “The impact of on-wafer calibration method on the measured results of coplanar waveguide circuits,” IEEE Trans. Adv. Packag., vol. 33, no. 1, pp. 285–292, Feb. 2010.

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[3] Q. Liang, J. D. Cressler, G. Niu, Y. Lu, G. Freeman, D. C. Ahlgren, R. M. Malladi, K. Newton, and D. L. Harame, “A simple four-port parasitic deembedding methodology for high-frequency scattering parameter and noise characterization of SiGe HBTs,” IEEE Trans. Microw. Theory Tech,., vol. 51, no. 11, pp. 2165–2174, Nov. 2003. [4] L. F. Tiemeijer, R. M. T. Pijper, J. A. van Steenwijk, and E. van der Heijden, “A new 12-term open–short–load de-embedding method for accurate on-wafer characterization of RF MOSFET structures,” IEEE Trans. Microwave Theory Techn., vol. 58, no. 2, pp. 419–433, Feb. 2010. [5] C. R. Curry, “How to calibrate through balun transformers to accurately measure balanced systems,” IEEE Trans. Microwave Theory Techn., vol. MTT-51, pp. 961–965, Mar. 2003. [6] Y. Zhang, K. Silvonen, and N. H. Zhu, “Measurement of a reciprocal four-port transmission line structure using the 16-term error model,” Microw. Opt. Technol. Lett., vol. 49, no. 7, pp. 1511–1515, Jul. 2007. [7] J. W. Helton and R. A. Speciale, “A complete and unambiguous solution to the super-TSD multiport-calibration problem,” in IEEE MTT-S Int. Microw. Symp. Dig., Boston, MA, Jun. 1983, pp. 251–252. [8] K. J. Silvonen, “Calibration of 16-term error model,” Electron. Lett., vol. 29, no. 17, pp. 1544–1545, Aug. 1993. [9] K. J. Silvonen, “LMR 16—A self-calibration procedure for a leaky network analyzer,” IEEE Trans. Microw. Theory Techn., vol. 45, no. 7, pp. 1041–1049, Jul. 1997. [10] H. Heuermann and B. Schiek, “15-term self-calibration methods for the error-correction of on-wafer measurements,” IEEE Trans. Instrum. Meas., vol. IM-46, no. 5, pp. 1105–1110, Oct. 1997. [11] J. Martens, “Reciprocity-based multiport de-embedding and an analysis of standard sensitivity,” in 72nd ARFTG Microw. Meas. Symp., Portland, OR, Fall, 2008, pp. 151–156. [12] X. Wei, G. Niu, S. L. Sweeney, Q. Liang, X. Wang, and S. S. Taylor, “A general 4-port solution for 110 GHz on-wafer transistor measurements with or without impedance standard substrate (ISS) calibration,” IEEE Trans. Electron. Devices, vol. 54, no. 10, pp. 2706–2714, Oct. 2007. [13] V. Teppati and A. Ferrero, “On-wafer calibration algorithm for partially leaky multiport vector network analyzers,” IEEE Trans. Microwave Theory Techn., vol. 53, no. 11, pp. 3665–3671, Nov. 2005. [14] R. A. Speciale, “A generalization of the TSD network-analyzer calibration procedure, covering -port scattering-parameter measurements, affected by leakage errors,” IEEE Trans. Microw. Theory Techn., vol. MTT-25, no. 12, pp. 1100–1115, Dec. 1977. [15] J. V. Butler, D. K. Rytting, M. F. Iskander, R. D. Pollard, and M. V. Bossche, “16-term error model and calibration procedure for on-wafer network analysis measurements,” IEEE Trans. Microw. Theory Techn., vol. 39, no. 12, pp. 2211–2217, Dec. 1991. [16] K. Silvonen, N. H. Zhu, and Y. Liu, “A 16-term error model based on linear equations of voltage and current variables,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 4, pp. 1464–1469, Apr. 2006. [17] K. J. Silvonen, “A general approach to network analyzer calibration,” IEEE Trans. Microw. Theory Techn., vol. 40, no. 4, pp. 754–759, Apr. 1992. [18] R. B. Marks, “A multiline method of network analyzer calibration,” IEEE Trans. Microw. Theory Techn., vol. MTT-39, no. 7, pp. 1205–1215, Jul. 1991. [19] D. F. Williams, J. C. M. Wang, and U. Arz, “An optimal multiline TRL calibration algorithm,” in IEEE MTT-S Int. Microw. Symp. Dig., 2003, pp. 1819–1822. [20] L. Hayden, “An enhanced line-reflect-reflect-match calibration,” in 67th ARFTG Conf. Dig., Jun. 2006, pp. 143–149. Kimmo Silvonen was born in Koski Hl, Finland, in 1957. He received the Dipl. Eng. (M.Sc.), Lic. of Tech., and D.Sc. (Tech) degrees in electrical engineering from the Helsinki University of Technology, Espoo, Finland, in 1983, 1988, and 1999, respectively. Since 1979, he has held various research and teaching positions with the Circuit Theory Laboratory, Helsinki University of Technology, and School of Electrical Engineering, Aalto University. He is currently a Senior Lecturer with the Department of Radio Science and Engineering, Aalto University. He has authored four electronics textbooks and is responsible for wide-audience electrical engineering courses. His research area consists of NWA measurements and microwave and RF circuit theory. Dr. Silvonen was the recipient of the Teacher of the Year Award at Aalto ELEC 2011.

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Krista Dahlberg (S’11) was born in Vantaa, Finland, in 1984. She received the M.Sc. (Tech.) degree in electrical engineering from the Helsinki University of Technology (now Aalto University), Espoo, Finland, in 2009, the Lic.Sc. (Tech.) degree from Aalto University, Espoo, Finland, in 2011, and is currently working toward the D.Sc. (Tech.) degree in radio science and engineering at Aalto University. She is currently with the School of Electrical Engineering, Aalto University. Her current research interests are millimeter-wave mixer design, Schottky diode characterization and modeling, and development of millimeter-wave on-wafer measurements and calibration.

Tero Kiuru (S’06–M’11) received the M.Sc. (Tech.) degree in electrical engineering from the TKK Helsinki University of Technology, Espoo, Finland, in 2006, and the D.Sc. (Tech.) degree (with distinction) in electrical engineering from Aalto University, Espoo, Finland, in 2011. From 2007 to 2010, he participated in the European Space Research and Technology Centre (ESTEC) Networking/Partnering-Initiative doctoral program, which included a one-year visit working with ESTEC, Noordwijk, The Netherlands. He is currently a Research Scientist with the VTT Technical Research Centre of Finland, Espoo, Finland. His current research interests include design of millimeter-wave and terahertz monolithic integrated circuits, characterization and modeling of Schottky diodes, and measurement techniques at terahertz frequencies.

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Modified Least Squares Extraction for Volterra-Series Digital Predistorter in the Presence of Feedback Measurement Errors You-Jiang Liu, Wenhua Chen, Senior Member, IEEE, Jie Zhou, Bang-Hua Zhou, Fadhel M. Ghannouchi, Fellow, IEEE, and Yi-Nong Liu

Abstract—Measurement errors (in-phase/quadrature imbalance, dc offset, and nonlinearity) in the feedback path can adversely affect the linearization performance of digital predistorter (DPD) for RF power amplifiers (PAs). In this paper, a generalized analysis for the Volterra-series DPD system is presented in the presence of feedback measurement errors. It shows that the DPD coefficients are biased due to these errors. A modified least squares (MLS) method is then proposed for DPD coefficients extraction, which can eliminate the detrimental effect of feedback measurement errors without using a post-compensator. The proposed MLS method has the advantage of being free of behavioral modeling for the feedback path or the post-compensator. However, it can still achieve comparable performance as the state-of-the-art. The performance of the MLS method is validated with both simulations and experiments. The measurement results show that, when a nonideal feedback path is employed to capture the PA output, the proposed MLS method can still ensure a high linearization performance of the DPD, and the results are nearly the same as that when an ideal feedback path is used. Index Terms—Digital predistorter (DPD), feedback path, in-phase/quadrature (I/Q) imbalance, power amplifiers (PAs), Volterra series.

I. INTRODUCTION

D

IGITAL predistortion is the most promising and cost-effective technique for power amplifiers (PAs) linearization in modern wireless communication systems. During the past decades, different digital predistorter (DPD) structures have Manuscript received May 21, 2012; revised August 04, 2012; accepted August 07, 2012. Date of publication September 07, 2012; date of current version October 29, 2012. This work was supported by Alberta Innovate Technology Futures (AITF), the Natural Sciences and Engineering Research Council of Canada (NSERC), the Canada Research Chairs Program, and the Ministry of Science and Technology of China National Science and Technology Major Project under Grant 2010ZX03007-003 and Grant 2012ZX03001009-003. Y.-J. Liu is with the Institute of Electronic Engineering, China Academy of Engineering Physics, Mianyang 621900, China, and also with the Department of Engineering Physics, Tsinghua University, Beijing 100084, China (e-mail: [email protected]). W. Chen is with the Department of Electronic Engineering, Tsinghua University, Beijing 100084, China. J. Zhou and B.-H. Zhou are with the Institute of Electronic Engineering, China Academy of Engineering Physics, Mianyang 621900, China. F. M. Ghannouchi is with the Intelligent RF Radio Laboratory (iRadio Lab), Department of Electrical and Computer Engineering, Schulich School of Engineering, University of Calgary, Calgary, Alberta, Canada T2N 1N4. Y.-N. Liu is with the Department of Engineering Physics, Tsinghua University, Beijing 100084, China. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2214055

Fig. 1. Block diagram of indirect learning architecture for digital predistortion.

been developed, such as Volterra series [1]–[6], lookup tables (LUTs) [7]–[11], and neural networks [12]–[16]. Among them, a Volterra-series DPD is one of the most attractive structures, which has a lot of modified forms suitable for practical applications, such as memory polynomial [2], [3], dynamic deviation reduction-based (DDR) Volterra series [4], [5], and generalized memory polynomial [6]. To obtain the coefficients of the Volterra-series DPD, an indirect learning architecture [1], [3]–[6], as shown in Fig. 1, is widely used. This architecture firstly identifies the model coefficients using the complex baseband output and input of the PA. The coefficients are then used to update the DPD block. Normally, this process is performed iteratively in practical applications. One must notice that the performance of DPD certainly relies on a carefully designed feedback path. In a real system, however, the feedback path will introduce some measurement errors and therefore will lead to inaccurate extraction of the DPD coefficients. For the feedback path, a typical configuration is quadrature demodulation [17]–[19], in which an analog quadrature demodulator (QDEMOD) is used to demodulate RF signals. Notably, in-phase/quadrature (I/Q) imbalance is one of the main measurement errors. It is caused by the facts that the quadrature carriers in the QDEMOD do not have exactly the same amplitudes and an exact phase difference of 90 , and that the I and Q branches are not exactly symmetrical. Specifically, for wideband applications, the I/Q imbalance has frequency-dependent behavior [20], [21]. Another error in the QDEMOD is dc offset due to signal leakages in the local oscillator (LO). Furthermore, nonlinear distortion within analog components (e.g., mixers) is also a measurement error. For full generality, the nonlinear frequency-dependent I/Q imbalance should be taken into account for the feedback path with a QDEMOD. Some related studies in the literatures have proposed the compensation techniques for I/Q imbalance in the QDEMOD,

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and more straightforwardly for DPD applications, some studies have addressed the problem of feedback measurement errors in degrading the DPD performance. In [22], a concurrent modulator and demodulator I/Q imbalance estimator/compensator was proposed, but not involved in the DPD applications. Performance degradation of the memoryless polynomial DPD has been reported in [23], and a compensation technique is presented, but it shows high computational complexity and low accuracy. Some other reports mainly focus on the LUT DPD [24]–[27]. Notably, all of these studies do not take into account the frequency-dependent behavior of the I/Q imbalance, which is necessary for wideband applications. Particularly, our previous work in [28] considers both the frequency-dependent I/Q imbalance and nonlinear distortion in the feedback path of the LUT DPD, but it requires a complicated model extraction procedure for the construction of a post-compensator for the QDEMOD in the feedback path. To the best of the authors’ knowledge, for the Volterra-series DPD, the problem of feedback measurement errors has not been investigated widely, especially in the presence of the nonlinear frequency-dependent I/Q imbalance in the QDEMOD. In this paper, we will show that the feedback measurement errors have an important effect on the Volterra-series DPD. A generalized analysis based on the indirect learning architecture and least squares (LS) extraction algorithm is presented to show that the DPD coefficients are biased due to the errors. Subsequently, unlike conventional compensation techniques for these errors (I/Q imbalance, dc offset, and/or nonlinearity) using post-compensators based on separate modeling of that [23]–[28], a modified least squares (MLS) extraction method is proposed. Specifically, the MLS method does not require the post-compensator to eliminate feedback measurement errors, and the Volterraseries DPD with the MLS method has two main advantages, which are: 1) it has higher tolerance to feedback measurement errors than the conventional Volterra-series DPD with LS extraction method and 2) compared to the conventional post-compensation techniques for the QDEMOD, it is free of model extraction for the QDEMOD (or the post-compensator), which avoids making a time-consuming effort to develop an accurate model for the post-compensator and also avoids modeling errors. Simulations and measurements demonstrate the potential of the MLS method. This paper is organized as follows. In Section II, the generalized analysis for the Volterra-series DPD in the presence of feedback measurement errors is presented in detail. Section III proposes the MLS method for the DPD coefficients extraction. The proposed method is evaluated by extensive simulations and measurements in Sections IV and V. Finally, a conclusion is given in Section VI. Specifically, since the quadrature modulator’s impairments in the transmitter path are out of the scope of this paper, it is assumed that the quadrature modulator works ideally. II. GENERALIZED ANALYSIS FOR VOLTERRA DPD IN THE PRESENCE OF FEEDBACK MEASUREMENT ERRORS The Volterra series is a very general approach to describe the input/output relationship of a memory nonlinear system. In the following paragraphs, the analysis is based on the indirect

learning architecture shown in Fig. 1 for a general Volterra-series DPD. The conclusions are also suitable for other modified Volterra series (e.g., memory polynomial and DDR Volterra). Since the output of the Volterra model is linear with respect to its coefficients, we use an LS extraction algorithm for model identification. A. Generalized Analysis Fig. 1 depicts the basic block diagram for this analysis, where measurement errors are present in the feedback path as . Notations of other signals are also indicated in Fig. 1. All of them are represented as complex baseband signals. In the following analysis, we use to denote the iteration index. After receiving the PA output from the feedback path, one can obtain the feedback signal represented as (1) where is the output of the PA in the th iteration. The , which is actually the corresponding input of the PA is predistorted output signal of the Volterra-series DPD. To extract the DPD coefficients, the feedback signal is used as the input to “Predistorter Training” block; while the is the expected output. The predistorted output signal Volterra-series DPD is extracted based on the discrete complex baseband Volterra model [29], [30]

(2) are the th order Volterra where kernels (DPD coefficients), is the nonlinearity order, and is the memory depth. The symbol denotes the complex conjugation operator. It should be noticed that the coefficients in the th iteration are extracted using signals in the th iteration. By arranging the kernels in a vector form, we form the coefficient vector of the Volterra-series DPD as . The LS solution for solving the DPD coefficients is then (3) to simplify the where we define denotes the complex conjugate transpose and notation, with samples. Specifically, the matrix is defined including all of the product that appear terms in the Volterra model for , and the elements in each row of should be arranged along with that of corresponding to the indices .

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The above analysis is based on the assumption that exists in the feedback path. On the other hand, the ideal case without measurement errors results in the ideal Volterra-series DPD, whose coefficient vector is . Compared to , one can assume the following relation:

by assuming we have

and

(8)

(4) where is the predistorter error. In the following analysis, we denote variables by adding “ ” for the ideal case without measurement errors. Notably, the difference between and causes an error between the ideal and the nonideal output of the PA, which gives the relation

,

where predistorted signal is error vector

, and is formed from the ideal in a similar way to . Thus, the

(5)

(9)

is the ideal output of the PA corresponding to where and is the error at the output of the PA due to the predistorter error. By substituting (5) into (1) to give

where is the matrix formed from the original input signal with the same form of . , the preFollowing (4), (8), (9), and distorter error can be recursively represented as (10) Due to

, we finally have

(6) where

and

is given by

(7)

where are the elements in and is the complex gain of the PA. Notably, we assume that and are close enough and the shift in PA’s operation point between them is insignificant and can be ignored like in [24]. Therefore, the complex gain for is considered to be the same as that for , namely, . It should and in (7) are expressed be also noticed that using the DPD coefficients in the th iteration (not the th iteration) by predistorting the original input signal . corresponds to the ideal The ideal output of the PA matrix , which is formed in a similar way to the matrix by replacing with . From (3),

(11) where and is again the iteration index. On one hand, the first term in (10) is the error introduced by the “inaccurate” DPD of the previous iteration, and the second mainly from the term includes two parts: a term of measurement errors and another term of indicating a “high-order” error introduced by both the measurement errors and the “inaccurate” DPD of the previous iteration. On the other hand, (11) reveals that the measurement errors affect system performance in an accumulative way. This is also intuitive since the “inaccurate” DPD is used to predistort the signal in the following iterations. Overall, if the DPD is trained with no regard for feedback measurement errors, the resulting DPD coefficients will be biased, and thus the overall transmitted signal quality will be degraded. Following the generalized analysis, to make the results more clear and straightforward, and from practical consideration perspectives and for simplicity purposes, we can encompass the feedback path receiver imperfections into mainly hardware impairments dominated by frequency-dependent I/Q imbalance and dc offset of the QDEMOD secondly by the weakly nonlinearity of the receiver in case it exists and can be sensed. B. Frequency-Dependent I/Q Imbalance and DC Offset In this section, it is assumed that there are only frequency-dependent I/Q imbalance and dc-offset errors in the feedback path. The frequency-dependent I/Q imbalance and dc offset in the QDEMOD can be considered as a “direct/image channel model” similar to that in [31]. Although this complex baseband model is designed for the quadrature modulator, it is also applicable to

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the QDEMOD. This is because in the complex baseband, I/Q imbalance in the QDEMOD is essentially similar to that in the quadrature modulator. Therefore, one can also use this model to do behavioral modeling for the QDEMOD. Assume is actually the QDEMOD output, which is given by

(12) where and are the “direct” and “image” transfer functions related to the I/Q imbalance, is the dc offset, and is the memory depth. Note that the frequency-dependent behavior actually introduces memory effects into the feedback path. This frequency-dependent demodulator error makes the extraction of the Volterra-series DPD to behave in a complicated manner. Recalling the product term in (2), we have

Fig. 2. Tolerance of the memory polynomial DPD to I/Q imbalance and dc offset in the QDEMOD for a two-carrier WCDMA signal.

and

(16) (13) In a real system, when the model coefficients are normalized using (i.e., after normalization, ), we usually have for , for , and . For approximation, we assume the products among , , and can be ignored. After some mathematical manipulation, we can approximately write (13) as

(14) where

(15)

and will bias the solution of From (14), the terms (3). In the ideal case, it is expected that ; and affect the linearizawhile in the nonideal case, tion performance in three different categories with respect to three groups of model’s coefficients: , , and . Usually, since the effect of model’s coefficients on modeling accuracy tends to fade with increasing memory depth in analog circuits [5], model’s coefficients with smaller memory depth contribute more than that with larger memory depth. From the perspective of evaluating the system’s sensitivity to I/Q imbalance, we take and as the most significant among and . Hereupon, , , and were involved in the evaluation. Fig. 2 presents DPD’s performance degradation in terms of adjacent channel power ratio (ACPR) at 5 MHz for the memory polynomial DPD for three cases, which are: 1) sweeping from 0 to 0.2, where , and ; 2) sweeping from 0 to 0.2, where , and ; and 3) sweeping from 0 to 0.1, where , . In each case, the phase of , , or was set to be two values: 0 and 100 . From Fig. 2, it can be noticed that the memory polynomial DPD is sensitive to dc offset and the zeroth-order image transfer coefficient most. A small value of or will degrade the linearization performance sharply.

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[23]–[28], where DPD extraction must follow two steps: first, compensating I/Q demodulation errors; and second, identifying the DPD coefficients. By contrast, the MLS method is an embedded technique that takes into account the effects of the impairments and distortion in the feedback path of a DPD while synthesizing the actual DPD function for the PA under consideration. It is integrated and one-step approach, system free of separate modeling for the feedback path (or the post-compensator) and without need of constructing a standalone post-compensator for the QDEMOD. Recalling the notations following (8), the expected DPD coefficients should be (18) Fig. 3. Simulated spectra at the PA output and the feedback (FB) output in the presence of nonlinear distortion in the feedback path for the memory polynomial DPD.

In order to make the analysis more clear and straightforward, we denote the matrix in (18) as the following form:

(19)

C. Nonlinear Distortion Although it is not common in practical situations and for comprehensive analysis purposes, in this section, we study the case where only nonlinearity error occurs in the feedback path. In such a case, the nonlinearity is modeled as a complex baseband odd-order polynomial as follows:

is formed from and using means that the where matrix is formed from the signal in the angle brackets. Since , (18) is rewritten as

(17) is the coefficients and is the nonlinearity order. where The DPD coefficients can also be biased due to the nonlinear distortion in the feedback path. Similar to the analysis in our previous study [28], nonlinearity in the feedback path makes the DPD to compensate for nonlinear distortion in both the PA and the feedback path, but not in the PA only. As a result, one can see a linearized result at the feedback output, but not at the PA output. To intuitively illustrate that, Fig. 3 shows the simulated power spectra at the PA output and the feedback output, when the memory polynomial DPD is constructed using a nonlinear feedback path. In the simulations, both the PA and the feedback path are characterized using behavioral models. The PA is characterized using a memory polynomial with fifth-order nonlinearity and third-order memory depth, and the feedback path is characterized using a third-order memoryless polynomial. It is shown that, when nonlinear distortion exists in the feedback path, the PA output after DPD is not perfectly linearized. However, the output signal of the feedback path after DPD can achieve good linearity. This indicates that the DPD coefficients have been biased due to the nonlinearity of the feedback path, and the DPD fails to give satisfactory linearization performance at the PA output. III. MLS EXTRACTION METHOD In order to enhance DPD performance in the presence of feedback measurement errors, we propose an MLS extraction method to identify the DPD coefficients. This is quite different from conventional techniques by employing post-compensators

(20)

is the ideal output of the PA In a real system, because (the input of the feedback path, or more exactly, the QDEMOD) and indeed it is not affected by the feedback measurement errors, it is impossible to calculate (20) directly only using (the output of the feedback path). Fortunately, one can find an alternative expression of (20) as follows. in (20) can be regarded Notice that the term and as the complex gain of the feedback path, where are exactly the input and output signals of the feedback path. This term actually gives an effective way to represent the measurement errors. On the other hand, since the DPD usually converges well with increasing iterations when an ideal feedback path is used, the ideal PA normalized output tends to equal to the original input, namely, (21) Therefore, if we perform an extra measurement using as the excitation of the feedback path to get the output signal , it is expected that (22)

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is quite difficult to find an exact model for analog circuit and the modeling errors exist inherently. IV. SIMULATION RESULTS

Fig. 4. Block diagram of the proposed Volterra-series DPD architecture with MLS.

In fact, the term in (22) also has the same physical , namely, the complex gain of the meaning as feedback path. Therefore, according to (22), is in (20). We can then rewrite an alternate for (20) as (23) Notably, (23) reveals the basic operation principle of the MLS method. On one hand, for a feedback path without measurement errors, (23) is just the same as (18). On the other hand, for a nonideal feedback path, since (22) is ensured with increasing iterations, (23) converges to the form of (18) as well. A block diagram of the proposed Volterra-series DPD architecture with an MLS method is presented in Fig. 4, in which a switch at the feedback path is used to alternate between the signals at the signal generator’s output and the PA output. The switch is first set so that the feedback path is connected to the signal generator’s output; and the feedback path measures the received signal . The term in (23) can then be calculated and stored in advance. After that, the switch is connected to the PA output to capture the output signal normally using the feedback path, and DPD extraction is performed using (23). Notice that the switch never needs to be switched back to the signal generator’s output again in the following stage because the term is already obtained in advance at the startup. It should be also noticed that we do not need any further feedback path to correct the feedback measurement errors so the MLS method is almost free of hardware imperfections and implementation schemes. Besides, since the term can be obtained via only one single measurement (namely, the switch only needs to be connected to the signal generator’s output once at the beginning), it does not increase the measurement complexity compared to the conventional compensation techniques using post-compensators [23]–[28], where such an extra measurement is also needed. Moreover, the MLS method does not need behavioral modeling for the QDEMOD (or the post-compensator), which avoids making a time-consuming effort to develop that model and also avoids introducing modeling errors to the DPD extraction stage. However, in the conventional techniques [23]–[28], such effort and modeling errors for the QDEMOD (or the post-compensator) are unavoidable since it

In this section, the effectiveness of the MLS method was evaluated by computer simulations for two DPD structures, i.e.: 1) a memory polynomial DPD [2], [3] with ninth-order nonlinearity and third-order memory depth and 2) a DDR Volterra DPD [4], [5], with seventh-order nonlinearity and third-order memory depth. The simulations were carried out using a twocarrier WCDMA with a bandwidth of 10 MHz. The linearization performances were assessed in terms of ACPR at 5-MHz offset, and the PA model used for simulations was constructed using memory polynomials with the coefficients set as that in [3]. To assess the robustness of the proposed MLS method to feedback measurement errors, it was assumed that there were only frequency-dependent I/Q imbalance and dc-offset errors in the feedback path; and the nonlinear distortion was not taken into consideration. The demodulator model in (12) was used in the simulations, with model coefficients set to be , , and . As pointed out in Section II-B, the DPD performance would degrade mainly due to and so we evaluate system tolerance to and here. The results are shown in Fig. 5, where Fig. 5(a) and (b) is obtained by sweeping , and Fig. 5(c) and (d) by sweeping with other model coefficients set to be the abovementioned values. The phase of or was set to be two values: 0 and 100 . We can see that DPD with MLS (MLS DPD) is able to suppress the ACPR to lower level for all cases, ultimately increasing system tolerance to the frequency-dependent I/Q imbalance and dc-offset errors in the feedback path. Notably, we did not employ any compensation techniques [23]–[28] to cancel out the feedback measurement errors in the process of DPD extraction. The simulation results show that MLS DPD has higher tolerance to the feedback measurement errors than the conventional one with the LS extraction method (LS DPD). V. EXPERIMENTAL RESULTS A. Measurement Setup Experimental demonstration was also carried out for a 1.96-GHz class-AB amplifier, which was built using a 5-W latterly diffused metal oxide semiconductor (LDMOS) field-effect transistor (FET). The stimulus signal was a two-carrier WCDMA signal, having an average power of 10 dBm. Each carrier had a chip rate of 3.84 MHz, and the separation between the two carriers was 5 MHz. The resulting signal had a total bandwidth of 10 MHz and a peak-to-average power ratio of 10.5 dB. The baseband sampling rate used in the system was 92.16 MHz. In order to demonstrate the performance of the proposed MLS method when using a nonideal feedback path in the DPD’s extraction loop, a real QDEMOD was used in the feedback path. The QDEMOD used here is ADL5382 from Analog Devices, which was directly connected to the PA output to receive the output signal. In the experiments, the QDEMOD was adjusted

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Fig. 5. Comparison of DPD performances between using LS method and MLS method in the presence of frequency-dependent I/Q imbalance and dc-offset errors in the feedback path for: (a) and (c) memory polynomial DPD and (b) and (d) DDR Volterra DPD.

B. Distortion in the QDEMOD

Fig. 6. Measurement setup for DPD implementation in the presence of I/Q demodulation errors in the feedback path.

to exhibit a significant amount of distortion at its demodulated output, which just ensures that it constructs a nonideal feedback path with measurement errors. Subsequently, the proposed MLS method was employed to successfully extract the DPD coefficients without need of constructing a post-compensator for the QDEMOD. The entire measurement setup for validation experiments is shown in Fig. 6. A computer runs the MATLAB software for digital signal processing (DSP) and the VSA89600 software for recording baseband I and Q data. A signal generator (Agilent, ESG E4438C) is used to modulate the baseband signals and up-convert them to an RF band. In the feedback path, the QDEMOD is used to receive the PA’s output signal and then the demodulated data is sent back to the PC via PSA E4440.

First, in order to implement the proposed MLS method, we bypassed the PA and directly connected the ESG output to the QDEMOD input (the red dashed line (in online version) in Fig. 6).1 By sending the original input signal [i.e., in (23)] to the QDEMOD, the demodulated output [i.e., in (23)] was obtained. As a consequence, the term in (23) was calculated and recorded for later retrieve. After this startup step, the PA was connected and the whole system operated normally to receive the PA’s output and to extract the DPD coefficients iteratively. Notice that we never need to switch back to receive the original input signal to obtain again because the QDEMOD is built using passive devices and its behavior would not change much before the DPD becomes converged and the originally recorded term can always be used. The measured AM–AM and AM–PM relationships of the QDEMOD between and are plotted in Fig. 7. In addition to AM–AM and AM–PM distortion, the QDEMOD has also PM–AM and PM–PM distortion that results from complex gain imbalance between the I and Q paths, such as that in the quadrature modulator [32], [33]. Fig. 8 shows the measured PM–AM and PM–PM results of the QDEMOD. From Figs. 7 and 8, noticeable distortion of the QDEMOD is observed, and a significant amount of errors are shown. To quantitatively illustrate the existence of the nonlinear frequency-dependent I/Q imbalance errors, we specifically did 1To implement the conventional post-compensation technique using a postcompensator, this step is also required as the same.

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TABLE I NMSE RESULTS OF BEHAVIORAL MODELING FOR THE QDEMOD

Fig. 7. Measured AM–AM and AM–PM of the QDEMOD.

The modeling performance was assessed using a normalized mean square error (NMSE) criterion between the measured output and the model output. The NMSE results of behavioral modeling are summarized in Table I. It is shown that both the memory polynomial model and the direct/image channel model cannot provide accurate modeling results. That is because the memory polynomial model does not take into account the I/Q imbalance, while the direct/image channel model does not include the nonlinearity. By contrast, the latter two models in cases 3) and 4) show higher accuracy, where the nonlinear frequency-dependent I/Q imbalance is modeled very well. The results clearly show that the QDEMOD exhibits significant nonlinear frequency-dependent I/Q imbalance errors. In the following experiments, we will illustrate that the proposed MLS method (without using a post-compensator for the QDEMOD) is still able to handle those errors and extract the DPD coefficients successfully. C. Linearization Performances

Fig. 8. Measured PM–AM and PM–PM of the QDEMOD.

behavioral modeling for this QDEMOD. Previously, several state-of-the-art models for modeling I/Q imbalance in the quadrature modulator were proposed in the literatures, like the “direct/image channel model” in [31] and the nonlinear dual-input model in [34]. It should be pointed out that these models are also applicable to behavioral modeling of the QDEMOD due to their natures of modeling imbalance between the I and Q paths. To this point, we specifically employed these models for the QDEMOD to give sufficient evidence on the existence of the nonlinear frequency-dependent I/Q imbalance errors in it. In addition, a two-box model for the QDEMOD in our previous study in [28] can be surely used as well. In summary, for comparative purpose, we employed four models for QDEMOD modeling, which are: 1) memory polynomial; 2) the direct/image channel model in [31]; 3) the two-box model in [28]; and 4) the nonlinear dual-input model in [34]. It has been demonstrated in the literature that case 1) can only model the memory nonlinearity; case 2) can only model the frequency-dependent I/Q imbalance; while both cases 3) and 4) are able to model the nonlinear frequency-dependent I/Q imbalance errors.

Both the memory polynomial DPD and the DDR Volterra DPD using the MLS method (MLS DPD) were employed to linearize the PA. Notably, in regard to the problem of QDEMOD errors in the DPD, our previous study in [28] proposed the two-box model for the construction of a post-compensator for the QDEMOD in the LUT DPD system. It has been demonstrated to be able to compensate for the nonlinear frequency-dependent I/Q imbalance in the QDEMOD, and we can also employ it in the Volterra-series DPD system. For comparison, besides the linearization results of MLS DPD, we further give the linearization results of the DPD using conventional LS extraction method (LS DPD) in three cases, which are: 1) without post-compensator for the QDEMOD; 2) with the two-box post-compensator in [28]; and 3) the ideal case where no QDEMOD errors exist in the feedback path. Among them, case 2) is just a conventional technique using a post-compensator for the QDEMOD in the DPD and for which separate modeling is necessary for the post-compensator. In the experiments, the two-box post-compensator is modeled with a nonlinearity order of 5 and memory depth of 3. Fig. 9 shows the measured spectra at the PA output before and after linearization using the memory polynomial DPD. It can be noticed that using conventional LS method (LS DPD) without any post-compensation for the QDEMOD shows quite limited performance. This indicates that the DPD coefficients are biased due to the QDEMOD errors. The LS DPD with the two-box post-compensator in [28] offers good result. However, it still exhibits slightly weaker performance than the MLS DPD in suppressing the spectral regrowth due to some unknown modeling error of the post-compensator. Specifically, the proposed

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TABLE II COMPARISON OF COMPUTATIONAL COMPLEXITY IN ONE DPD ITERATION

Fig. 9. Measured spectra at the PA output before and after linearization using memory polynomial DPD in the presence of feedback measurement errors.

Note: (1) is the observation sample length of signals used in the extraction; (2) and are the nonlinearity order and memory depth of the two-box model in [28]. is an odd number. TABLE III COMPARISON OF CONVERGENCE BEHAVIOR BETWEEN THE PROPOSED MLS DPD AND THE CONVENTIONAL LS DPD

Fig. 10. Measured spectra at the PA output before and after linearization using DDR Volterra DPD in the presence of feedback measurement errors.

MLS DPD, without using any post-compensation technique, is able to achieve comparable performance as that of the ideal case. This proves that the detrimental effects of the QDEMOD errors on DPD performance are almost totally eliminated using the MLS method. Furthermore, Fig. 10 reveals similar results for the DDR Volterra DPD. D. Computational Complexity We also give assessment about computational complexity for different techniques. When the QDEMOD errors exist in the DPD system, computational complexity of the LS DPD with a post-compensator includes the total amount involved in both the post-compensator extraction and the DPD extraction stages. However, computational complexity of the MLS DPD only results from that in the DPD extraction stage.

For the LS DPD with a post-compensator in [28], first, in the post-compensator extraction stage, because of the nature of its two-box architecture, it requires a two-step extraction process to separately extract the coefficients of the two boxes. In this stage, two matrix inversions for each box and a significant amount of multiplications, additions, and absolute value operations for calculating the intermediate variables between the two boxes are required. Second, in the DPD extraction stage, the output of the PA should at first pass through the post-compensator, and then be involved in the LS algorithm normally. In such a case, it requires a significant amount of multiplications, additions, and absolute value operations for the post-compensation processing, and one matrix inversion for DPD coefficients identification. In summary, the detailed numbers of operations are listed in Table II. For the proposed MLS DPD, in the DPD extraction stage, the output of the PA is first multiplied by the terms according to (23). The LS algorithm is then normally performed. In total, the detailed numbers of operations are also listed in Table II.

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TABLE IV QUALITATIVE COMPARISON TO PRIOR STUDIES WITH RESPECT TO THE PROBLEM OF THE QDEMOD ERRORS IN DPD

Note: with respect to “QDEMOD errors type,” “static” means frequency-independent I/Q imbalance and dc-offset errors; while “Nonlinear dynamic” means nonlinear frequency-dependent I/Q imbalance and dc-offset errors.

From Table II, it can be noticed that the MLS DPD eliminates the needs of a significant amount of additions, multiplications, absolute value operations, and matrix inversions. Although it requires additional division operations, the computational complexity is still less than the LS DPD with a post-compensator in [28]. This is because the latter one requires two extra matrix inversions in the post-compensator extraction stage. Taking into account the matrix size in the matrix inversions, the total number of unknown operations (at comparable complexity as the division operation) will be far more than the number of the division in the MLS DPD. Overall, the computational complexity of the MLS DPD is far less than that of the LS DPD with a post-compensator in [28]. E. Convergence Behavior Most previous studies have experimentally evaluated that the conventional Volterra-series DPD with an LS extraction method usually converges in two or three iterations. Convergence tests for the proposed MLS DPD were also performed both for an ideal feedback path (without the QDEMOD in the feedback path) and for a nonideal feedback path (with the QDEMOD in the feedback path). Comparison of the convergence behavior is summarized in Table III. It is shown that the MLS DPD has fast convergence behavior like the LS DPD in the case of an ideal feedback path. Even for a nonideal feedback path, the MLS DPD can converge in three iterations as well. However, in the latter case, the MLS DPD gives far better linearization performances. F. Qualitative Comparison to Prior Works Finally, the performances of the proposed MLS DPD are compared to some prior studies qualitatively. Table IV gives the qualitative comparison of this study to prior studies with respect to the problem of the QDEMOD errors in DPD. It should be noticed that this study is able to deal with the nonlinear frequency-dependent I/Q imbalance and dc-offset errors successfully; while most prior studies (except for [28]) usually only compensate for the frequency-independent I/Q imbalance and dc-offset errors.

As has been pointed out, the main advantage of this study over previous techniques is that the proposed MLS method does not require standalone modeling for the post-compensator for the feedback path (more specifically, the QDEMOD). However, the conventional techniques using a post-compensator usually are more costly since they require synthesizing an accurate postcompenator for the QDEMOD before extracting the DPD coefficients. To achieve that purpose, one always has to determine the most appropriate model dimension (model’s memory depth and/or nonlinearity order) for the postcomensator by repetitively identifying it with different dimensions, just like what we normally do when designing a DPD model for a PA [35]. Ultimately, this further increases system’s computational complexity. By contrast, since the proposed MLS method does not involve such a procedure, it significantly eases the DPD’s extraction process in the presence of feedback measurement errors. VI. CONCLUSION This paper has presented a generalized analysis for the Volterra-series DPD in the presence of feedback measurement errors. The nonlinear frequency-dependent I/Q imbalance and dc-offset errors in the feedback path are taken into consideration in this study. It shows that DPD coefficients are biased due to these errors. To eliminate the effect of feedback measurement errors, unlike conventional compensation techniques using post-compensators, the MLS method has been proposed for DPD extraction. It significantly enhances system tolerance to feedback measurement errors. Specifically, the Volterra-series DPD with the MLS method substantially avoids the requirement on a complicated modeling procedure for the QDEMOD in the feedback path (or its post-compensator). We have carried out extensive simulations and measurements to demonstrate the effectiveness of the MLS method. Comparative studies with some state-of-the-art works have also been performed. The results have proved the superiority of the proposed DPD scheme with MLS. ACKNOWLEDGMENT The authors would like to thank A. Kwan, Intelligent RF Radio Laboratory (iRadio Lab), University of Calgary, Calgary,

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AB, Canada, for providing valuable discussions and technical support during the measurements. REFERENCES [1] C. Eun and E. J. Powers, “A new Volterra predistorter based on the indirect learning architecture,” IEEE Trans. Signal Process., vol. 45, no. 1, pp. 223–227, Jan. 1997. [2] J. Kim and K. Konstantinou, “Digital predistortion of wideband signals based on power amplifier model with memory,” Electron. Lett., vol. 37, no. 23, pp. 1417–1418, Nov. 2001. [3] L. Ding, G. T. Zhou, D. R. Morgan, Z. Ma, J. S. Kenney, J. Kim, and C. R. Giardina, “A robust digital baseband predistorter constructed using memory polynomials,” IEEE Trans. Commun., vol. 52, no. 1, pp. 159–165, Jan. 2004. [4] A. Zhu, J. C. Pedro, and T. J. Brazil, “Dynamic deviation reductionbased Volterra behavioral modeling of RF power amplifiers,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 12, pp. 4323–4332, Dec. 2006. [5] A. Zhu, P. J. Draxler, J. J. Yan, T. J. Brazil, D. F. Kimball, and P. M. Asbeck, “Open-loop digital predistorter for RF power amplifiers using dynamic deviation reduction-based Volterra series,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 7, pp. 1524–1534, Jul. 2008. [6] D. R. Morgan, Z. Ma, J. Kim, M. G. Zierdt, and J. Pastalan, “A generalized memory polynomial model for digital predistortion of RF power amplifiers,” IEEE Trans. Signal Process., vol. 54, no. 10, pp. 3852–3860, Oct. 2006. [7] J. K. Cavers, “Amplifier linearization using a digital predistorter with fast adaptation and low memory requirements,” IEEE Trans. Veh. Technol., vol. 39, no. 4, pp. 374–382, Nov. 1990. [8] O. Hammi, F. M. Ghannouchi, S. Boumaiza, and B. Vassilakis, “A data-based nested LUT model for RF power amplifiers exhibiting memory effects,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 10, pp. 712–714, Oct. 2007. [9] P. L. Gilabert, A. Cesari, G. Montoro, E. Bertran, and J. M. Dilhac, “Multi-lookup table FPGA implementation of an adaptive digital predistorter for linearizing RF power amplifiers with memory effects,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 2, pp. 372–384, Feb. 2008. [10] K. Rawat, M. Rawat, and F. M. Ghannouchi, “Compensating I-Q imperfections in hybrid RF/digital predistortion with an adapted lookup table implemented in an FPGA,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 57, no. 5, pp. 389–393, May 2010. [11] P. L. Gilabert, G. Montoro, and E. Bertran, “FPGA implementation of a real-time NARMA-based digital adaptive predistorter,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 58, no. 7, pp. 402–406, Jul. 2011. [12] N. Benvenuto, F. Piazza, and A. Uncini, “A neural network approach to data predistortion with memory in digital radio systems,” in Proc. Int. Commun. Conf., 1993, vol. 1, pp. 232–236. [13] M. Ibnkahla, “Neural network predistortion technique for digital satellite communications,” in Proc. IEEE ICASSP, 2000, vol. 6, pp. 3506–3509. [14] T. Liu, S. Boumaiza, and F. M. Ghannouchi, “Dynamic behavioral modeling of 3G power amplifiers using real-valued time-delay neural networks,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 3, pp. 1025–1033, Mar. 2004. [15] M. Rawat, K. Rawat, and F. M. Ghannouchi, “Adaptive digital predistortion of wireless power amplifiers/transmitters using dynamic realvalued focused time-delay line neural networks,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 1, pp. 95–104, Jan. 2010. [16] F. Mkadem and S. Boumaiza, “Physically inspired neural network model for RF power amplifier behavioral modeling and digital predistortion,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 4, pp. 913–923, Apr. 2011. [17] P. L. Gilabert, M. E. Gadringer, G. Montoro, M. L. Mayer, D. D. Silveira, E. Bertran, and G. Magerl, “An efficient combination of digital predistortion and OFDM clipping for power amplifiers,” Int. J. RF Microw. Comput. Eng., vol. 19, no. 5, pp. 583–591, Sep. 2009. [18] M. J. Franco, “Wideband digital predistortion linearization of radio frequency power amplifiers with memory,” Ph.D. dissertation, Dept. Elect. Comput. Eng., Drexel Univ., Philadelphia, PA, 2005. [19] H. V. Thai, L. N. Tho, and B. Hichem, “Adaptive polynomial predistorters for M-QAM transmission using non-linear power amplifiers,” Wireless Commun. Mobile Comput., vol. 7, no. 3, pp. 267–283, Mar. 2007.

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[20] M. Valkama, M. Renfors, and V. Koivunen, “Compensation of frequency-selective I/Q imbalances in wideband receivers: Models and algorithms,” in Proc. IEEE Signal Process. Adv. Wireless Commun. Workshop, 2001, pp. 42–45. [21] J. Mahattanakul, “The effect of I/Q imbalance and complex filter component mismatch in low-IF receivers,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 53, no. 2, pp. 247–253, Feb. 2006. [22] S. A. Bassam, S. Boumaiza, and F. M. Ghannouchi, “Block-wise estimation of and compensation for I/Q imbalance in direct-conversion transmitters,” IEEE Trans. Signal Process., vol. 57, no. 12, pp. 4970–4973, Dec. 2009. [23] Y. D. Kim, E. R. Jeong, and Y. H. Lee, “Adaptive compensation for power amplifier nonlinearity in the presence of quadrature modulation/ demodulation errors,” IEEE Trans. Signal Process., vol. 55, no. 9, pp. 4717–4721, Sep. 2007. [24] J. K. Cavers, “The effect of quadrature modulator and demodulator errors on adaptive digital predistorters for amplifier linearization,” IEEE Trans. Veh. Technol., vol. 46, no. 2, pp. 456–466, May 1997. [25] J. K. Cavers, “New methods for adaptation of quadrature modulators and demodulators in amplifier linearization circuits,” IEEE Trans. Veh. Technol., vol. 46, no. 3, pp. 707–716, Aug. 1997. [26] Q. Ren and I. Wolff, “Influence of some imperfect system performances on linearizers,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 1998, pp. 973–976. [27] I. Teikari, J. Vankka, and K. Halonen, “Baseband digital predistorter with quadrature error correction,” Analog Integr. Circuits Signal Process., vol. 46, pp. 73–85, 2006. [28] Y. J. Liu, J. Zhou, B. H. Zhou, and Y. N. Liu, “Digital techniques to mitigate feedback impairment and noise of look-up table digital predistortion,” Int. J. RF Microw. Comput. Eng., vol. 21, no. 5, pp. 560–569, Sep. 2011. [29] S. Benedetto, E. Biglieri, and R. Daffara, “Modeling and performance evaluation of nonlinear satellite links—A Volterra series approach,” IEEE Trans. Aerosp. Electron. Syst., vol. AES-15, no. 4, pp. 494–507, Jul. 1979. [30] P. Singerl, A. Agrawal, A. Garg, Neelabh, G. Kubin, and H. Eul, “Complex baseband predistorters for nonlinear wideband RF power amplifiers,” in 49th IEEE Int. Midwest Circuits Syst. Symp., 2006, vol. 2, pp. 675–678. [31] L. Ding, Z. Ma, D. R. Morgan, M. Zierdt, and G. T. Zhou, “Compensation of frequency-dependent gain/phase imbalance in predistortion linearization systems,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 55, no. 1, pp. 390–397, Feb. 2008. [32] J. Deng, P. S. Gudem, L. E. Larson, D. F. Kimball, and P. M. Asbeck, “A SiGe PA with dual dynamic bias control and memoryless digital predistortion for WCDMA handset applications,” IEEE J. Solid-State Circuits, vol. 41, no. 5, pp. 1210–1221, May 2006. [33] S. A. Bassam, “Advanced signal processing techniques for impairments compensation and linearization of SISO and MIMO transmitters,” Ph.D. dissertation, Dept. Elect. Comput. Eng., Univ. Calgary, Calgary, AB, Canada, 2010. [34] H. Cao, A. S. Tehrani, C. Fager, T. Eriksson, and H. Zirath, “I/Q imbalance compensation using a nonlinear modeling approach,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 3, pp. 513–518, Mar. 2009. [35] M. Younes, O. Hammi, A. Kwan, and F. M. Ghannouchi, “An accurate complexity-reduced ‘PLUME’ model for behavioral modeling and digital predistortion of RF power amplifiers,” IEEE Trans. Ind. Electron., vol. 58, no. 4, pp. 1397–1405, Apr. 2011.

You-Jiang Liu received the B.S. degree in engineering physics from Tsinghua University (THU), Beijing, China, in 2008, and is currently working toward the Ph.D. degree in engineering physics at THU. From November 2011 to April 2012, he was a Visiting Student with the Intelligent RF Radio Laboratory (iRadio Lab), Department of Electrical and Computer Engineering, Schulich School of Engineering, University of Calgary, Calgary, AB, Canada. His main research interests are in the area of wireless communications, with a focus on high-efficiency RF PA design, digital predistortion linearization, and nonlinear modeling. Mr. Liu was the recipient of the Tsinghua Scholarship for Overseas Graduate Studies in 2011.

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Wenhua Chen (S’03–M’07–SM’12) received the B.S. degree in microwave engineering from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 2001, and the Ph.D. degree in electronic engineering from Tsinghua University, Beijing, China, in 2006. He has authored or coauthored over 50 journal and conference papers. He holds one U.S. patent with several Chinese patents pending. His current research interests include power-efficiency enhancement for wireless transmitters, PA predistortion, and reconfigurable and smart antennas.

Jie Zhou received the B.S. degree from Sichuan University, Chengdu, China, in 1995, and the M.S. degree from the Graduate School, China Academy of Engineering Physics (CAEP), Mianyang, China, in 2001. He is currently with the Institute of Electronic Engineering, CAEP, as a Senior Researcher. His main research interests are wireless communications and tracking telemetry command and communication (TTC&C).

Bang-Hua Zhou is currently with the Institute of Electronic Engineering, China Academy of Engineering Physics (CAEP), Mianyang, China, as a senior researcher. His main research interests are RF/microwave (MW) circuits and systems, RF PA design, and tracking telemetry command and communication (TTC&C).

Fadhel M. Ghannouchi (S’84–M’88–SM’93–F’07) is currently an iCORE Professor and Senior Canada Research Chair with the Electrical and Computer Engineering Department, Schulich School of Engineering, University of Calgary, Calgary, AB, Canada, and Director of the Intelligent RF Radio Laboratory (iRadio Lab), University of Calgary. He has held several invited positions at several academic and research institutions in Europe, North America, and Japan. He has provided consulting services to a number of microwave and wireless communications companies. He has authored or coauthored over 550 publications and three books. He holds 15 patents (with six pending). His research interests are in the areas of microwave instrumentation and measurements, nonlinear modeling of microwave devices and communications systems, design of power- and spectrum-efficient microwave amplification systems, and design of intelligent RF transceivers for wireless and satellite communications. Prof. Ghannouchi is a Fellow of the Institution of Engineering and Technology (IET). He is an Emeritus Distinguish Microwave Lecturer for the IEEE Microwave Theory and Techniques Society (IEEE MTT-S).

Yi-Nong Liu received the B.S., M.S., and Ph.D. degrees in engineering physics from Tsinghua University (THU), Beijing, China, in 1985, 1990, and 2000, respectively. From 1985 to 1997, he was with Nuclear Medicine Instruments, where he was primarily concerned with electronics. From 1998 to 2000, he was with X-Ray Cargo Inspection and Computed Tomography, where he was primarily concerned with data acquisition and processing. From 1991 to 1993, he was a Visiting Scholar with the Rush Medical Center, during which time he was involved with the buildind of their McSPECT system. He is currently a Professor with the Department of Engineering Physics, Key Laboratory of Particle and Radiation Imaging of Ministry of Education, Tsinghua University (THU), Beijing, China.

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Peak-Power Controlling Technique for Enhancing Digital Pre-Distortion of RF Power Amplifiers Charles Nader, Student Member, IEEE, Per Niklas Landin, Student Member, IEEE, Wendy Van Moer, Senior Member, IEEE, Niclas Björsell, Member, IEEE, Peter Händel, Senior Member, IEEE, and Daniel Rönnow, Member, IEEE Abstract—In this paper, we present a method to limit the generation of signal peak power at the output of a digital pre-distorter that is applied to a RF power amplifier (PA) operating in strong compression. The method can be considered as a joint crest-factor reduction and digital pre-distortion (DPD). A challenging characteristic of DPD when applied to a PA in strong compression is the generation of relatively high peaks due to the DPD expansion behavior. Such high peaks generation, which may be physically unrealistic, can easily damage the amplification system. Such a phenomenon, referred in this study as DPD-avalanche, is more noticed when the signal exciting the PA is compressed due to crest-factor reduction. The suggested method for controlling such DPD-avalanche is based on shaping the input signal to the DPD in such a way to keep the pre-distorted signal peak power below or near the maximum allowed peak power of the PA. The suggested method is tested experimentally on a Class-AB and a Doherty PA when excited with a wideband orthogonal frequency-division multiplexing (OFDM) signal. Scenarios for an OFDM signal with and without crest-factor reduction are evaluated. Measurement results when using the proposed DPD-avalanche controller show smooth deterioration of the in-band and out-of-band linearity compared to steep deterioration when no controller is used. In addition, the suggested controller offers a higher operating power range of the DPD while fulfilling out-of-band distortion requirements and preserving low in-band error. Index Terms—Controller, digital pre-distortion (DPD), peak-toaverage power reduction, power amplifier (PA) linearization, orthogonal frequency-division multiplexing (OFDM) systems.

I. INTRODUCTION

L

INEARIZATION of RF power amplifiers (PAs) is a necessity when high efficiency and linear operation are required [1]. Such an enhancement technique is strongly Manuscript received May 22, 2012; accepted August 03, 2012. Date of publication September 11, 2012; date of current version October 29, 2012.This work was supported in part by the Research Foundation-Flanders (FWO) under a postdoctoral fellowship. C. Nader and P. N. Landin are with the Department of Electronics, Mathematics and Natural Sciences, University of Gävle, Gävle SE-80176, Sweden, and also with the Signal Processing Laboratory, ACCESS Linnaeus Center, Royal Institute of Technology, Stockholm SE-10044, Sweden and the Electrical Measurement Department (ELEC) Department, Vrije Universiteit Brussel, B-1050 Brussels, Belgium. W. Van Moer and N. Björsell are with the Electrical Measurement Department (ELEC) Department, Vrije Universiteit Brussel, B-1050 Brussels, Belgium, and with the Department of Electronics, Mathematics and Natural Sciences, University of Gävle, Gävle SE-80176, Sweden. P. Händel is with the Signal Processing Laboratory, ACCESS Linnaeus Center, Royal Institute of Technology, Stockholm SE-10044, Sweden, and also with the Department of Electronics, Mathematics and Natural Sciences, University of Gävle, Gävle SE-80176, Sweden. D. Rönnow is with the Department of Electronics, Mathematics and Natural Sciences, University of Gävle Gävle, SE-80176, Sweden. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2213836

required in today’s wireless communication systems where signals with large bandwidth and high peak-to-average power ratio (PAPR) are used, e.g., in orthogonal frequency-division multiplexing (OFDM)-based systems. If a linearization technique is not used, the RF base-station PA needs to operate at lower power levels compared to its saturation point in order to avoid compression, and hence, clipping of the signal peaks, which generates in-band and out-of-band distortion. However, backing-off the PA operating power by a number of decibels proportional to the signal PAPR reduces the efficiency of the amplifier since a large amount of supplied power is dissipated as heat. Hence, a tradeoff exists between nonlinearity and efficiency [1]. Several techniques have been presented in the literature to overcome such a tradeoff, and hence, achieve the maximum performance from the amplifier. Some techniques aim at reducing the PAPR of the signal, hence, the required back-off margin, and are referred to as PAPR reduction techniques [2]–[6]. Others aim at linearizing the behavior of the PA by reducing the nonlinearity effect, and are referred as linearization techniques [7]–[10]. Other techniques aim at combining both PAPR reduction and linearization as in [11]–[15], which gives substantial improvements in both efficiency and linearity. Several linearization techniques exist in the literature. Feedback linearization was presented in [7]. However, it suffers from limited bandwidth, which is claimed to be overcome in [8]. Feedforward linearization [7] suffers from low power efficiency as it operates at high power. Baseband digital pre-distortion (DPD) presented in [9] and [10] is known for its good performance and low complexity, and is the focus of this paper. DPD aims at finding the inverse operation of the PA, and hence, shaping/distorting the input signal to the PA in a manner that the output signal from the PA is distortion free. The DPD behavior can be seen as an expansion operation applied to the input signal in order to compensate the compression caused by the PA. Such behavior is shown in Fig. 1. However, applying DPD to a PA in strong compression tends to compensate the compression by a relatively strong expansion of the signal, as shown in Fig. 1. Therefore, the DPD generates pre-distorted signals with extremely high peaks, hence, high PAPR. Such high peaks, which may be physically unrealistic, heat the power transistor and push it more into compression in a manner that DPD fails to correct for, stress the bias network, and can damage the amplification system. As a result, steep deterioration of the performance is reported in [14] and [15]. In addition, the phenomenon of high peak generation, referred to in this study as DPD-avalanche (not to be confused

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A. One-Step DPD

Fig. 1. AM/AM response. The straight line represents the desired linear input–output relation. The blue stars (in online version) represent the real behavior of the PA with compression at high input power levels. The red dots (in online version) represent the behavior of the PA subject to DPD with strong expansion at high power levels.

with avalanche breakdown in semiconductors, although it could lead to that), is more noticed when the signal exciting the amplifier is compressed due to crest-factor reduction [14], [15], which aims at operating the PA near its continuous wave (CW) 1-dB compression point. Hence, operating the PA near the CW 1-dB compression point region when both PAPR reduction and DPD are combined is risky, and needs to be backed off. As a consequence, the efficiency of the PA and its operating margin are reduced. To the knowledge of the authors, the problem of DPD-avalanche has not been discussed in the literature other than a general evaluation of the phenomena in [14] and [15]. In this paper, we propose a method to control the DPD-avalanche by limiting the peaks generated from the digital pre-distorter. The DPD model used is based on a memory polynomial [16], and is identified using the indirect learning architecture (ILA) [17]. In addition, multiple-step extraction of the DPD parameters is used to overcome extrapolation behavior caused by the pre-distorter. The structure of the DPD model, along with its parameter identification, for both one-step extraction and multiple-step iterative extraction, and the DPD-avalanche behavior are presented in Section II. The suggested DPD-avalanche controller is based on signal shaping and is presented in Section III. The performance of the suggested controller is tested on Class-AB and Doherty PAs under wireless local area network (WLAN) OFDM excitation signal. The excitation signal, devices-under-test (DUTs), and measurement setup are presented in Section IV. PA figures-of-merit are evaluated in Section V for cases where PAPR reduction and DPD are applied separately and combined, with and without the DPD-avalanche controllers. Discussions are given in Section VI, and conclusions are drawn in Section VII. II. DPD In this section, DPD for linearizing RF amplifiers is explained for one-step extraction, as well as multiple-step iterative extraction based on the ILA technique introduced in [17]. In addition, the phenomenon of DPD-avalanche, which exists in the compression operation region of the PA, is presented.

DPD is a technique used to improve the overall linearity of the PA when operated under weak compression. By weak compression, we refer to the operating power region of a PA where the excitation signal peaks start to clip. DPD works by reshaping the excitation signal with a compensation signal extracted from an inverse model of the PA nonlinearity. As a consequence, the output signal from the PA is linearly proportional to the input signal before the pre-distorter. Hence, linearity figures-of-merit, such as adjacent channel power ratio (ACPR) are improved in the PA operating region where the DPD parameters were extracted. Several methods are presented in the literature regarding the extraction of the PA inverse model, e.g., AM/AM and AM/PM characteristics [18] or behavioral models with memory [9], [10]. In this paper, DPD is based on the well-known parallel Hammerstein model. The model structure has shown to give satisfactory performance when used for both direct modeling, i.e., description of the input–output relation of RF PAs, and for inverse modeling, i.e., as a DPD structure [9], [10], [19], [20]. The structure of the parallel Hammerstein model is given by the nonlinear order and the memory depth . Such a model is denoted and can be expressed as (1) where is the low-pass equivalent input signal at sample , is the low-pass equivalent model output at sample , and is the parameters of the model. The model presented in (1) considers only odd nonlinear contributions that are generated near the fundamental excitation carrier. The inverse model parameters are identified using the ILA in [16] and [17]. B. Multiple-Step Iterative DPD The signal expansion at the output of the one-step ILA DPD results in the generation of high peaks and an increase in the root-mean-square (rms) values of the pre-distorted signal with respect to the original signal. Such changes in the signal, increase in absolute peak, and rms power, result in operating conditions different than the ones the DPD model was extracted based on, i.e., an extrapolation of the conditions at the input of the PA, which can introduce slight changes in its modeling behavior. As a result, a slight deterioration in the performance is expected. In order to overcome such phenomena and converge to the best performance, a multiple-step iterative DPD is used [21]. The first step is the normal one-step ILA, resulting in the pre-distorted input signal and the output signal . In the second step, the parameters of the pre-distorter are instead extracted using and . The parameters from this second step are then used in the pre-distortion model identification to create the second-step pre-distortion signal and subsequently the measured output signal . This is continued until the pre-distorter results show no further improvements. The required number of steps depends mainly on the DUT and the bias network.

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The improvements achieved by iterating the DPD extraction are valid up to the operating power region where the DPDavalanche phenomena starts. Operating at higher power levels will only lead to unrealistic expansion of the signal. C. DPD-Avalanche Behavior A major challenge when using DPD and operating the PA in the compression region is the generation of relatively high peaks. The generation of these high peaks is caused by the compensation of compression effects existing in the output signal from the PA with an expansion of the input signal. Such behavior was mainly observed in [14] and [15], where the aim was to operate the PA at the maximum allowed power level while satisfying the limits on in-band and out-of-band distortion. It was also shown in [14] and [15] that combining DPD and PAPR reduction pushes the operation region of the PA near its 1-dB compression point region, which gives higher poweradded efficiency (PAE). However, it was shown that operating the PA in that strong compression region is risky since a small increase in the absolute power of the input signal, on the order of 0.5 dB, could lead to DPD-avalanche. Hence, for a robust operation, this is not a desirable situation because it could potentially lead to strong deterioration of PA performance and possibly damaging its input stage. As a consequence, the operating margin of the PA needs to be backed off, which reduces the efficiency of the amplifier. In addition, using multiple-step iterative DPD extracted in the DPD-avalanche region will only lead to steeper expansion after each DPD parameter update. In fact, in the first step of the ILA, the pre-distorter expands the input signal, thus creating an extrapolation of the absolute operating power. The pre-distorted signal is then transmitted, and the peaks, which now have higher amplitude, are further compressed. To compensate this compression, the next step of the pre-distorter extraction expands these peaks even more, which leads to a steeper DPD-avalanche behavior. The effects of DPD-avalanche on the pre-distorted signal are presented in Fig. 2(a) and (b) for one-step ILA extraction. Fig. 2(a) shows the peak and rms input power of the original signal and the pre-distorted based on one-step ILA. As shown, when the signal starts to compress, the DPD starts to expand the signal, mainly a few of its peaks. When the PA is operated at stronger compression, the DPD-avalanche starts, which expands the peaks and increases the rms power of the signal in an extreme way. Fig. 2(b) shows the PAPR as a function of the rms input power of the original and the pre-distorted signals. PAPR on the order of 20 dB can be reached when the DPD-avalanche behavior starts, and much higher values are expected at strong compression. Such high PAPR values put strong requirements on the digital-to-analog converters (DACs), and limit the dynamic range and the effective number of bits in the signal-generation process. It should be mentioned that near the compression region, using accurate models with relatively high nonlinear order for DPD purposes generates much higher peaks and deteriorates more the DPD performance, if compared to using a relaxed model with lower nonlinear order to pre-distort the same DUT.

Fig. 2. (a) Peak input power versus rms input signal power with a one-to-one relation between the original and the pre-distorted signals. (b) PAPR versus rms input signal power with a one-to-one relation between the original and the predistorted signals.

Hence, a tradeoff can be made between the model accuracy of the pre-distorter and its performance and operating region. Limiting the peaks in the pre-distorted signal can be done for memoryless DPD models by hard clipping, however, at the cost of degrading the linearization performance. In addition, for memory DPD models, clipping the peaks in practice will affect all nearby samples of the signal, up to the memory depth of the model, which leads to a steep deterioration of the DPD performance. Hence, applying hard clipping between the inverse (DPD) and direct model (PA) is preferably avoided. In the following, a technique based on shaping the peaks of the input signal to the pre-distorter such that the peaks in the pre-distorted signal are limited is presented. III. DPD PEAK CONTROLLER In this section, a method is presented to control the generation of relatively high peaks from the DPD when the amplifier is operated in compression. The main purpose of the controller is to allow safe operation of the PA near its 1-dB compression point, which gives the ultimate efficiency. The suggested DPD peak controller is based on weighting the samples of the input signal in a way that the samples of the pre-distorted signal have amplitudes below a certain threshold. That threshold is upper bounded by the maximum allowed peak power that the PA can handle. Consider the parallel Hammerstein model, , defined in Section II, where is the input signal to pre-distort, is the pre-distorted signal, and are the DPD model parameters identified based on the ILA. Assume to be the maximum allowed peak amplitude threshold that the signal can have. Hence, for any sample that is larger than , a back-off coefficient is defined (2) Based on a model with memory depth , for any back-off coefficient , weighting coefficients

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relative to the input signal samples defined such that

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 11, NOVEMBER 2012

are

In order to simplify the solution to (5), the weighting coefficients are assumed to be real numbers. Hence, (5) can be written as (6)

(3) Hence, the problem of backing-off the pre-distorted signal reduces to finding the respective input signal weighting coefficients in (3). Due to the memory consideration in the model, finding the weighting coefficients of the input samples, for all the back-off coefficients relative to the pre-distorted samples larger than , is not straightforward. In fact, due to the dependency between the pre-distorted samples, backing-off one pre-distorted sample requires not only to find the weighting coefficient of its respective input sample, but also the weighting coefficients for the following samples, even if their respective pre-distorted samples are below . Such strategy can be highly time consuming certainly when working with PAPR reduced signals in the compression region, where the density of the signal peaks above is high. In addition to the implementation challenge, using a dynamic equation for finding the weighting coefficients leads to a dependency between the coefficients . Hence, any error in the calculation of a coefficient will propagate in the subsequent coefficients, which can lead to a deterioration of the DPD performance. Such error propagation becomes worse when using a nonanalytical solution for finding the coefficients. Another drawback is the uncontrolled distortion of a large amount of the input signal samples introduced by the dynamic approach, which can deteriorate the error vector magnitude (EVM). In order to simplify the controller, one can assume the model used to extract the controller parameters, i.e., weighting coefficients, to be memoryless. Hence, a one-to-one relation exists between the input signal and the pre-distorted signal. It will be shown in the experimental validation, that the memory effects in the compression region have a small effect on the performance of the DPD as compared to that of the nonlinearities. For any sample that is larger than , consider the parallel Hammerstein model, with being the DPD model parameters previously identified based on the ILA. A new pre-distorted sample based on a memoryless model can be found as (4) relative to the sample Hence, for any back-off coefficient , alternatively to , a weighting coefficient relative to the input signal sample is defined such that

(5)

In addition, define

as (7)

and factorizing the right-hand side of (6) with respect to its leads to greatest denominator (8) Equation (8) can be arranged as

(9) Equation (9) is polynomial of order with respect to . Hence, solving for its roots analytically is not straightforward. However, numerical methods with good computation efficiency exist in the literature and give approximate roots for (9), [22], [23]. In this study, the function roots implemented in MATLAB is used [24], which computes the eigenvalues of the companion matrix of the polynomial defined in (9). Due to the assumption made in (6), only the complex root with the smallest imaginary element is chosen as solution for (9). Knowing the values of that reduce the peaks of , and hence, of , the original signal is shaped by multiplying its samples with their respective weighting coefficients , leading to a new signal . Finally, a new pre-distorted signal with limited peaks is obtained by solving (1) for the input signal and the model parameters identified previously based on . It should be mentioned that the DPD model parameters are still valid as fit the class of the identification signal . Using the weighting coefficients gives an approximate solution to the problem of minimizing the peak at the output of the DPD. As will be shown in Section V, such a solution is sufficient to overcome the DPD-avalanche for both memoryless models and models with memory, and hence, achieves better DPD performance over a wider operating range than could be previously achieved. IV. EXPERIMENTAL SETUP A 20-MHz WLAN OFDM signal with 64 subcarriers using 16 quadrature amplitude modulation (16-QAM) and consisting of 128 symbols is used. The OFDM signal, referred to as the original signal, has a PAPR of 10.8 dB, and an ACPR of 46.2 dB. The PAPR-optimized version of the original signal

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Fig. 4. Doherty characteristics. (a) AM/AM. (b) AM/PM. Fig. 3. Class-AB characteristics.(a) AM/AM. (b) AM/PM.

based on convex optimization as used in [15], has a PAPR of 6.4 dB, an EVM of 19.6 dB, and an ACPR of 42.5 dB. The slight increase in ACPR, compared to the original signal, is due to the increase in the effective bandwidth of the optimized signal, which affects the spectrum tails caused by the time-window used in generating the OFDM signal. In addition, the EVM of the PAPR-optimized signal is relaxed to the maximum value that a WLAN system with similar modulation characteristics can handle in order to achieve the largest PAPR reduction with the lowest time consumption [6]. Two PAs are used in the evaluation process. The first amplifier is a single-transistor Class-AB LDMOS designed by Ericsson AB. It is optimized for operation between 2.10–2.22 GHz with a linear gain of 12.5 dB and a CW 1-dB compression point at an output power of 52 dBm. The second amplifier under test is a Doherty design from Freescale Semiconductor based on the MRF6P21190H LDMOS transistor, which is optimized for operation in the 2.1–2.2-GHz frequency band. It has a 15-dB overall gain and a CW 1-dB compression point at an output power of 50 dBm. The Doherty amplifier is based on two power transistors working in parallel. The first one is biased for a class-AB mode of operation, while the second one, called the “peaking amplifier,” is Class-C biased. Both PAs are driven by a 200-W linear driver amplifier designed by Ericsson AB for research purposes. The AM/AM–AM/PM characteristics of both PAs, when excited with the original signal at strong compression, are given in Figs. 3 and 4 based on 100 averaging for noise reduction. The spreading of the data in the plots shows that both PAs have memory effects. It should be noted that when excited with the PAPR-optimized signal and for the same rms power level as in the original signal case, similar AM/AM–AM/PM characteristics are achieved with a reduction in the compression level proportional to the PAPR reduction level. For measuring the spread spectrum from the PAs, a system consisting of a wideband downconverter and a high-perfor-

Fig. 5. Test-setup for measuring wideband spectra.

mance analog-to-digital converter with 14-bits resolution and a sampling rate of 400 MHz is used. The vector signal generator is an R&S SMU200A combined with an R&S AFQ100A in-phase/quadrature (IQ) source. The measurement setup is shown in Fig. 5. Coherent averaging is used to reduce the noise levels in the measurements [19]. The input and output signals are synchronized using time-domain cross-correlation followed by frequency-domain phase shift [19]. V. MEASUREMENTS AND EVALUATIONS In this section, an evaluation is presented of the effect of applying the DPD peak controller introduced in Section III, on the performance of the pre-distorter, for both original and PAPR-optimized signals. The input power of the PA is swept to cover the region between weak and strong compression. The DPD parameters are extracted for every power step and only two-step iterative ILA is needed to reach the best achievable performance. The DPD model with smallest modeling error has a nonlinear order 11 and memory depth of three samples. In the evaluation, measurement results for a DPD model without and with memory and their effects on the controller performance are given. It should be mentioned that the effects of the driver PA are also considered in the DPD, which pre-distorts the complete amplification chain. Regarding the notation in the plots, “original” refers to the original signal, “reduced” refers to the PAPR-optimized signal, “pre-distorted ” refers to the signal when DPD is extracted

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Fig. 7. Doherty—Peak input power versus rms input signal power, showed for both original and PAPR-reduced signals based on: (a) a memoryless DPD model and (b) a DPD model with memory depth of three samples. Fig. 6. Class AB—Peak input power versus rms input signal power, showed for both original and PAPR-reduced signals based on: (a) a memoryless DPD model and (b) a DPD model with memory depth of three samples.

based on -step iteration, and “weighted” refers to using the signal-shaping-based controller. A. Peak Power Control The main aim of using the DPD-avalanche controller is to limit the generation of strong peaks at the output of the DPD, when the PA is operated in compression region. In the following, two figures-of-merit for DPD peaks generation are discussed. 1) Input Power Control: When DPD is extracted in the compression region, it tends to compensate the amplifier output signal compression by expanding the input signal. Such expansion behavior is shown for the Class-AB PA in Fig. 6(a) and (b), for scenarios where original and PAPR-reduced signals are tested, and when memoryless DPD and DPD with a memory depth of three samples are used. For both DPD scenarios, memoryless and memory, a one-step ILA extraction is used, hence, the notation “pre-distorted1.” For the Doherty PA, the expansion behavior is shown in Fig. 7(a) and (b). As can be seen, DPD expands a few peaks of the signal at weak compression. When the PA is operated in stronger

compression, the expansion covers more peaks, which leads to a rapid increase in both peak and rms value of the pre-distorted signal. This phenomenon is denoted DPD-avalanche, which generates unrealistic signals for the operated amplifier, as well as for the DACs of the arbitrary waveform generator. Using the peak controller based on signal shaping “softly” limits the generation of peaks, hence, the unrealistic increase in rms power. However, a smooth deterioration in performance of the controller at strong compression is noticed when a DPD model with memory is used. Such deterioration, i.e., generation of peaks larger than the threshold, is expected, and results from: 1) the increase in the amount of numerical errors resulting from the use of nonanalytical solutions for finding the weighting factors and 2) the assumption of a memoryless model in (4) that was used to find the weighting coefficients . Despite that smooth deterioration, the resulting pre-distorted signals are still reasonable for operation, and as will be shown later, still result in good in-band and out-of-band performance. 2) PAPR: In order to study the effects of the DPD peak controller on the PA level, the PAPR of the pre-distorted signals as a function of the PA output power for both original and PAPR optimized signals are shown for the Class-AB PA in Fig. 8(a) for a memoryless DPD model and in Fig. 8(b) for a memory

NADER et al.: PEAK-POWER CONTROLLING TECHNIQUE FOR ENHANCING DPD OF RF PAs

Fig. 8. Class AB—PAPR of the input stage signal versus output power, showed for both original and PAPR-reduced signals based on: (a) a memoryless DPD model and (b) a DPD model with memory depth of three samples.

DPD model. For the Doherty PA, the PAPR merits are given in Fig. 9(a) and (b). As shown in the four figures, using the peak controller smoothly limits the crest factor of the pre-distorted signals. Hence, a higher operating power range of the system DPD-PA is achievable without risks of transistor damage due to the DPD-avalanche. In addition, Figs. 8(b) and 9(b) show the effect of assuming a memoryless model in the controller design stage with respect to the PAPR of the pre-distorted signal when a DPD model with a memory depth of three samples is used. As seen, the PAPR of the pre-distorted signals increases when the PA is in strong compression. However, such an increase is still manageable and could be overcome by iterating the ILA extraction as for the case of the Class-AB PA. It should be noted that for the Doherty PA, iterating the ILA extraction did not decrease the PAPR of the pre-distorted signal. In addition, iterating the ILA more resulted in similar behavior. For power values larger than 46 dBm for the Class-AB PA or larger than 44 dBm for the Doherty PA, applying DPD to the original signal without the controller generates extreme peaks that drastically increase the PAPR of the pre-distorted signals. Hence, those signals cannot be transmitted to the PA in order to avoid damaging its transistor. Using the peak controller leads to

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Fig. 9. Doherty—PAPR of the input stage signal versus output power, showed for both original and PAPR-reduced signals based on: (a) a memoryless DPD model and (b) a DPD model with memory depth of three samples.

a smooth decrease in PAPR for the case of a memoryless DPD model, and to a smooth increase in PAPR, at much lower rate when compared to DPD only, for the case of a memory model. Hence, no DPD-avalanche behavior is noted. B. ACPR The aim of using DPD is to linearize the amplifier, and hence, to reduce the out-of-band distortion generated by the PA when operated in weak compression. If the DPD operation is successful over a wider operating power range, a higher output power can be reached, which drastically improves the PAE of the amplification system while satisfying the linearity constraint. A standard figure-of-merit representing the PA out-of-band distortion is the ACPR, which represents the ratio between the average power leaking to the adjacent channel and the average power in the main channel. In this study, ACPR is evaluated with respect to the worst (left or right) adjacent leakage, where the adjacent channel is situated at shoulder-to-shoulder distance from the main channel and with a bandwidth of 20 MHz. As shown in Figs. 10(a) and (b) and 11(a) and (b), which present ACPR versus output power, applying the peak controller

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Fig. 10. Class AB—ACPR evaluation versus output power, showed for both original and PAPR-reduced signals based on: (a) a memoryless DPD model and (b) a DPD model with memory depth of three samples.

offers safer operation of the DPD over a wider operating power range. In fact, based on a 40-dB ACPR limit for WLAN, and considering the DPD without a peak controller as a reference, using the signal-shaping-based controller allows an additional 2 dB of output power for the case of the original signal. For the case of the PAPR-optimized signal, a slight and safer increase in output power was achieved, which allows operating both amplifiers near their CW 1-dB compression point. The smaller improvement when using the PAPR-optimized signal is due to the high density of expanded peaks that needs to be controlled. In addition, all four figures show similar ACPR performance when memoryless and memory DPD models are used. Only slight improvement in the order of 0.5 dB in ACPR is achieved for the model with memory. Such results validate the assumption of extracting the weighting coefficients based on a memoryless model. They also show that, at strong compression, the nonlinear memory effects are dominated by the static nonlinear contributions. C. EVM Regarding the effects of the DPD peak controller on the in-band error, the EVM, which presents a measure of the

Fig. 11. Doherty—ACPR evaluation versus output power, showed for both original and PAPR-reduced signals based on: (a) a memoryless DPD model and (b) a DPD model with memory depth of three samples.

average constellation errors, is evaluated versus the output power in Figs. 12(a) and (b) and 13(a) and (b). Using the peak controller leads to a smooth increase in EVM. Such a result, combined with the achieved improvements in ACPR and operating output power, shows that, for the case of the original OFDM signal, the presented peak controller acts as a joint PAPR reduction and DPD, which improves the linearity and the operating power range while preserving a low in-band error. No similar performance is reported in the literature to the knowledge of the authors. In addition, Figs. 12(b) and 13(b) show the advantage of using a memory DPD model when operating the PA in its linear region. In fact, for the original signal, the terms in the DPD model corresponding to the linear memory correct for the PA linear in-band gain variations. Working in the compression region, or when exciting with the PAPR reduced signal, no significant difference is seen between using a memoryless or a memory DPD model. D. PAE The main reason for applying PAPR reduction and DPD is to increase the operation margin of the PA, achieve an efficient use of the supplied power, while maintaining sufficient linearity.

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Fig. 12. Class AB—EVM evaluation versus output power, showed for both original and PAPR-reduced signals based on: (a) a memoryless DPD model and (b) a DPD model with memory depth of three samples.

Fig. 14(a) and (b) presents PAE as a function of the output power for the different excitation scenarios and based on a memoryless DPD model (DPD models with memory gave similar results). The (output power, PAE) levels for each scenario are chosen in this evaluation with respect to an ACPR performance of 40 dBc and a maximum EVM of 19 dB, which are typically used for WLAN transmitters. As can be seen, applying the DPD peak-controller to the original signal leads to a substantial increase in the efficiency of operation for both types of amplifiers. Increases in PAE up to 5% points for the Class-AB PA and 6.5% points for the Doherty PA were achieved. Such improvements allow operating both amplifiers a step closer to their CW 1-dB compression point even without any use of PAPR reduction technique. VI. DISCUSSIONS Limiting the peaks of the pre-distorted signal gives additional safe operating margin for the system DPD-PA, with a smooth deterioration in the linearization performance, which increases the efficiency of operation. Such a peak controller relaxes the operating conditions on the PA by avoiding excess heating, and

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Fig. 13. Doherty—EVM evaluation versus output power, showed for both original and PAPR-reduced signals based on: (a) a memoryless DPD model and (b) a DPD model with memory depth of three samples.

relaxes the requirements in the signal generation stage, hence avoiding the need for high resolution DACs. As shown in the measurement evaluations, the suggested DPD peak controller succeeds in limiting the peaks for both memoryless and memory DPD models. For the case of the memory model, a smooth degradation in the performance is seen in strong compression. However, iterating the ILA can overcome such behavior. As a result, its performance on the PA level is independent of the dynamic behavior of the amplification system. As shown in Section V, the main noticeable improvement resulting from using a memory DPD model is on the in-band error when the PA, excited by the original signal, is operated in its linear region. Operating at higher power levels, or when excited with the PAPR-reduced signal, using a memory DPD model did not result in significant improvement of either in-band or out-of-band distortions. Mainly, this behavior comes from the fact that in the strong compression region, the nonlinearity contributions are much more relevant than the dynamic contributions. Hence, when operating the amplifier in its linear region, i.e., far below its CW 1-dB compression point, it is convenient to consider a memory model that compensates for the dynamic behavior of the amplifier. On the other hand, when operated in the compression region, i.e., near the CW 1-dB compression point,

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in-band and out-of-band linearization, as well as to the operating power range, were achieved. The performance of the suggested peak controller can be seen as a joint crest-factor reduction and DPD. Improvements on the order of 2 dB in operating output power, while maintaining a low in-band error, were achieved when considering a standard OFDM signal without crest-factor reduction. Such improvements allow the PA to operate closer to its CW 1-dB compression point, which results in more efficient operation. For the case of a PAPR-reduced OFDM signal, applying the peak controller to the DPD offers safer operation near the CW 1-dB compression point without risks of power transistor damage. REFERENCES

Fig. 14. PAE based on all excitation scenarios and a memoryless DPD model showed for: (a) Class-AB PA and (b) Doherty PA.

it is beneficial to consider a memoryless DPD model, which relaxes the memory requirements in the hardware implementation and offers a good peak controller performance. On top of that, it could be beneficial to reduce the number of parameters of the DPD model by reducing its nonlinear order. It is known that a DPD with high-order nonlinearity tends to compensate for strong compression by stronger expansion. Hence, it generates very high peaks. Lowering the order of the DPD model limits the generation of those high peaks, which relaxes the requirements on the controller at the price of an acceptable decrease in the ACPR performance. In addition, lowering the model order saves a substantial amount of memory in the hardware implementation. VII. CONCLUSION The problem of DPD-avalanche, which generates unrealistic peaks at the output of a PA digital pre-distorter operating at strong compression, has been solved. A technique based on shaping the input signal to the pre-distorter such that the output signal is peak-limited has been presented. The suggested DPD peak controller, combined with iterative DPD model identification based on the ILA strategy, manages to limit the peaks in the pre-distorted signal for both memoryless and memory DPD models. Improvements in the DPD performance with respect to

[1] S. Cripps, RF Power Amplifiers for Wireless Communications. Boston, MA: Artech House, 2006. [2] H. Ochiai and H. Imai, “Performance analysis of deliberately clipped OFDM signals,” IEEE Trans. Commun., vol. 50, no. 1, pp. 89–101, Jan. 2002. [3] S. H. Han and J. H. Lee, “An overview of peak-to-average power ratio reduction techniques for multicarrier transmission,” IEEE Wire. Commun., vol. 12, no. 2, pp. 56–65, Apr. 2005. [4] A. Aggarwal and T. Meng, “Minimizing the peak-to-average-power ratio of OFDM signals using convex optimization,” IEEE Trans. Signal Process., vol. 54, no. 8, pp. 3099–3110, Aug. 2006. [5] S. Sen, R. Senguttuvan, and A. Chatterjee, “Concurrent PAR and power amplifier adaptation for power efficient operation of WiMAX OFDM transmitters,” in IEEE Radio Wireless Symp., Jan. 2008, pp. 21–24. [6] C. Nader, P. Händel, and N. Björsell, “Peak-to-average power reduction of OFDM signals by convex optimization: Experimental validation and performance optimization,” IEEE Trans. Instrum. Meas., vol. 60, no. 2, pp. 473–479, Feb. 2011. [7] J. Vuolevi and T. Rahkonen, Distortion in RF Power Amplifiers. Norwood, MA: Artech House, 2003. [8] Y. Y. Woo, J. Kim, J. Yi, S. Hong, I. Kim, J. Moon, and B. Kim, “Adaptive digital feedback predistortion technique for linearizing power amplifiers,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 5, pp. 932–940, May 2007. [9] F. Ghannouchi and O. Hammi, “Behavioral modeling and predistortion,” IEEE Microw. Mag., vol. 10, no. 7, pp. 52–64, Dec. 2009. [10] L. Anttila, P. Händel, and M. Valkama, “Joint mitigation of power amplifier and I/Q modulator impairments in broadband direct-conversion transmitters,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 4, pp. 730–739, Apr. 2010. [11] M. Helaoui, S. Boumaiza, A. Ghazel, and F. Ghannouchi, “On the RF/DSP design for efficiency of OFDM transmitters,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 7, pp. 2355–2361, Jul. 2005. [12] O. Hammi, S. Carichner, B. Vassilakis, and F. Ghannouchi, “Synergetic crest factor reduction and baseband digital predistortion for adaptive and 3G Doherty power amplifier linearizer design,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 11, pp. 2602–2608, Nov. 2008. [13] A. Zhu, P. Draxler, J. Yan, T. Brazil, D. Kimball, and P. Asbeck, “Openloop digital predistorter for RF power amplifiers using dynamic deviation reduction-based volterra series,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 7, pp. 1524–1534, Jul. 2008. [14] C. Nader, P. N. Landin, W. Van Moer, N. Björsell, P. Händel, and M. Isaksson, “Peak-to-average power ratio reduction versus digital predistortion in OFDM based systems,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2011, pp. 1–4. [15] C. Nader, P. N. Landin, W. Van Moer, N. Björsell, and P. Händel, “Performance evaluation of peak-to-average power ratio reduction and digital pre-distortion for OFDM based systems,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 12, pt. 2, pp. 3504–3511, Dec. 2011. [16] L. Ding, G. T. Zhou, D. R. Morgan, Z. Ma, J. S. Kenney, J. Kim, and C. R. Giardina, “A robust digital baseband predistorter constructed using memory polynomials,” IEEE Trans. Commun., vol. 52, no. 1, pp. 159–165, Jan. 2004. [17] C. Eun and E. Powers, “A new Volterra predistorter based on the indirect learning architecture,” IEEE Trans. Signal Process., vol. 45, no. 1, pp. 223–227, Jan. 1997.

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[18] A. D’Andrea, V. Lottici, and R. Reggiannini, “RF power amplifier linearization through amplitude and phase predistortion,” IEEE Trans. Commun., vol. 44, no. 11, pp. 1477–1484, Nov. 1996. [19] M. Isaksson, D. Wisell, and D. Rönnow, “A comparative analysis of behavioral models for RF power amplifiers,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 1, pp. 348–359, Jan. 2006. [20] D. Wisell, M. Isaksson, N. Keskitalo, and D. Rönnow, “Wideband characterization of a Doherty amplifier using behavioral modeling,” in Proc. ARFTG Conf., Jun. 2006, pp. 190–199. [21] L. Ding, G. Zhou, D. Morgan, M. Zhengxian, J. Kenney, J. Kim, and C. Giardina, “Memory polynomial predistorter based on the indirect learning architecture,” in IEEE GLOBECOM Conf., 2002, pp. 967–971. [22] G. H. Golub and C. F. Van Loan, Matrix Computations. Baltimore, MD: The Johns Hopkins Univ. Press, 1996. [23] W. H. Press, S. A. Teukolsky, W. T. Vetterling, and B. P. Flannery, Numerical Recipes: The Art of Scientific Computing. Cambridge, U.K.: Cambridge Univ. Press, 2007. [24] Roots: MATLAB Software for Root Finding Algorithm. ver. 5.12.4.5, The MathWorks Inc., Natick, MA, Dec. 2011. [Online]. Available: http://www.mathworks.se/help/techdoc/ref/roots.html

Charles Nader (S’08) received the M.E. degree in electrical engineering from the Lebanese University ULFG2, Roumieh, Lebanon, in 2005, the M.Sc. degree in electrical engineering/telecommunication from the University of Gävle, Gävle, Sweden in 2006, the Licentiate of Engineering degree in telecommunication/signal processing from the Royal Institute of Technology, Stockholm, Sweden, in 2010, and is currently working toward the Ph.D. degree at the Royal Institute of Technology and at Vrije Universiteit Brussel, Brussels, Belgium. In 2007, he was a consultant for Multilane Inc., Houmal, Lebanon, where he was involved with microwave devices and signal integrity. In 2008, he joined the Center for RF Measurement Technology, University of Gävle, and the Signal Processing Laboratory, Royal Institute of Technology. In 2010, he also joined the Electrical Measurement Department (ELEC) Department, Vrije Universiteit Brussel. His main research focuses on signal-shaping techniques, samplingbased measurement techniques, and compressive sampling.

Per Niklas Landin (S’07) received the M.Sc. degree in engineering physics from Uppsala University, Uppsala, Sweden, in 2007, and the Ph.D. from the KTH Royal Institute of Technology, Stockholm, Sweden, and Vrije Universiteit Brussel, Brussels, Belgium, in 2012. He is currently with the University of Gävle, Gävle, Sweden. His main research interests are in nonlinear system modeling and signal processing for instrumentation with a focus on linearization techniques for nonlinear high-frequency systems, in particular PAs.

Wendy Van Moer (S’97–M’01–SM’07) received the Engineer and Ph.D. degrees in applied sciences from Vrije Universiteit Brussel (VUB), Brussels, Belgium, in 1997 and 2001, respectively. She is currently an Associate Professor with the Electrical Measurement Department (ELEC), VUB, and a Visiting Professor with the Department of Electronics, Mathematics and Natural Sciences, University of Gävle, Gävle, Sweden. Her main research interests are nonlinear measurement and modeling techniques for medical and high-frequency applications.

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Dr. Van Moer was the recipient of the 2006 Outstanding Young Engineer Award of the IEEE Instrumentation and Measurement Society. Since 2007, she has been an associate editor for the IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT. In 2010, she became an associate editor for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES.

Niclas Björsell (S’02–M’08) was born in Falun, Sweden, in 1964. He received the B.Sc. degree in electrical engineering and Lic. Ph. degree in automatic control from Uppsala University, Uppsala, Sweden, in 1994 and 1998, respectively, and the Ph.D. degree in telecommunication from the Royal Institute of Technology, Stockholm, Sweden, in 2007. He possesses several years of experience from research and development projects that fostered collaborations between industry and academia. For over 15 years, he has held positions in academia, as well as in industry. From 2006 to 2009, he was the Head of the Division of Electronics, Department of Technology and Built Environment, University of Gävle, Gävle, Sweden. He is currently an Associate Professor with the University of Gävle, and a Guest Professor with Vrije Universiteit Brussel, Brussels, Belgium. He has authored or coauthored over 50 papers in peer-reviewed journals and conferences. His research interests include RF measurement technology, analog-to-digital conversion, and cognitive radio. Dr. Bjärsell is an associate editor for the IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT. He is a voting member of the IEEE Instrumentation and Measurement TC-10.

Peter Händel (S’88–M’94–SM’98) received the Ph.D. degree from Uppsala University, Uppsala, Sweden, in 1993. From 1987 to 1993, he was with Uppsala University. From 1993 to 1997, he was with Ericsson AB, Kista, Sweden. From 1996 to 1997, he was with the Tampere University of Technology, Tampere, Finland. Since 1997, he has been with the Royal Institute of Technology, Stockholm, Sweden, where he is currently a Professor of signal processing and Head of the Signal Processing Laboratory. From 2000 to 2006, he worked part time with the Swedish Defence Research Agency, as an Adjunct Director of Research. In 2010, he spent some time with the Indian Institute of Science (IISc), Bangalore, India, as a Guest Professor. He is currently a Guest Professor with the University of Gävle, Gävle, Sweden. Prof. Händel has been an associate editor for several journals including the IEEE TRANSACTIONS ON SIGNAL PROCESSING.

Daniel Rönnow (M’05) received the M.Sc. degree in engineering physics and Ph.D. degree in solid-state physics from Uppsala University, Uppsala, Sweden, in 1991 and 1996, respectively. From 1996 to 1998, he was involved with semiconductor physics with the Max-Planck-Institut für Festkörperforschung, Stuttgart, Germany, and from 1998 to 2000, with infrared sensors and systems with Acreo AB, Stockholm, Sweden. From 2000 to 2004, he was a Technical Consultant and Head of Research with Racomna AB, Uppsala, Sweden, where he was involved with PA linearization and “smart” materials for microwave applications. From 2004 to 2006, he was a University Lecturer with the University of Gävle, Sweden. From 2006 to 2011, he was a Senior Sensor Engineer with Westerngeco, Oslo, Norway, where he was involved with signal processing and seismic sensors. In 2011, he became a Professor of electronics with the University of Gävle. Since 2000, he has been an Associate Professor with Uppsala University. He has authored or coauthored over 45 peer-reviewed papers. He holds eight patents. His current research interests are RF measurement techniques and linearization of nonlinear RF circuits and systems.

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Peak-Power Controlled Digital Predistorters for RF Power Amplifiers Per N. Landin, Student Member, IEEE, Wendy Van Moer, Senior Member, IEEE, Magnus Isaksson, Senior Member, IEEE, and Peter Händel, Senior Member, IEEE

Abstract—This paper investigates the issue of “predistorter blow-up,” i.e., uncontrolled peak expansion caused by the predistorter. To control the peak expansion, an extension of the multistep indirect learning architecture (MS-ILA) is proposed by adding a constraint that describes the allowed peak power of the predistortion signal. The resulting optimization problem is shown to be convex and an optimization method is formulated to solve it. Measurements on a class-AB power amplifier (PA) using orthogonal frequency-division multiplex signals show that the peak control works as intended and prevents the MS-ILA from generating high peaks when the PA is operated in compression. The restriction on the peak power also prevents the performance degradation occurring due to the “blow-up” problem. This makes the proposed controlled MS-ILA a safer option than the standard MS-ILA. In addition to controlling the peak input power to the PA, using the proposed method it was possible to increase the output power by 1.3 dB while fulfilling requirements of less than 40-dB adjacent channel leakage power ratio, compared to the standard fivestep MS-ILA. Reduced peak power also reduces the requirements on linearity in signal generation, resolution in computations, and analog-to-digital and digital-to-analog conversion. Index Terms—Linearization, memory polynomials, nonlinear systems, optimization, power amplifiers (PAs), system identification, telecommunication.

I. INTRODUCTION

P

OWER amplification of RF signals is still an issue, despite the last years’ advances in power amplifier (PA) design and linearization techniques. There is a tradeoff between the linearity and efficiency in PAs [1]. Traditional PAs can be viewed as compressive devices with a certain amount of memory. The compressive behavior of RF PAs is a nonlinear operation that causes spectral regrowth and constellation distortion compared to the original input signal. Manuscript received November 29, 2011; revised July 30, 2012; accepted August 02, 2012. Date of publication September 14, 2012; date of current version October 29, 2012. This work was supported by the L. M. Ericsson Research Foundation and the Swedish Research Council (VR). P. N. Landin is with the Department of Electronics, Mathematics and Natural Sciences, University of Gävle, Gävle SE-80176, Sweden, the Department of Fundamental Electricity and Instrumentation (ELEC), Vrije Universiteit Brussel, Brussels B-1050, Belgium, and also with the ACCESS Linnaeus Centre, Signal Processing Laboratory, KTH Royal Institute of Technology, Stockholm SE-10044, Sweden (e-mail: [email protected]). W. Van Moer is with the Department of Fundamental Electricity and Instrumentation (ELEC), Vrije Universiteit Brussel, Brussels B-1050, Belgium. M. Isaksson is with the Department of Electronics, Mathematics and Natural Sciences, University of Gävle, Gävle SE-80176, Sweden. P. Händel is with the ACCESS Linnaeus Centre, Signal Processing Laboratory, KTH Royal Institute of Technology, Stockholm SE-10044, Sweden. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2213830

The first effect is commonly quantified through the adjacent channel leakage power ratio (ACLR), whereas the second effect is commonly quantified as error vector magnitude (EVM). For telecommunication and broadcasting systems, there are regulatory limits on the amount of distortions. If any of these limits are exceeded, the transmitter cannot be used. Several methods for correcting these distortions have been proposed. The simplest is backing off the input power to a lower level. Unfortunately, this results in reduced power efficiency. Feedback linearization has been proposed and used, but it suffers from limited bandwidth [2], although recent studies claim to have overcome this limitation [3]. Feedforward linearization [2] has also been used, but it suffers from low power efficiency due to the linear cancellation amplifier. Another method that is widely used is the baseband digital predistortion (DPD) [4]. This can be implemented using lookup tables (LUTs), as in [5] and [6] or using behavioral models [4], [7]. DPD has become relatively popular, partly due to its relatively good performance and low complexity. Finding this inverse operation of the PA can be done in a large number of ways: direct training of a LUT over the PA operation [5], model-based predistortion where the model is trained using an iterative method, such as recursive least squares (RLS), least mean square or similar methods [7], finding a direct model of the PA behavior and training the predistorter using this model [8], or using the indirect learning architecture (ILA) in [7]. However, for a successful DPD, it is also necessary to update the parameters in the case of a model [7], or the LUT entries in case of a LUT-based approach [5], [6]. While the PA is operating in back-off, this is relatively easy using the ILA suggested in [7]. When the PA operates in compression, the linearization is achieved by expanding the input signal in a nonlinear fashion. This is the opposite of the compressive PA operation and leads to problems with the very high signal peaks in the input signal to the PA. For estimating the parameters of the predistorters in this paper, we focus on the ILA in [7] because it is a simple and straightforward method. The ILA method has been shown to work well to linearize RF PAs [7], [9]–[15]. However, when the PA operates in deep compression, the ILA DPD tends to give predistortion signals that have unreasonable peak-to-average power ratio (PAPR) [14], [15]. There are a number of problems related to these very high signal peaks. The dynamic range of the digital-to-analog converters (DACs) used in the signal generation is not sufficient to cover the full amplitude span with enough amplitude resolution. The driver amplifiers and/or the PA can break due to the high voltages.

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This problem has a simple explanation, namely, that the PA is compressing the signal. The DPD is the inverse of this behavior, i.e., an expansion. In [14] and [15], it was observed that the multistep indirect learning architecture (MS-ILA) results in increased PAPR values after each step. In [7], it was observed that the signal peaks tend to grow when using the ILA, but the subject was not further pursued. To the knowledge of the authors, the issue of strongly increasing peak powers in the predistortion signal has not been further discussed, other than a general note that DPD alone does not give much improvement in output power for semilinear PAs like class-AB [14], [15]. This paper proposes a method that limits the peaks of a predistortion signal to be below a specified value, i.e., input voltage to the PA. This is achieved by simultaneously using the ILA algorithm and putting constraints on the input signal amplitude. In the field of control theory, the problem of saturating actuators has been studied in some detail (see [16] and [17]). This is a problem that is similar to the problem of saturation in the PA and the driver amplifiers. Both are limited in amplitude, but can be made to behave linearly up to a given power level. The authors in [16] roughly classify the approaches of solving problems with saturating actuators as being either “ ad hoc antiwindup schemes ” or using a systematic method. The method proposed in the current paper is more of an ad hoc method in the sense that it takes the existing method of ILA and introduces an extra step to control the saturation. We show that the proposed approach of peak controlled DPD provides an improvement over published state-of-the-art methods. By limiting the predistorter output, the blow-up problem is avoided. Additionally, advantages such as increased output power, lower input and output peak power levels, reduced requirements on the signal generation, and signal processing parts of the whole transmitter system also follows. In the first part of Section II, linearization and ILA are reviewed. The peak controlled ILA is then introduced and the resulting problem is shown to belong to the class of convex optimization problems [18] in the second part of Section II. The measurement prerequisites are given in Section III. Results measured on a class-AB PA are presented and discussed in Section IV. Conclusion are then given in Section V. Details for the numerical method are given in the Appendix. II. THEORY This section first introduces the concept of the ILA originally proposed in [7] for PA linearization, then presents the proposed methods for peak limiting and finally shows the implementation using a primal-dual method. A. ILA 1) Single-Step ILA: The goal of DPD when applied to an RF PA is to introduce a pre-inverse block , which linearizes the nonlinear system (the PA), as in Fig. 1(a). Another similar situation is when one wishes to have a post-inverse of a nonlinear system, i.e., the correcting function should be located after the nonlinear system, as in Fig. 1(b). A typical application

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Fig. 1. Operating principles of predistorter and postdistorter. In both cases, is the input signal and is the nonlinear system to be linearized by eior the post-inverse . For the predistorter ther the pre-inverse is the predistortion signal, is the output signal when a case, is the output signal predistortion signal is used. For the postdistorter case, is the postdistorted (linearized) output of the nonlinear system and signal.

of such post-inverses is the correction of analog-to-digital converters (ADCs) [19]. For nonlinear systems of Volterra type, Schetzen derived the th order inverse [20] of a nonlinear system. This inverse is simultaneously both the pre-inverse and the post-inverse of a Volterra system, up to the given nonlinear order [20]. However, in [7], it was noted that the th-order inverse suffers from the drawback of having higher nonlinear orders that are not compensated. The higher order nonlinear terms created by the interconnection of the nonlinear system and the pre- or post-inverse are not compensated. This is in the nature of the th-order inverse. Furthermore, the th-order inverse requires access to the direct model of the system in order to perform the inversion. This means that an additional model must be implemented and stored in the data processing part of the system. Another approach to find a pre-inverse is to directly identify a pre-inverse. This can be done either by a nonlinear search directly over the system or by using a model of the direct system, as in [8]. However, this requires the analytical or numerical inversion of a nonlinear system, which can be a computationally demanding task. To solve the above-stated problems, [7] introduced the ILA. The ILA is based on indirectly training a postdistorter and then putting that postdistorter in front of the nonlinear system to act as a predistorter. The idea is based on noting that if the input signal is equal to the output signal (after scaling and synchronization), then the output of the pre-inverse and the output of the post-inverse are equal [7]. This observation is what allows us to use the postdistorter as a predistorter. If the model structure for the predistorter and postdistorter is chosen to be linear in the parameters, then the parameter estimation can be carried out by standard linear least squares methods. This becomes (1) denotes the standard Euclidean norm, is the rewhere gression matrix, is a vector of input signal samples, and is a vector of output signal samples. The predistortion input signal to the PA is then given by (2)

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Fig. 2. Algorithm describing the MS-ILA.

with and given as in (1). This method of linearization has been shown to work well in a number of publications [7], [9]–[15]. 2) Multistep ILA: Unfortunately, due to the changes in the PA, it is not sufficient to identify the predistorter once, but updates of the predistorter parameters are necessary with changes in operating power, temperature, aging, signal characteristics, etc. To solve this efficiently, [7] derived a modified recursive least squares (mRLS) version of the ILA, henceforth called the mRLS-ILA. An alternative to using the mRLS-ILA for parameter updates is to use the MS-ILA. This is a repeated single-step ILA, henceforth denoted the MS-ILA, which operates according to the algorithm in Fig. 2. Note that the input signal does not need to be the same signal for all , but can be allowed to change. The number of samples used to estimate the signal can also vary if desired, but it must contain enough information about the amplitude and frequency range that the PA currently is operating in. Strictly formulated, it should contain enough information on the higher order spectra, as shown for direct modeling in [21]. This makes it possible to adapt to changes in the system, but also to account for the extrapolation caused by the expansion operation of the DPD. The expansion is treated in detail in the following. B. Expansion Operation of DPD In [7], it was observed that the peaks of the predistortion signal tended to increase, but the observation was not further investigated in that publication. Instead, in [22], some aspects of changes in signal characteristics were discussed and observed for the th-order inverses. In [14] and [15], it was observed that the PAPR of the predistortion signals increased after each step of the MS-ILA. For a robust operation, this is not a desirable situation because it could potentially lead to a situation where the expansion increases after each parameter update. In the first step of the MS-ILA, the signal is slightly compressed upon which the predistorter expands it, thus creating an extrapolation. The signal is then transmitted, and the peaks, which now have higher amplitude, are more compressed. To compensate this compression, the next step of the predistorter update expands these peaks even more. It continues in this way until the predistortion signal literally “explodes.” This expansion happens very quickly; after the first step, the PAPR is expanded by at least 6 dB at moderate power levels. In

Fig. 3. AM/AM and AM/PM curves of the class-AB PA used in the tests.

the second step, the PAPR can increase by another 6–10 dB. Continuing in this way can result in signals with PAPR of more than 25 dB [15]. In this paper, it is experimentally illustrated for a 60-W class-AB PA that the peak power of the predistortion input signal increases by more than 25 dB due to the attempt at compensating the compression. However, the expansion is stopped at 10 dB in order to avoid damaging the tested amplifier. To illustrate the compression distortion of a PA, the amplitude/amplitude (AM/AM) and amplitude-phase (AM/PM) distortions of the tested PA are shown in Fig. 3 estimated using a 20-MHz-wide orthogonal frequency-division multiplex (OFDM) signal centered at 2.15 GHz. More details on the PA are given in Section III. When the amplitude of the input signal is increased, which occurs due to the DPD, the PA is further compressed. This, in turn, means that the DPD is updated to further increase the input signal amplitude, unless this amplitude is controlled. The expansion is characteristic for all DPD algorithms due to the compensation of the gain compression. For a DPD with sufficient freedom to expand the signal, such as a high-order polynomial or a directly trained LUT, the predistortion signal peak can grow to very large amplitudes if the PA is operated in deep compression without amplitude control. C. Amplitude Controlled Predistortion Ideally, the predistorter should turn the combined system of the DPD and PA into a system that is linear at all power levels until compression has been reached, and then perform hard clipping. Using the standard ILA method, there is nothing that prevents an uncontrolled expansion of the input signal. One way of preventing this from happening is to include an explicit limit of the predistortion signal amplitude when identifying the parameters of the predistorter. In order not to loose the proven advantages of the linear least squares estimator, we would like to continue using the parameter-linear ILA principle, but include the amplitude limitation. This restricts us to predistorter structures that are linear in the parameters, such as Volterra systems, and reductions thereof. The problem that needs to be solved can then be expressed as (3a)

LANDIN et al.: PEAK-POWER CONTROLLED DIGITAL PREDISTORTERS FOR RF PAs

(3b) (3c) where denotes the infinity norm (largest absolute value in the vector) and is the upper limit amplitude of the predistortion signal, i.e., how many volts of input amplitude the PA can withstand, or the driver stages can deliver. and are as in (1) and (2). When the first step of the ILA is computed, it gives a large expansion of the signal. This expansion results in an extrapolation, i.e., the input signal to the PA is in a higher power region than the signal used to find the predistorter parameters. To limit this extrapolation, a few different strategies can be chosen when it comes to determining . The predistortion signal peak can be limited by the maximum signal amplitude that the driver and/or PA can withstand, a relative expansion based on the previous signal, or a relative expansion based on the original signal peak. For this paper, the minimum of a predetermined maximum input power to the PA and a relative expansion in relation to the original signal has been used. This means that the limit in (3c) is chosen as peak power, relative expansion in each step of the MS-ILA. Essentially, (3a) is the same minimization problem as (1). The predistortion signal is computed as usual in (3b). The amplitude constraint is then stated in (3c). The validity of the proposed approach is motivated by considering that (ideally) the samples below the specified amplitude limit should remain unaffected by the constraint, whereas the samples above this limit should be controlled in amplitude. However, both of these requirements cannot be achieved with the same model structure as was originally used. At least a higher nonlinear order is required. The exact effects need further investigation. For implementation, it is suitable to rewrite (3a)–(3c) as

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. Thus, the th constraint is convex. A theorem states that the intersection of two convex sets is also a convex set [18]. Hence, the problem in (4a) and (4b) is convex. To solve the convex problem in (4a) and (4b), either a general-purpose convex optimization software such as CVX [23] can be used or a tailor-made method is used. Due to the larger flexibility, the second option is chosen in this paper. The chosen method is a primal-dual interior point method. The search direction is determined by applying Newton’s method to the Karush–Kuhn–Tucker (KKT) conditions [18]. The step length is obtained from backtracking line search [18]. For the Newton search, the gradients and the Hessian matrices of the objective function and the constraint functions are necessary. These are given in the Appendix. However, it is easier to do the required mathematics if the complex-valued signals are transformed to their real-valued counterparts. This means that the objective function (4a) is written as

(5) being the real part of the quantity within the brackets with and being the imaginary part. Using a complex-to-real transform, (5) can be rewritten as (6) with

(4a) (4b) where the absolute value is taken over each element and is a vector of appropriate size filled with ones. The inequality operates as an element-wise inequality, i.e., every entry in the column vector is less than the corresponding row in . Problems that can be solved by linear least squares are, in general, desirable because they have a global optima that is easily obtained. This is clearly not possible with the problem in (4a) and (4b). However, if the problem can be shown to be convex, it is known that there is a global optima that can (easily) be found [18]. Start by observing that the optimization goal is a convex function of —it is a standard linear least squares problem. The constraints in (4b) should now be shown to form a convex set. Consider the th inequality which is formed by multiplying , being the th row of , by . Now, let where is the set of all that fulfills . To show convexity of the th constraint, all combinations of and must be in . Consider with

The constraints (4b) are likewise changed into their real-valued counterparts by letting denote the real-valued part of row in the matrix , and denote the imaginary part of row . The constraints (4b) can then be rewritten as (7) samples used for It is not necessary to consider all the finding the minimum of the objective function when computing the constraints. Each sample corresponds to one constraint, meaning that the number of constraints can become large if a large is used. Observing that the only samples that will become large after the DPD is applied are the input samples that have large amplitude, let these samples belong to a set , and let the set have samples, with . It is enough to let these samples form the constraints , preferably such that . Since an iterative method (the Newton method) is used to solve the system of equations in (8), it is possible to update the samples in the set after each iteration. This can further

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Fig. 4. Measurement setup consisting of vector signal generator (VSG), driver amplifier (DA), directional coupler, downconverter (DCNV), local oscillator (LO) for the downconverter, ADC, and the DUT. All instruments are controlled from a PC running MATLAB.

reduce the number of required constraints, thus easing the computational burden. The problem of predistorter blow-up has been identified. A method based on extending the MS-ILA with a peak control was introduced and the resulting problem has been shown to belong to the class of convex optimization problems. An interior point method was proposed to solve this optimization problem. III. MEASUREMENT PREREQUISITES For the performance evaluation, a 20-MHz-wide OFDM signal is used. It is filled with random 64 quadrature amplitude modulation (64-QAM) modulated data on 1200 of the 2048 carriers and uses a cyclic prefix length of 1/4. The sampling rate is 30.72 MHz and the signal is centered at 2.15 GHz. Two sets of signals are used, one for identification and one for validation, each consisting of 46 000 samples. The identification signal is always used for updating the parameters of the MS-ILA predistorter. The presented results are the results from the validation data set. Both signal sets have PAPR of approximately 11.5 dB. Any signal type could have been used, but due to the recent interest in OFDM and the high PAPR associated with these signals, it is a suitable type of signal to demonstrate the effects of the peak controller with. The measurement setup consists of a vector signal generator, combination of a R&S SMU200A and a R&S AFQ100A baseband source, an Anritsu wideband power meter, a wideband downconverter [24] and a 400-MS/s ADC. All instruments are controlled from a PC running MATLAB. A high-power driver amplifier is also included in the setup to provide the necessary input signal power. The setup is shown in Fig. 4. The device-under-test (DUT) is a single-stage class-AB Infineon 60-W RF LDMOS power transistor mounted in the manufacturer’s test fixture [25]. The transistor is intended for multicarrier wideband code division multiple access (WCDMA) signals in the 2110–2170-MHz frequency range. Rated continuous-wave 1-dB compression point is 68-W output power. The AM/AM and AM/PM curves are shown in Fig. 3. The spreading indicates that a certain amount of memory is present in the PA. The model used for predistortion is the parallel Hammerstein model [4], [26] with a nonlinear order 11 and memory depth 2. The parallel Hammerstein model has, in a number of publications, been shown to have low model error for a large number of PAs [27], [28]. It is also known that the inverse of such a nonlinear model is well described by a similar model structure if the linear memory effects are negligible [29], [30]. Performance is evaluated by considering the PAPR, the peak input power, the EVM, and the ACLR. The ACLR is defined as the maximum of the power in either of the two adjacent

Fig. 5. Example of DPD signal , original OFDM signal

, peak controlled DPD signal and limit amplitude .

20-MHz-wide channels. The original signal has an ACLR of 52.5 dB. Lower ACLR can thus not be obtained with this particular signal. The EVM is defined as the sum square error between the input signal to the DPD (if present) and the output signal from the PA. IV. RESULTS The notation used in the graphs are as follows. DPD1, DPD2, and DPD5 denote the results from the MS-ILA algorithm with the number being the step number, i.e., DPD2 denotes the second step in the MS-ILA. In a similar way, DPD1 ctrl. denotes the step number of the peak controlled MS-ILA proposed in this paper. Orig. are the results obtained using the original signal without DPD. All results presented in the following are measured on the 60-W PA introduced in Section III. The results are for the validation data set not used to extract the predistorter parameters. An example of the peak controlled and the standard MS-ILA signals after one step is shown in Fig. 5. There it is seen that the peak limiting keeps the peaks below the required limit, whereas the standard DPD expands the peaks to large values. In Fig. 6, the ACLR of the 20-MHz OFDM signal is shown as a function of the output root-mean-square (rms) power. Fig. 7 shows the EVM of the signals. In Fig. 8, the PAPR of the predistortion signals extracted at different power levels are shown. Similarly, Fig. 9 shows the peak input power as function of rms output power. ACLR is the main performance measure for the linearity of the PA. At power levels below 36.5 dBm, there is no ACLR performance difference between the standard MS-ILA and the controlled MS-ILA. This is expected because the expansion of the peaks is very limited, as seen in Figs. 8 and 9. Hence, the peak control is not active, i.e., the constraints in (3c) are not affecting the solution to the ILA problem in (3a). This is the reason why the performance is the same. For EVM, the performance is similar at these lower power levels. At medium power, 36.5–38 dBm, the proposed peak control method shows slightly inferior performance compared to the standard MS-ILA. This is explained by the fact that the controlled MS-ILA should give somewhat worse results for the same model structure due to the peak limiting—the optimal

LANDIN et al.: PEAK-POWER CONTROLLED DIGITAL PREDISTORTERS FOR RF PAs

Fig. 6. ACLR of the signal when passing through the class-AB PA for steps 1, 2, and 5 of the original MS-ILA (DPD1, DPD2, and DPD5) and the corresponding steps of the peak controlled MS-ILA (DPD1 ctrl., DPD2 ctrl., and DPD5 ctrl.). The performance when using the original signal is shown for reference. At higher power levels, no results are presented for the standard MS-ILA because the large peak powers make measurements impossible. However, the controlled MS-ILA produces results that appear to converge.

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Fig. 9. Peak powers of the predistortion signals i.e., PA input signals, for the same steps as those used in Fig. 6. The original signal peak power is shown for reference.

Fig. 10. Peak powers as in Fig. 9, but as function of the input rms power. The peak power of the first step of the MS-ILA is shown to illustrate the problem of peak (and rms) power expansion in standard DPD methods. Fig. 7. EVM is shown in the same way as the ACLR in Fig. 6.

Fig. 8. PAPR of the input signals for the MS-ILA, the peak controlled MS-ILA, and the original signal. For the original MS-ILA, the PAPR increases with power and with the iteration number. The controlled MS-ILA limits the PAPR to the minimum of 3-dB expansion relative to the previous peak power, and 42.5 dBm.

unconstrained solution can choose any parameter combination compared to the constrained solution where the parameters must result in a solution where the amplitude of the predistortion signal is reduced. The EVM is slightly worse when using the

peak controller, but the degradation is still acceptable for most wireless standards. In order to protect the PA from being destroyed due to high signal peaks, the input peak power was limited to 42.5 dBm. This peak power level roughly corresponds to a gain compression of 10 dB, i.e., 5.7-dB gain compared to the small-signal gain of 15.7 dB. The first step of the standard MS-ILA is operable up to 37.8-dBm output power, the second step to 37.5 dBm, third step to 37.1 dBm, and fourth and fifth steps to 37 dBm. Beyond the stated power levels, the input peak powers increase in such a way that the signal cannot be transmitted without damaging the PA. This is not shown in Figs. 6–10. This occurs because the DPD attempts to compensate the compression by increasing expansion. However, the controlled MS-ILA can still be used at these higher power levels. In terms of ACLR, EVM, PAPR, and peak input power, the controlled MS-ILA appears to converge. The first step shows large variations in performance, but this is expected due to the extrapolation associated with the predistortion. The second step improves both ACLR and EVM, indicating that the changes in signal characteristics are properly handled. The third and fourth steps do not improve the performance significantly, and we only show the fifth step when the DPD has settled to its final value. Note that, at the higher power levels, close to 39

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dBm, the second step of the controlled MS-ILA significantly improves both ACLR and EVM. Nevertheless, the ACLR is above the limit of 40 dB when this output power is used. The peak input power after one step of the uncontrolled MS-ILA is shown in Fig. 10 as function of input rms power to the PA. Note that the rms input power is considerably increased due to the predistorter expansion. A second step of the MS-ILA is not possible with such peak power levels for this device. We see from Figs. 8 and 9 that the PAPR and the peak input power are kept much lower using the controlled MS-ILA method. This is of benefit for the whole transmitter chain including baseband signal processing and DACs because the necessary resolution in the signal generation can be achieved using fewer bits. The reduced input peak powers also eases the requirements on the driver stages and stresses the power transistors less and should reduce the risk of early transistor failure. However, the main advantage is that the peak control stabilizes the predistorter at higher power levels. In other words, the peak control prevents the “blow-up” normally associated with predistortion of compressive PAs. Parallel Hammerstein models with other nonlinear orders and memory depths have also been tested, but these results are not presented here. They all showed the same general behavior both with the standard MS-ILA and the controlled MS-ILA. V. CONCLUSION Uncontrolled expansion of the input signal to an RF PA generated by using a predistorter is found to be a problem. Typical increase in PAPR for a class-AB PA, using a single step of the ILA predistorter with a parallel Hammerstein model, results in uncontrolled increases of the signal PAPR if the signal peaks are in the compression region. Using further steps of the MS-ILA further increases the PAPR in each step. A method that allows the user to control the peak output power of the predistortion signal while benefiting from the MS-ILA is proposed. It is illustrated how the proposed solution can be used with the MS-ILA to update the predistorter parameters to account for changing conditions while reducing the problems of “predistorter blow-up,” i.e., uncontrolled peak power increase. The formulated optimization problem is shown to be convex and a primal-dual interior point method is suggested to solve it. Measurements with OFDM signals on a class-AB PA show that the linearization performance is significantly improved in the compression region using the proposed scheme. The output power could be increased by approximately 1 dB while fulfilling the linearity requirements of less than 40-dB ACLR. At the same time, the PAPR and the peak input power of the predistortion signal is kept considerably lower, resulting in reduced requirements on signal generation (DAC resolution, mixer, and driver amplifier distortions) and the number of bits in the baseband signal processing, in addition to reduced peak power requirements in the driver and PA stages. The largest advantage is that of being able to explicitly control the peaks of the predistortion signal. This reduces the problem of the “predistorter blow-up” encountered when operating the PA in compression.

APPENDIX GRADIENTS AND HESSIAN MATRICES THE PRIMAL-DUAL ALGORITHM

FOR

A solution to the convex optimization problem is obtained when the KKT conditions are fulfilled. By solving for the modified KKT conditions in [18], the primal-dual interior point method is obtained. The modified KKT system of equations to be solved for the Newton step direction is shown in (8) as follows: (8) with

(9a) (9b) and (9c) In (8),

and is a parameter, see [18]

.

for details. In (8), are the Lagrange multipliers for the constraints, is the primal-dual search direction, is the dual residual, is the centrality residual [18], and is the number of constraints. is given by

.. .

.. .

(10)

(11)

and is a diagonal matrix with the elements of on the diagonal. In (12a) and (12b), the expression for the gradient, respectively, the Hessian, of the objective function, are given. Correspondingly, (13a) and (13b) gives the gradients and the Hessians of the constraint functions (12a) (12b)

(13a)

(13b)

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REFERENCES [1] S. Cripps, Advanced Techniques in RF Power Amplifier Design. Norwood, MA: Artech House, 2002. [2] J. Vuolevi and T. Rahkonen, Distortion in RF Power Amplifiers. Norwood, MA: Artech House, 2003. [3] Y. Y. Woo, J. Kim, J. Yi, S. Hong, I. Kim, J. Moon, and B. Kim, “Adaptive digital feedback predistortion technique for linearizing power amplifiers,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 5, pp. 932–940, May 2007. [4] J. Kim and K. Konstantinou, “Digital predistortion of wideband signals based on power amplifier model with memory,” Electron. Lett., vol. 37, no. 23, pp. 1417–1418, Nov. 2001. [5] O. Hammi, F. Ghannouchi, S. Boumaiza, and B. Vassilakis, “A databased nested LUT model for RF power amplifiers exhibiting memory effects,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 10, pp. 712–714, Oct. 2007. [6] S. Boumaiza, J. Li, and F. Ghannouchi, “Implementation of an adaptive digital/RF predistorter using direct LUT synthesis,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2004, vol. 2, pp. 681–684. [7] C. Eun and E. Powers, “A new Volterra predistorter based on the indirect learning architecture,” IEEE Trans. Signal Process., vol. 45, no. 1, pp. 223–227, Jan. 1997. [8] J. Fritzin, Y. Jung, P. N. Landin, P. Händel, M. Enqvist, and A. Alvandpour, “Phase predistortion of a class-D outphasing RF amplifier in 90 nm CMOS,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 58, no. 10, pp. 642–646, Oct. 2011. [9] L. Ding, G. Zhou, D. Morgan, Z. Ma, J. Kenney, J. Kim, and C. Giardina, “A robust digital baseband predistorter constructed using memory polynomials,” IEEE Trans. Commun., vol. 52, no. 1, pp. 159–165, Jan. 2004. [10] D. Morgan, Z. Ma, J. Kim, M. Zierdt, and J. Pastalan, “A generalized memory polynomial model for digital predistortion of RF power amplifiers,” IEEE Trans. Signal Process., vol. 54, no. 10, pp. 3852–3860, Oct. 2006. [11] L. Anttila, P. Händel, and M. Valkama, “Joint mitigation of power amplifier and I/Q modulator impairments in broadband direct-conversion transmitters,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 4, pp. 730–739, Apr. 2010. [12] D. Schreurs, M. O’Droma, A. Goacher, and M. Gadringer, RF Power Amplifier Behavioral Modeling. Cambridge, U.K.: Cambridge Univ. Press, 2008. [13] D. Wisell, M. Isaksson, N. Keskitalo, and D. Rönnow, “Wideband characterization of a Doherty amplifier using behavioral modeling,” in Proc. ARFTG Conf., Jun. 2006, pp. 190–199. [14] C. Nader, P. N. Landin, W. Van Moer, N. Björsell, P. Händel, and M. Isaksson, “Peak-to-average power ratio reduction versus digital pre-distortion in OFDM based systems,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2011, pp. 1–4. [15] C. Nader, P. N. Landin, W. Van Moer, N. Björsell, and P. Händel, “Performance evaluation of peak-to-average power ratio reduction and digital pre-distortion for OFDM based systems,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 12, pp. 3504–3511, Dec. 2011. [16] H. Tingshu and L. Zongli, Control Systems With Actuator Saturation: Analysis and Design. Berlin, Germany: Springer, 2001. [17] V. Kapila and K. Grigoriadis, Actuator Saturation Control. New York: Marcel Dekker, 2002. [18] S. Boyd and L. Vandenberghe, Convex Optimization. Cambridge, U.K.: Cambridge Univ. Press, 2004. [19] H. Lundin, M. Skoglund, and P. Händel, “Optimal index-bit allocation for dynamic post-correction of analog-to-digital converters,” IEEE Trans. Signal Process., vol. 53, no. 2, pp. 660–671, Feb. 2005. [20] M. Schetzen, The Volterra and Wiener Theories of Nonlinear Systems. Melbourne, FL: Krieger, 2006. [21] J. Pedro and N. Carvalho, “Designing multisine excitations for nonlinear model testing,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 1, pp. 45–54, Jan. 2005. [22] C.-H. Cheng and E. Powers, “A reconsideration of the th-order inverse predistorter,” in Proc. IEEE Veh. Technol. Conf., Jul. 1999, vol. 2, pp. 1501–1504. [23] M. Grant and S. Boyd, CVX: Matlab Software for Disciplined Convex Programming. ver. 1.21, CVX Res. Inc., Austin, TX, Apr. 2011. [Online]. Available: http://cvxr.com/cvx [24] O. Andersen, N. Björsell, and N. Keskitalo, “A test-bed designed to utilize Zhu’s general sampling theorem to characterize power amplifiers,” in Proc. IEEE Instrum. Meas. Technol. Conf., May 2009, pp. 201–204.

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[25] “PTFA210601E thermally enhanced high power RF LDMOS power FET 60 W, 2110–2170 MHz,” Infineon Technol., Lebanon, NJ, 2007, 3rd ed. [26] M. S. Heutmaker, E. Wu, and J. R. Welch, “Envelope distortion models with memory improve the prediction of spectral regrowth for some RF amplifiers,” in 48th ARFTG Conf. Dig., Dec. 1996, vol. 30, pp. 10–15. [27] J. Pedro and S. Maas, “A comparative overview of microwave and wireless power-amplifier behavioral modeling approaches,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 4, pp. 1150–1163, Apr. 2005. [28] M. Isaksson, D. Wisell, and D. Rännow, “A comparative analysis of behavioral models for RF power amplifiers,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 1, pp. 348–359, Jan. 2006. [29] D. Rönnow and M. Isaksson, “Digital predistortion of radio frequency power amplifiers using Kautz–Volterra model,” Electron. Lett., vol. 42, no. 13, pp. 780–782, Jun. 2006. [30] M. Isaksson and D. Rönnow, “A Kautz–Volterra behavioral model for RF power amplifiers,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2006, pp. 485–488.

Per N. Landin (S’07) received the M.Sc. degree in engineering physics from Uppsala University, Uppsala, Sweden, in 2007, and the Ph.D. degree from the KTH Royal Institute of Technology, Stockholm, Sweden, and Vrije Universiteit Brussel, Brussels, Belgium, in 2012. He is currently with the University of Gävle, Gävle, Sweden. His main research interests are in nonlinear system modeling and signal processing for instrumentation with focus on linearization techniques for nonlinear high-frequency systems, in particular PAs.

Wendy Van Moer (S’97–M’01–SM’07) received the Engineer and Ph.D. degrees in applied sciences from Vrije Universiteit Brussel (VUB), Brussels, Belgium, in 1997 and 2001, respectively. She is currently an Associate Professor with the Electrical Measurement Department (ELEC), VUB, and a Visiting Professor with the Department of Electronics, Mathematics and Natural Sciences, University of Gävle, Gävle, Sweden. Her main research interests are nonlinear measurement and modeling techniques for medical and high-frequency applications. Dr. Van Moer has been an associate editor for the IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT since 2007, and in 2010, she became an associate editor for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES. She was the recipient of the 2006 Outstanding Young Engineer Award of the IEEE Instrumentation and Measurement Society.

Magnus Isaksson (S’98–M’07–SM’12) received the M.Sc. degree in microwave engineering from the University of Gävle, Gävle, Sweden, in 2000, the Licentiate degree from Uppsala University, Uppsala, Sweden, in 2006, and the Ph.D. degree from the Royal Institute of Technology, Stockholm, Sweden, in 2007. From 1989 to 1999, he was involved with communication products with Televerket, Gävle, Sweden. He is a Teacher of signal processing for telecommunications and is currently the Head of the Department of Electronics, Mathematics, and Natural Sciences, University of Gävle. In 2012, he was appointed Docent in Telecommunications of the Royal Institute of Technology. He is currently Head of research within the fields of mathematics and natural sciences with the University of Gävle. He has authored or coauthored numerous peer-review journal papers, books, and conference proceedings. His main interests are in signal-processing algorithms for RF measurements and modeling of nonlinear microwave systems.

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Peter Händel (S’88–M’94–SM’98) received the Ph.D. degree from Uppsala University, Uppsala, Sweden, in 1993. From 1987 to 1993, he was with Uppsala University. From 1993 to 1997, he was with Ericsson AB, Kista, Sweden. From 1996 to 1997, he was also with the Tampere University of Technology, Tampere, Finland. Since 1997, he has been with the Royal Institute of Technology, Stockholm, Sweden, where he is currently a Professor of signal processing. From 2000 to 2006, he held a part-time position with the Swedish Defense Research Agency. From 2007 to 2010, he was a Guest

Professor with the University of Gävle, Gävle, Sweden. In 2010, he was a Visiting Professor with the Indian Institute of Science, Bangalore, India. He has served on the Editorial Board of several journals in signal processing, including the EURASIP Journal of Advances in Signal Processing, Recent Patents on Electrical Engineering, Hindawi’s Research Letters in Signal Processing, and the Journal of Electrical and Computer Engineering. His current research interests include RF measurement technology, ultra-wideband (UWB) systems, and inertial navigation for indoor applications. Dr. Händel has been an associate editor of the IEEE TRANSACTIONS ON SIGNAL PROCESSING.

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 11, NOVEMBER 2012

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Multi-Gb/s Analog Synchronous QPSK Demodulator With Phase-Noise Suppression Ahmet Çağrı Ulusoy, Member, IEEE, and Hermann Schumacher, Member, IEEE

Abstract—In this paper, an IF quadrature phase-shift keying demodulator is presented, which performs phase and frequency synchronization in the analog domain. The presented demodulator can be utilized for short-range ultra-wideband wireless communication scenarios, and can greatly simplify the wireless system by relaxing the demands on digital signal processors. The demodulator is implemented as a low-cost system-in-package RF module, including a very narrow bandwidth microstrip bandpass filter on a Teflon substrate. The analog carrier recovery and synchronization is experimentally characterized using custom designed modules for multi-Gb/s test signal generation. Furthermore, it is shown that the presented carrier recovery concept exhibits very efficient phase-noise suppression. The results demonstrate successful coherent demodulation up to a data rate of 6.2 Gb/s, a very high dynamic range, and robustness against undesired phase and frequency fluctuations. Index Terms—Analog signal processing, integrated circuit (IC) packaging, monolithic microwave integrated circuits (MMICs), phase noise, ultra-wideband (UWB) communication, wireless communication.

I. INTRODUCTION

T

HE NEED for higher speed data transfer has been continuously driven by Moore’s law in the last decades. As the data storage capabilities of user-end devices improved, it became necessary to transfer the large amount of stored data from one device to another with minimum delay, necessitating very high communication speeds [1]. Until today, such highspeed data communication is still based on wired connections, while the available communication speed of wireless systems has lagged far behind. This problem may be circumvented by utilizing millimeter-wave frequency bands that would allow wireless communication speeds to be competitive with wired ones. However, the cost of such systems limits widespread applications. Although the better availability of silicon-based technologies at high frequencies represents a great potential for cost reduction of such systems, as the transmission speed goes on increasing, the main challenge lies in the processing of the high-speed data, rather than realizing an analog frontend with sufficient performance. For instance, the implementation of analog-to-digital

Manuscript received June 12, 2012; revised August 06, 2012; accepted August 22, 2012. Date of publication September 28, 2012; date of current version October 29, 2012. This work was supported by the German Federal Ministry of Education and Research (BMBF) under Contract 01BU0815 (EASY-A). The authors are with the Institute of Electron Devices and Circuits, Ulm University, 89081 Ulm, Germany (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2216894

converters (ADCs) with continuously increasing speed while keeping a high resolution is considered to be a serious design challenge. In some sources [2], this is even considered a system bottleneck in terms of cost and power consumption. While recent developments have shown that very high-speed ADCs can be implemented with moderate resolution 5 bit and reasonably low power consumption 100 mW [3], [4], digital signal processors (DSPs) at multi-Gb/s data rates are still considered a major limitation, preventing the implementation of such high-speed communication systems for mobile devices [5]. Therefore, there is a necessity to investigate new techniques, making wireless communication systems operating at very high data rates a commodity. In this study, an analog demodulator is proposed that performs coherent demodulation of quadrature phase-shift keying (QPSK) signals. For synchronization, a simple and potentially very low-cost method is employed with a feed-forward carrier recovery technique. The proposed carrier recovery and the synchronous demodulation is characterized at an IF. Furthermore, it is experimentally verified that due to its feed-forward nature, the presented carrier recovery technique exhibits the highly desirable feature of phase-noise suppression. This feature is in itself a very strong advantage in comparison to other examples in the literature. II. PROPOSED ANALOG SYNCHRONOUS RECEIVER ARCHITECTURE The schematic of a generic receiver structure, which utilizes the proposed analog demodulator, is shown in Fig. 1. An RF frontend downconverts the signal to an IF of around 5 GHz, where the analog signal processing takes place. At the IF, the signal is divided into two branches: one branch is used for carrier recovery, while the other branch is directly fed to the demodulators. The modulation type is assumed to be QPSK, but the receiver can also demodulate binary phase-shift keying (BPSK) signals. The carrier recovery method is based on frequency multiplication, which generates a modulation free harmonic of the desired carrier signal. Also known as the “times- ” carrier recovery, representing the PSK modulation order, this method was classically used in early low data-rate analog receivers within phase-locked loop (PLL) synchronization circuits [6]. The main difference in the proposed receiver is that the carrier recovery is realized without any feedback, i.e., it is arranged in a feed-forward manner. In the carrier recovery branch, the QPSK signal is quadrupled, which expands the 90 phase transitions into 360 , removing the modulation content and generating the fourth harmonic of the carrier signal. This fourth

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Fig. 2. Simulated phase-noise profile for: (a) swept synthesizer noise density and constant loop bandwidth and (b) swept synthesizer loop bandwidth and constant noise power. (a) Fixed loop bandwidth of 1 MHz. (b) Fixed noise power of 15 dBc. Fig. 1. Schematic of the proposed receiver with analog demodulation.

harmonic signal is subsequently bandpass filtered and divided by 4 back to the IF. For the division, static frequency dividers are utilized, which also generate the carrier signal in quadrature, as required for QPSK demodulation. The quadrature components of the carrier signal go through phase shifters in order to compensate the phase shift introduced by the carrier recovery. Finally, the phase-corrected carrier is fed to the demodulators, generating the synchronously demodulated in-phase (I) and quadrature (Q) data streams at the output. The phase shift to be compensated has a fixed and deterministic value, depending only on the implementation of the carrier recovery components in the receiver, without being affected by the wireless channel or the transmitted signal. This can be seen clearly in Fig. 1. The recovered carrier will contain the arbitrary input phase, , and will only exhibit an undesired phase shift represented by . On the other hand, will have a certain degree of frequency dependence due to the phase response of the carrier recovery components, limiting the maximum frequency offset that the system can tolerate. This limitation will be addressed in more detail in Section III-D.4. In principle, the presented and similar carrier recovery concepts require perfect 90 phase transitions between adjacent symbols to regenerate the carrier signal. Clearly, this will not be the case for a wireless transmission, especially when the signal is band-limited. Such signal nonidealities will lead to an undesired spurious spectrum around the recovered carrier signal after the frequency quadrupling; therefore, bandpass filtering is required as part of the carrier recovery before the frequency division. The choice of the filter bandwidth represents a tradeoff between robust carrier recovery and the challenge to implement narrowband filters. For the proposed demodulator, a bandwidth of 500 MHz is chosen, which is determined as a good tradeoff through system-level simulations [7]. The phase-noise suppression takes place due to the feed-forward nature of the carrier recovery. As the carrier signal is extracted from the modulated signal itself, there is a strong coherence between the instantaneous phases of the recovered carrier and the modulated signal, excluding the modulation content. However, in a realistic case, the recovered carrier not only experiences a phase shift, which can be easily compensated, but

also a certain amount of true time delay. On the one hand, this time delay can still be seen as a phase shift because the recovered carrier is a periodic continuous time signal; on the other hand, a large amount of time delay will lead to a reduced phasenoise coherence between the recovered carrier and the modulated signal. Therefore, for a close to complete phase-noise suppression, this time delay has to be compensated as well. This has been originally suggested for coherent opto-electronic receivers [8], where the broad laser spectrum limits the usage of higher order modulation formats. For a wireless receiver, the situation is somewhat more relaxed, and the true time-delay compensation can be replaced by a phase compensation, as suggested in this study. In order to verify this ansatz, system-level simulations are performed to analyze the phase-noise suppression characteristic against different phase-noise profiles, and different amount of true time-delay error between the recovered carrier and the modulated signal. The simulations are performed in ADS Ptolemy for a duration of 10 symbols with 30 points per symbol. The data rate corresponds to 7 Gb/s (3.5 GS/s QPSK). For the carrier recovery, a bandpass filter with a 3-dB bandwidth of 500 MHz is used. The signal-to-noise ratio (SNR) per bit is fixed at 25 dB. In Fig. 2, the simulated spectra of the noisy carrier signals are displayed. The simulated spectra approximate phase-locked frequency synthesizers with a certain loop bandwidth and noise level. For the spectra in Fig. 2(a), the loop bandwidth is fixed at 1 MHz, and the noise power density relative to the carrier within the loop bandwidth is swept from 70 to 80 dBc/Hz. For the second case displayed in Fig. 2(b), the total noise power within the loop bandwidth is fixed at 15 dBc (single sideband), while the loop bandwidth is swept from 1 to 10 MHz. The phase-noise profile for all cases is adjusted to have a 20-dB/decade drop of the noise power level outside the given loop bandwidth. The resulting BER curves are presented in Fig. 3(a) and (b) for a swept delay error . As seen in the figure, when the delay error is sufficiently small, a strong phase-noise suppression can be achieved leading to a drastic improvement of the BER performance. On the other hand, examining Fig. 3(b), it is seen that the phase-noise suppression characteristic is strongly affected by the loop bandwidth. When the noise power is concentrated around the carrier, meaning that the synthesizer has a small loop

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Fig. 3. Simulated BER for varying true-time delay error for: (a) swept synthesizer noise density and (b) swept synthesizer loop bandwidth. (a) Fixed loop bandwidth of 1 MHz. (b) Fixed noise power of 15 dBc within the loop bandwidth.

bandwidth, a large amount of delay error can be tolerated. On the contrary, if the noise is spread over a large frequency span, a low delay error is required to be able to suppress the noise components spectrally far from the carrier signal. This is in agreement with the qualitative understanding of the phase-noise suppression mechanism, and the bandwidth of the noise that can be suppressed is inversely proportional to the delay error. Based on the group-delay measurements of the BPF and the simulations of the active components, the total true time delay within the carrier recovery is estimated to be less than 2 ns. Taking this into account, it can be stated that the presented simple feed-forward carrier recovery concept can greatly improve the performance of the wireless system by suppressing the accumulated phase noise of the receiver and transmitter frequency synthesizers. It should be noted that such a strong phase-noise cancellation cannot be achieved for feedback-type carrier recovery circuits, such as a Costas loop, as the PLL delay will be typically several orders of magnitude higher than that of the feed-forward topology (cf. [9]). III. EXPERIMENTAL SETUP The presented carrier recovery concept is experimentally verified and characterized at an IF of 5.1 GHz, using custom designed modules for test signal generation and synchronous demodulation. Before going into the results, the modules and the method used for the multi-Gb/s test signal generation will be shortly presented in the following. A. Multi-Gb/s Test Signal Generation The multi-Gb/s QPSK signals are generated using two BPSK modulator modules and a Xilinx ML605 evaluation-kit extended by an FMC XM104 connectivity card, which is able to deliver two independent pseudorandom bit sequences (PRBSs) at a maximum rate of 3.124 Gb/s. The custom designed BPSK modulators exhibit a modulation bandwidth above 10 GHz and a of more than 0 dBm [10]. The block diagram of the QPSK signal generation setup is shown in Fig. 4. The carrier signal is generated in quadrature by using two separate signal generators, which are synchronized with the 10-MHz clock signals. Ultra-wideband (UWB) baluns are used to differentially feed the frequency synchronized carrier signals to the modulators. In one branch, a directional cou-

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Fig. 4. Block diagram of the multi-Gb/s QPSK test signal generation setup.

pler is included to split off a trigger signal for the real-time oscilloscope measurements. The data inputs are supplied by the field-programmable gate-array (FPGA) board, with two independent PRBSs having five different data rates from 781 Mb/s (lowest) to 3.12 4 Gb/s (highest). The output of the two modulators are combined using UWB power combiners. At each module interface, 3-dB attenuators are included to suppress potential standing-wave patterns, which might occur especially at higher frequencies. The phase or amplitude errors due to the imperfections of the cables and the RF modules are not very critical in terms of quadrature performance. The phase and amplitude of the synchronized carrier signals can be tuned from the signal generators in order to achieve a good quadrature performance at the output. Such a case is displayed in Fig. 5(a), showing all four phase states at the output of the QPSK modulator for a 5.1-GHz carrier signal. For the shown states, an amplitude imbalance of 0.3 dB, and a phase imbalance of less than 1 was determined. Fig. 5(a) is acquired with fixed dc voltages at the data inputs of the modulators; the real-time measurement of the modulated signal at a data rate of 1.562 Gb/s can be seen in Fig. 5(b). The noisy background in Fig. 5(b) arises because the data clock is not synchronized to the carrier frequency and the symbol transitions cover the whole time axis. In Fig. 6, the measured spectra of the resulting QPSK signals are displayed for three different data rates. The generated spectrum agrees with the symbol rate, whereas some spurious components are visible, especially at a distance equaling the symbol rate (and its harmonics) to the carrier. B. Synchronous Demodulator Module The synchronous demodulator module is displayed in Fig. 7. It consists of a demodulator and a preamplifier glued on an aluminum carrier, and an off-chip BPF realized on Rogers RT/Duroid 5880 (t:128 m, ) substrate material. The integrated circuits (ICs) are realized in Telefunken Semiconductors SiGe2RF 0.8- m HBT technology GHz . The demodulator IC includes the active blocks required for synchronous demodulation (see Fig. 1). The preamplifier is included to improve the sensitivity of the analog demodulation, and it has a measured gain of around 20 dB [11]. The BPF is a very compact microstrip design with transmission zeros generated by asymmetric tapping of the filter resonators. The filter

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Fig. 7. Photograph of the synchronous demodulator module. Phase shifter: PS, demodulator: Dem., frequency quadrupler: x4, frequency divider: /4, bandpass filter: BPF.

Fig. 5. Output of the QPSK modulator: (a) showing the quadrature phase states and (b) showing the modulated signal at a data rate of 1.562 Gb/s.

Fig. 8. Photograph of the limiting amplifier module.

The synchronous demodulator module requires a 3.5-V voltage source, drawing 22-mA current for the low-noise amplifier (LNA), and a 2.8-V voltage source for the demodulator IC drawing 135-mA current. In addition to the supply voltages, a further tuning voltage of 0.8 V is required to set the phase shifters to the correct phase compensation value, with negligible current consumption. C. Limiting Amplifiers

Fig. 6. Measured spectra of the generated QPSK signal for: (a) 1.562-, (b) 3.124-, and (c) 6.248-Gb/s data rates.

test structure realized on the same module has a measured 3-dB bandwidth of 460 MHz centered at 20.5 GHz [10]. The group delay of the filter is measured to be 1.1 ns around the passband. Further details on the implementation of the individual components can be found in [12].

Limiting amplifier modules aid in interfacing the FPGA board to the demodulator module. These amplifiers guarantee sufficient voltage swing and constant amplitude levels required for symbol detection at the FPGA board during bit error rate (BER) testing. One of these modules is displayed in Fig. 8. The IC is realized in Telefunken Semiconductors SiGe2RF technology, and consists of a two-stage limiting amplifier with a modified Cherry–Hooper topology. The amplifier exhibits a measured small-signal gain of 37 dB over a bandwidth of 8 GHz, delivering an output voltage swing of approximately 600-mV for an input signal level of down to 44-mV [13]. As seen in Fig. 8, low-pass filter structures are included on the board material (Rogers RO4003, t:508 m, ) at the input of the amplifier. The filters consist of two open radial stubs and a high-impedance line in between, acting as a C–L–C low-pass structure. The filters are included in order to suppress

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Fig. 10. Measured standard deviation of the recovered carrier period versus data rate. Fig. 9. Photograph of the verification experiments setup.

undesired higher harmonic components, such as the significant energy present at twice the IF. Separate connectorized filters are prepared as well to be used in eye-diagram measurements without the limiting amplifiers. The measured 3-dB bandwidth of the realized low-pass filter equals 3.6 GHz with a suppression of more than 30 dB at 10 GHz. D. Verification Experiments In Fig. 9, the complete verification experiment setup is shown. For these experiments, the output of the QPSK modulator is directly connected to the synchronous demodulator, and the power level is controlled by the signal generators. The output of the demodulator is either fed through limiters to the FPGA evaluation kit for BER measurements, or fed through the low-pass filters to the real-time oscilloscope for eye-diagram measurements. In Fig. 9, both cases are displayed at the same time. For all BER measurements, the longest PRBS of 2 1 length is used and the measurements were performed for a duration of 10 received symbols. The lowest BER that can be detected is thus 10 , leading to apparently error-free transmission or lower BER. Unless stated otherwise, the carrier frequency is fixed at 5.1 GHz, the input power at 18 dBm, and the tuning voltage at 0.8 V for all experiments. 1) Carrier Recovery: As a first step, the recovered carrier signal is measured using a real-time oscilloscope operating at a sampling rate of 40 GS/s. For these measurements, the module presented in [10] was used, which has a different wire-bond configuration leaving one baseband output single-ended, but allowing the measurement of the recovered carrier. Due to the lack of a preamplifier in this module, the input power was increased to 6 dBm. In Fig. 10, the standard deviation of the measured carrier period versus the data rate is given. As seen, there is a very slight dependence on the data rate, in which the standard deviation increases from 1.3 ps for the lowest data rate (1.562 Gb/s) to 1.85 ps for the highest data rate (6.248 Gb/s). This is more or

Fig. 11. Measured average eye quality factor of the demodulated I and Q streams versus the data rate.

less expected, as the crucial parameter affecting the stability of the recovered carrier signal is the bandwidth of the bandpass filter within the carrier recovery. The inset in the figure shows that the recovered carrier is very stable without any disturbances or phase jumps, and is suitable to be used in demodulation. 2) Eye Diagrams: In the next step, the eye diagrams of the demodulated I and Q data pattern are measured. For these measurements, the I and Q outputs of the demodulator are connected to the real-time oscilloscope through the previously described low-pass filters. The measured average eye quality factor for both streams versus the data rate is displayed in Fig. 11. Although successful demodulation is achieved in all cases, the eye quality declines continuously with increasing data rate, as can be seen in the insets in Fig. 11. This cannot be explained by worse carrier recovery performance, as the carrier recovery measurements showed only slight differences for different data rates. It is believed that the reason for this is the limitation of the QPSK generation setup, mainly due to the modular implementation and the unavoidable impedance discontinuities between each

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Fig. 12. Measured average BER versus input power for different data rates.

module. The measurements with BPSK modulated signals presented in [10] support this argument, where the test signal generation setup was much simpler, and no degradation was determined up to a symbol rate of 4 GS/s. 3) Sensitivity: The sensitivity of the analog demodulation is determined by BER measurements. The demodulated I and Q streams are fed to the FPGA evaluation kit through the limiting amplifiers, and the BER performance of both streams are observed simultaneously. From both streams, an average BER value is calculated, and is presented as the final result. The input power to the demodulator module is swept by adjusting the carrier power from the signal generators, and the exact incident average modulated power was measured using a power meter. In Fig. 12, the measured average BER versus input power is displayed for different data rates. As can be seen, at an input power level ranging from 5.5 to 31 dBm, no errors could be detected for data rates of 1.562 and 3.124 Gb/s. The same is true for an input power of 29 dBm and a data rate of 3.906 Gb/s. These results show that the presented carrier recovery and demodulation concept is only weakly dependent on the input power. From these results, it can be concluded that no precise gain control is needed for the synchronous demodulation. As done in this study, a preamplifier with a gain of around 20 dB already results in a dynamic range of 23.5 dB with a BER of 10 up to a data rate of 3.906 Gb/s. For the highest data rate of 6.248 Gb/s, error-free operation was restricted to only a very limited input power range from 17 to 21 dBm. The exact reason of such limitation is not completely clear, but there should be a strong influence of the signal generation setup, causing distortion of the demodulated signal, as shown in Fig. 11. 4) Variations in Input Frequency: Another interesting point to determine is the sensitivity of the analog demodulation to variations of the input frequency. To this end, the carrier frequency of the QPSK signal was varied and the resulting BER values were measured. The data rate was fixed at 3.906 Gb/s, the highest data rate for which the analog demodulation performance was not degraded. As expected, for changing input frequency, the tuning voltage of the phase shifters has to be adjusted due to the varying phase response of the carrier recovery components. In Fig. 13, the required tuning voltage region for a BER of 10 is highlighted

Fig. 13. Dependence of the phase shifter tuning voltage to input frequency vari. ations for a

Fig. 14. Measured BER versus I/Q imbalance.

for different input frequencies. Although a frequency variation of more than 100 MHz can be tolerated, it is not very desirable that the tuning voltage needs to be adjusted accordingly. From Fig. 13, it can be seen that if the tuning voltage is fixed at a certain value, a frequency variation of around 30 MHz can still be tolerated for a BER of 10 . 5) I/Q Imbalance: One advantage of the setup used in the verification experiments is that the QPSK signal is generated as a summation of two independent BPSK signals, and the phase and amplitude imbalance between the two can be adjusted as desired. This provides the opportunity to characterize the analog demodulation performance against I/Q imbalance. Apart from causing severe inter-symbol interference, I/Q imbalance will cause deviation of the symbols from their ideal locations in the signal space, which will clearly have an impact on the carrier recovery performance. In Fig. 14, the measured BER is displayed in a 2-D plot with a -axis for amplitude imbalance, and an -axis for phase imbalance. In the figure, the region of phase and amplitude imbalance is highlighted, which could be tolerated for a BER of 10 . As in the previous experiment, the data rate was fixed at 3.906 Gb/s. As seen, for a phase error of up to 12.5 , no errors could be detected when no amplitude error was present. Similarly, for no phase error, an amplitude error of 6 dB could be

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TABLE I SUMMARY OF THE RESULTS

Fig. 15. Measurements of the recovered carrier for: (a) no noise, (b) FM noise with a maximum frequency deviation of 5 MHz, and (c) 16 FSK modulation with a maximum frequency deviation of 5 MHz and a symbol rate of 50 MS/s.

tolerated. These results are promising, as state-of-the-art transmitter frontends typically show much better quadrature performance. In Fig. 14, the recovery limit is also plotted, meaning that, at this limit, the I/Q imbalance is too high for the recovery of a stable carrier signal, and no symbols could be detected at the FPGA board. 6) Phase-Noise Suppression: As a final test, the phase-noise suppression capability of the proposed analog demodulation concept was verified. To be able to generate QPSK signals with artificial phase noise, the signal generation setup shown in Fig. 4 was modified. For these tests, instead of using two separate signal generators, only one is used and the required 90 phase shift between the two BPSK signals is simply generated by proper choice of cable lengths. This, however, limited the carrier frequency to a very specific value, which was set to 5.0865 GHz. Already 6 MHz above or below this value, a phase error of around 14 was measured, setting the limit to the maximum frequency deviation that could be tested. For phase-noise generation, the Agilent 4438 C arbitrary waveform generator was used, which is able to apply frequency modulation up to 50-MS/s symbol rate to the carrier signal. In order to emulate a noisy carrier signal, two cases were considered. In the first case, noise-like FM modulation was applied to the carrier signal, and in the other case, a 16 frequency-shiftkeying (FSK) modulation with a symbol rate of 50 MS/s was applied. For both cases, no errors could be detected up to a maximum frequency deviation of 5 MHz, meaning that the recovered carrier is able to follow the frequency variation of the input signal. However, at a frequency deviation of 6 MHz, the quadrature phase error exceeds the tolerable range for a BER less than 10 , and at a frequency deviation of 8 MHz, no detection was possible. In Fig. 15, the measured spectrum of the recovered carrier is displayed for no noise, FM noise, and FSK modulation cases, both with a maximum frequency deviation of 5 MHz. For these measurements, the module described in [10] was used, and the

input power was increased to 6 dBm. As seen, the recovered carrier contains the artificially inserted phase noise for both FM and FSK cases. These results are in agreement with the simulations and the estimated delay within the carrier recovery. The results show that the instantaneous phase of the recovered carrier and the modulated carrier are still highly correlated, which leads to a strong suppression of the artificial phase noise. The test cases represent extreme conditions with very rapid (50 MHz) and large (5 MHz) frequency fluctuations. This leads to the conclusion that, for real systems, the accumulated phase noise of the transmit and receive frequency synthesizers will be almost completely suppressed, leading to a considerable improvement of the system performance. IV. SUMMARY AND DISCUSSION The results of the experimental characterization are summarized in Table I. Results from other published demodulators in the literature are included as well for comparison. The presented synchronous demodulator achieves a very high data rate, exceeding those presented in [9] and [15]. Furthermore, based on the measurements with BPSK signals in [10], the presented demodulator can potentially demodulate up to a data rate of 10 Gb/s, and such a high data rate is demonstrated only in [14] and [5]. In [14], the high data rate is achieved through differential demodulation, which requires the received signal to be delayed by an exact symbol duration. This needs to be precisely controlled, and even a reference signal would be required, because a constant clock frequency at the transmitter cannot be guaranteed. The demodulator presented in this study requires a tuning voltage for the phase shifters as well, though its value is fixed, and is completely independent of the transmitter implementation and the data rate. Excellent performance is demonstrated in [5], where a baseband demodulator is presented, which includes carrier recovery, as well as an adaptive channel equalizer. The drawback is that the carrier recovery is performed by a phase rotator, and the frequency offset between the transmitter and receiver is not eliminated, but rather tolerated. This means that the QPSK constellation continuously spins, and the phase rotator is continuously readjusted to follow these changes. This leads to a very limited range of frequency offset that this demodulator can tolerate, which is specified to be only 3 MHz in [5]. This requirement is very challenging to achieve, if not possible. Furthermore, the maximum frequency offset of 3 MHz is determined in a close to

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ideal measurement environment, and it is not clear if the phase rotator can follow this offset when other signal imperfections are present. Therefore, the baseband modem in [5] can benefit from the synchronous demodulator presented in this work, as it completely eliminates the frequency offset, alleviating the need for a continuous phase adjustment. A drawback of the presented demodulator is clearly the high power consumption, especially when compared to the CMOS implementations. However, it should be mentioned that this does not arise from the proposed demodulation concept itself, but is rather due to the 0.8- m HBT technology used for the prototype implementation, which requires substantially higher current drive for a proper operation of the transistors. Considering the receiver schematic in Fig. 1, one can deduce that the presented demodulation concept entails only little additional power consumption compared to a typical super-heterodyne RF-frontend, such as the sliding-IF receiver presented in [16], while the only additional active components required are the frequency quadrupler and phase shifters. V. CONCLUSION In this study, a hardware efficient analog demodulation concept has been introduced, which can eliminate the need for highprecision ADCs and DSPs by synchronous demodulation of QPSK signals. The presented concept is very simple, and only needs very little additional hardware effort when compared to classical super-heterodyne RF frontends. The synchronous demodulator is realized as a prototype RF module and is characterized at an IF by means of BER testing. The results show demodulation capability at a data rate above 6 Gb/s, high dynamic range, robustness against frequency variations, and most notably, strong suppression of the accumulated phase noise of the transmitter and receiver frequency synthesizers. The presented demodulator is very promising for short-range multi-Gb/s wireless links, and it may as well be considered for optical links where phase-noise suppression can prove to be very beneficial. ACKNOWLEDGMENT The Institute of Microwave Techniques, Ulm University, Ulm, Germany, is acknowledged for the design of the UWB baluns and power combiners. The authors wish to thank Dr.-Ing. A. Trasser, Institute of Electron Devices and Circuits, Ulm University, Ulm, Germany, for his assistance in wire-bonding and packaging. REFERENCES [1] G. Fettweis, F. Guderian, and S. Krone, “Entering the path towards terabit/s wireless links,” in Design, Automat. Test Eur. Conf. Exhibit., Grenoble, France, Mar. 14–18, 2011, pp. 1–6. [2] J. Singh, S. Ponnuru, and U. Madhow, “Multi-gigabit communication: The ADC bottleneck,” in IEEE Int. Ultra-Wideband Conf., Vancouver, BC, Canada, Sep. 9–11, 2009, pp. 22–27. [3] H. Chung, A. Rylyakov, Z. T. Deniz, J. Bulzacchelli, G.-Y. Wei, and D. Friedman, “A 7.5-GS/s 3.8-ENOB 52-mW flash ADC with clock duty cycle control in 65 nm CMOS,” in VLSI Circuits Symp., Kyoto, Japan, Jun. 16–18, 2009, pp. 268–269. [4] M. El-Chammas and B. Murmann, “A 12-GS/s 81-mW 5-bit time-interleaved flash ADC with background timing skew calibration,” IEEE J. Solid-State Circuits, vol. 46, no. 4, pp. 838–847, Apr. 2011.

[5] C. Thakkar, L. Kong, K. Jung, A. Frappe, and E. Alon, “A 10 Gb/s 45 mW adaptive 60 GHz baseband in 65 nm CMOS,” IEEE J. Solid-State Circuits, vol. 47, no. 4, pp. 952–968, Apr. 2012. [6] A. J. Rustako, L. Greenstein, R. Roman, and A. A. M. Saleh, “Using times-four carrier recovery in M-QAM digital radio receivers,” IEEE J. Sel. Areas Commun., vol. SAC-5, no. 3, pp. 524–533, Apr. 1997. [7] A. Ç. Ulusoy, G. Liu, M. Peter, R. Felbecker, H. Y. Abdine, and H. Schumacher, “A BPSK/QPSK receiver archtitecture suitable for lowcost ultrahigh rate 60 GHz wireless communications,” in Eur. Microw. Conf., Paris, France, Sep. 28–30, 2010, pp. 381–384. [8] R. Noé, “Phase noise-tolerant synchronous QPSK/BPSK basebandtype intradyne receiver concept with feedforward carrier recovery,” J. Lightw. Technol., vol. 23, no. 2, pp. 802–808, Feb. 2005. [9] S.-J. Huang, Y.-C. Yeh, H. Wang, P.-N. Chen, and J. Lee, “ -band BPSK and QPSK transceivers with Costas-loop carrier recovery in 65-nm CMOS technology,” IEEE J. Solid-State Circuits, vol. 46, no. 12, pp. 3033–3046, Dec. 2011. [10] A. Ç. Ulusoy and H. Schumacher, “A system-on-package analog synchronous QPSK demodulator for multi-gigabit 60 GHz wireless communications,” in IEEE MTT-S Int. Microw. Symp. Dig., Baltimore, MD, Jun. 5–10, 2011, pp. 1–4. [11] D. Lin, B. Schleicher, A. Trasser, and H. Schumacher, “A highly compact SiGe HBT differential LNA for 3.1–10.6 GHz ultra-wideband applications,” in Int. Ultra-Wideband Conf., Nanjing, China, Sep. 20–23, 2010, pp. 1–4. [12] A. Ç. Ulusoy, G. Liu, A. Trasser, and H. Schumacher, “Hardware efficient receiver for low-cost ultrahigh rate 60 GHz wireless communications,” Int. J. Microw. Wireless Technol., vol. 3, pp. 121–129, 2011. [13] Y. Su, G. Liu, and H. Schumacher, “Limiting amplifiers for bits recovery of Gbps analog BPSK/QPSK demodulator,” in Ph.D. Res. Microelectron. Electron. Conf., Berlin, Germany, Jul. 18–21, 2010, pp. 1–4. [14] H. Takahashi, T. Kosugi, A. Hirata, K. Murata, and N. Kukutsu, “10Gbit/s quadrature phase-shift-keying modulator and demodulator for 120-GHz-band wireless links,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 12, pp. 4072–4078, Dec. 2010. [15] K. Chuang, D. Yeh, F. Barale, P. Melet, and J. Laskar, “A 90 nm CMOS broadband multi-mode mixed-signal demodulator for 60 GHz radios,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 12, pp. 4060–4071, Dec. 2010. [16] C. Chang-Soon, E. Grass, M. Piz, M. Ehrig, M. Marinkovic, R. Kraemer, and C. Scheytt, “60-GHz OFDM systems for multi-gigabit wireless LAN applications,” in IEEE Consumer Commun. Network. Conf., Las Vegas, NV, Jan. 9–12, 2010, pp. 1–5. Ahmet Çağrı Ulusoy (S’09–M’11) received the B.Sc. degree from Istanbul Technical University, Istanbul, Turkey, in 2006, the M.Sc. degree from Ulm University, Ulm, Germany, in 2008, respectively, and is currently working toward the Doctoral degree at the Institute of Electron Devices and Circuits, Ulm University. His main research areas cover UWB and millimeter-wave communications. Mr. Ulusoy was the recipient of the Best Student Paper Award of the 2011 Radio Wireless Symposium and Second Place in the Best Student Paper Competition of the 2011 IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS).

Hermann Schumacher (M’93) received the Doctorate degree in engineering (Dr.-Ing.) from RWTH Aachen, Aachen, Germany in 1986. From 1986 to 1990, he was with Bellcore, Red Bank, NJ. He then joined the School of Engineering and Computer Engineering, Ulm University, Ulm, Germany, as a Professor. He is currently the Director of the Institute of Electron Devices and Circuits, and the Director of the Communications Technology international M.Sc. program. His research interests range from compound semiconductor devices for microwave and millimeter-wave applications to high-frequency microsystems, including low-cost millimeter-wave communication solutions and impulse-radio UWB techniques for biomedical sensing.

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A 60-GHz Active Receiving Switched-Beam Antenna Array With Integrated Butler Matrix and GaAs Amplifiers Chad E. Patterson, Member, IEEE, Wasif Tanveer Khan, Student Member, IEEE, George E. Ponchak, Fellow, IEEE, Gary S. May, Fellow, IEEE, and John Papapolymerou, Fellow, IEEE

Abstract—This paper presents for the first time a 60-GHz receiving switched-beam antenna on organic liquid crystal polymer (LCP) platform. A 4 1 quasi-Yagi array is incorporated with a 4 4 Butler matrix beamforming network and GaAs low-noise amplifiers on an LCP substrate. The active beam is controlled by GaAs single-pole-double-throw switches to access the four output states of the Butler matrix. The entire 4 1 active array is 1.4 cm 1.75 cm and consumes 1.1 W of dc power. Successful comparisons of the measured and simulated results verify a working phased array with a return loss better than 10 dB across the frequency band of 56.7–63.7 GHz. A comparison of radiation patterns demonstrate beam steering of 40 with a peak active gain of 27.5 dB. The combined antenna and receiver noise perforof 18.6 dB/K mance at 60 GHz exhibits an estimated merit and noise figure of 5.4 dB. Index Terms—Butler matrix, integrated circuit (IC) packaging, liquid crystal polymer (LCP), phased arrays, receiving antennas.

I. INTRODUCTION

T

HE DEMAND for high-speed, high-capacity wireless communications has driven gigabit-per-second (Gb/s) applications into millimeter-wave (mm-wave) frequencies where higher bandwidths (BWs) can be achieved. In this regime, 60-GHz communications have received much attention because of the availability of unlicensed industrial–scientific–medical (ISM) bands and inherent propagation path loss in this spectrum [1]. These unique properties have spawned a path forward for short-range secure data transfer at ultrahigh speeds, which requires a new generation of low-cost compact high-performance adaptive antennas [2], [3]. The problems associated with this task reside not only in the system architecture, but also in the selected platform material for system integration. There are many new materials being explored for advanced package design that are thinner, lighter, and have excellent high-frequency characteristics for a wide

Manuscript received March 14, 2012; revised June 16, 2012; accepted July 23, 2012. C. E. Patterson, W. T. Khan, G. S. May, and J. Papapolymerou are with the School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332 USA (e-mail: [email protected]; [email protected]). G. E. Ponchak is with the NASA Glenn Research Center, Cleveland, OH 44135 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2213834

range of applications. Liquid crystal polymer (LCP) is an established low-cost alternative to ceramic technology for antenna applications due to its large panel processing. The exhibited low dielectric constant and loss tangent ( GHz) demonstrated up to 110 GHz makes it a leader among competing materials [4]–[7]. Additionally, the thin-form availability of this material makes it a primary candidate for mm-wave applications where reduced feature sizes become critical for RF performance; conversely, LCP multilayer lamination capability also allows thicker layers for high antenna radiation efficiencies. There are several techniques being investigated to improve antenna adaptability at band. Phased-array antennas utilize phase shifters integrated on the substrate for controlled beam steering. In [8], a CMOS Hi–Lo pass switching phase shifter is used to control a 2 2 phased array on a ceramic substrate. This device was integrated with several amplifiers to offset the high losses incurred. At mm-wave frequencies, there are limited types of low-loss phase shifters available for small size antenna applications. Switched-line phase shifters have been used in conjunction with low-loss GaAs and microelectromechanical systems (MEMS) switches [9]. This approach enables highly directional arrays to scan a wide field-of-view with broadband performance. However, the inclusion of several integrated circuits (ICs) or multilayered structures necessary to achieve a wide beam scan drives up cost and consumes real estate. A low-cost solution is the use of switched-beam elements. By using a configuration of broadside and end-fire antennas integrated together on a substrate, it is possible to achieve multiple beams controlled through a switch network. With this technique, antenna elements are oriented to radiate in various directions for multiple field-of-views that would otherwise be difficult to accomplish through phased-array beam steering [10], [11]. While this technique avoids some inherent problems with phased arrays, it introduces blind spots between field-of-views that phased arrays can inherently solve. A combined solution to these techniques is the integration of a switched beamforming network (BFN) that implements a phased-array scanning capability [12]. One such structure is the Butler matrix, which consists of number of RF inputs that independently feed number of RF outputs with varying phase number of fixed radiating beams acdelays. This creates cessed by the separate inputs. Utilizing this type of BFN reduces the number of ICs needed for conventional phase-shifting techniques while retaining beam-scanning capability. The structure

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Fig. 1. Schematic layout of the switched-beam array.

is implemented in a variety of forms including substrate integrated waveguide (SIW) or microstrip lines. It has been successfully investigated as a viable solution for antenna beamswitching capability at mm-wave frequencies where the size of the structure becomes inherently reduced [13], [14]. In [15] and [16], Butler matrix structures were integrated with a patch antenna array on a Duroid substrate. These passive antennas demonstrated proof-of-concept beam-steering capability, but do not implement a switch network or integrate amplifiers for improved system performance. Previously, a 4 1 quasi-Yagi array was developed on LCP for mobile platform integration at 60 GHz [17]. Using this design, a GaAs low-noise amplifier (LNA), power amplifier (PA), and single-pole-double-throw (SPDT) switch were integrated for transmit and receive functionality [18]. Although substrate level integration was demonstrated, no beam steering could be achieved. This paper makes further progress by redesigning the quasi-Yagi array to incorporate a Butler matrix for switchedbeam functionality. Additionally, a switch network of GaAs SPDT switches are integrated to toggle between the beam states, and GaAs LNAs are integrated per antenna element to minimize the receive noise figure (NF). These die are packaged and biased with a substrate level distribution network. This paper demonstrates for the first time an organic fully integrated lightweight -band receive switched-beam antenna with GaAs LNAs and SPDT switches. The work shown here could be tiled into a larger array for increased antenna performance or configured with additional arrays for a higher order switched element antenna. II. SWITCHED-BEAM ARRAY OVERVIEW The 4 1 receive switched-beam array was designed for operation at 60 GHz and consists of several components, illustrated in Fig. 1, that were co-designed and optimized for seamless integration. The antenna array was designed for maximum gain over a wide frequency band while maintaining 4-dB overlap points of the beams. The antenna element is a quasi-Yagi dipole array chosen due to its inherent small size and highly directional radiation patterns. A GaAs LNA was integrated onto each antenna element to both increase gain performance and minimize antenna NF. The BFN utilizes a 4 4 Butler matrix to phase the antenna elements for beam steering capability. A switch network was implemented using three SPDT switches configured to feed from the four outputs of the Butler matrix to a single G3PO RF connector.

In designing each system component, tradeoffs were assessed for deciding the LCP material and metal thicknesses. The thicknesses commercially available for LCP are 25, 50, and 100 m with 9-, 18-, or 35- m copper metal cladding. For simplicity and cost efficiency, a two-metal stackup was chosen. The driving factors for choosing the material thickness were the Butler matrix performance, chip-to-package wire-bond length, and minimum allowable feature size of the microstrip balun used for the dipole antenna element. Through several iterations of simulating each structure, it was found that a 50- m thickness provided the best RF performance for the Butler matrix and chip packages while also maintaining feasibly achieved feature sizes for fabricating the microstrip balun. The chosen metal thickness was determined based on requirements for the bottom (ground) layer. This should be thick enough to withstand via and cavity lasering, and provide adequate thermal dissipation for the integrated amplifier. It was determined that at least 18- m-thick copper would be necessary for the lasering to avoid puncturing this layer and would also be adequate for thermal dissipation since the LNA is relatively low power. III. BUTLER MATRIX The Butler matrix consists of four RF inputs that independently feed four RF outputs with varying phase delays. The structure is host to a configuration of several microstrip quadrature hybrid couplers and phase-delay lines. The purpose of this network is to uniformly feed the four antenna elements with progressive phase delays of 45 135 135 , and 45 , which is determined by the respective input port selected. The use of hybrid couplers provides high isolation between each input port, which allows a switch network to toggle between these ports without affecting the antenna performance. This creates four fixed radiating beams accessed by four independent inputs. Using the principle of reciprocity, this structure can be utilized in the same manner for transmitting or receiving antenna applications. The individual components, as well as the entire Butler matrix structure, were designed using Ansoft High Frequency Structure Simulator (HFSS). It was found that using lines with characteristic impedances less than 50 would be too wide to effectively design the hybrid couplers. Thus, the Butler matrix was designed for a system impedance of . The optimized hybrid coupler uses 70- and 50- lines having lengths of 930 and 780 m, respectively. The simulated performance of this design has a return loss greater than 20 dB, an insertion loss less than 0.5 dB, and an isolation higher than 17 dB at 60 GHz over a BW of 8 GHz. This served as a building block for the Butler matrix. The crossover structure uses two quadrature hybrid couplers in series spaced 925 m apart with 70- lines. This has a simulated performance of a return loss greater than 14 dB, insertion loss less than 0.7 dB, and isolation higher than 25 dB. The final layout of the 4 4 Butler matrix is shown in Fig. 2. For design purposes, the Butler matrix was optimized with matched ports; however, the implemented structure was to be incorporated with reflective switches on Ports 1–4. Since the Butler matrix maintains inherent isolation between these respective ports, the effect of reflective switches is minimal.

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Fig. 2. Model of the 4

3

4 Butler matrix.

Fig. 3. Simulated reflection coefficient for each port of the Butler matrix.

The simulated -parameters of the Butler matrix are shown in Figs. 3–5. These results correspond to the assigned ports illustrated in Fig. 2. Fig. 3 shows the reflection coefficients when looking into each port. It maintains a return loss greater than 10 dB across the frequency band of 56–67 GHz. Fig. 4 shows the transmission coefficients associated with the toggled outputs of ports 1–4. The variation of insertion loss for all ports is less than 1 dB from 56.5 to 65.5 GHz. It is estimated that this phase-shifting technique introduces less than 2.5 dB of loss to the system performance. Fig. 5 shows the simulated phase shift at adjacent antenna elements for excitations at P1 and P2. The design was optimized for minimal phase error at 60 GHz. These plots illustrate the relative variation of phase shift across the frequency band, which will have a direct effect on the antenna radiation patterns. IV. QUASI-YAGI PLANAR ANTENNA The quasi-Yagi dipole array was optimized in conjunction with the Butler matrix. A single antenna element was first designed for 60-GHz operation using the technique outlined in [19]. The final layout of this element is illustrated in Fig. 6. The design uses a driven dipole excited by a coplanar strip (CPS) line. A balun was used to couple the odd mode of a microstrip feed into the CPS line. This also incorporated a quarter-wave transformer at the unbalanced port of the balun to convert the input impedance to 50 . The truncated microstrip ground acted

Fig. 4. Simulated transmission coefficients of the Butler matrix for: (a) P1 and P4 and (b) P2 and P3.

as a pseudo-reflector to the driven dipole, increasing the antenna directivity by 3 dB. This design was simulated in HFSS and showed a resonance at 60 GHz with a 10-dB BW of 3.5 GHz (5.8% BW) and peak directivity of 5.2 dBi. Directors were not used in this design in order to maintain a wide beamwidth. This minimizes drop in gain when the array is phased for wide beam scans. The 4 1 array spacing was optimized using the quasi-Yagi antenna modeled with the Butler matrix. A quarter-wave transformer was used to match the 50- impedance of the antenna element with the 70- impedance of the Butler matrix. Although this configuration was not consistent with the final active array design, it was necessary to investigate the effects of the Butler matrix on the antenna radiation patterns. Due to the fixed phase shifts of the Butler matrix, array factor (AF) theory dictates a 4 1 dipole array, with element spacing and uniform amplitude distribution, will have a maximum overlap point of 3.7 dB. Since the designed antenna element is more directive than a conventional dipole, it was expected that the beam overlap points would fall slightly below this value. It was found that an array spacing of 2.8 mm gave optimum gain levels for the four beam scans while also maintaining 4-dB overlap points. Both a single antenna element and 4 1 array with a Butler matrix were fabricated and tested for measurements. A 50- coplanar waveguide (CPW)-to-microstrip transition was

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Fig. 7. Simulated and measured of the single dipole antenna and the 4 phased array with incorporated Butler matrix.

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each die package could be more accurately optimized for performance over the desired frequency band. A. LNA Circuit Description

Fig. 5. Simulated phase shift between adjacent antenna elements for: (a) P1 and (b) P2.

The GaAs LNA (Hittite HMC-ALH382) operates between 57–65 GHz with a reported typical gain of 24 dB, NF of 4.5 dB, and of 12 dBm. The circuit requires a drain voltage of 2.5 V drawing 64 mA of current and is controlled by varying the gate voltage from 1 to 0.3 V. The biasing network requires 100-pF by-pass capacitors next to the drain and gate chip pads, as well as 0.1- F capacitors, which are not as critically placed. A 10- resistor is also placed in series between the bypass capacitors on the gate dc line. The die is fabricated for wire-bond packaging on the RF and dc pads. The LNA die size is 1.55 0.73 0.1 mm . A more in-depth description of this device can be found online.1 B. SPDT Switch Circuit Description

Fig. 6. Model of the single antenna element illustrating feature dimensions.

incorporated on to these structures for ground–signal–ground (GSG) probing. The simulated and measured for both structures are plotted in Fig. 7. These plots verify good correlation between the successful fabrication of these samples and the accuracy of the HFSS modeling. V. GaAs CHIP PACKAGE DESIGN The LNA and SPDT switch were initially packaged using 50- transitions to verify the on-die performance. Using accurate model representation of the chip-to-package interconnect, the measured -parameters were de-embedded to capture the on-die performance. Using the de-embedded parameters,

The GaAs SPDT switch (Hittite HMC-SDD112) operates between 55–86 GHz with a reported ON-state insertion loss of 2 dB and an OFF-state isolation of 30 dB. Each output of the circuit is controlled by an independent dc input line. The ON state requires a 5-V dc supply drawing 63 nA of current, while the OFF state requires a 5-V dc supply drawing 22 mA of current. The biasing network requires 100-pF by-pass capacitors placed next to the chip to mitigate unwanted resonances. The die is fabricated for wire-bond packaging on the RF and dc pads. The switch die size is 2.01 0.975 0.1 mm . A more in-depth description of this device can be found online. C. De-Embedded Chip Performance The LNA and SPDT switch packages were initially designed and optimized assuming an on-die 50- match. A model was built for each die simulating a 76 m 12.5 m Au ribbon wire interconnecting the on-die pads to a 50- microstrip line on package. The width of the ribbon (76 m) was chosen not only to minimize the wire inductance, but also closely mimic a 50- line when bonded on top of the 100- m-thick GaAs chip substrates. This effectively minimized the length of the 1Hittite Microwave Corporation, Colorado Springs, CP. [Online]. Available: www.hittite.com

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parasitic interconnect to the distance between chip edge and the on-package microstrip line. Both die were embedded into the 50- m LCP substrate to also minimize wire-bond lengths. Shunt capacitive stubs were incorporated on package to compensate for the wire bonds and tune out the parasitic inductance. Additionally, a 50- CPW-to-microstrip transition was used to allow probe measurement. The final stub dimensions were 420 m 60 m and the simulated interconnect showed better than 20-dB return loss and less than 0.25-dB insertion loss up to 70 GHz. Both chip packages were fabricated, assembled, and measured. Using Advanced Design System (ADS), this measured data was then used in conjunction with the simulated HFSS models to de-embed the -parameters for the on-die response. The de-embedded parameters were referenced to 50- lines on die. Using this reference for the package design, the modeled wire-bond transition included not only 200- m-length ribbon, but also ribbon running on top of the chip to pad. Looking out from the reference plane on chip, this looks like a length of transmission line, very close to 50 , in series with a wire inductance. The effect of this wire-bond transition was considered in the design for both chip packages.

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Fig. 8. Photograph of the packaged LNA integrated on the antenna.

D. LNA Package Design Using the de-embedded LNA -parameters, the package was optimized for integration into each Yagi element of the antenna array. The RF input was designed for a 50- impedance feed from the Yagi array and the RF output was designed for a 70- impedance feed to the Butler matrix. This minimized the number of impedance transitions needed, reducing the incurred insertion loss and saving real estate. The final LNA package design is shown in Fig. 8. At the input of the package, a 50microstrip line feeds into a compensation stub with dimensions 425 m 100 m. The output of the package uses a compensation stub with dimensions 400 m 100 m, followed by a 76- quarter-wave impedance transformer feeding into a 70microstrip line. It is expected that the LNA will add 24 dB of active gain to the antenna array. E. Switch Network Package Design Using the de-embedded -parameters of the SPDT switch, the switch network was optimized for integration with the Butler matrix and G3PO RF output. It was configured to selectively route four separate RF inputs to a single RF output using three SPDT switches. This required three different package interconnects to be optimized: 1) Butler matrix to switch; 2) switch to switch; and 3) switch to G3PO connector. The final SPDT switch network package design is shown in Fig. 9. The common RF line for each switch did not require compensation stubs and was well matched when modeled in conjunction with the wirebond transition to a 50- microstrip line. The four switched RF lines fed from the Butler matrix also did not require compensation stubs. These were well matched when wire bonded directly to a 70- microstrip line. The two interconnecting microstrip lines from the common to split-port RF lines used a 50- microstrip line feeding a 55- quarter-wave impedance transformer. The entire switch network is expected to account

Fig. 9. Photograph of the packaged switch network integrated on the antenna.

for less than 4 dB of insertion loss across the frequency band of interest. VI. G3PO TRANSITION DESIGN A G3PO connector was used to interconnect the 50- microstrip output of the antenna to a 1.85-mm coaxial connector. This component is specified to maintain a voltage standing wave ratio (VSWR) of 1.25 up to 65 GHz with an insertion loss less than 1 dB. Further details of the connector can be found online.2 The G3PO-to-microstrip transition was modeled in HFSS using a tuning stub to improve impedance matching. An open butterfly stub of length 420 m was placed 1.25 mm from the edge–mount interface. This improved the return loss to be 2Corning Gilbert, Glendale, AZ. [Online]. Available: www.corning.com/ gilbert/

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Fig. 11. Measured array. Fig. 10. Fabricated and assembled 4

for each beam state of the 4

1 active switched-beam

1 active receiving switched-beam array.

VIII. ANTENNA MEASUREMENTS AND RESULTS greater than 10 dB from 53 to 73 GHz with an insertion loss less than 0.9 dB. VII. ANTENNA FABRICATION AND ASSEMBLY The active array was fabricated on 50- m LCP with 18- m copper cladding. The top metal layer was first etched completely off to allow via drilling. A KrF 248-nm UV excimer was used to drill 100- m-diameter vias for interconnecting the top and bottom ground planes. The substrate was then metalized with a 200-Å Ti/5- m Cu layer using a dc sputterer. This allowed for a uniform deposition on the via walls ensuring a connection between top and bottom metallization layers. Both sides of the substrate were patterned using standard photolithography techniques. Additionally, a thin layer of gold was evaporated onto the top layer and selectively plated up to a 5- m thickness. This layer was again patterned using photolithography. Cavities for embedding the chips were drilled through the LCP down to the bottom copper layer using the UV excimer. The LNA and SPDT cavities were made 1.65 mm 1.65 mm and 2.1 mm 1.5 mm, respectively. These were sized to accommodate the chips as well as the 100-pF bypass capacitors. A hole was also lasered through the substrate for housing the G3PO connector. The ICs, capacitors, and resistors were mounted on the fabricated sample using silver epoxy and were allowed to cure for 30 min at 120 C. The RF and dc chip pads were then wire bonded on to the gold traces on LCP. The wire bonds were made using a wedge-wedge wire bonder utilizing 75 m 12.5 m Au ribbon. This type of bonder uses ultra sonic energy to make a weld between contact points, therefore avoiding the use of excessive heat and pressure, which could damage the components. The last step in the assembly was mounting the G3PO connector. A no-clean R276 solder paste was applied to the ground and signal lines, and the connector was dropped in place. The entire sample was placed into an oven set at 265 C for 3 min until the solder reflowed for a secure connection. A photograph of the final active array is shown in Fig. 10. Excluding the added dc line lengths and the G3PO connector, the entire active array is 1.4 cm 1.75 cm.

The antenna was biased using 38 american wire gauge (AWG) insulated wire soldered to the dc pads, and in any given beam state, it consumes 1.2 W of dc power and has an estimated of 17 dBm per element. A G3PO-to-1.85-mm adapter was used for and radiation pattern measurements. Additionally, the antenna was analyzed to calculate the added noise performance. The and radiation pattern measurements for each beam state were measured using an Agilent performance network analyzer (PNA). Fig. 11 shows that the active array maintains a return loss better than 10 dB centered at 60.2 GHz with a BW of 7 GHz (11.6% BW). The far-field radiation patterns were measured in an anechoic chamber. The minimum distance required for far-field measurements was calculated using the approximated formula from [20] (1) is the largest dimension of the antenna under test where (AUT). Two Quinstar -band standard gain horns were used to calculate the 4 1 switched-beam antenna gain using the gain-comparison method explained in [20]. While one gain horn was used as the transmitting probe during measurements, the other was used as a reference for gain calculation of the AUT. Using the largest dimension of the horn, cm, the minimum distance for the far-field setup was calculated to be 64 cm. For measurement, the final setup placed the probe horn 75 cm from the AUT. The PNA was used to measure the relative received power of the AUT as the probe rotated 360° about the fixed radial axis. Plots of the measured - and -planes are compared with results simulated in HFSS. Figs. 12 and 13 show the normalized radiation patterns at 60 GHz for each beam state. The locations of peaks and nulls correspond very well and the low cross-polarization levels confirm the linear polarization of the antenna. In the -plane, the scanned beams for P1 and P4 steer 12 with a half-power beamwidth of 20 , while P2 and P3 steer 40 with a half-power beamwidth of 27 . In the -plane, P1 and P4 have a half-power beamwidth of about 110 , and P2 and P3 have a half-power beamwidth of about 70 . A plot of beam-steering

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Fig. 13. Normalized

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-plane at 60 GHz for each beam scan in decibels.

Fig. 14. -plane beam steering versus frequency of the 4 beam array.

1 active switched-

consistent beam-steering angle across the band and is supported by excellent correlation with simulation data. A plot of the measured gain versus frequency is shown in Fig. 15. The estimated gain used for comparison in this plot is the simulated antenna gain for each beam scan adjusted by the predicted additional gain and losses of the LNA, Butler matrix, switch network, and G3PO connector. The antenna has a measured peak active gain of 27.5 dB and maintains better than 20 dB from 52.5 to 62 GHz. As discussed in [20]–[23], the added noise performance for receive antennas is conventionally analyzed by calculating the system NF, , and figure-of-merit ratio, , referenced at the system output. These parameters are calculated using (2) and (3) Fig. 12. Normalized scan in decibels.

-plane of co-pol and cross-pol at 60 GHz for each beam

angle versus frequency is shown in Fig. 14. Each port exhibits a

refers to the gain per degree Kelvin, is the stanwhere dard reference temperature 290 K, is the directivity of the antenna, and and are the ohmic loss and mismatch loss, respectively, in the feed line between the antenna element

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Fig. 15. Peak gain versus frequency of the 4

1 active switched-beam array.

and LNA. It is observed that when the LNA gain is sufficiently large, the feed-line loss and will be the dominating factors and the losses following it will have a negligible effect. As this is the case here, the components after the LNA are ignored in this analysis. Since the feed-line losses and antenna directivity could not be directly measured, these were simulated in HFSS. This showed an estimated of 0.8 dB, of 0.1 dB, and a directivity of 9.2 dBi. This analysis results in an estimated system NF of 5.4 dB and of 18.6 dB/K at 60 GHz. Resulting performances of the measured phased array can be evaluated with those works shown in the comparison table presented in [8]. Measuring the front-end block of these works, our antenna exhibits the highest front-end gain for four-element arrays due to the low-loss BFN (Butler matrix and switch network), which accounts for only 6.5 dB of insertion loss. In addition, the use of GaAs LNAs placed directly behind the antenna elements has allowed the lowest NF, compared to all studies in [8], but at the expense of slightly higher dc power consumption. Use of a thin LCP package layer also allowed reduced feature sizes and condensed signal routing to minimize the array dimensions. IX. CONCLUSION A -band active receiving switched-beam array has been presented for the first time on an LCP substrate. Active and passive components were co-designed for seamless integration and demonstrate high performance correlating to the simulated results. The measured far-field patterns show a peak active gain of 27.5 dB with 40 beam steering. By placing LNAs next to each Yagi element, the antenna NF was minimized to 5.4 dB with a of 18.6 dB/K. This study aims to serve as a building block for future low-cost Gb/s antenna solutions. REFERENCES [1] P. Smulders, “Exploiting the 60 GHz band for local wireless multimedia access: Prospects and future directions,” IEEE Commun. Mag., vol. 40, no. 1, pp. 140–147, Jan. 2002.

[2] J. Laskar, C.-H. Lee, S. Sarkar, B. Perumana, J. Papapolymerou, and E. Tentzeris, “Circuit and module challenges for 60 GHz Gb/s radio,” IEEE Wireless Commun. Appl. Comput. Electromagn., pp. 447–450, 2005. [3] D. Liu and Y. P. Zhang, “Integration of array antennas in chip package for 60-Ghz radios,” Proc. IEEE, 2012, to be published. [4] D. C. Thompson, O. Tantot, H. Jallageas, G. E. Ponchak, M. M. Tentzeris, and J. Papapolymerou, “Characterization of liquid crystal polymer material and transmission lines on LCP substrates from 30–110 GHz,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 4, pp. 1343–1352, Apr. 2004. [5] M. M. Tentzeris, J. Laskar, J. Papapolymerou, S. Pinel, V. Palazzari, R. Li, G. DeJean, N. Papageorgiou, D. Thompson, R. Bairavasubramanian, S. Sarkar, and J.-H. Lee, “3-D-Integrated RF and millimeter-wave functions and modules using liquid crystal polymer (LCP) system-onpackage technology,” IEEE Trans. Adv. Packag., vol. 27, no. 2, pp. 332–340, May 2004. [6] S. Pinel, I. K. Kim, K. Yang, and J. Laskar, “60 GHz linearly and circularly polarized antenna arrays on liquid crystal polymer substrate,” in IEEE Eur. Microw. Conf., 2006, pp. 858–861. [7] D. G. Kam, D. Liu, A. Natarajan, S. Reynolds, and B. A. Floyd, “Lowcost antenna-in-package solutions for 60-GHz phased-array systems,” in IEEE 19th Electr. Perform. Electron. Packag. Syst. Conf., 2010, pp. 93–96. [8] J.-L. Kuo et al., “60-GHz four-element phased-array transmit/receive system-in-package using phase compensation techniques in 65-nm flipchip CMOS process,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 3, pp. 743–756, Mar. 2012. [9] S. Gong, H. Shen, and N. S. Barker, “A 60-GHz 2-bit switched-line phase shifter using SP4T RF-MEMS switches,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 4, pp. 894–900, Apr. 2011. [10] T. Ihara, T. Manabe, K. Iigusa, T. Kijima, Y. Murakami, and H. Iwasaki, “Switched four-sector beam antenna for indoor wireless LAN systems in the 60 GHz band,” in IEEE Millimeter Waves Top. Symp., 1997, pp. 115–118. [11] A. L. Amadjikpe, D. Choudhury, G. E. Ponchak, and J. Papapolymerou, “60-GHz switched-beam end-fire antenna module integrated with novel microstrip-to-slot transition,” in IEEE MTT-S Int. Microw. Symp. Dig., 2011, pp. 1–4. [12] L. Baggen, M. Bottcher, and M. Eube, “3D-Butler matrix topologies for phased arrays,” in IEEE Int. Electromagn. Adv. Appl. Conf., 2007, pp. 531–534. [13] C.-J. Chen and T.-H. Chu, “Design of a 60-GHz substrate integrated waveguide Butler matrix—A systematic approach,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 7, pp. 1724–1733, Jul. 2010. [14] K. Park, W. Choi, Y. Kim, K. Kim, and Y. Kwon, “A -band switched beam-forming network using absorptive SP4T switch integrated with 4 4 Butler matrix in 0.13- m CMOS,” in IEEE MTT-S Int. Microw. Symp. Dig., 2010, pp. 73–76. [15] C.-H. Tseng, C.-J. Chen, and T.-H. Chu, “A low-cost 60-GHz switched-beam patch antenna array with Butler matrix network,” IEEE Antennas Propag. Lett., vol. 7, pp. 432–435, 2008. [16] W. F. Moulder, W. Khalil, and J. Volakis, “60-GHz two-dimensionally scanning array employing wideband planar switched beam network,” IEEE Antennas Wireless Propag. Lett., vol. 9, pp. 818–821, 2010. [17] A. L. Amadjikpe, D. Choudhury, G. E. Ponchak, and J. Papapolymerou, “High gain quasi-Yagi planar antenna evaluation in platform material environment for 60 GHz wireless applications,” in IEEE MTT-S Int. Microw. Symp. Dig., 2009, pp. 385–388. [18] W. T. Khan, S. Bhattacharya, C. Patterson, G. E. Ponchak, and J. Papapolymerou, “Low cost 60 GHz RF front end transceiver integrated on organic substrate,” in IEEE MTT-S Int. Microw. Symp. Dig., 2011, pp. 1–4. [19] P. R. Grajek, B. Schoenlinner, and G. M. Rebeiz, “A 24-GHz high-gain Yagi–Uda antenna array,” IEEE Trans. Antennas Propag., vol. 52, no. 5, pp. 1257–1261, May 2004. [20] C. A. Balanis, Antenna Theory Analysis and Design, 2nd ed. New York: Wiley, 1997. [21] D. M. Pozar, Microwave Engineering, 3rd ed. Hoboken, NJ: Wiley, 2005. and noise figure of active array antennas,” IEEE Trans. [22] J. J. Lee, “ Antennas Propag., vol. 41, no. 2, pp. 241–244, Feb. 1993. of multielement receive antennas with [23] U. R. Kraft, “Gain and active beamforming networks,” IEEE Trans. Antennas Propag., vol. 48, no. 12, pp. 1818–1828, Dec. 2000.

This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination. PATTERSON et al.: 60-GHz ACTIVE RECEIVING SWITCHED-BEAM ANTENNA ARRAY

Chad E. Patterson (S’09–M’12) received the B.S. and M.S. degrees in electrical engineering from the Georgia Institute of Technology, Atlanta, in 2006 and 2008, respectively, and is currently working toward the Ph.D. degree at the Georgia Institute of Technology. He is currently a member of the Microwave Circuit Technology (MircTech) Group, Georgia Institute of Technology. His research is focused on the design, fabrication, and characterization of microwave/mm-wave passive components and packaging solutions for next-generation communication and radar antennas. Prior to joining the MircTech team, he was an Intern with the Army Research Laboratory, Adelphi, MD, where he was involved with high-frequency antenna design and automated antenna measurement systems. Mr. Patterson was the recipient of the 2012 IEEE Antennas and Propagation Society (AP-S) Harold A. Wheeler Applications Prize Paper Award. Wasif Tanveer Khan (S’10) received the B.Sc. degree in electrical engineering from the University of Engineering and Technology Lahore, Lahore, Pakistan, in 2005, the M.S. degree in electrical and computer engineering from the Georgia Institute of Technology, Atlanta, in 2010, and is currently working toward the Ph.D. degree at the Georgia Institute of Technology. From January 2006 to December 2008, he was a Lecturer with the National University of Computer and Emerging Sciences–FAST, Lahore, Pakistan. He is currently with the Microwave Circuit Technology Group, Georgia Institute of Technology. His areas of interests include mm-wave circuits and package design and phased-array antennas on organic substrates. Mr. Kahn has been the publications chair for four IEEE conferences: RWS, PAWR, WisNet, and BioWireleSS. He has also been a Technical Program Committee (TPC) member for RWS. He was the recipient of a Ph.D. Fulbright Scholarship. George E. Ponchak (S’82–M’83–SM’97–F’08) received the B.E.E. degree from Cleveland State University, Cleveland, in 1983, the M.S.E.E. degree from Case Western Reserve University, Cleveland, OH, in 1987, and the Ph.D. degree in electrical engineering from The University of Michigan at Ann Arbor, in 1997. In 1983, he joined the staff of the Communications, Instrumentation, and Controls Division, NASA Glenn Research Center, Cleveland, OH, where he is currently a Senior Research Engineer. From 1997 to 1998 and 2000 to 2001, he was a Visiting Professor with Case Western Reserve University. He has authored or coauthored over 150 papers in refereed journals and symposia proceedings. His research interests include the development and characterization of microwave and mm-wave printed transmission lines and passive circuits, multilayer interconnects, integrated antennas, wireless sensors, Si and SiC RF ICs, and microwave packaging. Dr. Ponchak is an Associate Member of the European Microwave Association. He is the editor-in-chief of the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES. He was the editor-in-chief of the IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS (2006–2010). He was editor of a Special Issue of the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES on Si monolithic microwave integrated circuits (MMICs). He founded the IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems and was its chair in 1998, 2001, and 2006. He was the general chair of the 2011 IEEE Radio and Wireless Symposium. He was the Technical Program chair of the 2010 IEEE Radio and Wireless Symposium. He was chair of the Cleveland IEEE Microwave Theory and Techniques Society (MTT-S)/Antennas and Propagation Society (AP-S) Chapter (2004–2006). He has chaired many symposium workshops and special sessions. He is a member of the IEEE MTT-S International Microwave Symposium (IMS) Technical Program Review Committee on Transmission Line Elements and was its chair (2003–2005). He is a member of the IEEE MTT-S Technical Committee 12 on Microwave and Millimeter-Wave Packaging and Manufacturing. He served on the IEEE MTT-S Administrative Committee (AdCom) Membership Services Committee (2003–2005) and was elected to the IEEE MTT-S AdCom in 2010, where he currently chairs the Meetings and Symposia Committee. He was the recipient of the Best Paper of the ISHM’97 30th International Symposium on Microelectronics Award.

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Gary S. May (S’85–M’90–SM’97–F’06) received the B.S. degree in electrical engineering from the Georgia Institute of Technology, Atlanta, in 1985, and the M.S. and Ph.D. degrees in electrical engineering and computer science from the University of California at Berkeley, in 1987 and 1991, respectively. He is currently Dean of the College of Engineering, Georgia Institute of Technology. In that capacity, he was the Chief Academic Officer of the college and provides leadership to over 400 faculty members and nearly 12 000 students in the fourth ranked engineering program in the nation. Prior to his current appointment, he was the Steve W. Chaddick School Chair of the School of Electrical and Computer Engineering, Georgia Institute of Technology (2005–2011). He was a National Science Foundation (NSF) and an AT&T Bell Laboratories Graduate Fellow. He was a Member of the Technical Staff with AT&T Bell Laboratories, Murray Hill, NJ. His research is in the field of computer-aided manufacturing of ICs. His interests include semiconductor process and equipment modeling, process simulation and control, automated process and equipment diagnosis, and yield modeling. Dr. May is a Fellow of the American Association for the Advancement of Science. He is a member of the National Advisory Board of the National Society of Black Engineers (NSBE). He was editor-in-chief of the IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING (1997–2001). He was a National Science Foundation National Young Investigator (1993–1998). John Papapolymerou (S’90–M’99–SM’04–F’11) received the B.S.E.E. degree from the National Technical University of Athens, Athens, Greece, in 1993, and the M.S.E.E. and Ph.D. degrees from The University of Michigan at Ann Arbor, in 1994 and 1999, respectively. From 1999 to 2001, he was an Assistant Professor with the Department of Electrical and Computer Engineering, University of Arizona, Tucson. During the summers of 2000 and 2003 he was a Visiting Professor with The University of Limoges, Limoges, France. From 2001 to 2005 and 2005 to 2009, he was an Assistant Professor and Associate Professor, respectively, with the School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, where he is currently a Professor. He has authored or coauthored over 300 publications in peer-reviewed journals and conferences. He is an Associate Editor for The International Journal of Microwave and Wireless Technologies. His research interests include the implementation of micromachining techniques and MEMS devices in microwave, mm-wave, and terahertz circuits and the development of both passive and active planar circuits on semiconductor (Si/SiGe, GaAs) and organic substrates [LCP, low-temperature co-fired ceraminc (LTCC)] for system-on-a-chip (SOC)/system-on-a-package (SOP) RF front ends. Dr. Papapolymerou is currently an associate editor for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES. He was chair of Commission D, U.S. National Committee, URSI (2009–2011). He was also an associate editor for the IEEE MICROWAVE AND WIRELESS COMPONENT LETTERS (2004–2007) and the IEEE TRANSACTIONS ON ANTENNAS AND PROPAGATION (2004–2010). During 2004, he was the chair of the IEEE Microwave Theory and Techniques (MTT)/Antennas and Propagation (AP) Atlanta Chapter. He was the recipient of the 2012 IEEE Antennas and Propagation Society (AP-S) H. A. Wheeler Prize Paper Award, the 2010 IEEE AP-S John Kraus Antenna Award, the 2009 IEEE Microwave Theory and Techniques Society (IEEE MTT-S) Outstanding Young Engineer Award, the 2009 School of Electrical and Computer Engineering Outstanding Junior Faculty Award, the 2004 Army Research Office (ARO) Young Investigator Award, the 2002 National Science Foundation (NSF) CAREER Award, the Best Paper Award of the 3rd IEEE International Conference on Microwave and Millimeter-Wave Technology (ICMMT2002), Beijing, China, and the 1997 Outstanding Graduate Student Instructional Assistant Award presented by the American Society for Engineering Education (ASEE), The University of Michigan Chapter. His students have also been recipients of several awards including the Best Student Paper Award presented at the 2004 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, the 2007 IEEE MTT-S Graduate Fellowship, and the 2007/2008 and 2008/2009 IEEE MTT-S Undergraduate Scholarship/Fellowship.

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In Vitro Dosimetry and Temperature Evaluations of a Typical Millimeter-Wave Aperture-Field Exposure Setup Jianxun Zhao Abstract—Aperture-field exposure setups are applied in experiments detecting the effects of millimeter-wave (MMW) exposure on cells in vitro. In this paper, the studied exposure setup with standard components includes cells plated in a 35-mm Petri dish at the aperture of a horn irradiating 50.0-GHz MMW. Incorporating the subvoxel model and symmetry formulas, the finite-difference time-domain algorithm of the Maxwell equations and the finite-difference algorithm of the Pennes bioheat equation are used to calculate the specific absorption rate (SAR), absorption efficiency of the MMW power, and temperature rise in the cell culture. The numerical methods and models are supported by experimental measurement and theoretical analyses. The exposure of 31.2-mW MMW results in an averaged SAR of 44.9 W/kg in cells, quantitatively compatible with the International Commission on Non-Ionizing Radiation Protection limits to the incident power density. 46.9% of the MMW power is efficiently absorbed and accumulates a maximum temperature rise of 0.12 C in cells. The exposure intensity is selectable with acceptable homogeneity by proper cell sampling. The MMW multiple reflection of the aperture-field exposure is analyzed about its significant influences on the dosimetry and temperature results. Another comparison reveals the efficacious power matching of the Petri dish and its dosimetric contribution. The power threshold for time-unlimited exposures, time limits for high-power exposures, and adaptive air cooling are quantified to control the temperature variance within 0.1 C. This paper presents the first detailed quantification and characterization of the dosimetry and temperature environments for the MMW aperture-field exposure setup in application to in vitro experiments for over 30 years. Index Terms—Absorption efficiency, bioheat transfer, finite-difference time-domain (FDTD) method, millimeter-wave (MMW) exposure, specific absorption rate (SAR), temperature rise.

I. INTRODUCTION

E

FFECTS OF millimeter waves (MMWs) on biological systems have been studied for over three decades to quantify the biological reaction, reveal the reaction mechanism, and standardize the exposure safety. MMWs are characteristically absorbed in a short depth into biological tissues with skin depths usually less than 1.0 mm [1]. Therefore, the studies are chiefly Manuscript received November 24, 2011; revised August 06, 2012; accepted August 10, 2012. Date of publication September 07, 2012; date of current version October 29, 2012. This work was supported by the National Natural Science Foundation of China under Grant 30700148, the Fundamental Research Funds for the Central Universities under Grant JY10000902005, and the Natural Science Basic Research Plan in Shaanxi Province of China under Grant 2012JM8001. The author is with the Department of Biomedical Engineering, School of Electronic Engineering, Xidian University, Xi’an 710071, China (e-mail: [email protected]). Digital Object Identifier 10.1109/TMTT.2012.2213829

focused on thermal damages in the cornea and the skin, with respect to the energy deposition in the limited penetrating range [2]. Except for studies on MMW protection, there are also many representative reports on MMW effects in tissues other than the cornea and skin. MMWs are tested to be therapeutically effective for a variety of diseases, e.g., the immune system stimulation [3]. A study has demonstrated the suppression of cyclophosphamide-enhanced tumor metastases by 42.2-GHz MMW exposure [4]. 30.16-GHz MMW is proved to reverse the TPA-suppressed gap junction intercellular communication of HaCaT keratinocytes [5]. In the cell membrane exposed to 42.25-GHz MMW, people have observed reversible externalization of phosphatidylserine molecules [6]. These in vivo and in vitro studies indicate complicated reaction mechanisms between MMWs and biological systems. In vivo experiments help to find local and system reactions of the intact organism. in vitro experiment facilitates the observation of cellular and molecular reactions in isolated cells. Due to the model with individual features and the difficulty to measure dielectric parameters of biological tissues at the MMW frequency, the dosimetry of in vivo experiments is complicated and not easy for replication studies. in vitro dosimetry is relatively simple and suitable to be standardized for comparison. Quantification of the cell reaction to the MMW energy depends heavily on an accurate dosimetry, e.g., the measurement of the specific absorption rate (SAR) or the power flux density (PFD). In many standards on exposure safety, such as that in the International Commission on Non-Ionizing Radiation Protection (ICNIRP) guideline, SAR is used as the dosimetry quantity at frequencies below 30 GHz. At MMW frequencies, the exposure intensity is fundamentally quantified by the PFD of the incident wave, in view of the highly superficial power absorption. However, the PFD provides no direct measure of the power absorbed in cultured cells. The same PFD may result in different power absorption in cells with various dielectric properties, or in the same cells in different experimental conditions, such as those in Petri dishes or flasks of various shapes and sizes. Compared to the PFD, the SAR is more directly related to the cell reaction by giving the power absorbed physically in the elementary mass of exposed cells. Due to the inhomogeneous MMW energy deposition and the limited mass of the cell sample, in vitro experiments may use the sample-averaged SAR or the voxel-averaged SAR. The SAR distribution in cells is requested to be as homogeneous as possible to increase the amount of cells with the same reaction. In the sampling area, the accepted exposure homogeneity is no

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more than 30%, as measured by the standard deviation (SD) of the SAR distribution. The absorption efficiency of the MMW power is also essential to reduce the burden on the MMW source [7]. For experiments interested in nonthermal effects, the exposure-induced temperature rise less than 0.1 C should be secured [8]. In vitro experiments employ a variety of case-specifically designed MMW exposure setups that have not been authoritatively standardized. The far-field exposure setup uses an anechoic chamber to hold the cell sample at a distance away from the antenna [9]–[13]. The distance between the sample and antenna should guarantee a sufficiently uniform distribution of the PFD and the minimum wave refection between the two objects. In the near-field exposure setup, the cell sample is placed closer to the antenna, but separated from the aperture by several wavelengths [14], [15]. With the cell sample placed within one or two wavelengths from the aperture, the aperture-field exposure setup is able to establish an efficient exposure with high degrees of the SAR and temperature rise [16]–[19]. MMW dosimetry has been carried out at various levels for in vitro experiments. In previous studies on far-field exposure setups, we have analyzed the SAR distribution in single and multiple Petri dishes. The multiple reflection of the MMW between the dish and horn is proven to be very weak and neglected. The model of the Petri dish and the surrounding incident field are used in numerical simulations. With developed algorithms, we have considered the position, orientation, and power pattern of the horn to generate the incident field on six boundary planes enclosing the problem space [20], [21]. For small-size cell containers, such as the well of a culture plate, the far-field source can be a uniform plane wave with satisfactory accuracy of the SAR results [22]. For the near-field exposure setup, the dosimetry is based on exposure optimization by adjusting the distance between the cell container and the antenna aperture. The optimized exposure has the minimum deviations of the PFD and SAR distributions [23]. Dosimetry of the aperture-field exposure setup is very rare in the literature. Most work is limited to the evaluation of the incident field at the aperture of small-sized antennas and open-ended waveguides. However, for setups where the biological sample is placed in close proximity to the antenna, a strong MMW multiple reflection is produced between the sample and antenna. The multiple reflection results in a complicated field distribution in the antenna and at the aperture. The incident field of the unloaded antenna is insufficient for the precise dosimetric application. To numerically evaluate the SAR, absorption efficiency of the MMW power, and temperature rise of the aperture-field exposure setup, we need to model the entire sample-antenna complex and reproduce the multiple reflection. For experiments using MMW aperture-field exposure setups, we present in this paper an in-depth numerical quantification and characterization of the in vitro dosimetry and temperature environments. In contrast to previous studies interested in the PFD evaluation at the aperture of the horn antenna with the absence of the sample, we construct a complete model of a representative setup including the horn and the Petri dish for the SAR-based evaluations. The SAR is obtained at each point in the cell sample with a spatial resolution of 0.125 mm in

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Fig. 1. In vitro MMW aperture-field exposure setup consisting of the horn and Petri dish.

three dimensions. Based on the SAR distribution, the dosimetry statistics are calculated, including the mean SAR standing for the exposure intensity, the SAR SD for the exposure homogeneity, and the absorption efficiency of the MMW power, i.e., the exposure efficiency. The exposure-induced temperature rise in the cell culture is calculated to protect the observation of nonthermal cell responses. The analysis is based on the finite-difference time-domain (FDTD) method and the finite-difference algorithm of the Pennes bioheat equation with the convective boundary condition. By simulating scenarios with and without the MMW multiple reflection, a comparison is made to illustrate the effects of the multiple reflection on the SAR, absorption efficiency, and temperature rise. We use a multilayer model to analytically examine the influences of the Petri dish on the SAR and absorption efficiency. Based on the linear relation between the time-varying temperature rise in cells and the MMW power, the threshold of the incident power, time limits to the exposure duration, and adaptive air cooling are suggested to control the temperature environment. Numerical approaches of the study are validated with experimental measurement and theoretical analyses. The incident field at the horn aperture from the FDTD calculation is compared to that measured experimentally using the plane-wave spectrum of the MMW. The FDTD resolution of the cell culture is tested against the analytical results from the Mie and plane-wave propagation theories. The calculation of the temperature rise is examined by using data from the literature and analytical results from the heat transmission theory. II. METHODS AND MODELS A. Aperture-Field Exposure Setup Geometrical structure of the exposure setup is described in Fig. 1, as side views of the - and -plane cuts. The pyramidal horn antenna (ATM 19-443-6R) is designed for the -band between 40–60 GHz with a standard gain of 23 dBi. The feed is a 50.0-GHz wave from the WR-19 waveguide. At the aperture of the horn, the standard 35-mm-diameter Petri dish (Corning 430165) is mounted and filled with 2.48-mL culture medium covering the cell layer plated on the upper surface of the base panel. The exposure setup is placed in a forced air flow with controlled temperature.

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TABLE I MATERIAL DIELECTRIC PARAMETERS AT 50.0 GHz

Fig. 2. FDTD model of the Petri dish built by: (a) basic voxels with (b) the subvoxel consideration of the material position and the interface.

B. Dosimetry Evaluation We use the FDTD method to simulate the exposure [24]. The unsplit step formulation of the perfectly matched layer (PML) absorbing boundary conditions (ABCs) is incorporated in the developed FDTD program [25], [26]. Voxels of 0.125 mm in three dimensions are used to construct the objects, including the horn, Petri dish, cells, and culture medium. The voxel size is only 1/48 of the MMW wavelength in the air. Therefore, the conformal modeling of the horn is not necessarily applied. The voxel size is essential for the accuracy of the FDTD calculation. In cells and the culture medium, the wavelengths are 1.81 and 1.47 mm, respectively. The skin depths are even shorter, being 0.359 and 0.273 mm, respectively. For these highly dissipative materials, 0.125-mm voxels will be proven small enough to reduce the differential error to an acceptable level. Due to the available computer storage, voxels of smaller sizes are not considered. We have taken into account fine structures of the objects. The voxel model of the Petri dish, for example, is shown in Fig. 2(a). The meniscus surface of the culture medium is modeled by using the profile equation introduced by [27]. The height and decay width of the meniscus are measured to be 2.57 and 1.91 mm, respectively. To reduce the numerical dispersion and avoid the numerical reflection in the time–harmonic calculation, the subgrid model is not used. Instead, for voxels of uniform size, the subvoxel consideration helps to provide more accurate results, reducing the SAR error by 25% at the MMW frequency, as compared to conventional modeling technique that assumes the entire voxel

is filled with a certain kind of material [28]. As depicted in Fig. 2(b), the subvoxel is a cubic region within the voxel. The side length of the subvoxel is half that of the voxel. Electromagnetic properties of the filling material are given at six corners of the subvoxel by the FDTD definition. Therefore, the material is defined within the subvoxel. In the case that the neighboring two subvoxels refer to the same material, the gap between them is recognized as this material. If the subvoxels refer to different materials, the interface is in the middle of the gap. The subvoxel consideration contributes to the accuracy mostly in the area where the SAR value is sensitive to the material position, e.g., in the cell layer. The dielectric parameters of materials at 50.0 GHz are listed in Table I. The permittivity and conductivity of cells and those of the culture medium are calculated by using Debye’s dispersion equation. Debye’s parameters of the cornea and aqueous humor are used for the studied cells and culture medium [29], respectively. The permittivity and conductivity of the Petri dish, made of plastic, are obtained by the open resonator method [30]. The horn is gold-plated on the inside and treated as the perfect electric conductor. The mass density of cells is 1.05 10 kg m and that of the culture medium is 1.00 10 kg m [31]. The exposure setup and the MMW field are both symmetrical with respect to the - and -planes. To reduce the requirement on the computer storage and to improve the computation efficiency, we only calculate the field in 1/4 of the entire space divided by two symmetry planes, i.e., - and -planes, as shown in Fig. 3(a). Various algorithms have been developed to calculate the field on the boundary adjacent to the symmetry planes. The generally applied method is to extend the computational space over the -plane by , where is the voxel size. In each step of the FDTD calculation, tangential -field components are forced to zeros on the -plane that is parallel to the -field of the incident wave. Similarly, tangential -field components are zeroed over the -plane parallel to the incident -field [32]. In the subvoxel consideration, the - and -planes either cut through the center of the subvoxel or the center of the gap between neighboring subvoxels. The planes are either or from the parallel mesh layer of voxel edges. No field components are defined by the FDTD method on these symmetry planes. We have developed a symmetry algorithm compatible with the subvoxel model. Illustrated in Fig. 3(b) is the top view of the model where the symmetry planes cross each other. We use , , and to denote coordinates in -, -, and -directions, respectively, with being the unit length. The computational space goes over the -plane in the -direction. In the -direction, we extend the space over the -plane by .

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Fig. 4. Calculation of the SAR, absorbed power, and incident power with the use of: (a) field interpolation into the center of the subvoxel, (b) the cube enclosing the subvoxel, and (c) incident power density distributed in squares paving the aperture.

In the extended region on the left of the -plane, the tangential -fields are obtained by using the odd symmetry. For example, we have

Fig. 3. Application of the symmetry algorithm by using: (a) 1/4 of the original model cut by two symmetry planes and (b) -field interpolation across the planes.

(3) and

The incident field is polarized in the -direction. In the extended region below the -plane, the tangential -field components are calculated with respect to the even symmetry of the field. For example, we have

(4) (1) and

(2)

At the corner region in Fig. 3(b), the field components on the boundary are derived by applying both the even and odd symmetry conditions. The -field components from the FDTD calculation are interpolated to get the fields at the center of each subvoxel, where the SAR is calculated, as shown in Fig. 4(a). With the subvoxel consideration, the cube in Fig. 4(b) that encloses the subvoxel represents a complete speck of a certain power-absorbing material, i.e., the cells or the culture medium. The cube has the same size as the voxel, but is shifted by in -, -, and -directions. The power absorbed locally in the cube is obtained by multiplying the SAR, mass density of the filling material, and the volume of the cube. The power absorbed

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by all cells and that by the entire culture medium are obtained by summing up the locals. The incident power is calculated by adding up the power distributed on the aperture of the horn with the absence of the Petri dish. The aperture is modeled in Fig. 4(c) with 2-D subvoxels. The local incident power density is calculated at the center of each subvoxel by using fields interpolated from the FDTD results. Multiplying the power density by the area gives the power through the square that encloses the 2-D subvoxel. The final summation provides the total incident power across the aperture. Absorption efficiency is the ratio of the absorbed power to the incident power. All calculations about the SAR and absorption efficiency are performed in 1/4 of the setup. Results of the whole setup are derived by symmetrically projecting data to the rest of the space. C. Temperature Evaluation The exposure-induced temperature rise is simulated by using the Pennes bioheat equation [33]

TABLE II MATERIAL THERMAL PARAMETERS AT 37 C

The first-order finite-difference formulations of (5) and (6) are incorporated into a single numerical equation applicable to the internal and interface solutions. The same 0.125-mm voxel model is used to calculate the temperature rise with the SAR provided by the FDTD calculation. We use a symmetry algorithm similar to that in the FDTD application. Table II lists the thermal parameters of materials at 37 C including the plastic of the Petri dish [34]. The accuracy of the calculation is sensitive to the staircasing error at the curved surface, where the surface area is expanded by the voxel approximation. For compensation, the area expansion is evaluated for each voxel at the surface and the local convection coefficient is adjusted in inverse proportion. III. VALIDATION

(5) is the temperature at point and instant , where kg m is the mass density ( for blood), J kg C is the specific heat ( for blood), J s m C is the thermal conductivity, J s m is the absorbed MMW power density, J s m is the metabolic heat production, s is the rate of the blood perfusion, and C is the blood temperature. The left side of the equation stands for the power density associated with the temperature rise. The right side is the power density accumulation through different mechanisms, including the power density conducted internally from the surroundings, the power density injected externally by the MMW, the power density generated by the metabolism, and the power density reduced by the blood perfusion. The last two terms of the summation are neglected, with the understanding that the metabolic activity and the blood flow are either very weak or completely absent in the cell culture and Petri dish. The absorbed MMW power density is the only heating source. The temperature of the air surrounding the Petri dish is independent of the heating due to the rapid air exchange. Therefore, the simulation is only performed in the internal region, including the cell culture and Petri dish. At the interface between the internal region and the air-filled external region, we use the convective boundary condition based on the heat flux continuity across the interface (6) where is the internal point adjacent to the interface , is the unit normal vector on the interface pointing outward, and J s m C is the convection coefficient determined by two media on both sides, e.g., the culture medium and the air with the temperature of .

Experimental measurement and theoretical analyses are essential supports to the accuracy and precision of this numerical study. According to the complete procedure of the exposure, all methods and models are comparatively validated in the following three steps. Step 1) Field comparison based on the experimental measurement of the aperture field to validate the calculated field distribution over the space of the Petri dish. Step 2) Dosimetry comparison based on the analyses of the Mie theory and the plane wave propagation theory to validate the calculated SAR distribution in the cell culture. Step 3) Temperature comparison based on the analytical results from the literature and the heat transmission theory to validate the calculated temperature rise in the cell culture and Petri dish. A. Aperture Field An experimental measurement is performed to examine the FDTD-calculated aperture field of the MMW horn, in the space where the Petri dish is to be placed. To minimize the MMW multiple reflection between the horn and the -field probe, as well as to avoid the sharp field gradient across the probe, the measurement is based on the plane-wave spectrum solution to the wave propagation problem [35]. Programmable formulization of the solution is detailed in [36]. As illustrated in Fig. 5(a), a scan plane in the far-field region is set in front of the horn. An open-ended waveguide is used as the probe that detects the MMW signal on the plane with a sampling resolution of half the wavelength, i.e., 3 mm. The incident field excites the mode in the waveguide. The reading from the power meter is converted into the -field component parallel to the narrow edge of the waveguide. The measured -field on the scan plane is changed into the plane-wave

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Fig. 6. Comparison between the FDTD result and the measured result of the PFD ( ) at the horn aperture.

spectrum through the inverse fast Fourier transform (FFT). An FFT process uses the spectrum and reestablishes the field at the aperture of the horn. The developed measurement setup is photographed in Fig. 5(b). In the operation, the probe is held still while the horn moves horizontally in two dimensions by using a computer-controlled cross slide. The accuracy of the horizontal position is 0.2 mm. The -field data are recorded in real time during the automatic measurement, with 16 samples to be averaged at each position. Fig. 6 shows the PFD of the aperture field. The measured result complies well with the FDTD result, although the measurement has neglected the evanescent waves.

the meniscus near the wall of the Petri dish, where the SAR is sensitive to the local geometry of the culture medium. A second scenario uses a half-space of cells instead of the sphere to approximate the exposure at the base panel of the Petri dish. Fig. 7 gives the SAR distributions along the routes of the wave propagation through the sphere and the half-space. The results of the FDTD program comply with those of the theoretical Mie solution and plane-wave propagation solution [37]. In both scenarios, we also made a comparison between the FDTD result from the subvoxel model and that from the conventional voxel model. As expected, the subvoxel model contributes effectively to the error reduction. This is also reflected by the SAR statistical data listed in Table III, where the relative errors of the maximum SAR and mean SAR from the subvoxel model are evidently much smaller than those from the voxel model.

B. SAR Solution

C. Temperature Solution

To examine the developed FDTD program and to test the applicability of the 0.125-mm voxels, we consider a scenario where a 5-mm-diameter sphere of culture medium is exposed to the 50.0-GHz MMW. The -field of the incident plane wave is 1.0 V/m. The selected curvature of the sphere is similar to

The bioheat program is examined by making use of a 10-cm-diameter muscle-cylinder model, the same as that used in [38]. To study the exposure-induced temperature rise, the muscle-cylinder is exposed to a 2.45-GHz plane wave polarized along the axis. The incident power density is 100 mW cm .

Fig. 5. (a) Measurement of the aperture field by the field detection on the scan plane and FFT transforms. (b) Photograph of the measurement setup.

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TABLE III COMPARISON OF THE SAR STATISTICS BETWEEN THE FDTD AND THEORETICAL RESULTS

IV. BASIC RESULTS OF THE SETUP A. SAR and Efficiency

Fig. 7. Comparison between the FDTD results and the theoretical results of the SAR along the wave propagation routes through: (a) the sphere of culture medium and (b) the half-space of cells.

The 2-D problem of SAR calculation is solved by the 3-D FDTD program with due adjustments. Four PML boundary blocks are used to enclose the problem space. On the other two boundary meshes perpendicular to the cylinder axis, the -field components take the same values as the corresponding components on the inside mesh. With the SAR, the temperature distribution in the cylinder is calculated. Data are recorded at the beginning and the end of a 15-min exposure. In Fig. 8(a), the numerical results of the bioheat program are in good agreement with the analytical results. A second examination on the bioheat program is performed by using a plate with thermal properties of the culture medium and the plastic of the Petri dish, respectively. The thickness of the plate is 2.25 mm, which is selected according to the depth of the culture medium. The SAR of 1.0 W/kg is assumed to be uniformly distributed in the plate. The stabilized temperature rises from the center of the plate are calculated and the numerical results agree well with the analytical results from the heat transmission theory, as shown in Fig. 8(b).

Fig. 9(a) is the presentation of the PFD on - and -plane cuts during the exposure. Sequenced from top to bottom, the snapshots are taken at six different instants in a complete MMW cycle. Most of the incident power goes through the Petri dish into the cell culture, contributing to the SAR deposition in cells and culture medium. Some of the incident power leaks through the gap between the Petri dish and horn plates. A small portion of the escaped power goes back into the cell culture from the side and the top, making limited contribution to the SAR accumulation chiefly in the culture medium. Fig. 9(b) shows the PFD distributions at the same instants with the Petri dish removed. The comparison clearly demonstrates the influence of the cell culture and Petri dish on the power transmission across the aperture. Fig. 10(a) is the gray-scale image of the SAR distribution on the entire cell layer. The incident power is 31.2 mW. It is observed that cells in the Petri dish are treated by the MMW with considerable inhomogeneity. The SAR is the strongest at the central area, whereas the exposure intensity decreases with the cell position approaching the border. On the cell layer, the SAR varies between 93.8–8.36 W/kg. The mean SAR and SAR SD are 44.9 W/kg and 47.1%, respectively. The SAR decreases significantly as the MMW propogates into the cell culture, as shown in Fig. 10(b) with SAR images on - and -plane cuts. The ICNIRP standard restricts the incident MMW power density to 1 mW cm and 5 mW cm for public exposure and occupational exposure, respectively [39]. To derive the corresponding restrictions quantified by the SAR at 50.0 GHz with respect to the 0.125-mm voxel, we use a model where

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Fig. 9. PFD distributions on - and -plane cuts across the aperture at difin a MMW cycle: (a) with the Petri dish and (b) without ferent instants the dish.

Fig. 8. Comparison between the numerical results and the analytical results in the muscle cylinder and (b) the temperature of: (a) the temperature in the plates of the culture medium and Petri dish plastic. rises

cells are exposed to a normally incident plane wave, as illustrated in Fig. 11(a). The analytical solution of the half-space problem finds that 57.4% of the incident power transmits into cells and is absorbed gradually along the propagation route. Therefore, the MMW power density in cells starts at 0.574 and 2.87 mW cm in correspondence with the two ICNIRP restrictions, respectively. The power density decreases with a coefficient of 2.07 10 per 1 mm. On the surface, the voxel-averaged SAR is related to the size of the voxel, as shown in Fig. 11(b). It is found that 1 and 5 mW cm incident MMWs result in SARs of 16.9 and 84.3 W/kg, respectively, as averaged in the 0.125-mm voxel. Therefore, the studied setup, with 31.2-mW incident power, is able to recreate MMW exposures on cells in vitro with SAR levels dosimetrically covering the ICNIRP restrictions. Nearly half of the 31.2-mW incident power is absorbed by the cell culture, i.e., a total power absorption of 14.6 mW. The powers dissipated in cells and culture medium are 4.85 and 9.77 mW, accounting for 1/3 and 2/3 of the absorption,

Fig. 10. SAR distributions: (a) over the cell layer and (b) across -plane cuts in the cell culture.

- and

respectively. The total absorption efficiency of the cell culture is 46.9%. Those of cells and culture medium are 15.6% and 31.3%, respectively. At the aperture of the horn, the incident power concentrates on the center, with a theoretical squared cosine distribution across the -plane. Numerical integration of the distribution indicates that 84.9% of the incident power is covered by the base panel of the Petri dish. This explains the high exposure efficiency of the aperture-field exposure setup. B. Temperature Rise The time-varying temperature rise in the Petri dish induced by the MMW exposure is given in Fig. 12(a). The 50.0-GHz MMW has a very shallow penetrating range. Consequently, the heating due to the MMW power absorption happens chiefly in the cell layer at the bottom. The cell culture has a limited vertical dimension and the SAR distribution over the bottom is significantly inhomogeneous. Therefore, the distribution of the temperature rise, at any stage of the heating process, varies more

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of the 15-min exposure, the 31.2-mW MMW generates a maximum temperature rise over 0.1 C. The overheating happens for 12.2% of the cell population at the central area marked with the closed curve. C. Application Example

Fig. 11. MMW absorption in cells illustrated by: (a) power density distributions along the propagation route and (b) voxel-averaged SARs on the surface with respect to the voxel size.

To exclude possible heating-related cell reactions from the nonthermal effects, experimental sampling should avoid the region where the temperature rise is over 0.1 C. For the rest of the cells, the mean SAR is 39.6 W/kg and the SAR SD is 42.5%. Restricting the sampling area helps to improve the SAR homogeneity, with the additional benefit that a number of exposure intensities are available by choosing cells from specified areas. In Fig. 13, for example, we divide the cell layer into four sections. The mean SAR and SAR SD are given for each section, along with the histogram of voxel counts for 20 levels of the subdivided SAR. From the section at the center to the section on the border, the mean SARs are basically in the ratio of 4:3:2:1. The SAR SD in each section is reduced to well below 30%. The better exposure homogeneity is found as the section is nearer to the center. This is the combined result of the incident power and the Petri dish. The central region of the cell layer receives the incident power density with the highest homogeneity. Meanwhile, the distortion of the power density distribution by the Petri dish structure is the weakest in this region. The example of improving the SAR homogeneity by using cells in the restricted area is applicable to experiments with localized sample observation, such as the fluorescence imaging in a selected cell cluster by using a laser confocal scanning microscope, as that described in [40]. With precise position and orientation of the cell container, these experiments are capable to achieve results of cellular and molecular activities with rigorous point-to-point dosimetric quantification. The SAR distribution over the entire base panel has to be used for experiments with chemical analysis on all exposed cells washed off from the Petri dish. For the aperture-field exposure setup, the overall SAR inhomogeneity can be reduced in two basic ways. One is to improve the homogeneity of the incident power distributed in the area of the Petri dish by using a horn with a larger aperture or a compound box horn with mixed and waves [41]. Another way of partial solution is to use a cell container with a thinner base panel to minimize the SAR inhomogeneity caused by the MMW diffraction. A previous study on the in vitro dosimetry of a 50.0-GHz MMW far-field exposure has demonstrated the effective reduction of the exposure inhomogeneity by thinning the base panel [42]. V. EXTENDED ANALYSIS OF THE MMW APERTURE-FIELD EXPOSURE

Fig. 12. Temperature rise distributions: (a) across - and -plane cuts and (b) over the cell layer when stabilized with the overat different instants heated area marked.

obviously in the horizontal direction than in the vertical direction. The temperature rise is a slow process because of the thin layer effectively heated. The stabilized distribution of the temperature rise in the cell layer is shown in Fig. 12(b). At the end

Based on the results of the SAR, efficiency, and temperature rise, the quantification and characterization of the setup are extended about three topics related to the MMW aperture-field exposure. 1) The MMW multiple reflection features the setup. How much is its influence on the dosimetry and temperature rise? The experimental measurement of the PFD at the sample position is a conventional method to describe the

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Fig. 13. Division of the cell layer into sections (a)–(d) for different intensities and higher homogeneity of the exposure.

dosimetry. It is doubtful that the method is applicable with the existence of the multiple reflection. 2) The Petri dish exists between the incident MMW and the cell culture. To what extent does the Petri dish act upon the power transmission? The Petri dish may affect the SAR and efficiency more significantly than it does at lower frequencies such as 900 and 1800 MHz. 3) The exposure-induced heating is related to the incident power and duration of the MMW exposure. What is the relation between these factors and the maximum temperature rise in cells? Some experiments need time-unlimited or high-power MMW exposures. According to the relation, it is possible to set a power threshold for time-unlimited exposures and time limits for high-power exposures to control the temperature environment. A. Multiple Reflection of the MMW The base panel of the Petri dish covers 58.9% of the horn aperture so that a strong MMW multiple reflection is expected. To comparatively evaluate the effects of the multiple reflection on the results of SAR, efficiency, and temperature rise, we have completed another simulation to derive corresponding results without the multiple reflection. The first FDTD calculation is run to derive the incident -field at the aperture, with the Petri dish removed previously. On the FDTD mesh layer just below the Petri dish, the tangential -field components are recorded at 84 instants of one complete MMW cycle. A second FDTD calculation uses the recorded field with the presence of the Petri dish. The mesh layer below the Petri dish provides the soft source. In each FDTD step, the tangential -field components in the mesh layer are updated by adding the incident -field of the proper instant. Therefore, the incident field still works on the Petri dish although the horn is absent from the model. The reflected wave from the Petri dish goes through the soft source

and is finally absorbed in the PML boundary so the MMW multiple reflection is removed numerically. Fig. 14(a) compares the SAR distributions over a quarter of the cell layer between scenarios with and without the MMW multiple reflection. When the multiple reflection is absent, the SAR distribution features the incident MMW. The -field of the mode is almost constant in the -field direction and diminishes quickly to zero in the -field direction. In the Petri dish, the diffracted -fields with a similar strength distribution overlap and result in parallel ripples in the SAR image. In the scenario where the multiple reflection is present, the original mode MMW is added by a complex of reflected MMWs. The power density is disturbed so much that the ripples are barely observable. Table IV compares dosimetry results between the two scenarios, including SAR statistics in cells, the absorbed power with the absorption efficiency of cells, those of the culture medium, and the total cell culture. The MMW multiple reflection helps to increase the SAR intensity by over 24.0%, while slightly decreasing the SAR homogeneity by 1.5% absolute. Almost the same as the SAR variance, the power absorption and the absorption efficiency are improved by more than 23.7% in consequence of the multiple reflection. The MMW multiple reflection slightly changes the distribution pattern of the temperature rise on the cell layer, as shown in Fig. 14(b). Without the multiple reflection, the maximum temperature rise drops from 0.12 C to 0.09 C. The comparison reveals the significant interaction between the Petri dish and the horn in the aperture-field exposure setup. Experimental measurement of the PFD at the sample position provides original data of the incident MMW. For a far-field exposure setup where the multiple reflection is too weak to be considered, the incident MMW and the Petri dish geometry are enough for dosimetry description. For the aperture-field exposure setup, the measured incident MMW is not enough. An accurate numerical dosimetry depends on the simulation reestab-

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Fig. 15. Multilayer model representing the center of the base panel to formulize the MMW power transmission. TABLE V MATERIAL PARAMETERS FOR THE POWER TRANSMISSION OF THE 50.0-GHz MMW

Fig. 14. Effects of the MMW multiple reflection on the distributions of: (a) the over the cell layer. SAR and (b) the maximum temperature rise TABLE IV DOSIMETRY COMPARISON BETWEEN SCENARIOS WITH WITHOUT THE MMW MULTIPLE REFLECTION

AND

lishing the MMW multiple reflection, such as the FDTD analysis of the complete exposure setup including the MMW applicator. B. Power Matching of the Petri Dish The Petri dish is expected to considerably interfere with the MMW power transmission from the air into the cell culture. Since most of the power transmits through the base panel of the Petri dish, the base panel serves as a matching material between the air and the cell culture. At the center of the base panel, the power transmission can be analytically described by using a model of multiple layers and the normally incident plane MMW [43]. As illustrated in Fig. 15, the layers include the air, base panel, cells, and culture medium. We use the multilayer model to study the matching effects of the Petri dish on the SAR and efficiency.

Complex propagation constants and complex intrinsic impedances of involved materials, respectively, denoted as and , are calculated and listed in Table V. The thickness of the base panel, , varies between 0.25–1.75 mm to bring different matching effects. The cell layer has a fixed thickness: mm , the same as that used in the FDTD model. represents the -field of the incident MMW. The incident and reflected -fields in the cell layer are

and

(7)

(8)

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Fig. 16. Effects of the Petri dish on: (a) the SAR distribution through the cell layer, (b) the SAR distribution through the culture medium, (c) the absorption efficiency of cells, and (d) the absorption efficiency of the culture medium.

where is the depth into the cell layer measured from the interface between the base panel and cells. The incident -field in the culture medium is

(9) where is the depth into the culture medium from the cell–medium interface. In the culture medium, the incident MMW is totally absorbed so no reflected -field is considered. The -fields in (7)–(9) are used to calculate the SAR distribution along the MMW power transmission route. The absorption efficiency of the MMW power is derived from the SAR result. Fig. 16(a) and (b) displays SAR distributions through the cell layer and culture medium with reference to the thickness of the base panel. The calculation uses the same incident power of 31.2 mW, which corresponds to V m in view of the cosine distribution of the field across the horn aperture. Fig. 16(c) and (d) illustrates how the panel thickness influences

the MMW absorption efficiency of cells and that of the culture medium. The base panel has either positive or negative effects on the SAR and efficiency. Among the seven cases studied, where the panel thickness increases from 0.25 to 1.75 mm with a 0.25-mm interval, the thickness of 0.75 mm is associated with the highest SAR and efficiency. The lowest SAR and efficiency are found when the thickness is 1.75 mm. The findings apply to both cells and the culture medium. The SAR and efficiency generally vary from 6.10% to 36.5%, as compared to the results from the 1-mm base panel of the 35-mm Petri dish. To validate the multilayer algorithm and the analytical SAR results, we run a 1-D FDTD calculation using the same model to derive numerical SAR distributions for the case of the 1-mm base panel. In Fig. 16(a) and (b), good matches are found between the analytical data and the numerical data. The 35-mm Petri dish, with a 1-mm base panel, is generally helpful to the MMW power transmission. Petri dish of this dimension increases both the SAR and efficiency by 54.7%, as compared to the scenario where the cell culture is exposed without the dish. A detailed comparison is given in Table VI.

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TABLE VI DOSIMETRY COMPARISON BETWEEN EXPOSURES WITH AND WITHOUT THE PETRI DISH

Data of the dishless exposure are obtained by reducing the thickness of the base panel to zero. The analysis proves the importance of the Petri dish in the MMW dosimetry. At lower frequencies, the plastic thickness of the Petri dish is much smaller than the wavelengths inside it, e.g., 211 mm at 900 MHz and 105 mm at 1800 MHz. Such long wavelengths even permit the removal of the Petri dish from the numerical model, leaving only the shaped cell culture for a dosimetry with enough accuracy. At 50.0 GHz, the plastic thickness is comparable to the internal wavelength of 3.75 mm, leading to a significant matching effect of the Petri dish on the MMW dosimetry. C. Control of the Temperature Rise The bioheat equation indicates a continuous rising temperature in the cell culture induced by the absorption of MMW energy. At the beginning of the exposure, the temperature gradient in the cell culture is too small to produce strong internal thermal conduction and external heat convection. Thus, the temperature rise is related to the SAR by , as deduced from (5). The linear relation provides an experimental method to obtain the SAR via the temperature measurement in this period. However, due to the increasing heat convection from the cell culture to the air, the temperature rise will slow down gradually. Therefore, the temperature rise is in a nonlinear relation to the exposure duration. The exposure protocol requires necessary information on the temperature environment of the cell culture, such as the available period to measure the temperature rise for an accurate SAR evaluation and the critical instant when the temperature distribution becomes stable. We have obtained the temperature result from the 31.2-mW MMW exposure. Since the SAR is in direct proportion to the incident power, temperature results from MMW exposures with other incident powers can be calculated by using the SAR data proportionally converted. Fig. 17(a) presents the time-varying temperature rise in the cell culture, with reference to the incident power of the MMW. Since the temperature distribution is not homogeneous, only the maximum temperature rise at the center of the cell layer is recorded. In spite of the incident power, the temperature curves go up linearly for the beginning 20 s and tend to be stable at 420 s. The stabilized maximum temperature rise is in a good linear relation to the incident power with a slope of 3.76 10 C mW, as expected because of the constant thermal parameters of materials. The limit of 0.1 C corresponds to the power threshold of 26.6 mW. Any incident power below this threshold, such as 15.6

Fig. 17. (a) Maximum temperature rise in cells that varies with the exposure duration and the incident power. (b) Limits to the incident power and the exposure duration to prevent the maximum temperature rise from exceeding 0.1 C.

and 23.4 mW, can be freely used without the concern of overheat. Beyond 26.6 mW, the maximum temperature rise exceeds 0.1 C at various instants for different incident powers, as depicted by Fig. 17(b). To avoid possible cell reactions induced from overheat, time limits are suggested to restrict the duration of continuous exposure. The temperature control by setting the power threshold and time limits of the MMW exposure is performed on the premise of stabilized surrounding temperature of the air. Since the MMW heating happens at the superficial area of the cell culture, a forced cooling with adjustable air temperature is effective to restrict the temperature variance in cells. With the adaptive air cooling, the setup is applicable to nonthermal experiments using MMW exposures with the power and duration beyond the above threshold and time limits. For example, it is observed that the ratio of the stabilized temperature difference in cells to the incident power is 3.24 10 C mW. Therefore, an incident power up to 60.0 mW can be used and the difference will not exceed 0.2 C between the

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Fig. 18. Maximum and minimum temperature rises ( and ) in cells without forced cooling and the effect of adaptive air cooling on controlling the maximum temperature rise and maximum tempera. ture drop

maximum and minimum temperature rises in cells. If the middle temperature rise is forced at 0 C by air cooling, the maximum temperature rise will be no higher than 0.1 C. Meanwhile, the maximum temperature drop is no lower than 0.1 C. To perform the forced cooling, the adaptive air temperature is calculated by considering another ratio of 2.14 10 C mW between the original middle temperature rise and the incident power. This ratio and the 60.0-mW incident power give an air temperature adjustment of 0.13 C. In Fig. 18, the forced cooling is switched on and off with the 15-min MMW exposure, which begins at 1 min and ends at 16 min of the experiment timing. It is found that the temperature variance in cells is successfully controlled, as compared to the results without the adaptive air cooling. As mentioned above, the superficial heating and cooling lead to an effective temperature control, which is clearly shown in area 1 and area 2. At the beginning of the exposure and cooling, the curve of the maximum temperature drop goes up first due to the heating, but goes down quickly as the cooling penetrates the Petri dish. At the end of the exposure and cooling, the maximum temperature drop goes down for a little while since the heating stops and there is remaining heat loss into the Petri dish. The heat loss stops soon and the curve returns gradually to normal air temperature. VI. CONCLUSION This paper has quantified and characterized the dosimetry and temperature environments of a typical aperture-field exposure setup for experiments about MMW effects on cultured cells. Symmetry algorithms compatible with the subvoxel consideration have been developed to support the FDTD and bioheat

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calculations with all numerical methods and models examined for accuracy. The setup of standard components provides SAR in cells dosimetrically compatible with the ICNIRP limits to the power density of the incident MMW. The aperture-field exposure achieved an efficiency of power absorption close to 50%. The central area of the cell layer has the maximum temperature rise induced by the exposure. The exposure intensity and homogeneity are selectable with proper sampling while avoiding the overheated area, according to the distribution images of the SAR and temperature rise. The MMW multiple reflection leads to significant changes in the SAR, absorption efficiency, and temperature rise for the aperture-field exposure setup. The Petri dish is an effective matcher for the MMW power transmission with strong influences of the base panel on the SAR and absorption efficiency. To control the temperature rise, a power threshold for exposures unlimited in time and time limits for exposures with higher powers have been quantified. Adaptive air cooling is effective to expand the power threshold and time limits for nonthermal experiments. The dosimetry and temperature results can be extrapolated in direct proportion for incident powers other than 31.2 mW. The in vitro dosimetry and temperature environments are sensitive to the exposure condition when the MMW aperture-field exposure setup is applied. A case-specific study is essential for accurate dosimetric quantification and precise temperature control to support a high-quality experiment with reliable results. ACKNOWLEDGMENT The author would like to thank Prof. J. Li, Northwest Institute of Telecommunication Engineering, Xi’an, China, for his help with the experiment equipment. REFERENCES [1] E. R. Adair and R. C. Petersen, “Biological effects of radio-frequency/ microwave radiation,” IEEE Trans. Microw. Theory Techn., vol. 50, no. 3, pp. 953–962, Mar. 2002. [2] O. P. Gandhi and A. Riazi, “Absorption of millimeter waves by human beings and its biological implications,” IEEE Trans. Microw. Theory Techn., vol. 34, no. 2, pp. 228–235, Feb. 1986. [3] M. A. Rojavin and M. C. Ziskin, “Medical application of millimeter waves,” Quart. J. Med., vol. 91, pp. 57–66, Jan. 1998. [4] M. K. Logani, I. Szabo, V. Makar, A. Bhanushali, S. Alekseev, and M. C. Ziskin, “Effect of millimeter wave irradiation on tumor metastasis,” Bioelectromagnetics, vol. 27, pp. 258–264, 2006. [5] Q. Chen, Q. L. Zeng, D. Q. Lu, and H. Chiang, “Millimeter wave exposure reverses TPA suppression of gap junction intercellular communication in HaCaT human keratinocytes,” Bioelectromagnetics, vol. 25, pp. 1–4, 2004. [6] I. Szabo, J. Kappelmayer, S. I. Alekseev, and M. C. Ziskin, “Millimeter wave induced reversible externalization of phosphatidylserine molecules in cells exposed in vitro,” Bioelectromagnetics, vol. 27, pp. 233–244, 2006. [7] F. Schönborn, K. Poković, M. Burkhardt, and N. Kuster, “Basis for optimization of in vitro exposure apparatus for health hazard evaluations of mobile communications,” Bioelectromagnetics, vol. 22, pp. 547–559, 2001. [8] J. Schuderer, T. Samaras, W. Oesch, D. Spät, and N. Kuster, “High peak SAR exposure unit with tight exposure and environmental control for in vitro experiments at 1800 MHz,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 8, pp. 2057–2066, Aug. 2004. [9] C. L. Quément, C. N. Nicolaz, M. Zhadobov, F. Desmots, R. Sauleau, M. Aubry, D. Michel, and Y. L. Dréan, “Whole-genome expression analysis in primary human keratinocyte cell cultures exposed to 60 GHz radiation,” Bioelectromagnetics, vol. 33, pp. 147–158, Feb. 2012.

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[10] M. Zhadobov, C. N. Nicolaz, R. Sauleau, F. Desmots, D. Thouroude, D. Michel, and Y. L. Dréan, “Evaluation of the potential biological effects of the 60-GHz millimeter waves upon human cells,” IEEE Trans. Antennas Propag., vol. 57, no. 10, pp. 2949–2956, Oct. 2009. [11] C. N. Nicolaz, M. Zhadobov, F. Desmots, A. Ansart, R. Sauleau, D. Thouroude, D. Michel, and Y. L. Drean, “Study of narrow band millimeter-wave potential interactions with endoplasmic reticulum stress sensor genes,” Bioelectromagnetics, vol. 30, pp. 365–373, Jul. 2009. [12] M. Zhadobov, R. Sauleau, V. Vié, M. Himdi, L. L. Coq, and D. Thouroude, “Interactions between 60-GHz millimeter waves and artificial biological membranes: Dependence on radiation parameters,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 6, pp. 2534–2542, Jun. 2006. [13] V. G. Safronova, A. G. Gabdoulkhakova, and B. F. Santalov, “Immunomodulating action of low intensity millimeter waves on primed neutrophils,” Bioelectromagnetics, vol. 23, pp. 599–606, 2002. [14] S. I. Alekseev and M. C. Ziskin, “Local heating of human skin by millimeter waves: A kinetics study,” Bioelectromagnetics, vol. 24, pp. 571–581, 2003. [15] G. Yu, E. A. Coln, K. H. Schoenbach, M. Gellerman, P. Fox, L. Rec, S. J. Beebe, and S. Liu, “A study on biological effects of low-intensity millimeter waves,” IEEE Trans. Plasma Sci., vol. 30, no. 4, pp. 1489–1496, Aug. 2002. [16] A. G. Pakhomov, Y. Akyel, O. N. Pakhomova, B. E. Stuck, and M. R. Murphy, “Current state and implications of research on biological effects of millimeter waves: A review of the literature,” Bioelectromagnetics, vol. 19, pp. 393–413, 1998. [17] P. Gos, B. Eicher, J. Kohli, and W.-D. Heyer, “Extremely high frequency electromagnetic fields at low power density do not affect the division of exponential phase Sccharomyces cerevisiae cells,” Bioelectromagnetics, vol. 18, pp. 142–155, 1997. [18] E. P. Khizhnyak and M. C. Ziskin, “Heating patterns in biological tissue phantoms caused by millimeter wave electromagnetic irradiation,” IEEE Trans. Biomed. Eng., vol. 41, no. 9, pp. 865–873, Sep. 1994. [19] L. M. Partlow, L. G. Bush, L. J. Stensaas, D. W. Hill, A. Riazi, and O. P. Gandhi, “Effects of millimeter-wave radiation on monolayer cell cultures. I. Design and validation of a novel exposure system,” Bioelectromagnetics, vol. 2, pp. 123–149, 1981. [20] J. X. Zhao and Z. G. Wei, “Numerical dosimetry for cells cultured in Petri dishes exposed to a six-degree-freedom millimeter-wave radiator,” J. Electromagn. Waves Appl., vol. 19, pp. 1183–1197, Sep. 2005. [21] J. X. Zhao, “Numerical dosimetry for cells under millimetre-wave irradiation using Petri dish exposure set-ups,” Phys. Med. Biol., vol. 50, pp. 3405–3421, Jul. 2005. [22] M. Zhadobov, R. Sauleau, Y. L. Dréan, S. I. Alekseev, and M. C. Ziskin, “Numerical and experimental millimeter-wave dosimetry for in vitro experiments,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 12, pp. 2998–3007, Dec. 2008. [23] M. Zhadobov, R. Sauleau, R. Augustine, C. L. Quément, Y. L. Dréan, and D. Thouroude, “Near-field dosimetry for in vitro exposure of human cells at 60 GHz,” Bioelectromagnetics, vol. 33, pp. 55–64, Jan. 2012. [24] A. Taflove, Computational Electrodynamics: The Finite-Difference Time-Domain Method. Boston, MA: Artech House, 1995. [25] S. D. Gedney, “An anisotropic PML absorbing media for the FDTD simulation of fields in lossy and dispersive media,” Electromagnetics, vol. 16, pp. 399–415, Jul.–Aug. 1996. [26] G. Lazzi, O. P. Gandhi, and D. M. Sullivan, “Use of PML absorbing layers for the truncation of the head model in cellular telephone simulations,” IEEE Trans. Microw. Theory Techn., vol. 48, no. 11, pp. 2033–2039, Nov. 2000. [27] J. Schuderer and N. Kuster, “Effect of the meniscus at the solid/liquid interface on the SAR distribution in Petri dishes and flasks,” Bioelectromagnetics, vol. 24, pp. 103–108, 2003. [28] J. Zhao and Z. Wei, “Numerical modeling and dosimetry of the 35 mm Petri dish under 46 GHz millimeter wave exposure,” Bioelectromagnetics, vol. 26, pp. 481–488, 2005. [29] P. Bernardi, M. Cavagnaro, and S. Pisa, “Assessment of the potential risk for humans exposed to millimeter-wave wireless LANs: The power absorbed in the eye,” Wireless Netw., vol. 3, pp. 511–517, Nov. 1997.

[30] M. N. Afsar, “Dielectric measurements of millimeter-wave materials,” IEEE Trans. Microw. Theory Techn., vol. MTT-32, no. 12, pp. 1598–1609, Dec. 1984. [31] J. Y. Chen and O. P. Gandhi, “RF currents induced in an anatomicallybased model of a human for plane-wave exposures (20–100 MHz),” Health Phys., vol. 57, pp. 89–98, Jul. 1989. [32] M. Burkhardt, K. Poković, M. Gnos, T. Schmid, and N. Kuster, “Numerical and experimental dosimetry of Petri dish exposure setups,” Bioelectromagnetics, vol. 17, pp. 483–493, 1996. [33] A. K. Datta, Biological and Bioenvironmental Heat and Mass Transfer. New York: Marcel Dekker, 2002. [34] J. Schuderer, D. Spät, T. Samaras, W. Oesch, and N. Kuster, “In vitro exposure systems for RF exposures at 900 MHz,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 8, pp. 2067–2075, Aug. 2004. [35] A. W. Rudge, K. Milne, A. D. Olver, and P. Knight, The Handbook of Antenna Design: Volume I. London, U.K.: Peregrinus, 1982. [36] J. X. Zhao and J. X. Li, “Algorithm analysis of electromagnetic wave power density measurement for millimeter-wave irradiators in bioelectromagnetic experiments,” Int. J. Infrared Millim. Waves, vol. 24, pp. 909–928, Jun. 2003. [37] J. X. Zhao, “Numerical and analytical formulizations of the extended Mie theory for solving the sphere scattering problem,” J. Electromagn. Waves Appl., vol. 20, pp. 967–983, 2006. [38] P. Bernardi, M. Cavagnaro, S. Pisa, and E. Piuzzi, “SAR distribution and temperature increase in an anatomical model of the human eye exposed to the field radiated by the user antenna in a wireless LAN,” IEEE Trans. Microw. Theory Techn., vol. 46, no. 12, pp. 2074–2082, Dec. 1998. [39] “ICNIRP, guidelines for limiting exposure to time-varying electric, magnetic, and electromagnetic fields (up to 300 GHz),” Health Phys., vol. 74, pp. 494–522, Apr. 1998. [40] G. L. Hu, H. Chiang, Q. L. Zeng, and Y. D. Fu, “ELF magnetic field inhibits gap junctional intercellular communication and induces hyperphosphorylation of connexin43 in NIH3T3 cells,” Bioelectromagnetics, vol. 22, pp. 568–573, Dec. 2001. [41] R. C. Gupta and S. P. Singh, “Analysis of radiation patterns of compound box-horn antenna,” Progr. Electromagn. Res., vol. 76, pp. 31–44, 2007. [42] J. Zhao, “Improvement of MMW irradiation uniformity in culture dishes for experiments on MMW biological effects,” Microw. Opt. Technol. Lett., vol. 40, pp. 258–261, Feb. 2004. [43] A. Beneduci, “Evaluation of the potential in vitro antiproliferative effects of millimeter waves at some therapeutic frequencies on RPMI 7932 human skin malignant melanoma cells,” Cell Biochem. Biophys., vol. 55, pp. 25–32, Sep. 2009.

Jianxun Zhao received the B.S. degree in radio techniques from Xi’an Jiaotong University, Xi’an, China, in 1995, the M.S. degree in bioelectronics from Xidian University, Xi’an, China, in 1998, and the Ph.D. degree in radio physics from Shanghai University, Shanghai, China, in 2002. In 2002, he joined the School of Electronic Engineering, Xidian University, Xi’an, China, where he is currently a Professor with the Department of Biomedical Engineering, School of Electronic Engineering. He has authored or coauthored over 30 international journal and conference papers on bioelectromagnetics and six books concerning signal detection and estimation, electronics, and RF circuits. His research areas are electromagnetics and electronics, including software and hardware development for accurate and efficient time-domain computation, exposure apparatus for dosimetry study, and smart antenna systems for biomedical applications. Since 2007, he has been in charge of the national funded project “Research on the Experimental Dosimetry for in vitro Study on Effects of Electromagnetic Exposure.” Dr. Zhao is a senior member of the Biomedical Engineering Society of China.

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Passive Wireless Temperature Sensor Based on Time-Coded UWB Chipless RFID Tags David Girbau, Member, IEEE, Ángel Ramos, Antonio Lázaro, Member, IEEE, Sergi Rima, and Ramón Villarino Abstract—In this paper, an RF identification sensor system is developed. It comprises passive sensors and an ultra-wideband (UWB) reader. The sensors are based on time-coded chipless tags. They consist of an UWB antenna connected to a delay line that is, in turn, loaded with a resistive temperature sensor. This sensor modulates the amplitude of the backscattered signals as a function of the temperature. The sensor tags are identified by changing the length of the delay line. In this paper, the operation principle and design of time-coded tags is presented and the integration of sensors in these tags is addressed. In addition, two measurement techniques are compared to implement the UWB reader. The first one is based on frequency sweeping and uses a vector network analyzer. The second one is based on a low-cost UWB radar. A full characterization of the sensor system is provided. Index Terms—Chipless tag, RF identification ultra-wideband (UWB), wireless sensor network.

(RFID),

I. INTRODUCTION

T

HERE IS an increasing interest in designing compact wireless devices with the ability to sense physical parameters and collect information from the environment. In most cases, these wireless sensor devices are based on battery-powered active solutions, as for instance [1] and [2]. Active wireless sensors present a large coverage range and sensitivity, at the expense of requiring an external battery, which reduces their lifetime and restricts their size and cost. Similarly, there is also a considerable effort in the implementation of semipassive battery-free wireless sensors based on the use of power harvesting techniques to obtain the energy [3], [4]. On the other hand, completely passive battery-free wireless sensors are desirable in remote sensing applications where long-term environment controlling and monitoring take place. In addition, since they require neither wiring, nor batteries, they can be used in hazardous environments, such as contaminated areas, under concrete, in chemical or vacuum process chambers, and also in applications with moving or rotating parts. Although RF identification (RFID) was initially developed for identification in complex environments, basically for item inventory, a strong research to add sensing capabilities has been developed [5]. The aim is to obtain RFID sensor tags that add Manuscript received August 01, 2012; accepted August 06, 2012. Date of publication September 06, 2012; date of current version October 29, 2012. This work was supported by the Spanish Government under Project TEC2008-06758-C02-02 and Project TEC2011-28357-C02-01 (Ministerio de Ciencia e Innovación). The authors are with the Department of Electronic, Electrical and Automatic Control Engineering, Universitat Rovira i Virgili, 43007 Tarragona, Spain (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2213838

to their typical function of identification the key purpose of sensing. Although several solutions based on active RFID have been proposed, most of the research is focused on passive RFID tags, which are powered up by the reader’s RF signal (by using electromagnetic-scavenging techniques) [6]. Temperature sensors have already been integrated into the chip of traditional passive RFID tags, as it is illustrated in [7]–[10]. Chipless RFID sensor tags are an interesting alternative for passive wireless sensing. They consist of integrating a passive sensor into a chipless tag. Chipless RFID tags provide an identification code realized by nonchip-based means with physical permanent modifications in the tag that modulate the reader’s backscattered signal. For instance, frequency-domain chipless RFID encodes data into the spectrum using resonant structures. Each data bit is associated with the presence or absence of a resonance peak at a predetermined frequency [11]. Time-domain chipless RFID codes the information by placing a discontinuity after a section of a delay line [12], [13]. Nonprintable tags based on surface acoustic wave (SAW) technology have also been proposed [14], [15]. The most important disadvantages of chipless tags are: 1) shorter coverage range than active tags and 2) limited number of bits [16]. However, the integration of sensors in chipless tags, as well as the development of their reading systems, might result into a challenging and unique opportunity in several applications such as the ones addressed above. For instance, an identification sensor system platform at 915 MHz for passive chipless RFID sensor tags is proposed in [17] to sense ethylene gas concentration. A wireless temperature transducer based on micro-bimorph cantilevers and split-ring resonators at 30 GHz is presented in [18]. Passive wireless pressure micromachined sensors are proposed in [19] and [20]. Chipless RFID sensor tags where the identification code generation is realized using SAW devices have also been addressed in a number of studies; three examples of temperature sensors based on SAW technology are proposed in [21]–[23]. Since the Federal Communications Commission (FCC)’s allocation of ultra-wideband (UWB) spectrum in the 3.1–10.6-GHz range in 2002, UWB has gained interest in academia [24] and industry [25]. UWB has several advantages compared to traditional narrowband communication systems, such as high data rate and low average radiated power. UWB technology is also a promising solution for next-generation RFID systems to overcome most limitations of current narrowband RFID technology. A great interest has arisen in UWB active tags for their localization capability in indoor scenarios [26]. RFID readers based on low-cost UWB radars [27], [28] might be a promising solution for short-range (in the order of few meters) item tagging and sensor applications.

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Fig. 1. Schematic diagram of the sensor system based on chipless RFID tags and a UWB reader. Two different reader systems are shown, one based on the step-frequency technique and the other based on the impulse technique (the pulse at receiver, which contains the effects of the TX and RX antennas, and its spectrum, are also shown).

In the impulse technique, a Gaussian monocycle pulse is transmitted by the Geozondas GZ1120ME-35EV pulse generator. The monocycle pulse has a center frequency of 3.5 GHz (with 500-MHz bandwidth at 6 dB), an amplitude of 5 V, and a pulse repetition frequency (PRF) of 250 kHz. The signal reflected at the tag is measured with the Geozondas GZ6E sampler converter, which triggers the pulse generator. The pulse at the receiver, which contains the effect of the TX and RX antennas, and its spectrum, are also shown in Fig. 1. Since the mean energy of a UWB pulse is very low and the noise bandwidth of the sampler converter is very large, this method is sensitive to random noise. Noise influence can be diminished by increasing the PRF and the dot averaging (in this study, an average of 64 pulses is used). However, although the measurement error is larger in the impulse technique based on a UWB radar than in the step-frequency technique based on a VNA, this is a low-cost and portable solution to be used as the UWB RFID reader. B. Detection and Processing Techniques

In this paper a UWB RFID sensor system is presented. Two configurations are used as UWB readers, one based on the step-frequency technique and the other one based on a low-cost UWB radar. The wireless sensors are based on passive time-coded chipless tags. They consist of a resistive sensor that loads a scattering antenna. The sensor modulates the amplitude of the backscattered signal as a function of the temperature. This paper is organized as follows. Section II introduces the UWB RFID sensor system proposed, focusing on the reader configurations and tag detection techniques. Section III explains the basic operation theory of the sensor tag. Section IV presents the design of time-coded chipless tags and Section V introduces the temperature-sensor tag. Experimental results are presented in Section VI, and conclusions are drawn in Section VII. II. UWB RFID SENSOR SYSTEM A. System Configuration The developed system consists of passive chipless RFID sensor tags and a UWB reader, as shown in Fig. 1. Two methods are used in this paper to implement this reader: the step-frequency and the impulse techniques. These two methods are widely investigated by the authors in [29]. The readers are connected to two identical Vivaldi transmitter and receiver antennas with bandwidth of 1.4–8.8 GHz. In the step-frequency technique, a sine wave is frequency stepped or continuously swept over the band of interest (here it has been swept from 0.1 to 12 GHz) with a vector network analyzer (VNA) (here, the Agilent PNA E8364C). The time-domain response is obtained from the inverse Fourier transform of the scattering parameter . Sidelobes in the impulse response are suppressed by windowing the data before the transformation by means of a Hamming window. The most important advantage of the step-frequency technique is its excellent drift stability and random noise suppression because of the narrowband receivers. However, this is an expensive and slow measurement method, and the reader cannot be portable.

In order to detect the signal backscattered at the tags in the presence of noise, either with the step-frequency or the impulse technique, two processing techniques are used to remove clutter and cross-coupling from the transmitter to the receiver: background subtraction and time gating. Assuming that clutter and cross-coupling are stationary, their effect is reduced by subtracting the empty-room response (background, which contains the object where the sensor tag is placed) from the response in presence of the tag. Furthermore, by applying time gating, all contributions (reflections) that do not overlap in time with the tag response are ignored, such as cross-coupling between the transmitter and receiver antennas (see Fig. 1) [29]. Moreover, in order to increase the read range of the system, the continuous wavelet transform (CWT) is used as a detector of the received signal [13]. The benefit of using the CWT is that a template signal is not required in advance. This is especially necessary in the impulse technique based on a UWB radar since it is noisier than a VNA. It is well known that a matched filter optimizes the signal-to-noise ratio (SNR) if the noise is Gaussian. The CWT is applied to the Hilbert transform (envelope) of the received signal in a way that the coefficients of the CWT are the output of a matched filter or correlator. Here the received waveform is close to the second or third derivative of the transmitted Gaussian monocycle pulse due to the derivative effect of the antennas. A family of complex Gaussian wavelets is selected, where Gaussian-like shaped pulses and their third-order derivatives are used. III. OPERATION THEORY A. Principle of Operation Fig. 2 shows the basic operation principle of the sensor tag. When the pulse transmitted by the radar hits the tag, a portion is backscattered toward the receiver and a portion propagates inside the tag. The sensor tag can then be considered as a scattering antenna (an antenna terminated with a load impedance) with two scattering modes: the structural mode (first or early

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Fig. 2. Model for the chipless RFID sensor tag.

reflection) and the tag (or antenna) mode (second or late reflection). The structural mode is the scattering originated due to the antenna’s shape, material, and size. The tag mode is the part of the energy captured by the antenna that is re-radiated. The tag mode depends on the circuit connected to the antenna. This circuit is modeled as a reflection coefficient, . In the case of time-coded tags, an open-circuit-ended transmission line with an appropriated length is connected to the antenna, to achieve a maximum magnitude of (and hence, a maximum of the tag mode amplitude). A comprehensive formulation based on a circuit approach for modeling time-coded chipless tags has been proposed by the authors in [29]. In this study, the sensor is connected at the end of the transmission line and it modulates the magnitude of (and thus the amplitude of the tag mode) as a function of the temperature. Therefore, the tag can be identified from the delay between the structural and tag modes (by changing the length ) and temperature can be sensed from the amplitude of the tag mode. B. Theoretical Analysis The sensor tag is modeled as an equivalent two-port network (antenna) terminated with a transmission line of length and characteristic impedance , which is, in turn, loaded with the sensor impedance (see Fig. 2). Assuming that the RFID reader transmits a pulse , the backscattered signal received at the reader can be derived from the formulation proposed in [29] and approximated (assuming a resistive load) as

Fig. 3. (a) Simulated and measured for the designed tag. In the insets, photographs of the designed and manufactured tag: front face (left) and back face (right). (b) Simulated return loss to show the effects of the slot that separates the antenna and the delay line.

circuit). However, in the temperature-sensor tag presented in this study, is the temperature-dependent parameter, as will be explained in Section V. The ratio between the structural and tag modes can be used to remotely extract , which is temperature dependent and independent from the tag-to-reader distance. A short pulse must be used (which translates in a wide spectrum) to achieve the needed time resolution, in order to separate the two modes. In addition, the antennas and the sensor tag must not degrade the pulses. To this end, the antennas (either in the transmitter and receiver or at the sensor tag) must have a large bandwidth and a flat group delay to reduce pulse distortion. In addition, the use of UWB signals reduces the effects of multipath and avoids the presence of large fadings.

(1) where is the round-trip attenuation factor due to the propagation in free space, is the round-trip time delay between tag and reader, is the round-trip propagation delay along the transmission line (with propagation velocity ), is the inverse Fourier transform of , is the Dirac delta function, and denotes the convolution operator. The term is the response associated to the structural mode and is the response associated to the tag mode. is the reflection coefficient of the load connected at the end of the transmission line, . Since in time-coded tags the key information is coded in the parameter , the best method to obtain a maximum amplitude in the tag mode is to make (open circuit) or (short

IV. TIME-CODED TAG DESIGN A. Tag Design A time-coded chipless tag is designed in this section as a previous step to the design of passive UWB sensors. The tag is shown in the insets of Fig. 3(a). It is based on a broadband eccentric annular monopole antenna [30] connected to a delay line. The ground plane has significant effects on planar UWB monopole antenna properties. This is due to the fact that the ground plane introduces extra resonant modes, changes the current distribution, and hence, distorts the antenna performance. A negative impact on antenna performance is also obtained when connected to long delay lines with a meander shape. To solve these problems, two slots have been introduced between the antenna and ground plane [see dashed circles in the inset of Fig. 3(a)], similarly as done in [31] and [32]. These effects are

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Fig. 4. Measured time responses of four tags with different delays using the: (a) step-frequency technique and (b) the impulse technique.

shown in the simulated return loss of the tag in Fig. 3(b). Simulations are done with ADS Momentum. It can be observed that when the UWB antenna is fed with a thru line, the effect of the slots is not crucial. On the contrary, when there is a long meander-shaped delay line connected to the antenna, the slots become essential. When the slots are present, the delay line has a much smaller influence on the antenna performance. This permits to integrate large ground planes with monopole UWB antennas. The main advantage is that long delay lines with arbitrary shape can be connected to the antenna, and as a consequence, it permits to increase the number of bits that can be coded. This is the main difference of this tag in front of scattering antennas presented in the literature, which integrate short delays [12] or the delay is synthesized by means of a coaxial cable connected to the UWB antenna [13], [29]. The tag is manufactured on Rogers RO4003, its size is 10 cm 10.8 cm, and its simulated and measured is shown in Fig. 3(a). B. Tag Measurements Four tags with identical size, but with different delay line lengths mm are designed and fabricated. The delay lines are terminated with an open circuit. The left inset in Fig. 4(a) shows the four prototypes. Fig. 4(a) also shows the measured tag responses using the step-frequency technique. The responses using the impulse technique are shown in Fig. 4(b). In both measurement techniques, the CWT is applied, as described in Section II-B. The structural modes are identical for the four tags since their shape and size and the tag-reader distance are the same. The tag modes, which depend on the transmission line length , have a different delay with respect to their corresponding structural modes. The right inset in both Fig. 4(a) and (b) shows the zoomed tag modes.

Fig. 5. Measured time responses of three tags designed with a simulated delay difference of 50 ps between them to evaluate time resolution. Measured with the: (a) step-frequency technique and (b) impulse technique.

In the ideal case of an antenna with infinite bandwidth, and in (1) could be approximated by the Dirac delta function . In that situation, time resolution would only depend on the type of pulse. However, the finite time duration of structural and tag modes produces an increase in the received pulse duration and some shape distortion, thus reducing time resolution. This determines the minimum delay that can be coded and the number of data bits available. In order to measure this resolution experimentally, three tags with a simulated delay difference of 50 ps between them are fabricated. Fig. 5 shows their measured responses [measured with the step-frequency technique in Fig. 5(a) and with the impulse technique in Fig. 5(b)]. The right insets show the zoomed tag modes. From the timedifference measurements, it can be clearly seen that a 50-ps delay cannot be distinguished and a 100-ps delay can be distinguished with a measurement error under 13%. Taking this result into account and since tag sizes should be as small as possible, it is obvious that a large number of states are not feasible. Hence, this demonstrates that, although long delay lines have been integrated here in time-coded chipless RFID tags, this topology might be more suitable for wireless sensor applications (as shown below), rather than for traditional item tagging. V. TEMPERATURE SENSOR A. Resistive Sensor It has been introduced in Section III that the tag mode ampli. The amplitude depends on the reflection coefficient tude variations and the possibility of modulating them by means of a resistive sensor is shown in Fig. 6. In this figure, the measured time-domain signals when several surface-mount resistors (SMD, 0603) are soldered at the end of the tag transmission

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Fig. 6. Measured amplitude variations of the tag mode when soldering several SMD resistors at the end of the transmission line (resistance values from 50 to 680 , and an open-circuit, OC).

Fig. 7. Measured estimated resistance as a function of the real resistance.

line are presented. These measurements are done at a sensor-reader distance of 50 cm. The structural modes remain identical for all resistors. All the tag modes appear at the same time (the transmission-line length is constant) and their amplitudes depend on the value of the resistor. It can also be observed that the higher the resistance is with respect to the transmission line characteristic impedance , the lower the reflection coefficient variation for a given temperature change is. This saturation effect is expected since the tag mode amplitude depends directly on the reflection coefficient .

Fig. 8. Measured variation in the Vishay PTS 0805 (100 ) sensor reflection coefficient as a function of frequency and temperature and corresponding sensor impedance (bottom right inset). Calibration kit used to measure the sensor reflection coefficient (top left inset).

is an arbitrary known resistance and is the ideal (dc) reflection coefficient at . In order to minimize measurement errors, a value of that leads to a value of close to unity (open-circuit case) is chosen. In practice, a known high-value resistor can be used (here, , see Fig. 6). are the measured reflection coefficients associated to each load resistance, and are obtained from (2). Using the tag to structural mode ratios, the measurement of the reflection coefficient (and thus, the calibration) is theoretically independent from the tag-to-reader distance, as will be addressed in Section VI. Expression (2) predicts a linear model between for a given resistance and its load reflection coefficient. Finally, the estimated resistance is calculated as (3) is the load reflection coefficient computed where from the linear regression of as a function of . In this way, measurement errors are reduced. Fig. 7 shows the estimated resistance as a function of the real resistance. This result demonstrates the feasibility of integrating resistive sensors in time-coded chipless tags to remotely detect resistance changes. C. Temperature Sensor

B. Resistive Sensor Calibration The resistance value of the temperature sensor can be obtained from the measured ratio between the structural and tag modes . This ratio is obtained from the peak of the tag mode amplitude normalized with respect to the peak of the structural mode amplitude. Then a calibration technique similar to time-domain reflectometry (TDR) calibration is performed. Here it is applied to the results obtained in Section V-A (shown in Fig. 6). From (1), for a given load resistance can be expressed as

(2)

A Vishay positive temperature sensor (PTS) is used. The range of resistance values of the Vishay PTS Series (100 and 500 ) sensors1 are indicated in Fig. 6 for a temperature range from 0 C to 130 C for the 100- PTS and from 15 C to 95 C for the 500- PTS. It comes out that the 100- sensor is more suitable since its sensitivity to detect variations in the tag mode amplitude is larger. To characterize the PTS, it is connected as a load of a transmission line and it is measured from 0 to 4 GHz. A custom calibration kit is designed (see the top left inset in Fig. 8) to perform an open-short-load (OSL) calibration. The temperature is then increased from 30 C to 130 C in 5 C steps and the reflection coefficient is measured at each step. Fig. 8 shows the measured 1[Online].

Available: http://www.vishay.com/

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Fig. 9. 3-D image of the tag sensor and schematic of the calibration setup.

Fig. 11. (a) Tag mode amplitude variations measured with the impulse technique. (b) Ideal, measured, and estimated reflection coefficients as a function of the real resistance. (c) Estimated temperature as a function of the real temperature.

the variation is clearly detected. Therefore, the tag presented in Section IV is modified: its dimensions are scaled in order to decrease its operation frequency. The new sensor tag dimensions are 10 13.65 cm, and it is shown in Fig. 9. VI. MEASUREMENTS

Fig. 10. (a) Tag mode amplitude variations measured with the step-frequency technique. (b) Ideal, measured, and estimated reflection coefficients as a function of the real resistance. (c) Estimated temperature as a function of the real temperature.

reflection coefficient as a function of frequency for each temperature. The variation (and thus, the sensitivity) decreases when the frequency increases. However, for the 1–3.5-GHz range,

The sensor tag is measured in a typical environment (laboratory). All measurements from Figs. 10–15 are done with the tag on air, not attached to any material. The sensor tag is heated with an air flow coming from a heat gun up to the maximum temperature (130 C) and its response is measured while the tag cools down to room temperature. As shown in Fig. 9, the Vishay PTS (100 ) sensor is soldered at the end of the transmission line. A second identical sensor is placed side-by-side for calibration purposes. This second sensor is connected to an HP-34401A multimeter that measures its resistance, thus giving the real resistance of both sensors as a function of the temperature. The thermal gradient between the two sensors is assumed to be very small (they are very close to each other), and thus, it

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Fig. 14. Ratio between the measured structural and tag modes as a function of the sensor-reader azimuth angle (in 2 steps) for a sensor-reader distance of 50 cm. It is compared to the measured RTE (in 15 steps).

Fig. 12. Estimated sensor temperature as a function of the real temperature for sensor-reader distances of 50, 65, 75, and 100 cm: (a) using the calibration curve obtained at 50 cm and (b) using the calibration curve obtained at each distance.

Fig. 15. Sensing accuracy of the system. Histograms obtained from 300 measurements at a temperature of 28 C with a reader-sensor angle of 0 .

Fig. 13. Measured structural and tag modes as a function of the sensor-reader azimuth angle in 2 steps.

is also assumed that the temperature is the same at the two sensors. Measurements are done simultaneously from the sensor tag with the UWB reader and from the multimeter. Of course, this second sensor is not needed in real applications since a calibration curve would be already available. Each measurement has its own sensor tag response signal (measured remotely using UWB backscattering) and its associated measured calibration resistance (obtained from the calibration sensor with the multimeter). Fig. 10(a) shows the tag mode amplitude variations when temperature changes from 30 C to 130 C. These measurements are done using a VNA (step-frequency technique, see Section II and Fig. 1). As was expected, the tag mode amplitude increases with the temperature. Here the ideal reflection coefficient is calculated using the real resistance values obtained from the calibration sensor instead of using known theoretical values (as performed with the discrete SMD resistors in Section V-B). Since the impedance of the PTS at the operation frequency differs from dc and it

Fig. 16. Sensor temperature as a function of time when it is on air and attached to a large metal plate, to a particleboard plate, and to a PVC plate.

is not constant (see the bottom right inset in Fig. 8), the slope of the ideal reflection coefficient is empirically adjusted to compensate that the amplitude of the reflected pulse is proportional to the average resistance over the antenna frequency band. In order to take this into account, an average reflection coefficient is empirically obtained as , where . Now . The new estimated reflection coefficients and their corresponding estimated resistances can be calculated repeating the same procedure as in Section V-B. Fig. 10(b) shows the ideal , measured and estimated reflection coefficients as a function of the real resistance.

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TABLE I COMPARISON TO OTHER RFID TEMPERATURE-SENSING CIRCUITS AND SYSTEMS

Finally, the estimated temperature is obtained from using the curve given by the manufacturer: , where , , and . Fig. 10(c) shows the estimated temperature as a function of the real temperature (obtained from the calibration sensor) for a 50-cm tag-reader distance. The error bars at each point show the error with respect to the ideal case (when the estimated temperature equals the real temperature). An error under 0.6 C is obtained. Fig. 11 shows the same results as Fig. 10, but now the measurements are done with the impulse technique based on a UWB radar (presented in Section II, see Fig. 1). As addressed in Section II-A, since the impulse technique is nosier than the step-frequency technique, the error is higher. Now the error is under 3.5 C. Fig. 12(a) shows the estimated temperature as a function of the real temperature for sensor-reader distances of 50, 65, 75, and 100 cm and using the step-frequency technique. The ideal curve corresponds to identical estimated and real sensor temperatures. In all cases, calibration has been performed using the data at 50 cm. It can be observed that the error in the temperature measurement increases when the tag-reader distance moves away from 50 cm. Fig. 12(b) shows the same measurement, but now the calibration curve is obtained at each distance. It can be observed that the minimum error is at the last measured temperature due to the calibration process explained above. It can also be noted that the error is considerably reduced when calibrating at each distance. Therefore, in case we know the approximate distance between the reader and sensor, it is better to use a previously stored calibration curve for that distance in order to minimize the error. If not, a calibration curve for a generic different distance can be used [see Fig. 12(a)] at the expense of having larger error. In a real environment, once the reader is installed, a measurement of the background (scene without the sensor) must be done. The sensor can then be placed anywhere in the scene and temperature can be measured. The calibration parameters corresponding to the reader-sensor distance must be used in order to minimize measurement error.

Fig. 13 shows the measured structural and tag modes as a function of the sensor-reader azimuth angle in 2 steps. The sensor-reader distance is 50 cm. The transmission line has been loaded with an open circuit for this measurement so the tag mode amplitude is maximum. Each mode is normalized to its own maximum. The structural mode corresponds to the radar cross section (RCS) of the sensor tag and it depends on its shape, size, and material. The tag mode corresponds to the radiation pattern of the sensor tag since it depends on the radiation characteristics of the antenna. Fig. 14 shows the ratio between the structural and tag modes from Fig. 13 as a function of the sensor-reader azimuth angle (in 2 steps). It is compared to the measured relative temperature error (RTE) (measured in 15 steps). The RTE for a given angle is calculated from the mean relative error for each temperature at that angle: . It can be observed that the error increases when the ratio between the structural and tag modes decreases. The smallest errors appear for the highest ratios, at 30 , 150 , 210 , and 330 . For a 90 and 270 measurement angle, the error maximizes up to 37%, which means that the temperature cannot be detected correctly. This is due to the minimum radiation angles of the sensor, as seen in the angular variation of the tag mode in Fig. 13. However, for the remaining angles, the error is under 10%, demonstrating that the sensor can be successfully read for most sensor-reader angles. The sensing accuracy of the system is measured from a set of 300 measurements at a temperature of 28 C with a readersensor angle of 0 . Fig. 15 shows the histograms obtained using the step-frequency technique and the impulse technique. An error under 0.4 C has been obtained for 97% of the measurements using the step-frequency technique and for 85% of the measurements using the impulse technique. The response time of the sensor tag is evaluated by cooling the sensor from 130 C to 30 C. The sensor temperature is obtained as a function of the time. Fig. 16 compares the response time as a function of the material attached to the tag. Four cases are considered: tag on still air, on a large metal plate, on a par-

GIRBAU et al.: PASSIVE WIRELESS TEMPERATURE SENSOR

ticleboard plate, and on a PVC plate. Assuming a first-order model described by an exponential decay law similarly as done in [34], the response time of the sensor can be defined as the time required to reach 95% of the final reading: , where and are the instants when the temperature reaches C and C, respectively. The response times in s C of the sensor are shown in the inset of Fig. 16. These results show that the response time depends on the type or material (thermal conductor or insulator) and it is of order of 1–2.6 s C. A comparison to other RFID temperature-sensing circuits is shown in Table I in terms of technology, operation frequency, measured temperature range, sensing accuracy, response time, and power consumption. Three main topologies are compared: temperature sensors based on SAW technology, based on RFID (LF and UHF), and based on chipless UWB RFID (this study). VII. CONCLUSION In this paper, an RFID sensor system consisting of passive chipless sensor tags and an UWB reader has been presented. Two configurations have been presented as UWB readers. The first is based on frequency sweeping and uses a VNA. The second is based on a low-cost UWB radar. It has been shown that while the first (high-cost solution) has better performance than the second, the use of low-cost UWB radars is a feasible solution for wireless sensor applications. The detection and processing techniques that make this possible have been addressed. Time-coded tags based on a UWB scattering antenna loaded with a sensor-ended delay line have been proposed as fully passive low-cost wireless temperature sensors. It has been demonstrated that long delay lines can be integrated into UWB antennas with a 100-ps resolution. Temperature is obtained from the tag mode amplitude of the backscattered signals and the tag is identified by the delay of the line connected to the antenna. A complete characterization of the system and the sensor has been provided, demonstrating the feasibility of using UWB in passive backscattering-based sensor systems. An SMD PTS has been used in this study to detect temperature in the 30 C–130 C range. The sensor calibration procedure has also been explained. Using the readers proposed in this study, reliable measurements up to a distance of 1 m have been obtained. Larger transmitted power would permit even larger read ranges. A characterization of the system as a function of the angle between the reader and tag sensor has also been done. A good performance for all angles, except for the radiation nulls of the UWB antenna, is demonstrated. REFERENCES [1] R. Vykas, V. Lakafosis, A. Rida, N. Chaisilwattana, S. Travis, J. Pan, and M. M. Tentzeris, “Paper-based RFID-enabled wireless platforms for sensing applications,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 5, pp. 1370–1382, May 2009. [2] S. Veerasingam, S. Karodi, S. Shukla, and M. C. Yeleti, “Design of wireless sensor network node on Zigbee for temperature monitoring,” in Int. Adv. Comput., Control, Telecommun. Technol. Conf., 2009, pp. 20–23.

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[3] Z. Fan, R. X. Gao, and D. O. Kazmer, “Design of a self-energized wireless sensor for simultaneous pressure and temperature measurement,” in IEEE/ASME Int. Adv. Intell. Mechatron. Conf., 2010, pp. 1168–1173. [4] A. Georgiadis, A. Collado, S. Via, and C. Meneses, “Flexible hybrid solar/EM energy harvester for autonomous sensors,” in IEEE MTT-S Int. Microw. Symp. Dig., 2011, pp. 1–4. [5] S. Nyalamadugu, N. Soodini, M. Maddela, S. Nambi, and S. M. Wentworth, “Radio frequency identification sensors,” in Proc. ASEE Southeast Section Conf., 2004, pp. 1–9. [6] S. Capdevila, L. Jofre, J. C. Bolomey, and J. Romeu, “RFID multiprobe impedance-based sensors,” IEEE Trans. Instrum. Meas., vol. 59, no. 12, pp. 3093–3101, Dec. 2008. [7] J. Yin et al., “A system-on-chip EPC Gen-2 passive UHF RFID tag with embedded temperature sensor,” IEEE J. Solid-State Circuits, vol. 45, no. 11, pp. 2404–2420, Nov. 2010. [8] M. K. Law, A. Bermak, and H. C. Luong, “A sub- W embedded CMOS temperature sensor for RFID food monitoring application,” IEEE J. Solid-State Circuits, vol. 45, no. 6, pp. 1246–1255, Jun. 2010. [9] K. Opasjumruskit et al., “Self-powered wireless temperature sensors exploit RFID technology,” IEEE Pervas. Comput., vol. 5, no. 1, pp. 54–61, Jan. 2006. [10] A. P. Sample, D. J. Yeager, P. S. Powledge, A. V. Mamishev, and J. R. Smith, “Design of an RFID-based battery-free programmable sensing platform,” IEEE Trans. Instrum. Meas., vol. 57, no. 11, pp. 2608–2615, Nov. 2008. [11] S. Preradovic, I. Balbin, N. C. Karmakar, and G. F. Swiegers, “Multiresonator-based chipless RFID system for low-cost item tracking,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 5, pp. 1411–1419, May 2009. [12] S. Hu, Y. Zhou, C. L. Law, and W. Dou, “Study of a uniplanar monopole antenna for passive chipless UWB-RFID localization system,” IEEE Trans. Antennas Propag., vol. 58, no. 2, pp. 271–278, Feb. 2010. [13] A. Lazaro, A. Ramos, D. Girbau, and R. Villarino, “Chipless UWB RFID tag detection using continuous wavelet transform,” IEEE Antennas Wireless Propag. Lett., vol. 10, pp. 520–523, 2011. [14] V. P. Plessky and L. M. Reindl, “Review on SAW RFID tags,” IEEE Trans. Ultrason., Ferroelect., Freq. Control, vol. 57, no. 7, pp. 654–668, Mar. 2010. [15] S. Härmä, W. G. Arthur, C. S. Hartmann, R. G. Maev, and V. P. Plessky, “Inline SAW RFID tag using time position and phase encoding,” IEEE Trans. Ultrason., Ferroelect., Freq. Control, vol. 55, no. 8, pp. 1840–1846, Aug. 2008. [16] S. Preradovic and N. C. Karmakar, “Chipless RFID: Bar code for the future,” IEEE Microw. Mag., vol. 11, no. 7, pp. 87–97, Dec. 2010. [17] S. Shrestha, M. Balachandran, M. Agarwal, V. V. Phoha, and K. Varahramyan, “A chipless RFID sensor system for cyber centric monitoring a applications,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 5, pp. 1303–1309, May 2009. [18] T. T. Thai, J. M. Mehdi, H. Aubert, P. Pons, G. DeJean, M. M. Tentzeris, and R. Plana, “A novel passive wireless ultrasensitive RF temperature transducer for remote sensing,” in IEEE MTT-S Int. Microw. Symp. Dig., 2010, pp. 473–476. [19] M. M. Jatlaoui, F. Chebila, I. Gmati, P. Pons, and H. Aubert, “New electromagnetic transduction micro-sensor concept for passive wireless pressure monitoring application,” in 15th Int. Solid-State Sens., Actuators. Microsyst. Conf., Denver, CO, Jun. 2009, pp. 1742–1745. [20] M. A. Fonseca, J. M. English, M. V. Arx, and M. G. Allen, “Wireless micromachined ceramic pressure sensor for high-temperature applications,” IEEE J. Microelectromech. Syst., vol. 11, no. 4, pp. 337–343, Aug. 2002. [21] L. M. Reindl and I. M. Shrena, “Wireless measurement of temperature using surface acoustic waves sensors,” IEEE Trans. Ultrason., Ferroelect. Freq. Control, vol. 51, no. 11, pp. 1457–1463, Nov. 2004. [22] J. Dowling, M. M. Tentzeris, and N. Becket, “RFID-enabled temperature sensing devices: A major step forward for energy efficiency in home and industrial applications?,” in IEEE MTT-S Int. Microw. Workshop on Wireless Sens., Local Positioning, RFID, 2009, pp. 1–4. [23] K. Along, Z. Chenrui, Z. Luo, L. Xiaozheng, and H. Tao, “SAW RFID enabled multi-functional sensors for food safety applications,” in IEEE Int. RFID Technol. Appl. Conf., 2010, pp. 200–204. [24] A. Lazaro, D. Girbau, and R. Villarino, “Wavelet-based breast tumor localization technique using a UWB radar,” Progr. Electromagn. Res., vol. 98, pp. 75–95, 2009.

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[25] R. J. Fontana, “Recent system applications of short-pulse ultra-wideband (UWB) technology,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 9, pp. 2087–2104, Sep. 2004. [26] Z. Sahinoglu, S. Gezici, and I. Guvenc, Ultra-Wideband Positioning Systems. Cambridge, U.K.: Cambridge Univ. Press, 2008. [27] “Radar ICs,” Novelda, Kviteseid, Norway, 2012. [Online]. Available: http://www.novelda.no/content/radar-ics [28] “Ultra wideband measurement techniques,” Geozondas, Vilnius, Lithuania, 2011. [Online]. Available: http://www.geozondas.com/ [29] A. Ramos, A. Lazaro, D. Girbau, and R. Villarino, “Time-domain measurement of time-coded UWB chipless RFID tags,” Progr. Electromagn. Res., vol. 116, pp. 313–331, 2011. [30] Y. H. Suh and I. Park, “A broadband eccentric annular slot antenna,” in IEEE Int. Antennas Propag. Soc. Symp., 2001, vol. 1, pp. 94–97. [31] Y. Lu, Y. Huang, H. T. Chatta, and P. Cao, “Reducing ground-plane effects on UWB monopole antennas,” IEEE Antennas Wireless Propag. Lett., vol. 10, pp. 147–150, 2011. [32] Y. Lu, Y. Huang, H. T. Chatta, Y. C. Shen, and S. J. Boyes, “An elliptical UWB monopole antenna with reduced ground plane effects,” in Int. Antenna Technol. Workshop, 2010, pp. 1–4. [33] F. Zito, L. Fragomeni, F. Aquilino, and F. G. Della Corte, “Wireless temperature sensor integrated circuits with on-chip antennas,” in 15th IEEE Mediterranean Electrotech. Conf., 2010, pp. 1368–1373. [34] J. Virtanen, L. Ukkonen, T. Björninen, L. Sydänheimo, and A. Z. Elsherbeni, “Temperature sensor tag for passive UHF RFID systems,” in IEEE Sens. Appl. Symp., 2011, pp. 312–317. [35] W. Che et al., “A semi-passive UHF RFID tag with on-chip temperature sensor,” in IEEE Custom Integr. Circuits Conf., 2010, pp. 1–4.

Ángel Ramos received the B.S. degree in telecommunication engineering and M.S. degree in electronic engineering from the Universitat Rovira i Virgili (URV), Tarragona, Spain, in 2010 and 2011, respectively, and is currently working on the Ph.D. degree in electronics, electrics, and automatics engineering at the URV.

Antonio Lázaro (M’07) was born in Lleida, Spain, in 1971. He received the M.S. and Ph.D. degrees in telecommunication engineering from the Universitat Politècnica de Catalunya (UPC), Barcelona, Spain, in 1994 and 1998, respectively. He then joined the faculty of the UPC, where he taught a course on microwave circuits and antennas. In July 2004, he joined the Department of Electronic, Electrical and Automatic Control Engineering, Universitat Rovira i Virgili, Tarragona, Spain. His research interests are microwave device modeling, on-wafer noise measurements, monolithic microwave integrated circuits (MMICs), low phase-noise oscillators, microelectromechanical systems (MEMS), and microwave systems.

Sergi Rima received the B.S. degree in telecommunication engineering from the Universitat Rovira i Virgili (URV), Tarragona, Spain, in 2011. He is currently with the Department of Electronic, Electrical and Automatic Control Engineering, URV.

David Girbau (M’04) received the B.S. degree in telecommunication engineering, M.S. degree in electronics engineering, and Ph.D. degree in telecommunication from the Universitat Politècnica de Catalunya (UPC), Barcelona, Spain, in 1998, 2002 and 2006, respectively. From February 2001 to September 2007, he was a Research Assistant with the UPC. From September 2005 to September 2007, he was a Part-Time Assistant Professor with the Universitat Autònoma de Barcelona (UAB). Since October 2007, he has been a Full-Time Professor with the Universitat Rovira i Virgili (URV), Tarragona, Spain. His research interests include microwave devices and systems, with emphasis on UWB, RFIDs, and RF microelectromechanical systems (RF-MEMS).

Ramón Villarino received the Telecommunications Technical Engineering degree from Ramon Llull University (URL), Barcelona, Spain, in 1994, the Senior Telecommunications Engineering degree from the Polytechnic University of Catalonia (UPC), Barcelona, Spain, in 2000, and the Ph.D. degree from the UPC in 2004. From 2005 to 2006, he was a Research Associate with the Technological Telecommunications Center of Catalonia (CTTC), Barcelona, Spain. From 2006 to 2008, he was with the Autonomous University of Catalonia (UAB), as a Researcher and Assistant Professor. Since January 2009, he has been a Full-Time Professor with the Universitat Rovira i Virgili (URV), Tarragona, Spain. His research activities are oriented toward radiometry, microwave devices, and systems, based on UWB, RFIDs, and frequency-selective structures using Metamaterials (MMs).

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Letters Corrections to “An Ultra-Broad-Band Reflection-Type Phase-Shifter MMIC With Series and Parallel LC Circuits”

TABLE I CIRCUIT ELEMENT VALUES

Mohammad Mahdi Honari, Rashid Mirzavand, and Abdolali Abdipour

The above paper [1] analyzed an ultra-broad-band reflection-type phase shifter. This phase shifter consists of a 3-dB hybrid coupler and a pair of reflective terminating circuits that switch two states of ideal circuits. The authors have extracted the circuit parallel and series as functions of center frequency elements of parallel and series and desired phase difference to obtain broadband characteristics. Two reflecting terminating circuit monolithic microwave integrated circuits (MMICs) with 90 and 180 phase shifts were designed and fabricated at the conclusion of [1]. We respectfully express what seems to be error in [1]. For circuit topology shown in [1, Fig. 2], the authors extracted circuit element values [1, eqs. (30)–(33)] to achieve broadband characteristics. These formulas are the most important part of [1], but they are incorrect. The , , , and are given by correct circuit elements

Fig. 1. Phase-difference performance of the 90 reflection-type circuits.

(1)

(2)

(3)

[1]. For example, Table I depicts all the parameters of a 90 reflective terminating circuit, calculated by [1, eqs. (30)–(33)] and (1)–(4) under , , the assumption of , and . As can be seen, the circuit #2 element values are very close to the presented values in [1, Sec. III-B]. Simulated scattering parameters of both circuits are presented in Fig. 1. The results confirm (1)–(4) thoroughly.

REFERENCES (4) It seems to be a typographical error in calculated element circuit values. Equations (1)–(4) are important because they are final results of

[1] K. Miyaguchi, M. Hieda, K. Nakahara, H. Kurusu, M. Nii, M. Kasahara, T. Takagi, and S. Urasaki, “An ultra-broad-band reflection-type circuits,” IEEE Trans. phase-shifter MMIC with series and parallel Microw. Theory Techn., vol. 49, no. 12, pp. 2446–2452, Dec. 2001.

Manuscript received March 21, 2012; accepted May 03, 2012. Date of publication September 04, 2012; date of current version October 29, 2012. M. M. Honari and A. Abdipour are with the Micro/Millimeter-Wave and Wireless Communication Research Laboratory, Radio Communications Center of Excellence, Electrical Engineering Department, Amirkabir University of Technology, Tehran, Iran (e-mail: [email protected]; [email protected]). R. Mirzavand is with the Institute of Communications Technology and Applied Electromagnetics, Amirkabir University of Technology, Tehran, Iran (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2213835

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1

Authors’ Reply to “Comments on Unique Extraction of Metamaterial Parameters Based on Kramers–Kronig Relationship” Zsolt Szabó, Gi-Ho Park, Ravi Hedge, and Er Ping Li Index Terms—Effective relations, metamaterials.

material

parameters,

Kramers–Kronig

Herein, we would like to address the comments of [1]. Our main objection is that the authors of [1] do not take into consideration that real metamaterials has finite unit cell size, and especially, the experimentally reported double-negative metamaterials has unit cells, which are not deep subwavelength. In case of metamaterials constructed from small resonators, the strength of the resonance decreases with the decrease in the unit cell size; hence, for deep sub-wavelength elements, the strength of the resonance is not strong enough to produce negative magnetic permeability. The double-negative metamaterials can support higher order modes at frequencies that are just slightly different than the frequency region where the double-negative behavior occurs. Therefore, special care must be taken when effective material parameters are extracted, and it is not sufficient to enforce the continuity of the refractive index obtained from transmission reflection measurements or calculations because we can extract erroneous effective material parameters for frequency regions where they do not even exist [3]. We argue that in [1], instead of examining a metamaterial structure with finite unit cell size, the authors essentially repeat the first example of [2], where a hypothetical metamaterial with assigned electric permittivity and magnetic permeability described by Drude and Lorentz models is considered. Our freely available code,1 which supplements [2] is producing correct results and allows us to retrieve the preassigned material parameters of [1]. In the following, we present the details of our effective material parameter retrieval procedure to determine the preassigned material parameters of [1]. The -parameters of Fig. 1 are calculated with [2, eqs. (1.a) and (1.b)] for the material parameters of [1] and slab thickness mm. To properly calculate the -parameters, the passivity and are enforced, where deconditions notes the real part of the wave impedance and the extinction coefficient is the imaginary part of the refractive index. These -parameters and the thickness of the slab are the inputs of the retrieval algorithm . The retrieved effective wave impedance of the metamaterial slab is presented in Fig. 2. The assumed material parameters of [1] produce a , which is different refractive index at infinite frequencies

Manuscript received August 23, 2012; accepted August 23, 2012. This work was supported by the A*STAR Singapore, Metamaterial Research Program under Grant 0821410039 and by the János Bolyai Research Fellowship of the Hungarian Academy of Sciences. Z. Szabó is with the Department of Broadband Infocommunication and the Electromagnetic Department, Budapest University of Technology and Economics, Budapest 1111, Hungary (e-mail: [email protected]). G.-H. Park, R. Hedge, and E. P. Li are with the Department of Electronics and Photonics, A*STAR-Institute of High Performance Computing, 138632 Singapore (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2216896 1[Online].

Available: http://effmetamatparam.sourceforge.net/

Fig. 1. of [1].

-parameters of the metamaterial slab with the preassigned parameters

from 1, therefore the Kramers–Kronig relation, which connects the real and imaginary parts of the refractive index is

Fig. 3(a) presents the imaginary part of the refractive index (the line marked with solid circles), the refractive index approximated with the Kramers–Kronig relation (the line with circle markers), and the unambiguously retrieved effective refractive index (the solid line). The insets zooms to the double-negative frequency interval of 9–11 GHz, where the refractive index follows several branches of the logarithmic function (plotted with dotted lines). The -parameters of Fig. 1 are calculated in 10 000 frequency points over the frequency range of 0–30 GHz, and it can be observed from Fig. 3(a) that the Kramers–Kronig integral, evaluated numerically with the trapeze rule of integration, can very accurately predict the effecover the tive refractive index. The variation of the branch number frequency range of interest is shown in Fig. 3(b). The electric permittivity and magnetic permeability, calculated from the retrieved wave impedance and refractive index, exactly match the assumed values of [1]. Despite the fact that our effective material parameter-extraction algorithm can very accurately retrieve the material parameters of [1], this example does not permit drawing conclusions regarding the behavior of real metamaterials with finite unit cells sizes as the split ring-wire metamaterial, which is considered in [2], to demonstrate the applicability and to show the limits of our effective parameter extraction procedure. As is discussed in [2], the discontinuity of the refractive index in

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Fig. 2. Retrieved effective wave impedance.

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Fig. 4. Absorptance of the split-ring resonator–wire metamaterial in function of frequency and the number of layers in the direction of propagation.

be affected by the accuracy of the Kramers–Kronig integration, which depends on the accuracy of the -parameters. The authors of [1] argue that the phase of the transmission coefficient of [2, Fig. 9(b)] is not correctly calculated; however, they do not present the results of their finding for this problem. In case of the seven-unit-cell thick metamaterial, before the first resonance at 10 GHz, the transmission is very small; therefore, the time domain electromagnetic field solvers or measurements fail to accurately predict the phase of the transmission coefficient, consequently prohibiting the accurate retrieval of the effective material parameters. The algorithm of [1] directly applied to the calculated or measured -parameters can fail because the branch to start with cannot be unambiguously decided. In Fig. 4, the absorptance in function of the number of metamaterial layers is presented. As can be observed, even only the one-unit-cell thick metamaterial has a second resonance between 20–25 GHz. This peak cannot be observed in the fitted result of [1] and our numerically calculated transmission-reflection parameters with the time-domain solver of CST Microwave Studio differ from the predictions of this fit. The material parameters extracted from the fitted data of [1] diverge, increasing the frequency, higher and higher branches contribute to make the refractive index a smooth function. Fig. 3. Calculated extinction coefficient , the refractive index obtained from the Kramers–Kronig approximation , and the unambiguously retrieved refractive index are presented in (a). The inset shows how the branches connect in the double-negative frequency region. The variation of the branch number over the frequency range of interest is shown in (b).

case of three-, five-, or seven-unit-cell thick metamaterial is interpreted as the upper limit of the effective medium theory because the guided wavelength before the discontinuity is becoming comparable with the size of the unit cell. The frequency where the discontinuity occurs can

REFERENCES [1] J. J. Barroso and U. C. Hasar, “Comments on ‘A unique extraction of metamaterial parameters based on Kramers–Kronig relationship’,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 6, pp. 1743–1744, Jun. 2012. [2] Z. Szabó, G. H. Park, R. Hedge, and E. P. Li, “A unique extraction of metamaterial parameters based on Kramers–Kronig relationship,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 10, pp. 2646–2653, Oct. 2010. [3] Z. Szabó and E. P. Li, “Effective material parameters of fishnet type metamaterials,” Pollack Period., pp. B:231–B:243, 2010.

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EDITORIAL BOARD Editor-in-Chief: GEORGE E. PONCHAK Associate Editors: H. ZIRATH, J.-S. RIEH, Q. XUE, L. ZHU, K. J. CHEN, M. YU, C.-W. TANG, N. S. BARKER, C. D. SARRIS, C. FUMEAUX, D. HEO, B. BAKKALOGLU, T.-S. HORNG, R. GOMEZ-GARCIA The following members reviewed papers during 2011

P. Aaen A. Abbaspour-Tamijani A. Abbosh D. Abbott A. Abdipour M. Abe M. Abegaonkar R. Abhari A. Abramowicz M. Acar L. Accatino R. Achar E. Ackerman J. Adam K. Agawa M. Ahmad H.-R. Ahn B. Ai M. Aikawa J. Aikio C. Aitchison M. Akaike T. Akin S. Aksoy I. Aksun A. Akyurtlu G. Ala L. Albasha A. Alexanian W. Ali-Ahmad F. Alimenti R. Allam K. Allen A. Alphones A. Alu A. Álvarez-Melcon A. Al-Zayed S. Amari H. Amasuga R. Amaya H. An D. Anagnostou M. Andersen K. Andersson M. Ando Y. Ando P. Andreani M. Andrés W. Andress K. Ang C. Angell I. Angelov Y. Antar G. Antonini H. Aoki V. Aparin F. Apollonio R. Araneo J. Archer F. Ares F. Ariaei T. Arima M. Armendariz L. Arnaut F. Arndt E. Artal H. Arthaber F. Aryanfar U. Arz M. Asai Y. Asano A. Asensio-Lopez K. Ashby H. Ashoka A. Atalar A. Atia S. Auster I. Awai A. Aydiner M. Ayza K. Azadet R. Azaro A. Babakhani P. Baccarelli M. Baginski I. Bahl S. Bajpai J. Baker-Jarvis B. Bakkaloglu M. Bakr A. Baladin C. Balanis S. Balasubramaniam J. Balbastre J. Ball P. Balsara Q. Balzano A. Banai S. Banba R. Bansal D. Barataud A. Barbosa F. Bardati I. Bardi J. Bardin A. Barel S. Barker F. Barnes J. Barr G. Bartolucci R. Bashirullan S. Bastioli A. Basu B. Bates R. Baxley Y. Bayram J.-B. Bégueret N. Behdad F. Belgacem H. Bell D. Belot J. Benedikt T. Berceli C. Berland M. Berroth G. Bertin E. Bertran A. Bessemoulin M. Beurden A. Bevilacqua A. Beyer M. Bialkowski

E. Biebl P. Bienstman S. Bila D. Blackham R. Blaikie M. Blank P. Blockley P. Blondy P. Blount D. Boccoli G. Boeck L. Boglione R. Boix G. Bonaguide F. Bonani G. Bonmassar O. Boos B. Borges V. Boria-Esbert O. Boric-Lubecke A. Borji S. Borm J. Bornemann W. Bosch R. Bosisio H. Boss G. Botta N. Boulejfen S. Boumaiza J. Bouny C. Boyd C. Bozler M. Bozzi R. Bradley D. Braess N. Braithwaite M. Brandolini G. Branner T. Brazil J. Breitbarth M. Bressan K. Breuer B. Bridges D. Bridges J. Brinkhoff E. Brown S. Brozovich E. Bryerton D. Budimir G. Burdge P. Burghignoli N. Buris C. C. Galup-Montoro B. Cabon P. Cabral L. Cabria C. Caloz C. Camacho-Peñalosa V. Camarchia E. Camargo R. Cameron M. Camiade C. Campbell M. Campovecchio F. Canavero A. Cangellaris A. Cantoni C. Cao F. Capolino F. Cappelluti G. Carchon J. Carmo K. Carr F. Carrez R. Carrillo-Ramirez P. Carro R. Carter N. Carvalho P. Casas R. Castello J. Catala M. Cavagnaro R. Caverly D. Cavigia J. Cazaux M. Celuch Z. Cendes D. Chadha M. Chae S. Chakraborty C. Chan C. Chang H. Chang K. Chang S. Chang T. Chang W. Chang E. Channabasappa H. Chapell W. Chappell C. Charles M. Chatras I. Chatterjee G. Chattopadhyay S. Chaudhuri S. Chebolu A. Cheldavi A. Chen C. Chen H. Chen J. Chen K. Chen M. Chen N. Chen S. Chen Y. Chen Z. Chen Z.-N. Chen H. Cheng K. Cheng M. Cheng Y. Cheng C. Cheon C. Chi M. Chia Y. Chiang J. Chiao A. Chin K. Chin H. Chiou Y. Chiou C. Chiu

H. Chiu A. Chizh C. Cho K. Cho T. Cho A. Choffrut C. Choi J. Choi W. Choi C. Chong M. Chongcheawchamnan C. Chou D. Choudhury E. Chow Y. Chow C. Christodoulou C. Christopoulos Q. Chu T. Chu H. Chuang M. Chuang Y. Chun S. Chung Y. Chung D. Chye A. Cidronali T. Cisco C. Cismaru O. Civi S. Clavijo M. Clénet D. Cogan P. Colantonio M. Cole J. Coleman J. Collantes R. Collin C. Collins B. Colpitts R. Compton G. Conciauro M. Condon D. Consonni A. Constanzo M. Converse K. Cools F. Cooray I. Corbella A. Costanzo S. Cotton C. Courtney G. Coutts J. Cowles J. Craninckx C. Crespo-Cadenas J. Cressler S. Cripps T. Crowe J. Cruz T. Cui E. Cullens T. Cunha W. Curtice J. Dabrowski W. Dai G. Dambrine P. Dankov F. Danneville I. Darwazeh A. Darwish N. Das M. Davidovich L. Davis D. Dawn J. Dawson H. Dayal F. De Flaviis D. De Zutter B. Deal A. Dearn J. Deen M. Dehan C. Dehollain C. Deibele G. Dejean M. DeLisio N. Deltimple S. Demir V. Demir J. Deng A. Dengi T. Denidni W. DeRaedt H. Deshpande Y. Deval R. Dey T. Dhaene L. Diaz A. Diaz-Morcillo L. Ding M. Dionigi C. Diskus A. Djordjevi T. Djordjevic J. Dobrowolski H. Dogan S. Donati X. Dong A. Dounavis P. Draxler R. Drayton A. Dreher J. Drewniak J. Duchamp A. Duffy L. Dunleavy J. Dunsmore S. Durden L. Dussopt C. Duvanaud J. East J. Ebel K. Eccleston I. Ederra R. Egri I. Ehrenberg N. Ehsan T. Eibert H. Eisele W. Eisenstadt G. Eleftheriades

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S. Islam M. Ito K. Itoh T. Itoh Y. Itoh A. Ittipiboon F. Ivanek D. Iverson M. Iwamoto D. Jablonski D. Jachowski C. Jackson D. Jackson R. Jackson A. Jacob K. Jacobs S. Jacobsen D. Jaeger J. Jaeger S. Jagannathan N. Jain G. James M. Janezic S. Jang M. Jankovic D. Jansen L. Jansson H. Jantunen H. Jardon-Aguilar J. Jargon N. Jarosik B. Jarry P. Jarry A. Jastrzebski B. Jemison W. Jemison S. Jeng A. Jenkins S. Jeon D. Jeong J. Jeong Y. Jeong A. Jerng T. Jerse T. Jiang X. Jiang G. Jianjun D. Jiao J. Jin J. M. Jin J. Joe T. Johnson B. Jokanovic U. Jordan K. Joshin J. Joubert S. Jung T. Kaho S. Kanamaluru K. Kanaya S. Kang P. Kangaslahti B. Kapilevich I. Karanasiou M. Karim T. Kataoka A. Katz R. Kaul R. Kaunisto T. Kawai S. Kawasaki M. Kazimierczuk L. Kempel P. Kenington P. Kennedy A. Kerr D. Kettle A. Khalil W. Khalil S. Khang A. Khanifar A. Khanna R. Khazaka J. Khoja S. Kiaei J. Kiang B. Kim C. Kim D. Kim H. Kim I. Kim J. Kim S. Kim T. Kim W. Kim N. Kinayman R. King N. Kinzie S. Kirchoefer A. Kirilenko M. Kishihara T. Kitazawa J. Kitchen T. Klapwijk E. Klumperink D. Klymyshyn L. Knockaert R. Knoechel M. Koch K. Koh N. Kolias J. Komiak A. Komijani G. Kompa A. Konanur A. Konczykowska H. Kondoh B. Kopp B. Kormanyos J. Korvink P. Kosmas Y. Kotsuka S. Koziel A. Kozyrev V. Krishnamurthy H. Krishnaswamy C. Krowne J. Krupka D. Kryger H. Ku H. Kubo A. Kucar A. Kucharski

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R. Mansour D. Manstretta J. Mao S. Mao F. Maradei A. Margomenos D. Markovic E. Márquez-Segura J. Martens F. Martin E. Martini K. Maruhashi J. Marzo D. Masotti A. Massa G. Massa F. Mastri J. Mateu A. Matsushima M. Mattes G. Matthaei K. Mayaram M. Mayer U. Mayer W. Mayer J. Mazeau S. Mazumder A. Mazzanti G. Mazzarella K. McCarthy G. McDonald I. McGregor M. McKinley J. McLean D. McQuiddy A. Mediano F. Medina M. Megahed I. Mehdi K. Mehrany A. Melcon R. Melville F. Mena D. Mencarelli C. Meng R. Menozzi W. Menzel P. Mercier B. Merkl F. Mesa R. Metaxas A. Metzger P. Meyer P. Mezzanotte E. Michielsen A. Mickelson D. Miller P. Millot J. Mingo F. Miranda D. Mirshekar A. Mirzaei S. Mitilineos R. Miyamoto K. Mizuno J. Modelski W. Moer M. Moghaddam A. Mohammadi S. Mohammadi A. Mohammadian P. Mohseni E. Moldovan M. Mollazadeh M. Mongiardo P. Monteiro J. Montejo-Garai G. Montoro J. Monzó-Cabrera J. Morente T. Morf D. Morgan M. Morgan A. Morini A. Morris J. Morsey A. Mortazawi M. Moussa M. Mrozowski Q. Mu J.-E. Mueller J. Muldavin K. Murata S.-S. Myoung M. Myslinski B. Nabet V. Nair K. Naishadham Y. Nakasha M. Nakatsugawa M. Nakhla J.-C. Nallatamby I. Nam S. Nam J. Nanzer T. Narhi A. Nashashibi A. Natarajan J. Nath A. Navarrini J. Navarro J. Nebus R. Negra J. Neilson B. Nelson P. Nepa A. Neri H. Newman G. Ng D. Ngo E. Ngoya C. Nguyen E. Nicol A. Nicolet S. Nicolson E. Niehenke M. Nielsen K. Nikita P. Nikitin N. Nikolova M. Nisenoff K. Nishikawa T. Nishino

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