IEEE MTT-V053-I03B (2005-03) [53, 3B ed.]

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MARCH 2005

VOLUME 53

NUMBER 3

IETMAB

(ISSN 0018-9480)

PART II OF TWO PARTS

SPECIAL ISSUE ON MULTIFUNCTIONAL RF SYSTEMS Guest Editorial . . . . . . . . . . . . . . . . . . . . . . . . . E. D. Adler, M. C. Calcatera, J.-F. Luy, W. D. Palmer, and D. S. Purdy

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PAPERS

The Advanced Multifunction RF Concept . . . . . . . . . . . . . . . . . . . . . . . . . . . G. C. Tavik, C. L. Hilterbrick, J. B. Evins, J. J. Alter, J. G. Crnkovich, Jr., J. W. de Graaf, W. Habicht II, G. P. Hrin, S. A. Lessin, D. C. Wu, and S. M. Hagewood Multifunction Millimeter-Wave Systems for Armored Vehicle Application. . . . . . . . . . . . . . . . . . . . . . . . J. H. Wehling Toward Multistandard Mobile Terminals—Fully Integrated Receivers Requirements and Architectures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M. Brandolini, P. Rossi, D. Manstretta, and F. Svelto The Six-Port as a Communications Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T. Hentschel A Dual-Band RF Transceiver for Multistandard WLAN Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S.-F. R. Chang, W.-L. Chen, S.-C. Chang, C.-K. Tu, C.-L. Wei, C.-H. Chien, C.-H. Tsai, J. Chen, and A. Chen Signal Path Optimization in Software-Defined Radio Systems . . . P. Rykaczewski, D. Pieñkowski, R. Circa, and B. Steinke High-Band Digital Preprocessor (HBDP) for the AMRFC Test-Bed . . . . . . . . . . . . . . . . . . . . . . . . . . . . S. Mazumder, J.-P. Durand, S. L. Meyer, W. D. Weaver, J. V. Traverse, C. A. Rynas, G. E. Allshouse, J. E. Toland, Jr., and J. P. Biondi Comprehensive Digital Correction of Mismatch Errors for a 400-Msamples/s 80-dB SFDR Time-Interleaved Analog-to-Digital Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M. Seo, M. J. W. Rodwell, and U. Madhow Integrated Antenna/Power Combiner for LINC Radio Transmitters . . . . . . . . . . . . . . . . . . . . . . S. Gao and P. Gardner An Intelligently Controlled RF Power Amplifier With a Reconfigurable MEMS-Varactor Tuner . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D. Qiao, R. Molfino, S. M. Lardizabal, B. Pillans, P. M. Asbeck, and G. Jerinic Linearity of -Band Class-E Power Amplifiers in EER Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .N. Wang, X. Peng, V. Yousefzadeh, D. Maksimovic´, S. Pajic´, and Z. Popovic´ A Differential 4-bit 6.5–10-GHz RF MEMS Tunable Filter . . . . . . . . . . . . . . . . . . . . . . . .K. Entesari and G. M. Rebeiz A Reconfigurable Bandpass Filter for RF/Microwave Multifunctional Systems. . . . . . . W. M. Fathelbab and M. B. Steer Information for Authors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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Guest Editorial

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HAT IS a multifunctional RF system? In the world today, we see many systems that have multiple functions: your combination personal digital assistant (PDA), cellular phone, and digital camera, the wireless color printer you just bought that also serves as a copier, fax machine, and scanner, and your hiking buddy’s handheld radio with integrated global positioning system (GPS). Are these multifunctional RF systems? This TRANSACTIONS’ Special Issue would make the argument that they are not. The distinguishing feature of each of the systems mentioned above is that the separate functions are performed by separate hardware subsystems, i.e., although the device is capable of performing multiple functions, there is no single architecture capable of performing all of these functions. The goal in a true multifunctional RF system is to be able to reconfigure a single signal path so that it is capable of performing multiple arbitrary RF functions. For a commercial wireless system, this might be one radio capable of voice and data communications over several communication bands or a combined automotive radar and data link. For a military platform, it could be one system capable of handling communications, sensing (radar), navigation, and battlefield identification. This capability places extreme performance requirements on the individual components, architecture, and resource management of such a system. The antenna must be capable of transmitting and receiving signals efficiently over a wide frequency bandwidth. The receiver and transmitter circuitry will rely heavily on direct sampling and direct digital synthesis (DDS), requiring ADCs and DACs with very high sampling rates and dynamic range. Given the new spectrum of capabilities in arbitrary waveform synthesis, high-speed analog-to-digital conversion, and field programmable processing, it is now becoming possible to create such a system. Numerous commercial companies are pursuing research and product development in this area. High-speed semiconductor technologies are expected to play an important role: The availability of digital circuits with clock frequencies beyond 10 GHz will influence the architecture of multifunctional RF systems. The U.S. military has initiatives for Army ground vehicles (the Future Combat Systems), Navy ships (the Advanced Multifunction RF Concept (AMRFC) Program), and Air Force unmanned aerial vehicles (the “Sensorcraft” concept). One clear commercial application for multifunctional RF systems is in wireless communications, where the software-based radio will enable a single device to operate across the various communications standards for analog and digital cellular telephony [Advanced Mobile Phone System (AMPS), Total Access Communications System (TACS), Nordic Mobile Telephone (NMT), code division multiple access (CDMA),

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time-domain multiple access (TDMA), global system for mobile communications (GSM), digital cellular system (DCS), Universal Mobile Telecommunications System (UMTS), personal handyphone system (PHS)], networking (the various flavors of 802.11, Bluetooth, WiMax, Zigbee), and other standards as they emerge and gain commercial viability. In the future, one can imagine a handheld multifunctional personal wireless device incorporating voice and data communications, a GPS navigational system, and perhaps even a short-range radar for collision avoidance on busy city sidewalks. In the U.S. military, the U.S. Army is in the process of transforming from a heavy tank-centric force structure to a lighter faster network-centric force structure, which places an increased burden on the integration of RF systems into ground platforms. This burden will be met by implementing surveillance, active protection, communications, command guidance, and combat identification systems within the reduced weight and space requirements of these platforms while staying within tight budgetary constraints. This goal likely cannot be achieved with multiple independent RF systems. The objective of the U.S. Army Research Laboratory’s Multifunction RF Program is to develop the architecture, subsystems, and algorithms to meet the requirements of such an integrated sensor suite for application to the U.S. Army’s Future Combat Systems and other ground platforms. The U.S. Office of Naval Research (ONR) initiated the AMRFC Program in 1996 to support an increase in the number of shipboard topside RF functions, while at the same time, accommodating increased requirements for ship signature reduction and control. The AMRFC Program is focused on a proof-of-principle demonstration of the concept of broad-band multifunction apertures that are capable of simultaneous performance of a large number of radar, electronic warfare, and communications functions from common software programmable hardware. The AMRFC Program consists of two coupled research thrusts. The first is a proof-of-concept array test-bed demonstrator. At the time of this writing, the U.S. Naval Research Laboratory (NRL) has just completed a series of demonstrations of AMRFC at the Chesapeake Bay Detachment, near Chesapeake Beach, MD. This system is described in the paper by Tavik et al. We hope that this TRANSACTIONS’ readers will find this interesting and have an appreciation for the capacity of this achievement to represent a paradigm shift—not just for the Department of Defense, but also for the commercial sector as well. In addition to the proof-of-principle demonstration array, the ONR’s AMRFC Program is also developing new component technologies that enable new classes of multifunction RF architectures. This program has historically funded world-record speed DDSs (4.6 GHz achieved by Northrop Grumman), tunable filters, channelizers, ADCs, DACs, and highly linear amplifier chains. More recent efforts are going toward the development of multifunction component chains for AMRFC-type

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systems with an emphasis on also improving affordability. This development effort will enhance performance, functionality, and affordability of multifunction broad-band components in future generations of AMRFC-type systems. The Air Force Research Laboratory initiated the Sensorcraft Program in 1998. Sensorcraft is a high-altitude unmanned aerial vehicle concept that performs intelligence, surveillance, and reconnaissance (ISR) missions. Sensorcraft’s key development is the integration of a multisensor multifunctional sensor suite. Sensors include UHF radar with both ground moving-target and synthetic-aperture-imaging modes, and -band radar with both air moving-target and ground moving-target modes, operating simultaneously with a wide-band communications suite, and signals intelligence system. Structurally integrated antennas and multifunction capability are key enablers for this system concept. What are the remaining challenges that lie ahead for the microwave engineer to solve? We could speculate that affordability can be addressed by maximizing the reuse of components and increasing simultaneity. This is likely to be achieved with new RF architectures and rethinking of the overall problem. For example, to achieve multiple simultaneous beams on transmit, both high linearity and efficiency will be needed in order to maintain a high degree of spectral purity over a multioctave bandwidth. These two requirements are largely orthogonal in our currently popular class-A amplifiers. The microwave engineering field will need to look for new component technologies and architectural approaches to solve these types of problems. This TRANSACTIONS’ Special Issue covers some of the most recent work in multifunctional RF systems and their components. The first two papers give an overview of multifunctional systems currently under development. The next four papers discuss various multifunctional system architectures. The

remaining papers discuss wide-band, switchable, and tunable components for use in multifunctional RF systems. We would like to express our thanks to this TRANSACTIONS’ Editor-in-Chief, Michael Steer, for supporting this project, to all authors that responded to this Special Issue’s Calls for Papers, and to all of the reviewers for their service. We hope that you find this TRANSACTIONS’ Special Issue interesting and useful, and that it prompts you to get involved in this exciting and challenging field.

ERIC D. ADLER, Guest Editor Army Research Laboratory Millimeter Wave Branch Adelphia, MD 20783-1197 USA MARK C. CALCATERA, Guest Editor Wright-Patterson AFB Air Force Research Laboratory Dayton, OH 45433 USA JOHANN-FRIEDRICH LUY, Guest Editor DaimlerChrysler Research Center Inline Inspection Department Ulm, D-89081 Germany W. DEVEREUX PALMER, Guest Editor U.S. Army Research Office Engineering Sciences Directorate Durham, NC 27709-2211 USA DANIEL S. PURDY, Guest Editor U.S. Office of Naval Research Electronics Division Arlington, VA 22217-5660 USA

Eric D. Adler (S’84–M’85–SM’99) received the B.S. degree in electrical engineering from Rutgers University, New Brunswick, NJ, in 1985, and the M.S. degree in electrical engineering from The Johns Hopkins University, Baltimore, MD, in 1990. He is currently an Electronics Engineer with the Millimeter Wave Branch, Army Research Laboratory (ARL), Adelphi, MD. Since joining the ARL (formerly Harry Diamond Laboratories) in 1985, his research has involved the design, simulation, and integration of various microwave and millimeter-wave Army prototype systems. These systems include multifunctional radar and communications architectures, electronic support measures (ESMs), and communication intercept (COMINT) programs. He currently executes the ARL Multifunction RF initiative, which addresses technologies for electronic scanning antennas (ESAs), direct digital synthesizers, wide-band transceivers, and programmable processors. His current technical areas of interest include the various developing millimeter-wave ESA technologies that include Rotman lens beamformers, ferroelectric delay lines, and microelectromechanical systems (MEMS) phase shifters. Mr. Adler is President of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) Washington/Northern Virginia Chapter.

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Mark C. Calcatera (M’86) was born in Detroit, MI, in 1949. He received the B.Sc. degree in electrical engineering from the University of Detroit, Detroit, MI, in 1972, and the M.Sc. degree from Ohio State University, Columbus, in 1979. He also attended The University of Michigan at Ann Arbor from 1980 to 1981. His field of graduate study was in electromagnetics, as well as microwave circuits and systems. In 1972, he joined the Air Force Research Laboratory, Wright-Patterson AFB, Dayton, OH, in the Electronics Technology Division, RF Components Branch, where he was involved with the development of diverse RF technologies including integrated front-ends, single-chip phased-array transmit/receive (T/R) modules, magnetostatic surface-wave devices, RF power combiners, GaAs and InP devices, monolithic microwave integrated circuits (MMICs), microwave computer-aided engineering (CAE) and device modeling, and digital/RF mixed-signal technologies. Since 1983, he has managed the RF Components Branch, Air Force Research Laboratory, Wright-Patterson AFB, where his current research concerns the development of wide-band adaptable RF components required for compact multifunction sensors of future Air Force systems. He has authored or coauthored several papers. He holds nine patents in the area of microwave devices and systems. Mr. Calcatera has served for several years on the Technical Program Committee (TPC) of the IEEE Microwave Theory and Techniques Society International Microwave Symposium (IEEE MTT-S IMS) in the area of RF device nonlinear modeling, as well as the TPC of the RFIC Symposium. Johann-Friedrich Luy (F’00) received the Dipl.Ing. degree (for his investigations on heat conduction in semiconductor lasers) and the Dr.-Ing. degree (for his thesis on the first silicon molecular beam epitaxy (MBE)-made IMPATT diodes) from the Technical University of Munich, Munich, Germany in 1983 and 1988, respectively. From 1989 to 1996, he was engaged in research on Si/SiGe millimeter-wave devices and circuits (SIMMWICS). From 1996 to 2004, he was Head of the Microwave Department, DaimlerChrysler Research Center, Ulm, Germany. His main projects have concerns the development and application of short-range communication links, research in the field of software configurable telematic platforms (software-defined radio), and the area of radio-location techniques. Since 2004, he has been responsible for the department’s “Inline Inspection” with a focus on the diagnosis and testing of information and communication systems, surveillance systems, and corresponding failure analysis techniques. He is a Lecturer with the Technical University of Munich. He has authored or coauthored over 50 papers in referred journals and symposia proceedings. He coedited Silicon-Based Millimeter-Wave Devices (Berlin, Germany: Springer-Verlag, 1994). Dr. Luy is a member of the Technical Program Committee (TPC) of the IEEE Microwave Theory and Techniques Society International Microwave Symposium (IEEE MTT-S IMS). He is on the Editorial Board of the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, as well as other referred journals. He is an International Scientific Radio Union (URSI) member and an appointed member of the IEEE Electron Devices Society (EDS) Compound Semiconductor Devices and Circuits Technical Committee. He was a Distinguished Lecturer of the IEEE EDS from 1996 to 1997. W. Devereux Palmer (S’89–M’91–SM’01) was born in Augusta, GA, in 1957. He received the B.A. degree in physics and M.S. and Ph.D. degrees in electrical engineering from Duke University, Durham, NC, in 1980, 1988, and 1991, respectively. His field of graduate study was electromagnetic theory, and design, construction, and testing of microwave circuits and systems for practical applications. From 1991 to 2001, he was a member of technical staff with the Microelectronics Center of North Carolina (MCNC) Research and Development Institute (RDI), Research Triangle Park, NC, where he was involved with a number of technologies including silicon vacuum microelectronics for microwave power amplifiers, polymeric MEMS structures, high- high-temperature superconducting (HTS) filters, wide-bandgap semiconductors for power-electronics applications, radio and optical communications systems, and optical and electronic packaging. He taught introductory electromagnetics at Duke University as an Adjunct Assistant Professor for four semesters from 1994 to 1998. In 2000, he became the Director of the MCNC–RDI Optical and Electronic Packaging Group, where he managed programs in development of lead-free flip-chip bumping processes, bumping and assembly of high-density tiled detector arrays for particle accelerators, and packaging for OC-768 optical components. Since his assignment with the U.S. Army Research Office, Durham, NC, in 2001, he has managed extramural basic research programs in radio-wave propagation modeling, microwave and millimeter-wave circuit integration, compact and multifunctional antenna design, and low-power communications systems. Dr. Palmer is a Professional Engineer in the State of North Carolina. He is a member of URSI Commissions C and D, the American Vacuum Society, the Materials Research Society, and Sigma Xi. Within the IEEE, he participates in the Antennas and Propagation, Components, Packaging, and Manufacturing Technology, Electron Devices, Microwave Theory and Techniques, Power Electronics, and Professional Communications societies. He served on the Vacuum Devices Technical Committee from 1997 to 2003. He served as guest editor for the TRANSACTIONS ON ELECTRON DEVICES’ Special Issue on Vacuum Electronics (January 2001). He is a founding member and current chair of the ACME (AP/CPMT/MTT/ED) local chapter in the Eastern North Carolina Section, Region 3.

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Daniel S. Purdy (S’87–M’88–SM’04) was born in Chicago, IL, in 1960. He received the B.S., M.S., and Ph.D. degrees in electrical engineering from the Virginia Polytechnic Institute and State University, Blacksburg, in 1988, 1989, and 1995, respectively. He is currently a Program Officer with the Electronics Division, U.S. Office of Naval Research (ONR), Arlington, VA. From 1989 to 1997, he was with the Naval Air Warfare Center, China Lake, CA, where he was involved with the development of wide-band antennas, radar, development of radar cross-sectional measurement, and signal-processing techniques. From 1992 to 1994, he was selected to attend the Virginia Polytechnic Institute and State University on a Government Academic Fellowship and performed research with the Satellite Communications Group in the area of wide-band phased arrays. From 1997 to 2000, he was with Lockheed-Martin Missiles and Space, Newtown, PA, where he developed techniques for phased-array calibration and communications optimization. In 2000, he returned to government service as a Program Officer with the ONR. He is currently the Program Manager responsible for electronics technology development for the U.S. Navy’s Advanced Multifunction RF Concept (AMRFC) electronically scanned array demonstrator. He also serves as an agent for several Defense Advanced Research Project Agency (DARPA) research programs. He holds four patents. His current research interests include ultrahigh-speed logic, mixed-signal circuits, multifunction RF components, architectures, and systems. Dr. Purdy served as President of the Washington and Northern Virginia Chapter of the Aerospace and Electronics Systems Society from 2002 to 2004.

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The Advanced Multifunction RF Concept Gregory C. Tavik, Member, IEEE, Charles L. Hilterbrick, Member, IEEE, James B. Evins, Member, IEEE, James J. Alter, Member, IEEE, Joseph G. Crnkovich, Jr., Jean W. de Graaf, Member, IEEE, William Habicht II, Gregory P. Hrin, Member, IEEE, Steven A. Lessin, Member, IEEE, David C. Wu, Member, IEEE, and Stephen M. Hagewood

Abstract—The goal of the Advanced Multifunction Radio Frequency Concept (AMRFC) Program is to demonstrate the integration of many sorts of shipboard RF functions including radar, communications, and electronic warfare (EW) utilizing a common set of broad-band array antennas, signal and data processing, signal generation, and display hardware. The AMRFC Program was launched in response to the growing number of topside antennas on U.S. Navy ships, which have almost doubled from the ships launched in the 1980s to those launched in the 1990s. The AMRFC Program seeks to develop and demonstrate a wide-band generic active array antenna architecture that has the ability to transmit and receive multiple simultaneous independent beams for radar, EW, and communication functions. This paper describes a proof-of-principle test-bed that is being developed to demonstrate the AMRFC. Index Terms—Array antenna, communications, electronic warfare (EW), multifunction antenna, radar.

I. INTRODUCTION

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Fig. 1. Topside antenna growth has more than doubled from the 1980s vintage launched ships to those launched in the 1990s. U.S. Navy ship class designations are indicated on the left-hand side (CV or CVN is an aircraft carrier, DDG is a guided missile destroyer, etc.).

HE ROLE of the modern U.S. Navy continues to require higher levels of functionality, performance, and interoperability from shipboard systems. Currently, radar, electronic warfare (EW), and communication systems lack the level of integration sufficient to maximize the performance of each, while minimizing difficulties associated with own-ship electromagnetic interference. Additionally, the growth in these systems has resulted in a significant increase in the number of topside antennas. Fig. 1 shows a doubling in topside antennas from 1980s-era ships to the 1990s. This presents a number of problems including increased antenna blockage, electromagnetic interference, and increased ship radar cross section, as well as maintenance issues related to multiple systems, each with its own unique set of spare parts, repair personnel, and operators. A very desirable solution to many of these problems is to have one system that could simultaneously support multiple functions through a shared set of assets, thus, the emphasis for the Advanced Multifunction Radio Frequency Concept (AMRFC) [1], [2]. The AMRFC is an Office of Naval Research (ONR)-funded program to demonstrate the integration of several shipboard RF

Fig. 2. Goal of the AMRFC is to demonstrate the integration of multiple shipboard functions, including radar, EW, and communications into a shared set of array antennas, signal processing, and display hardware.

Manuscript received May 3, 2004; revised October 26, 2004. This work was supported by the Office of Naval Research. G. C. Tavik, J. B. Evins, J. J. Alter, J. G. Crnkovich, Jr., J. W. de Graaf, W. Habicht II, G. P. Hrin, S. A. Lessin, D. C. Wu, and S. M. Hagewood are with the Naval Research Laboratory, Washington, DC 20375 USA (e-mail: [email protected]; [email protected]). C. L. Hilterbrick was with Northrop Grumman, Baltimore, MD 21203 USA. He is now with the Naval Research Laboratory, Washington, DC 20375 USA (e-mail: [email protected]). Digital Object Identifier 10.1109/TMTT.2005.843485

functions (radar, EW, and communications) utilizing a common set of broad-band apertures, signal and data processing, signal generation, and display hardware. Fig. 2 depicts the AMRFC objective. The potential AMRFC payoffs are realized in terms of the following: • reduced number of topside antennas, thereby, reducing the ship radar cross section and infrared signature;

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Fig. 3. AMRFC test-bed functional block diagram showing the major subsystems. All subsystems are controlled synchronously through a fiber-based digital real-time control network.

• increased potential for future growth without adding new apertures; • tighter control over electronic interference and compatibility issues through more intelligent and agile frequency management; • functionality primarily defined by software, resulting in significantly lowered upgrade costs, and the ability to quickly address new requirements or add new functionality and better interoperability with legacy systems; • potential to substantially reduce life-cycle costs by reducing the number of unique spare parts and lower ship manning by reducing personnel required to operate and maintain equipment; • ability to dynamically allocate and manage system assets according to functional time-line needs, in terms of frequency, transmit power, transmit and receive aperture assets, bandwidth, and polarization. To demonstrate the feasibility of this new concept, an AMRFC test-bed has been developed and is currently undergoing system integration and test. The design of the AMRFC test-bed (see Fig. 3) has several key features to enable the program goals listed above. An early key decision in the AMRFC test-bed architecture was to employ separate receive and transmit antenna arrays. This decision did two things. First, the separation of transmit and receive antennas provides the transmit-to-receive isolation needed for simultaneous multifunction operation. Second, it allowed the receive and transmit arrays to be sized separately for receive and transmit functionality. In the case of the test-bed, the receive array was sized to receive up to 36 simultaneous receive beams, versus four simultaneous transmit beams. The selected 6–18-GHz RF band addresses the key broad-band communications and EW operational issues. Additionally, this wide operating band addresses

many different RF functional needs currently implemented on U.S. Navy ships and, therefore, increases the overall benefit of the AMRFC. Finally, the test-bed hardware and software architecture are generic and configurable, and not function specific wherever possible. This enables the same system resources (e.g., waveform generators, digital beamformers, aperture subarrays, etc.) to be utilized for several different RF functions, although not necessarily simultaneously. Three major contractors (Lockheed–Martin, Northrop Grumman, and Raytheon) provided a receive array, transmit array, and digital receiver hardware, respectively, for the proof-of-principle program. A fourth company (General Dynamics) has provided middleware and software support. These subsystems have been integrated and are currently under test and evaluation by a U.S. Navy team, led by the Naval Research Laboratory (NRL), with U.S. Navy provided hardware and software into the test-bed for concept test and evaluation at the Chesapeake Bay Detachment Test Facility, NRL. The U.S. Navy team also includes key personnel from the Naval Surface Warfare Center Dahlgren Division (NSWCDD), and the Naval Air Warfare Center Aircraft Division (NAWCAD) Patuxent River. During the latter part of FY04, the AMRFC team demonstrated the use of the developed broad-band array technologies to simultaneously support radar, EW, and communications receive and transmit functionality in the 6–18-GHz band. Test scenarios were selected that demonstrate the ability to support multiple transmit and receive beams through the arrays, and the ability to reconfigure the test-bed assets to support the diverse requirements of peacetime and combat engagement environments. Some preliminary test results are provided below. Other work leading up to the AMRFC activity included wideband RF module and radiator development and system archi-

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tecture activities by industry and the other U.S. military services. In April 1997, the ONR sponsored a Wideband RF Science and Technology Workshop, Orlando, FL. At this workshop, members of industry presented papers on wide-band technology work in multifunction RF systems, wide-band radar systems, wide-band EW systems, wide-band communication systems, and photonic and electronic technology supporting the future application of multifunction RF systems [3]–[6]. Additionally, there has been a significant amount work in multifunction antenna systems over the past several years. However, most of this work has been focused on the aperture itself, and suited primarily for a single class (e.g., communications or radar) of RF functionality [7]–[10]. II. RF FUNCTIONALITY AND DEMONSTRATION A. Communications Four different communications bands lie within the operating frequency band of the AMRFC arrays. Two of these bands, one -band, are for the miliin the -band and the other in the tary’s Common Data Link (CDL) and Tactical Common Data Link (TCDL) systems that carry wide-band data from an aircraft to a LOS terminal on ground or ship. The other two bands are for communications via geostationary satellites, one for the -band military -band satellites and one for the commercial satellites. The communications segment of the test-bed consists of RF distribution, RF downconverters and upconverters, modems, and other equipment to support up to six simultaneous RF links. This equipment is controlled by an embedded controller, which provides the interface to the rest of the AMRFC test-bed control architecture. This enables a common interface to the AMRFC control network, while allowing various types of terminals to be embedded within the test-bed (e.g., legacy modems can be upgraded to programmable modems with minimal impact to the rest of the AMRFC system). This modem equipment is complemented by various displays in the operations shelter (e.g., data displays and spectrum analyzer output) and auxiliary system interface computers to configure and interface to communications equipment on the other end of the link from the test-bed. The six links are made up of four CDL-type links and two satellite communication (SatCom) links, all of which can be receiving data simultaneously and supporting simultaneous transmissions. The CDL links can support 10.7-, 137-, and 274-Mb/s line-of-sight (LOS) downlinks from an airborne platform, and the uplink data rates range from a standard 200 kb/s to 10.7 Mb/s, with future growth to 45 Mb/s. One of the links in the AMRFC test-bed is the 274-Mb/s -band downlink. This -band link uses a remotely located miniaturized interoperable data link (MIDL) airborne terminal to transmit data to portable ground support equipment (PGSE) embedded into the AMRFC -band systems, test-bed. The remaining CDL type links are which can support 10.7-Mb/s downlink to and a 10.7-Mb/s uplink from the test-bed. Closure of the downlinks was demonstrated by sending MPEG-2 encoded video data streams to the test-bed and displaying the resultant video in the operations -band air terminals are located in a shelter. The - and

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tower at the Tilghman Island Test Facility, NRL, approximately 17 km across the Chesapeake Bay from the AMRFC test-bed. -band terminal was then transferred to a boat and later The to an aircraft to demonstrate the ability to track and maintain the link while steering the beam. -band The SatCom links demonstration consisted of one commercial satellite link and one -band Defense Satellite Communication System (DSCS) link. The -band link transferred data between the test-bed and a remote earth station through a satellite over the Atlantic Ocean. Due to the small size of the AMRFC proof-of-principle array along with the power spectral density limits imposed by the International Telecommunication Union and Federal Communications Commission, the signal was spread over a wide bandwidth. Note that this is not meant to be a tactical/fielded waveform, but it does allow demonstration of the array and provide a basis to extrapolate performance to a larger array. The relatively low data rate (tens of kilobits per second) was demonstrated by sending text, or other suitable low data-rate information. The -band DSCS link was demonstrated using a satellite simulator located on the tower at Tilghman Island. Two modes were demonstrated: a spread-spectrum waveform similar to -band SatCom and a phase-shift keying that used for the (PSK) waveform similar to that used in actual DSCS terminals. Finally, the transmission of data between the test-bed and a remote earth station through a DSCS satellite located over the Atlantic Ocean was demonstrated. B. EW One of the primary AMRFC test-bed functions is EW. The requirements for EW were derived in large part from the U.S. Navy’s long-range effort to improve the survivability of U.S. Navy combat ships against both present and future projected threat capabilities. The most prominent and deadly threat is the antiship cruise missile (ASCM). EW functions are divided into receive and transmit categories, electronic surveillance (ES) performs passive surveillance, and electronic attack (EA) provides active countermeasures. The initial EW demonstration effort was performed over the 6–18-GHz operating band of the test-bed and required broad-band ES receiver assets to provide surveillance and timely warning necessary for ship self-protection. The ES has two functions, high-probability-of-intercept/precision-direction-finding (HPOI/PDF) and high gain/high sensitivity (HG/HS). Both ES functions use a state-of-the-art Wideband Digital Channelized Receiver System technology adapted to the demands of next-generation ES situational awareness functions. Multiple embedded antenna elements from the AMRFC receive array form vertical and horizontal interferometers that provide signals for HPOI environment analysis and precision direction finding in both azimuth and elevation. To scan the environment for low-power radar emissions, the HG/HS ES function uses the output from the entire receive array combined in a digital beamformer that directs an HG narrow beam to segments of the environment. The AMRFC test-bed EA function provides countermeasures against surveillance and targeting radars and missile

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seeker radars. These threat radars range from simple noncoherent fixed frequency radars to complex coherent systems that employ intra-pulse modulation, multiple simultaneous emissions, and/or frequency agility. The EA techniques employed against these threats use noncoherent noise-like components and/or a coherent digital RF memory (DRFM) component developed as part of the AMRFC signal generation subsystem. The demonstrations included combat scenarios with multiple simultaneous EA responses, against surveillance, targeting, and missile engagements. C. Radar The AMRFC test-bed radar function is fundamentally a very-low power quasi-frequency-modulated continuous-wave (FMCW) surface navigation radar. This mode utilizes one quadrant of the transmit array, and one channel of the full receive array (see Section VI). Having the capability to transmit low peak power, high duty-factor waveforms, and selectively operate in any or radar band enables great flexibility in radar operation and interoperability with other RF functions. The low-power navigation radar mode has an instrumented range to 25 nmi and scans a quadrant ( 50 azimuth at 0 elevation) at a 5-s update rate. Through coherently integrating several hundred relatively long high-duty factor pulses, the radar is capable of detecting objects such as small boats out to several nautical miles. The radar range cell resolution is better than 20 m. Several of the radar modes have a moving target indicator (MTI) capability, which is implemented by performing a fast Fourier transform (FFT) on hundreds of pulses within the dwell. Through intelligent waveform selection, it is possible to adjust the clutter notch to discern slow-moving targets in strong clutter. Furthermore, since sea clutter returns become de-correlated after approximately 10 ms, the waveform dwell interval (over 100 ms) should offer as much as a 20-dB improvement in clutter cancellation [11]. Finally, it is worth noting that when the radar is operated at lower power levels, there is sufficient electromagnetic isolation between the two arrays to eliminate interference to any other receive function. D. Calibration The AMRFC test-bed is a joint effort involving multiple contractors and several U.S. Navy laboratories, each one providing major subsystems and software components. Such a complex system being developed by many different entities requires a highly automated way to diagnose test-bed health and ensure that all interconnected components work together as expected in terms of amplitude and phase alignment. Furthermore, any misalignments should be able to be tracked over time and possibly temperature, and be corrected if required. These system level calibrations and characterizations are critical to achieving and maintaining accurate beam characteristics, high-fidelity transmitted and received waveforms with low distortion, as well as the proper operation of the test-bed as a whole. The calibration function fulfills the mission outlined above for the AMRFC test-bed [12]. The test-bed calibration function has at least two key features. The first feature is the method by which test signals are generated and test data is collected. In almost all cases, a test signal and a reference signal, derived

Fig. 4. High-band multifunction transmit array supports up to four simultaneous transmit beam configurations. Transmit array quadrants may also be combined to form larger apertures.

from the same signal source, are used to determine the raw calibration data. This test/reference signals are typically generated by equipment within a function group (see Section III) and, therefore, requires no special signal generators, but rather uses existing signal-generation equipment. These signals are then routed and processed in such a way as to minimize and, in many cases, eliminate, all possible sources of error in the calibration signal distribution chain. Secondly, the calibration function is invoked like any other RF function in the test-bed. This means that it is a fully integrated test-bed function and, therefore, has the same basic software components as any other function. This fully integrated approach permits calibration routines to be performed even while other functions may be going on and, thus, would lend itself to at-sea operation and would not be limited to in-port maintenance operations. The calibration function includes over 20 different modes that are capable of measuring the amplitude and phase response for transmit and receive subarray signal paths, different phaseshifter and attenuator settings in the transmit and receive modules, the transfer functions of all exciters and receivers, as well as many other measurements. In effect, the test-bed calibration function acts like a built-in specialized network analyzer. Furthermore, this data is collected in a timely fashion. Data collection times are generally measured in seconds or minutes. III. HARDWARE ARCHITECTURE A. Transmit Array Design The high-band multifunction transmit array includes 1024 pairs of active radiating elements, segmented into four quadrants of 256 sites each, with each quadrant further subdivided into four subapertures. Each subaperture is individually fed by one of 16 RF inputs via an array driver interface amplifier. The four quadrants are capable of independent simultaneous beam forming in any combination of quarter, half, or full array (Fig. 4). The 1024 array radiators are dual-polarized wide-band elements capable of providing the required polarization quality throughout the scan volume ( 50 azimuth/ elevation). Design emphasis was put on wide-band co-to-cross-polarization isolation, voltage standing-wave ratio (VSWR), instantaneous bandwidth, scan, and cost. The radiators are mounted on a square grid (rotated by 45 ), with 0.413-in spacing, to provide wide-band high-quality dual-polarized grating lobe-free beams throughout

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the expected EW and communication transmit sectors. Orthogonal orientation of the radiators enables the production of all possible polarizations (including horizontal, vertical, and circular). An RF transition manifold consisting of phase-matched RF cables is used to transition between the transmit modules and the tighter spacing of the radiating elements. This transition allows the transmit modules to be designed and produced in an aspect ratio suitable for high-yield manufacturing, while still accommodating the radiator spacing designed for grating lobe control. RF transmit modules are configured in “QuadPaks.” Each QuadPak contains four pairs of RF channels, with each pair feeding an orthogonal set of vertical and horizontal radiating elements for full polarization control. Key design areas include reduced parts and package count, package form factor, full phase and amplitude control of the orthogonal transmit paths, beam switching, and improved power and logic interface. The module package is designed with a low-temperature co-fired ceramic (LTCC) substrate for reduced RF loss. The module high-power amplifier (HPA) is a gallium–arsenide pseudomorphic high electron-mobility transistor (pHEMT) device capable of generating several watts across the operating band in either linear or saturated operation. Each of the QuadPak RF chains includes a low-power multifunction RF controller monolithic-microwave integrated-circuit (MMIC) assembly for tuning of the array and the generation of desired beams and polarization over the full operational frequency coverage and scan volume. At the input to the transmit QuadPak modules is an array driver package, which provides an interface with the input RF, and an initial gain stage prior to the 1 : 16 subaperture power divider. To avoid the high currents and heavy distribution busses associated with centralized high-power (greater than 5 kW) power supplies normally associated with active electronically scanned arrays, lower power 150-W distributed power converters are employed in the design to allow the supplies to be mounted on the slats adjacent to the individual transmit modules. This arrangement operates at better than 80% efficiency and allows the power to be distributed throughout the array at a higher voltage and lower current. B. Waveform Generation and Distribution The waveform generation and distribution design for the AMRFC test-bed is capable of producing up to four simultaneous communications, EA, and radar signals with an increase of up to eight EA signals when time multiplexing is enabled. This is accomplished through four function groups of hardware, each of which can generate wide-band waveforms of up to 1000-MHz bandwidth. Every 2 ms, the signal generation function groups and waveform distribution subsystem can be reconfigured to meet the dynamically changing needs of the test-bed functions [13]. Each hardware function group can also accept an input from the communication modems and condition it for transmission. Function group 4 has a special narrow-band (25 MHz) signal generation capability designed to produce high-purity signals

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Fig. 5. Each of four function groups can be routed to any or all of the four transmit array quadrants through a photonic crossbar switch. One example of signal routing is shown.

for use in the navigation radar function. Signal frequency accuracy, stability, and purity are enhanced by locking all signals, oscillators, and clocks to a 5-MHz rubidium standard or signals derived from it. Like all other test-bed subsystems, the hardware function groups are controlled digitally by an embedded processor, and use digital signal-generation techniques to produce their signals. The wide-band signals are generated by a direct digital synthesis device at baseband and then multiplied and heterodyned up in frequency to the final desired RF in the AMRFC 6–18-GHz operating band. The narrow-band signals are also generated digitally, at baseband, under the control of the embedded processor by an arbitrary waveform generator card and then heterodyned up through several upconversions to the final desired RF. There is filtering at each stage of the upconversion process in both the narrow-band and wide-band signal paths. Once the signals are at the final RF, they are converted to an intensity-modulated laser light signal by Mach–Zender modulator fiber-optic devices. The four hardware function group outputs of fiber-optic signals are then put through a microelectromechanical system (MEMS) photonic crossbar switch. This device directs the signals to the four fiber-optic transmission lines leading toward the four transmit array antenna quadrants. Any hardware function group generated signal can be sent to any one, or up to all four fiber-optic lines, depending on what portion of the transmit array antenna face is to be used to transmit the particular signal. Fig. 5 is a block diagram of the waveform generation and distribution subsystem. Before transmission through the array, the signal is converted back to RF using a photonic detector, amplified and filtered. The amplitude and phase of the RF signal is also adjusted by a vector modulator, which is digitally controlled by microcontrollers under the direction of the embedded processor. The conditioned signal is sent to the array’s RF inputs, with proper amplitude and phase, through short low-loss coax cables. C. Receive Array Design The high-band multifunction receive system supports the simultaneous needs of communications, EW, and radar functions

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Fig. 6. High-band multifunction receive array can be partitioned into array faces using various combinations of the 3 3 subarrays that each contain 128 dual-polarized elements. Each subarray has four output ports corresponding to the four independent channels behind each element. This figure also shows the location of the nine interferometer elements used for the HPOI/PDF function.

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by controlling the reception, processing, and distribution of RF signals within the 6–18-GHz operating band. The receive array antenna contains the RF receiving antenna elements, receive modules, and RF combiners that provide the simultaneous beam capabilities required by the AMRFC testbed. The receive array antenna consists of 1152 radiating elements and receive modules packaged in a nondilated fashion. The array elements are grouped into a 3 3 arrangement of subarrays each with 128 dual-polarized elements (see Fig. 6). The receive array for the test-bed is approximately 13 in on a side. The heart of the multifunction receive capability is in the receive module. Each module supports four independent receive channels, three linearly polarized and one polarization agile channel, which, in turn, supports four fully independent array beams for different functions. The modules are packaged in dual packs fed by two dual-polarized radiating elements, and these two outputs (corresponding to the two dual-polarized elements) for each of the four channels are then combined in each module. The dual-notch radiator element design supports any linear or circular polarization over the full band with full scan coverage. The four independent RF channels provided by the receive modules are distributed to the first level of beamforming at the subarray level. The signals from the modules contained in each of the individual subarrays are combined within the antenna cabinet and are provided to RF distribution equipment for additional analog beamforming. The outputs from nine selected element pairs and associated modules form an embedded azimuth and elevation interferometer (see Fig. 6) and are routed to the ES HPOI/precision-direction-finding function. Two other element pair/module outputs are provided directly to auxiliary receivers as part of the coherent EA function. D. Receive Beamforming Fig. 7 illustrates the different types of receive beamforming options that are available within the test-bed. Power splitters at the output of each of the 36 outputs of the receive array produce 72 RF outputs arranged in eight sets of nine subarray outputs each. Three sets are routed to analog beamformers, three sets are routed to narrow-band digital beamformers, and two sets are routed to wide-band digital beamformers. These three types of beamformers not only provide an interface to several different

Fig. 7. HBDP subsystem is capable of forming multiple beams through digital beamforming at the subarray level for narrow-band and wide-band signals.

equipment sets with varying requirements, but they also enable the evaluation of several designs. A brief description of each type is given below. 1) Analog Processing: The receive array subsystem performs analog RF beamforming on three of the four subarray ports (see Fig. 6 caption and Fig. 7). These analog beamformers consist of several wide-band power combiners. For Port 1, all nine subarray outputs are combined to form a full-aperture beam. Port 2 provides either a full-aperture beam or two independent beams, derived from 1 3 and 2 3 vertically oriented combinations of subarrays. Port 3 provides the same combinations as Port 2, or it can be configured to provide three independent beams derived from three 1 3 vertically oriented combinations of subarrays. 2) Narrow-Band Digital Processing: RF from three of the four antenna subarray ports (27 channels) are provided to a high-band digital preprocessor (HBDP), illustrated in Fig. 7 for narrow-band processing. The narrow-band preprocessor of the HBDP downconverts the RF in each channel to a 75-MHz IF, digitizes the signal to 14 bits at a 60-MHz rate, and sends the digitized data from all of the subarrays to the narrow-band digital beamformer over 27 fiber-optic cables. The narrow-band digital beamformer consists of three nine-channel beamformers, built using field-programmable gate arrays. Each beamformer can arbitrarily phase shift and combine the subarray data to form four beams at a 30-MHz complex sample rate. The 12 beams from the narrow-band digital beamformer are sent to the Beam Distribution Unit, which selects one beam output to go to a general-purpose processor (a 16-node parallel-processing computer) for the calibration and navigation radar functions, and selects four beams to be sent for further processing by the communications subsystem. 3) Wide-Band Digital Processing: RF from two array ports is sent to the HBDP for wide-band processing. The wide-band preprocessor of the HBDP downconverts the RF from each subarray to a 720-MHz IF with a 230-MHz bandwidth and sends the two groups of nine IF channels to two wide-band preprocessors. For each channel, the wide-band preprocessor digitizes the IF to 8 bits at a 960-MHz rate, performs digital downconversion to a complex baseband signal, and implements the true time-delay required for wide-band beamforming. A vector processor then combines the nine channels of data to form two simultaneous beams per wide-band preprocessor (four beams total with two preprocessors). If desired, the beamformed data can pass through a 512-point FFT processor. For each beam, the

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continuous time or frequency data is then passed to the back-end processor over eight fiber-optic cables. In the test-bed, each wide-band preprocessor is configured to form two identical beams, where one beam channel outputs time data and one outputs frequency data for the beam. The 32 fiberoptic cables from the two preprocessors are sent to the G-link Fiber-Optic Distribution (GFOD) Unit, whose job is to select one of the two frequency channels to pass to the ES FMCW processor and one of the time channels to the pulse processor for HG/HS signal detection and processing. The GFOD Unit also brings in the 27 fiber-optic cables carrying the narrow-band data and can select either the 32 channels of wide-band data or the 27 narrow-band channels to send to the a Data Collection Unit, which can collect 128-MB snapshots of data and store them on a redundant array of inexpensive disk storage devices for later post-processing and analysis. 4) ES Signal Processing: RF ports from the nine element azimuth/elevation interferometer (see Fig. 6) are routed through RF downconverters, and then converted to optical signals for transmission to the remote ES signal processors. As previously stated, ES is represented by two functions: HPOI/PDF to cover a wide instantaneous bandwidth and wide field-of-view, and HG/HS to detect weak emitters. For HPOI/PDF, embedded azimuth and elevation interferometers, MMIC downconverters, and microwave fiber links provide nine phase-tracking IF inputs to a wide-band digital channelized receiver. Pulses are detected and encoded into pulse descriptor words using field-programmable gate-array processing. The pulse descriptor words provide digitized information of received RF pulse (i.e., frequency, amplitude, pulsewidth, etc.). Phases between the nine inputs are processed using interferometric algorithms into azimuth and elevation. For HG/HS, data streams digitally beamformed using the full gain of the receive array (to detect weak pulsed signals) are processed in the time domain into pulse descriptor words. HG/HS processing in the frequency domain is to detect low-probability-of-intercept emitters. The ES signal processing sorts and deinterleaves the encoded pulse descriptor words for emitter identification. IV. SOFTWARE ARCHITECTURE A. Overview One of the goals of the AMRFC Program is to create an RF system with functionality defined primarily through software that can perform multiple simultaneous RF functions. Such a system is composed of multiple resources that can be dynamically reconfigured to support these RF functions on demand. These resources include transmit and receive subarrays, signal generators, beamformers, processors, etc. Such a system will be capable of supporting new missions or new functionality with the addition of new software components, as long as the current resources are sufficient for the task. Furthermore, upgrading or adding resources should be possible without redesigning the whole system or rewriting large amounts of its software. To facilitate this adaptability, the test-bed uses a modular open system architecture. There are two primary domains of the AMRFC test-bed software: system software and RF function software. Fig. 8 illustrates the test-bed’s software “stack.”

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Fig. 8. AMRFC test-bed software consists of two primary domains: core system software and function software.

B. Core System Software Core system software provides the infrastructure to support the RF function software. It is the “operating system” for the AMRFC test-bed. This software is: 1) responsible for real-time control of the system; 2) the abstraction, allocation, and scheduling of resources; 3) supporting communication between software components; 4) providing common software components; and 5) providing a framework to add new resources and new software components. The foundation of this system software is provided by the native commercial-off-the-shelf operating systems of the system’s various computational and control processors. A middleware layer provides a common abstraction of these diverse operating systems and provides a powerful communications infrastructure for all test-bed processes. A real-time network library provides a framework for performing the distributed real-time control of the system. Additional libraries provide platform-independent infrastructure and reuse of common software components. These libraries provide a common application programmer’s interface for all test-bed processes. The test-bed is managed by two resource allocation manager processes: high-level RAM and low-level RAM. The high-level RAM process provides a system console that monitors and controls the system state and configuration. From this console, the system operator can control system priorities, frequency doctrine, and other system configurations. The low-level RAM process is responsible for the actual real-time allocation and control of resources. This process is responsible for analyzing the instantaneous requirements of the active functions, prioritizing these requirements, and resolving resource conflicts. The low-level RAM creates a set of allocations or “virtual systems” to satisfy these requirements. Any number of allocations can exist at any time—limited only by available resources. The lifetime of an allocation can be as short as 2 ms or be of indefinite length. The low-level RAM broadcasts allocation messages over a real-time network to create new allocations, update existing allocations, or terminate existing allocations.

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Fig. 9. AMRFC software architecture is structured to provide modular real time, as well as nonreal-time control of the hardware assets.

The actual setup and control of these allocations is distributed to embedded controllers residing in each subsystem (see Fig. 9). Each of these embedded controller software (ECS) processes is synchronized to the low-level RAM through a common 500-Hz system “tick” strobe. The low-level RAM, all ECS processes, and all resources operate in pipeline fashion in lockstep with this time base. During the first clock interval of the allocation setup process, the low-level RAM initiates this process by broadcasting a set of allocation messages. During the following clock interval, the ECS processes interpret these high-level allocation messages and determine proper low-level settings for each digital control point either through calculation or lookup tables. These settings are loaded into the setup registers of each resource. At the leading edge of the final clock interval, these settings are strobed into the working registers of all affected resources throughout the system. The subsystem specific behavior is provided through software plug-ins to a common framework used by all ECS processes. C. RF Function Software The actual functionality of the system resides in the RF function software domain. This is the “application software” of the system. Each RF function will have several processes in this domain that interact with each other and the system processes through a common application programmer’s interface provided by the system libraries. The core process of any RF function is the functional queue manager (FQM). The FQM works with the low-level RAM to schedule resources to perform its current mission. The state and configuration of the FQM is controlled through a functional graphical user interface (FGUI) process. This process will also provide data displays for the RF function. Functions may also have additional processes to perform signal and data processing. V. TEST-BED CONSTRUCTION The AMRFC test-bed (Fig. 10) has been developed and is currently undergoing testing at the Chesapeake Bay Detachment Test Facility, NRL, Chesapeake Beach, MD. The AMRFC test-bed electronics and associated receive and transmit arrays

Fig. 10. AMRFC test-bed located at the Chesapeake Bay Detachment Test Facility, NRL.

are housed in seven converted transportation 20-ft shipping containers or trailers. The arrays are mounted on a 15 slope in the ends of two of the trailers overlooking the bay to emulate a shipboard deckhouse installation. This will enable the test and evaluation of the test-bed to achieve transmit-to-receive isolation required by a multifunction system [14], [15]. The packaging of the test-bed electronics into trailers provides the ability to support laboratory equipment in a protected environment, as well as provides the Navy options to transport test-bed assets to other test locations such as aboard ship. One set of stacked trailers are allocated to the transmit array and associated signal-generation electronics. A second stacked trailer pair is allocated to the receive array and associated digital receiver, digital beamforming, and electronic surveillance receive electronics. A fifth trailer houses the test-bed communication electronics and the remaining two trailers provide the central processing, displays, and operations electronics. Additionally, a portable power plant, dry air supply, and chiller unit provide the test-bed power and array cooling. The location of the test-bed provides an ideal test and evaluation facility. The facility includes an over water test range with receive and transmit instrumentation located on Tilghman Island, approximately 17 km across the bay. Additionally, in cooperation with the test facility resource manager and Patuxent Naval Air Station, surface and airborne platforms can also be deployed as part of a multitarget test scenario. VI. CONCEPTUAL SCENARIOS The ultimate power of the AMRFC lies in the ability to adapt the functionality of the equipment to the current tactical shipboard operations. This not only includes the particular mix of RF functions that are active at a given time, but also the key parameters of those RF functions (e.g., required transmit aperture size, radiated power level, receive aperture size, instantaneous bandwidth, waveform type, etc.). In this way, a multifunction RF system may be rapidly tailored to a set of requirements by appropriate allocation of its resources. Fig. 11 shows the aperture and beamforming resources for the AMRFC test-bed. The right-hand side of Fig. 11 shows the transmit array with its 16 subarrays, and the outline of the four quadrants that consist

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Fig. 11. AMRFC receive array and transmit array selectable configurations to support RF functions.

of four subarrays each. A quadrant is the smallest aperture size that may be allocated to an RF transmit function. The left-hand side of Fig. 11 shows eight replicas (four rows and two columns) of the receive array, each with nine subarrays. The four rows represent the four output ports of each subarray corresponding to the four channels within each receive module. These four ports are fully independent of each other. The two columns represent the result of the two-way power splitter at the output of each subarray port (see Fig. 7). The rounded outlines seen surrounding various sets of subarrays within each receive array replica represent the smallest aperture size that may be allocated to an RF function for that part of the receive array on that port. The type of subarray beamforming network is noted beside each of the eight replicas. These include the analog, narrowband digital, and wide-band digital subarray beamformers. Finally, the center of the Fig. 11 shows a representation of the azimuth/elevation interferometer receive array elements used for the HPOI/PDF function (see also Fig. 6), and two auxiliary receive array elements utilized for the receiver part of the coherent EA function. In order to evaluate the performance of the AMRFC, several shipboard scenarios have been developed. An effort was made to make these test scenarios correspond to realistic conditions aboard a modern naval warship. They are the quiet, normal, alert, and combat scenarios. For the purpose of evaluation and demonstration, a time-line progressive disclosure scenario was simulated, which required the test-bed assets to be reconfigured to respond to conditions of three test scenarios. Section VII provides additional details on the results of the demonstration.

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Fig. 12. Quiet (EMCON) configuration of AMRFC test-bed demonstration. Test-bed assets configured for receive-only operation.

Fig. 13. Normal scenario configuration of AMRFC test-bed demonstration. Communication, electronic surveillance, navigation radar, and calibration modes supported.

VII. RESULTS AND DEMONSTRATED PERFORMANCE For the purposes of evaluation and demonstration, three scenarios were configured using both surface and airborne cooperative emitters. Figs. 12–14 show how test-bed aperture resources were allocated to different RF functions during several test scenarios. Together, they represent a time line moving the test-bed through a progressive build and reconfiguration of assets to support a series of conceptual scenarios from receive-only, or emission control (EMCON), to normal conditions (supporting typ-

Fig. 14. Combat configuration of the AMRFC test-bed demonstrations. Priority for asset allocation is given to EA in support of countermeasures against an attacking threat.

ical communication, surveillance, and navigation functions), to combat operations where the ship comes under attack. In the initial EMCON configuration (Fig. 12), test-bed assets were configured for a receive-only mode. Receive array ports -band satellite 1–3 were configured to receive -band and

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Fig. 15. Navigation radar-mode graphic showing radar returns from targets of opportunity on the Chesapeake Bay.

originated from threat simulators at Tilghman Island and aboard the NRL’s P-3 aircraft. This engagement progressed through a sequence of countermeasures against surveillance, targeting, and missile threats. Limited communications (receive-only) were successfully maintained using available receive array assets, while transmit assets were reallocated to counter the threat and maintain the radar mode. Fig. 16 is a screen graphic from the EA FGUI during the combat operations configuration showing dynamic allocation of the transmit array assets for the EA function. In this engagement, the system successfully produced a 1-GHz coherent waveform on one quadrant, a noise spot time-multiplexed with a multiple false-target technique from a second quadrant and a noise spot time-multiplexed with a combination of an unsynchronized walk-off and hold-off technique from the remaining quadrant to counter a total of five simultaneous threats. VIII. CONCLUSION

Fig. 16. EA engagement status display showing the transmit asset allocations against the engaged threats. The diamond-shaped graphic represents the transmit array with its four quadrants. The line segments from the quadrants to the “horizon” indicate the beam direction, and the numbers at the ends of the lines indicate the EA technique.

The advanced multifunction RF concept test-bed provides the U.S. Navy and its contractors with a first look at the benefits and challenges presented by multifunction RF systems. The list of possible subjects of future work is very long; however, some key topics include further refinement and optimization of the resource allocation manager algorithms, new transmit-to-receive isolation techniques (see [15] for a more detailed discussion of array isolation requirements), and array architecture designs that minimize production cost. System testing and major demonstrations during the fall of 2004 showed that the AMRFC of using common antenna arrays and signal generation and distribution hardware is feasible and can be used effectively to support a diverse set of shipboard RF multifunction operational needs ranging from peace-time communication and surveillance modes to EW weighted modes against a complex and diverse threat. ACKNOWLEDGMENT

and airborne down-links. The satellite and TCDL return-link data rates achieved were 32 kb/s and 10.71 Mb/s, respectively. The ES mode was configured for high-probability-of-intercept from potential threats and the calibration mode continued to run using signal generation and transmit array assets without transmitting RF. In the normal operations configuration, shown in Fig. 13, transmit assets were brought online to support two-way communications and a navigation radar mode. Port 4 of the receive array was allocated to the radar mode. One quadrant of the transmit array, time shared with a background calibration function, was allocated to support the radar mode. Fig. 15 is a display of the radar mode showing target returns from targets of opportunity in the Chesapeake Bay. Two of the other transmit array quadrants were reallocated from supporting the calibration mode to supporting two-way communication links. In the combat operations scenario (Fig. 14), the test-bed assets were dynamically reallocated to support EA against surface and airborne threats. For the demonstration, these threats

Author G. C. Tavik would like to thank the many dedicated Navy and industry engineers, unfortunately too numerous to personally identify here, that are the AMRFC team. Their hard work and support are reflected in this paper. REFERENCES [1] G. V. Trunk et al., “Advanced multifunction RF system (AMRFS) preliminary design considerations,” NRL, Washington, DC, Formal Rep. 5300-01-9914, Dec. 10, 2001. [2] G. C. Tavik, J. Y. Choe, and P. K. Hughes, II, “Advanced multifunction radio frequency (AMRF) concept testbed overview,” in Government Microcircuit Application Conf. Dig., Mar. 2001, pp. 100–102. [3] D. Bobowicz, D. Collier, and J. Wojtowicz, “A photonics-steered, wideband phased array for shipboard application,” presented at the Antenna Applications Symp., Sep. 17–19, 1997. [4] T. L. Bardoll, D. Cross, and R. W. Mumper, “A compact wideband transmit module set for active arrays,” presented at the IEEE MTT-S Int. Microwave Symp., Jun. 1999. [5] D. C. Wu and J. Lawrence, III, “Advanced ECM transmitter advanced technology demonstration,” NRL, Washington, DC, Rep. NRL/FR/5740-02-10033, Sep. 27, 2002. [6] D. C. Wu et al., “Advanced ECM transmitter for ship defense,” in Proc. Joint Electronic Warfare Conf., Apr. 1998, pp. 7–12.

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[7] D. H. Schaubert, “Wide-band phased arrays of Vivaldi notch antennas,” in IEEE 10th Int. Antennas Propagation Conf., vol. 1, Apr. 14–17, 1997, pp. 6–12. [8] S. Lindenmeier, J. F. Luy, and P. Russer, “A multifunctional antenna for terrestrial and satellite radio applications,” in IEEE MTT-S Int. Microwave Symp. Dig., vol. 1, May 20–25, 2001, pp. 393–396. [9] J. J. H. Wang, V. K. Tripp, and J. K. Tillery, “Conformal low-profile multifunction antennas,” in IEEE AP-S Int. Symp. Dig., vol. 2, Jun. 18–23, 1995, pp. 1002–1005. [10] G. Laughlin, E. Byron, and T. Cheston, “Very wide-band phased-array antenna,” IEEE Trans. Antennas Propag., vol. AP-20, no. 11, pp. 699–704, Nov. 1972. [11] L. B. Wetzel, “Sea clutter,” in Radar Handbook, 2nd ed, M. Skolnik, Ed. New York: McGraw-Hill, 1990, pp. 13.23–13.24. [12] J. de Graaf, G. Tavik, M. Bottoms, and C. Tatum, “Calibration overview of the AMRFC test bed,” in Proc. IEEE Int. Phased Array Systems Technology Conf., Boston, MA, 2003, pp. 535–540. [13] G. P. Hrin, G. C. Tavik, and B. J. Cherdak, “Advanced multifunction RF concept signal generation, distribution, and calibration,” in Government Microcircuit Application Conf. Dig., March 2001, pp. 119–122. [14] C. L. Hilterbrick and R. I. Perlut, “Advanced multifunction RF concept test bed integration & test,” in Government Microcircuit Application Conf. Dig., Mar. 2001, pp. 123–126. [15] M. Parent, D. Taylor, G. Tavik, M. Kluskens, and J. Valenzi, “RF isolation of separate transmit and receive phased array antennas in a multifunction environment,” in Antenna Application Symp., 2001, pp. 413–442.

Gregory C. Tavik (M’88) was born in Baltimore, MD, in 1969. He received the B.S. and M.S. degrees in electrical engineering from the University of Maryland at College Park, in 1991 and 1999, respectively. Since 1992, he has been a full-time employee with the Radar Division, Naval Research Laboratory, Washington, DC. His primary areas of expertise are RF and microwave system design, digital signal processing, and system design of pulse-Doppler radar, active array radar, and multifunction active array systems. He is currently the Technical Director of the AMRFC Program. His primary focus in this program is the development and demonstration of the AMRFC test-bed. His past experience includes the role of Lead RF System Engineer on the Anti-Ship Missile Defense SPQ-9B Radar Program, now planned for installation on many U.S. Navy ships.

Charles L. Hilterbrick (M’68) was born in Hanover, PA. He received the B.S. and M.S. degrees in electrical engineering from the University of Maryland at College Park, in 1964 and 1974, respectively. He was with Northrop Grumman for 33 years until his retirement in 1997. He is currently a consultant to the Naval Research Laboratory, Washington, DC. He is the AMRFC Integration and Test Integrated Product Team (IPT) Lead and has had prime responsibilities for the assembly and integration of the test-bed at the Chesapeake Beach Detachment, Test Facility, NRL. He is a System Engineer with experience in electronic countermeasures, electronic surveillance signal processing, and communications and integrated weapon systems. His past experience includes system-lead for development of the ALQ-165 Electronic Countermeasures System signal processing, Joint Venture Team (JVT) Engineering Manager for the F-23/INEWS competition, and Product Development Manager for the Programmable Digital Radio (PDR).

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James B. Evins (M’96) was born in Austin, TX, in 1961. He received the B.S. degree in electrical engineering from George Washington University, Washington, DC, in 1985. In 1981, he joined the Naval Research Laboratory, Washington, DC, as a cooperative education employee with the Radar Target Characteristics Branch. During his career, he has been involved in the development of digital real-time signal processors for a variety of experimental radar systems. He is currently Head of the Software Systems Section, Advanced Radar Systems Branch, Radar Division, NRL. He is currently the AMRFC Software IPT Lead. His primary area of interest is real-time computing related to radar control and signal processing.

James J. Alter (M’75) received the B.S. and M.S. degrees in electrical engineering from the University of Maryland at College Park, in 1973 and 1980, respectively. Since 1973, he has been with the Radar Division, Naval Research Laboratory, Washington, DC. His main area of interest is the development of real-time radar signal processors. Over his career, he has either designed or led the development of automatic detection equipment, digital sidelobe cancellers, pulse compressors, digital beamformers, and radar control systems. He is currently Head of the Advanced Radar Systems Branch, Radar Division, NRL. His current focus is on the application of field-programmable gate arrays (FPGAs) to radar signal processing.

Joseph G. Crnkovich, Jr. is from Milwaukee, WI. He received the B.S. degree in electrical engineering from Marquette University, Milwaukee, WI, in 1985. Since 1985, he has been a full-time employee with the Naval Research Laboratory (NRL), Washington, DC, where he originally supported development of the North Atlantic Treaty Organization (NATO) Mark XV Interrogation Friend or Foe (IFF) system of the Radar Division before transferring to the Tactical Electronic Warfare Division to provide engineering support to programs. His area of expertise is electronic communication systems. He is currently with the Navy Center for Space Technology, NRL, where he has been the Communications Lead for the AMRFC effort after previously working on a design team to develop the Joint Combat Information Terminal (JCIT), a tactical software-defined radio. He is also currently the Program Manager for the Cooperative Antenna Development Program, a multiagency communications phased-array antenna effort.

Jean W. de Graaf (M’86) received the B.S. degree in electrical engineering from the University of Maryland at College Park, in 1988, and the M.S. degree in electrical engineering from the Colorado State University, Fort Collins, in 1991. He is currently with the Naval Research Laboratory, Washington, DC, where he has been a Systems Engineer for over 12 years. He possesses extensive experience in test and measurement of hardware systems for Naval radars, adaptive signal processing, radar waveform design, and RF/microwave system design. His past experience includes System Lead for the co-development of the digital-array radar (DAR), engineering support (design, testing, and integration) of several successful experimental radar test-beds, and signal processing of several radar data sets (e.g., AN/SPN-43C). He currently serves as the Calibration Lead for the AMRFC test-bed.

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William Habicht II was born in Birmingham, AL, in 1944. He received the B.S.E.E. degree from the University of Delaware, Newark, in 1966, and the M.S. degree in electrical engineering from the University of Illinois at Urbana-Champaign, in 1968. He is the Head of the Systems Development Section, Tactical Electronic Warfare Division, Naval Research Laboratory (NRL), Washington, DC. From 1968 to 1973 he was with the Communications Sciences Division, NRL, where he performed research, design, and development of high-frequency antenna systems. From 1973 to 1976, he was with the Eastman Kodak Company, Rochester, NY. From 1976 to 1978, he was with the Naval Electronic Systems Security Engineering Center, Washington, DC. Since 1978, he has been with the NRL, where he has been involved with EW systems and is currently the Advanced Multifunction RF Concept (AMRFC) High Band Multifunction Receive System (HBMRS) IPT Lead.

David C. Wu (M’65) received the B.S., M.S., and Ph.D. degrees in electrical engineering from The Ohio State University, Corvallis, in 1966, 1967, and 1971 respectively. In 1974, he joined the Tactical Electronic Warfare Division, Naval Research Laboratory (NRL), Washington, DC. His research includes multipath analysis for phase interferometer direction-finding systems, antenna/radome analysis, high-frequency scattering, mutual coupling, and antenna performance, design of large anechoic chamber and seeker hardware-in-the loop simulation facility, electronic counter measures (ECMs) and electronic counter–counter measures (ECCMs) techniques, and system analysis. He was instrumental in the design and development of hardware in the Loop Simulation Facility, the central target simulator at the NRL. He is currently Head of the RF Systems Engineering Section, Surface EW Branch, NRL. He serves as Project Manager on the High Band Multifunction Transmit System and supports integration of the test-bed at the Chesapeake Beach Detachment, Test Facility, NRL.

Gregory P. Hrin (M’80) was born in McKeesport, PA, in 1951. He received the B.S. and M.S. degrees in electrical engineering and the Master of engineering degree from Carnegie–Mellon University, Pittsburgh, PA, in 1973, 1975, and 1975, respectively. Since 1976, he has been a full-time employee with the Tactical Electronic Warfare Division, Naval Research Laboratory. His primary areas of expertise are RF and microwave system design, EA jamming system design, waveform and EA technique generation, and multifunction active array systems. He is currently the Chairman of the Signal Generation IPT for the AMRFC project, and is responsible for the design and implementation of signal-generation hardware that serves to produce radar, EA, and local-oscillator/reference signals for the AMRFC test-bed. His past experience includes the design of the Search Radar EA Simulator Laboratory and developmental EA techniques generators used in numerous at-sea tests during U.S. Navy fleet exercises.

Steven A. Lessin (M’88) was born in Brooklyn, NY, in 1955. He received the B.S. degree in electrical engineering from George Mason University, Fairfax, VA, in 1988. Since 1989, he has been a full-time employee with the Radar Division, Naval Research Laboratory, Washington, DC. His primary areas of expertise include RF and microwave system design, pulse-Doppler radar, and active array systems. Some other areas of his expertise include ultrahigh-performance ADCs, DACs, and local oscillator (LO) and waveform generation. He is currently the Technical Lead responsible for the generation and distribution of all fixed tones utilized within the AMRFC test-bed. His past roles include Lead RF Engineer on the SPQ-9B Advanced Development Model (ADM) Program, Future Surveillance Radar (FSR) study group, SPY-1, high-range resolution (HRR) test-bed, and Swarm three-dimensional (3-D) UAV radar.

Stephen M. Hagewood was born in Louisville, KY, in 1973. He attended Carson-Newman College, Jefferson City, TN, for two years. He received the B.S. degree in computer science from the Tennessee Technological University, Cookeville, in 1997. He also earned minors from the Schools of Math, Physics, Business, Psychology, Spanish, and Social Sciences. He is currently working toward the M.S. degree in systems engineering at George Mason University, Fairfax, VA. From 1995 to 1997, he was a part-time employee with Philips Consumer Electronics. Since 1997, he has been a full-time employee with the Dahlgren Division, Naval Surface Warfare Center, Dahlgren, VA, where his expertise is software development. Since 1999, he has been a part of the AMRFC team and serves as the AMRFC Software Manager.

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Multifunction Millimeter-Wave Systems for Armored Vehicle Application John H. Wehling

Abstract—There is an emerging need for millimeter-wave capabilities on military vehicles; in order to make such capabilities more affordable, we have been experimenting with the notion of combining multiple functions into a single device. The functions to be performed simultaneously include: 1) active protection (AP) radar for point defense against antitank threats; 2) surveillance radar for airborne and ground targets; 3) trunking radio for mobile ad hoc networking at a high data rate ( 100 Mb/s); and 4) combat identification (ID). Due to a unique combination of characteristics, millimeter-wave radios, radars, and other sensors are attractive for military vehicle use. These characteristics include: 1) smaller profile/footprint of the high-gain antennas; 2) adequate weather penetration; 3) antijam, low probability of intercept, low probability of detection; and 4) wide bandwidth. For the combination of applications identified, this need is best met via a system operating near the 35-GHz atmospheric transmission window. Current mobile millimeter-wave ground-based systems (AP radar, wide-band communication, and combat ID) utilize highly directional steerable beams. Mechanical beam steering is usually done, resulting in restricted beam agility. Nevertheless, mechanical beam-steering performance is acceptable for AP radar and combat ID systems (but not for Joint Tactical Radio networked communications). A true multifunction system, however, requires beam-steering speeds that far exceed capabilities of even the best mechanical technologies. This is due to the need to support either networking or simultaneous multifunctions via time-shared beam steering. Thus, a true multifunction system must steer its beam anywhere in the upper hemisphere in less than 1 ms. Phased arrays are the obvious solution to these needs. Unfortunately, past phased-array technologies were unaffordable for Army vehicle application—hence, the multiplicity of systems. However, a new trend in development of affordable phased-array -band antennas enables development of affordable -band multifunction systems. Index Terms—Combat identification (ID), friendly fire, -band, millimeter-wave radar, millimeter-wave radio, mobile ad hoc networking, multifunction systems.

I. ACTIVE PROTECTION (AP) RADAR FOR DEFENSE AGAINST ANTITANK WEAPONS

L

IGHT armored vehicles are increasingly vulnerable to a variety of antitank weapons. These range from shoulderlaunched rocket-propelled grenades ( 200 m/s) to tank-fired kinetic energy rounds ( 1500 m/s). Significant research and development has been done to produce prototype active protection (AP) systems to counter these threats. Components of a typical

Manuscript received February 24, 2004. The author is with Northrop Grumman Mission Systems, Carson, CA 902746 USA. Digital Object Identifier 10.1109/TMTT.2005.843504

AP system are: 1) optical sensor to detect the flash from an antitank weapon fired at the protected vehicle; 2) AP radar to track the threat and to do counter-munition fire control; and 3) interceptor missile to counter the incoming threat. Due to size limitations, AP radars typically function in the millimeter-wave band. Past AP radar developments functioned near the atmospheric absorption windows at 35 and 94 GHz. In addition, other short-range AP radars have operated in the 60-GHz high-absorption region. Figs. 2 and 3 show second- and third-generation AP radars, developed by Northrop Grumman, Redondo Beach, CA. Both radars are gimbaled and operate at -band. AP radars require narrow beams 5 for the required precision tracking. Due to the speed of incoming threats, the radar beams must steer rapidly. Thus, AP radars should ideally use phased-array (e.g., electronically steered) antennas. However, due to the immature phased-array technology at millimeter-wave frequencies, past AP radar developments have used gimbaled or other mechanical beam steering. Recently, however, phased-array technology at 35 GHz has matured sufficiently to enable development of affordable AP radars incorporating phased arrays. This antenna technology is maturing to address the full spectrum of AP threats and the multifunction mission. AP radars must utilize waveforms, which enable precision tracking and fire control. Developmental AP radars have used two different waveforms called pulse Doppler and FM continuous wave (FMCW). Early developmental AP radars utilized FMCW radars. However, there is a trend toward pulse Doppler radars in new AP radar developments. The key advantage of pulse Doppler is the 50% reduction in antenna real estate relative to FMCW. This switch to pulse Doppler is enabled by recent -band phased-array antennas. development of high-powered A pulse Doppler radar detects and tracks targets with coherent bursts of high duty cycle short pulses. The radar rapidly switches back and forth between transmitting and receiving, but never transmits and receives simultaneously. Thus, the radar design avoids the problem of isolating the high power transmit channel from the sensitive receive channel. In target tracking, the pulse Doppler radar continuously adjusts its transmitter pulse timing to avoid eclipsing the received target return pulses. Range and range rate are measured, respectively, by sensing target return time delay and Doppler shift (via fast Fourier transforms (FFTs) in a signal processor). Time-delay ambiguities are resolved by using two or more pulse rates. Some pulse Doppler radars impose additional phase and/or frequency modulation (FM) on the pulse burst. This modulation can improve range resolution below the pulsewidth range equivalent.

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W

Fig. 2. Third-generation -band AP radar integrated onto armored vehicle, Northrop Grumman Space & Technology.

(a)

Ka

(b)

Fig. 1. (a) -band multifunction electronically scanned antenna (KAMS) array, Northrop Grumman has successfully built and tested the first -band Active two-dimensional (2-D) electronically steered array. (b) KAMS antenna -band near field antenna range. demonstrated predicted performance on

Ka

Ka

In contrast to pulse Doppler, FMCW radars transmit and receive continuously (no pulsing). The FMCW design is simplified, relative to pulse Doppler, in eliminating the need to adaptively control transmit/receive switching. However, the FMCW radar design must achieve adequate isolation between transmit and receive channels. The need for isolation makes the radar design much more difficult. The FMCW waveform is FM. Target detection and tracking use repeated FM intervals. Target range is measured via sensing of the frequency change from transmit to receive. The FMCW receiver measures the target return difference frequency via mixing of transmit and received signals. Thus, the FMCW receiver functions as a frequency-subtraction device. The target range and range rate are measured via additional signal processing of the measured difference frequency. Range is related to the transmit/receive frequency shift, while range rate is related to the usual Doppler shift. Both linear and sinusoidal FM has been used successfully in past AP radar developments. The two primary AP radar waveforms each have advantages and disadvantages. Pulse Doppler requires more complex elec-

Fig. 3. Second-generation Space & Technology.

W -band gimbaled AP radar, Northrop Grumman

tronics, but has the advantage of a shared transmit–receive antenna [see, e.g., Fig. 1(a)]. This is a key advantage for armored vehicles, where real estate is strongly limited. For phased-array AP radars, pulse Doppler is a clear choice, due to the high cost of each phased-array antenna. Thus, the trend toward phased-array antennas leads to a trend toward pulse Doppler in new AP radar developments. FMCW radars use simpler electronics and signal processing, but require separate transmit–receive antennas (see, e.g., Figs. 2 and 3). The need for transmit/receive isolation leads to separation of transmit and receive antennas. Relative to pulse Doppler, the FMCW antenna pair takes more than twice the real estate. FMCW does have the advantage of 100% duty cycle, which makes maximum utilization of transmitter power. However, this power advantage is only important in radars that use single transmitters, and are limited to low power ( 1 W). Pulse Doppler radars using phased arrays with multiple transmitters W. This ability of phased arrays can achieve power levels

WEHLING: MULTIFUNCTION MILLIMETER-WAVE SYSTEMS FOR ARMORED VEHICLE APPLICATION

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Fig. 4. Northrop Grumman BCIS integrated onto M-1 tank.

to achieve high power levels negates the relatively small duty cycle advantage of FMCW radars. A. Surveillance Radar Radar surveillance is done to monitor ground and air traffic in the vicinity of the vehicle. Also, surveillance may be required to detect top attack antitank weapons, which may be undetectable by optical cueing sensors (e.g., sense and destroy armor (SADARM) and foreign SADARM variants). Thus, there is a need for surveillance against these threats. Most AP radar developments have included surveillance capabilities. II. COMBAT IDENTIFICATION FOR PREVENTION OF FRIENDLY FIRE INCIDENTS Due to the high percentage of friendly fire incidents in the 1991 Gulf War, the U.S. Army developed a Battlefield Combat Identification System (BCIS), contracted to Northrop Grumman Space Technology (see Fig. 4). This is an interrogation-response system, operating near the 35-GHz atmospheric absorption window. Prior to engaging a probable enemy vehicle, the BCIS system sends a coded interrogation signal to the target vehicle. Friendly vehicles equipped with BCIS return a coded response signal, and are identified as friendly by a voice to the gunner and a symbol in the gunner’s weapons sight. This total processing thread takes place within the existing timeline for firing the gun. Vehicles not equipped with BCIS are identified as unknown. A second-generation combat identification (ID) system is under development. The new system, called the Battlefield Target Identification System (BTID), operates at a slightly

lower frequency than BCIS, and does an interrogation-response similar to BCIS. BTID, however, uses a new, North-Atlantic Treaty Organization (NATO)-compatible waveform. Use of the NATO waveform enables interoperability among all NATO users of similar millimeter-wave systems built to NATO standards. Combat ID systems must have high immunity to enemy jamming. They also must prevent enemy spoofing of the ID process. The BCIS and BTID systems counter enemy jamming utilizing spread-spectrum techniques (binary phase-shift keyed). Spoofing is prevented through encryption of the BCIS/BTID messages. This combined use of spread spectrum and encryption ensures high reliability combat ID, which cannot be spoofed. III. HIGH-BAND COMMUNICATIONS FOR MOBILE AD HOC NETWORKING There is an increasing demand for ad hoc network communications between mobile army vehicles. There is also an emerging need for high data rates ( 100 Mb/s). The high data rates are needed for low latency relays of high-resolution images and other large data files required in the digitized battlefield. Legacy Army radios, operating below 2 GHz, are incapable of meeting this need. Data rates are strongly limited, due to limited spectrum availability, and the use of omnidirectional antennas. Early development is under way for a new generation of mobile networking radios called high-band radios. Key features of high-band radios are: 1) data rates approaching 100 Mb/s; with 2) narrow-beam high-gain antennas beamwidth

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(a) Fig. 6. Generic multifunction system architecture, for radar, combat ID, and high-band communication.

(b)

(c) Fig. 5. (a) Prototype Northrop Grumman communications 38-GHz radio achieves 32.5 Mb/s at 45 mi/h. (b) CDMA modem achieves 100 Mb/s. (c) Typical CDMA code cross-correlation function, 5-bit message.

(DARPA’s) Future Combat System (FCS) Communication Program. This radio demonstrated 32.5 Mb/s in a 45-mi/h mobile test. The radio also demonstrated 5-km range in a separate static test. Development is under way for second-generation high-band radios, with electronically steered antennas, and Mb/s. Fig. 5(b) shows a recently developed data rates 100-Mb/s modem, also developed on the FCS communications program. The radios shown in Fig. 5(a) and (b) use complex waveforms called code division multiple access, quadrature phase-shift keyed, time division duplexing (CDMA/QPSK/TDD). The CDMA encoding enables different messages to be directed to different users of the same communication channel [up to 20 users for the modems in Fig. 5(a) and (b)]. In CDMA, multiple binary channels are encoded with orthogonal binary CDMA code [20 independent codes/data channels and 64-bit CDMA code lengths are used for the the radio/modems shown in Fig. 5(a) and (b)]. Individual data channels are retrieved in the receiver via matched filtering. In matched filter processing, the receiver/modem cross correlates individual CDMA codes against the received baseband signal. Fig. 5(c) shows a typical cross-correlation function for a 64-chip CDMA code and a 5-bit message. In addition, QPSK modulation is imposed on each CDMA channel to achieve 2 bit/symbol. The resulting waveform employs complex amplitude/phase modulation, and requires operation in the linear region of the transmitter. The TDD refers to the half duplex communication used by these radios. In TDD, pairs of communication radios take turns transmitting and receiving, with each radio transmitting approximately 50% of the time. The TDD timing is synchronized to global positioning system (GPS) 1-s epochs, which enables rapid acquisition when two radios initiate communication. IV. MULTIFUNCTION RF SYSTEMS

beam-steering ability; 3) spatial reuse of RF spectrum; 4) operation near 35 GHz; and 5) mobile line-of-sight communication range exceeds 10 km. Fig. 5(a) shows a prototype 38-GHz high-band radio, developed on the Defense Advanced Research Projects Agency’s

There are clear similarities in the radar, communication, and combat ID systems described above. All can function near 35 GHz. All require agile narrow-beam antennas. All utilize monolithic-microwave integrated-circuit (MMIC)-based transceivers. For U.S. Army application, all require utilization of

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Fig. 7. Multifunction RF system block diagram.

waveforms that are low probability of intercept, low probability of detection, and antijam (LPI/LPD/AJ). These similarities -band multifunction should enable development of a system, which exploits the similarities in the single-function systems. Indeed, any multifunction system that includes the -band. NATO combat ID must operate at the A true multifunction system must achieve upper hemisphere coverage to meet the needs of the individual functions. Also, difficult timing requirements must be met. AP radars and highband communications both require fast beam steering ( 1 ms) over the upper hemisphere. Thus, phased-array antennas are required, despite the limited solid angle coverage (a single array typically covers 25% of the upper hemisphere). There is also a need for different functions to work simultaneously. These difficult requirements can only be met with a multifunction system using multiple phased-array antennas. Fig. 6 shows a high-level systems architecture, which meets all these needs. Fig. 7 shows a multifunction architecture and associated technologies for an ongoing program. There are multiple angle sectors covering the upper hemisphere. Individual angle sectors function simultaneously and independently, as managed by the control computer. A single sector can time share different functions via electronic beam steering. Thus, the architecture meets the need to support all functions simultaneously. REFERENCES [1] J. H. Wehling, “Multifunction millimeter-wave system for radar, communications, IFF, and surveillance,” U.S. Patent 6 693 580 B1, Feb. 17, 2004.

John H. Wehling received the Ph.D. degree in physics from the University of Hawaii, Honolulu, HI, in 1972. He is currently a Senior Engineer with Northrop Grumman Battlefield Command & Communication Systems, Carson, CA. He has an extensive background in millimeter-wave communications and radar systems.

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Toward Multistandard Mobile Terminals—Fully Integrated Receivers Requirements and Architectures Massimo Brandolini, Student Member, IEEE, Paolo Rossi, Student Member, IEEE, Danilo Manstretta, Member, IEEE, and Francesco Svelto, Member, IEEE

Abstract—In the recent past, there has been an evolution in wireless communications toward multifunctions and multistandard mobile terminals. Reducing the number of external components to a minimum is key when the same mobile terminal has to process several different standards. Highly integrated solutions in low-cost silicon technologies are thus required. Zero-IF and low-IF receiver architectures are most suitable for a high level of integration. This paper presents a review of global system for mobile communications, universal mobile telecommuniation system, Bluetooth, and wireless local area network (IEEE802.11a, b, g and HiperLAN2) standards, likely to all be present in the “universal” terminal of the future, enabling global roaming and wireless connectivity. The various standards are analyzed in order to find the optimal architecture and the building-block specifications for the receive section, with particular care to the RF front-end. State-of-the-art solutions are discussed, with emphasis on direct conversion CMOS implementations. A multistandard architecture for a fully-integrated CMOS receiver is proposed. Index Terms—BiCMOS, Bluetooth, CMOS, global system for mobile communications (GSM), low IF, low-noise amplifier (LNA), mixer, multistandard, radio receivers, universal mobile telecommuniation system (UMTS), voltage-controlled oscillator (VCO), wireless communications, wireless local area networks (LANs), zero IF.

I. INTRODUCTION

O

NE OF the most recent and interesting evolutions in the wireless communications area is the trend toward the integration of multiple functions (phone, video-game console, personal digital assistant, digital camera, web-browser, e-mail, etc.) into a wireless device that can be used anywhere in the world. An enabling factor of this evolution is the increasing availability of multistandard terminals, integrated in low-cost silicon technologies, that can communicate efficiently, using many different standards, for voice and data, depending on the availability and convenience. The ultimate solution for the radio of such a multifunctional terminal would be a multistandard radio, built in a very low-cost CMOS technology, capable of being programmed to operate according to all major communications standards. For a multistandard radio to be valuable, it needs to be less expensive than the simple compound of all separate radios and

Manuscript received March 26, 2004; revised September 23, 2004. This work was supported by the Italian National Program Fondo per gli Investimenti della Ricerca di Base under Contract RBNE01F582. M. Brandolini, P. Rossi, and F. Svelto are with the Dipartimento di Elettronica, Università degli Studi di Pavia, I-27100 Pavia, Italy (e-mail: massimo. [email protected]; [email protected]; [email protected]). D. Manstretta was with the Dipartimento di Elettronica, Università degli Studi di Pavia, I-27100 Pavia, Italy. He is now with the Broadcom Corporation, Irvine, CA 92618 USA (e-mail: [email protected]). Digital Object Identifier 10.1109/TMTT.2005.843505

still give acceptably good performance and low power dissipation. This can only result from a large scale of integration, the elimination of as many expensive external components as possible to reduce the bill of materials, and extensive resource reuse among different transceivers in order to limit chip area to a minimum. Different aspects need to be considered, starting from the antenna down to the digital signal processor (DSP) and medium access control (MAC) interfaces. In this paper, we evaluate the possibility of integration of one of the most challenging parts of the receiver: the RF front-end. This is typically a crucial part, requiring high dynamic range (low noise, large signal-handling capability, and high linearity), especially in fully integrated solutions. In this paper, we consider the main standards for personal communications currently deployed: global system for mobile communications (GSM) and universal mobile telecommunication system (UMTS) for cellular telephony, are treated respectively in Sections II and III, Bluetooth, for short range communications, in Section IV, and 802.11b-g, 802.11a, and HiperLAN2, for wireless local area network (LAN) access, in Section V. For each standard, the specifications of the receiver are derived and used to investigate the optimal architecture for a CMOS implementation. In each section, both commercial products and published research solutions are reviewed in order to better explain the different possible approaches and the various tradeoffs involved. Section VI formulates a proposal for a multistandard RF front-end. Bluetooth, operating simultaneously with other received signal, would have a dedicated processing path, while all the other standards would share the same path in an adaptive zero-IF/low-IF solution. The reconfiguration of both RF and analog baseband blocks is the key point to keep consumption within acceptable levels. Finally, Section VII draws the conclusions. II. GSM The original version of the GSM standard, developed by the European Telecommunication Standards Institute (ETSI), Sophia Antipolis Cedex, France, was operative in the 900-MHz band, and used throughout Europe. Today, as shown in Fig. 1, the GSM standard is used worldwide and has evolved from the original version to a family of three sub-systems, frequency and geographically spaced. Enhanced global system for mobile communications (E-GSM) and the digital cellular communication system (DCS) are both used in Europe, while personal communication services (PCSs) has been deployed in the U.S. The most relevant characteristics of the GSM signals are summarized in Table I. Since the receiver requirements set by

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Fig. 1. GSM frequency plan.

TABLE I GSM SIGNAL CHARACTERISTICS

Fig. 2.

E-GSM blocking mask.

Fig. 3.

E-GSM “AM suppression test.”

E-GSM, DCS, and PCS are very similar and the E-GSM is the most severe GSM version in terms of receiver specifications, we will analyze this sub-system of the standard. A. E-GSM Receiver Requirements For the E-GSM standard [1] a bit error rate (BER) lower than 10 (or, equivalently, a 9-dB signal-to-noise ratio at the demodulator input) has to be achieved with a 102-dBm input sensitivity, in the presence of additive white Gaussian noise. For the 200-kHz-wide E-GSM signal, a 9-dB maximum noise figure (NF) is allowed at the antenna connector. Consequently, the equivalent antenna-referred noise floor has to be kept below 111 dBm. The intermodulation test specifies a Gaussian minimum shift keying (GMSK) signal 3 dB above the sensitivity level has to be detectable in presence of a 49-dBm continuous wave and a 49-dBm GMSK modulated interferer placed at 800- and 1600-kHz frequency offset from the desired signal, respectively. Therefore, the required third-order input intercept point (IIP3) is 18 dBm. Due to the large allowed power of in-band signals, one of the most stringent requirement set by the E-GSM standard is the local oscillator (LO) phase noise (PN). Fig. 2 shows the in-band blocking profile for E-GSM. In this test case, a 99-dBm GMSK desired signal is received together with a continuous wave (blocker) whose power is a function of the frequency offset from the desired signal. The reciprocal mixing has to be kept below the noise floor or, equivalently,

kHz

noise floor

(1)

is the PN at the frequency offset from oscilwhere lator carrier and is the interferer power. The worst condition is set by the 3-MHz blocker, giving a PN specification

of 141 dBc/Hz. The voltage-controlled oscillator (VCO) must also guarantee a tuning range of 60 MHz. The E-GSM standard sets a very stringent second-order input intercept-point (IIP2) specification, a challenging requirement for zero-IF and low-IF receivers. Although the constant-envelope GMSK modulation would not generate wide-band second-order intermodulation (IM2) products by its own, the standard specifies an AM suppression test [1]. This test was introduced in order to avoid receiver desensitization in presence of a GMSK pulse jammer, as produced by the on/off-switching signal on another carrier. According to the standard, a 99-dBm desired signal has to be correctly demodulated in presence of a 31-dBm AM modulated interferer, as shown in Fig. 3. The IIP2 specification can be calculated as follows:

noise floor

(2)

is the AM modulated interferer power. As a result, where an IIP2 of at least 49 dBm has to be achieved. This is a very challenging specification because, with a typical 16–18-dB lownoise amplifier (LNA) gain, the IIP2 requirement for the down70 dBm for a zero-IF or low-IF reconverter is at least 65 ceiver. The fundamental limits of down-converters second-order nonlinearity have been already discussed, both for CMOS [2] and BiCMOS [3] implementations. Up to date, this issue has been solved by trimming the mixer load [4] or by means of calibration techniques [5], [6]. Table II summarizes the E-GSM receiver specifications calculated at the antenna connector. Notice that taking into account the attenuation profile of a commercial

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TABLE II E-GSM RECEIVER SPECIFICATIONS

RF filter,1 the maximum allowed NF drops to 6 dB when reported at the receiver input. B. GSM Receivers: Evolution and State-of-the-Art The first integrated GSM transceivers were employing a variety of architectures and technologies. The dominant solutions in the market, however, were classical superheterodyne architectures with RF and IF surface acoustic wave (SAW) filters and several external components. These solutions, heavily drawing from past discrete-type designs, had an advantage in terms of time-to-market and could reliably meet the tough GSM specifications, but were relatively expensive and power hungry. Through the years, there has been a trend toward higher levels of integration, mainly aiming at lower cost and lower power consumption [7]. A pioneering attempt was made, in this direction, trying to use a direct-conversion architecture [8]. This solution, implemented in a bipolar technology, was using extensive digital calibration techniques in order to reduce dc offset and meet the stringent IIP2 requirement, resulting in a considerable area increase and a high-resolution requirement for the ADC. A critical disadvantage for a direct conversion or low-IF noise. Due to the narrow implementation in CMOS is noise can significantly (200 kHz) channel bandwidth, degrade the overall noise performance. Nonetheless, CMOS solutions have appeared in literature [9], [10], and commercial products in this technology are rapidly growing in market share [7]. In order to avoid some of the problems of direct conversion, [9] uses dual-conversion architecture. Careful system considerations lead to the choice of a first IF of 190 MHz. Since no external filters are used, a very challenging 110 dB of image-rejection is required. More recently, another trend has emerged: multiband (E-GSM, DCS, PCS) commercial solutions, implemented in SiGe, bipolar, and even CMOS technologies, using zero-IF and low-IF architectures [5], [6], [11], [12]. Power consumption is considerably lower with respect to earlier solutions and the total system cost is lower. In direct conversion solutions, the critical IIP2 specification is met through the use of efficient calibration algorithms. C. E-GSM Receiver: Proposed RF Front-End Architecture Targeting a CMOS fully integrated solution, the best compromise is offered by a low-IF architecture with an IF frequency of 100 kHz [see Fig. 4(a)]. With this choice of IF, the image signal is the tail of the alternate channel lying in the adjacent channel 1TSM942AW9B (E-GSM SAW filter), Sanyo, Osaka, Japan. [Online]. Available: http://www.sanyo.com

Fig. 4. (a) Proposed E-GSM CMOS low-IF receiver. (b) Image suppression requirement. TABLE III E-GSM FRONT-END SPECIFICATIONS

band [see Fig. 4(b)]. A 32-dB image rejection will reduce the alternate channel power to the adjacent channel power, whose tail [directly superimposed onto the desired signal, see Fig. 4(b)] does not corrupt the BER performance [10]. active mixer) are The RF front-end specifications (LNA summarized in Table III. The LNA gain has to be very high (23 dB) to limit the noise contributions of the mixers and baseband blocks. The LNA NF requirement (3 dB) takes into account a typical balun IL (0.5–1 dB). The down-converter is the most critical block because of the very critical noise and linearity performance. The baseband chain comprises two variable gain amplifiers (VGAs) and a fourth-order Butterworth filter. In this way, a 9-bit ADC is adequate. Image suppression is performed in the digital domain. LO self-mixing and mismatches in the down-converter generate dc offsets at the mixer differential output. Amplified by the baseband gain, these dc offsets may become very large and overload the ADC or the last blocks of the receiver chain, causing signal corruption. A 6-kHz-pole high-pass (HP) filter may be implemented at the first VGA input to remove dc offset and reduce low-frequency noise and IM2 [13].

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Fig. 5.

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UMTS: spreading and de-spreading processes.

D. GSM—Conclusions We conclude that the design of a CMOS low-IF GSM receiver noise contribution in is very challenging, especially for the the narrow-band 200-kHz-wide baseband channel and for the very high IIP2 requirement. Zero-IF architecture would suffer from the same concerns; moreover, the GSM signal contains significant energy at very low frequencies, making more critical the dc offset cancellation. These considerations could lead to an IF higher than 100 kHz to avoid low-frequency problems, but this choice would need a tremendous image suppression to be guaranteed on-chip [9]. III. UMTS The third generation (3G) of global wireless systems provides voice and information services with various data rates using wide-band code-division multiple access (WCDMA). The European 3G version, called UMTS—terrestrial radio access (UTRA)2 specifies data rates up to 384 kb/s for outdoor applications and up to 2 Mb/s indoors. The information-bearing signal is modulated by a pseudorandom sequence (spreading code). Through this spreading process, the signal bandwidth (variable from 8 to 384 kHz) is broadened up to nearly the code bandwidth (fixed to 3.84 MHz). The resulting wide-band signal modulates the carrier with quadrature phase-shift keying (QPSK) in the downlink process. At the receiver, the de-spreading process uses the same code applied in the transmitter to recover the original spectrum of the data signal, whose power spectral density increases by an amount given by the spreading factor (SF) (3) where and are the bit and chip durations, respectively. The result of the spreading and de-spreading operations on the signal bandwidth is illustrated in Fig. 5. The code generated in the receiver must be well synchronized to the desired signal since timing errors result in SNR loss. UMTS is a continuously transmitting and receiving frequency division duplexing (FDD) system. At the user equipment side, the TX band is located between 1920–1980 MHz, while the RX band is between 2110–2170 MHz. The minimum frequency TX–RX spacing is, thus, 135 MHz. The channel spacing is 5 MHz. As shown in Section III-A, due to the duplexing technique adopted by UMTS, a highly linear receiver is required to reject the transmitter leakage into the RX section.

Fig. 6. UMTS: maximum allowed NF as a function of IIP2 with LO PN as a parameter.

A. UMTS Receiver Specifications For a highly integrated UMTS receiver solution, zero-IF and low-IF architectures are of primary interest. In these cases, the receiver specifications heavily depend on commercial duplexers performance. The following receiver requirements are obtained referring to an available product3 that shows 1.8-dB insertion loss (IL) and 54-dB isolation between TX and RX sections. In the sensitivity test, considering only antenna and receiver noise, a 9-dB NF and 99-dBm antenna-referred maximum noise power are needed not to exceed the 10 BER, as required and reciprocal [14]. IM2 products due to transmitter mixing of TX leakage due to oscillator PN also need to be considered in the sensitivity test and added to the receiver noise [15]. Consequently, the following relation holds: dBm

(4)

is the antenna referred receiver thermal noise. where Considering a class-III UMTS transmitter , the TX leakage is 30 dBm. In Fig. 6, the tradeoff given by (4) can be evaluated. The reciprocal mixing product is made negligible setting the PN specification at 150 dBc/Hz at 135-MHz offset. In order to keep the NF specification within acceptable limits, an IIP2 requirement of at least 46 dBm has to be met. The resulting noise target is a 6-dB NF (referred at the receiver input). The transmitter leakage is also responsible for intermodulation products due to third-order nonlinearity, together with an out-of-band continuous wave interferer. In the worst case, these two interfering signals are placed, respectively, 135 and 67.5 MHz apart from the receive band. Since the desired signal power is 3 dB above the sensitivity level in presence of out-ofband interferers and the noise level is 99 dBm, the upper limit for the third-order intermodulation product is set at 99 dBm as , evaluwell. The required out-of-band IIP3 ated at the receiver input, is given by dBm dBm dBm

dBm dB (5)

23G

Partnership Project, Technical Specification Group Radio Access Networks, UE Radio Transmission and Reception (FDD), rel. 1999, V3.13.0 (2003-03)

3Murata, Kyoto, Japan, part DFYK61G95LBJCA. [Online]. Available: http://www.murata.com

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TABLE IV UMTS FRONT-END SPECIFICATIONS

Fig. 7. Proposed UMTS CMOS zero-IF receiver.

where is the transmitter leakage power into the receiver, is the continuous wave power ( 40 dBm at the receiver input), and IM3 is the power of the third-order intermodulation product. Finally, the standard sets an in-band intermodulation test, where the following interferers are considered: a 46-dBm continuous wave and a 46-dBm WCDMA-modulated interfering signal, placed 10 and 20 MHz apart from the desired signal carrier frequency. The resulting antenna referred in-band IIP3 requirement is 17 dBm [14]. Notice that, while the in-band requirement demands high linearity throughout the receiver (including the baseband circuits), the out-of-band specification mainly affects the RF front-end because the interferers can be strongly attenuated at the down-converter output, at least in the zero-IF or low-IF architectures. B. UMTS Receiver: State-of-the-Art The state-of-the-art solution for a UMTS receiver employs a bandpass RF filter placed between two LNAs in the front-end section in order to attenuate the TX leakage in the receive path and relax the IIP2 specification [16]–[18]. The zero-IF architecture is the best solution for a UMTS highly integrated RX [14], [15], [19], [20]. In fact, a low-IF approach would lead to a higher image rejection and ADC dynamic-range requirements [14]. At the same time, the typical drawbacks of the zero-IF arnoise, chitectures like dc offset and, in CMOS technology, are of minor concern due to the wide-band nature of the signal. Furthermore, in a fully integrated solution, the inter-stage SAW filter has to be eliminated, and the stringent IIP2 requirement is met by on-chip techniques. Since in the zero-IF architecture the image is the signal itself, and due to the low SNR required, 23 dB of I/Q accuracy are sufficient. BiCMOS technology allows very low NFs [19], [20], thus alleviating the NF versus IIP2 tradeoff. However, CMOS zero-IF feasibility has already been demonstrated [15], [16]. C. UMTS Receiver: The Proposed Solution The proposed zero-IF solution for a CMOS UMTS receiver is shown in Fig. 7. The RF front-end consists of an LNA and an active down-converter. The baseband is made of two VGAs, a fourth-order Butterworth filter, and a 6-bit ADC. Table IV summarizes the RF-section requirements. As previously mentioned, the front-end has to be very linear, both in terms of IIP3 and IIP2. The mixer IIP2 requirement is very tough, and can be met, in CMOS technology, by means of calibrations. The front-end

noise performance is quite stringent. A 2-dB LNA NF is required to account for a typical 0.5–1-dB balun IL; the estimated input-referred noise density for the mixer is 4.5 nV/ Hz. With approximately 33 dB of maximum front-end gain, the baseband noise contribution can be made negligible in the overall noise budget. The VCO minimum tuning range is set to 60 MHz. An HP filter removes the dc offset. With the baseband signal going from dc to 1.92 MHz, HP cutoff frequency of several kilohertz does not lead to a significant SNR degradation [14]. D. UMTS—Conclusions UMTS sets stringent requirements in terms of noise and linearity for a zero-IF CMOS receiver. Careful design allows to meet linearity specification without the use of an additional external SAW filter between the LNA and mixer. The resulting IIP2 and IIP3 are strongly dependent on the duplexer TX-to-RX isolation performance and on the class of transmitter used. Thanks to the large-signal bandwidth, dc offset and noise are of minor concern. Therefore, zero IF is the most suited architecture for a fully integrated solution. IV. BLUETOOTH At the beginning of 1998, a special interest group (SIG) was formed to develop a standard for short-range radio connectivity between electronic devices [21]. The SIG, composed by nine major telecom and PC companies, at the end of 1999 published the first version of the Bluetooth protocol. The purpose of these companies was to build a low-cost and low-power RF technology for short-range communications. This enables to replace the special cables used today for interconnection. Moreover, the Bluetooth technology can be used to provide ad hoc networks or data/voice access points. In this scenario, the Bluetooth standard was developed to allow a global operation range and a low-cost single-chip implementation [21], [22]. The choice of the frequency allocation, in the 2.4-GHz license-free industrial–scientific–medical (ISM) band, enables a worldwide diffusion, while frequency-hopping spread-spectrum (FHSS) modulation has the advantage of interference immunity (from sources like microwave ovens and cordless phones). During the radio connection, Bluetooth devices share a 1-MHz-wide channel binary frequency shift keying (BFSK) modulated and Gaussian shaped. Since Bluetooth chips are intended for portable battery-driven equipments like cellular phones and personal digital assistants, provisions for saving power consumption are mandatory. Time division duplexing eliminates the need for separate TX and RX oscillators and for expensive duplex filters. Moreover, at the transmitter side, the choice of BFSK constant-envelope signals allows the use of efficient transmitter architectures based on VCO or synthesizer direct modulation. The standard specifies

BRANDOLINI et al.: TOWARDS MULTISTANDARD MOBILE TERMINALS

Fig. 8.

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Proposed Bluetooth CMOS low-IF receiver [23].

three TX classes of 0-, 4-, and 20-dBm maximum power with an expected range of 10–50 m. At the receiver side, a high-sensitivity level ( 70 dBm) is specified4 to allow the choice of inexpensive RF filters and CMOS single-chip implementations. A. Bluetooth Receiver Specifications and State-of-the-Art The 70-dBm sensitivity level translates in a huge 44-dB input available SNR. Besides, BFSK modulation allows the use of limiters and analog demodulators in the RX chain, avoiding power-hungry digital demodulators [23]. The specified 10 maximum BER can be achieved with a 21-dB SNR. As a result, an NF as high as 23 dB is allowed. In addition, the linearity requirement is relaxed. The intermodulation test specifies 39-dBm interferers with 64-dBm received signal, yielding an IIP3 of 15 dBm. The blockers mask sets a PN specification of 109 dBc/Hz at 1-MHz offset from the carrier, a much simpler requirement compared to cellular phones standards. The bandwidth that the VCO covers spans 2.4–2.48 GHz. The most attractive architecture for a Bluetooth receiver is low IF. In this case, the required 29-dB image rejection [23] can be easily obtained without particular effort and power consumption. This compares to an image-rejection requirement of approximately 34 dB for direct conversion. Moreover, the Gaussian-shaped BFSK signal has most of its energy in approximately 200 kHz (3-dB bandwidth) so that a zero-IF CMOS noise. solution would require some effort to address Most of the Bluetooth commercial solutions employ inexpensive fully integrated CMOS low-IF receivers [23]–[30] with an IF of 1 or 2 MHz. The image suppression is achieved in the analog domain by poly-phase or complex tunable filters. Low-IF receivers are strongly preferred over direct conversion [31] or superheterodyne [32] versions because the former easily allow very good sensitivity performance with very low power consumption. B. Bluetooth Receiver: Proposed Solution The relaxed receiver specifications allow the designer to investigate low-power small-area solutions without great concern on performance. Therefore, the proposed solution is a 2-MHz low IF with an analog demodulator, similar to [23], as shown in Fig. 8. In the RF front-end, a 5-dB NF LNA is assumed, with a gain of 18 dB and an IIP3 of 5 dBm. The mixer has to down-convert 4Specification

of the Bluetooth system, ver. 1.1, Feb. 2001.

Fig. 9. Bluetooth analog demodulator.

the received signal to a 2-MHz IF, where a fourth-order complex active filter guarantees the image suppression. In order to achieve the minimum power consumption, an analog demodulator is preferred, instead of using power-hungry ADCs and a digital demodulator. As shown in Fig. 9 [23], the analog demodulator can extract the information (which is carried in the phase of the signal) by a derivative of the quadrature signal. The demodulated signal is then filtered and presented to the DSP. C. Bluetooth—Conclusions The Bluetooth technology asks for low-cost low-power moderate performance transceivers to allow a wide diffusion in portable electronic devices. Therefore, a fully integrated CMOS solution is optimal. A CMOS receiver, using 2-MHz low-IF architecture with an analog demodulator, seems to represent the best solution. V. WIRELESS LANs The purpose of the IEEE 802.11 standard [33], formalized in 1999, was to allow high-rate wireless network connectivity between personal computers or workstations, avoiding the use of expensive and bulky wires. Today, wireless LANs are used worldwide in work environments, at home, and in “hot spots” at airports, hotels, and other public places for delivering high-speed internet access. The original IEEE 802.11 standard provides a maximum data rate of 2 Mb/s, and allows radio implementations with frequency-hopping (FH) or direct-sequence spread spectrum (DSSS), in the 2.4-GHz license-free ISM band. The need for more speed determined the birth of different committees that quickly defined new standards, called IEEE 802.11a [34] (harmonized with ETSI HiperLAN2 [37]) and IEEE 802.11b [35]. The goal of the former was to standardize a high-rate (up to 54 Mb/s) wireless LAN in the 5-GHz band, while the purpose of the latter was to extend the throughput of the original 802.11 standard to data rates higher than 2 Mb/s (reaching 11 Mb/s). Finally, the IEEE 802.11g committee has recently drafted a high-speed wireless LAN standard [36] in the 2.4-GHz band that is backward-compatible with 802.11b and supports data rates up to 54 Mb/s. A. IEEE 802.11/.11b The IEEE 802.11 standard specifies two radio transmission schemes for wireless networking in the 2.4-2.4835-GHz IMS

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Fig. 11.

IEEE 802.11b considered blocking mask. TABLE V SUMMARY OF WIRELESS LAN RECEIVER REQUIREMENTS

Fig. 10. IEEE 802.11b: maximum allowed deviation from the ideal constellation point.

frequency range with data rates up to 2 Mb/s based on FHSS and DSSS. In the latter case, the radio channel of approximately 14 MHz is modulated by differential binary phase-shift keying (DBPSK) and differential quadrature phase-shift keying (DQPSK) to provide 1- and 2-Mb/s data rates, respectively. The 802.11b committee then extended the DSSS transmission scheme, and adopting complementary code keying (CCK) enables operation at 5.5 and 11 Mb/s, employing the same signal bandwidth. The 11-Mb/s operation mode, with a spectral efficiency of 0.78 b/s/Hz, is the most challenging for the receive section of the 802.11b mobile terminal. The adopted modulation scheme theoretically requires an SNR of approximately 9.5 dB at the end of the analog receive chain to provide the 8% maximum frame-error-rate (FER) allowed by the standard. However, taking into account the effects of the multipath channel, and the finite accuracy of the transmitted signal (specified as error vector magnitude (EVM), see Fig. 10), the SNR requirement grows to approximately 11.5 dB. Since the standard specifies a 76-dBm sensitivity level, the maximum allowed NF can be easily calculated as follows: dBm dB

dBm

MHz

dB (6)

The standard does not specify an intermodulation test. However, the linearity requirement of the receiver can be expressed in terms of a 1-dB compression point. The standard indicates the adjacent channel power level only, but in a real environment, an alternate channel or in-band blocker is also present. For a reasonable scenario, the blocking power levels specified in [38] are here considered. A blocking mask, as depicted in Fig. 11, can be derived. The 70-dBm desired signal can be received simultaneously either with a 35-dBm modulated adjacent signal, or with a 30-dBm continuous wave interferer. The latter sets the receiver 1-dB compression point to approximately 26 dBm, taking into account a 4-dB safety margin. The 30-dBm interferer also sets the LO PN requirement to 103 dBc/Hz at 1-MHz offset. As in the case of Bluetooth, the VCO tuning range is 80 MHz.

The IEEE 802.11b standard specifies a 10-dBm maximum received signal; in this case, a more critical requirement is set in the 2-Mb/s situation, where a 4-dBm maximum signal has to be received and correctly demodulated. The receiver low-gaincase 1-dB compression level is, therefore, set to approximately 0 dBm. The main IEEE 802.11b receiver requirements are summarized in Table V. B. IEEE 802.11a In September 1999, the 802.11a Task Group approved the 5-GHz wireless LAN standard. The U.S. allocated frequency spectrum, called the universal networking information infrastructure (UNII) band, is divided into three parts: the UNII-1 and UNII-2 (from 5.15 to 5.35 GHz) are intended for indoor and outdoor use, while the UNII-3 (5.725–5.85 GHz) is for outdoor applications only. Each UNII band provides four nonoverlapping 16.6-MHz-wide orthogonal frequency division multiplexing (OFDM)-modulated radio channels. The allowed throughput varies from 6 to 54 Mb/s. The choice of this type of modulation is due to its high spectral efficiency and reduced multipath inter-symbol interference (ISI). Each radio channel is composed by 48 low-rate modulated orthogonal sub-carriers and four pilot tones, used for synchronization. Each sub-carrier can be modulated by BPSK (with 6- or 9-Mb/s throughput, depending on the coding rate), QPSK (12–18 Mb/s), 16-quadrature amplitude modulation (QAM) (24–36 Mb/s) or 64-QAM (48–54 Mb/s), and the actual bit rate is set by the channel interference conditions. In Europe, the 5-GHz-spectrum wireless LAN has been standardized by the ETSI Task Group broad-band radio access networks (BRANs). This standard, named HiperLAN2, defines the wireless access in a very similar way as the IEEE 802.11a, adopting the same OFDM modulation with up to 54-Mb/s throughput. The physical layer specifications are very similar, the major difference being the allocated spectrum, which ranges from 5.15 to 5.35 GHz for indoor use, and from 5.47 to 5.725 GHz for outdoor applications.

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The most stringent receiver requirements are set in the 54-Mb/s mode. In this case, to meet the specified packet error rate ( 10%), a 20.5-dB SNR has to be guaranteed at the ADC output. For a 50-ns delay spread radio channel, the requirement grows to approximately 26.5 dB. Since the maximum transmitter EVM is 25 dB (not considering fading), the signal-to-receiver-noise ratio requirement becomes approximately 28 dB. Due to the very high SNR requirement, even in the minimum signal condition, interferences play a significant role. Lumping various imperfections (quadrature accuracy, integral PN, finite ADC word length, etc.) into a 1-dB implementation loss, and because the 54-Mb/s sensitivity level is 65 dBm, the maximum allowed NF is set to dBm dB

dBm

MHz

dB (7)

In order to derive the linearity and LO PN requirements, it has to be noted that the IEEE 802.11a standard specifies only the adjacent channel ( 63 dBm at 20-MHz offset) and alternate channel ( 47 dBm at 40-MHz offset) power levels. Similar to the 802.11b case, interferers at more than 40-MHz frequency offset should be considered to ensure operation in a practical environment. In the 5-GHz band, the ETSI HiperLAN2 standard specifies the power level for these blockers, which is set to 30 dBm at a frequency offset larger than 50 MHz [37]. If this scenario is assumed also for IEEE 802.11a, the continuous wave 30-dBm interferers set both the linearity and LO PN requirements. Therefore, the receiver 1-dB compression point is set to 26 dBm, while the oscillator spectral purity is set to 102 dBc/Hz (at 1-MHz offset). The maximum received signal is 30 dBm, therefore, the 1-dB compression point in the receiver low-gain mode is set to approximately 20 dBm, taking into account 10-dB backoff. The IEEE 802.11a receiver requirements are summarized in Table V. C. IEEE 802.11g In order to improve the data throughput in the 2.4-GHz ISM band, the IEEE 802.11g workgroup has drafted in January 2001 a high-speed wireless LAN [36] that is backward compatible with 802.11b (the same spectrum is used) and allows data rate up to 54 Mb/s, thus far reaching the 802.11a maximum speed. The idea is to use the same 802.11b modulation techniques to achieve 1, 2, 5.5, and 11 Mb/s in order to allow interoperability with older cards, while also allowing the OFDM modulation to arrive at 802.11a data throughputs. Therefore, 802.11g receivers have to meet the most critical requirements set by 802.11b and 802.11a. The main difference is the maximum received signal power level, set to 20 dBm [36], which translates in a 1-dB compression point requirement of 10 dBm in the receiver low-gain mode. The IEEE 802.11g receiver requirements are summarized in Table V. D. Wireless LAN Receivers: State-of-the-Art The state-of-the-art fully integrated receivers for the 802.11b standard broadly adopt the zero-IF architecture. Examples of

transceivers exploiting this architecture by using SiGe and BiCMOS technology are [39] and [40]. The wide-band channel and the spread nature of the data in the channel can be exploited to enable the use of CMOS technology. In fact, dc offsets can be easily removed by HP filtering during the long training noise impact has to be integrated in sequence, while the the whole channel bandwidth, resulting in a minor concern. On the other hand, prohibitively high image rejections are required for low-IF architectures. Up to date, 802.11b CMOS zero-IF transceivers have been presented [41], [42]. For the 802.11a standard, the best choice is less straightforward. In fact, considering both zero-IF and low-IF as the most attractive alternatives, OFDM modulation sets very stringent requirements. Not only has the RF front-end to achieve low NF, more stringent than in all other standards considered here, and at more than twice the operating frequency, but due to the high SNR and large bandwidth required for 54 Mb/s, the baseband/IF chain is also very challenging. In the zero-IF case, the major concerns are dc offset, noise, and quadrature paths accuracy. The first two issues are related to the 20-ppm crystal oscillator accuracy allowed by the standard [34]. This means that a frequency offset as high as 240 kHz could exist between transmitter and receiver LOs. As noise tail can fall very close to a result, the dc offset and the first channel sub-carrier. Therefore, a low noise corner and a low HP frequency are mandatory in order to avoid signal corruption. At the same time, the 802.11a training sequence is much shorter than in the 802.11b case, leaving only 8 s for the dc offset cancellation settling. Moreover, quadrature accuracy as high as 38 dB has to be guaranteed because the required output SNR is very high [43]. In the low-IF case, the dc offset cancellation is not a huge problem because the edges of the channels do not carry information. The image suppression required is lower than in the direct conversion case because the adjacent channel power level is 1 dB lower than that of the desired signal and it is specified with a signal 3 dB above sensitivity. The image rejection requirement is set to approximately 35 dB. The main disadvantage of this solution lies in the signal being centered around 10 MHz, leading to a higher maximum signal frequency and, therefore, higher power consumption in the IF chain. Several fully integrated 802.11a zero-IF CMOS transceivers have been implemented [44]–[46]. The most interesting solution is presented in [45]. In order to eliminate the frequency-offset problem, a fast digital estimation of the frequency error is performed. The error is then corrected by multiplying a digitally generated tone at the error frequency with the LO through a linear quadrature mixing stage. The IEEE 802.11g is the most recent wireless LAN standard and up to date, many semiconductor companies have presented solutions and some are shipping products. The great advantage with respect to 802.11a is that the operating frequency is less than half. This leads to two important differences: first, for a given technology, achieving the same NF is easier, both noise considerations. Second, the problems for thermal and arising from the frequency offset are much less because now the frequency error can be at most 125 kHz. This, together with the

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Wireless LANs proposed receiver solution. TABLE VI WIRELESS LAN RECEIVER FRONT-END REQUIREMENTS

fact that operation in the CCK mode (802.11b) needs to be guaranteed for backward compatibility, pushed virtually all solutions toward the zero-IF architecture. The trend is building dual-band/triple-mode radios, working in every wireless LAN environment. As an example, in [47], a CMOS fully integrated zero-IF solution is presented that features dual-band/triple-mode capabilities. E. Wireless LAN Receivers: Proposed Solution The receiver proposed here is a CMOS fully integrated zero-IF dual-band triple-mode solution, and is shown in Fig. 12. The primary goal is silicon area saving and baseband blocks reuse, tuning the filtering profile according to the standard. The most straightforward way is using the same architecture for every standard. As suggested by [45], solutions to the problems arising from frequency offset can be found. The main specifications of the RF front-end are summarized in Table VI. The considered RF filters for the 2.4-GHz5 and the 5-GHz6 bands show a 2-dB worst case IL. Regarding the baseband, a seventh-order filtering is required, with a fourth-order Butterworth filter and two VGAs (and the mixer) that also perform a filtering function. The ADCs have 10-bit resolution. F. Wireless LANs—Conclusions A CMOS fully integrated receiver that enables operation in the 2.4- and 5-GHz bands can be realized in zero-IF architecture, although the requirements are very challenging. VI. TOWARDS A MULTISTANDARD RECEIVER The need for global roaming and high-speed wireless data transfer are increasing the telecommunications companies interest for a multistandard hand set. Today, the concept of multimode terminal is already wide spread. As an example, in Europe, most GSM phones already support both the 9005Murata, Kyoto, Japan, part DFCH22G45HDHAA. [Online]. Available http://www.murata.com 6Johanson, Camarillo, CA, part 5515BP15B725. [Online]. Available: http://www.johansontechnology.com

and 1800-MHz versions of the standard; many cellular phone manufacturers have developed tri-band cellular phones, which can be used both in the U.S. and Europe. The next step for the wireless terminal is the introduction of UMTS, which is intended to work together with GSM. In fact, because of the planetary success of second generation cellular phones (GSM), the full transfer to the 3G will be carried out after a quite long period of coexistence, if ever. On the other hand, the increasing demand for wireless services other than voice, such as high data-rate Internet access and short-range radio connectivity, is raising the interest for a multistandard radio terminal, and is able to satisfy both voice and data services. The simplest multistandard terminal is realized by means of several transceivers, one for each standard, operating in parallel paths. However, this is not a cost-efficient solution, and with the increasing number of received standards it is, ultimately, unfeasible. In order to lower the terminal total cost, key aspects are sharing as much hardware as possible, increasing the level of integration and limiting the power consumption. These goals can be met only by careful system and design planning. To arrive at a multistandard terminal, selection of the receiver architecture is key to maximize hardware sharing, thus, saving silicon area. Technology choice also plays a fundamental role. Due to its lower cost, RF passive (high- inductors, linear capacitors) improvement, and integration level, ultra-scaled CMOS technology should be preferred over BiCMOS [14], [48]–[50]. A brief review of the available multistandard or multimode receivers is presented below, and a system-level proposal for a future multistandard receiver is drawn. A. Multimode and Multistandard Receivers: State-of-the-Art Most recently published receivers for multimode applications propose the implementation of multiband cellular phones for the GSM standard (900, 1800, and 1900 MHz). Examples of these applications are provided in [11]–[13], where the chosen architecture is zero IF both for BiCMOS [11], [13] and CMOS [12] implementations. The signal coming from a multiband antenna [51]–[53] passes through one of the dedicated SAW filters and is then fed to a tuned LNA (one for each band). The mixers are the first blocks, in the receive path, to be shared. Actually, in [11] and [12], there are two mixers, one for the 900-MHz band and one for the 1800- and 1900-MHz bands. In [13], only one mixer is used for the three bands. Since the signal bandwidth is the same for each receive band and the RX specifications are very similar, the whole baseband is fully shared, thus, saving silicon area. In wireless LAN areas, there are currently many examples of multistandard solutions. In [47], a dual-band (2.4 and 5 GHz) multistandard (IEEE 802a/b/g) CMOS chip set is presented. In this case, the two signal paths, one for the 2.4-GHz band and one for the 5-GHz band, share only the last baseband blocks of the zero-IF chain. Atheros Communications provides another example of an all-CMOS dual-band radio chip for IEEE 802a/b/g applications, employing a dual-IF architecture.7 7AR5112—2.4/5-GHz dual-band radio-on-a-chip, Atheros Communications, Sunnyvale, CA, 2003. [Online]. Available: http://www.atheros.com

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UMTS and wireless LANs are appearing more and more as complementary for high data-rate communications rather than competitors. A receiver radio front-end for the two standards, showing a high level of hardware sharing, is reported in [54]. In the chosen zero-IF architecture, the two dedicated 2.1- and 5.8-GHz LNAs are followed by a common broad-band mixer. B. Proposed Architecture for Multistandard Applications To our best knowledge, no fully integrated solutions have appeared thus far in the literature, covering all four major communication standard families considered in this paper, i.e., GSM, WCDMA, Bluetooth, and wireless LAN. In order to realize global roaming, both for voice and data applications, all of these standards need to be included in a multiservice radio terminal. In fact, GSM and UMTS represent, respectively, the present and the future of the vocal and mixed voice/data cellular service; 802.11a/b/g Wireless LANs are the dominant standards for high data-rate wireless Internet access and Bluetooth enables the terminal to be air connected with other peripherals to exchange data at low rates. More precisely, the standards covered by the proposed architecture are two GSMs (1800 and 1900 MHz for Europe and U.S. roaming), UMTS, and two wireless LANs (802.11g at 2.4 GHz and 802.11a at 5 GHz). To arrive at the definition of the radio architecture, the following need to be considered: • key point for a multistandard receiver is minimum area consumption, meaning hardware share maximization; • receiver architecture has to enable building blocks reuse; • all the considered standards, except Bluetooth, do not need to be covered at the same time, i.e., when an application is active, the others can be switched off or in idle mode, in order to save power and reuse hardware resources; • Bluetooth needs to operate concurrently to each of the other standards, in fact, the wireless link between the radio terminal and other peripherals cannot be halted when voice or data communications are active (e.g., Bluetooth allows the use of headphones during a phone call). The immediate consequence of the last is that a standalone receive path has to be dedicated to Bluetooth, for which the optimum receiver architecture, exploiting analog demodulation, can be used. Here, we will analyze the possibility of hardware reuse in the other receive path, configurable to cover each of the four remaining standards. The first limitation to circuit reuse is the need for multiple external RF filters. Although wireless LAN do not specify out-of-band interferences, GSM requires an RF SAW filter and WCDMA requires a duplexer in front to allow for simultaneous reception and transmission. This leads to the need for separate inputs for the LNA. A possible solution, covering all five standards, is having the multiband section of the receiver with five RF inputs controlled by an RF GaAs switch89 8AM116—Triple-band GaAs integrated circuit (IC) antenna switch module, Skyworks Inc., Woburn, MA, 2003. [Online]. Available: http://www.skyworksinc.com 92 2 antenna switch GaAs MMIC, part NJG1544HC3, New Japan Radio Company, Tokyo, Japan, 2003. [Online]. Available: www.chipdocs.com/manufacturers/NJRC.html

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From the analysis carried out above, the same receiver architecture, based on a single down-conversion, is the most suitable architecture for the multistandard receiver. In fact, zero-IF is the most suitable solution for UMTS and wireless LANs, while low-IF is the best choice for the GSMs. Moreover, considering that if the low-IF I and Q paths are combined in the digital section to perform the image suppression, the two architectures are identical. The block diagram for the multistandard receiver can be as shown in Fig. 13. In the multistandard section, the radio part is composed by a multiband LNA and a down-conversion mixer. Examples for the multiband RF stage are discussed in [55] and [56]. In [55], a two-stages common-emitter BiCMOS LNA employs a wide-band resistive load to provide gain at 2.4 and 5 GHz. In [56], a BiCMOS zero-IF receiver front-end for the IEEE 802.11a standard and HiperLAN2 standard relies on a frequency tunable feedback LNA followed by I/Q variable gain mixers. In the multistandard receiver chain of Fig. 13, all the standards share the whole analog baseband from the mixer to the ADC. The previous proposed architectures, optimized for each standard, lead to choose the same baseband chain and filtering network. The mixer, the first VGA, the fourth-order Butterworth filter, and the second VGA perform the channel selection and provide gain to the desired signal. Once one standard is selected, the baseband chain RC constants are properly set by a digital band control. This choice allows the maximum hardware sharing. [57] and [58] are examples of programmable multimode baseband filters for multistandard applications. In the baseband section of the receiver, the ADC must be able to quantize signals belonging to various standards, tailoring different sample rate, dynamic range, and linearity requirements, depending on the application. In this field, [59] presents a dual-mode ADC designed for a direct conversion receiver. If a highly integrated multistandard solution is employed, like the one depicted in Fig. 13, the receiver requirements deserve a particular note. Regarding the radio section, the different standards require different front-end performance. The most straightforward solution would be satisfying the most critical specifications for each one. However, with this approach, the cascaded performance would be too demanding. This suggests that the front-end should be configured to tailor the standard in reception. For convenience, Table VII summarizes the specifications for each single standard and the requirements set on the multistandard front-end. When considering the LNA for GSM, UMTS, and 802.11a/b, linearity is dominated by UMTS. Keeping NF below 3 dB with 0-dBm IIP3 is not particularly demanding, even in a CMOS low-power implementation [60]. However, different LNA gains are desirable. Introducing a moderate gain variation (5 dB) at the LNA output, the impact on the NF can be made negligible [15]. Regarding the multistandard mixer, in order to meet the IIP2 requirement, set by GSM, calibration techniques are necessary [2], [11]. The noise of the mixer is averaged in band, i.e., takes noise reaccount of both thermal and flicker contributions. quires special care in OFDM because, due to the multicarrier QAM modulation used, the noise spectral density should be

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Fig. 13.

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Proposed multistandard architecture. TABLE VII SUMMARY OF MULTISTANDARD FRONT-END REQUIREMENTS

more or less constant over all sub-carriers for optimal perfornoise mances. In this partition, we assume the front-end corner is not higher than approximately 50 kHz for OFDM. UMTS standard sets the most stringent requirements in terms of thermal noise and linearity, while GSM is most demanding in terms of flicker noise. Meeting the specifications discussed thus far is nonetheless challenging, resulting in a consumption increase with respect to single standard implementation. The very low-noise requirement in the GSM mode (9 nV/ Hz in the 0–200-kHz band) together with the IIP3 specification in UMTS mode (12 dBm) leads to tremendous dynamic-range requirement. A smarter solution calls for adaptivity and reconfigurability with the effect of power saving in either receive mode. For example, in a CMOS mixer, noise and linearity trade with the switching pair biasing current. Increasing the quiescent current noise [62]. The increases the IIP3 [61] at the expense of the biasing current of the switching pair in the GSM can be made lower than in the UMTS. A simple solution for an adaptive biasing is provided in [56], where a controlled current boosting stage is adopted.

In a multiband receiver, frequency synthesis is also a critical function. For a flexible frequency generation, an integer- synthesizer may not be able to satisfy the stringent multistandard specifications, while a fractional- synthesizer can satisfy the fine frequency resolution and required settling time. Moreover, the VCO must be multiband and satisfy all of the single-standard PN requirements. As examples, [63] and [64] present solutions for a multiband VCO. Finally, we believe the several SAW filters can be replaced, in the near future, by frequency tunable bandpass RF filters. Examples are reported in [65], even if the frequency range is narrow. This would eliminate the need for the antenna switch, with benefits to NF performances, besides printed circuit board (PCB) simplification and area savings.

VII. CONCLUSION In this paper, a review of the most diffused standards for wireless applications has been presented. The GSM, UMTS, Bluetooth, and wireless LANs standards have been analyzed to carry out the main specifications for the receive section of the mobile terminal. For each standard, the state-of-the-art of the realized integrated receivers was analyzed in order to evaluate the optimal receive architecture and to properly size the building blocks. Particular care was devoted to the RF front-end and highly integrated implementations, either in zero-IF or low-IF architectures, were focused. In Section VI, the trend toward a multistandard mobile terminal was identified, and a solution for a highly integrated multistandard receive architecture was proposed. Bluetooth would be processed in parallel while all the other standards would share the same zero-IF/low-IF path. As

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shown, the strategy for the reconfiguration of the analog baseband is the key point to keep silicon area and power consumption within acceptable levels. REFERENCES [1] Digital Cellular Telecommunications System (Phase 2); Radio Transmission and Reception, GSM Standard 05 05, 1999. [2] D. Manstretta, M. Brandolini, and F. Svelto, “Second-order intermodulation mechanisms in CMOS downconverters,” IEEE J. Solid-State Circuits, vol. 38, no. 3, pp. 394–406, Mar. 2003. [3] S. Kang and B. Kim, “Second order nonlinearity analysis of Gilbert mixer,” in Proc. IEEE Radio Frequency Integrated Circuits Conf., Jun. 2003, pp. 559–562. [4] K. Kivekas, A. Parssinen, and K. Halonen, “Characterization of IIP2 and DC-offset in transconductance mixers,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 48, no. 11, pp. 1028–1038, Nov. 2001. [5] S. Dow et al., “A dual-band, direct-conversion/VLIF transceiver for 50 GSM/GSM/DCS/PCS,” in Int. Solid-State Circuit Conf. Tech. Dig., vol. 1, Feb. 2002, pp. 230–462. [6] E. Duvivier et al., “A fully integrated zero-IF transceiver for GSM–GPRS quad-band application,” IEEE J. Solid-State Circuits, vol. 38, no. 12, pp. 2249–2257, Dec. 2003. [7] J. Fenk, “The trends in GHz cellular front ends for the next and the previous decade,” presented at the Int. Solid-State Circuit Conf. GIRAFE Workshop, Feb. 2003. [8] J. Sevenhans, A. Vanwelsenaers, J. Wenin, and J. Baro, “An integrated Si bipolar transceiver for a zero IF 900 MHz GSM digital mobile radio front-end of a hand portable phone,” in Proc. Custom Integrated Circuits Conf., May 1991, pp. 7.7.1–7.7.4. [9] S. Tadjipour, E. Cijvat, E. Hegazi, and A. Abidi, “A 900-MHz dualconversion low-IF GSM receiver in 0.35-m CMOS,” IEEE J. SolidState Circuits, vol. 36, no. 12, pp. 1992–2002, Dec. 2001. [10] M. Steyaert, J. Janssens, B. De Muer, M. Borremans, and N. Itoh, “A 2-V CMOS cellular transceiver front-end,” IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1895–1907, Dec. 2000. [11] R. Magoon et al., “A single-chip quad-band (850/900/1800/1900 MHz) direct conversion GSM/GPRS RF transceiver with integrated VCOs and fractional-N synthesizer,” IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1710–1720, Dec. 2002. [12] E. Gotz et al., “A quad-band low power single-chip direct conversion CMOS transceiver with SD-modulation loop for GSM,” in Proc. Eur. Solid-State Circuits Conf., Sep. 2003, pp. 217–220. [13] “UAA3535HL—Low power GSM/DCS/PCS multi-band transceiver,” Philips Semiconductor, Sunnyvale, CA, Data Sheet, Feb. 17, 2000. [Online]. Available: http://www.semiconductors.philips.com. [14] A. Springer, L. Maurer, and R. Weigel, “RF system concepts for highly integrated RFICs for W-CDMA mobile radio terminals,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 1, pp. 254–267, Jan. 2002. [15] F. Gatta, D. Manstretta, P. Rossi, and F. Svelto, “A fully integrated 0.18-m CMOS direct conversion receiver front-end with on chip LO for UMTS,” IEEE J. Solid-State Circuits, vol. 39, no. 1, pp. 15–23, Jan. 2004. [16] J. Rogin, I. Koucev, G. Brenna, D. Tschopp, and Q. Huang, “A 1.5 V 45 mW direct conversion WCDMA receiver IC in 0.13 m CMOS,” IEEE J. Solid-State Circuits, vol. 38, no. 12, pp. 2239–2248, Dec. 2003. [17] S. K. Reynolds, B. A. Floyd, T. Beukema, T. Zwick, U. Pfeiffer, and H. Ainspan, “A direct-conversion receiver IC for WCDMA mobile systems,” IEEE J. Solid-State Circuits, vol. 36, no. 9, pp. 1555–1560, Sep. 2003. [18] H. Waite et al., “A CDMA2000 zero IF receiver with low-leakage integrated front-end,” in Proc. Eur. Solid-State Circuits Conf., Sep. 2003, pp. 433–436. [19] J. Ryynanen, K. Kivekas, J. Jussila, A. Parssinen, and K. Halonen, “A dual-band RF front-end for WCDMA and GSM applications,” IEEE J. Solid-State Circuits, vol. 36, no. 8, pp. 1198–1204, Aug. 2001. [20] D. Brunel, C. Caron, C. Cordier, and E. Soudée, “A highly integrated 0.25 m BiCMOS chipset for 3G UMTS/WCDMA handset RF subsystem,” in IEEE Radio Frequency Integrated Circuits Symp., Jun. 2002, pp. 191–194. [21] J. C. Haartsen and S. Mattisson, “A new low-power radio interface providing short-range connectivity,” Proc. IEEE, vol. 88, no. 10, pp. 1651–1661, Oct. 2000. [22] H. Wang, “Overview of Bluetooth technology,” Univ. Pennsylvania, Philadelphia, PA, Tech. Rep., 2001.

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[50] T. H. Lee and S. S. Wong, “CMOS RF integrated circuits at 5 GHz and beyond,” Proc. IEEE, vol. 88, no. 10, pp. 1560–1571, Oct. 2000. [51] L. Economou and R. J. Langley, “Multi-band mobile phone antennas,” in Int. Antennas Propagation Conf., vol. 2, Apr. 2001, pp. 754–757. [52] G. Zhou and B. Yildirim, “A multi-band fixed cellular phone antenna,” in Int. IEEE Antennas Propagation Symp., vol. 1, Jul. 1999, pp. 112–115. [53] T.-L. Chen, “Multi-band printed sleeve dipole antenna,” Electron. Lett., vol. 39, no. 1, pp. 14–15, Jan. 2003. [54] M. Hotti, J. Kaukovouri, J. Ryynanen, K. Kivekas, J. Jussila, and K. Halonen, “A direct-conversion RF front-end for 2-GHz WCDMA and 5.8-GHz WLAN applications,” in Proc. IEEE Radio Frequency Integrated Circuits Symp., Jun. 2003, pp. 45–48. [55] P.-W. Lee, H.-W. Chiu, T.-L. Hsieh, C.-H. Shien, G.-W. Huang, and S.-S. Lu, “A SiGe low noise amplifier for 2.4/5.2/5.7 GHz WLAN applications,” in Int. Solid-State Circuits Conf. Tech. Dig., vol. 1, Feb. 2003, pp. 364–365. [56] P. Rossi, A. Liscidini, M. Brandolini, and F. Svelto, “A 2.5 dB NF direct-conversion receiver front-end for HiperLAN2/IEEE802.11a,” in Int. Solid-State Circuits Conf. Tech. Dig., vol. 1, Feb. 2004, pp. 160–161. [57] H. A. Alzaher, H. O. Elwan, and M. Ismail, “A CMOS highly linear channel-select filter for 3G multistandard integrated wireless receivers,” IEEE J. Solid-State Circuits, vol. 37, no. 1, pp. 27–37, Jan. 2002. [58] T. Hollman, S. Lindfors, M. Lansirinne, J. Jussila, and K. Halonen, “A 2.7-V CMOS dual-mode baseband filter for PDC and WCDMA,” IEEE J. Solid-State Circuits, vol. 36, no. 7, pp. 1148–1153, Jul. 2001. [59] L. Sumanen and K. Halonen, “Dual-mode pipeline A/D converter for direct conversion receivers,” Electron. Lett., vol. 38, no. 19, pp. 1101–1103, Sep. 2002. [60] D. K. Shaeffer and T. H. Lee, “A 1.5-V, 1.5-GHz CMOS low noise amplifier,” IEEE J. Solid-State Circuits, vol. 32, no. 5, pp. 745–759, May 1997. [61] M. T. Terrovitis and R. G. Meyer, “Intermodulation distortion in currentcommutating CMOS mixers,” IEEE J. Solid-State Circuits, vol. 35, no. 10, pp. 1461–1473, Oct. 2000. [62] H. Darabi and A. A. Abidi, “Noise in RF-CMOS mixers: A simple physical model,” IEEE J. Solid-State Circuits, vol. 35, no. 1, pp. 15–25, Jan. 2000. [63] N. H. W. Fong et al., “Design of wide-band CMOS VCO for multiband wireless LAN applications,” IEEE J. Solid-State Circuits, vol. 38, no. 8, pp. 1333–1342, Aug. 2003. [64] H. Shin, Z. Xu, and M. F. Chang, “A 1.8-V 6/9-GHz reconfigurable dual-band quadrature LC VCO in SiGe BiCMOS technology,” IEEE J. Solid-State Circuits, vol. 38, no. 6, pp. 1028–1032, Jun. 2003. [65] S.-M. Yim and K.-K. O, “Demonstration of a switched resonator concept in a dual-band monolithic CMOS LC-tuned VCO,” in Proc. IEEE Custom Integrated Circuits Conf., May 2001, pp. 205–208.

Massimo Brandolini (S’03) was born in Broni, Italy, in 1977. He received the Laurea degree (summa cum laude) in electrical engineering from the Università degli Studi di Pavia, Pavia, Italy, in 2002, and is currently working toward the Ph.D. in electrical engineering and computer science at the Università degli Studi di Pavia. In 2003 he was working under an internship with Agere Systems, Allentown, PA, where he was involved with the design of a highly integrated CMOS FM transmitter. His major research interests include analog and RF IC design for wireless communications in CMOS and BiCMOS technologies with particular focus on RF front-ends for multistandard devices.

Paolo Rossi (S’02) was born in Milan, Italy, in 1975. He received the Laurea degree (summa cum laude) in electrical engineering from the Università degli Studi di Pavia, Pavia, Italy, in 2000, and is currently working toward the Ph.D. degree at the Università degli Studi di Pavia. His research interests are the implementations of fully integrated RF receivers in CMOS and BiCMOS technology with a particular focus on the analysis and design of LNAs and mixers for multistandard applications.

Danilo Manstretta (M’03) was born in Broni, Italy, in 1973. He received the Laurea degree (summa cum laude) and Ph.D. degree in electrical engineering and computer science from the Università degli Studi di Pavia, Pavia, Italy, in 1998 and 2002, respectively. During his studies, he was involved with CMOS RF front-end circuits for wireless applications. In 2001, he joined Agere Systems, Allentown, PA, as a Member of Technical Staff, where he was involved with highly integrated transceivers for wireless LANs with the Analog Products Division. He is currently with the Broadcom Corporation, Irvine, CA. His research interests are in the field of RF and analog IC design for wireless applications.

Francesco Svelto (S’94–M’98) received the Laurea and Ph.D. degrees in electrical engineering from the University of Pavia, Pavia, Italy, in 1991 and 1995, respectively. From 1996 to 1997, he worked under a grant from STMicroelectronics to design CMOS RF circuits. In 1997, he became an Assistant Professor with the University of Bergamo, Bergamo, Italy. In 2000, he joined the Università degli Studi di Pavia, Pavia, Italy, where he is currently an Associate Professor. His current research interests are in the field of RF design and high-frequency ICs for telecommunications. Dr. Svelto has been a member of the Technical Program Committee of the IEEE Custom Integrated Circuits Conference since 2000, the Bipolar/BiCMOS Circuits and Technology Meeting (BCTM) since 2003, and the European Solid State Circuits Conference in 2002. He served as guest editor of the March 2003 Special Issue of the IEEE JOURNAL OF SOLID-STATE CIRCUITS, of which he is currently an associate editor.

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The Six-Port as a Communications Receiver Tim Hentschel

Abstract—Configurable radio terminals require receivers with wide-band capabilities in order to support as many services as possible at most different carrier frequencies. Conventional well-known receiver architectures employing active circuitry are limited in this respect. Therefore, alternative architectures are investigated, such as the six-port, which has been introduced as a very flexible and elegant means for microwave measurements in the 1960s and 1970s. Later on, it has been used in radar applications. It was not until recently that communications receivers have been built upon the six-port principle. However, in all publications, there is always a certain mystic about the six-port. It has even been described as a “black box.” In order to help paving the way for a wider application of the six-port technology, this paper describes the basic six-port theory and sets it into relation with the conventional receiver architectures such as the homodyne and heterodyne receiver. Finally, the advantages and possible applications of receivers based on the six-port technology are discussed. Index Terms—Communication terminals, frequency conversion, heterodyning, homodyne detection, receivers.

I. INTRODUCTION

T

HE requirements on wireless communications receivers are twofold. On one side, size and cost should be brought down; on the other side, the receivers should be more and more wide-band in order to meet the increasing demand for high data rates. Conventional heterodyne receivers require filters at the RF and IF, which can usually only be implemented by bulky surface acoustic wave (SAW) or crystal filters. Hence, an integration on a single chip and, thus, small size and low cost, cannot be achieved. For that reason, designers have been directing their effort toward the homodyne receiver (better known as the direct conversion receiver). The direct conversion receiver has gathered much attention, particularly within the research community since then. There are many problems due to analog impairments to be solved when implementing a direct conversion receiver. Therefore, other receiver architectures are sought after. One promising architecture is the six-port. The application of the six-port to communications receivers has been presented in [1]–[6]. The general problem with these publications is the fact that the six-port itself is not explained. This is not satisfying. For many engineers who are only familiar with the above-mentioned conventional receiver architectures, it would be extremely useful to know the relationship between the six-port and conventional architectures. Instead of providing this knowledge, there is a certain mystic about the six-port. In

Manuscript received February 4, 2004; revised September 27, 2004. This work was supported by the German Ministry for Education and Research and by Alcatel SEL AG. The author is with Vodafone Chair Mobile Communications Systems, Technische Universität Dresden, 01062 Dresden, Germany (e-mail: [email protected]). Digital Object Identifier 10.1109/TMTT.2005.843507

Fig. 1. Microwave network for the determination of the reflection coefficient of the DUT through independent remote measurements.

[1] and [4], statements can be found such as “A six-port is a black box with two inputs and four outputs.” Among the first publications on the application of the six-port to communications receivers was [5]. Li et al. proved the concept of calculating the complex ratio of an incoming signal and a known local oscillator (LO) signal by using the six-port. Originally, the six-port was found to be a very good means to measure the complex reflection coefficient of a microwave device. II. BACKGROUND OF THE SIX-PORT TECHNIQUE The problem of microwave measurement is that connecting a probe to the device-under-test (DUT) considerably changes the very characteristics to be measured of the device, e.g., its reflection coefficient. This can be circumvented by determining the reflection coefficient of the DUT through a certain set of independent remote observations from a linear network to which the DUT is connected. Given the network of Fig. 1, it is possible to relate all “reflected” waves to all “incident” waves by means of the -parameters (1) where

are complex parameters and and are the complex amplitudes of the “incident” and “reflected” waves, respectively. Assuming that the relationship of the “reflected” and “incident” waves at some of the ports (say, ports 1- ) can be uniquely described by the respective reflection coefficient , it is and Equations (1) and (2) form a system of unknown variables and . Hence, can be described by the remaining

0018-9480/$20.00 © 2005 IEEE

(2)

equations with unknown variables variables. In the case

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of , and by choosing and as the two unknown variables, it can be written in particular for with

. Hence, reducing the solution to three equations leads to a system of nonlinear equations. Rewriting (5) yields

(3)

(6)

.. .

.. .

.. .

where and are complex funcand . Obviously, two observations and tions of the are sufficient to solve the system of equations for and given the proper choice of and . However, in practice, it is not a simple matter to measure the complex quantities . Therefore, the idea arose to simply measure the power of the “reflected” waves . Expanding the first row of (3) and calculating the power of , it is

(4)

(5) Equation (5) is linear in , , , and [7]. Hence, four power observations are necessary to determine these quantities. The four observations and two additional ports (the DUT and LO) are the reason for the name “six-port.” One of the first and also simplest six-ports presented in [8] for power measurements uses

The question might arise of whether a system of four equations of the type of (5) can always be solved. Clearly, the determinant of the coefficients must not be zero, which implies that is not real for . at least one of the terms Consequently, the parameters and must not all be real or all imaginary. The above given example parameters fulfill this requirement. , , , and does Determining the quantities not provide a means to determine and . It is clear that is the complex conjugate of . Both quantities comprise the and . Hence, same two parameters with the help of and , it is possible to determine , , and , which can be used to determine the net power consumed in the DUT and the complex reflection coefficient of the DUT. Determining the absolute phase of and is not possible. Since there are only three unknown parameters to be determined from (5), it is, in principle, sufficient to use a five-port , , with three power observations. The four quantities , and of (5) are related to each other by

Assuming servations

and can be obtained by two power oband with and , can be obtained by the observation . Due to the nature of the cosine function, there are two solutions for . Thus, the five-port does not yield a unique solution. The sixth port, i.e., the fourth power observation, can be used to choose among the two solutions. A geometric interpretation on this can be found in [9]. In [7], it is mentioned that the fourth power observation provides a means to improve and assess the measurement accuracy and, moreover, to simplify calibration procedures (i.e., the determination of the unknown parameters and ). It is clear that an equation of the type of (3) can be specified for any two unknown variables and/or . Of particular on interest is a relationship between and on the other side. This relationship one side and describes the dependency between the “reflected” waves at the observation points and two “incident” waves. Further inspection reveals that all considerations made above with respect to and still hold when selecting and as the two unknown variables. Therefore, the equations do not need to be rewritten. and can stand for any two unThe two unknown waves known waves and/or . They are not limited to be the “incident” wave and the “reflected” wave of the DUT. This is of particular importance for the understanding of (24) and (25). At this point, the classical six-port theory should be left by asking for the instantaneous power, i.e., a power signal whose mean is the above-mentioned power . To do so, the following two complex waves are introduced with generally difand ferent frequencies (7) (8) It should be noted that these time-varying waves can be used instead of the complex amplitudes without any change in the above equations. Hence, the instantaneous power of the “reflected” wave of the second port is given by (9), shown at the bottom of the following page. , the mean of is clearly . In the case of If , the high-frequency components can be removed by means of low-pass filtering (which can be interpreted as computing the short-term mean). Hence, the following signal can be obtained:

(10) where LP is an operator reflecting the low-pass filtering to re, , and . move the high-frequency components at This signal contains dc components, as well as a component

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Fig. 3.

Real frequency conversion of a real bandpass signal.

In case the signal is a result of a real frequency-conversion process (e.g., up-conversion of a baseband signal to a carrier frequency in a transmitter), another real frequency conversion must be carried out with caution since the two sidebands might overlap after the second frequency conversion, of as can be seen from Fig. 3. This can obviously be avoided if one of the following conditions is obeyed:

Fig. 2.

(top) Complex and (bottom) real frequency-conversion principle.

at the frequency . Obviously, a frequency-conversion process has taken place. III. FREQUENCY CONVERSION Frequency conversion is the process of shifting the spectrum of a signal. There are several reasons for doing this, i.e., the separation of a certain number of signals on a transmission medium (using different carrier frequencies) or to be able to radiate a signal by an antenna. of the (bandpass) Hence, the (Fourier) spectrum is shifted by resulting in . From signal the properties of the Fourier transform, it can easily be concluded that this frequency shift can be achieved by multiplying with (see Fig. 2). One of the main the signal problems with this theoretical approach is that the complex must be realized in a LO by means harmonic signal and of its real part and its imaginary part, i.e., . In practice, it is a problem to realize the exact for this complex frequency conversion. phase difference of Therefore, and in order to reduce the effort, one could support the idea of real frequency conversion through multiplication of by (or ). Expanding the the signal clearly reveals that cosine function to the real frequency conversion results in two separate frequency (see Fig. 2). shifts of the original spectrum

or (11) is symIn the special case, each of the two sidebands metric about , a constructive overlap with is, in principle, possible. However, care must be taken regarding the phase and the LO. Multidifference between the carrier by results in plying . Depending on the value of , the baseband component might be completely deleted. Hence, in this case, the real frequency conversion of the real bandpass signal must be phase synchronous (i.e., coherent). is a complex signal, the two sidebands of In the case are not symmetric. Therefore, can only be obtained through complex frequency conversion with from . This can also be seen from very simple algebraic considerations. The real bandpass signal can be obtained from the comthrough complex up-conversion of plex baseband signal to , which yields a complex bandpass signal. Taking the with a symmetric specreal part results in a real signal trum formed by two sidebands, which, taken separately, are not symmetric. Hence, it is

(12)

(9)

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where is the real part of , and is the imaginary . These two components of are also called the part of . in-phase (I) and quadrature-phase (Q) components of Hence, in order to obtain the full information carried by the , one has to have the two real signals complex signal and . However, performing real down-conversion yields only one real signal. Real down-conversion and low-pass filtering yields

Fig. 4. Receiver with complex frequency conversion (f down-conversion receiver, f 6 f : low-IF receiver).

=

=

f : direct

(13) and . Another “observaThe result is a mixture of is necessary in order to be able to separate the two tion” components. This can be obtained by a real down-conversion . Consequently, it can be written with (14) and can be calculated from the The two components two observations if the matrix is nonsingular. The (theoretically) and classic case of complex down-conversion is . However, it can be concluded from (14) that, as long as the phases are known and as long as the matrix of (14) can be inverted, the typically required phase difference of is, in principle, not necessary in order to obtain and . IV. HOMODYNE AND HETERODYNE PRINCIPLE A. General In a modern receiver, the incoming bandpass signal is usually down-converted to baseband. This can be realized in one or sevor not, two types of eral steps. Depending on whether is intuitively the receivers can be distinguished. Using first choice if the task is to down-convert a bandpass signal to baseband. This approach is called the homodyne principle since the carrier frequency is equal (homo) to the frequency of the LO. In the case the two frequencies are different, it is called the heterodyne principle, which yields a signal at an IF. This signal is usually down-converted to baseband in a second frequency-conversion step. It is possible to use both principles in connection with real and complex frequency conversion. B. Homodyne Receiver With Complex Frequency Conversion Using (14) with yields, apart from a phase shift, the in-phase and quadrature-phase components of the . The corresponding receiver type is also called a signal direct down-conversion receiver. It is sketched in Fig. 4. In cannot practice, the phase difference of be realized exactly. Feasible values of the deviation from 90 lie between 1 and 3 [10], [11]. Moreover, there is usually a gain mismatch between the in-phase and quadrature-phase branches of a direct down-conversion receiver. The reader is

Fig. 5. Receiver with real frequency conversion (not showing the possibly required carrier recovery).

referred to the chapter of Beach et al. in [12] for details on realization problems of direct down-conversion receivers. C. Homodyne Receiver With Real Frequency Conversion From the simple algebraic considerations above, it is clear that a homodyne receiver with real frequency conversion is only feasible for real baseband signals. Real frequency conversion delivers one “observation.” With (13), it can be concluded that or must be zero in order to obtain the transeither mitted signal from the received signal. Moreover, the coeffior , respectively, must not be zero. Therecient fore, homodyne receivers with real frequency conversion must be synchronous receivers. This has been discussed in Section III. The synchronous LO can either be transmitted (e.g., the pilot reference in the conventional FM stereo broadcasting system) or be regenerated from the received signal (e.g., by a so-called Costas loop). A typical structure is shown in Fig. 5. D. Heterodyne Receiver With Complex Frequency Conversion Using the structure of Fig. 4 with yields a heterodyne receiver with complex frequency conversion. In practice, is is usually chosen very near to , hence, the IF low. Consequently, these receivers are named low IF receivers. Their great advantage over the direct down-conversion receiver is that the dc offset (primarily caused by self-mixing due to finite isolation of the components) does not overlap with the wanted signal. Hence, it can be easily removed by means of filtering. The disadvantage compared to the direct down-conversion receiver is the fact that the gain and phase mismatches have a more severe impact [12]. E. Heterodyne Receiver With Real Frequency Conversion yields a heterodyne Using the structure of Fig. 5 with receiver with real frequency conversion. Since there is only one

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branch of signal processing, no problems exist regarding gain or phase mismatches. However, as discussed earlier, it must be taken care that the individual frequency bands do not overlap after frequency conversion. This is guaranteed if (11) is obeyed. To ensure this, a bandpass filter might be required that limits the signal bandwidth to the smaller value of and

(17)

(i.e., Since the possibly overlapping frequency band of the shifted left-hand-side band of the real bandpass signal) is called the image (of the right-hand-side band), this filter is called the image rejection filter. Hence, the effort for the second mixer for complex frequency conversion is saved at the cost of an image rejection filter. Since this filter is usually an off-chip filter, e.g., a SAW filter, designers try to refrain from the real frequency conversion and try to make the complex frequency conversion feasible, thus enabling a higher degree of integration on a single chip.

Fig. 6. Spectrum of a signal after additive mixing and low-pass filtering.

approximated by a Taylor series with the constants as follows:

If is the superposition of and a phase , it is

and the LO with an amplitude

(18) V. REALIZATION ASPECTS Frequency conversion (mixing) is achieved by multiplying a signal with a real or a complex LO signal. Consequently, the straightforward realization is the application of multipliers or equivalent circuits that perform the multiplication. This type of the frequency conversion is called the multiplicative mixing. Another means of realizing the frequency conversion is the additive mixing. The LO signal is added to the signal and the resulting sum is nonlinearly processed (e.g., by using the current–voltage characteristics of a diode). The nonlinear characteristics in the operating point of a certain device can be

fundamental wave

Using (12), (15), shown at the bottom of this page, can be derived. In the case of for , the higher order harmonics and intermodulation products can be neglected. Asis relatively near to , a signal according to (16), suming shown at the bottom of this page, can be obtained from low-pass of (15) has been neglected in filtering. The dc component favor of the rectified wave. is sketched in Fig. 6. It The spectrum of the signal should be noted that the spectral components of signals of the occupy twice the bandwidth of a low-pass signal type and comprise a single tone at dc.

rectified wave

difference frequency

sum frequency

first harmonic (15) higher order harmonics and intermodulation products (16) rectified wave

wanted signal components

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Fig. 7. Simple six-port receiver with analog I/Q generation.

The wanted components of are the difference frequency components. In the case they do not overlap with the other components, they can be separated by means of filtering. This is possible if

the receiver of Fig. 7 has certainly its limitations. Nonetheless, it proves the concept of a homodyne receiver employing additive mixing. VI. FIVE- AND SIX-PORT RECEIVERS

or (19) which can be accomplished by carefully selecting or by bandlimiting the signal before mixing with a filter having the bandwidth

Critical inspection of Fig. 7 reveals that four observations are used, although (21) comprises only the three unknown , , and (assuming that , , and are known). Again, the algebraic interpretation of the problem is very helpful to generalize the problem. Using three power observations of the type of (21) and assuming that the constant factor is equal for all three branches yields

(20) The basic structure realizing a heterodyne receiver with additive mixing shall be named the superposition heterodyne receiver or yields short superheterodyne receiver.1 Setting

(21) which very much resembles (13), except for the rectified wave component. By inspection, it can be found that subtracting a second observation with and from yields something equivalent to of (13). Conand another two observations sequently, by choosing , , and , with complex down-conversion to baseband can be achieved. The re. It uses sulting receiver structure is sketched in Fig. 7 for four observations of a linear network with two inputs (the LO ). The four observations are processed by a and signal square-law device (e.g., a diode). Hence, the structure of Fig. 7 is a six-port receiver with analog I/Q regeneration. It has been introduced in [1]. The analog I/Q regeneration relies on a perfect cancellation of the rectified wave component, which is only possible if the four branches are perfectly balanced and if the LO amplitudes have the same magnitude. Since this is not realizable in practice,

(22) The wanted signal components and can be calculated if the matrix is nonsingular, which can be forced by propand . A structure realizing (22) is shown in erly selecting Fig. 8. It is a homodyne receiver employing additive mixing. Therefore, it shall be named the superposition homodyne receiver or short the superhomodyne receiver. The low-pass filters preceding the analog-to-digital (AD) converters serve as antialiasing filters, as well as to remove the high-frequency components of the signals and, thus, reflect the step from (15) to and are calculated in (16). The signal components the digital domain by using the digitized observations . In the case that after I/Q regeneration another (digital) frequency conversion is applied (e.g., to select a certain subband of the signal ), the receiver is, strictly spoken, not a homodyne receiver. However, regarding as the wanted signal that is converted to baseband, the term homodyne is justifiable. To close the circle, the relationship between (10) and (16) is shown. To this end (16) is rewritten using the well-known , , and as follows: relationships between

which yields

1The

author is aware of the fact that the term superheterodyne originally stands for supersonic heterodyne due to the fact that the IF is supersonic. However, in times where the term supersonic is no longer meaningful in this context, it shall be allowed to have a new meaning.

(23)

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Fig. 8. Five-port receiver with AD converters and digital signal-processing block for regenerating the in-phase and quadrature-phase components of the received signal.

Neglecting the factor and comparing with (10) yields with, for example, the following parameters: for

(24)

Hence, the superhomodyne receiver is a special five-port (or six-port) receiver. Likewise, it is possible to get (10) with in the form of (22). Using the abbreviations and , this yields the arithmetic description of is a somewhat more general superhomodyne receiver where assumed to be related to the received signal and is assumed to be related to the LO (see Section II for the definition of and ) as follows:

calibration technique for six-port receivers has been presented in [13]. • Instead of estimating the unknown parameters of the maand trices, the unknown wanted signal components can be estimated. A very simple technique has been presented in [14]. In [15] and [16], a technique has been presented to separate the signal subspace spanned by and from the noise subspace. The wanted signal components can be obtained from the signal subspace by conventional phase synchronization techniques. However, the research in [15] and [16] is based on assumptions that are not justifiable, as has been shown in [14]. However, it is not always necessary to perform a digital I/Q regeneration as the analog I/Q regeneration of Fig. 7 suggests. Similar structures have been presented in [4] and [17]. In [18], a five-port receiver with analog I/Q regeneration is presented. The idea behind it is to properly choose the parameters of (22), and , , and e.g., . The wanted signal components can be calculated as

(25) and Substituting (24) to (25) yields and, thus, establishes (22), except for the constant factor . It should be noted that, in practical applications, the right-hand-side term of (22) and (25), as well as components of or , respectively, are usually removed e.g., by means of high-pass filtering or by means of estimating the mean of the low-pass filtered instantaneous power observations and subtracting it. It remains the question of how to obtain the wanted signal and from the three or four obsercomponents vations. A comprehensive treatment of this topic is beyond the scope of this paper. However, the following two basic approaches should be mentioned. • The unknown parameters and are determined by means of a calibration procedure. Hence, given a proper choice of the parameters, the matrices of (22) and (25) can be inverted, which yields the desired signal components. A

(26)

(27) Clearly, the gain factors and angles cannot be set perfectly in practice. Consequently, the analog I/Q regeneration has its limits. In particular, if signals with high dynamic range are to be processed (e.g., multichannel mobile communications signals in base stations with a dynamic range of 80–100 dB), digital I/Q regeneration is the preferred method.

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VII. ADVANTAGES OF THE SIX-PORT TECHNOLOGY: APPLICATIONS

of the six-port (or five-port) receiver has been derived. The relationship between the classical six-port theory and the six-port as a means for frequency conversion has been established.

First, the basic characteristics of the architecture of Fig. 8 are summarized as follows. • The six-port network is passive. • The power detectors (square-law devices) are passive devices. and do not need to have certain fixed values. • These characteristics lead to the fact that the realization of the six-port is rather uncomplicated given the fact that most parameter mismatches caused by the production are acceptable since they are dealt with in the I/Q regeneration procedure (of course, this is not true if an analog I/Q regeneration technique, as in Fig. 7, is employed). Hence, the performance of the six-port is not only a matter of the quality of the hardware, but it is, in particular, a matter of digital signal processing, which makes the six-port an initial candidate for software-defined radio. Software-defined radio receivers must be wide-band receivers in order to support as many services on different carrier frequencies as possible. Six-port receivers are wide-band receivers due to their passiveness [19]. Therefore, six-port technology is perfectly fitted to the requirements of wide-band software-defined radio [6]. Particularly interesting is the application of the six-port technology for very high frequencies where the whole six-port network can be realized as a very small microwave circuit using transmission-line elements. However, the question arises of when the additional effort of the third ADC, filter, etc. is justified compared to a conventional direct down-conversion receiver. Of course, this depends on the application. The main reason for accepting the additional effort is when the six-port is the only technology that can serve certain requirements. With respect to the scope of this paper, these are clearly the requirements of a wide-band software-defined radio that is also capable of operating at very high frequencies. Several applications are planned to operate, e.g., in the 17-, 24-, or 60-GHz bands, particularly high data-rate applications such as future wireless local area networks (LANs) with data rates of up to 1 Gbit/s (see, e.g., [20]).

VIII. CONCLUSION Based on the well-known background of the six-port technique, it has been shown that incident power observations provide signals that contain frequency-shifted versions of the input signal of the six-port (or five-port). Thus, it has been shown that the six-port (or five-port) is not a mystic component that provides (five or) six power measurements from which the in-phase and quadrature-phase components of the incoming bandpass signal can be calculated in an obscure way. There is rather an ordinary frequency conversion that takes place. To relate the sixport frequency-conversion structure to the well-known heterodyne and homodyne receiver structures, a systematic approach to frequency conversion has been given. From this systematic approach and from considerations on multiplicative and additive mixing, the super(position) homodyne receiver as a special case

ACKNOWLEDGMENT The author would like to thank Dr. H. Nuszkowski and M. Löhning, both of the Vodafone Chair Mobile Communications Systems of the Technische Universität Dresden, Dresden, Germany, for the numerous discussions on the topics of this paper. REFERENCES [1] J. Hyyryläinen, L. Bogod, S. Kanagasmaa, H.-O. Scheck, and T. Ylämurto, “Six-port direct conversion receiver,” in 27th Eur. Microwave Conf. Exhibition, Jerusalem, Sep. 8–12, 1997, pp. 341–346. [2] S. Haruyama and R. Morelos-Zaragoza, “A software defined radio platform with direct conversion: SOPRANO,” in Proc. IEEE Semiannual Vehicular Technology Conf., Atlantic City, NJ, Oct. 7–11, 2001, pp. 1558–1560. [3] R. Morelos-Zaragoza, S. Haruyama, M. Abe, N. Sasho, L. B. Michael, and R. Kohno, “A software radio receiver with direct conversion and its digital processing,” IEICE Trans. Commun. (Japan), vol. E85-B, no. 12, Dec. 2002. [4] S. O. Tatu, E. Moldovan, K. Wu, and R. G. Bosisio, “A new direct millimeter-wave six-port receiver,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 12, pp. 2517–2522, Dec. 2001. [5] J. Li, R. G. Bosisio, and K. Wu, “Computer and measurement simulation of a new digital receiver operating directly at millimeter-wave frequencies,” IEEE Trans. Microw. Theory Tech., vol. 43, no. 12, pp. 2766–2772, Dec. 1995. [6] J.-F. Luy, T. Mueller, T. Mack, and A. Terzis, “Configurable RF receiver architectures,” IEEE Micro, vol. 5, no. 1, pp. 75–82, Mar. 2004. [7] G. F. Engen, “A (historical) review of the six-port measurement technique,” IEEE Trans. Microw. Theory Tech., vol. 45, no. 12, pp. 2414–2417, Dec. 1997. [8] G. F. Engen and C. A. Hoer, “Application of an arbitrary 6-port junction to power-measurement problems,” IEEE Trans. Instrum. Meas., vol. IM-21, no. 4, pp. 470–474, Nov. 1972. [9] G. F. Engen, “The six-port reflectometer: An alternative network analyzer,” IEEE Trans. Microw. Theory Tech., vol. MTT-25, no. 12, pp. 1075–1080, Dec. 1977. [10] H. Pretl, W. Schelmbauer, B. Adler, L. Maurer, and R. Weigel, “A SiGebipolar down-conversion mixer for a UMTS zero-IF receiver,” in Proc. IEEE Bipolar/Bi/CMOS Technology Meeting, Minneapolis, MN, Sep. 2000, pp. 40–43. [11] A. Päarssinen, J. Jussila, J. Ryynänen, L. Sumanen, K. Kivekäs, and K. Halonen, “Circuit solutions for WCDMA direct conversion receiver,” presented at the IEEE Nordic Signal Processing Symp., Kolmården, Sweden, Jun. 2000. [12] W. Tuttlebee, Ed., Software Defined Radio—Enabling Technologies, 1st ed. Chichester, U.K.: Wiley, 2002. [13] J. Li, R. G. Bosisio, and K. Wu, “Dual-tone calibration of six-port junction and its application to the six-port direct digital millimetric receiver,” IEEE Trans. Microw. Theory Tech., vol. 44, no. 1, pp. 93–99, Jan. 1996. [14] T. Hentschel, “A simple IQ-regeneration technique for six-port communications receivers,” presented at the 1st Int. Control Communications Signal Processing Symp., Hammamet, Tunisia, Mar. 21–24, 2004. [15] X. Huang, D. Hindson, M. de Léseéleuc, and M. Caron, “I/Q-channel regeneration in 5-port junction based direct receivers,” presented at the IEEE MTT-S Int. Topical Wireless Application Symp., Vancouver, BC, Canada, Feb. 21–24, 1999. [16] X. Huang, M. Caron, and D. Hindson, “Adaptive I/Q-regeneration in 5-port junction based direct receivers,” presented at the 5th Asia–Pacific Communications Conf./4th Optoelectronic Communications Conf., Beijing, China, Oct. 18–22, 1999. [17] S. O. Tatu, E. Moldovan, G. Brehm, K. Wu, and R. G. Bosisio, “ -band direct digital receiver,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 11, pp. 2436–2442, Nov. 2002. [18] J.-C. Schiel, S. O. Tatu, K. Wu, and R. G. Bosisio, “Six-port direct digital receiver (SPDR) and standard direct receiver (SDR) results for QPSK modulation at high speeds,” in IEEE MTT-S Int. Microwave Symp. Dig., 2002, pp. 931–934.

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[19] R. Kohno, M. Abe, N. Sasho, S. Haruyama, R. M. Zaragoza, E. Sousa, F. Swarts, P. V. Rooyen, Y. Sanada, L. B. Michael, H. Amir-Alikhani, and V. Brankovic, “Universal platform for software defined radio,” in Proc. Int. Intelligent Signal Processing Communication Systems Symp., Honolulu, HI, Nov. 5–8, 2000, pp. 523–526. [20] G. Fettweis, T. Hentschel, and E. Zimmermann, “WIGWAM—A wireless gigabit system with advanced multimedia support,” presented at the VDE Kongr., Berlin, Germany, Oct. 18–20, 2004.

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Tim Hentschel received the Master degree from King’s College London, University of London, London, U.K., in 1992, and the Diploma and Ph.D. degrees from the Technische Univesität Dresden, Dresden, Germany, in 1995 and 2001, respectively. Following a short period with Philips Communications Industries, Nürnberg, Germany, he joined the Vodafone Chair Mobile Communications Systems, Technische Universität Dresden. He has co-managed several national and European research projects. In 2003, he co-founded the company Signalion, which designs and produces software-defined radio-based rapid prototyping systems for wireless applications. His current research focus is software-defined radio. He has authored or coauthored several papers, book chapters, and a book on this topic.

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A Dual-Band RF Transceiver for Multistandard WLAN Applications Sheng-Fuh R. Chang, Member, IEEE, Wen-Lin Chen, Student Member, IEEE, Shuen-Chien Chang, Student Member, IEEE, Chi-Kang Tu, Chang-Lin Wei, Chih-Hung Chien, Cheng-Hua Tsai, Joe Chen, and Albert Chen

Abstract—A new dual-band RF transceiver is presented for 2.4- and 5.2-GHz multistandard wireless local area networks. The proposed dual-band RF transceiver integrates a concurrent dual-band front-end, a triple-band frequency synthesizer, and a band-sharing in-phase/quadrature modulator/demodulator to maximize component and power reuse. The design is started with the examination of an enhanced dual-band heterodyne architecture and then the optimal circuit partition to satisfy the multistandard requirements. Key dual-band circuits are designed and integrated with other building blocks for experimental demonstration. The measurement shows that eight 5-GHz channels and 13 2.4-GHz channels can be synthesized within 130 s with phase noise less than 98 dBc/Hz at 100-kHz off carrier and spur suppression greater than 65 dBc. The transmitted 1 dB power is 25/20 dBm at 2.4/5.2 GHz, respectively, with the modulation accuracy error-vector magnitude (EVM) values varying from 3.57% to 7.19%. The receiver gain is 20/31 dB at 2.4/5.2 GHz front-end and 70 dB at IF back-end with EVM within 2.32% to 10% from 70- to 17-dBm received power range. Index Terms—Concurrent, dual-band, frequency synthesizer, link budget, orthogonal frequency-division multiplexing (OFDM), power amplifier, RF transceiver.

I. INTRODUCTION

T

HERE HAS been explosive adoption of wireless local area network (WLAN) technology in the corporate environment and hot-spot areas since the finalization of IEEE 802.11a/b/g and Hiperlan-2 standards [1]–[4]. The widely deployed 802.11b network, operating in the 2.4-GHz industrial–scientific–medical (ISM) band with 83-MHz bandwidth, provides a maximum data rate of 11 Mb/s, whereas the 802.11a and Hiperlan-2 standards, operating in the 5-GHz band with 300-MHz bandwidth, can support up to 54-Mb/s data rate by utilizing the orthogonal frequency-division multiplexing (OFDM) technique. Manuscript received April 1, 2004; revised September 8, 2004. This work was supported in part by the Integrated System Solution Corporation under Contract 91-B59 and by the National Science Council, Taiwan, R.O.C., under Grant 91-2622-E-194-005-CC3. S.-F. R. Chang is with the Department of Electrical Engineering, Center for Telecommunication Research, National Chung Cheng University, Taiwan 621, R.O.C. (e-mail: [email protected]). W.-L. Chen and S.-C. Chang are with the Department of Electrical Engineering, National Chung Cheng University, Taiwan, Taiwan 621, R.O.C. C.-K. Tu and C.-H. Chien are with the BenQ Corporation, Taiwan 114, R.O.C. C.-L. Wei, and C.-H. Tsai are with the Electronics Research and Service Organization, Industrial Technology Research Institute, Hsinchu, Taiwan 300, R.O.C. J. Chen and A. Chen are with the Integrated System Solution Corporation, Hsinchu, Taiwan 300, R.O.C. Digital Object Identifier 10.1109/TMTT.2005.843509

The effective coverage area of a single 2.4-GHz 802.11b/g access point is likely greater than that of a 5.2-GHz 802.11a. However, a greater number of users must share the limited 83-MHz spectrum. The data throughput is reduced when numerous users simultaneously access the 2.4-GHz WLAN network. A straightforward solution by adding more access points does not necessarily improve throughput because the in-band interference problem emerges as a result of the limited spectrum (83 MHz) shared by multiple access points. In contrast, the 802.11a network experiences less interference problem for multiple access-point deployment because of its smaller coverage area and greater bandwidth allocation (300-MHz bandwidth). From the other aspect of product adoption rate, the 802.11b network has been deployed worldwide so that it is important to maintain the high-data-rate WLAN network backward compatible with the existing 802.11b products. Hence, the 2.4-GHz 802.11b/g and 5.2-GHz 802.11a/Hiperlan-2 networks are complementary and will coexist in the coming years. The dual-band multimode 802.11a/b/g and Hiperlan-2 coexistence requires an optimal multifunctional terminal with maximum reuse of building blocks and power. Numerous research has demonstrated the different integration effort on multiband multimode receivers. For mobile handsets, several examples of dual-band RF transceivers have been introduced by using the parallel architecture, which switches between two separated transceivers to receive one band at a time [5], [6]. Another design in [7] integrates both parallel wide-band code division multiple access (WCDMA) and global system for mobile communications (GSM) receivers into a single signal path to achieve a highly integrated CMOS chip. On the 2.4/5.2-GHz WLANs, the concept of a concurrent dual-band receiver was proposed in [8], which integrates two independent 2.4- and 5.2-GHz receivers into a single dual-band receiver. In this paper, a new dual-band RF transceiver is proposed for multistandard WLAN operations by using the concurrent dual-band impedance match, the reconfigurable signal tapping, and the concurrent dual-band filter techniques. This RF transceiver can support 2.4- and 5.2-GHz WLAN transmission of multidata-rate and multimodulation OFDM/complimentary code keying (CCK)/packet binary convolutional code (PBCC) signals. The remainder of this paper is organized as follows. Section II presents the new dual-band architecture and its link budget. Key dual-band circuit designs are described in Section III. Experimental results of the integrated dual-band transceiver are presented in Section IV and the paper is summarized in Section V.

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TABLE I IEEE 802.11a/b/g AND HIPERLAN-2 PRIMARY CHARACTERISTICS

Fig. 1. Architecture of the proposed dual-band WLAN RF transceiver.

II. DUAL-BAND RF TRANSCEIVER ARCHITECTURE For a single-band operation, design considerations are relatively easier than those for a dual-band operation. Well-known single-band receiver architectures include heterodyne, direct conversion, and low-IF conversion [9]–[18], each with their own advantages and disadvantages. However, it becomes more challenging to meet all the specifications over multiple frequency bands while keeping slightly higher circuit complexity. The transceiver architecture and circuit design must be re-examined to satisfy all IEEE 802.11a/b/g and Hiperlan-2 standards. A. Conceptual Evolution of Dual-Band RF Transceiver The primary RF characteristics of the IEEE 802.11a/b/g and Hiperlan-2 systems are summarized in Table I, where the IEEE 802.11a and Hiperlan-2 networks operate from 5150 to 5825 MHz, while IEEE 802.11b/g works from 2400 to 2483.5 MHz. The conventional transceiver architecture includes two parallel single-band heterodyne transceivers at 2.4 and 5.2 GHz, respectively. Implementation in this way wastes circuit area and increases power consumption since no component is reused or shared. By incorporating the following techniques into a conventional heterodyne transceiver, a dual-band RF transceiver with high circuit reuse can be built, as shown in Fig. 1. 1) Concurrent Dual-Band Transceiver Front-End: The conventional design techniques of narrow-band low-noise amplifier

Fig. 2. Simulated power evolution of a 5.2-GHz OFDM 64-QAM signal along the receiver.

(LNA) and power amplifier are re-investigated to have amplification simultaneously at two different frequency bands. Similarly, the conventional narrow-band bandpass filter technique is redeveloped to provide two desired passbands through a single compact microstrip circuitry. Therefore, a full concurrent dualband transceiver front-end is obtained (detailed in Section III). 2) Triple-Band Frequency Synthesizer: By incorporating a reconfigurable signal-tapping technique on a phase-locked loop, the required 748-MHz, 2.8-GHz, and 5.7-GHz frequency synthesizers can be combined into one. As shown in Fig. 1, the 5.7-GHz local oscillator (LO) signal for 802.11a and Hiperlan-2 signals is tapped at the input node of the frequency divider, while the 2.8-GHz LO frequency for the 802.11b/g signal is tapped at the output node. Therefore, a single frequency synthesizer circuitry can generate needed LO signals for all 2.4- and 5.2-GHz operation. 3) Band-Sharing IF Back-End: The component count and power consumption can be further reduced if two IF back-ends can be combined and shared by both 2.4- and 5.2-GHz signal paths. In the multimode WLAN operation scenario, only one

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Fig. 3. Concurrent 2.4/5.2-GHz power amplifier. (a) Schematic diagram. (b) Measured AM–AM relationship and power-added efficiency.

formatted signal is transmitted or received at a time. Thus, only one set of IF is required for the data transmission from the baseband signal-processing module. B. Frequency Plan With the employment of above three techniques, this enhanced dual-band transceiver basically belongs to a heterodyne architecture. The frequency plan must be elaborated to prevent in-band or near-passband interferences such as image signals and higher order inter-modulation spurs; otherwise, the self-blocking or desensitization effect can occur. By assuming the higher side LO injection is used, the required can be easily obtained from the frefirst LO frequency quency-translation equations. If the IF frequency is chosen at 374 MHz, the voltage-controlled oscillator (VCO) frequency must be tunable from 5472 to 5694 MHz to support both 802.11a and 802.11b/g operations. The spurs at must be far away from the desired band such that they can be adequately suppressed by filters. C. Receiver and Transmitter Link Budgets The transceiver link budget ought to be properly calculated to determine the specifications of subcircuits yet to design. Without loss of validity, only the case of the 802.11a transceiver is presented. The signal, noise, and interference power evolution along the receiver are shown in Fig. 2, where the strongest and minimum antenna received signal cases are illustrated. Note

that, within this dynamic range, the output baseband signal is better to be driven to the full swing range of the followed ADC. is kept The signal to noise-and-interference ratio at least 20 dB. By the similar treatment, the power evolution along the transmitter path can be obtained based on the transmitter link budget. Note that the output power of each building block must be at least 6-dB backoff of its output 1-dB compressed power to keep the orthogonality of the OFDM signal. III. DUAL-BAND CIRCUIT DESIGN A. Dual-Band Power Amplifier The dual-band power amplifier, shown in Fig. 3(a), consists of two stages of MESFET transistors. The driver transistor TC2481 is used to drive the power transistor TC2571. Both transistors are biased at class-AB operation. The input network of the driver for gain as follows: TC2481 is matched to at at

GHz GHz.

To match these two impedance points, an -type dual-band match network is employed. , , , and values can be obtained by solving the match condition

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Fig. 4. Concurrent 2.4/5.2-GHz LNA. (a) Schematic diagram. (b) Simulated and measured gain and noise figure.

The inter-stage network and the output network are matched for maximal power transfer, where the power-match impedances at 2.4 and 5.2 GHz of the TC2571 MESFET were obtained by the load–pull measurement. The -type dual-band match networks were also employed to and . Fig. 3(b) shows that the measured implement output is 28.0 dBm at 2.4 GHz and 27.9 dBm at 5.2 GHz, both with power-added efficiency of 20.2%. The spectral regrowth of modulated RF signals satisfies the transmission mask requirement in the standards. B. Dual-Band LNA On the dual-band LNA design, the input match network must have noise match simultaneously at two separated frequencies. The conventional single-band LNA design technique [19], [20] is extended to the dual-frequency case. Thus, the match network in Fig. 4(a) obeys the match equation at and as follows:

Two NE3210S01 heterojunction FETs, biased at V and mA, are cascaded to provide adequate gain. As shown in Fig. 4(b), the measured gain reaches 27.1 dB at 2.4 GHz and 28.4 dB at 5.2 GHz with a noise figure less than

Fig. 5. Dual-band bandpass filter. (a) Configuration. (b) Measured insertion and return losses.

2.5 dB for both bands. The input return losses are greater than 10 dB at 5.2 GHz and 7 dB at 2.4 GHz and the output return losses are all better than 13 dB. C. Dual-Band Hair-Pin Bandpass Filter The proposed dual-band hair-pin bandpass filter is shown in Fig. 5(a), which consists of two inter-coupled step-impedance resonators. The concurrent dual-band bandpass filter, reported in [21], utilizes the multiresonance characteristic of the stepimpedance resonator to simultaneously generate two passbands. For our case, the desired 2.4- and 5.2-GHz passbands require the step-impedance resonator to have the impedance ratio of 0.63, of 38.3 and the length of 76.7 at the electric length 2.45 GHz. The measured insertion and return losses are shown in Fig. 5(b). In the 2.4-GHz band, the insertion loss is less than 2.4 dB and the return loss is greater than 20 dB, while in the 5.2-GHz band, the insertion loss is less than 3.9 dB and the return loss is better than 15 dB. The intra-band suppression at 3.6 GHz is greater than 32 dB and the stopband suppression at 6.3 GHz is higher than 58 dB. D. 748/2846/5694-MHz Frequency Synthesizer The triple-band frequency synthesizer was designed with dual phase-locked loops, as shown in Fig. 6(a), which includes an RF

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Fig. 6.

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 53, NO. 3, MARCH 2005

748/2846/5694-MHz frequency synthesizer. (a) Schematic diagram. (b) Spectral response. (c) Phase noise. f = 5694 MHz.

Fig. 7. Designed dual-band WLAN RF transceiver board.

VCO from 5472 to 5694 MHz, an IF VCO fixed at 748 MHz, a reconfigurable frequency divider, a loop filter, and the dual phase-lock-loop integrated circuit (IC) LMX2330. LMX2330 has two phase-locked-loop circuits, where one is used for synthesizing the 2786–2846- or 5554–5694-MHz LO signal and the

other is used for the 748-MHz IF LO. The RF and IF VCOs were designed with the modified Clapp oscillator circuitry. The reconfigurable frequency divider consists of a single-pole doublethrow (SPDT) switch, one frequency divider, and buffer amplifiers. The 5554–5694-MHz LO signal is tapped directly from

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TABLE II MEASUREMENT RESULTS OF DESIGNED DUAL-BAND RF TRANSCEIVER

the RF VCO for the mixing 5.2-GHz OFDM signal and the 2786–2846-MHz LO is tapped from the output node of the first frequency divider for mixing the 2.4-GHz 802.11b/g signal. Eight LO frequencies, equally spaced from 5554 to 5694 MHz with 20-MHz spacing, are successfully generated with lock time less than 124 s. The reference spurs at 500 kHz off carrier are below 67 dBc and the phase noise is less than 98 dBc/Hz at 100 kHz off carrier, as depicted in Fig. 6(b) and (c). For the IEEE 802.11b/g operation, 13 LO frequencies from 2786 to 2846 MHz with channel spacing of 5 MHz can be synthesized within 130 s. The reference spurs at 500 kHz off carrier are below 65 dBc and the phase noise is less than 102 dBc/Hz at 100 kHz off carrier. IV. INTEGRATION TEST AND MEASUREMENT

17-dBm input , and 10-dBm input IP3. The measured noise figure is 9.5 dB, excluding the antenna diversity switch. For both 2.4- and 5.2-GHz bands, their shared IF back-end gain varies from 0 to 70 dB. B. Transmitter CW Measurement The transmitter 1-dB compressed power at the antenna port can reach 20 dBm with controllable gain of 15–25 dB over 5150–5350 MHz. The two-tone test was performed to obtain the output IP3 of 27 dBm. For the 2.4-GHz band, the 1-dB compressed power is 25 dBm and the output IP3 is 32 dBm. C. Receiver Digitally Modulated RF Measurement

By integrating the above-designed dual-band LNA, power amplifier, bandpass filter, and frequency synthesizer together with certain available components such as the wide-band RF mixer, in-phase/quadrature (IQ)-modem IC, and IF SAW filter, a complete dual-band multimode WLAN RF transceiver was built, as illustrated in Fig. 7. A series of integration tests were conducted in two aspects: one by the continuous-wave (CW) test and the other by a digitally modulated signal test. The measured results are summarized in Table II and are discussed below.

For all modulation schemes, including OFDM- and directsequence spread-spectrum (DSSS)-formatted signals, their received error-vector magnitude (EVM) values with respect to the antenna received power are shown in Fig. 8(a) and (b). They indicate that, under the constrain of less than 10% EVM, the received power spans from 70 to 17 dBm for the 802.11b/g signals and spans from 71 to 28 dBm for the 802.11a and Hiperlan-2 signals.

A. Receiver CW Measurement

D. Transmitter Digitally Modulated RF Measurement

In the 5.2-GHz band, the dual-band front-end has 31-dB nom, inal gain with the 18-dB tuning range, 28-dBm input and 20-dBm input third-order intercept point (IP3). The measured noise figure is 9.8 dB and increases to 13.1 dB if the antenna diversity switch is included. In the 2.4-GHz band, the receiver has 20-dB nominal gain with the 30-dB tuning range,

The transmitted constellation and spectral diagrams of the 5.2-GHz 64-quadrature amplitude modulation (QAM) OFDM signal are shown in Fig. 8(c) and (d). For all modulation schemes, the modulation accuracy is below 7.19%. The center frequency leakage of the OFDM signal is 29.05 dB at 5.2 GHz and 26.13 dB at 2.4 GHz, all satisfying the specifications.

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Fig. 8. Measured performances of dual-band RF transceiver. (a) Received EVM at 2.4 GHz. (b) Received EVM at 5.2 GHz. (c) and (d) Constellation and spectrum of transmitted 5.2-GHz 64-QAM signal.

V. CONCLUSION In this paper, a new dual-band RF transceiver is reported to provide the multimode operation for multiple IEEE 802.11a/b/g and Hiperlan-2 standards. The enhanced heterodyne transceiver was realized with a concurrent dual-band front-end, a tripleband frequency synthesizer, and a band-sharing IQ modem. As a result, this transceiver offers maximal reuse of the building blocks and dc power. The design starts with RF link budget calculation and then determines the subcircuit specifications. The conventional narrow-band design techniques of the LNA and power amplifier were refurbished to achieve gain with low noise figure or to have power amplification at two different frequencies. A reconfigurable frequency divider was incorporated in a phase-locked loop such that one frequency synthesizer circuitry can provide 748-MHz, 2846-MHz, and 5694-MHz LO signals. The integrated dual-band transceiver was measured in both the CW and modulated RF tests. The receiver contains gain of 31 dB at 5.2 GHz and 20 dB at 2.4 GHz in the RF front-end and has 0–70 dB in the band-shared IF back-end. The receiver EVMs are less than 10% over a broad received power range power is 20 dBm from 70 to 17 dBm. The transmitter at 5.2 GHz and 25 dBm at 2.4 GHz. The transmit EVMs are smaller than 7.19% for all 802.11a/b/g and Hiperlan-2 transmission. All of the eight and 13 RF channels can be synthesized within 130 s with phase noise less than 98 dBc/Hz at 100 kHz off carrier and greater 65-dBc spur suppression. The experimental results demonstrate the feasibility of the proposed dual-band RF transceiver for multistandard WLAN applications and pave the way for further radio-on-a-chip implementation.

REFERENCES [1] Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications: High-Speed Physical Layer in the 5 GHz Band, IEEE Standard 802.11a/D7.0, 1999. [2] Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications: Higher-Speed Physical Layer Extension in the 2.4 GHz Band, IEEE Standard 802.11b, 1999. [3] Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications: Further Higher Data Rate Extension in the 2.4 GHz Band, IEEE Standard P802.11g/D8.2, 2003. [4] Broadband Radio Access Networks (BRAN); High Performance Radio Local Area Network (HIPERLAN) Type 2; Requirements and Architectures for Wireless Broadband Access, TR 101 031 v2.2.1, 1999. [5] S. Wu and B. Razavi, “A 900-MHz/1.8-GHz CMOS receiver for dualband applications,” IEEE J. Solid-State Circuits, vol. 33, no. 12, pp. 2178–2185, Dec. 1998. [6] J. Tham, M. Margrait, B. Pregardier, C. Hull, R. Magoon, and F. Carr, “A 2.7 V 900-MHz dual-band transceiver IC for digital wireless communications,” IEEE J. Solid-State Circuits, vol. 34, no. 3, pp. 282–291, Mar. 1999. [7] J. Ryynanen, K. Kivekas, J. Jussia, A. Parssinen, and K. Halonen, “A dual-band RF front end for WCDMA and GSM applications,” IEEE J. Solid-State Circuits, vol. 364, no. 8, pp. 1198–1204, Aug. 2001. [8] H. Hashemi and A. Hajimiri, “Concurrent multiband low-noise amplifiers-theory, design, and applications,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 1, pp. 288–301, Jan. 2002. [9] B. Razavi, “A 5.2-GHz CMOS receiver with 62-dB image rejection,” IEEE J. Solid-State Circuits, vol. 36, no. 5, pp. 810–815, May 2001. [10] T. H. Lee, H. Samavati, and H. R. Rategh, “5-GHz CMOS wireless LANs,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 1, pp. 268–280, Jan. 2002. [11] H. Samavati, H. R. Rategh, and T. H. Lee, “A 5-GHz CMOS wireless LAN receiver front end,” IEEE J. Solid-State Circuits, vol. 35, no. 5, pp. 165–172, May 2000. [12] T. P. Liu and E. Westerwick, “5-GHz CMOS radio transceiver front-end chipset,” IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1927–1933, Dec. 2000.

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[13] F. Behbahani, J. C. Leete, Y. Kishigami, A. Roithmeier, K. Hoshino, and A. A. Abidi, “A 2.4-GHz low-IF receiver for wideband WLAN in 6-m CMOS-architecture and front-end,” IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1908–1916, Dec. 2000. [14] F. Behbahani, Y. Kishigami, J. Leete, and A. Abidi, “CMOS mixers and polyphase filters for large image rejection,” IEEE J. Solid-State Circuits, vol. 36, no. 6, pp. 873–887, Jun. 2001. [15] F. Behbahani, H. Firouzkouhi, R. Chokkalingam, S. Delshadpour, A. Kheirkhahi, M. Nariman, M. Conta, and S. Bhatia, “A fully integrated low-IF CMOS GPS radio with on-chip analog image rejection,” IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1721–1727, Dec. 2002. [16] J. Maligeorgos and J. Long, “A low-voltage 5.1–5.8 GHz image-rejection receiver with wide dynamic range,” IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1917–1926, Dec. 2000. [17] L. Der and B. Razavi, “A 2-GHz CMOS image-rejection receiver with LMS calibration,” IEEE J. Solid-State Circuits, vol. 38, no. 2, pp. 167–175, Feb. 2003. [18] J. L. Chen, S. F. Chang, T. H. Wu, S. W. Hsieh, C. K. Tu, and C. L. Wei, “Design, implementation and integration test of a 5.2 GHz RF module for wireless LAN applications,” J. Chinese Inst. Elect. Eng., vol. 10, no. 4, pp. 345–356, Nov. 2003. [19] G. D. Vendelin, A. M. Pavio, and U. L. Rohde, Microwave Circuit Design. New York: Wiley, 1990, ch. 2. [20] D. K. Schaeffer and T. H. Lee, “A 1.5-V, 1.5 GHz CMOS low-noise amplifiers,” IEEE J. Solid-State Circuits, vol. 32, pp. 745–759, May 1997. [21] S. F. Chang, Y. H. Jeng, and J. L. Chen, “Dual-band step-impedance bandpass filter for multimode wireless LANs,” Electron. Lett., vol. 40, no. 1, pp. 38–39, 2004.

Sheng-Fuh R. Chang (S’83–M’92) received the B.S. and M.S. degrees in communications engineering from the National Chiao-Tung University, Taiwan, R.O.C., in 1982 and 1984, respectively, and the Ph.D. degree in electrical engineering from the University of Wisconsin–Madison, in 1991. He was with the Center for Plasma Theory and Computation, University of Wisconsin–Madison, where he was involved with high-power microwave and millimeter-wave sources such as free-electron lasers and Cerenkov masers. In 1992, he joined the Hyton Technology Corporation, where he was responsible for C - and Ku-band satellite low-noise down-converters and multichannel multipoint distribution system (MMDS) transceivers. In 1994, he joined the Department of Electrical Engineering, National Chung Cheng University, Taiwan, R.O.C., where he is currently a Full Professor with the Department of Electrical Engineering and is the Vice Director of the Center for Telecommunication Research, National Chung Cheng University. His research interests include microwave and millimeter-wave ICs with CMOS, HBT, and pseudomorphic high electron-mobility transistor (pHEMT) technologies, multifunctional RF transceivers, smart-antenna RF systems, and high-power microwave sources. Prof. Chang is a member of Phi Tau Phi and Sigma Xi.

Wen-Lin Chen (S’04) was born in Changhua, Taiwan, R.O.C., in 1977. He received the B.S. and M.S. degrees in electrical engineering from Chung Yuan Christian University, Taiwan, R.O.C., in 2000 and 2002, respectively, and is currently working toward the Ph.D. degree at the National Chung Cheng University, Taiwan, R.O.C. His research interests include RF ICs for wireless communications.

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Shuen-Chien Chang (S’05) received the M.S. degree in electrical engineering from the Nation Chung Cheng University, Taiwan, R.O.C., in 2002, and is currently working toward the Ph.D. degree at the National Chung Cheng University. His research interests include microwave and millimeter-wave ICs and low-temperature co-fired ceramic (LTCC) RF modules.

Chi-Kang Tu was born in Taipei, Taiwan, R.O.C., in 1978. He received the M.S. degree in electrical engineering from the National Chung Cheng University, Taiwan, R.O.C., in 2003. His main research interests are RF IC design and system simulation in wireless communication systems.

Chang-Lin Wei received the M.S. degree in electrical engineering from the National Chung Cheng University, Taiwan, R.O.C., in 2003. He is currently a Research and Development Engineer with the Electronics Research and Service Organization (ERSO), Industrial Technology Research Institute (ITRI), Hsinchu, Taiwan, R.O.C. His research interests include electrical modeling of printed circuit board (PCB) embedded passives and RF modules design.

Chih-Hung Chien was born in Taipei, Taiwan, R.O.C., in 1973. He received the M.S. degree in electrical engineering from the National Chung-Cheng University, Taiwan, R.O.C., in 2004. He is currently a Research and Development Engineer with BG Networking and Communications, BenQ Corporation, Taiwan, R.O.C. His research interests are high-performance wireless communication circuits design.

Cheng-Hua Tsai received the M.S. degree in electrical engineering from the National Chung Cheng University, Taiwan, R.O.C., in 2004. He is currently a Research and Development Engineer with Electronics Research and Service Organization (ERSO), Industrial Technology Research Institute (ITRI), Hsinchu, Taiwan, R.O.C. His research interests include RF circuits for wireless communications and electrical modeling of PCB embedded passives.

Joe Chen, photograph and biography not available at time of publication.

Albert Chen, photograph and biography not available at time of publication.

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Signal Path Optimization in Software-Defined Radio Systems Piotr Rykaczewski, Student Member, IEEE, Dariusz Pien´kowski, Student Member, IEEE, Radu Circa, Student Member, IEEE, and Bernd Steinke

Abstract—Growing requirements set upon communication transceivers lead to high sensitivity to nonidealities of analog components, especially in case of software-defined radio (SDR) systems. This paper deals with disturbances, mismatches, and the rejection of images that are caused by the front-end processing. A hybrid architecture comprehending advantages of homodyne and heterodyne receivers is proposed for an SDR system. Theoretical outcomes are discussed and backed by simulations. A fast Fourier transform (FFT)-based algorithm, the phase increment Kay algorithm, and two autocorrelation algorithms, i.e., Morelli–Mengali and Crozier–Moreland, used for frequency offset correction, are compared. The FFT algorithm turns out to be the best solution, both in terms of performance and ease of implementation. DC correction is then discussed and in-phase/quadrature imbalance compensation by means of a blind-source separation (BSS) algorithm and a hard-decision algorithm is performed. The latter algorithm displays implementation advantages, while BSS performs better. Index Terms—Homodyne and heterodyne architecture, multifunctional RF systems, multistandard reconfigurable transceivers, RF-related impairments, software-defined radio (SDR) systems, system simulations.

NOMENCLATURE ADC AWGN BB BER BSS CDMA CM CORDIC CPICH dc DFT DTCH EASI

FDD FDE FDMA FE FFT HD HIPERLAN HS-DSCH ICI IDFT IF IFFT I/Q LNA LO LPF MCRLB ML MM MOSFET OFDM

Analog-to-digital converter. Additive white Gaussian noise. Baseband. Bit error rate. Blind source separation algorithm. Code division multiple access. Crozier and Moreland algorithm. Coordinate rotation digital computer. Common pilot channel. Direct current. Discrete Fourier transform. Data channel. Equivalent adaptive separation via independence algorithm.

Manuscript received March 31, 2004; revised November 12, 2004. This work was supported by the German BMBF-Project RMS 01BU171 (Software Defined Radio Based Architecture Studies for Reconfigurable Mobile Communication Systems). This work was supported in part by the Nokia Research Center. P. Rykaczewski is with the Institut für Nachrichtentechnik, Universität Karlsruhe, 76128 Karlsruhe, Germany (e-mail: [email protected]). D. Pien´kowski and R. Circa are with the Microwave Engineering Group, Technische Universität Berlin, 10587 Berlin, Germany (e-mail: [email protected]; [email protected]). B. Steinke is with the Nokia Research Center, 44807 Bochum, Germany (e-mail: [email protected]). Digital Object Identifier 10.1109/TMTT.2005.843510

PSK QAM RF SDR SNR SPO STS TDMA UMTS UTRA VCO VGA WLAN

Frequency division duplex. Frequency-domain equalization. Frequency division multiple access. Front end. Fast Fourier transform. Hard-decision algorithm. High-performance radio local area network. High-speed downlink shared channel. Intercarrier interference. Inverse discrete Fourier transform. Intermediate frequency. Inverse fast Fourier transform. In-phase/quadrature components. Low-noise amplifier. Local oscillator. Low-pass filter. Modified Cramer–Raó lower bound algorithm. Maximum likelihood. Morelli and Mengali algorithm. Metal–oxide–semiconductor field-effect transistor. Orthogonal frequency-division multiplex. 1-dB compression point. Phase-shift keying. Quadrature amplitude modulation. Radio frequency. Software-defined radio. Signal-to-noise ratio. Signal path optimization. Short training symbols. Time division multiple access. Universal mobile telecommunications system. UMTS Terrestial Radio Access. Voltage-controlled oscillator. Variable gain amplifier. Wireless local-area network.

I. INTRODUCTION

I

N THE near future, communication systems will be required to perform an increasing number of functions within reduced size, power, and weight requirements and tight costs constraints. In a reconfigurable software-defined radio (SDR) system, this is even more the case due to the necessity to support all the functionalities of two or more different systems within one hardware architecture.

0018-9480/$20.00 © 2005 IEEE

RYKACZEWSKI et al.: SPO IN SDR SYSTEMS

Fig. 1.

Reconfigurable receiver architecture.

As the requirements set upon communication transceivers in general and their every single functional block in particular arise, signal path optimization (SPO) gains in importance. SPO incorporates a variety of correction methods for radio frequency (RF) related disturbances and mismatches, which helps maintaining good system performance despite nonlinearities and nonidealities of analog hardware elements. SPO is being carried out in the digital baseband (BB), but under conditions defined by the analog front-end (FE) configuration. This way, higher precision is guaranteed than in the case of a control loop in the FE. Due to the existence of a great number of standards covering a variety of communication scenarios, reconfigurable multimode implementations for mobile terminals gain in popularity. The SDR approach [1] emerges as a potential answer to the tradeoff between dynamic adaptation, reconfigurability, and technical feasibility. Unlike many standard dependent operations (i.e., transmission techniques, modulation, coding), compensation of RF-related effects is primarily determined by the physical nature of the phenomena, therefore, predestinated for a joint implementation. Orthogonal frequency-division multiplex (OFDM)-based IEEE 802.11a wireless local area network (WLAN) standard and code-division multiple-access (CDMA)-based Universal Mobile Telecommunications System (UMTS) terrestrial radio access (UMTS UTRA) frequency division duplex (FDD) represent two different wireless systems using entirely different air-interface technologies. Despite the differences, it is desirable to have an intelligent transceiver that can work seamlessly on both systems. In particular, it is feasible to involve IEEE 802.11a and UMTS because of their complementary character: A WLAN can provide high data rate in a stationary hot-spot situation, while UMTS will take over if high mobility is required. Taking into account requirements for the front end (FE) in an SDR system, neither the homodyne, nor the heterodyne architecture leads to the required reconfigurability. For this reason, a reconfigurable solution, shown in Fig. 1, which combines both architectures, is proposed [2]. The homodyne receiver is chosen for the UMTS and the heterodyne receiver for the WLAN standard. Such a hybrid solution does not support both standards at the same time, leading to a reconfiguration with downtime scenario. In the above-mentioned architecture, advantages of homodyne and heterodyne architectures are combined. A direct con-

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version receiver is used by the low-frequency standard UMTS (2 GHz), therefore, its well-known drawback, in-phase/quadrature (I/Q) imbalance, is decreased. High-frequency standard WLAN (5 GHz) uses the heterodyne architecture, which gives good leakage rejection between the RF and local oscillator (LO) port, and good selectivity. The concept of a hybrid architecture has been proven as a system on board solution with MOSFET passive mixers used for down-converters [3]. At the time being, a system-on-chip solution is under development. This hybrid architecture provides the maximum number of reusable functional blocks by setting the intermediate frequency (IF) band of the WLAN receiver very close to the RF band of the UMTS receiver. This way, the receiver chain behind the first WLAN mixer uses the same functional blocks for both standards. The active standard is chosen by the user through control and configuration buses. The configuration bus determines which signal path will be processed, whereas the control bus sets the functionality parameters for the implied functional blocks. The unused functional blocks, like the UMTS low-noise amplifier (LNA) in the WLAN mode, are idled to save battery power. Both buses actually represent digital signals coming from higher layers of the BB. Another advantage of this solution is the rational application of the LO frequencies. The heterodyne receiver uses the same LO frequency for both down-conversion stages, thus producing an IF at half of the RF input frequency [4]. That means an LO frequency in the range 2.5–2.9 GHz for WLANs. Moreover, in this solution, the image band is centered around the zero frequency and is highly suppressed by the antenna, channel filter, and LNA, therefore, eliminating the need for external image rejection filters. For the UMTS homodyne architecture, the LO frequency is in the range of 2.1–2.2 GHz. Due to this arrangement of LO frequencies, the quadrature voltage-controlled oscillator (VCO) should work in the range from 2.1 GHz up to 2.91 GHz. Such a relatively narrow tuning range has already been reported in [5]. II. RF-RELATED IMPAIRMENTS Despite advanced submicrometer technologies and several particular solutions (cf. [6]), the designer still has to struggle through technology constrains and increasing requirements. Since the hybrid receiver contains nonideal components, the overall FE performance is affected [7]. Impairments appear at the receiver output signal (I and Q), and handicap its decoding. This problem is ubiquitous and standard independent. However, the maximum level of impairments differs for various standards. For further impairments analysis, it can be assumed that the hybrid receiver is a homodyne receiver, which receives a high. In this case, when the impairfrequency modulated signal ments of a heterodyne architecture should be taken into account, signal has to be improved. the Due to the nondeal components, the following impairments may occur: frequency offset, phase noise, dc offset, I/Q imbalance, and other imperfections. Generally, the high-frequency carrier modulated signal at receiver input can be expressed as (1)

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In case of a WLAN system, the frequency offset disturbs the orthogonality between the subcarriers causing intercarrier interference (ICI).

TABLE I RF-RELATED IMPAIRMENTS

B. Phase Noise In contrast to the frequency offset, which fluctuates rather slowly, quick changes of the LO frequency may also appear [ in (4)]. Since the changes are random and result in unpredictable phase shifts, they are called phase noise. Two problems concerning LO phase noise should be taken into account. First, if any large blocking signal close to the wanted signal appears at the antenna receiver input, LO phase noise will appear at the IF due to reciprocal mixing. The signal-to-noise ratio (SNR) will be automatically decreased. Second, random changes of the LO frequency, even without the blocking signal, also decrease the SNR. C. Direct Current (DC) Offset where is the carrier frequency, is the amplitude modis the phase modulation of the signal. ulation, and The signal (2) contains all the information and it is called the complex envelope. is Due to quadrature demodulation, the received signal down-converted and divided into real and imaginary parts. The can be simplified to local LO signal (3) where is the phase mismatch between the I and Q signal and is the amplitude mismatch factor. denotes the LO frequency. Generally, the phase mismatch may have a considerable value, and is bound to be very close to one. Impairment types are summarized in Table I. In Sections II-A–E, we show impairments’ sources and the possible ways of avoiding them.

The dc offset is an immediate consequence of the direct conversion process in zero IF and near-zero IF receivers. It can be expressed mathematically by adding a constant value to the BB signal components (2). Basically, the dc offset can be classified into the following two types [8]. • Static type: caused by the LO leakage back into the antenna port of the transmitter or by circuit imbalances. This type is most common and varies only slowly. It is often considered fixed over a packet duration. • Dynamic type: resulting from the signal leakage from the RF input to the LO. Combined with the circuit imbalances and nonlinearity within the mixer, this type of dc offset causes second-order intermodulation distortion within the mixer. D. I/Q Imbalance

In order to receive information that is being transmitted through a channel with carrier frequency at the antenna, the receive frequency has to be equal to . Due to the nonideal oscillators, obtaining these frequencies to be equal to each other is not a trivial task, and a sort of impairments called frequency offset occurs. According to that and (2), the BB equivalent signal at the FE output (BB input) can be expressed as

The main source of I/Q imbalance is the final stage of the receiver’s analog part. Mixers, filters, and amplifiers contribute to the I and Q mismatch because of their nonequal gains and group delays. Significant contributors may also be found in the digital part of the receiver. The main reason of phase imbalance is the phase shifter. Main amplitude imbalance contributor is a nonequal gain in the I and Q signal paths. However, these impairments can also originate from the transmitter site, either a base-station or an access point in case of the UMTS or WLAN, respectively. An analytical description of the I/Q imbalance phenomenon may be obtained by processing (3) in a way described in [9]. It leads to the following form of the BB signal delivered by the receiver:

(4)

(5)

for the homodyne case and for the heterodyne case. The term denotes adstems from the ditive white Gaussian noise (AWGN), and phase difference between transmitted and received signals and is responsible for a twist of the constellation diagram. The constellation diagram rotates with angle velocity depending on the difference between the transmit and receive frequency.

is the BB equivalent of the signal where received at the antenna. Equation (5) describes I/Q impairments in a system with solely time-domain signal processing. OFDM-based systems must be considered separately. The output signal’s discrete Fourier transform (DFT) may be expressed as a function of , where

A. Frequency Offset

where

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of the receiver is needed. In reality, its value is point requires more power and more chip limited because high area. Another problem, which has to be considered, are third-order nonlinearities. Since large adjacent channels accompany the received signal, nonlinearities of particular receiver stages (LNAs, mixers) become important. When large adjacent channels in the vicinity of the wanted signal appear at the antenna, the output signal will also contain copies of the adjacent channels. This phenomenon can negatively influence multiuser detection performed in the BB. Fig. 2. Exemplary diagram of I/Q distorted symbols in a time-domain system and an OFDM system. (a) Data channel (DTCH) of UTRA FDD at 64 kbit/s. (b) IEEE 802.11a at 24 Mbit/s.

stands for the sampling frequency. After expressing as an inverse discrete Fourier transform , inserting the result into (5) and computing (IDFT) of DFT, then splitting the exponential terms in their real and imaginary parts and taking advantage of the sum orthogonality, the following equation appears:

(6) where denotes a position symmetrical to within the DFT frame characterized by the length . To simplify the and were referred to as and , notation, respectively. The differences between I/Q imbalance impact on a time division multiple access (TDMA)/frequency division multiple access (FDMA) or CDMA system compared with an OFDM-based one are depicted in Fig. 2 (compare with [10]). The simulation results are backed by (5) and (6). Equation (5) describes the influence of I/Q imbalance on muland single-carrier systems ticarrier OFDM systems for for . Further observations may be derived from the analytical model for OFDM-based systems as follows. • The fast Fourier transform (FFT) length has no relevance for I/Q imbalance, • For each modulation symbol, the resulting constellation consists of the same number of points as the order of the modulation scheme because that is exactly the number of signals that may exist. different • I/Q architecture is very sensitive to amplitude imbalance term in (6). due to the • Regular patterns appear for quadrature amplitude modulation (QAM) schemes due to their symmetry. E. Nonlinearities Nonlinearities is a general term for a whole class of impairments that affect the functionality of a receiver due to nonlinear characteristics of its components. The input power varies in time. In addition to the wanted signal, unwanted signals like adjacent channels and sometimes also interferers appear at the antenna—producing a power level, which can cause nonlinear operation of the receiver. To avoid it, a high 1-dB compression

III. METHODS OF SPO The following section deals with BB SPO methods. A. Frequency Synchronization In case of inexpensive and commonly used crystal oscillators, the inaccuracies range from 3 to 13 ppm with corresponding frequency errors ranging up to 65 kHz when operating at 5 GHz (WLAN). These frequency errors may cause severe degradation of the receiver performance. Another source of frequency offset is the Doppler effect. However, the Doppler related frequency offset will be dominated by phase noise of a much higher variance. Therefore, the compensation methods are targeted at LO inaccuracies rather than Doppler shifts. 1) Frequency Offset Estimation: Undesired carrier frequency offsets resulting from FE nonidealities may be suppressed in the digital BB only. Estimation and correction algorithms may be classified as data aided, nondata aided (using statistical properties), and decision directed. Extensive differences between the UMTS and 802.11a standards make it difficult to apply one estimation and correction algorithm to both systems. Furthermore, the existence of a common pilot channel (CPICH) in the UMTS specification and a packet preamble in IEEE 802.11a, make the choice of separate data-aided algorithms for both systems even more attractive. In order to estimate the frequency offset in the UMTS, one must despread the CDMA signal to separate the desired channel (in this case CPICH) from the other channels and noise. This operation has to be performed with a despreading factor , which is found by an optimization process. The resulting symbols after despreading yield (7) where depends on the frequency offset and on . The chip period is given by , and is the total phase error. Additional noise terms in this and further equations have been intentionally neglected for clarity reasons. In a WLAN system, the frequency estimation is performed using the short training symbols (STSs). The preamble of each packet includes ten equal STSs, each one having 16 samples. Hence, (7) can be rewritten for the preamble in the following way: (8)

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where are the phase-shift keying (PSK) samples, is the period of an STS, and is the carrier phase. In the following, a few efficient compensation methods suitable for an SDR implementation [11], representing the FFTbased algorithms, phase-increment algorithms, and autocorrelation algorithms are described and their performances studied. In case of UMTS, the FFT algorithm can be directly applied to the symbols, whereas for WLANs, the FFT has to be performed on samples with equal values according to [12]. The FFT estimator has quite high computational requirements: a 64-point FFT has to be performed for every frequency estimation in UTRA FDD. The same operation has to be performed up to 16 times for WLAN. The use of the FFT estimator could only be justified by the exploitation of the already implemented FFT for the OFDM modulation and, when this is the case, by its superior performance in comparison to other estimation methods. Recalling the former reason, not only the area used, but also the number of operations (translated into power consumption and required processing speed) plays an important role in the very large scale integration (VLSI) design. With this motivation in mind, other estimation algorithms are going to be studied. Tretter [13] acquired a phase-increment-based frequency estimator for a sinusoid using the least squares approach. Kay [14] obtained a phase-increment-based estimator. Introducing the corresponding phase-difference variables

Fig. 3. Frequency synchronization schemes. (a) UTRA FDD. (b) IEEE 802.11a.

Fig. 4. Normalized variance of the frequency estimators for UTRA FDD with 20-kHz frequency-offset CPICH having 10% of the transmitted power. The variance is normalized to the chip frequency of 3.84 MHz.

where stands for index of the WLAN equal value samples, a maximum likelihood (ML) solution is given by (9) and (10) with

where is the number of symbols used in the estimation. Phase-increment-based algorithms may be improved by of the samples. The making use of the autocorrelation Morelli and Mengali (MM) algorithm [15] uses the autocorrelation values estimating the frequency offset as follows: (11) with

where is a design parameter. For , the algorithm achieves the modified Cramer–Raó lower bound algorithm (MCRLB) [16]. Another, autocorrelation-based estimator, solving the ambiin a recursive way, was proposed by Crozier guity of and Moreland (CM) (cf. [17]). The only difference between the modes is the way the autocorrelation of the samples is performed. 2) Compensation Architecture: Once that the frequency offset has been estimated, the received data has to be digitally compensated for it. This compensation is carried out by the coordinate rotation digital computer (CORDIC) algorithm. As the simulations show, the estimation of the frequency offset is not perfect and, for usual SNR values, there will always be a residual frequency offset one has to face. The synchronization architectures dealing with this residual offset are depicted in Fig. 3. A feedback correction scheme with an adaptive loop filter that minimizes the variance of the estimated offset is proposed for UMTS. For WLANs, a feed-forward structure is proposed, in which the residual frequency offset is being tracked in the frequency domain with help from the pilot carriers. 3) Numerical Results: The performance of the frequencyestimation algorithms presented in this paper is compared in terms of the normalized variance. Symbol timing synchronization is assumed for the simulations. Fig. 4 shows the performances of the frequency estimators for UMTS in two scenarios.

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Fig. 5.

Closed-loop output of the loop filter.

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is adequate for use only above 10 dB. Performances of the MM and CM estimators are quite similar. It was proven that the frequency offset estimators can be implemented in a multistandard way taking advantage of parametrization. The simulations have shown that the estimation algorithms with better performances in the most different situations are the FFT, MM, and CM, with the last showing a slightly worse performance that the other two. The Kay estimator has a high variance and shows threshold. Therefore, it should not be considered for implementation. If the FFT estimator is chosen for implementation, it can take advantage of the already implemented FFT hardware used in the OFDM modulation/demodulation (WLAN). However, we have to ponder the number of operations and the processing time that this algorithm requires and compare with the other two algorithms. B. DC Offset

Fig. 6.

Normalized variance of the frequency estimators for IEEE 802.11a.

In the first situation, an AWGN channel is assumed. It can be observed that all the estimators, except the FFT estimator, approach the MCRLB for high SNR values. The FFT estimator is showing a high error floor because 20 kHz lies between two bins of the FFT and the quadratic interpolation is still biased. In the second situation, a four-tap Rayleigh channel with an user velocity of 3 km/h is used. The formation of a high error floor is observed for all the estimators, with the Kay estimator having the worst performance. Such high variance values (10 corresponds to a mean deviation of 3.84 kHz) will not provide the frequency stability (200 Hz) required by the standard. Thus, we proposed a feedback correction scheme [see Fig. 3(a)] that reduces the multipaths effects on the estimates. The loop filter in this scheme is an adaptive PI controller that changes its outputs based on the past statistics of the estimates . Fig. 5 shows the results. Fig. 6 shows the performance of the frequency estimators for kHz. A five-tap Rayleigh channel with a WLAN with an exponential power delay profile is used in the simulation. The variable , which takes into account the timing imperfection, is set to 16 so that the first STS is ignored. This is done because the first symbol is not affected by the multipath propagation as the others are. Additionally, the variances in the picture are MHz. normalized to the STS frequency All the estimators reach the MCRLB for WLANs. The FFT estimator shows the lowest threshold, while the Kay estimator

To suppress the dc offset, which originates from LO selfmixing, a utilization of a dc offset correction circuit is required. Such a circuit corrects offsets in calibration steps before the receiver even starts operating. It protects the analog-to-digital converter (ADC) from unexpectedly high voltages, which could saturate it. Unfortunately, a small part of the dc offset cannot be corrected in this way because of its random nature. The problem has to be addressed and overcome in the digital BB. The static dc offset may be estimated and then subtracted from the composite signal very effectively [18]. Compared to the static type, the dynamic case is much more seldom, but also more damaging when present. Since the dc offset of our system has proven to be stable during a sufficiently long time span, a straightforward estimation algorithm was applied. C. I/Q Imbalance In order to limit I/Q mismatch, a phase shifter with a small tuning range may be constructed. This way, the phase imbalance can be removed in the FE. To overcome problems with amplitude imbalance, a separate gain control of the I and Q paths is necessary. The gain of the BB variable gain amplifiers (VGAs) is very often controlled by digital inputs and coded. Therefore, only discrete gain values are achievable. This leads to the fact that the maximum gain imbalance is equal to the half of the minimum gain step of the VGA. One cannot change the gain of the VGA without changing its group delay. Therefore, while reducing the gain imbalance, the phase imbalance may become even larger as before the correction. Fortunately, the phase imbalance is not as important as the gain imbalance, as BB simulation results show. 1) Multistandard Aspect: A number of dedicated (standard dependent) solutions for I/Q imbalance compensation in the BB is known. Contrary to these, we have developed compensation methods that are applicable to an SDR receiver, comprising different standards. In order to fulfill the SDR constraints, the blind source separation (BSS) method [19], as an adaptive algorithm waiving any reference signals, has been modified and applied in the time

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domain. Thus, the possibility of an SDR implementation is ensured. The BSS approach is applied for recovering a set of independent signals where only superpositions of the original signals are available. The term “blind” stresses the fact that no a priori information about the underlying mathematical model is necessary for the estimation. As already stated, this attribute of BSS makes it particularly attractive for SDR design. 2) Compensation Algorithms: The following superposition model can be defined: (12) and are vectors whose components define where the independent signals and the mixtures, respectively. The matrix should have full rank and, at most, one source can be Gaussian (cf. [20]). In the BSS approach, a separation matrix is defined, whose output (13) defining the source signals. is an estimate of the vector For an ideal estimation, the total equivalent system should be a quasi-identity matrix. Basically, if more than one Gaussian source is observable, only the non-Gaussian sources can be estimated. Furthermore, the sources can only be recovered up to permutation and scaling. Due to the fact that the mixing matrix is unknown, the separation matrix has to be adapted until the total system matrix is a quasi-identity matrix. From the literature, a number of different approaches to adapt the separation matrix is available [19]–[21]. Our approach belongs to the class of equivalent adaptive separation via independence (EASI) algorithms and updates as the separation matrix

Considering a near-zero IF receiver, where the received signal has to be down-converted from an IF into BB, the input signals of the BSS compensation algorithm can be written as

The complex conjugate coefficients and result from the spectral mirroring of the signal around the negative IF. Due to the fact of direct conversion of the received signal into BB in a zero IF receiver, the input signals for the BSS compensation can be calculated only by forming the complex conjugate . of Based on these considerations, the estimation of the source signals in (13) can be written as

where describes the element of matrix at time . As already shown in (14), the separation matrix has to be adapted. For the calculation of the adaptation matrix , the has to be specified. To guarantee the stability of function the separation matrix, this function has to be nonlinear. In [20], a detailed description and discussion of this condition is given. In has to be additionally phase the complex case, the function preserving. Therefore, we use the following nonlinear function with a low calculation complexity:

Using this function, the terms in (15) may be determined, which leads to the following form of the adaptation matrix:

(16)

(14) where is the adaptation step size and denotes the identity matrix. The matrix-valued adaptation function is of the form (15) denotes the Hermitian vector and is any -dimensional zero memory nonlinear function. For this function, third-order or hyperbolic tangent types of nonlinearities can be used, depending on whether the source signals are sub-Gaussian or super-Gaussian. The separation performance of the EASI algorithms is independent of the actual mixing matrix, which makes this approach additionally interesting for an implementation. To achieve an implementable solution for an SDR, the BSS approach of [19] can be adapted as follows. After analog-to-digital conversion, the down-sampled and in (5) results in imbalanced signal

Finally, using (16), the BSS matrix for the time be obtained as follows:

may

(17) where

where

The elements in the principal diagonal describe the amplitude variation of each output signal; in the secondary diagonal, the mutual influence of the observed signals is characterized. has to At the beginning of the estimation, the matrix be initialized with suitable start values. The correlation between the two incoming signals is supposed to be unknown. Therefore, it is useful to initialize the elements of the secondary diagonal

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Fig. 7. SDR for UMTS and WLAN: reusing the FFT functional block.

with zeros to allow an unrestricted adaptation. The elements of the principal diagonal can be initialized with ones. The parameter specifies the adaptation increment. In the first phase of the estimation, should be large enough to allow a fast adaptation of the matrix elements to the optimal values. FE determined I/Q imbalance effects change rather slowly. Therefore, after the first adaptation phase, the increment can be reduced to a minimum value [9]. The attempts to compensate I/Q imbalance by means of BSS gave satisfactory results. Additionally, a frequency-domain compensation based on the hard-decision (HD) approach [22] has been analyzed. Similarly to BSS, the HD method is independent from the underlying communication standard. Unlike BSS, the HD-based frequency-domain method requires some information concerning the underlying system: the number of carriers and the modulation scheme. However, it discards any knowledge of the data being transmitted, regardless of its character (training symbols, control, payload). Its advantage is the computational simplicity of the correction algorithm terms being estimated derived from (6) with corresponding by HD on the received soft values. Since no information about either or is known, except for the fact that they are constant for all carriers, a set of equations for different carriers must be solved to estimate the impairments. 3) Numerical Results: Both BSS and HD methods are decision directed and, thus, independent from the underlying standard. However, the latter method has a crucial advantage in SDR terms: operating in the frequency domain, it may make use of the already implemented frequency-domain equalization (FDE), as shown in Fig. 7 (compare also [23]). Since the performance of the HD-based method in WLAN systems is somewhat worse than the performance of the BSS algorithm (Fig. 8), the above-mentioned SDR implementation aspects and bit error rate (BER) may be considered as a tradeoff between reconfigurability and performance. Due to its single-carrier character and low-modulation schemes being used, UMTS does not suffer from I/Q imbalance in a way comparable to WLAN. Solely a 16-QAM modulated high-speed downlink shared channel (HS-DSCH) is likely to be affected by the consequences of impairments. Therefore, we additionally developed a standard specific data-aided I/Q compensation method, providing satisfactory results for IEEE 802.11a and a few other OFDM-based standards (i.e., HIPERLAN/2) only. This WLAN preamble based I/Q compensation method (Pre) is transparent for UMTS and does not affect its performance in any way. The advantage of our data-aided solution is that the subsequent channel estimation is facilitated due to the already performed I/Q imbalance compensation

Fig. 8. BER of IEEE 802.11a at 24 Mbit/s (16 QAM) with 0.05 amplitude imbalance and 5 phase imbalance in a frequency-selective channel.

Fig. 9. Impact of I/Q impairments (0.2 amplitude imbalance, 5 imbalance) on channel estimation in an IEEE 802.11a system.

phase

(Fig. 9). Channel estimation values for some carriers do not exist because some inverse fast Fourier transform (IFFT) inputs are set to zero. IV. CONCLUSION In this paper, the whole spectrum of RF related impairments and their influence on communication systems has been addressed. We have focused on reconfigurable transceivers, particularly an SDR supporting UMTS and WLAN. The problem sources in the FE have been identified and extensively described in this paper. Thereafter, several SPO algorithms with appropriate estimation, synchronization, or compensation architectures have been presented. Frequency synchronization by means of FFT, phase increment, and autocorrelation algorithms have been compared. The FFT algorithm turned out to be the best solution, both in terms of performance and ease of implementation. A comparison of I/Q imbalance

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compensation methods has led to a tradeoff between performance and implementation. While BSS performs better, the HD algorithm suits the needs of a reconfigurable system better. ACKNOWLEDGMENT The authors would like to thank M. B. S. Tavares, currently with the Technische Universität Dresden, Dresden, Germany, for his contribution to this paper within his diploma thesis. I. Martoyo, Universität Karlsruhe, Karlsruhe, Germany, also deserves credit for fruitful discussions on FDE. REFERENCES [1] J. Mitola, “The software radio architecture,” IEEE Commun. Mag., vol. 5, no. 5, pp. 26–38, May 1995. [2] R. Circa, D. Pien´ kowski, G. Böck, and R. Wittmann, “Reconfigurable UMTS/WLAN RF receiver,” in Proc. 3rd Software Radios Workshop, Karlsruhe, Germany, Mar. 2004, pp. 65–71. [3] R. Circa, D. Pien´ kowski, G. Böck, and M. Müller, “Double balanced resistive mixer for mobile applications,” in Proc. 15th Int. Microwaves, Radar, Wireless Communications Conf., Warsaw, Poland, May 2004, pp. 347–350. [4] B. Razavi, “A 5.2-GHz CMOS receiver with 63-dB image rejection,” IEEE J. Solid-State Circuits, vol. 36, no. 5, pp. 810–815, May 2001. [5] F. Herzel, H. Erzgraber, and P. Weger, “Integrated CMOS wideband oscillator for RF applications,” Electron. Lett., vol. 37, no. 6, pp. 330–331, Mar. 2001. [6] G. Böck, D. Pien´ kowski, R. Circa, M. Otte, B. Heyne, P. Rykaczewski, R. Wittmann, and R. Kakerow, “RF front-end technology for reconfigurable mobile systems,” in Proc. Int. Microwave Optoelectronics Conf., vol. 2, Brazil, Sep. 2003, pp. 863–868. [7] D. Pien´ kowski, G. Boeck, and R. Atukula, “Baseband-equivalent model of RF impairments in an UMTS receiver,” in Proc. 3rd Int. Advanced Engineering Design Conf., Prague, Czech Republic, Jun. 2003 [CD ROM]. [8] M. Faulkner, “DC offset and IM2 removal in direct conversion receivers,” Proc. Inst. Elect. Eng., vol. 149, no. 3, pp. 179–184, Jun. 2002. [9] P. Rykaczewski, V. Blaschke, and F. Jondral, “I/Q imbalance compensation for software defined radio OFDM based direct conversion receivers,” in Proc. 8th IEEE Int. Orthogonal Frequency-Division Multiplex Workshop, Hamburg, Germany, Sep. 2003, pp. 279–283. [10] P. Rykaczewski, J. Brakensiek, and F. Jondral, “Toward an analytical model of I/Q imbalance in OFDM based direct conversion receivers,” in Proc. 59th IEEE Vehicular Technology Conf., Milan, Italy, May 2004 [CD ROM]. [11] B. Steinke, M. Tavares, and J. Brakensiek, “Multi-standard algorithms for frequency synchronization and channel estimation in IEEE802.11a and UMTS/FDD,” in Proc. 3rd Software Radios Workshop, Karlsruhe, Germany, Mar. 2004, pp. 9–18. [12] J. Li, G. Liu, and G. B. Giannakis, “Carrier frequency offset estimation for OFDM-based WLANs,” IEEE Signal Process. Lett., vol. 8, no. 03, Mar. 2001. [13] S. A. Tretter, “Estimating the frequency of a noisy sinusoid by linear regression,” IEEE Trans. Inf. Theory, vol. 31, no. 6, Nov. 1985. [14] S. Kay, “A fast and accurate single frequency estimator,” IEEE Trans. Acous., Speech, Signal Process., vol. 37, no. 12, Dec. 1989. [15] M. Morelli and U. Mengali, “Carrier-frequency estimation for transmissions over selective channels,” IEEE Trans. Commun., vol. 48, no. 9, pp. 1580–1589, Sep. 2000. [16] A. N. D’Andrea, U. Mengali, and R. Reggiannini, “The modified Cramer-Raó bound and its application to synchronization problems,” IEEE Trans. Commun., vol. 42, no. 2/3/4, pp. 1391–1399, Feb./Mar./Apr. 1994. [17] M. Morelli and U. Mengali, “Feedforward frequency estimation for PSK: A tutorial review,” Eur. Trans. Telecomm., vol. 9, no. 2, pp. 103–108, Jan.–Apr. 1998. [18] A. Bateman and D. M. Haines, “Direct conversion transceiver design for compact low cost portable radio terminals,” in Proc. IEEE Vehicular Technology Conf., San Francisco, CA, 1989, pp. 57–62. [19] M. Valkama, M. Renfors, and V. Koivunen, “Advanced methods for I/Q imbalance compensation in communication receivers,” IEEE Trans. Signal Process., vol. 49, no. 10, pp. 2335–2344, Oct. 2001.

[20] J.-F. Cardoso and B. Hvam Laheld, “Equivariant adaptive source separation,” IEEE Trans. Signal Process., vol. 44, no. 12, pp. 3017–3030, Dec. 1996. [21] S. Haykin, Ed., Blind Source Separation. ser. Unsupervised Adaptive Filtering. New York: Wiley, 2000, vol. I. [22] J. Tubbax, B. Come, L. Van der Perre, L. Deneire, S. Donnay, and M. Engels, “Compensation of IQ imbalance in OFDM systems,” in Proc. IEEE Int. Communications Conf., Anchorage, AK, May 2003, pp. 3403–3407. [23] I. Martoyo, T. Weiss, F. Capar, and F. Jondral, “Low complexity CDMA downlink receiver based on frequency domain equalization,” in Proc. IEEE 58th Vehicular Technology Conf., Orlando, FL, Oct. 2003, pp. 987–991.

Piotr Rykaczewski (S’00) received the mgr in˙z. degree in telecommunications from the Politechnika Gdan´ ska, Gdan´ sk, Poland, in 2001, the Dipl.-Ing. degree in electrical engineering from the Universität Karlsruhe (TH), Karlsruhe, Germany, in 2001, and is currently working toward the Ph.D. degree at the Universität Karlsruhe. His doctoral research includes signal-processing algorithms and architectural solutions for SDRs and RF-related impairments and their compensation in the BB. From 1998 to 2001, he was a scholar of the Klaus Tschira Stiftung. He has been involved in the RMS research project since 2001, during which time he has participated in the development of the BB part of the target system.

Dariusz Pien´ kowski (S’01) received the B.Sc. and M.Sc. degrees in electrical engineering and radioelectronics from the Warsaw University of Technology, Warsaw, Poland, in 2000 and 2001, respectively, and is currently working toward the Ph.D. degree in integrated circuits and systems at the Technische Universität Berlin, Berlin, Germany. His research interests include design of multimode multistandard reconfigurable systems and high radio-frequency analog circuits, especially LNAs and VCOs.

Radu Circa (S’01) received the B.Sc. degree in telecommunications from the University “Politehnica” of Timisoara, Timisoara, Romania, in 2000, and is currently working toward the Ph.D. degree at the Technische Universität Berlin, Berlin, Germany. His research interests include RF integrated circuits for wireless communication systems. He is currently involved with the development of the FE part of the RMS system. His special field is the design of multistandard mixers for reconfigurable RF terminals.

Bernd Steinke received the Dipl.-Ing. degree in electrical engineering from the University of Dortmund, Dortmund, Germany, in 1999. He then joined the Nokia Research Center, Bochum, Germany, as a Research Engineer with the Electronics Laboratory, where he currently develops designs for reconfigurable architectures and their implementation on demonstration platforms. He is also involved in the national and international, respectively, research projects RMS and E R. His other research interests are in the fields of serial gigabit rate transmission inside and between system-on-chip (SoC) with strong emphasis on transmission-line effects and low-power and high-efficiency techniques.

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High-Band Digital Preprocessor (HBDP) for the AMRFC Test-Bed Shamsur Mazumder, Senior Member, IEEE, Jean-Paul Durand, Stephen L. Meyer, Senior Member, IEEE, William D. Weaver, John V. Traverse, Christopher A. Rynas, Glen E. Allshouse, James E. Toland, Jr., and Joseph P. Biondi

Abstract—A fully integrated very wide-band (WB) digital receiver subsystem has been developed to support the Navy Advanced Multifunction RF Concept test-bed program. Input RF signals in the 6–18-GHz band are processed to provide digital outputs for narrow-band and digital beam outputs for WB applications having instantaneous bandwidths of 22 and 230 MHz, respectively. This paper describes the design and performance of the digital receiver subsystem. Index Terms—Analog-to-digital converters, digital beamforming, digital receivers, preprocessors.

I. INTRODUCTION

T

HE GOAL of the Navy Advanced Multifunction RF Concept (AMRFC) program sponsored by the Office of Naval Research (ONR) is to demonstrate capability of performing multiple simultaneous RF functions including radar, communications, and electronic warfare (EW) utilizing a common set of apertures and dynamically reconfigurable hardware. This capability will potentially enhance shipboard EW and communication capabilities, while also reducing the electromagnetic signatures compared to existing ships with their large number of topside apertures. Fig. 1 shows a block diagram of the AMRFC test-bed system. This architecture uses separate electronically scanned solid-state transmit and receive apertures operating over the 6–18-GHz band, called the high band. The test-bed integration is led by the Naval Research Laboratory (NRL) with industry and other Navy laboratory participation. This paper describes design and performance of the highband digital preprocessor (HBDP) subsystem. The HBDP is a fully integrated very wide-band (WB) digital receiver subsystem, which processes RF signals in the 6–18-GHz band to provide simultaneous digital sub-array outputs for downstream narrow-band (NB) beamforming and digital beam outputs for WB applications. The NB applications include satellite commu-band satelnication (SatCom) links utilizing commercial lite, as well as military satellite, multiple line-of-sight common

Manuscript received April 5, 2004; revised October 1, 2004. This work was supported by the Office of Naval Research under Contract N00014-99-C-0314. Distribution: Approved for public release; distribution is unlimited. S. Mazumder, J.-P. Durand, J. Traverse, and G. E. Allshouse are with Integrated Defense Systems, Raytheon Company, Sudbury, MA 01776 USA (e-mail: [email protected]). S. L. Meyer, W. D. Weaver, C. A. Rynas, and J. E. Toland, Jr. are with the Raytheon Company, Dallas, TX 75266 USA. J. P. Biondi is with Integrated Defense Systems, Raytheon Company, Tewksbury, MA 01876 USA. Digital Object Identifier 10.1109/TMTT.2005.843511

data link (CDL), and navigation radar functions, while the WB applications include a high-gain high-sensitivity (HGHS) electronic surveillance (ES) application. II. HBDP Fig. 2 shows a simplified functional block diagram of the HBDP subsystem. The major functions of the HBDP include RF downconversion, NB preprocessing, WB processing, reference signal distribution, hardware control, data collection, and storage. The HBDP receives 6–18-GHz RF signals from sub-array outputs of the receive array through 45 low-loss coaxial cables. Each of the 45 “channels” passes through a high dynamicrange RF downconverter (DC) module, which performs double downconversion from 6 to 18 GHz to an IF signal of 720 MHz, filtered to bandwidths (BWs) of 400 and 230 MHz. A total of 27 channels are further filtered and processed in the narrow-band preprocessor (NBP) modules for NB applications, while the other 18 channels are processed in the wide-band processor (WBP) units for WB applications. Each NBP module processes two NB channels. Each NB channel is downconverted, further filtered, digitized, serialized, and converted to send the data over an optical fiber using the G-link protocol [5] to the NB digital beamformer subsystem. The 18 WB channels are processed in the WBP units, which perform A/D conversion, digital beamforming, fast Fourier transforming, data serialization, and optical conversion. A set of nine WB digitized channels is used to form two simultaneous digital beams, each of which can be output in either the time or frequency domain. Thus, the two WBP units can provide a total of four simultaneous digital beams that are sent over optical fibers to be received and processed by the HGHS ES equipment. The reference signal distribution assembly receives the reference local oscillator (LO) signals, calibration tones, and clock inputs from the AMRFC test-bed signal generation unit and distributes these signals to various functional units in the HBDP subsystem. The HBDP controller receives operational commands from the AMRFC system resource allocation manager (RAM) to configure the HBDP hardware for real and nonreal time operations. The data collection unit (DCU) of the HBDP subsystem contains 32 channels each containing 128 MB of high-speed buffer memory, and allows real-time data collection of 120 MB/s of data per channel. The data from the DCU buffer memory may be sent over fiber to a modular removable 320-GB RAID storage

0018-9480/$20.00 © 2005 IEEE

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Fig. 1. AMRFC test-bed system block diagram.

Fig. 2.

HBDP block diagram.

Fig. 3.

HBDP hardware packaging and configuration.

system in the HBDP. The RAID can record approximately 80 1-s slices of data per disc (assuming all 32 channels at 100% duty). The DCU and RAID may be used to collect and record data from the NB or the WB units of the HBDP.

The laptop PC is used to perform diagnostics by accessing the data in the DCU buffer memory and perform some data analysis. Fig. 3 shows a photograph of the HBDP subsystem, which is packaged in a standard three-bay rack assembly providing

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Fig. 4.

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Block diagram of RF DC.

adequate electromagnetic interference (EMI) shielding, safety, and interconnect features for test-bed operations. III. RF DC Fig. 4 shows a block diagram of the high dynamic-range RF DC module. It performs double downconversion from 6 to 18 GHz to an IF signal of 720 MHz, filtered to BWs of 400 and 230 MHz. The front-end low-noise amplifier (LNA) provides less than 6.5 dB of overall noise figure (NF) over the 6–18-GHz band. The integrated limiter protects the LNA with no damage up to 30 dBm of continuous wave (CW) RF input power. The input 1-dB compression level of more than 0 dBm allows operation in the presence of high out-of-band interference signals. The reconfigurable eight-channel pre-selector allows selection of any of the eight bands over 6–18 GHz for the particular NB and WB applications. Dual IF operation with selectable first IF allows suppression of undesirable mixer spurious products [1]. A programmable IF attenuator (0–20 dB in 1-dB steps) provides the capability to perform system-level channel calibration and equalization. The DC module provides an overall gain of approximately 30 dB for the NB channel and approximately 40 dB of gain for the WB channels. The module has provision for greater than 400-MHz BW IF output for future growth. The DC module is of a plug-in type of construction with blind-mate RF connectors and digital signal interfaces to the backplane on a Versa Module Eurocard (VME)-based chassis. Each RF DC module consumes about 17 W of dc power.

is filtered with a 720 MHz (22-MHz BW) cavity filter before being applied to the NBP module. The module performs single downconversion from 720 MHz to an IF of 75 MHz, and is further filtered to a BW of 22 MHz. More than 70 dB of antialiasing filtering is realized by the combined effect of the external cavity filter and the surface-mount filter inside the module. Each NB channel is then digitized [3] by a 14-bit ADC, and IF sampled at 60-MHz clock rate. Over the 22-MHz instantaneous BW, the module provides greater than 70 dB of signal-to-noise ratio (SNR). A field-programmable gate-array (FPGA)-based design is used to insert various test pattern data to help during diagnostic and verification tests. Header data may be inserted at the beginning of each data transmission to help in identifying the data. Each channel utilizes a G-link transceiver chipset [5] to serialize the A/D data followed by fiber-optic transmitter chips [6] to send the data over optical fiber at approximately 1-Gbit/s rate. The digital serial interface to the NBP module is controlled by the HBDP controller, as described below. The module provides more than 70 dB of spurious suppression, and over 80 dB of channel-to-channel isolation. The dual-channel NBP module consumes less than 14 W of dc power. The NBP module packaging consists of a multilayer printed circuit board with two-sided surface mount components, enclosed in a metal housing to realize EMI shielding, blind-mate RF connectors, and digital signal interfaces to the backplane on a VME-based chassis.

IV. NBP

V. WBP

Fig. 5 shows a block diagram of the NBP module. Each module processes two NB channels. Each NB channel signal

Fig. 6 shows a functional block diagram of the WBP unit that receives nine WB channels at 720 MHz, band-limited to

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Fig. 5.

Block diagram of NBP.

Fig. 6.

WBP functional diagram.

230 MHz, from the output of the RF DCs described above. There are two WBP units in the HBDP to process the 18 WB channels. Each WBP unit performs four basic functions, which are: 1) IF to digital conversion; 2) digital beamforming; 3) fast Fourier transformation (FFT); and 4) formatting data for transmission over optical fiber. These functions are realized using Raytheon-designed application-specific integrated-circuit (ASIC) chipsets [2] and unique board designs. Each of the 230-MHz BW WB channels is digitized by an 8-bit ADC operating at 960-MHz sampling rate followed by further digital down conversion. Harmonic suppression of over 60 dB and an effective number of bits (ENOB) of 7.3 bits were measured. The custom ASIC chipsets allow digital phase, gain, and delay adjustments for each of the nine channels [2].

The amplitude and phase balance among the nine channels may be adjusted digitally to within less than 0.18 dB and 1 , respectively. Each WBP unit forms two digital beams in the time domain from any or all of the nine WB channels using programmable weights. The WBP unit also performs time- to frequency-domain processing on each of the two beams using programmable weights and twiddles to produce real-time 512-point FFTs. Either or both of the digital output beams can be selected to be either time or frequency-domain data. The WBP provides test pattern insertion at multiple points in the data path to assist in diagnostic and verification tests. Headers are inserted at the beginning of each data transmission to assist in identifying the data. Data is serialized using the G-link serial protocol followed by

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Fig. 7. AMRFC SW interface diagram. Fig. 8. HBDP measured performance for NB channels.

optical transmitters to send the data over optical fiber. Each digital output beam data is sequentially distributed over a total of eight fibers each at a serial data rate of approximately 1.2 Gbit/s. VI. HBDP CONTROLLER The HBDP controller consists of a VME enclosure and backplane populated with a single-board computer (SBC), hardwarecontroller (HC) modules, VME repeater modules, and power supplies. Software resident on the SBC initializes, controls, and provides status of the HBDP hardware, which consists of DC modules, NBP modules, WBP assemblies, and the DCU. The SBC receives real-time commands over a serial fiber data link and nonreal time commands over an Ethernet link from the AMRFC system RAM. A custom VME backplane provides the interface between the SBC, HCs, and VME repeaters. The HCs are FPGA-based designs and control the DC and NBP modules using differential low-voltage differential signaling (LVDS) serial interfaces. Each serial interface controls multiple modules using a party-line bus arrangement. A master HC generates a synchronous 1-ms period internal timing signal based on the system timing strobe and uses this internal signal to initiate SBC software activity, output party-line commands, and control application of these commands to the HBDP hardware. The WBP assemblies receive initialization and control data from the SBC through the VME repeater interface. The HBDP controller also performs nonreal time calibration and diagnostics as per instructions received from test-bed RAM over Ethernet. The HBDP controller reports the calibration data, diagnostics results, and status back to the RAM over Ethernet. VII. HBDP SOFTWARE CONTROL (HSC) The interface to the HSC software is described in Fig. 7 and its major capabilities are described below. A UNIX startup script, initiated by the AMRFC test-bed operator through a VxWorks shell, spawns all system tasks, including the HSC task. Prior to the spawning of the HSC program, the real time network control (RTNC) application program interface (API) software tasks, and Digital System Resources (DSR) Middleware Software tasks, which read and process commands received from the AMRFC test-bed RAM, must be spawned.

HSC functions are called from the HSC main to initialize the HBDP and enable it to respond to RAM requests. This software supports both real time and nonreal time processing. When the software is operating in real time, it filters and tests real-time commands from the AMRFC test-bed RAM and uses data from these commands to configure the HBDP hardware. Subsets of the data can also be stored on the RAID hard disk upon request from the AMRFC test-bed RAM. HSC status is returned to the AMRFC test-bed RAM when a change in status is detected or when specifically requested by the AMRFC test-bed RAM. After system calibration, the AMRFC test-bed RAM may request WBP calibration data stored in the DCU to be transferred by the HSC to the AMRFC test-bed signal data processor (SDP). When the software is operating in nonreal time, the HSC software can perform diagnostic testing of the HBDP, process commands for the DCU, and provide upon request status to the AMRFC test-bed RAM. VIII. CALIBRATION The HBDP contains built-in passive RF distribution hardware for calibration purposes. This distribution assembly can accept an external calibration signal and couple it into the inputs of all of the 45 downconverters (Fig. 2). An external passive distribution assembly, which is independently calibrated, is then used to inject the same signals into the HBDP channel inputs. The data from both sets of measurements are then used to calculate the complex coupling coefficients of the internal RF distribution hardware. These correction factors are stored in the HBDP’s calibration files to be used during all subsequent system calibration measurements [4]. IX. HBDP PERFORMANCE The performances of the HBDP were measured to meet the key system requirements [1]. The functions of HBDP subsystem are controlled by software. Upon command, as specified by the resource allocation message, the hardware in each “channel” is configured to: 1) receive the RF signal from a specified subarray of the receive arrays; 2) pre-select the specified band for NB or WB application; 3) apply specified attenuator settings;

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REFERENCES [1] M. F. Adler and J. P. P. Durand, “Receiver design for very wide band multi function systems,” presented at the Government Microcircuit Applications and Critical Technology Conf., San Antonio, TX, Mar. 2001. [2] W. Weaver, “Raytheon general-purpose wideband digital receiver,” presented at the Government Microcircuit Applications and Critical Technology Conf., San Antonio, TX, Mar. 2001. [3] J. B. Y. Tsui, Digital Techniques for Wideband Receivers. Norwood, MA: Artech House, 2001. [4] J. de Graaf, G. Tavik, M. Bottoms, and C. Tatum, “Calibration overview of the AMRFC test bed,” in IEEE Int. Phased Array Systems Technology Symp., Oct. 14–17, 2003, pp. 535–540. [5] “HDMP-1032/1034 transmitter/receiver chipset,” Agilent Technol., Palo Alto, CA, Data sheet and application note, 2000. [6] “Fiber optic transceiver for gigabit Ethernet, Agilent HFCT-5912E and HFCT-53D5 family,” Agilent Technol., Palo Alto, CA, Data sheet and application note. Fig. 9.

HBPD measured performance for WB channels.

or 4) send either test pattern, digitized NB digital data, or WB digital beam data to the specified destination. Fig. 8 shows typical performance of an NB channel when a single-frequency RF signal is applied at the input of the HBDP. The digital output is collected by the DCU and the data is analyzed using the laptop. The NB channels provide greater than 60 dB of dynamic range over the processing BW of 22 MHz. Isolation between adjacent NB channels is better than 80 dB. Fig. 9 shows typical performance of the WB channels. As, mentioned earlier, a set of nine WB channels are processed by each WBP unit to form two digital beams. The spurious free dynamic range (SFDR) of the WB channels (after beamforming) is better than 45 dB over the processing BW of 230 MHz. Isolation between adjacent WB channels are better than 40 dB. The overall NF of all the channels is typically 4.5 dB at 6 GHz to 6.5 dB at 18 GHz. The HBDP can handle a maximum of 30 dBm of CW RF power input without damage. The overall ac power consumption by the three-rack cabinet equipment was measured to be less than 6000 W compared to a specified maximum of 8000 W. The electronics in the three racks are cooled by forced air convection. Each cabinet has inlet vents on the front door and exhaust fans on the top surface. Each chassis has fans, properly sized according to heat loads, to push or pull external air over modules and power supplies, and exhausts to interior of the cabinets. The worst case temperature rise from the inlet to the exhaust air flow was measured to be less than 10 .

Shamsur Mazumder (M’75–SM’93) received the M.S. and Ph.D. degrees in electrical engineering from the Carleton University, Ottawa, ON, Canada, in 1973 and 1977, respectively. He is currently with Integrated Defense Systems, Raytheon Company, Sudbury, MA, where he is the IPT and Technical Lead for the HBDP program. Since 1980, with the Raytheon Company, he has contributed in various technical and managerial roles. His past activities encompassed various areas such as microwave integrated circuits, components, receiver and transmitter subsystems, GaAs monolithic microwave integrated circuits (MMICs) for military and commercial applications, FPGA designs, etc. He has authored or coauthored numerous publications. Dr. Mazumder is a Raytheon Engineering Fellow.

Jean-Paul Durand received the B.E. degree in electrical engineering from the Stevens Institute of Technology in Hoboken, NJ, in 1981, and the M.S.E.E. degree in communications and signal processing from Northeastern University, Boston, MA, in 1990. He is currently with Integrated Defense Systems, Raytheon Company, Sudbury, MA, where he is the Hardware Electrical Lead Engineer for the HBDP downconverter and NBP developed as part of the Navy AMRF-C V1 test-bed. He possesses 22 years of experience with the Raytheon Company, mainly in Naval and land-based radar system designs. He pioneered the development of early digital waveform generators for WB radars such as Cobra Judy, designed a low-noise exciter for ROTHR and led the receiver/exciter designs for BMEWS and TARTAR. He also developed a high dynamic-range receiver replacement for the Navy’s SPS-49 digital sidelobe canceller program. More recently, he led the receiver/exciter design and production of the ATNAVICS Army air-traffic-control vehicle program.

X. CONCLUSION The design and performance of a fully integrated 6–18-GHz-band digital receiver subsystem has been presented. This subsystem has been integrated in the AMRFC test-bed system, which is currently undergoing testing. ACKNOWLEDGMENT The authors would like to thank many people who contributed to the successful design and delivery of the HBDP hardware. Special thanks are due to R. T. Custer, N. W. Habboosh, B. A. Ferrara, E. F. Winters, S. E. O’Connor, and J. E. Hilliard, Jr., all of Integrated Defense Systems, Raytheon Company, Portsmouth, RI, and Tewksbury, MA.

Stephen L. Meyer (M’77–SM’97) received the B.E.E. degree from the Georgia Institute of Technology, Atlanta, in 1972. He is currently with the Raytheon Company, Dallas, TX, where he is a Senior Principal Engineer and the Hardware Electrical Lead Engineer for the WBP developed as part of the Navy AMRF-C V1 test-bed. He possesses over 37 years of experience in the defense industry, mainly in airborne radar systems. He has been instrumental in programs such as ATF (YF22) Dem/Val, where he was responsible for module control concepts and solid-state phased array (SSPA) (a 2000-element 36-in active aperture proof of concept program), where he designed a module controller and beam-steering computers. Over the years, he has been active in the development of control systems for phased-array modules, high-speed optical communication and control interfaces, radar receiver control, and digital receiver design.

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William D. Weaver received the B.S.E.E. degree from the Rensselaer Polytechnic Institute, Troy, NY, in 1981. He is a Senior Fellow with the Raytheon Company, Dallas, TX, where he is the Lead System Engineer of the HBDP WBP. He has been with Texas Instruments Incorporated/Raytheon Company for 23 years, during which time he has been involved in the areas of phased-array antennas, ADCs and digital receivers, digital signal processing, radar system design, and advanced ASIC architectures. His current research is in optically linked architectures for WB digital beam forming. Mr. Weaver was the recipient of the 2003 Raytheon Excellence in Technology Meritorious Lifetime Achievement Award for the development of the most advanced WB digital receiver yet fielded at the Raytheon Company.

Glen E. Allshouse received the B.S.E.E.T. from Metropolitan State College, Denver, CO, in 1985. For four years, he has been with Integrated Defense Systems, Raytheon Company, Sudbury, MA, where he is the Software Lead for the AMRF-C HBDP program. He has worked within the software engineering field 23 years, 18 of which are related to government defense work for Rockwell, Loral, Boeing, and the Raytheon Company. Some of the other government projects that he has been involved with are XBR, AEGIS, NAVSTAR, ASAT, PRIME, Rail Garrison ICBM, and Boeing 747 Integrated Display System (IDS).

John V. Traverse received the B.S.E.E. degree from Tufts University, Medford, MA, in 1967, and the M.S.E.E. degree from Northeastern University, Boston, MA, in 1974. He is currently with Integrated Defense Systems, Raytheon Company, Sudbury, MA, where he is the Digital Lead Engineer for the HBDP subsystem controller developed as part of the Navy AMRF-C V1 test-bed. He is a Principal Engineer and has been with the Raytheon Company for 32 years. During his career, he has contributed to the design of RF target simulation equipment and land-based radar digital subsystems.

James E. Toland, Jr., photograph and biography not available at time of publication.

Christopher A. Rynas received the B.S.E.E.T. degree from the Devry Institute of Technology, Phoenix, AZ, in 1978, and the Master of Engineering degree from Texas Tech University, Lubbock, in 2003. He is currently with the Raytheon Company, Dallas, TX, where he is the Lead Systems Engineer for the WBP. He possesses over 25 years of related experience in the defense arena. His related experience includes circuit card design, unit design, system design, system and subsystem requirement analysis, subcontractor management, and program management. He is a core member of the Processing Systems Technology Network, Raytheon Company, and co-chair of the Digital Receiver Technical Interest Group, Raytheon, Company.

Joseph P. Biondi received the M.S.E.E. degree from the University of Massachusetts, Amherst, in 1990 and the B.S.E.E. degree from The Pennsylvania State University, University Park, in 1987. He is currently with Integrated Defense Systems, Raytheon Company, Tewksbury, MA, where he is a Program Manager with the Advanced Technology Group. He is responsible for cost, schedule, and milestone performance of Raytheon’s ONR-sponsored AMRFC programs. These include the Version 2 Architecture Study Program and the Highband Technology Program (HiTeP), which includes the design, fabrication, and integration of the HBDP hardware for the Navy Version 1 AMRFC test-bed. He has been with the Raytheon Company for 17 years and has contributed to the design and development of numerous antennas and phased-array systems with significant contributions to programs including AEGIS ER, Hawk, Patriot, THAAD, Iridium, and GBR-P. His assignments over the past several years have included managing the Antenna Design Section, Microwave Systems Department, and serving as Lead Engineering Manager for the Advanced Airborne Interceptor Simulator Program and the India Airport Surface Detection Equipment Program.

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Comprehensive Digital Correction of Mismatch Errors for a 400-Msamples/s 80-dB SFDR Time-Interleaved Analog-to-Digital Converter Munkyo Seo, Mark J. W. Rodwell, Fellow, IEEE, and Upamanyu Madhow, Senior Member, IEEE

Abstract—Comprehensive digital calibration of a high-speed and high-resolution time-interleaved analog-to-digital converter (TIADC) is described. A channel transfer function, which incorporates all linear errors between analog input and digital output, is measured for each channel by applying a series of sinusoids. A set of finite-impulse response (FIR) filters designed by the weighted least squares principle provides frequency-dependent mismatch correction so that the spurious-free dynamic range (SFDR) is no longer limited by channel mismatches. A four-channel TIADC prototype with 14-bit resolution and 400-MHz aggregate sampling rate was built to verify the proposed correction method. Uncalibrated SFDR was below 50 dB. After mismatch correction with 61-tap FIR filters, 80 dB of SFDR was achieved up to 175 MHz of input frequency. Index Terms—Analog–digital conversion, calibration, mismatch correction, time-interleaved analog-to-digital converters (TIADCs).

I. INTRODUCTION

I

N ORDER to increase the sampling rate of an analog-to-digital converter (ADC) beyond a certain process technology limit, the use of a time-interleaved analog-to-digital converter (TIADC) has been proposed [1]–[20], [27]–[29]. A TIADC has a parallel structure where a number of ADCs independently sample the input signal. The input analog signal is successively sampled by each ADC in a cyclic manner, and the digital output is similarly taken from each ADC to reconstruct the signal stream in digital form. The overall sampling rate is, therefore, multiplied by the number of ADCs. A TIADC finds its application in electronic systems such as radar, direct digital receivers, base-station receivers, and high-speed instrumentation, as well as opto-electric systems including photonic ADCs [4]–[7]. A TIADC performs high-throughput analog-to-digital (A/D) conversion with no degradation in spectral purity if all ADCs have identical electrical characteristics (e.g., gain, sampling time, input bandwidth, dc offset, etc.). In practice, however, various electrical mismatches are inevitable, which periodically modulate the input signal. The array’s spurious-free dynamic range (SFDR) is then reduced due to spurious sidebands generated by this modulation.

Manuscript received September 2, 2004; revised November 24, 2004. This work was supported by the Office of Naval Research under Grant N000140410104 and by the Graduate Division, University of California at Santa Barbara under a Science and Engineering Research Grant. The authors are with the Department of Electrical and Computer Engineering, University of California at Santa Barbara, CA 93106 USA (e-mail: mkseo@ engineering.ucsb.edu). Digital Object Identifier 10.1109/TMTT.2005.843487

Therefore, to achieve the highest SFDR feasible, channel mismatches must be eliminated or calibrated by using either analog circuitry [8], [9], [11]–[13] or digital signal processing [14]–[20]. Digital correction is preferred due to its reliability and flexibility. Continued scaling of process technologies also make digital processing increasingly inexpensive. Traditionally, TIADC mismatch correction has been mostly attempted in terms of several frequency-independent parameters such as gain, sampling time, and offset mismatches. This parametric approach is easily implemented, and is adequate for low-to-moderate resolutions. In high-resolution data conversion, however, spectral purity is easily compromised by even slight channel mismatches because of the low quantization noise floor. For example, 80 dB of SFDR requires approximately 0.01% of residual channel mismatches [7]. Parametric correction is, in general, not able to achieve this level of mismatch correction over a wide frequency range and, therefore, comprehensive (i.e., frequency dependent) mismatch correction is necessary. Very high-speed time-interleaved A/D conversion may also require comprehensive mismatch correction due to differences between channels in the high-frequency transfer functions of the input analog circuitry. The application of hybrid filter banks (HFBs) to TIADC has been proposed to attenuate channel mismatches [21]–[23], [25]. In this architecture, a set of analog filters split the input signal into separate frequency bands in either discrete [21] or continuous [22], [23], [25] time. Outputs from sub-converters are combined through a digital filter bank. Although the performance of HFB converters is less sensitive to mismatch errors than conventional TIADCs, the need of accurate analog filters restricts their practical use. Recently, an important observation has been made by Velazquez and Velazquez [24]: analog filters at the input are not necessary given a properly designed digital filter bank. This suggests a practical way of mismatch correction for high-performance TIADCs, i.e., comprehensive error correction only by digital post-processing. Commercial TIADC products, with 12-bit resolution and 400–500 Msamples/s (MSPS) conversion rate, are also developed based on his approach [35], [36]. In this paper, we propose a comprehensive mismatch correction method, as well as experimental verification, which, unlike the previous techniques, fully exploits the stopband structure of input analog circuitry for more efficient correction. In designing correction finite-impulse response (FIR) filters, aliasing spurs due to the sub-converter mismatches are individually controlled within the computational framework of the weighted least squares (WLSs).

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for a discrete-time frequency spectrum with period , we inthroughout the paper for readability. stead use All S/H and ADC blocks are assumed to be linear and have zero offset. Channel offset is independently measured during calibration and is subsequently digitally subtracted from each ADC output. Time invariance (or shift invariance) is assumed for all linear systems. Assuming that the resolution of the individual ADCs is high, we neglect their quantization effects. In Fig. 1(a), two typical sources of mismatches are shown: ’s and ’s for A/D conversion gain and systematic sampling time deviation from a nominal point, respectively. As we and are not sufwill show later with experimental data, ficient to describe all significant TIADC errors. For example, S/H blocks may have different 3-dB bandwidth, and the adjacent channels may have unequal crosstalk due to the integrated-circuit (IC) interconnect environment or due to a finite S/H off-state isolation. Small variations will exist between channels in their midband frequency response due to power supply and ground impedance and standing waves on interconnects. A TIADC system with all these linear imperfections can be conveniently modeled with a set of equivalent channel-transfer functions (CTFs) followed by a multiplication by an impulse train, as can be seen in Fig. 1(b)

Fig. 1. Four-channel time-interleaved ADC system. (a) Actual system with two representative linear imperfections (i.e., unequal sampling time deviation and ADC gain). (b) General linear model with CTFs. An output multiplexing switch in (a) is replaced by a multiplication by an impulse train. All the linear distortions in each channel are lumped into a single CTF.

A frequency-dependent linear model of the TIADC is derived in Section II. Section III describes generation of aliasing errors in terms of the linear model. In Section IV, the characterization of channel mismatches is discussed along with practical concerns. Sections V and VI each presents the design of FIR filters and experimental results of a 14-bit 400-MSPS prototype. Section VII gives the conclusion. II. LINEAR MODEL OF TIADC Fig. 1(a) shows a four-channel TIADC configuration. Each with an approchannel converts analog input signal every . priate delay so that the aggregate sampling rate is to The bandwidth of the input signal has to be smaller than avoid aliasing. Although operation in any Nyquist zone is possible as long as the sample-and-hold (S/H) circuitry has sufficient bandwidth, we assume, for simplicity, that the input signal . is confined within the first Nyquist zone, i.e., from dc to It is noted that, for -channel interleaved operation, the S/H blocks must have -times wider bandwidth than is required for , i.e., their input bandwidth single-channel conversion at . -channel interleaved has to be equal to or greater than A/D conversion also requires the sampling clock to have -fold higher timing stability (lower phase noise). The assumption of a band-limited input simplifies notation by allowing discrete-time representation of all signals including the is the conventional notation ADC input. Although

whose period is equal to , the number of TIADC channels. is the delta function. For example, with only gain and . timing error, a CTF will have the form A CTF may actually include any linear distortion pertaining to each channel from S/H input to ADC output. It may also incorporate preceding linear systems common to all channels (e.g., an antialiasing filter). It is noted that CTFs are not necessarily causal, especially when there is a sampling time mismatch. This comes from the fact that a band-limited signal at any instance can be represented as a weighted sum of nominal sample values, both in the past and future [26]. III. GENERATION OF ALIASING ERROR Aliasing in the presence of individual gain, timing, and offset mismatches has been extensively discussed in the literature [1], [3], [10], [22], [25], [27]–[29]. This section gives more general description in terms of CTF. The TIADC linear model in Fig. 1(b) suggests each channel output is a filtered (by a CTF) and aliased (by an impulse train) version of the input spectrum. It can be shown that the th channel output is written as

(1) is the Fourier transform of the input signal , where is the th channel CTF. The first term with and corresponds to a desired signal component, while terms with are frequency-shifted versions of the

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input spectrum. When all channel outputs are combined to yield , these frequency-translated versions of a TIADC output the input spectrum are cancelled if all CTFs are the same. In the presence of CTF mismatches, however, cancellation is imperfect, producing aliasing error, as will be discussed below. TIADC, The final output of the four-channel in Fig. 1(b), is obtained by summing all channel outputs

(2)

where

’s are defined as

(3) Equation (2) shows the TIADC output spectrum generally has both the desired signal and a frequency-shifted aliasing defined component, each with a corresponding gain is an effective conversion gain from an input in (3). . signal at to a frequency-shifted output at Throughout this paper, will be referred to as signal will be referred to as noise conversion gain, while conversion gain. It is interesting to note from (3) that the set of can be regarded as conversion gain a four-point discrete Fourier transform (DFT) of the CTF se. If all CTFs are the same quence , (i.e., no mismatch), then all DFT coefficients, except cancel, resulting in zero aliasing error. In this case, SFDR is, therefore, not limited by aliasing spurs. With the presence of is nonzero, in general, channel mismatches, however, and SFDR is limited by the aliasing spurs whose magnitude is proportional to the corresponding noise conversion gain . Fig. 2 graphically illustrates how CTF mismatch generates spurious signals on the TIADC output spectrum. It is noted in Fig. 2(b) that the positive and negative frequency components of the input spectrum each experiences different conversion gains. For example, assume , which has two coma real-valued input sinusoid at plex exponentials at frequencies and (or, equiv). The positive-frequency tone at alently, passes through the CTFs and, by DFT analysis, we obtain the conversion gain with corresponding . aliasing spurs at experiences On the other hand, the image tone at , the channel gain which is equal to (

Fig. 2. Illustration of aliasing-spur generation mechanism. (a) In general, with channel mismatches, each CTF is a different function of frequency. CTFs and their DFT coefficients at f are plotted on a complex plane. It is seen that c (f ) are nonzero vectors due to the CTF mismatch at f . (b) Input and output spectrum with a real-valued sinusoid at f . The DFT coefficients of the CTF play the role of conversion gain from an input tone to each output spectral line including the signal tone, as well as aliasing spurs. Both input and output spectrum satisfies conjugate symmetry across dc and f =2. Note that spurious tones reduce the maximum SFDR achievable.

denotes the complex conjugate). According to the properties of DFT [26], the resulting conversion gain is with output spurs at . In summary, for an -channel TIADC, with a real-valued , spurious tones due to the CTF mismatch input sinusoid at are generated at (4) On the other hand, the mismatch in channel dc offset produces error tones at the frequencies [29] (5) It should be noted that offset mismatch does not modulate the input signal, but always produces spurs at fixed frequencies.

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IV. CHARACTERIZATION OF CTF The CTF can be characterized at a single frequency by first applying a sinusoid with known frequency at the TIADC input, and then measuring the individual channel outputs. For a full characterization over a frequency range of interest, either a series of single-frequency tests must be performed or a carefully designed wide-band signal (e.g., a frequency-domain comb signal [22]) is required. Our work is based on a series of single-frequency measurements. We assume a single sinusoid excitation. If we consider only the signal part (i.e., the output spectral line at the input frequency) from each channel output given by (1), then . Hence, knowledge of the magnitude and phase of the input sinusoid allows unique determination of the value of the CTF at the input frequency. In order to identify the signal part, frequency-shifted spectra should not fall into the same frequency bin with the signal tone. It can be shown from (4) and (5) that the input signal frequency should satand , where isfy . These conditions can be met by a careful seto an inlection of test frequencies. For example, setting teger multiple of , and making and relatively prime (i.e., have 1 as the only common factor) guarantees the signal tone is not ruined by mismatch spurs. In the case where the test signal generator has significant harmonic content, care has to be taken to avoid aliasing due to harmonics folded down to the first Nyquist zone. In some cases, bandpass filtering of the signal generator may provide enough attenuation. Alternatively, a certain set of calibration frequencies may be discarded. On the other hand, uncorrelated noise, such as phase noise, quantization noise, or wide-band white noise can be averaged out by taking a long acquisition time on the channel outputs. The set of test frequencies should span at least the frequency range of interest (i.e., the passband of the input analog circuitry or the entire Nyquist zone if all-pass). The frequencies should be dense enough to accurately characterize channel mismatches. The value of CTF between measurement points, if needed in correction FIR filter design, may be estimated by interpolation [26]. It is noted, however, there is no practical substitute for an initial pilot characterization with a sufficiently large number of test frequencies. The number of test frequencies may be kept minimal once CTFs have been accurately characterized. In practice, it is convenient to normalize a CTF with respect to an appropriately chosen reference (e.g., first-channel gain [22] or averaged CTF across channels). This is more practical than characterizing input sinusoids using an external amplitude and phase reference. Linear gain and phase distortion information, which is common to all channels in this case, may be lost during normalization. However, channel mismatch information, which is crucial to the SFDR performance of TIADC and, hence, also to the correction FIR filter design, is still preserved. It is noted that a band-limited impulse may also be used for the purpose of CTF characterization. In general, however, a high-quality impulse is harder to generate, has a lower signal-to-noise ratio at a given peak voltage, and is more prone to aliasing than sinusoids due to its wide-band spectrum unless the antialiasing filter has a very sharp cutoff.

Fig. 3.

TIADC cascaded by a set of mismatch-correction FIR filters.

V. DESIGN OF CORRECTION FIR FILTERS Once CTFs are measured, digital filters can be designed to correct mismatch errors. In Fig. 3, a length- FIR filter is cascaded for every channel, and the filter outputs are then combined , the error-corrected output. Our goal is to make to form a faithfully reconstructed version of the input . For an -channel TIADC, can be written, similarly as in (2), as a weighted sum of frequency-shifted input signal spectrum (6) The conversion gain after correction ( tion of FIR filter coefficients as follows:

) is now a func-

(7) and are the impulse and frequency In (7), response of the th channel length- FIR filter, respectively. needs For perfect reconstruction of the input signal, to be designed so that and are as close to an ideal time-delay system and zero as possible, respectively. For aliasing-free reconstruction, on the other hand, the only zero across the entire strict requirement is to make frequency range. In this case, may introduce additional linear distortion as well as time delay. Mismatch spurs are still suppressed, however, and the spectral purity is not compromised by them. Therefore, both reconstruction strategies are equally effective in achieving a high SFDR as long as the is tolerable. In certain TIADC linear distortion due to applications, where subsequent digital filtering is provided, the residual linear distortion can be further equalized. unknown FIR filter coefficients, ’s, There are in (7), and these can be uniquely determined given a proper . One possible method is number of desired values of equations with an equal number to solve the system of

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of unknowns by specifying the desired conversion gain for over discrete frequencies [22]–[24]. The proposed design approach based on WLS, however, fully exploits the stopband structure, thus, providing greater flexibility and a useful tradeoff in signal reconstruction. A. WLS Formulation We first form a system of conversion gain equations, for both signal and noise, by equating the right-hand side of (7) to a desired gain value over discrete frequencies. With the incorporation of equation-wise weighting, the entire system of equations can be written in a standard matrix-vector form (8) where each matrix or vector has a substructure as follows:

.. .

.. .

..

..

.

(10) denotes complex-conjugate transpose. It can be where shown that minimizes the weighted mean-squared error and actual conversion between the desired conversion gain . If and test frequencies are chosen such gain , obtained that complex-conjugate symmetry is obeyed, by (10), will be real valued. Otherwise, if we explicitly conto be real valued, the optimum solution is strain . Two design options are of interest: unweighted and weighted design. B. Unweighted Filter Design In unweighted design, the weighting matrix is an identity matrix so that no equation in (8) is weighted heavier or lighter than others. The only parameter that controls the quality of error correction is , the FIR filter length. Due to the Gibbs phenomenon [26], [31], the conversion gains realized by the resulting FIR filters usually have significant ripples. Ripples in signal conversion gain have a minor effect on SFDR, but ripples in noise conversion gains directly reduce SFDR by generating excessive aliasing spurs, as experimental results will later show. Therefore, in order to remove such ripples, filter coefficients are multiplied by a window function. Unweighted design is simple to use, but lacks flexibility. The designed filter, if multiplied by a window, is not optimal in any sense.

.. .

.

true, in general, (8) is an overdetermined system of equations, and the unique solution in a least square sense is [30]

.. .

.. .

C. Weighted Filter Design .. .

(9)

where

: the number of channels : the number of evaluation frequencies : filter length In (8), is an is an is , and is an matrix or row vector. The an weighting matrix is represented in a square-root form for convenience. The desired conversion gain is specified by (specifand for signal and noise conversion gain, respecically, tively). Each conversion gain is evaluated at discrete frequencies from to . The first equations in (8) define the equations signal conversion gain, and the remaining , which is dictate the aliasing noise conversion gain. If

Weighted design provides more control over mismatch correction, and allows full exploitation of “don’t care” frequency bands. In a classical FIR filter design, a “don’t care” band (or “transition” band) refers to a frequency region where no desired filtering response is specified [31]. For TIADC mismatch correction, there is another useful observation: aliasing spurs are free to remain uncancelled within “don’t care” bands. This additional benefit from “don’t care” bands has not been exploited before to the authors’ knowledge. All these relaxed requirements are taken into account by assigning zero or very small weights to the corresponding gain equations in (8). The resulting set of equations achieves a smaller total mean-squared error with the same number of FIR filter taps, yielding more satisfactory error correction. In general A/D conversion systems, a bandpass input signal conditioning circuit (e.g., a transformer) introduces both lower and upper cutoff frequencies ( and ), and we naturally have two “don’t care” bands: one in a lower end (dc to ) and to ). Even without bandpass the other in a higher end ( input circuitry, sampling time mismatches justify the use of a higher-end “don’t care” band. In correcting timing mismatches by using FIR filters, there always exists an upper end frequency band where the approximation error is relatively large [32]. Although this error can be made smaller by using more FIR filter taps, the upper-end band can be advantageously considered a “don’t care” one as well.

SEO et al.: COMPREHENSIVE DIGITAL CORRECTION OF MISMATCH ERRORS FOR 400-MSPS 80-dB SFDR TIADC

Fig. 4. Representative weighting scheme for a four-channel TIADC (i.e., illustration of (11) when M = 4). Input analog circuitry is assumed to have a passband from f to f . Corresponding stopbands are designated as “don’t care,” and, hence, have a very small weighting factor ( or  ). Small-weight regions around f =4 correspond to input frequency bands where aliasing spurs fall into “don’t care” bands.

We may also employ unequal weighting between signal and noise conversion gain equations for a tradeoff between the degree of aliasing-spur cancellation and the amount of residual linear gain-phase distortion. This realizes aliasing-free reconstruction (instead of perfect reconstruction) in a controllable manner. With the incorporation of all previous considerations, weighting factors can be defined as (see Fig. 4 for a four-channel example) "don't care" band otherwise "don't care" band or "don't care" band otherwise, (11) where and quantifies the individual contribution of signal and noise conversion gain errors, respectively. It and . is understood that Weighting strategies for TIADC correction are summarized as follows. 1) Signal and noise conversion gain may be arbitrarily defined within “don’t care” bands. 2) Aliasing spurs may fall into and remain uncancelled within “don’t care” bands. 3) The amount of residual linear distortion can be traded off with the degree of aliasing-spur cancellation by adjusting . Applicability of each strategy may depend on the application. For example, 1) assumes input signal within the “don’t care” bands is sufficiently weak or attenuated so that its aliasing spurs are negligible, and 2) and 3) implies subsequent digital filtering

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Fig. 5. Experimental setup for a 14-bit 400-MSPS TIADC prototype. (a) Block diagram. (b) Photograph of a clock/signal distribution board and four ADC boards.

is capable of removing aliasing spurs within “don’t care” bands or of equalizing the linear gain-phase distortion common to all channels. VI. EXPERIMENTAL RESULTS To demonstrate the proposed calibration method, we developed, characterized, and performed mismatch correction on a four-channel TIADC prototype. 400 MSPS of aggregate samis achieved with 14-bit resolution by interleaving pling rate four 14-bit 100-MSPS ADC chips [33]. Fig. 5 shows the experimental configuration. The clock and input test signal are phase locked to each other, and appropriately filtered to reject harmonics and wide-band white noise. A distribution board consists of power splitters and delay lines to provide four-phase 100-MHz clocks (i.e., 0 , 90 , 180 , and 270 ) and an equalphase input signal to the four ADC boards. The digital output is captured by a logic analyzer, and calibration is done on MATLAB. All instruments are controlled by custom software for automatic characterization. A. Data Acquisition and CTF Characterization For performance evaluation of the proposed correction method, data is acquired at 249 signal frequencies with ( MHz) of spacing. The TIADC is first calibrated using every fourth frequency for CTF characteriza. This particular tion: choice of characterization frequencies systematically avoids aliasing due to mismatch spurs since 125 is relatively prime . Although the signal generator’s fourth harwith monic falls into the same frequency bin as the fundamental and , the antialiasing filter tone at [see Fig. 5(a)] attenuates the fourth harmonic to a negligible level. Channel offset is estimated by averaging the measured

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Fig. 7. (a) Polar and (b) decibel plot of noise conversion gains calculated from the measured CTFs in Fig. 6(b) and (c). c (f ) is always 1 due to the CTF normalization. Note that c (f ) is the dominant aliasing error except at low frequencies.

Fig. 6. Measured CTFs. (a) Average magnitude response before normalization. The antialiasing filter creates large attenuation over 185 MHz. Measured average phase response is not shown since the relative phase between the clock and signal is not known. (b) Magnitude and (c) phase response after normalization. Dots denote measurement points. The value of CTF at dc is set equal to the magnitude of nearest measured points (ADC boards have ac-coupled input circuitry).

ADC dc output voltage for each run across the whole range of characterization frequencies. Fig. 6(a) shows the average magnitude response of the measured CTFs (the output power variation with frequency arising from the signal generator is also lumped into the magnitude response). Fig. 6(b) and (c) shows the magnitude and phase response after normalization with respect to the average value across channels for each frequency. The relatively large mismatch at very low frequencies is due to differences between the low-frequency cutoffs of the ADC input transformers (which is approximately 2 MHz). The phase response at midband frequencies approximates a straight line, which suggests timing mismatch is dominant (approximately 1.3%, 0.6%, 0.4%, and 1.1% of the sampling period). The input antialiasing filter has approximately 50 dB of attenuation near 200 MHz. Random measurement error is, thus, amplified around this frequency, producing a large CTF mismatch near 200 MHz. Fig. 7 shows noise conversion gains, which are calculated from DFT analysis of the normalized CTFs. Superposition of

all three noise gains in a single decibel plot [see Fig. 7(b)] allows the prediction of uncalibrated SFDR performance to within the magnitude response of a normalization reference (i.e., average CTF values). It is seen in Fig. 7(a) and (b) that creates the dominant aliasing spur ( 30 dB at high frequenis the highest frequency component obtainable from cies). four-point DFT, and its basis vector is an alternating sequence . This specific mismatch pattern can be traced back to the clock/signal distribution board where channel 1, 3 [two right ADC boards in Fig. 5(b)] and channel 2, 4 [two left ADC boards in Fig. 5(b)] each have identically shaped delay lines. B. Mismatch Correction With Unweighted Filter Design The previously estimated offset is subtracted from a corresponding channel output before dynamic mismatch correction. The FIR filter coefficients are first obtained by the unweighted least squares method, and then multiplied by a Hanning window to eliminate ripples in the frequency response. It has been found experimentally that 18 bit is sufficient for coefficient quantization with a reasonably small loss of performance (e.g., 1-dB SFDR loss). Fig. 8(a) and (b) shows the magnitude and phase response of the resulting 41-tap FIR filters. Dotted and solid lines each represent the frequency response before and after applying a Hanning window to the tap coefficients, respectively. It is seen that significant passband ripples are present before windowing, but they are smoothed out after windowing. Fig. 9 shows a typical output spectrum before [see Fig. 9(a)] and after [see Fig. 9(b)] mismatch correction. The CTF and and , respectively, in offset mismatch spurs (marked as

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Fig. 8. (a) Magnitude and (b) phase responses of the correction FIR filters: unweighted design, 41 tap. The center tap is chosen as the time reference. Dotted and solid lines each represent the frequency response before and after applying a Hanning window to the tap coefficients.

Fig. 10. Improvement in SFDR with mismatch correction: unweighted FIR design. (a) Before and (b) after applying a Hanning window to the FIR filter coefficients.

Fig. 9. Typical TIADC output spectrum (DFT of 62K samples): (a) before and (b) after mismatch correction by 21-tap FIR filters (unweighted design). An input sinusoid is applied at 1 dBFS and (70=500)f , which falls midway between two CTF characterization frequencies. Note that the noise floor reflects the antialiasing filter rolloff. The label 1 designates a fundamental tone, 2, 3; . . . ; and 7 harmonics of the signal generator, X , Y , and Z CTF mismatch spurs due to the fundamental-, second-, and third-order harmonics, respectively, and the O offset mismatch spurs.

0

Fig. 9) are typically suppressed to better than 80 dB below full scale (dBFS). Low-order harmonics from the signal generator are seen to have a significant power level since they are within

the passband of the antialiasing filter. It is noted that the signal generator harmonics, as well as a fundamental tone, generate and in corresponding aliasing spurs. The signal label, Fig. 9 represent mismatch spurs at and , respectively. Fig. 10(a) and (b) shows the SFDR improvement over a full Nyquist zone by mismatch correction with FIR filters before [see Fig. 10(a)] and after [see Fig. 10(b)] windowing of filter coefficients. Signal generator harmonics up to seventh order are neglected for all SFDR measurements. The inferior SFDR characteristics seen in Fig. 10(a) compared to those of Fig. 10(b) is a direct result of excessive ripples in realized noise conversion gains, which are, in turn, due to the ripples in the frequency response of the unwindowed FIR filters. For the remainder of this paper, windowing of tap coefficients is assumed whenever an unweighted FIR design is discussed. Before correction, the SFDR is limited by mismatch spurs over the entire Nyquist zone. After correction, the percentage of bandwidth where mismatch spurs determine SFDR is only 52%, 27%, and 22% for 21-, 41-, and 61-tap FIR filters, respectively, if we do not consider the upper and lower 20 MHz. For the rest of the frequency region, SFDR is typically limited by nonharmonic MHz or higher order ( seventh) harmonics, spurs at both coming from the signal generator. The SFDR drop at both ends of the Nyquist zone originates from phase discontinuities near dc and 200 MHz seen in

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(G )

Fig. 12. Calculated SFDR with frequency-independent gain and timing correction (solid curve). Dotted and dashed–dotted line mismatch each represents the limiting SFDR after frequency-independent correction considering only gain and phase mismatch, respectively.

(1t )

Fig. 11. Comparison of unweighted and weighted FIR filter design (21 tap). (a) SFDR performance after correction. (b) Overall system gain from TIADC input to corrected output. Shaded regions are “don’t care” bands for weighted design.

Fig. 6(c). These discontinuities cannot be equalized by FIR filters and, therefore, approximation error is inevitably introduced. Windowing of the filter coefficients spreads this error in frequency [34] into a narrow frequency region if the FIR filter has many taps. Therefore, a longer FIR filter provides error correction over a wider range of frequencies. The sharp cutoff of antialiasing filter also contributes to a sudden SFDR drop near 200 MHz by quickly attenuating signal power. The drop in SFDR at low frequencies may be eliminated by making the CTF phase continuous across dc (e.g., by using dc-coupled input analog circuitry or by sharing a single ac-coupled circuitry for all channels). In contrast, the drop in SFDR cannot be completely removed due to the inherent near phase discontinuity across the Nyquist frequency in the presence of timing mismatches. Using longer FIR filters, however, extends effective mismatch correction to higher frequencies. Note the close agreement of uncalibrated SFDR between the measurement [see Fig. 10(a) or (b)] and prediction [see Fig. 7(b)]. C. Unweighted Versus Weighted Filter Design Fig. 11 compares weighted and unweighted filter design. The FIR filters have 21 taps in both cases. The unweighted FIR filter design is the same as in Fig. 10(b). For the weighted design, “don’t care” bands are set to the upper and lower 7.6% of Nyquist zone, where systematic SFDR drop occurs. We also to be large in favor of strong cancellation of choose

aliasing spurs rather than perfectly flat gain and phase response. and Resulting weighting factors are . As seen in Fig. 11(a), the weighted design enables a wider frequency range of mismatch correction than the unweighted design with an equal number of FIR filter taps. Spurious signals within the “don’t care” bands are ignored in the SFDR calculation for the weighted design. This improvement is obtained, however, by introducing some amount of linear gainphase distortion into the overall system transfer function from TIADC analog input to corrected digital output. In Fig. 11(b), the dotted curve is the system gain realized with the unweighted FIR filter design, and is equal to the average CTF, which serves as a reference for CTF normalization. It is seen that the system gain with weighted filter design [solid line in Fig. 11(b)] has additional linear distortion ( 2.5 dB) with respect to the reference. This distortion may be equalized by subsequent digital filtering if needed. Although sinusoids are used for the SFDR performance test, it is noted that the proposed calibration method is equally effective with any band-limited input signal, as this can be represented as a sum of sinusoids within the Nyquist zone. This is because the TIADC system is linear and time-invariant once mismatches are ). corrected (this can be seen from (6) with D. Frequency-Dependent Versus Frequency-Independent Correction Traditional frequency-independent calibration is compared with the proposed correction method. From the measured CTFs in Fig. 6(b) and (c), a best fit frequency-independent gain and in Fig. 1(a)] are individually extracted timing error [ and for each channel. The upper and lower 20 MHz are not considered during the extraction for a better fit within the passband (20–180 MHz). A new set of CTFs are generated by directly . calibrating out the errors, i.e., The magnitude of aliasing spurs are predicted from noise conversion gains, which are obtained by DFT analysis, as discussed in Section III. The resulting SFDR is shown as a solid curve in Fig. 12, and is typically 10–25 dB worse than the one attained with the comprehensive correction in Figs. 10 and 11. Also shown in Fig. 12 are the maximum SFDR achievable after frequency-independent correction, limited by the residual gain (or phase) mismatch assuming no phase (or gain) mismatch.

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E. System Drift The TIADC prototype system was put into 4 h of continuous operation after a 1.5-h warm-up period. Data was acquired every half hour. Correction FIR filters were designed using the first acquisition data, and SFDR performance was evaluated for every subsequent data. Calibration accuracy ( 80 dB of SFDR) was maintained up to the third acquisition (1-h operation). The loss of SFDR after 4 h was approximately 10–15 dB. We expect that the drift rate may be much less with a monolithic implementation, where thermal gradients and PC-boards and cable phase shifts are minimized. These important considerations are still under investigation and will be reported in the future. VII. CONCLUSION Digital correction of frequency-dependent mismatch error is essential for high-resolution and high-speed TIADCs. In this paper, we have proposed and demonstrated a comprehensive correction method, which is capable of exploiting stopband structure. Although we have assumed linearity, actual ADCs may exhibit significant nonlinearity. For example, we find experimentally that the CTF is a weak function of input signal amplitude. For a high-resolution converter, even a slight calibration detuning may result in a significant loss of SFDR. Further research is required to address secondary effects not considered in this paper such as nonlinearity, temperature effect, aging, component drift, etc. ACKNOWLEDGMENT The authors would like to thank Prof. K. T. Cheng, Electrical and Computer Engineering (ECE) Department, University of California at Santa Barbara (UCSB), for the use of the TLA 714 Tektronix logic analyzer. The authors appreciate the helpful comments of Prof. S. Chandrasekaran, ECE Department, UCSB. The authors would also like to thank various comments from anonymous reviewers, which helped to make this paper more consistent. REFERENCES [1] W. C. Black, Jr. and D. A. Hodges, “Time interleaved converter arrays,” IEEE J. Solid-State Circuits, vol. SSC-15, no. 6, pp. 1022–1029, Dec. 1980. [2] K. Poulton, J. J. Corcoran, and T. Hornak, “A 1-GHz 6-bit ADC system,” IEEE J. Solid-State Circuits, vol. SSC-22, no. 6, pp. 962–970, Dec. 1987. [3] A. Montijo and K. Rush, “Accuracy in interleaved ADC systems,” Hewlett-Packard J., vol. 44, no. 5, pp. 38–46, Oct. 1993. [4] T. R. Clark and P. J. Matthews, “Real-time photonic analog-digital converter based on discrete wavelength-time mapping,” in Int. Topical Microwave Photonics Meeting, vol. 1, Nov. 1999, pp. 231–234. [5] R. C. Williamson, P. W. Juodawlkis, J. L. Wasserman, G. E. Betts, and J. C. Twichell, “Effects of crosstalk in demultiplexers for photonic analog-to-digital converters,” J. Lightw. Technol., vol. 19, no. 2, pp. 230–236, Feb. 2001. [6] J. C. Twichell, J. L. Wasserman, P. W. Juodawlkis, G. E. Betts, and R. C. Williamson, “High-linearity 208-MS/s photonic analog-to-digital converter using 1-to-4 optical time-division demultiplexers,” IEEE Photon. Technol. Lett., vol. 13, no. 7, pp. 714–716, Jul. 2001. [7] P. W. Juodawlkis, J. C. Twichell, G. E. Betts, J. J. Hargreaves, R. D. Younger, J. L. Wasserman, F. J. O’Donnell, K. G. Ray, and R. C. Williamson, “Optically sampled analog-to-digital converters,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 10, pp. 1840–1853, Oct. 2001.

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[32] V. Välimäki, “Discrete-time modeling of acoustic tubes using fractional delay filters,” Ph.D. dissertation, Dept. Elect. Commun. Eng., Helsinki Univ. Technol., Helsinki, Finland, 1995. [33] “AD6645: 14-Bit, 80/105 MSPS A/D converter data sheet,” Analog Devices Inc., Norwood, MA, 2003. [Online]. Available: http://www.analog.com. [34] A. V. Oppenheim and R. W. Schafer, Discrete-Time Signal Processing. Englewood Cliffs, NJ: Prentice-Hall, 1989. [35] “AD12400: 12-Bit, 400 MSPS A/D converter data sheet,” Analog Devices Inc., Norwood, MA, 2004. [Online]. Available: http://www.analog.com. [36] “AD12500: 12-Bit, 500 MSPS A/D converter data sheet,” Analog Devices Inc., Norwood, MA, 2003. [Online]. Available: http://www.analog.com.

Munkyo Seo received the B.S.E.E. and M.S.E.E. degrees in electronic engineering from Seoul National University, Seoul, Korea, in 1994 and 1996, respectively, and is currently working toward the Ph.D. degree in electrical engineering at the University of California at Santa Barbara. From 1997 to 2002, he was a Research Engineer with LG Electronics Inc., where he designed RF and microwave subsystems for wireless communication. His research interest includes microwave and mixedsignal circuit design and digital signal processing.

Mark J. W. Rodwell (M’89–SM’99–F’03) received the B.S. degree from the University of Tennessee at Knoxville, in 1980, and the M.S. and Ph.D. degrees from Stanford University, Stanford, CA, in 1982 and 1988, respectively. He is currently Professor and Director of the Compound Semiconductor Research Laboratories, University of California at Santa Barbara. From 1982 to 1984, he was with AT&T Bell Laboratories. His research focuses on very high-bandwidth bipolar transistors, high-speed bipolar IC design, and gigahertz mixed-signal ICs. His group has worked extensively in the area of GaAs Schottky-diode ICs for subpicosecond/millimeter-wave instrumentation. Dr. Rodwell was the recipient of a 1989 National Science Foundation Presidential Young Investigator Award, and the 1997 IEEE Microwave Prize for his work on submillimeter-wave diode ICs.

Upamanyu Madhow (S’86–M’90–SM’96) received the Bachelor’s degree in electrical engineering from the Indian Institute of Technology, Kanpur, India, in 1985, and the M.S. and Ph.D. degrees in electrical engineering from the University of Illinois at UrbanaChampaign, in 1987 and 1990, respectively. From 1990 to 1991, he was a Visiting Assistant Professor with the University of Illinois at UrbanaChampaign. From 1991 to 1994, he was a Research Scientist with Bell Communications Research, Morristown, NJ. From 1994 to 1999, he was with the Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, initially as an Assistant Professor and, since 1998, as an Associate Professor. Since December 1999, he has been with the Department of Electrical and Computer Engineering, University of California at Santa Barbara, where he is currently a Professor. His research interests are in communication systems and networking, with a current emphasis on wireless communication. Dr. Madhow has served as associate editor for Spread Spectrum for the IEEE TRANSACTIONS ON COMMUNICATIONS and as associate editor for Detection and Estimation for the IEEE TRANSACTIONS ON INFORMATION THEORY. He was a recipient of the National Science Foundation (NSF) CAREER Award.

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Integrated Antenna/Power Combiner for LINC Radio Transmitters Steven (Shichang) Gao, Member, IEEE, and Peter Gardner, Senior Member, IEEE

Abstract—This paper presents integrated antennas, which can fulfill both the functions of an antenna and a power combiner, thus reducing the circuit loss. This will be useful for linear amplification using nonlinear components systems, where the circuit-level power-combiner losses degrade overall efficiency. Two antennas, which use a single-layer structure and a multilayer structure, respectively, are designed. Both antennas achieve good impedance-matching characteristics under both even- and odd-mode excitations. The single-layer antenna has a narrow bandwidth, and the even-mode radiated power at boresight is 33 and 26 dB lower than that of the odd-mode radiated power -plane, respectively, thus demonstrating the at the - and effective suppression of even-mode radiation. The other antenna using multilayer structure achieves a broad-band bandwidth ( 11 10 dB) of 15.5% and 8% under the odd- and even-mode excitation, respectively. Across the bandwidth, broadside radiation patterns with low cross-polar levels ( 21 dB) are achieved under the odd-mode excitation, while the even-mode radiation is also suppressed. Index Terms—Antenna, integrated antenna, linear amplification using nonlinear components (LINC), mobile communication, power combiner, transmitter.

I. INTRODUCTION

I

N MOBILE communication systems, nonlinearity in a radio transmitter gives rise to numerous problems such as the inter-symbol interference, the crosstalk between channels in multiple carrier systems, and the interference through out-of-band emissions arising from spectral regrowth [1]. The linearity problems may be overcome by using several techniques, including the use of linear class-A power amplifiers (PAs), the linearization [2], [3], the linear amplification using nonlinear components (LINC)/combined analog-locked loop universal modulator (CALLUM) systems [4]–[7], and the predistorted LINC system [8]. The use of class-A PAs is undesirable in most systems because the power-added efficiency is very poor. Predistortion linearization offers an attractive means of providing modest improvements in the more efficient PAs, but at the expense of increased complexity, especially if the adaptation to temperature and ageing effects are required. Feedforward linearization can provide excellent cancellation of nonlinear effects, but the RF bandwidth is limited and the poor

Manuscript received February 27, 2004; revised September 27, 2004. This work was supported by the Engineering and Physical Sciences Research Council under Grant ROPA GR/R0094401 and Grant GR/S42538/01. S. Gao is with the School of Engineering, Northumbria University, Newcastle Upon Tyne NE1 8ST, U.K. (e-mail: [email protected]). P. Gardner is with the School of Electronic and Electrical Engineering, Birmingham University, Birmingham B15 2TT, U.K. (e-mail: [email protected]). Digital Object Identifier 10.1109/TMTT.2005.843491

tolerance of manufacturing variations, temperature, and aging effects make the tuning of transmitters very critical. LINC transmitters operate on the basis that any signal with amplitude and/or angle modulation can be represented as the vector sum of two constant-envelope angle-modulated signals [4]–[7]. The two signals can each be resolved into component vectors, one of which is in-phase with the overall sum vector, and the other one is out-of-phase with the sum vector. The in-phase components add to produce the wanted signal, and the out-of-phase component signals cancel. The depth of the amplitude modulation depends on the angle between the two constant-envelope signals. The great advantage of the LINC system lies in the fact that the bandwidth efficient nonconstant envelope signal formats can be generated while using high-efficiency nonlinear PAs (such as class-F PAs) with constant envelope outputs to avoid the nonlinearity problems. Microstrip antennas have found wide applications during recent years due to their inherent advantages of low cost, low profile, and conformability. An integrated antenna has been applied to push–pull PAs in [9], where a dual-feed antenna is used. An integrated antenna for LINC transmitters was first presented in [10], however, only a few simulation results are given. Some results of the integrated power-combining antenna are given in [11], while a compact power-combing antenna capable of harmonics suppression is reported in [12]. The antennas in [10]–[12] use odd-mode combination. A power-combining antenna using the even-mode combination is reported in [13]. This paper describes both theoretical and experimental results of two integrated antennas, where the power combiner involved in the conventional LINC is removed, and the power combination is realized within the integrated antenna. II. THEORY AND DESIGN The conventional configuration of the LINC PA is shown in Fig. 1(a), where an input signal is divided into two constant-envelope signals by a signal components separator (SCS). SCS can be realized by using digital signal-processing components [14], [15]. The constant-envelope signals are amplified by PAs and then combined by using a power combiner. The power combiner can, for example, be a Wilkinson power combiner. Finally, the combined signal is transmitted through an antenna. As illustrated in [16]–[18], the power-combiner circuit is one big contributor to the efficiency of the LINC system, and the loss introduced in it will significantly affect the efficiency. The configuration of the proposed integrated-antenna LINC system is presented in Fig. 1(b). The input stage is the same as the conventional LINC. However, a dual-feed microstrip patch antenna with a resistor -loaded microstrip line ml connecting

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Fig. 2.

Mask of the designed single-layer integrated antenna.

Fig. 3.

Multilayer broad-band integrated antenna.

Fig. 1. (a) Conventional LINC transmitter with power combiner. (b) Integrated-antenna LINC.

two feeding lines has replaced the power combiner in the output stage. From the comparison between them, it can be seen that the integrated-antenna LINC has at least the following three advantages: 1) improvement of efficiency by removal of the conventional power combiner; 2) more compact in size; 3) higher levels of circuit-antenna integration, thus better in reliability and performances. The integrated antenna can be described as a four-port structure, where ports 1 and 2 are two input ports feeding the antenna, port 3 is at the resistor , and port 4 is an invisible radiation port. The “even-odd” mode analysis technique will be employed to analyze this integrated antenna, which will be reduced into two simpler cases driven by symmetric and asymmetric sources at two input ports, respectively [19]. To ensure the proper operation of the integrated-antenna LINC transmitter, the integrated antenna should produce the proper radiation during the oddmode excitation, while the power during the even-mode excitation should be eliminated and dissipated through the resistor . Several conditions should be satisfied as follows. • During the odd-mode excitation, signals applied to two feeds excite the patch resonance and produce the radiation, while the microstrip line ml should present an open circuit at points and . • During the even-mode excitation, the microstrip patch anand , tenna should present an open circuit at points while the even-mode power is dissipated through a shunt resistor inserted at the center of microstrip line ml. As the microstrip patch antenna is basically a half-wavelength resonator, during odd-mode excitation, the two input feeds of the structure will excite identical radiation modes with identical phase in the antenna. The microstrip line ml has a length of at the design frequency so that it presents an open circuit at the points and during the odd-mode excitation.

To demonstrate the concept, a single-layer antenna is designed and the mask is presented in Fig. 2. The microstrip bow-tie patch with dual inset feeds is employed to achieve impedance matching during the odd-mode excitation. Note that a grounded resistor is to be inserted at the center of microstrip line ml. In the case of this design, we choose the

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Fig. 4. Measured and simulated return losses of the single-layer integrated antenna in the odd and even mode.

Fig. 7. Measured radiation patterns of a single-layer antenna under odd-mode excitation at 1.81 GHz.

Fig. 5. Odd- and even-mode return-loss results of the multilayer integrated antenna.

at the same frequency. The inset depth of microstrip feeding line is 16 mm at both sides. The minimum width of the bow-tie patch is 50 mm. The RT/Duroid dielectric substrate with a permittivity of 2.2 and a height of 0.78 mm is used. To broaden the bandwidth, a further design is built using stacked microstrip patches. The resulting multilayer structure is shown in Fig. 3(a). The mask of the lower patch with microstrip line ml is presented in Fig. 3(b), where a rectangular patch with dual inset feeds is employed. In this design, we choose the value of resistor to be 37.5 . The lower patch is 40 mm 51 mm in size. The upper patch is a rectangular patch of 54 mm 58 mm, and its mask is given in Fig. 3(c). An air layer having a thickness of 7 mm is maintained between two patches. The dielectric substrate has a permittivity of 2.2 and a thickness of 1.143 mm.

Fig. 6. Test setup for exciting the integrated antennas in the odd and even mode during radiation patterns measurements.

value of resistor to be 37.5 so that it will achieve impedance matching to the input port during the even-mode excitation. The bow-tie patch has a length of 51 mm and a maximum width of 70 mm, which is smaller than a rectangular patch resonant

III. SIMULATED AND EXPERIMENTAL RESULTS A.

-Parameters

1) Single-Layer Antenna: To perform the simulation, we use the moment method in HP ADS software (Agilent Technologies, Palo Alto, CA). The -parameters of integrated

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Fig. 8. Measured patterns of a single-layer antenna under even-mode excitation at 1.81 GHz.

Fig. 9. Measured radiation patterns of a multilayer antenna under odd-mode excitation at 2.0 GHz.

antennas are measured by using a network analyzer. The measured return loss under odd- and even-mode excitation is and , respectively. Fig. 4 gives equal to the measured return-loss results for the single-layer antenna under the odd- and even-mode excitations, respectively. Good impedance matching has been achieved at 1.81 GHz for both modes, with return losses better than 15 dB in both cases. For comparisons, simulated results of the antenna are also presented in Fig. 4. As a single-layer microstrip patch is used in the design, the integrated antenna has a narrow bandwidth, and the antenna characteristics are very sensitive to the fabrication tolerances, which introduce some discrepancies between the simulated and measured results.

The results of even-mode achieve a bandwidth of nearly 8% (i.e., 1.93–2.09 GHz). At 2.0 GHz, the return loss result is 13.4 and 13 dB for the odd- and the even-mode excitations, respectively. For comparison, Fig. 5 also shows the simulated return-loss results of the integrated antenna under the odd- and even-mode excitations, respectively. The difference between measured and simulated results is due to the fabrication tolerance.

B. Multilayer Antenna For the multilayer integrated antenna, as shown in Fig. 3, the measured results of odd- and even-mode reflection coefis 10 dB ficients are given in Fig. 5. The odd-mode in the range from 1.83 to 2.14 GHz, a bandwidth of 15.5%.

C. Radiation Patterns 1) Single-Layer Antenna: The measurements of radiation patterns of the integrated antenna under the odd- and even-mode excitations are then undertaken in an anechoic chamber. The integrated antenna is used as a receiving antenna, while the signal is transmitted by a wide-band antenna (balanced antipodal Vivaldi antenna) operating between 1–40 GHz. To excite the integrated antenna in odd or even mode, an experimental setup is shown in Fig. 6. The two output feeding ports of the integrated antenna are connected to two input ports of a microstrip

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at 2.0 GHz are also presented in Fig. 10. It is observed that the even-mode radiated power at boresight is 25 and 29 dB lower than that of the odd-mode radiated power at the - and -plane, respectively, thus again demonstrating the effective suppression of even-mode radiation. To study the radiation patterns variation across the bandwidth, the radiation patterns during both the odd- and the even-mode excitation are also measured at 1.9 and 2.1 GHz, and results are omitted for brevity. It is observed that the radiation patterns are relatively stable across the bandwidth, and the even-mode radiation is suppressed. IV. CONCLUSION Two integrated antennas for LINC/CALLUM systems have been presented. The integrated antenna can fulfill both functions of a radiator and a power combiner, thus reducing the circuit loss. Both antennas achieve good impedance-matching characteristics under the even- and the odd-mode excitations. Good radiation patterns with low cross-polar levels are observed under the odd-mode excitation, while the even-mode radiation is suppressed effectively. The measured results for the multilayer antenna demonstrate that it achieves a bandwidth dB) of 15.5% and 8% under odd- and even-mode ( excitation, respectively. Besides the removal of the power-combiner loss, the integrated-antenna LINC also has a more compact size compared to the conventional LINC. The integrated-antenna LINC has the potential to achieve a higher levels of circuit-antenna integration, resulting in better reliability and lower cost. By integrating more functions into the antenna, such as power combination, filtering, harmonic tuning, etc., a compact high-efficiency RF front end could be realized. Further work is to reuse the dissipated power at the resistor, and satisfy the varying drain load requirements by adaptive loading of antenna with RF microelectromechanical systems (MEMS). Fig. 10. Measured radiation patterns of a multilayer antenna under even-mode excitation at 2.0 GHz.

rat-race hybrid by using two equal-length cables. The signal receiver is connected to the sum and difference port for the even- and odd-mode excitation, respectively. The measured radiation patterns at the - and -plane during the odd-mode excitation at 1.81 GHz are presented in Fig. 7. Good radiation patterns with cross-polar levels lower than 26 and 28 dB in the - and -plane, respectively, are observed at boresight. The measured radiation patterns at the - and -plane during the even-mode excitation at 1.81 GHz are also presented in Fig. 8. It is observed that the even-mode radiated power at boresight is 33 and 26 dB lower than that of the odd-mode radiated power at the - and -plane, respectively, thus demonstrating the effective suppression of even-mode radiation. 2) Multilayer Antenna: The measured radiation patterns at the - and -plane during the odd-mode excitation at 2.0 GHz are presented in Fig. 9. Good radiation patterns with cross-polar levels lower than 29 and 22 dB in the - and -plane, respectively, are observed at boresight. The measured radiation patterns at the - and -plane during the even-mode excitation

REFERENCES [1] C. P. Liang, J. Jong, W. E. Stark, and J. R. East, “Nonlinear amplifier effects in communications systems,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 8, pp. 1461–1466, Aug. 1999. [2] J. K. Cavers, “Amplifier linearization using a digital predistorter with fast adaption and low memory requirements,” IEEE Trans. Veh. Technol., vol. 39, no. 11, pp. 374–382, Nov. 1990. [3] R. D. Stewart and F. F. Tusubira, “Feedforward linearization of 950 MHz amplifiers,” Proc. Inst. Elect. Eng., pt. H, vol. 135, no. 5, pp. 347–350, Oct. 1988. [4] H. Chireix, “High power outphasing modulation,” Proc. IRE, vol. 23, no. 11, pp. 1370–1392, Nov. 1935. [5] D. C. Cox, “Linear amplification with nonlinear components,” IEEE Trans. Commun., vol. COM-22, no. 12, pp. 1942–1945, Dec. 1974. [6] P. B. Kenington, High-Linearity RF Amplifier Design. Norwood, NJ: Artech House, 2000. [7] X. Zhang, L. E. Larson, P. M. Asbeck, and P. Nanawa, “Gain/phase imbalance-minimization techniques for LINC transmitters,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 12, pp. 2507–2512, Dec. 2001. [8] C. P. Conradi and J. G. McRory, “Predistorted LINC transmitter,” Electron. Lett., vol. 38, no. 7, pp. 301–302, Mar. 2002. [9] W. R. Deal, V. Radisic, Y. Qian, and T. Itoh, “Integrated-antenna push–pull power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 12, pp. 1418–1423, Dec. 1999. [10] S. Gao, P. Gardner, and S. T. Chiw, “Integrated antenna for LINC systems,” Microwave Opt. Technol. Lett., vol. 33, no. 2, pp. 93–95, Apr. 2002.

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[11] S. Gao and P. Gardner, “Novel integrated antenna for LINC power amplifiers,” in Proc. IEEE Int. Antennas and Propagation Symp., vol. 2, USA, Jun. 2002, pp. 508–511. [12] S. Gao and P. Gardner, “Compact, harmonics suppressed integrated antenna for LINC radio transmitters,” in Proc. IEEE Int. Antennas and Propagation Symp., vol. 2, USA, Jun. 2002, pp. 280–283. [13] S. T. Chiw, P. Gardner, and S. Gao, “Compact power combining patch antenna,” Electron. Lett., vol. 38, no. 23, pp. 1413–1414, Nov. 2002. [14] L. Sundstrom, “The effects of quantization in a digital signal component separator for LINC transmitter,” IEEE Trans. Veh. Technol., vol. 45, no. 5, pp. 346–352, May 1996. [15] S. A. Hetzel, A. Bateman, and J. P. McGeehan, “LINC transmitter,” Electron. Lett., vol. 27, no. 10, pp. 844–846, May 1991. [16] B. Stengel and W. R. Eisentadt, “LINC power amplifier combiner method efficiency optimization,” IEEE Trans. Veh. Technol., vol. 49, no. 1, pp. 229–234, Jan. 2000. [17] C. P. Conradi, R. H. Johnson, and J. G. Mcrory, “Evaluation of a lossless combiner in a LINC transmitter,” in Proc. IEEE Can. Electrical Computer Engineering Conf., Alberta, AB, Canada, May 1999, pp. 105–110. [18] A. K. Johnson and R. Myer, “Linear amplifier combiner,” in Proc. 37th IEEE Veh. Technol. Conf., Tampa, FL, Jun. 1987, pp. 421–423. [19] D. M. Pozar, Microwave Engineering. New York: Wiley, 1998.

Steven (Shichang) Gao (M’01) received the Ph.D. degree in microwave engineering from Shanghai University, Shanghai, China, in 1999. He is currently a Senior Lecturer with Northumbria University, Newcastle Upon Tyne, U.K., where he is directing the active antenna research group. Since 1994, he has been involved with radio-propagation modeling with the China Research Institute of Radiowave Propagation, and then, until 1999, was with the Antenna Group, Shanghai University. He was then a Post-Doctoral Research Fellow with the National University of Singapore, Singapore, a Research Fellow with the University of Birmingham, Birmingham, U.K., and a Visiting Scientist with the Swiss Federal Institute of Technology Zürich, Zürich, Switzerland. He is a leader of several Engineering and Physical Sciences Research Council (EPSRC)-funded projects. His research interests mainly include the design of the multifunction planar antennas (multipolarizations, broad-band, multiband, phased arrays), active antennas, high-efficiency RF/microwave PAs (in class-E and class-F modes), numerical methods (finite difference time domain (FDTD), moment method), radio propagation, and communication systems. Dr. Gao has been the recipient of numerous awards including the 2004 Promising Research Fellowship Award presented by the High Education Funding Council of England (HEFCE), London, U.K., the 2002 URSI Young Scientist Award presented by the International Union of Radio Science (URSI), and the 1997 Creation and Invention Award, Shanghai, China.

Peter Gardner (SM’00) received the B.A. degree in physics from the University of Oxford, Oxford, U.K., in 1980, and the M.Sc. and Ph.D. degrees in electronic engineering, from the University of Manchester Institute of Science and Technology (UMIST), Manchester, U.K., in 1990 and 1992, respectively. From 1981 to 1987, he was with Ferranti, Poynton, Cheshire, U.K., as a Senior Engineer involved with microwave amplifier development. From 1987 to 1989, he worked freelance in microwave engineering and software. In 1989, he joined the Department of Electrical Engineering and Electronics, UMIST, as a Research Associate, where he carried out research in microwave negative resistance circuits, low-noise monolithic-microwave integrated-circuit (MMIC) design, and tunable planar resonators. In 1994, he became a Lecturer with the School of Electronic and Electrical Engineering, University of Birmingham, Birmingham, U.K., and became a Senior Lecturer in 2002. His current research interests are in the areas of microwave and millimetric active antennas and beamformers and microwave amplifier linearization techniques.

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An Intelligently Controlled RF Power Amplifier With a Reconfigurable MEMS-Varactor Tuner Dongjiang Qiao, Member, IEEE, Robert Molfino, Steven M. Lardizabal, Member, IEEE, Brandon Pillans, Peter M. Asbeck, Fellow, IEEE, and George Jerinic

Abstract—This paper presents an intelligently controlled RF power amplifier with a reconfigurable output tuner using microelectromechanical system (MEMS) switches and a varactor. By switching on/off the MEMS switches and varying the bias voltage of the varactor, the performance of the amplifier is optimized for input signals with known or unknown frequencies in a range of 8–12 GHz. Fabrication-related unit-to-unit variations of the amplifier are overcome by the reconfigurable tuner. Directed algorithms based on a characterization table and on black-box genetic algorithms are developed for optimization and search. Index Terms—Genetic algorithm, intelligent RF front-ends, power amplifier, reconfigurable tuner, RF microelectromechnical system (MEMS) switches, tunable matching networks.

I. INTRODUCTION

A

DAPTIVE RF front ends provide exciting new opportunities for advancement of microwave systems such as reconfigurable functionality, maximization of performance under varying conditions, elimination of performance variations due to temperature drift and aging, and reduction of the need to tune individual reactive components to meet system specifications [1]–[3]. By changing operating parameters such as center frequency and bandwidth, multifunctional operation can be enabled. Due to characteristics of low insertion loss, broad-band operation, and high isolation, RF microelectromechanical system (MEMS) switches are of great interest for RF applications, particularly in reconfigurable/tunable RF systems, such as antennas, filters, phase shifters, and impedance tuners [3]–[11]. In this paper, a novel power amplifier, with a reconfigurable output tuner using MEMS switches and a semiconductor-based varactor, working over a 4-GHz bandwidth at -band, was demonstrated. The goal of the output tuner is to match a wide variety of loads under conditions of varying center frequency, varying output power, varying output load impedance, varying requirements for linearity, and the performance variations due to temperature drift, aging, and manufacturing tolerances. The output tuner is capable of both Manuscript received April 1, 2004; revised August 23, 2004. This work was supported by the Defense Advanced Research Projects Agency and managed by the Air Force Research Laboratory, Sensors Directorate, Aerospace Components and Subsystem Division, Wright-Patterson AFB. D. Qiao and P. M. Asbeck are with the Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA 92093 USA (e-mail: [email protected]; [email protected]). R. Molfino, S. M. Lardizabal, and G. Jerinic are with the Raytheon Company, Andover, MA 01810 USA (e-mail: [email protected]; [email protected]; [email protected]). B. Pillans is with the Raytheon Corporation, Dallas, TX 75243 USA (e-mail: [email protected]). Digital Object Identifier 10.1109/TMTT.2005.843495

Fig. 1. Block diagram of the intelligent power amplifier.

discrete and continuous tuning to give a large tuning range and a high tuning resolution. Intelligent control algorithms were developed to optimize the performance of the amplifier by varying the output tuner for different input signals. The system can perform functions including searching for an unknown-frequency input; optimizing its output power or power-added efficiency (PAE) or a linear combination of output power and PAE; and reconfiguring its experience tables if malfunctioning parts in the tuner are detected. II. HARDWARE DESIGN Fig. 1 shows the block diagram of the intelligently controlled power amplifier. It comprises a 1.2-mm GaAs pseudomorphic high electron-mobility transistor (pHEMT), an input tuner, 12-bit A/D converters, power sensors, and an output tuner. The GaAs pHEMT is biased under class-AB condition. The input tuner consists of four narrow-band filters to improve the selectivity of the input signals. For comparison, amplifiers with a fixed broad-band input match were also designed. The output tuner consists of four Si MEMS switches, one varactor, and fixed capacitors. A total of 16 MEMS states can be obtained by combining the four MEMS switches. Each MEMS switch can be modeled as a capacitor with “on” or “off” capacitance. The “on” capacitance is approximately 1.5 pF, while the “off” capacitance is approximately 0.035 pF, providing a capacitance of approximately 43. Fig. 2 shows the schematic ratio of the output tuner. During operation, the output impedance can be tuned by switching on/off the MEMS switches. For each MEMS state, the load impedance can be fine tuned by varying

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Fig. 2. Schematic of the two-stub output matching network with four MEMS switches (M1–M4) and one varactor. C1–C8 are fixed capacitors. mlin is a microstrip transmission line.

Fig. 4.

Block diagram of the amplifier in MATLAB/Simulink.

power. It can be seen that, for input power from 5 to 18.5 dBm, the tuner can adjust the load impedance to be very close to the desired value. Similar results were observed for inputs at other frequencies. III. INTELLIGENT CONTROL ALGORITHMS

Fig. 3. Load–pull simulation results of the output matching network. (solid curves) and PAE (dashed curves) load–pull contours of (a) Typical P and the transistor. (b) The required output impedance to obtain maximum P the tuning range of the output tuner at 9.5 GHz. Each curve represents the load impedance of one MEMS state, but scanning the bias voltage of varactor from 10 to 4 V. The dots represent the positions that yield the maximum output power at different input power (5–18.5 dBm).

0

0

the varactor bias voltage. The impedance of the output tuner is designed to cover the range of the required impedance to or PAE) of the amplifier for optimize the performance ( inputs with frequencies in the range of 8–12 GHz and input powers up to 25 dBm. This tuning range was calculated by load–pull simulations of the transistor using Advanced Design System (ADS), Agilent Technology, Palo Alto, CA. Fig. 3(a) shows typical load–pull contours of the transistor. The centers and PAE contours usually change for different input of the powers and frequencies. When the input power is relatively large, even for the same input signal, the center of the contour is different from that of the PAE contour. Fig. 3(b) shows the tuning range of the output tuner at 9.5 GHz compared to the load impedance required to yield the maximum output

The objectives of the control algorithms are to optimize the performance of the amplifier in its various operating modes, while minimizing the number of iterations necessary to converge to the optimal result, maintaining stability of the control loop, and maintaining robust operation even if the amplifier or the tuners change characteristics. The algorithms were developed on the basis of simulations using Mathwork’s MATLAB and Simulink along with ADS. Fig. 4 shows the block diagram of the amplifier in Simulink. The transistor, sensors, tuners, and A/D converters are represented by behavioral models. With fixed gate voltage and drain voltage, the behavioral model of the transistor is represented by equations of the form (1a) (1b) is the output power, PAE is the power-added effiwhere is the load reflection coefficient, ciency, is the input filter, is the signal frequency, and is the input power. The behavioral equations were chosen to reproduce, in analytic form, the is calculated load–pull simulation data obtained from ADS. from the MEMS settings and the varactor bias voltage. The controller receives inputs from the sensors, as well as commands from higher level system controllers, and produces outputs to drive the tuners. The core of the controller is a finitestate machine, which is represented using MATLAB and Mathwork’s Stateflow.

QIAO et al.: INTELLIGENTLY CONTROLLED RF POWER AMPLIFIER WITH RECONFIGURABLE MEMS-VARACTOR TUNER

The amplifier has the functions of: 1) optimizing performance (which can be selected to be the output power, PAE, or a predetermined linear combination of output power and PAE) for an input signal with a known frequency; 2) searching for the best performance for an input signal with an unknown frequency and optimizing the setting; and 3) detecting a nonfunctioning part in the tuner and reconstructing a characterization table for a white-box optimization algorithm. The input signals have a frequency in the range of 8–12 GHz. The optimization of the tuners includes tuning both discrete variables (MEMS switches and input filters) and a continuous variable (the bias voltage of the varactor). Simulation of the tuner shows that the nature of the optimization of the tuner is a multipeak problem: different settings may yield the same output and PAE. impedance and, therefore, the same The search algorithm, referred to as the directed search algorithm in this paper, starts with determining some initial test settings from a characterization table. The characterization table is created by a calibration routine, in which the best settings for some inputs with various power and frequency values, as well as the optimized power and PAE results, are stored. These best settings are obtained by sweeping the MEMS settings and varactor bias voltage. The initial settings for a new input are chosen to be those for inputs with similar input power from the table. After getting the initial settings and comparing the value of the ( , PAE, or a linear combination of objective function and PAE), the fine-tuning routine is performed for the best one or two settings. For fine tuning, only the varactor voltage is changed. ADS simulation shows that, for one combination of the MEMS switches, tuning the varactor voltage in a range of 10 4 V only yields one maximum or PAE. To optimize the varactor voltage, the algorithm first determines a bias with , voltage range of where is the objective function, followed by using quadratic interpolation repeatedly until the algorithm converges. Two algorithms were developed for the optimization. The first one, called the directed optimization algorithm, also starts with testing the output for a few initial MEMS and varactor settings selected from the characterization table for signals with similar input power and frequency. This is followed by comparing the outputs obtained and subsequently selecting the best one or two settings to perform fine tuning. The second optimization algorithm is based on a genetic algorithm. Due to unexpected reasons, such as aging, change of temperature, or damage of components in the tuners, the calibration table may not be suitable to provide a good initial guess. This will typically also cause a failure when using the directed optimization/search algorithms. To overcome this problem, the genetic algorithm was used. For the genetic algorithm, the settings of the tuners are encoded into 11-bit-long binary strings (called chromosomes), in which 2 bits are for the input filters (four tuner states), 4 bits are for the MEMS switches (one bit for each MEMS switch, totally 16 combinations), and 5 bits are for the varactor bias 4 V, the resolution for voltage. For a tuning range of 10 the bias voltage is approximately 0.2 V. The algorithm starts by randomly generating a set of trial chromosomes (called popuassociated lation), followed by measurement of the fitness

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was chosen to be with each individual chromosome. Here, , where is the output power measured is the maximum for the specific tuner settings, and available output power of the transistor. The next generation of test chromosomes is generated based on the current generation and the fitness of each chromosome by a series of operations of reproduction, selection, crossover, and mutation in a fashion well established for genetic algorithms [12], [13]. In this series of operations, the first step is reproduction, in which chromosomes in the current generation are selected using a roulette wheel to form an intermediate population with the same population size as the original population. The weight of the th , where is the chromosome in the roulette wheel is total fitness of the current population. After the reproduction is completed, two chromosomes are randomly selected from the intermediate population. With a predetermined probability, each of these chromosomes is then split into two fragments. The fragments of the two selected chromosomes are swapped and recombined to form two new chromosomes. Each bit of each new chromosome is then mutated with a small probability. The new chromosomes after mutation are two members in the new population. The process of selection, crossover, and mutation is repeated until all the chromosomes for the new population are generated. This is followed by measurement of the fitness of the new population. The process of reproduction, selection, crossover, mutation, and measurement is repeated until the best fitness converges or a preset maximum generation number is reached. Since the genetic algorithms combine elements of directed search and stochastic search algorithms, they are more robust than either of these. They usually give several potential solutions [13], while the directed optimization/search algorithms usually just give one solution. However, the genetic algorithms usually exhibit relatively slow convergence. Since the genetic algorithm needs neither detailed knowledge of the tuner behavior, nor information about the input signal, it can be used for both the optimization for a known-frequency input and search for an unknown-frequency input. Since the genetic algorithm generates new test settings only based on the measured performance of previous settings, it can also be used for tuners with nonfunctioning parts. The detection of nonfunctioning MEMS switches is done by flipping the switches and measuring the performance of the power amplifier for the two states. If statistically flipping a switch does not produce any performance difference, the switch is considered to be nonfunctioning. In this case, the characterization table used by the directed algorithms must be reconstructed. Since a signal generator may not be available for recalibration after the integration of the power amplifier into a microwave system, the recalibration is performed based on previous optimization results obtained by the genetic algorithm for known-frequency signals. The results of optimizations using a genetic algorithm are recorded for various input signals to construct a new characterization table, in which the nonfunctioning MEMS switches are excluded. After the reconstruction of the characterization table, the directed algorithms are once again used to reduce the optimization/search time. To measure the performance of the algorithms, an exhaustive search algorithm was also developed, in which the MEMS

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Fig. 5. Benefits obtainable by having tunable matching networks. The dots represent the optimized output power as a function of frequency. Each curve represents the frequency response of the amplifier when it is optimally configured for one specific frequency. TABLE I SIMULATION RESULTS OF THE DIRECTED OPTIMIZATION AND SEARCH ALGORITHM FOR 1000 TEST SIGNALS WITH P = 15 25 dBm, FREQUENCY = 8–12 GHz. THE PASS RATE IS DEFINED AS THE PERCENTAGE OF THE OUTPUT POWER WITHIN 0.5 dB OF THE MAXIMUM AVAILABLE POWER

Fig. 6. Software simulation results of the search algorithm for: (a) known-frequency and (b) unknown-frequency RF input.

states, filters, and varactor voltage are all swept over their entire ranges in order to determine the optimal settings. IV. SIMULATION RESULTS Fig. 5 compares the optimized output power of the adaptive amplifier with that which would be obtained if the tuners were optimally configured for just one specific frequency. It is clear that the amplifier with reconfigurable tuners has a considerable advantage over the amplifiers with fixed matching networks. For the amplifier with reconfigurable tuners, a relatively constant output power was obtained over a frequency range of 8–12 GHz. For the amplifiers with fixed tuners, however, the output power was flat only over a small range. Table I shows the simulated results of the amplifier for known-frequency and unknown-frequency inputs. To obtain reasonable statistics, 1000 runs were made in each case. For the known-frequency case, the directed optimization algorithm converged with 10.9 average iterations and a 0.07-dB average deviation between converged power and the maximum achievable power. For the unknown-frequency case, 19.2 average iterations and 0.12-dB average deviation were found. Fig. 6 shows histograms, which summarize the deviations between converged and maximum achievable powers for the simulations run. Fig. 7 compares the performance of the directed optimization algorithm, genetic algorithm, and exhaustive search algorithm for 200 input cases. For the genetic algorithm, a fixed population of 20–25 was used for each generation. In total, 12–15 generations were used for the optimization. In this study , we found

Fig. 7. P difference between the genetic algorithm, directed algorithm, and exhaustive search algorithm for 200 input signals with P in the range of 15–25 dBm and frequency in the range of 8–12 GHz.

that these values gave a pass rate higher than 99% without requiring an excessively high number of measurements. Fig. 8(a) compares the performance of the algorithms when one of the MEMS switches is stuck at zero (the off state). For this comparison, the original characterization table was still used for the directed optimization algorithm to obtain the initial settings. This figure shows that the performance of the directed optimization (84% pass rate) was substantially degraded. However, the genetic algorithm consistently yielded performance similar to the exhaustive search algorithm (which indicates the best obtainable performance). Fig. 8(b) shows the results of

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Fig. 9. Fabricated (a) overall amplifier, (b) input matching network and power transistor, and (c) MEMS output matching network.

Fig. 8. P difference between the genetic algorithm, directed algorithm, and exhaustive search algorithm. One of the MEMS switch was set to be stuck at zero. The results of directed optimization algorithm were obtained based on the characterization table: (a) generated with all MEMS switches functioning and (b) reconstructed by the genetic algorithm.

the algorithms for the case that the same MEMS switch was stuck at zero, but the directed optimization algorithm used a reconstructed characterization table. The pass rate of the directed optimization algorithm was significantly improved from 84% to 95%. V. EXPERIMENTAL RESULTS Fig. 9 shows a complete fabricated hybrid power amplifier. The algorithm developed in MATLAB was replicated in Labview to control the amplifier through use of a peripheral component interconnect (PCI) card and general-purpose interface bus (GPIB) interfaces. After initial testing, it was found that the input GaAs input filter bank was not needed to assist in selectivity. As a result, all subsequent testing was performed on amplifiers with a wide-band input match rather than those with the input filter bank. Three total units were tested. In addition, due to the hybrid configuration of the test vehicle, parasitic effects shifted the operation frequency band of the amplifier down 1 GHz to 7–11 GHz. For each unit, the calibration routine was performed to create the initial characterization table. The tests were performed on 100 randomly generated input signals with

Fig. 10. Hardware testing iteration counts for one intelligent power amplifier for: (a) known-frequency and (b) unknown-frequency RF input (100 trial cases).

frequency restricted to between 7–11 GHz and input powers from 10 to 21 dBm. The optimization parameter was output power. Fig. 10 shows a sample iteration histogram for one unit tested. For the tests on all three units, 100% convergence was obtained. It was demonstrated that the algorithms converged with an average of 9.7 iterations for a known-frequency input and 15.0 iterations for unknown-frequency input. The average deviation from the optimum power was 0.05 dB in all the tests. The reconstruction of the characterization table to this point has not been tested, nor has the genetic algorithm. Fig. 11 shows the tunability of the intelligent amplifier. It can be seen that, compared to power amplifiers with fixed matching networks, the intelligent amplifier showed the advantage to obtain a relatively constant output power over a wide frequency range. One of the important benefits of having a tunable amplifier is the ability to overcome unit-to-unit variations resulting from variations in areas such as processing and assembly. To accomplish this test, the exhaustive search algorithm was performed on three units at three different drive powers

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from optimum power was 0.05 dB in all the tests, while the input power varied from 10 to 21 dBm. A genetic algorithm has been developed to reconstruct the calibration table for the amplifier if a nonfunctioning MEMS switch was detected, after which the success rate of the directed algorithm could be greatly improved. ACKNOWLEDGMENT The authors are grateful to E. Martinez, Defense Advanced Research Projects Agency (DARPA) for his support of the effort, and to K. Herrick, G. Burnham, and J. Reddick, all of the Raytheon Corporation, Andover, MA, for their collaboration. Fig. 11. Tunability of the intelligent amplifier. Each curve represents the amplifier frequency response when the optimal settings for a single specific frequency are set (see legend). The dots outline the performance envelope of the tunable amplifier.

REFERENCES [1] G. Boeck, D. Plenkowski, R. Circa, M. Otte, B. Heyne, P. Rykaczewski, R. Wittmann, and R. Kakerow, “RF front-end technology for reconfigurable mobile systems,” in Proc. SBMO/IEEE MTT-S Int. Microwave Optoelectronics Conf., vol. 2, 2003, pp. 863–868. [2] C. Goldsmith, J. Kleber, B. Pillans, D. Forehand, A. Malczewski, and P. Frueh, “RF MEMS: Benefits & challenges of an evolving RF switch technology,” in 23rd Annu. IEEE GaAs IC Symp. Tech. Dig., Piscataway, NJ, 2001, pp. 147–148. [3] E. R. Brown, “RF-MEMS switches for reconfigurable integrated circuits,” IEEE Trans. Microw. Theory Tech., pt. 2, vol. 46, no. 11, pp. 1868–1880, Nov. 1998. [4] W. H. Weedon, W. J. Payne, and G. M. Rebeiz, “MEMS-switched reconfigurable antennas,” in IEEE Antennas and Propagation Society Int. Symp. Dig., vol. 3, Piscataway, NJ, 2001, pp. 654–657. [5] K. J. Vinoy, Y. Hargsoon, J. Taeksoo, and V. K. Varadan, “RF MEMS and reconfigurable antennas for communication systems,” Proc. SPIE–Int. Soc. Opt. Eng., vol. 4981, pp. 164–174, 2003. [6] R. Aigner, J. Ella, H.-J. Timme, L. Elbrecht, W. Nessler, and S. Marksteiner, “Advancement of MEMS into RF-filter applications,” in IEEE Int. Electron Devices Meeting Tech. Dig., Piscataway, NJ, 2002, pp. 897–900. [7] B. Pillaus, S. Eshelman, A. Malczewski, J. Ehmke, and C. Goldsmith, -band RF MEMS phase shifters for phased array applications,” in “ IEEE Radio Frequency Integrated Circuits Symp. Dig., Piscataway, NJ, 2000, pp. 195–199. [8] H.-T. Kim, S. Jung, K. Kang, J.-H. Park, Y.-K. Kim, and Y. Kwon, “Low-loss analog and digital micromachined impedance tuners at the -band,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 12, pp. 2394–2400, Dec. 2001. [9] J. Papapolymerou, K. L. Lange, C. L. Goldsmith, A. Malczewski, and J. Kleber, “Reconfigurable double-stub tuners using MEMS switches for intelligent RF front-ends,” IEEE Trans. Microw. Theory Tech., pt. 2, vol. 51, no. 1, pp. 271–278, Jan. 2003. [10] N. Bushyager, K. Lange, M. Tentzeris, and J. Papapolymerou, “Modeling and optimization of RF reconfigurable tuners with computationally efficient time-domain techniques,” in IEEE MTT-S Int. Microwave Symp. Dig., vol. 2, 2002, pp. 883–886. [11] J. Brank, Z. J. Yao, M. Eberly, A. Malczewski, K. Varian, and C. L. Goldsmith, “RF MEMS-based tunable filters,” Int. J. RF Microwave Computer-Aided Eng., vol. 11, no. 5, pp. 276–284, Sep. 2001. [12] D. E. Goldberg, Genetic Algorithms in Search, Optimization, and Machine Learning. Reading, MA: Addison-Wesley, 1989. Data Structures Evolution [13] Z. Michalewicz, Genetic Algorithms Programs. Berlin, Germany: Springer-Verlag, 1996.

Ka

Fig. 12. Unit-to-unit repeatability of the intelligent amplifier. Three units were tested (differentiated by line type) at three input powers.

( 17, 19.2, and 21 dBm) and nine different frequencies (7–11 GHz in 500-MHz steps) to find the optimal settings for output power. Fig. 12 shows the unit-to-unit repeatability for the three tested units. Nearly identical results were obtained for the three units (as shown by the overlap of the three line types for each power). It is found that the optimal settings at each input power and frequency combination for each unit were not necessarily the same, suggesting that the unit-to-unit variation can be overcome by the reconfigurable tuners. VI. CONCLUSIONS A novel power amplifier with a reconfigurable output tuner using MEMS switches and a varactor has been demonstrated. Intelligent control algorithms were developed to control the tuner. By switching on/off the MEMS switches and varying the bias voltage of the varactor, the performance of the amplifier was optimized over 4-GHz bandwidth at the -band. The unit-to-unit variation was overcome by the reconfigurable tuners. It is demonstrated that the algorithms converged with average 9.7 iterations for known-frequency inputs and 15.0 iterations for unknown-frequency inputs. The average deviation

Ka

+

=

Dongjiang Qiao (M’02) received the Bachelor’s degree in materials science from Tsinghua University, Beijing, China, in 1992, the M.S. degree in electrical engineering from Xi’an Jiaotong University, Xi’an, China, in 1995, and the Ph.D. degree in electrical engineering from the University of California at San Diego, La Jolla, in 2002. He is currently a Post-Graduate Researcher involved with RF power amplifiers at the University of California at San Diego.

QIAO et al.: INTELLIGENTLY CONTROLLED RF POWER AMPLIFIER WITH RECONFIGURABLE MEMS-VARACTOR TUNER

Robert Molfino, photograph and biography not available at time of publication.

Steven M. Lardizabal (S’88–M’95) received the B.S.E.E., M.S.E.E., and Ph.D. degree in the area of field-effect transistor (FET) noise modeling for monolithic-microwave integrated-cirucit (MMIC) design degrees from the University of South Florida (USF), Tampa, in 1988, 1991, and 1997, respectively. In 1991, he was involved with millimeter-wave noise-measurement techniques as part of the Air Force Office of Scientific Research Fellowship Program. Since joining Raytheon RF Components, Raytheon Corporation, Dallas, TX, in 1997, he has been involved in the research and development of Metamorphic high electron-mobility transistor (HEMT) low-noise amplifier design from 1 to 110 GHz. He has contributed to MMIC design and modeling for programs within the Raytheon Corporation related to Microwave/Analog Front-End Technology-Thrust 2 (DARPA), the Advanced Multi-function RF Systems Critical Enabling Technology Program (Office of Naval Research), and the Intelligent RF Front-End Technology Program (DARPA). He is currently the RF Design Leader of the Raytheon lead Intelligent RF Front End Phase-2 Program.

Brandon Pillans, photograph and biography not available at time of publication.

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Peter M. Asbeck (M’75–SM’97–F’00) received the B.S. and Ph.D. degrees from the Massachusetts Institute of Technology (MIT), Cambridge, in 1969 and 1975, respectively. He is currently the Skyworks Chair Professor with the Department of Electrical and Computer Engineering, University of California at San Diego (UCSD), La Jolla. He was with the Sarnoff Research Center, Princeton, NJ, and the Philips Laboratory, Briarcliff Manor, NY, where he was involved in the areas of quantum electronics and GaAlAs/GaAs laser physics and applications. In 1978, he joined the Rockwell International Science Center, where he was involved in the development of high-speed devices and circuits using III–V compounds and heterojunctions. He pioneered the effort to develop HBTs based on GaAlAs/GaAs and InAlAs/InGaAs materials and has contributed widely in the areas of physics, fabrication, and applications of these devices. In 1991, he joined UCSD. He has authored or coauthored over 250 publications. His research interests are in development of high-speed HBTs and their circuit applications. Dr. Asbeck is a Distinguished Lecturer for the IEEE Electron Devices Society and the IEEE Microwave Theory and Techniques Society (IEEE MTT-S). He was the recipient of the 2003 IEEE David Sarnoff Award for his work on HBTs.

George Jerinic, photograph and biography not available at time of publication.

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Linearity of

X -Band Class-E Power Amplifiers in EER Operation

Narisi Wang, Student Member, IEEE, Xinli Peng, Student Member, IEEE, Vahid Yousefzadeh, Student Member, IEEE, Dragan Maksimovic´, Member, IEEE, Srdjan Pajic´, Student Member, IEEE, and Zoya Popovic´, Fellow, IEEE

Abstract—Multifunctional RF front ends need to transmit different types of signals while maintaining efficiency and signal quality. This paper addresses efficient transmitter power amplifiers (PAs) for signals with varying peak-to-average ratios, requiring simultaneous efficiency and linearity. Linearity characterization of class-E high-efficiency PAs operating in envelope elimination and restoration (EER) mode is discussed. Specifically, a 67%-efficient 10-GHz MESFET PA is characterized in terms of its AM–AM, AM–PM conversion and intermodulation products. Measurements of intermodulation distortion are compared with harmonic-balance simulations using TriQuint’s Own Model provided by the device manufacturer. It is shown experimentally and through simulations that the amplifier in the EER mode has improved linearity while maintaining high-efficiency operation. Index Terms—Class-E, efficiency, envelope elimination and restoration (EER), linearity, power amplifier (PA).

I. INTRODUCTION

H

IGH-EFFICIENCY class-E power amplifiers (PAs) can accomplish ultrahigh efficiencies by driving the transistor as a switch [1], [2]. For an ideal class-E PA, the efficiency is 100% [1], [3]–[5] and, in practice, it is limited by the on resistance of the active device and the maximum current and voltage handling capabilities. Since the transistor is driven into deep saturation, these amplifiers exhibit high nonlinearities and are not useful for some types of signal modulations [6]. For multifunctional systems where power is the prime resource, a high-efficiency transmitter with linearity that adapts to the input signal type has the potential of significant power savings over time. This paper presents systematic nonlinearity characterization of -band class-E PAs with the goal of using adaptive fast and slow bias control for improving linearity. PAs with dynamic bias for efficiency improvement have been presented in [7]–[9]. Efficiency improvements of a 950-MHz MESFET PA with a boost dc–dc converter modulator [7] and a 835-MHz PA with a class-S modulator [8] have been demonstrated. In [9], a detector at the output of a 67%-efficient 20.3-dBm class-E PA provides a feedback signal to the

Manuscript received April 22, 2004; revised November 2, 2004. This work was supported by the Defense Advanced Research Projects Agency under the Intelligent RF Front Ends Program, under Grant N00014-02-1-0501, and by Wyle Laboratories, Wright-Patterson Air Force Base under Grant PO 19035.0D.31369S. N. Wang, V. Yousefzadeh, D. Maksimovic´, S. Pajic´, and Z. Popovic´ are with the Department of Electrical and Computer Engineering, University of Colorado at Boulder, Boulder, CO 80302 USA. X. Peng is with Maxim Integrated Products, Chandler, AZ 85003 USA. Digital Object Identifier 10.1109/TMTT.2005.843500

Fig. 1. Block diagram of the EER system with FPGA bias control. The RF PA is a class-E 10-GHz MESFET amplifier. The envelope signal is split into a dc component, which controls the dc–dc synchronous Buck converter and an ac component, which provides envelope ac variations. The phase of the signal provides control of the phase of the carrier input to the PA through an -band digitally controlled phase shifter.

X

drain bias controller implemented with a 96% efficient Buck dc–dc converter. Compared with a PA with constant drain bias (4 V), the average efficiency for a uniform power probability distribution is improved by a factor of 1.4 over an output power between 15–20 dBm. The efficiency improves from 22% to 65% at the lower power levels. Dynamic biasing can be used not only for efficiency improvement, but also for linearization of highly saturated efficient PAs, such as in the envelope elimination and restoration (EER) technique, in which the amplitude and phase information of the input signal are separated [10]. The drive contains only phase information with a constant amplitude, while the amplitude information is provided through the bias, thus restoring the envelope information at the output. In this paper, the linearity study of a 10-GHz class-E PA in EER operation is presented as follows. • Section II presents background on EER and discusses the implementation of the EER transmitter, as shown in Fig. 1. The individual components are discussed in detail: the class-E 10-GHz PA; fast dynamic bias control circuitry; and the digital control signal generation using a field-programmable gate array (FPGA).

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-BAND CLASS-E PAs IN EER OPERATION

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• Section III discusses linearity (AM–AM and AM–PM) of an -band class-E PA with a continuous wave (CW) single-frequency input signal. • Section IV presents two-tone test results for the narrowband -band PA with and without bias control. • Section V is a discussion of linearity over a range of frequencies within -band.

II. HIGH-EFFICIENCY

-BAND EER TRANSMITTER

A number of authors have demonstrated EER transmitters at lower frequencies, e.g., an EER transmitter for HF/VHF is demonstrated in [11] where a class-D PA at 3.5 MHz with a class-S modulator is used. The system efficiency is approximately 60% and a two-tone third-order intermodulation distortion (IMD3) of better than 40 dBc is achieved with the envelope detector as a major source of nonlinearity. In [12], the effect of envelope modulator bandwidth and time delay between the envelope and phase signal on the linearity is studied theoretically. An attempt to limit the feedthrough, another cause of nonlinearity, by modulating the input signal drive, is shown in [13], while [14] theoretically analyzes the effect of load network and RF choke on the linearity. Limited work has been done in EER at microwave frequencies. For example, in [6], the efficiency and linearity behavior of a 8.4-GHz class-F PA is studied for both general linear mode (with constant biasing) and EER mode for different manually controlled drain bias schemes. An IMD3 ratio of 27 dBc with a time-average efficiency for a multi-carrier signal with 10-dB peak-to-average ratio of 44% is obtained for a modified EER mode. This is a factor of 4.4 improvement over a 10% efficient backed-off class-A PA with the same IMD3 ratio using the same device. In this paper, we demonstrate a full implementation of an -band transmitter (Fig. 1). Efficient wide-band envelope tracking, which is required in the EER scheme, is achieved through a combination of a switched-mode power converter and a linear class-AB amplifier (OPA357A). Similar combined switching/linear amplifiers have been reported for audio applications [15] and for EER transmitters [16], [17]. The digital PA system controller is constructed using a Xilinx Virtex-II V2MB1000 FPGA. The system controller allows the flexibility of generating arbitrary lookup-table-based periodic envelope and phase waveforms for testing the PA. In this test setup, we have not considered generation of arbitrary complex modulation signals. The dc portion of the envelope signal is provided through an efficient synchronous Buck dc–dc switching converter. The remainder of this section provides details of the components of Fig. 1. A. Class-E PA The class-E PA is similar to the design presented in [2] and [9]. The active device is a general-purpose GaAs MESFET AFM04P2-000 from Alpha Industries Inc., Woburn, MA. For the transistor with known output capacitance , determined initially from small-signal -parameters, the optimal

Fig. 2. 

Layout of the class-E amplifier. The substrate is Rogers TMM6 with

= 6 and a thickness of 0.635 mm. The active device is a GaAs MESFET

AFM04P2-000 from Alpha Industries Inc. All units are given in millimeters.

class-E load impedance for 50% duty cycle can be calculated as [1], [18] (1) The output capacitance of the MESFET AFM04P2-000 is depF. Using (1), the optimal class-E termined to be . load impedance at 10 GHz is Ideal class-E operation requires high-impedance termination of all higher harmonics. However, it is empirically determined that termination of only the second harmonic gives a reasonable approximation of the ideal class-E mode [2]. On the input side, matching for maximal power transfer is performed, using given -parameters of the active device. The active device has a maximum drain-to-source voltage of 6 V and the maximum drain current of 140 mA. It is capable of delivering 21 dBm of output power with gain of 9 dB while operating in 1-dB compression at 18 GHz. The layout of the class-E amplifier is shown in Fig. 2. Output matching is provided using a single open shunt stub, and the second harmonic termination is performed using another open shunt stub, with electrical length of 90 at the second harmonic frequency (20 GHz). DC gate and drain bias voltages are provided through high-impedance quarter-wavelength bias lines, and dc decoupled from the source and load using 8.2-pF millimeter-wave capacitors. Due to numerous nonidealities such as: 1) finite ON resistance; 2) finite switching speed; 3) drain–voltage dependent output capacitance; 4) device parasitics (pad inductances and capacitances, bond-wire inductances, etc.); and 5) mounting parasitics, the analytically calculated class-E load impedance does not give optimal performance. However, (1) is an excellent starting point for either a nonlinear computer-aided design (CAD) design or a load–pull-based design. For an input power of 13 dBm, a summary of PA characteristics is as follows. dB at dBm. • Saturated gain • Drain efficiency at dBm. at • Power-added efficiency dBm.

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The class-E switched mode amplifier naturally lends itself to EER. This can be seen by considering the output circuit of an ideal class-E amplifier, which consists of an ideal switch in parallel with the output capacitance of the active device connected to the load through a matching network. From the derivation in [18], the open switch voltage can be written as (2) where and . The switch voltage is zero is the dc drain supply current during the other half cycle. and is the operating (switching) angular frequency. If the dc supply is provided through an ideal RF choke, the average value of the switch voltage is equal to the supply voltage

(3)

In an ideal class-E mode, the harmonics are perfectly terminated, thus, the power delivered to the output matching network is (4) , in a class-E amplifier, the Since output voltage across the load is linearly proportional to the drain bias voltage. This, in turn, means that control of the drain bias according to the envelope of the input signal accomplishes envelope amplification. B. High-Efficiency DC–DC Converter and Fast Bias Control and in the dc–dc converter are The power switches and controlled by the complementary gate-drive signals generated by the FPGA controller [19]. The duty cycle of adjusts the dc value of the envelope signal. The ac portion of the envelope signal is generated by the FPGA through the THS5661 12-bit 100 megasamples/s (MSPS) DAC. The ac portion is then buffered and amplified by a wide-band class-AB amplifier, constructed around the OPA357 op-amp. The dc and ac and capacitor to signals are coupled through the inductor for the class-E PA. The phase obtain the supply voltage of the RF input signal for the PA is controlled by a TriQuint TGP6336-EEU 5-bit -band digitally controlled phase shifter. The phase shifter has around 9-dB loss, requiring a pre-amplifier at the input (not shown for clarity). The digital phase command is also generated by the FPGA controller. C. Digital Signal Generation and Control The digital system controller for the dc–dc converter is described in detail in [19]. Fig. 3 shows the block diagram of the part of the digital controller responsible for generation of the digital ac envelope command , and the digital phase com. For the standard two-tone test signal, the envelope mand command is a rectified sinusoidal signal. The ac portion of the rectified sinusoidal signal is implemented in a lookup table on

Fig. 3. Digital controller block diagram of the ac envelope command e and phase command e .

the FPGA. There are 50 samples per period of the equivalent sinusoidal waveform (or 25 samples per period of the rectified sinusoid). Since the rectified sine wave has significant harmonic components, the relatively high oversampling rate (25 times the period) is necessary in the PA test setup. Each sample is 12-bit long. A counter selects the samples of the rectified sinusoid from the lookup table at a frequency of 25 MHz. The sample values are registered in a 12-bit register, which is the digital command for the 12-bit DAC. A 25-MHz clock is generated for the DAC, which reads the 12-bit registered value of the sampled signal. In this implementation, the frequency of the rectified siMHz samples MHz. The nusoid is 25-MHz sample frequency is generated from the 100-MHz internal clock of the FPGA. The maximum FPGA clock frequency of 100 MHz, and the need for a relatively high sampling rate limit the maximum frequency of the generated envelope signal to 1 MHz. By increasing the number of samples per period in the lookup table or by modifying the frequency divider, lower frequencies of the envelope signal can be easily achieved. The second lookup table shown in Fig. 3 provides the 5-bit for the phase shifter. Corresponding to the phase command 50 samples per period of the equivalent sinusoidal waveform amplitude, there are 50 samples recorded in the phase lookup table. The same counter that selects the sample value of the rectified sinusoid is used to provide the phase data samples. As a result, the phase and the ac envelope signals are synchronized. By shifting the phase or envelope data up or down in the lookup table, the delay between the envelope and phase command signals can be controlled in order to compensate for the delay in the envelope and phase signal paths. Given the 25-MHz sample-clock frequency, the resolution for the delay compensation is 40 ns. Measured envelope and phase signals generated using the scheme in Fig. 3, for the two-tone test to be described later, are shown in Fig. 4.

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Fig. 4. Generated drain bias and phase of the input RF signal for two-tone test of the PA in EER mode. t is the time delay between the two signal.

1

Fig. 5. Measured AM–AM and AM–PM characteristics of the class-E PA with the amplitude modulation through the drain bias. The solid line is the result for a low (1.1 dBm) input signal, while the dashed line corresponds to a high input power level of 14.2 dBm when the output power is the maximum 20.6 dBm.

III. NARROW-BAND LINEARITY CHARACTERIZATION OF THE PA The linearity of the class-E PA is characterized by considering the drain bias as the input signal amplitude. In this context, the AM–AM conversion is measured as the increase in output voltage (output power into a 50- load) when the drain bias is increased linearly. When the drain bias is 5 V, the small-signal gain of the PA in general linear mode is approximately 9 dB at an input power of 1.1 dBm, and saturates at 6.5 dB for the high input power of 14.2 dBm. For high input power, the PA output voltage varies linearly with drain bias, as shown in Fig. 5. Class-E PAs are designed to operate with high input power, and when the input power is reduced, the PA AM–AM characteristics are no longer linear, as shown in solid line in Fig. 5. This is consistent with the approach shown in Fig. 1 where the level of the input signal to the PA is kept at a constant high level. Another feature in Fig. 5 is existence of an output voltage with zero drain bias, referred to as feedthrough, which introduces distortion in signals that have envelope zero crossings. For AM–PM conversion, the relative phase between input and output signals of the PA is measured for a linearly increasing drain bias, and the results are given for a high- and low-input

Fig. 6. Measured and simulated two-tone test of the class-E PA. (a) Fundamental and intermodulation product power levels as a function of input power. (b) IMD3 and IMD5 as a function of input power. The “upper and lower side” labels refer to the sidebands produced by the two-tone test.

power level. The class-E PA shows considerable AM–PM conversion for low levels of drain bias, again introducing distortion for signals with envelope zero-crossings. IV. TWO-TONE CHARACTERIZATION OF PA IN GENERAL LINEAR MODE Another important measure of linearity, intermodulation distortion, is usually measured using a two-tone test [20]. We present two types of two-tone measurements for frequency spacing of 1 MHz: standard measurement for the PA at a constant drain bias of 4.2 V with two-tone test signals at 9.9995 and 10.0005 GHz, and a two-tone test for the PA in EER mode. The measurements are compared to nonlinear harmonic-balance Agilent ADS simulations with TriQuint’s Own Model (TOM) nonlinear model [21] for the MESFET (provided by the manufacturer). Fig. 6 shows the level of intermodulation product versus input power at a drain bias of 4.2 V. As expected, the class-E PA has poor linearity: at an input power of 14 dBm, the IMD3 is around 10 dBc, while the fifth-order intermodulation product (IMD5) is approximately 25 dBc. This figure also shows an asymmetry in the upper and lower intermodulation sideband, commonly observed in RF PAs and attributed to memory effects [20].

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Fig. 7. Measured intermodulation product level as a function of drain bias for a phase-modulated input signal. The output voltage is calculated from the measured power across a 50- load. Input power level is 13 dBm.



A. Two-Tone Dynamically Biased PA Characterization In a two-tone test

, the input signal can be written

as (5) which becomes

(6) is the center carrier frequency, is the amplitude where which varies at a frequency of , and alternates from 0 to at half the frequency. Referring to the measurement and are controlled by the envelope setup in Fig. 1, and the phase command signal . command signal becomes the drain bias voltage , which is shown in Fig. 4 along with the phase of the input RF signal. When the relative time delay between those two signals changes between and , the alignment of the waveforms in the time domain changes from synchronous to asynchronous. We refer to these conditions as “in-phase” and “out-of-phase,” GHz respectively. In the experiments presented here, MHz. and Fig. 7 shows the measured bias dependence of the fundamental frequency output voltage, as well as the voltage of the third and fifth intermodulation products for a phase-modulated . All three signal, which can be expressed as voltages are approximately linearly dependent on the drain bias. This indicates that the EER mode of operation can linearize the PA. Fig. 8 shows the measured power of the fundamental and the third and fifth intermodulation products as a function of input (in-phase) and power to the PA for (out-of-phase), respectively. The two sets of curves (solid and dashed lines) correspond to the upper and lower sidebands. As expected, the in-phase case shows a slower increase in intermodulation product power as the input power increases. The IMD3 (in-phase) and and IMD5 for

Fig. 8. Measured power of the fundamental and the third and fifth intermodulation products as a function of input power to the PA. (a) t (in-phase). (b) t f (out-of-phase). The three sets of curves = f correspond to the upper and lower sidebands and simulation results.

1 = 1 [2( 0 )]

1 =0

(out-of-phase) are presented in Fig. 9(a) and (b), respectively, and summarized as follows. • For the in-phase case, the measured IMD3 and IMD5 are 20 and 25 dBc (around input power level of 13 dBm), respectively, where ideally no intermodulation products should be present. • For the out-of-phase case the measured IMD3 and IMD5 are 3 dBc and 11 dBc (around input power level of 13 dBm), respectively. The calculated theoretical results (ideal class-E) are IMD3 of 0 dBc and IMD5 of 9.5 dBc. The reason for the difference is attributed to nonlinearity caused by AM–PM and feedthrough when the drain bias is zero. • Harmonic-balance simulations of the IMD levels agree well with the measurements. • For the in-phase case, with input power increase, the IMD level decreases due to the dynamic biasing. This can also be understood by observing the results in Fig. 5.

V. FREQUENCY RESPONSE OF PA IN EER MODE The results discussed are for single-frequency or narrow-band operation. It is of interest to examine the behavior of the class-E

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-BAND CLASS-E PAs IN EER OPERATION

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(

2 )

Fig. 11. Frequency dependence of the quantity P = V = Z , which represent the ratio of the RF output power to the bias voltage across a 50load.



of 10% (e.g., [2]) and is limited by the output matching network that provides harmonic termination and the optimal fundamental load for high-efficiency operation. Fig. 11 shows the fre, which repquency dependence of the quantity resents the ratio of the RF output power to the bias voltage across a 50- load. In this way, a 1-dB bandwidth for EER mode can be defined and is measured to be around 24% (8.1–10.5 GHz). VI. CONCLUSION

1 =0

1 = 1 [2( 0

Fig. 9. IMD3 and IMD5 for: (a) t (in-phase) and (b) t = f f (out-of-phase). The three sets of curves correspond to the upper and lower sidebands and simulation results.

)]

In summary, this paper has presented linearity characterization of highly saturated high-efficiency class-E -band PAs. It has been shown both experimentally and in simulations that the EER mode with dynamic biasing of the PA can improve linearity significantly. Harmonic-balance simulations have been shown to be useful for design that includes linearity considerations. The results in this paper have demonstrated the possibility of more generally adaptive PAs. Any input signal can be presented in baseband in polar instead of I/Q form, allowing nonlinear PAs to be used when linearity is a requirement. In addition, the FPGA in Fig. 1 can be used for basedband predistortion. The dynamic biasing circuit bandwidth needs to exceed the signal bandwidth, and digitally controlled high-speed power management circuits are a topic of continued research. ACKNOWLEDGMENT The authors thank Dr. D. Purdy, Office of Naval Research (ONR), Washington, DC, and Dr. P. Watson, Wright-Patterson Air Force Base (WPAFB), Dayton, OH, for helpful comments.



Fig. 10. Measured output voltage (50- load) as a function of drain bias (AM–AM) for different frequencies around the 10-GHz design frequency. Input power level is 13 dBm.

EER mode over a range of frequencies around the class-E design frequency. The AM–AM of the class-E PA in EER mode, i.e., output voltage versus the drain bias, is measured from 8 to 12 GHz. Fig. 10 shows the output voltage versus drain bias for five different frequencies. When the frequency deviates from 10 GHz, the PA class of operation changes, resulting in degraded linearity. Typical class-E mode bandwidth is on the order

REFERENCES [1] T. B. Mader and Z. B. Popovic´ , “The transmission-line high-efficiency class-E amplifier,” IEEE Microw. Guided Wave Lett., vol. 5, no. 9, pp. 290–292, Sep. 1995. [2] S. Pajic´ and Z. Popovic´ , “An efficient X -band 16-element spatial combiner of switched-mode power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 7, pp. 1863–1870, Jul. 2003. [3] A. D. Artym, “Switching mode of high frequency power amplifiers,” Radiotekhnika Mosk., vol. 24, Jun. 1969. [4] N. O. Sokal and A. D. Sokal, “Class-E—A new class of high efficiency tuned single-ended switching power amplifiers,” IEEE J. Solid-State Circuits, vol. SSC-10, no. 6, pp. 168–176, Jun. 1975. [5] F. H. Raab, “Idealized operation of the class-E tuned power amplifier,” IEEE Trans. Circuits Syst., vol. CAS-24, no. 12, pp. 725–735, Dec. 1977.

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[6] M. Weiss, F. Raab, and Z. Popovic´ , “Linearity of -band class-F power amplifiers in high-efficiency transmitters,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 6, pp. 1174–1179, Jun. 2001. [7] G. Hanington, P. Chen, P. Asbeck, and L. Larson, “High-efficiency power amplifier using dynamic power-supply voltage for CDMA applications,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 8, pp. 1471–1476, Aug. 1999. [8] J. Staudinger, B. Gilsdorf, D. Newman, G. Norris, G. Sadowniczak, R. Sherman, and T. Quach, “High efficiency CDMA RF power amplifier using dynamic envelope tracking technique,” in IEEE MTT-S Int. Microwave Symp. Dig., 2000, pp. 873–876. [9] N. Wang, V. Youzefzadeh, D. Maksimovic´ , S. Pajic´ , and Z. Popovic´ , “60% efficient 10-GHz power amplifier with dynamic drain bias control,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 3, pp. 1077–1081, Mar. 2004. [10] L. Kahn, “Single sideband transmission by envelope elimination and restoration,” Proc. IRE, vol. 40, no. 7, pp. 803–806, Jul. 1952. [11] F. H. Raab and D. J. Rupp, “High-efficiency single-sideband HF/VHF transmitter based upon envelope elimination and restoration,” in Proc. 6th Int. HF Radio Systems Techniques Conf., Jul. 1994, pp. 21–25. [12] F. H. Raab, “Intermodulation distortion in Kahn-technique transmitters,” IEEE Trans. Microw. Theory Tech., vol. 44, no. 12, pp. 2273–2278, Dec. 1996. [13] , “Drive modulation in Kahn-technique transmitters,” in IEEE MTT-S Int. Microwave Symp. Dig., 1999, pp. 811–814. [14] M. Kazimierczuk, “Collector amplitude modulation of the class E tuned power amplifier,” IEEE Trans. Circuits Syst., vol. CAS-31, no. 6, pp. 543–549, Jun. 1984. [15] R. van der Zee and E. van Tuijl, “A power-efficient audio amplifier combining switching and linear techniques,” IEEE J. Solid-State Circuits, vol. 34, no. 7, pp. 985–991, Jul. 1999. [16] P. Midya, “Linear switcher combination with novel feedback,” in IEEE Power Electronics Specialists Conf., vol. 3, Jun. 2000, pp. 1425–1429. [17] F. H. Raab, P. Azbeck, S. Cripps, P. B. Kenington, Z. B. Popovic´ , N. Pothecary, J. F. Sevic, and N. O. Sokal, “Power amplifiers and transmitters for RF and microwave,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 3, pp. 814–826, Mar. 2002. [18] T. B. Mader, E. W. Bryerton, M. Markovic´ , M. Forman, and Z. Popovic´ , “Switched-mode high-efficiency microwave power amplifiers in a freespace power-combiner array,” IEEE Trans. Microw. Theory Tech., pt. 1, vol. 46, no. 10, pp. 1391–1389, Oct. 1998. [19] V. Yousefzadeh, N. Wang, D. Maksimovic´ , and Z. Popovic´ , “Digitally controlled DC–DC converter for RF power amplifier,” in IEEE Applied Power Electronics Conf. Exp., vol. 1, 2004, pp. 81–87. [20] S. C. Cripps, Advanced Techniques in RF Power Amplifier Design. Norwood, MA: Artech House, 2002, pp. 73–110. [21] A. McCamant, G. McCormack, and D. Smith, “An improved GaAs MESFET model for SPICE,” IEEE Trans. Microw. Theory Tech., vol. 38, no. 6, pp. 822–824, Jun. 1990.

Narisi Wang (S’00) received the B.S. degree in electrical engineering from the Beijing University of Posts and Telecoms, Beijing, China, in 1999, the M.S. degree in electrical engineering from Colorado State University, Fort Collins, in 2001, and is currently working toward the Ph.D. degree at the University of Colorado at Boulder. Her master’s research concerned mathematical modeling of coaxial probe crack detection. Her doctoral research concerns microwave PAs.

Xinli Peng (S’01) received the M.S. degree in electrical engineering from the University of Colorado at Boulder, in 2002. He is currently an Integrated Circuit (IC) Design Engineer with Maxim Integrated Products, Chandler, AZ, where he is involved with power management IC design for portable equipment. His previous research has included high-power RF semiconductor devices, power electronics, and analog IC design.

Vahid Yousefzadeh (S’03) received the B.S. degree in electrical engineering from the Amirkabir University of Technology, Tehran, Iran, in 1994, and is currently working toward the Ph.D. degree at the University of Colorado at Boulder. From 1994 to 2002, he was an Electrical Engineer for the Namvaran Engineering Company and the Bina_Afzar Research Company. His current research concerns power management for RF PAs.

Dragan Maksimovic´ (M’89) received the B.S. and M.S. degrees in electrical engineering from the University of Belgrade, Belgrade, Yugoslavia, in 1984 and 1986, respectively, and the Ph.D. degree from the California Institute of Technology, Pasadena, in 1989. From 1989 to 1992, he was with the University of Belgrade. Since 1992 he has been with the Department of Electrical and Computer Engineering, University of Colorado at Boulder, where he is currently an Associate Professor and Co-Director of the Colorado Power Electronics Center (CoPEC). His current research interests include power electronics for low-power portable systems, digital control techniques, and mixed-signal IC design for power-management applications. Dr. Maksimovic´ was the recipient of the 1997 National Science Foundation (NSF) CAREER Award, and a Power Electronics Society Transactions Prize Paper Award.

Srdjan Pajic´ (S’02) received the Dipl. Ing. degree from the University of Belgrade, Belgrade, Yugoslavia, in 1995, the M.S. degree from the University of Colorado at Boulder, in 2002, and is currently working toward the Ph.D. degree in electrical engineering at the University of Colorado at Boulder. From 1995 to 2000, he was a Research and Design Engineer with IMTEL Microwaves, Belgrade, Yugoslavia, where he was involved with the development of PAs for radio and television broadcast systems. In 2002 he received a M.S. at the University of Colorado at Boulder. His research interests include high-efficiency microwave PAs for active antennas, linear PAs for wireless communications, and quasi-optic power-combining techniques.

Zoya Popovic´ (S’86–M’90–SM’99–F’02) received the Dipl. Ing. degree from the University of Belgrade, Yugoslavia, in 1985, and the Ph.D. degree from the California Institute of Technology, Pasadena, in 1990. Since 1990, she has been with the University of Colorado at Boulder, where she is currently a Full Professor. She has developed five undergraduate and graduate electromagnetics and microwave laboratory courses and coauthored (with her father) the textbook Introductory Electromagnetics (Upper Saddle River, NJ: Prentice-Hall, 2000) for a junior-level core course for electrical and computer engineering students. Her research interests include microwave and millimeter-wave quasi-optical techniques, high-efficiency microwave circuits, smart and multibeam antenna arrays, intelligent RF front ends, RF optical techniques, batteryless sensors, and broad-band antenna arrays for radio astronomy. Dr. Popovic´ was the recipient of the 1993 Microwave Prize presented by the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) for the best journal paper. She was the recipient of the 1996 URSI Isaac Koga Gold Medal. In 1997, Eta Kappa Nu students chose her as a Professor of the Year. She was the recipient of a 2000 Humboldt Research Award for Senior U.S. Scientists from the German Alexander von Humboldt Stiftung. She was also the recipient of the 2001 Hewlett-Packard (HP)/American Society for Engineering Education (ASEE) Terman Award for combined teaching and research excellence.

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A Differential 4-bit 6.5–10-GHz RF MEMS Tunable Filter Kamran Entesari, Student Member, IEEE, and Gabriel M. Rebeiz, Fellow, IEEE

Abstract—This paper presents a state-of-the-art RF microelectromechanical systems wide-band miniature tunable filter designed for 6.5–10-GHz frequency range. The differential filter, fabricated on a glass substrate using digital capacitor banks and microstrip lines, results in a tuning range of 44% with very fine resolution, and return loss better than 16 dB for the whole tuning range. The relative bandwidth of the filter is 5.1 0.4% over the tuning range and the size of the filter is 5 mm 4 mm. The insertion loss is 4.1 and 5.6 dB at 9.8 and 6.5 GHz, respectively, for a 1-k sq fabricated bias line. The simulations show that, for a bias line with 10- k sq resistance or more, the insertion loss improves to 3 dB at 9.8 GHz and 4 dB at 6.5 GHz. The measured 45 dBm for kHz, and the filter can 3 level is handle 250 mW of RF power for hot and cold switching.



IIP



1

500

Index Terms—Differential filter, digital capacitor bank, microelectromechanical systems (MEMS), RF MEMS, wide-band tunable filter.

I. INTRODUCTION IDE-BAND tunable filters are extensively used for multiband communication systems and wide-band tracking receivers. The most practical implementation is based on yttrium–iron–garnet (YIG) resonators. They have multioctave bandwidths and are high quality-factor resonators [1], [2]. However, they are bulky and cannot be easily miniaturized for wireless communications. They also consume considerable amount of dc power (0.75–3 W), and their linearity is not high – dBm .1 An alternative to YIG filters is based on miniaturized planar filters with solid-state or microelectromechanical systems (MEMS) devices. Solid-state varactors can provide a wide tuning range, but they have loss and linearity problems at microwave frequencies [3]–[5]. MEMS switches and varactors have very low loss, they do not consume any dc dBm [6], [7]. power, and their linearity is excellent There are two different types of frequency-tuning methods for MEMS-based filters, analog and digital. Analog tuning provides continuous frequency variation of the passband, but the tuning range is limited. For example, the tuning range in [8]–[10] is

W

Manuscript received April 12, 2004; revised September 9, 2004. This work was supported by the National Science Foundation under Contract ECS-9979428. K. Entesari is with the Radiation laboratory, Department of Electrical Engineering and Computer Science, The University of Michigan at Ann Arbor, Ann Arbor, MI 48109-2122 USA (e-mail: [email protected]). G. M. Rebeiz was with the Radiation Laboratory, The University of Michigan at Ann Arbor, Ann Arbor, MI 48109-2122 USA. He is now with the Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA 92093-0407 USA (e-mail: [email protected]). Digital Object Identifier 10.1109/TMTT.2005.843501 1YIG

Fig. 1. Lumped model for a two-pole differential tunable filter.

4.2%, 10%, and 14%, respectively. In digital MEMS filters, discrete center frequencies and wide tuning ranges are possible. Young et al. [16], and Brank et al. [17] presented excellent tunable filters with high-frequency resolution at 0.8–2 GHz. However, existing digital MEMS filters at microwave frequencies GHz do not have enough resolution to result in near continuous coverage of the frequency band. The MEMS filter in [11] shows four states (2-bit filter) and a 44% tuning range with poor frequency resolution. The filter in [12] has two states (1-bit filter) and can switch from 15 to 30 GHz. Other designs have two states and lower tuning range: 28.5% in [13] and 12.8% in [14]. In this paper, we will present a 4-bit digital differential tunable filter with 44% tuning range from 6.5 to 10 GHz. The frequency band is covered by 16 filter responses with very fine frequency resolution. Practically, this filter behaves like a continuous-type tunable filter. To achieve such a high tuning resolution, capacitive MEMS switches are connected in series with high- metal–air–metal (MAM) capacitors to make a capacitor bank. As a result, the capacitor variation can be controlled accurately by choosing the correct values for MAM capacitors. The MEMS capacitor bank is inserted in a lumped differential filter to result in a miniature 6.5–10-GHz tunable filter. A nonlinear study of the differential tunable filter is presented in Section IV. II. DESIGN A. Design Equations Fig. 1 presents a two-pole filter suitable for a differential implementation. This filter is a practical realization of a standard Chebyshev bandpass filter with parallel resonators and -inverters [see Fig. 2(a)]. The element values for the normalized bandpass filter are calculated from (1) (2) (3)

tuned filters, Micro Lambda Inc., Fremont, CA. 0018-9480/$20.00 © 2005 IEEE

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Fig. 3. J -inverter implementation using a practical transformer. Fig. 2. (a) Standard Chebyshev bandpass filter. (b) Admittance scaling. (c) Practical transformer realization using capacitive dividers.

where is the bandpass filter center frequency, is the and are the parallel capacfractional bandwidth, and itor and the admittance inverter for the normalized low-pass prototype filter [15]. The shunt inductance is inversely proportional to and for narrow bandwidths; it can be too small to be physically realizable. Therefore, the entire admittance of the factor, filter (including source and load) can be scaled by a where is an arbitrary scaling factor to result in realizable element values, and an impedance transformer must be inserted between the filter and its terminations [see Fig. 2(b)]. To realize this ideal transformer at high frequencies, a narrow-band and capacimpedance transformer is implemented using itors [see Fig. 2(c)]. The values of and can be found using the two conditions at the source and load

and can be calculated based on the self-inductance of and the transformer coupling factor the transformer (7) (8) (9) Using (1)–(9), the values of , , , and can be calfor a specific freculated based on , , , , , and quency. The closed-form equations for the lumped elements of the differential filter of Fig. 1 are summarized as follows: (10)

(11) (4) (12)

is the differential line impedance at the input and where output of the filter (100 for this design). Solving (4) gives the values of and [15]

(13)

B. Design (5) (6)

is a negative capacitor, but it is always smaller than so . they can be absorbed into each other and form the capacitor Fig. 3 shows the implementation of the -inverter and parallel bandpass inductors using a practical transformer. The values of

The response of the differential filter of Fig. 1 can be tuned over a wide frequency range by varying . The shape and relative bandwidth of the filter is approximately fixed due to the filter topology, i.e., capacitive tuning with an inductive inverter [1]. The input/output matching is maintained better than 16 dB . Table I presents the elover the tuning range by varying ement values of a two-pole 5% (Chebyshev, equiripple bandwidth) 6.5–10-GHz differential tunable filter. The filter is first and designed at 10 GHz using (10)–(13) with . Next, and capacitors are varied to achieve a

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TABLE I ELEMENT VALUES FOR THE TUNABLE LUMPED FILTER

Fig. 5. Simulated values of C and C

C

Fig. 4.

(a) Simplified circuit model. (b) Layout for C as a capacitor bank.

filter response down to 6.5 GHz using Agilent ADS.2 To achieve and a 40% tuning range or more, . C. 3- and 4-Bit Digital MEMS Capacitors The resonant capacitor is substituted by a capacitor bank with four unit cells (Fig. 4). This results in 16 different filter responses using 16 different combinations of switches in the up, , and repand down-state positions. is half of the MAM resent MEMS switches, is the parcapacitor in series with the MEMS switch, and asitic capacitance coming from the layout implementation of . Each matching capacitor is composed of three unit cells, and provides enough capacitive variation to result in a well-matched circuit over the whole tuning range. and for difFig. 5 shows the different values of ferent combination of switches in the up- and down-states positions. These values are extracted from full-wave simulation of 2ADS

2002, Agilent Technol. Inc., Palo Alto, CA.

for different switch combinations.

TABLE II ELEMENT VALUES EXTRACTED FROM SONNET SIMULATION

the capacitor bank layouts using Sonnet3 and fitted to a model. The corresponding unit-cell values presented in Table II , where is found from the are calculated using full-wave simulations and includes all inductive (parasitic) efvaries between 140 fF (State 0, all the switches are fects. up) and 425 fF (State 15, all the switches are down), which is varies from 95 (State 0) to close to the range in Table I. 253 fF (State 7), which is higher than in Table I and provides a safe margin to match the return loss of the filter at lower frequencies. D. Effect of Bias Resistance on Capacitor The resonant capacitor bank quality factor has an important role in determining the unloaded of the resonators and the insertion loss of the filter. The MEMS and MAM capacitors as measured in [18], and do not are high- elements degrade the unloaded of the resonators. However, the bias line resistor has a very strong loading effect on the quality factor of (and the resonator). Fig. 6 shows the simulated quality factor at an arbitrary frequency GHz for different bias of line values. This is done using ADS, with the component values in Table II placed in the circuit model of Fig. 4. The simulated circuit ( is negligible), and impedance is fitted to a simple the quality factor is defined as [6] (14) 3Sonnet

8.52, Sonnet Software Inc., North Syracuse, NY.

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Fig. 6. Simulated resonant capacitor quality factor for different switch combinations, and bias resistances.

TABLE III SIMULATED CENTER FREQUENCIES AND THE CORRESPONDING 16 DIFFERENT STATES FOR C AND C . THE INDEXES U/L REFER TO THE UPPER (U) AND LOWER (L) MATCHING CAPACITORS IN FIG. 1

Fig. 7. Simulated: (a) insertion loss and (b) return loss of the tunable two-pole 6.5–10-GHz filter.

where is the operation frequency, is the total series resistance including MEMS switches, MAM capacitors, and bias line resistances, and is the equivalent capacitance. The quality factor doubles if the bias line resistance changes from 1 to 10 k sq. For higher bias line resistances (up to 1 M sq), the quality factor improvement is only 20%. E. Tunable Filter Simulations layout can change both the The resonant capacitor transformer coupling factor and inductor values. The amount of desired coupling and inductance is adjusted by changing the length of the inductors and the distance between the two resonators are simulated inductors when the coupled together in Sonnet. The simulated of the wide microstrip m, m) on the glass substrate lines ( is around 78 at 8 GHz. The whole filter response is then simulated in ADS by cascading -parameters of the matching capacitors and resonators. The simulated center frequencies and are presented in and the corresponding states of Table III. Fig. 7 shows the insertion loss for 16 different states k sq and is 4 and 5.6 dB at 9.8 and 6.5 GHz, with respectively. The higher insertion loss at 6.5 GHz is due to the

low-resistivity bias line, which has a strong loading effect when the switches are all in the down-state position. If the value of increases to 10 k sq, the insertion loss improves to 3 dB at 9.8 GHz and 4 dB at 6.5 GHz. The effective unloaded of the two-pole filter is 45 and 60 for k sq and 10 k sq, respectively, at 8 GHz. III. FABRICATION AND MEASUREMENT A. Fabrication, Implementation, and Biasing The tunable filter is fabricated on a 500- m glass substrate and ) using MEMS switches and ( microstrip lines using a standard RF MEMS process developed at The University of Michigan at Ann Arbor [18], [19]. The MEMS capacitive switch is based on a 8000- sputtered gold layer and is suspended 1.4–1.6 m above the pull-down electrode. The dielectric Si N layer is 1800- thick and the bottom electrode thickness is 6000 (underneath the bridge). The MAM capacitors are suspended 1.5 above the first metal layer. The microstrip conductor, bridge anchor, and top plate of MAM capacitors are electroplated to 2- m thick using a low-stress gold solution. The bias lines are fabricated using a 1200- –thick SiCr layer with a resistivity of 1 k sq.

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Fig. 8. Photograph of a unit cell in a digital capacitor bank.

Fig. 9.

Photograph of the complete 6.5–10-GHz filter.

The center frequency of the tunable filter is directly related to the accuracy of the MAM capacitors (obtained versus designed values). Since the MAM capacitors are quite large and fully electroplated and the sacrificial layer underneath them is uniform, one can build these capacitors quite uniformly throughout the entire wafer with an accuracy around 5% in university laboratories. This can be clearly seen in the agreement between measured versus simulated center frequencies [see Fig. 12(a)]. The photograph of a unit cell in a digital capacitor bank is shown in Fig. 8. The width, length, and thickness of the bridge are 70, 280, and 0.8 m, respectively, and the gap is 1.5 m for the bridge and MAM capacitors. The bottom plate of one of the MAM capacitors is connected to the thin-film resistor to bias the bridge. The release height of the MEMS bridge and MAM capacitor is 1.5 m measured by a light-interferometer V with microscope. The measured pull-in voltage is a corresponding spring constant of N/m and a residual MPa. The mechanical resonant frequency and stress of kHz and , quality factor of the switch are respectively [6]. The photograph of the complete 6.5–10-GHz filter is shown in Fig. 9. It is composed of a transformer in the middle, two , each with four unit cells, and four resonant capacitors , each with three unit cells. Each matching capacitors switch has a separate SiCr dc-bias line for independent control. The center conductor of each capacitor bank is connected to the dc ground pad through the SiCr line. The filter is excited using differential input and output lines, which are compatible with

Fig. 10. Measured: (a) insertion loss and (b) return loss of the tunable two-pole 6.5–10-GHz filter.

a ground–signal–ground–signal–ground (GSGSG) differential probe with a pitch of 150 m. B. Measurements The tunable filter is measured using a differential test setup: two 0 –180 hybrid couplers and two differential probes are used to provide differential excitation for the filters. As is well known, only the odd mode should be generated for differential circuits. The phase and amplitude imbalance for the couplers should be as small as possible. (Gain Bal. 2 dB, Phase Bal. 10 ) for accurate differential measurements [20]. The measurement results are shown in Fig. 10 for 16 different states. The insertion loss [see Fig. 10(a)] is 4.1 and 5.6 dB at 9.8 and 6.5 GHz respectively, and the relative bandwidth is approximately fixed for the whole tuning range, as expected from the simulation results. The return loss [see Fig. 10(b)] is always better than 16 dB for the whole tuning range. Fig. 11 compares the measured and simulated insertion loss for two arbitrary states at 8.6 GHz (State 4) and 7.1 GHz (State 13). The simulated and measured responses agree very well. For the case of k sq , the simulated insertion loss is 1 dB better at 8.6 GHz and 1.4 dB better at 7.1 GHz, as compared with the k sq. The measured response of measurements for

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Fig. 13. .

f

)

Experimental setup for intermodulation measurements

(1f = f 0

Fig. 11. Comparison between the measured and simulated insertion loss for two arbitrary states at 7.1 (State 13) and 8.6 GHz (State 4).

=0

Fig. 14. Nonlinear measurements at V V. (a) The fundamental and intermodulation components versus the input power and the two-tone versus the beat frequency. (b) Filter insertion loss for different values of input power. Fig. 12. (a) Simulated and measured center frequency and loss. (b) Measured relative bandwidth of the 16 filter responses 5.1 0.4 .

( 6 %)

a fabricated filter without any bias lines also confirms that the insertion loss improves by 1 dB at 9.8 GHz (all the switches are electroplated in the up-state position) to 1.6 dB at 6.5 GHz (all the switches are electroplated in the down-state position). The simulated and measured center frequency and loss for each of the 16 different states is presented in Fig. 12(a). Fig. 12(b) shows the relative bandwidth variation for all responses, and is 5.5% at 9.8 GHz (State 0) and 4.7% at 6.5 GHz (State 15). IV. NONLINEAR CHARACTERIZATION The nonlinear analysis of MEMS switches, varactors, and tunable filters has been presented in [7]. This analysis shows that

IM

the mechanical force acting on the MEMS bridge is proportional across the bridge. Under high RF drive conditions, the to MEMS bridge capacitance variation results in a nonlinear behavior of the tunable filter. In the case of two-tone excitation, the mechanical force at the beat frequency changes the capacitance of the bridge and the presence of the input tones across the variable capacitor generates the third-order intermodulation. Fig. 13 shows the setup to measure the intermodulation components at the output of the tunable filter. Two tones generated by two synthesizers are combined, and the combined signal is delivered to the MEMS filter differentially through the baluns (3-dB couplers) and differential RF probes. The output signals are measured using a spectrum analyzer. Fig. 14(a) shows the measured output power for the fundamental and the intermodulation components for several

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distorted. This filter can, therefore, handle an input power up to 24 dBm (250 mW). If a higher bias MEMS switch is used V , the RF power handling will increase to 1 W before self-biasing becomes an issue. The maximum power handling of the filter can be well predicted by studying the voltage and current across the MEMS switch for an input power of 200 mW (Fig. 15). Using a linear model in Agilent ADS, the rms voltage is calculated to be 12.5 V , which is the switch with the largest loading MAM across ]. The corresponding height change in capacitor [State 0; the MEMS switch is 0.055 m, and results in a 0.97-fF change in the switch and a 0.7-fF change in the overall bit-4 capacitance. This is small enough that it has no effect on the frequency response [see Fig. 14(b)]. In the down-state position, the rms curis 81 mA for m , and is well within rent in the acceptable region [6]. However, the rms voltage across the is 3.5 V, which is just below the hold-down voltage of 5 V (the switch remains down even if the dc actuation voltage is removed). It is for these reasons that we predict a 250-mW power-handling capacity for hot switching (RF is never shut off). V. CONCLUSION

Fig. 15. Simulated rms V and I for the input capacitor banks (C , C ). The values for the output capacitive banks are lower by a factor of two due to the filter loss.

values of

. The measured is 45 dBm for kHz. The measurement is in the up-state position since this state gives the worse products. Tunable filters with diode varactors have much lower values of (12 dBm in [3] and 28 dBm in [4]). Fig. 14(a) also shows the intermodulation component versus the difference frequency for dBm (no bias voltage between input tones on the bridges). The intermodulation component follows the level drops mechanical response of the bridge, and the by 40 dB/decade for , which is in agreement with theory [7]. Fig. 14(b) shows the measured insertion loss of the filter for and dBm). three different input power levels ( Due to the spectrum analyzer (a noncalibrated system), the measured insertion loss value is not the same as Fig. 10. The center frequency is at 9.8 GHz and the bias voltage is zero ]. For dBm, there is no self-actuation [State 0; effect [6], [7], and the filter response does not change with . For dBm, the level of increasing the level of the RF voltage across the MEMS bridges is large enough to self-bias the bridges. As a result, the shape of the filter gets

This paper has demonstrated a wide-band tunable filter on a glass substrate from 6.5 to 9.8 GHz (44% tuning range). A novel lumped differential topology is used to miniaturize the filter structure. Resonant capacitor banks with four unit cells (MEMS capacitive switches in series with high- MAM capacitors) result in 16 different filter responses next to each other with very fine tuning resolution like a continuous tunable filter. Matching capacitor banks with three unit cells result in a return loss better than 16 dB over the whole band. The measured results are very close to full-wave simulations. The loss of the filter can be improved by 1–1.6 dB using 10-k sq bias lines or higher instead of a 1-k sq fabricated SiCr line. We believe that the lumped capacitor design can be extended to 18 GHz on glass substrates. Above this frequency, the finite size of the MEMS bridge results in a large parasitic inductance, which limits the tuning performance of the 3- or 4-bit capacitors. REFERENCES [1] G. L. Matthaei, E. Young, and E. M. T. Jones, Microwave Filters, Impedance-Matching Networks, and Coupling Structures. Norwood, MA: Artech House, 1980. [2] W. J. Keane, “YIG filters aid wide open receivers,” Microwave J., vol. 17, no. 8, Sep. 1980. [3] S. R. Chandler, I. C. Hunter, and J. C. Gardiner, “Active varactor tunable bandpass filters,” IEEE Microw. Guided Wave Lett., vol. 3, no. 3, pp. 70–71, Mar. 1993. [4] A. R. Brown and G. M. Rebeiz, “A varactor-tuned RF filter,” IEEE Trans. Microw. Theory Tech., vol. 48, no. 7, pp. 1157–1160, Jul. 2000. [5] I. C. Hunter and J. D. Rhodes, “Electronically tunable microwave bandpass filters,” IEEE Trans. Microw. Theory Tech., vol. 30, no. 9, pp. 1354–1360, Sep. 1982. [6] G. M. Rebeiz, RF MEMS Theory, Design, and Technology. New York: Wiley, 2003. [7] L. Dussopt and G. M. Rebeiz, “Intermodulation distortion and power handling in RF MEMS switches, varactors and tunable filters,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 4, pp. 1247–1256, Apr. 2003. [8] H. T. Kim, J. H. Park, Y. K. Kim, and Y. Kwon, “Millimeter-wave micromachined tunable filters,” in IEEE MTT-S Int. Microwave Symp. Dig., vol. 3, Jun. 1999, pp. 1235–1238.

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[9] [10] [11]

[12] [13] [14]

[15] [16]

[17] [18]

[19] [20]

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, “Low-loss and compact V -band MEMS-based analog tunable bandpass filters,” IEEE Microw. Wireless Compon. Lett., vol. 12, no. 11, pp. 432–434, Nov. 2002. A. Abbaspour-Tamijani, L. Dussopt, and G. M. Rebeiz, “Miniature and tunable filters using MEMS capacitors,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 7, pp. 1878–1885, Jul. 2003. A. Pothier, J. C. Orlianges, E. Zheng, C. Champeaux, A. Catherinot, D. Cross, P. Blondy, and J. Papapolymerou, “Low loss 2-bit bandpass filters using MEMS DC contact switches,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 1, pp. 354–360, Jan. 2005. D. Peroulis, S. Pacheco, K. Sarabandi, and L. P. B. Katehi, “Tunable lumped components with applications to reconfigurable MEMS filters,” in IEEE MTT-S Int. Microwave Symp. Dig., May 2001, pp. 341–344. B. Lakshminarayanan and T. Weller, “Tunable bandpass filter using distributed MEMS transmission lines,” in IEEE MTT-S Int. Microwave Symp. Dig., Jun. 2003, pp. 1789–1792. E. Fourn, A. Pothier, C. Champeaux, P. Tristant, A. Catherinot, P. Blondy, G. Tanne, E. Ruis, C. Person, and F. Huret, “MEMS switchable interdigital coplanar filter,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 1, pp. 320–324, Jan. 2003. I. Hunter, Theory and Design of Microwave Filters. London, U.K.: IEE, 2001. R. M. Young, J. D. Adam, C. R. Vale, T. T. Braggins, S. V. Krishnaswamy, C. E. Freidhoff, S. H. Talisa, E. Capelle, R. Tranchini, J. R. Fende, J. M. Lorthioir, and A. R. Torres, “Low-loss bandpass RF filter using MEMS capacitance switches to achieve a one-octave tuning range and independently variable bandwidth,” in IEEE MTT-S Int. Microwave Symp. Dig., Jun. 2003, pp. 1781–1784. J. Brank, J. Yao, A. Malczewski, K. Varian, and C. L. Goldsmith, “RF MEMS-based tunable filters,” Int. J. RF Microwave Computer-Aided Eng., vol. 11, pp. 276–284, Sep. 2001. J. S. Hayden and G. M. Rebeiz, “Very low loss distributed X -band and Ka-band MEMS phase shifters using metal–air–metal capacitors,” IEEE Trans. Microw. Theory Tech., vol. 551, no. 1, pp. 309–314, Jan. 2003. J. B. Rizk and G. M. Rebeiz, “W -band microstrip RF-MEMS switches and phase shifters,” in IEEE MTT-S Int. Microwave Symp. Dig., Jun. 2003, pp. 303–306. K. Entesari, T. Vaha-Heikkila, and G. M. Rebeiz, “Miniaturized differential filters for C - and Ku-band applications,” in Eur. Microwave Conf. Dig., Oct. 2003, pp. 227–230.

Kamran Entesari (S’03) received the B.S. degree in electrical engineering from Sharif University of Technology, Tehran, Iran, in 1995, the M.S. degree in electrical engineering from Tehran Polytechnic University, Tehran, Iran, in 1999, and is currently working toward the Ph.D. degree in electrical engineering (with an emphasis on applied electromagnetics and RF circuits) at The University of Michigan at Ann Arbor. His research includes RF MEMS for microwaves and millimeter-wave applications, microwave tunable filters, and packaging structures.

Gabriel M. Rebeiz (S’86–M’88–SM’93–F’97) received the Ph.D. degree in electrical engineering from the California Institute of Technology, Pasadena. He is a Full Professor of electrical engineering and computer science (EECS) with the University of California at San Diego, La Jolla. He authored RF MEMS: Theory, Design and Technology (New York: Wiley, 2003). His research interests include applying MEMS for the development of novel RF and microwave components and subsystems. He is also interested in SiGe RFIC design, and in the development of planar antennas and millimeter-wave front-end electronics for communication systems, automotive collision-avoidance sensors, and phased arrays. Prof. Rebeiz was the recipient of the 1991 National Science Foundation (NSF) Presidential Young Investigator Award and the 1993 International Scientific Radio Union (URSI) International Isaac Koga Gold Medal Award. He was selected by his students as the 1997–1998 Eta Kappa Nu EECS Professor of the Year. In October 1998, he was the recipient of the Amoco Foundation Teaching Award, presented annually to one faculty member of The University of Michigan at Ann Arbor for excellence in undergraduate teaching. He was the corecipient of the IEEE 2000 Microwave Prize. In 2003, he was the recipient of the Outstanding Young Engineer Award of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S). He is a Distinguished Lecturer for the IEEE MTT-S.

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A Reconfigurable Bandpass Filter for RF/Microwave Multifunctional Systems Wael M. Fathelbab, Member, IEEE, and Michael B. Steer, Fellow, IEEE

Abstract—A network prototype suitable for reconfigurable filters with imaginary-axis transmission zeros is presented. The prototype is synthesized using classical cascade synthesis. Reconfiguration of the transmission zeros is implemented entirely by tunable capacitors. The measured performance of a narrow-band reconfigurable bandpass filter realized in a planar combline using varactor diodes demonstrates the principle. Index Terms—Planar combline filters, reconfigurable transmission zeros, tunable capacitors.

I. INTRODUCTION

M

ODERN communication systems require small, highly selective, and tunable filters [1] with low insertion loss. This has led to the development of sophisticated synthesis techniques [2]–[8] and a wide range of filter prototypes with equiripple in-band and out-of-band amplitude characteristics. Close assignment of transmit and receive bands has resulted in filter specifications that tend to be asymmetric as with transmit/receive diplexers for mobile terminals [12], [13] and base stations [2], [5] of mobile communication systems. In turn, high-performance diplexers are desired with high out-of-band rejection (to satisfy stringent inter-channel isolation) while maintaining low in-band transmit/receive insertion loss. Filters with asymmetric frequency responses are, therefore, favored to those with symmetric characteristics to minimize the number of resonator sections, thus lowering the in-band insertion loss while maintaining a reasonable level of signal rejection. A multifunctional RF system operating in such an environment requires extra functionality from its active and passive devices. As an example, tunable filter banks are often used to obtain wide-band coverage with the advantage of minimizing overall hardware size. A tunable and reconfigurable filter would be directed at supporting multiple wireless functions using common hardware; hence, decreasing the overall system complexity and potentially improving its performance and functionality. The general class of tunable/reconfigurable bandpass filters would include filters with variable bandwidth, center frequency, skirt selectivity, and group-delay equalization. This paper focuses on the design of reconfigurable filters that alter their transition from passband to stopband by selectively moving finite transmission zero(s) from below or above the Manuscript received February 9, 2004; revised October 14, 2004. This work was supported by the U.S. Army Research Office as a Multidisciplinary University Research Initiative on Multifunctional Adaptive Radio Radar and Sensors under Grant DAAD19-01-1-0496. The authors are with the Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC 27695-7911 USA. Digital Object Identifier 10.1109/TMTT.2005.843502

Fig. 1. Bandpass CT realizing a single transmission zero either in the lower or upper stopband: (a) with inter-resonator inverter couplings and (b) with inductive inter-resonator coupling and either inductive or capacitive cross-coupling.

passband to the other side. By so doing, the near-in rejection of the filter can be varied appropriately. This functionality is achieved solely through the use of tunable capacitors. An RF multifunctional system utilizing a diplexer made of a pair of reconfigurable bandpass filters will be able to reconfigure its transmission zeros to control its transmit channel receive channel isolation level or to simply notch out-of-band interferers. This extra functionality adds a new feature to systems that are required to adapt to suit their RF environment. In this paper, a review of the relevant network sections realizing finite frequency transmission zeros is first presented. A suitable prototype for reconfigurable planar filter design is then introduced. Finally, the measured characteristics of a varactor-tuned reconfigurable combline filter suitable for receive applications are reported. II. CANDIDATE BANDPASS FILTER PROTOTYPES The purpose here is to highlight some of the underlying difficulties encountered in implementing tunable/reconfigurable planar filters. Fig. 1(a) shows the cascaded trisection (CT)

0018-9480/$20.00 © 2005 IEEE

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Fig. 3.

Pair of bandpass resonators coupled by an impedance inverter.

Fig. 2. Bandpass fourth-order network section realizing a single transmission zero either in the lower or upper stopband with inductive inter-resonator coupling and capacitive crosscoupling.

[4]–[6], [11] commonly used in filter prototypes to realize a single imaginary-axis transmission zero. If the crosscoupling inverter has an opposite sign to that of the main line impedance inverters, a transmission zero is placed in the lower stopband, otherwise, if it has the same sign, an upper stopband zero is realized. This implies that a tunable phase shifter in place of the crosscoupling inverter would result in a reconfigurable filter architecture with an increase in overall design complexity. An alternative approximate equivalent to the CT suited for combline realization is shown in Fig. 1(b). In a planar realization, the cross-coupling element may be directly realized in mixed lumped-distributed form [11] provided a tolerable deterioration in stopband performance is accepted. Thus, another possible reconfigurable filter architecture is to use an active switch to interchange between the capacitive and inductive cross-couplings. Passband tunability is usually required in addition to reconfigurability and it is very difficult to design tunable inductors. The need for a switch is also not desirable and the total number of switches required in a filter would be equal to the number of transmission zeros to be realized. A better approach is to achieve reconfigurability by solely using tunable capacitors and, thus, an alternative network section is required. This is shown in Fig. 2. This section has been implemented in the box configuration [2] for base-station filters and is capable of realizing a single imaginary-axis transmission zero either in the lower or upper side of the passband. Upon examining the transmission transfer function of this network section, it can be shown that (with some return-loss degradation) by interchanging the values of the second and fourth capacitors, the location of the transmission zero can be reconfigured from the upper to lower stopband and vice-versa [2]. Consequently, a bandpass filter made of this section has been proposed for complementary transmit/receive diplexers [2] where the bandwidths of the two channels are identical. The key point is that the filter can be reconfigured using only tunable capacitors [2]. The only disadvantage of the network section of Fig. 2 is its complexity. It is of degree 4 and post-tuning and aligning of its response can be problematic for planar realizations. In [2], the box configuration was realized using coaxial resonators where tuning of the inter-resonator couplings was done manually. In Section III, an optimum network section realizing a single imaginary-axis transmission zero is discussed. It will be shown

Fig. 4. Equivalence between: (a) an ideal impedance inverter and (b) its approximate model with an attenuation pole at a finite frequency.

that it is easily realizable in combline with a zero that may be repositioned using tunable capacitors. III. RECONFIGURABLE BANDPASS FILTER PROTOTYPE Consider a pair of resonators coupled by an ideal inverter, as shown in Fig. 3. An ideal impedance inverter has many approximate circuit equivalents [4] among which are the models with simple elements having a pole at zero or infinity. A more general impedance inverter that has an attenuation pole at a finite frequency [6] rather than at zero or infinity is shown in Fig. 4. This inverter has an attenuation pole at (1) and the impedance of the inverter at mid-band is (2) where is the center frequency. Substituting (1) into (2) gives

(3)

or

(4)

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requires careful consideration in the design stage in order to satisfy a certain selectivity specification. In Section IV, a reconfigurable filter is implemented. IV. FILTER IMPLEMENTATION

Fig. 5. Pair of bandpass resonators of Fig. 3 with mixed-type coupling.

Fig. 6. nth-order filter prototype realizing arbitrarily located transmission 1) zeros at finite zeros with one zero at dc, one zero at infinity, and (n frequencies.

A third-order narrow-band receive filter is constructed on a printed circuit board (PCB). The PCB has a substrate thickness of 62 mil (1.57 mm), relative dielectric constant of 4.7, and loss tangent of 0.016. Using the procedure of [7], the characteristic of the filter is constructed with one zero at dc, polynomial three zeros at infinity, one finite frequency zero at 735.6 MHz, MHz, bandwidth of 85 MHz, a center frequency of (10% of 850 MHz), and return loss (RL) of 20 dB. This gives

(5)

0

It is seen from (3) and (4) that if the inverter is positive, the pole lies above the passband and, if negative, below [6]. This property is very useful and is key to the design of reconfigurable filters. The negative shunt elements of the approximate inverter can be absorbed into their adjacent neighbors, resulting in the mixed coupled circuit of Fig. 5. This second-order circuit can be directly realized in combline with a series coupling capacitor. If the series and shunt pair of capacitors were tunable then it would be possible to position the finite zero either in the lower or upper stopband. Thus, the design of a reconfigurable filter commences with a prototype representing the filter with transmission zeros in the initial state, and then by tuning relevant capacitors, specific zeros may be reconfigured accordingly. A simple design method [6] is to start from an th-order prototype with resonators coupled together by ideal inverters and transform, using (1)–(4), as many inverters as required to their corresponding approximates with attenuation poles at finite frequencies. Another more exact method is to use cascade synthesis in the transformed variable [7], [8] to synthesize a network prototype with a specific set of transmission zeros. The general form transmission zeros is of an th-order prototype with shown in Fig. 6 and had been used to realize elliptic function combline filters [9]. A key insight is that, for a specific bandwidth and return-loss level, the reconfigured transmission zeros are restricted to certain locations due to the inter-resonator mixed couplings of the filter that must be same in both states. This dictates the achievable reconfigured locations of the transmission zeros after perturbing the element values of the filter. This is a vital point that

The square of the magnitude of the input reflection coefficient is then evaluated from (6) leading to (7), shown at the bottom of this page, from which the input impedance is then found in a 1- system using (8) In (5),

is the Richards transform defined as

with being the real frequency variable and being the frequency at which the commensurate lines of the prototype are a quarter-wavelength long. For this design, is 2000 MHz, i.e., the resonators are roughly 45 long at the resonant frequency . A possible prototype obtained by direct synthesis of the input impedance is shown in Fig. 7(a) where the short- and opencircuited stubs represent inductors and capacitors, respectively, at the commensurate frequency . Through application of the Norton’s transformation [10], the open-circuited stubs can be distributed throughout the network. Subsequently all the opencircuited stubs have been equated to lumped capacitors at the filter center frequency and, by appropriately scaling the network by a pair of impedance inverters, the transformed prototype of Fig. 7(b) in a 50- system results.

(7)

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Fig. 7. Distributed bandpass filter prototype with one zero at dc, three zeros at infinity, and one zero at 735.6 MHz. (a) After direct synthesis in a 1- system. (b) After application of suitable circuit transformations and scaling in a 50-

system. (All capacitor values are in picofarads.)

Fig. 8. Simulated lossless responses of the prototype of Fig. 7(b) in two states for the same inter-resonator couplings and RL level. (m1: 735.6 MHz; m2: 1016.25 MHz).

optimization, the new zero is finally located at 1016.25 MHz, resulting in the following capacitor values:

From Fig. 7(b), the theoretical capacitor values required for the transmission zero located at 735.6 MHz are pF pF pF pF

(9)

The value of the impedance inverter with an attenuation pole at 735.6 MHz may now be evaluated from (1) and (3). This is done after approximating the series short-cir(of the mixed coupling cuited stub of impedance at resonance using branch) by a lumped inductor

pF pF pF pF

remained virtuIt is seen from (12) that the value of ally unchanged, implying that a total of three capacitors are only required to be tuned to reconfigure the transmission zero. The original (State 1) and reconfigured (State 2) responses are shown in Fig. 8. At this point, a pair of CT filters were synthesized in a 50- system realizing the same transmission zeros as above (i.e., 735.6 and 1016.25 MHz). The element values corresponding to Fig. 1(b) for a lower passband transmission zero are

(10) equal to 19.387 nH. However, this This yields a value of step causes a slight shift in the location of the transmission zero, which may be compensated for by fine tuning the parfrom a value of 2.526 pF to 2.414 pF. By allel capacitor referring to Fig. 4(b), becomes . From (1), is 735.6 is 308.872 . Now, in order to reMHz, and from (3), configure the zero to a location in the upper stopband, the absolute value of the inverter must remain the same, but its phase must be altered from 90 to 270 , i.e., effectively changing sign. is determined from (3) as follows: The new zero location

MHz

nH MHz

(12)

pF pF pF nH nH and those of upper passband transmission zero are pF pF nH nH nH

(11)

to give a value of 1042.517 MHz. This is essentially achieved (evaluated from (1) at the by a new capacitance value of in megahertz) equal to 1.202 pF. With the new frequency, knowledge of the new value of , the neighboring capacitors ( , ) may now be readily found. With very little circuit

(13)

(14)

Equations (13) and (14) suggest that all the three shunt capacitors of a CT filter must be tuned. This is in addition to interchanging between capacitive and inductive cross-coupling elements to fully reconfigure the transmission zero, highlighting the benefits of utilizing the filter prototype of Fig. 7 with direct and mixed inter-resonator couplings. The prototype of Fig. 7(b) was then converted into a physical combline filter using a commercial computer-aided design

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Fig. 9. Layout of combline filter based on the prototype of Fig. 7(b) with bias arrangement. (Half of the capacitors are tunable.)

(CAD) tool.1 Fig. 9 depicts the layout of the combline filter with even- and odd-mode impedances of each coupled-line sections. All the capacitors of the combline filter were then split into two and connected to high-impedance quarter-wavelength bias lines loaded by low-impedance dc power sources. Initially highlumped capacitors were used and the response was reconfigured by manually replacing the lumped capacitors with different values. The practical capacitor values for the transmission zero located at 735.6 MHz are pF pF pF pF

Fig. 10. Measured scattering parameters of reconfigurable filter with a finite transmission zero: (a) in the lower stopband (m1: 850 MHz, 5.253 dB; m2: 732 MHz, 33.027 dB) and (b) in the upper stopband (m1: 850 MHz, 5.753 dB; m2: 996 MHz, 42.785 dB).

(15)

and for a repositioned zero at 997 MHz (instead of 1016.25 MHz) are pF pF pF pF

0

0

0

0

from (15) and (16) is now 3.71 : 1. The measured response of the reconfigurable filter in the two states is shown in Fig. 10. In both states, the mid-band insertion-loss level is below 6 dB and it is seen that the filter could be reconfigured to achieve two different selectivity specifications as required. V. DISCUSSION AND CONCLUSION

(16)

These values differ slightly from their theoretical counterparts (9) and (12) due to the microstrip vias on the PCB that were assumed ideal in the simulation and the slight offset in the repositioned zero location in State 2. The capacitances values in (15) of 2.3 : 1 and (16) suggest a maximum capacitance ratio for (3.3/1.4) to achieve reconfigurability. Half of the lumped capacitors were then replaced by varactor diodes with capacitance ratios of 10 : 12 to fully construct the reconfigurable filter (see Fig. 9). This was done to boost the effective of the series connection of capacitors. The varactor diodes offered a of approximately 12 at 850 MHz while the lumped capacitors had a of 65 at 850 MHz and, thus, the effective of the combination was approximately 20. Since half of the total number of capacitors were replaced by varactor diodes, calculated the maximum tuning ratio required by capacitor 1Advanced Design Tool (ADS), ver. 2003A, Agilent Technol., Palo Alto, CA, 2003. 2Silicon tuning diodes, Infineon Technol., 2005.

A theoretical investigation into the design of a sub-class of reconfigurable filters has been carried out. A practical implementation of a planar microstrip filter has validated the presented design approach. The design theory is based on a network prototype realizing an asymmetric transfer function with possible mixed-coupling branches between adjacent resonators. This circumvents the problem that would exist otherwise where the reconfigurable functionality presented here would be achieved by switching between capacitive and inductive elements or by using tunable phase shifters. Reconfiguring the transmission zeros of the filter enhances the steepness of its response on one side or the other of the passband to suit advanced filtering requirements for multifunctional systems. REFERENCES [1] I. C. Hunter and J. D. Rhodes, “Electronically tunable microwave bandpass filters,” IEEE Microw. Theory Tech., vol. MTT-30, no. 9, pp. 1354–1360, Sep. 1982. [2] R. J. Cameron, A. R. Harish, and C. J. Radcliffe, “Synthesis of advanced microwave filters without diagonal cross-couplings,” in IEEE MTT-S Int. Microwave Symp. Dig., 2002, pp. 1437–1440.

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[3] R. J. Cameron, “General prototype network synthesis methods for microwave filters,” Eur. Space Agency J., vol. 6, pp. 193–206, 1982. [4] I. Hunter, Theory and Design of Microwave Filters. London, U.K.: IEE, 2001. [5] R. Hershtig, R. Levy, and K. Zaki, “Synthesis and design of cascaded trisection (CT) dielectric resonator filters,” in Proc. 27th Eur. Microwave Conf., 1997, pp. 784–791. [6] R. Levy and P. Petre, “Design of CT and CQ filters using approximation and optimization,” IEEE Microw. Theory Tech., vol. 49, no. 12, pp. 2350–2356, Dec. 2001. [7] H. J. Orchard and G. C. Temes, “Filter design using transformed variable,” IEEE Trans. Circuit Theory, vol. CT-15, no. 12, pp. 385–408, Dec. 1968. [8] R. J. Wenzel, “Synthesis of combline and capacitively loaded interdigital bandpass filters of arbitrary bandwidth,” IEEE Microw. Theory Tech., vol. MTT-19, no. 8, pp. 678–686, Aug. 1971. [9] R. Levy and J. D. Rhodes, “A comb-line elliptic filter,” IEEE Microw. Theory Tech., vol. MTT-19, no. 1, pp. 26–29, Jan. 1971. [10] A. I. Zverev, Handbook of Filter Synthesis. New York: Wiley, 1967. [11] J. G. Hong and M. K. Lancaster, Microstrip Filters for RF/Microwave Applications. New York: Wiley, 2001. [12] P. L. Field, I. C. Hunter, and J. G. Gardiner, “Asymmetric bandpass filter using a novel microstrip circuit,” IEEE Microw. Guided Wave Lett., vol. 2, no. 6, pp. 247–249, Jun. 1992. , “Asymmetric bandpass filter using a ceramic structure,” IEEE Mi[13] crow. Guided Wave Lett., vol. 2, no. 9, pp. 361–363, Sep. 1992.

Wael M. Fathelbab (M’03) received the Bachelor of Engineering (B.Eng.) and Doctor of Philosophy (Ph.D.) degrees from the University of Bradford, Bradford, U.K., in 1995, and 1999 respectively. From 1999 to 2001, he was an RF Engineer with Filtronic Comtek (U.K.) Ltd., where he was involved in the design and development of filters and multiplexers for various cellular base-station applications. He was subsequently involved with the design of novel RF front-end transceivers for the U.K. market with the Mobile Handset Division, NEC Technologies (U.K.) Ltd. He is currently a Research Associate with the Department of Electrical and Computer Engineering, North Carolina State University, Raleigh. His research interests include network filter theory, synthesis of passive and tunable microwave devices, and the design of broad-band matching circuits.

Michael B. Steer (S’76–M’82–SM’90–F’99) received the B.E. and Ph.D. degrees in electrical engineering from the University of Queensland, Brisbane, Australia, in 1976 and 1983, respectively. He is currently a Professor with the Department of Electrical and Computer Engineering, North Carolina State University, Raleigh. In 1999 and 2000, he was a Professor with the School of Electronic and Electrical Engineering, The University of Leeds, where he held the Chair in microwave and millimeter-wave electronics. He was also Director of the Institute of Microwaves and Photonics, The University of Leeds. He has authored over 260 publications on topics related to RF, microwave and millimeter-wave systems, high-speed digital design, and RF and microwave design methodology and circuit simulation. He coauthored Foundations of Interconnect and Microstrip Design (New York: Wiley, 2000). Prof. Steer is active in the IEEE Microwave Theory and Techniques Society (IEEE MTT-S). In 1997, he was secretary of the IEEE MTT-S. From 1998 to 2000, he was an elected member of its Administrative Committee. He is the Editor-in-Chief of the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES (2003–2006). He was a 1987 Presidential Young Investigator (USA). In 1994 and 1996, he was the recipient of the Bronze Medallion presented by the Army Research Office for “Outstanding Scientific Accomplishment.” He was also the recipient of the 2003 Alcoa Foundation Distinguished Research Award presented by North Carolina State University.

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Digital Object Identifier 10.1109/TMTT.2005.843430

Digital Object Identifier 10.1109/TMTT.2005.845847

Digital Object Identifier 10.1109/TMTT.2005.845848

Digital Object Identifier 10.1109/TMTT.2005.845849

EDITORIAL BOARD Editor: M. STEER Associate Editors:A. CANGELLARIS, A. CIDRONALI, K. ITOH, B. KIM, S. MARSH, W. MENZEL, A. MORTAZAWI, Y. NIKAWA, Z. POPOVIC, A. RÄISÄNEN, V. RIZZOLI, P. RUSSER, D. WILLIAMS REVIEWERS M. Abdul-Gaffoor M. Abe R. Abou-Jaoude M. Abouzahra A. Abramowicz L. Accatino R. Achar D. Adam E. Adler M. Adlerstein K. Agarwal D. Ahn H.-R Ahn M. Aikawa C. Aitchison M. Akaike C. Akyel A. Akyurtlu B. Albinsson F. Alessandri A. Alexanian C. Algani W. Ali-Ahmad F. Alimenti B. Allen D. Allsopp D. Allstot R. Alm B. Alpert A. Alphones A. Altintas A. Alvarez-Melcom M. Alzona S. Amari L. Andersen B. Anderson Y. Ando O. Anegawa K.-S. Ang I. Angelov R. Anholt Y. Antar G. Antonini D. Antsos K. Anwar I. Aoki R. Aparicio K. Araki J. Archer P. Arcioni F. Arndt R. Arora U. Arz M. Asai P. Asbeck K. Ashby H. Ashok J. Atherton A. Atia I. Awai K. Aygun S. Ayuz Y. Baeyens T. Bagwell Z. Baharav I. Bahl D. Baillargeat S. Bajpai J. Baker-Jarvis E. Balboni S. Banba J. Bandler I. Bandurkin R. Bansal D. Barataud I. Barba F. Bardati I. Bardi S. Barker D. Barlage J. Barr D. Batchelor B. Bates H. Baudrand S. Beaussart R. Beck D. Becker K. Beilenhoff B. Beker V. Belitsky D. Belot H. Bell T. Benson M. Berroth G. Bertin S. Best W. Beyenne A. Beyer S. Bharj K. Bhasin P. Bhattacharya Q. Bi M. Bialkowski E. Biebl P. Bienstman R. Bierig R. Biernacki S. Bila L. Billonnet T. Bird B. Bishop G. Bit-Babik D. Blackham B. Blalock M. Blank P. Blondy P. Blount D. Boccoli B. Boeck F. Bögelsack L. Boglione R. Boix J. Booske N. Borges de Carvalho V. Boria V. Borich O. Boric-Lubecke E. Borie J. Bornemann R. Bosisio H. Boss S. Bousnina P. Bouysse M. Bozzi E. Bracken P. Bradley R. Bradley T. Brazil G. Brehm K. Breuer B. Bridges L. Briones T. Brookes S. Broschat E. Brown G. Brown R. Brown S. Brozovich S. Bruce

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L. Ligthart C.-L. Lin J. Lin G. Linde S. Lindenmeier A. Lindner C. Ling H. Ling D. Linkhart P. Linnér D. Lippens F. Little A. Litwin L. Liu Q.-H. Liu S.-I. Liu Y.-W. Liu O. Llopis S. Lloyd C. Lohmann J. Long U. Lott D. Lovelace K. Lu L.-H. Lu S. Lu W.-T. Lu V. Lubecke S. Lucyszyn R. Luebbers L. Lunardi S. Luo J. Luy C. Lyons G. Lyons Z. Ma S. Maas G. Macchiarella S. Maci T. Mader M. Madihian A. Madjar M. Magana T. Magath C. Mahle S. Mahmoud I. Maio M. Majewski M. Makimoto J. Malherbe J. Mallat R. Mallavarpu D. Malocha L. Maloratsky V. Manasson C. Mann H. Manohara R. Mansour S. March V. Mark F. Marliani R. Marques G. Marrocco S. Marsh J. Martens L. Martens J. Marti A. Martin E. Martinez A. Massa D. Masse K. Masterson A. Materka K. Matsunaga A. Matsushima R. Mattauch M. Mattes G. Matthaei P. Mayer W. Mayer J. Mazierska J. Mazur G. Mazzarella K. McCarthy P. McClay T. McKay J. McKinney R. McMillan R. McMorrow D. McPherson D. McQuiddy E. McShane F. Medina D. Meharry C. Meng H.-K. Meng W. Menzel F. Mesa R. Metaxas P. Mezzanotte K. Michalski E. Michielssen A. Mickelson V. Mikhnev R. Miles E. Miller M. Miller P. Miller R. Minasian J. Mink S. Mirabbasi J. Miranda D. Mirshekar T. Miura S. Miyahara H. Miyashita M. Miyazaki K. Mizuno S. Mizushina C. Mobbs M. Mohamed A. Mohammadian A. Mohan A. Mondal T. Monediere R. Mongia M. Mongiardo C. Monzon C. Moore J. Morente M. Morgan A. Morini J. Morsey A. Mortazawi H. Mosallaei J. Mosig A. Moulthrop G. Mourou A. Moussessian M. Mrozowski J.-E. Mueller T. Mueller J. Muldavin M. Muraguchi V. Nair K. Naishadham T. Nakagawa M. Nakatsugawa M. Nakhla

C. Naldi J. Nallatamby S. Nam T. Namiki G. Narayanan T. Narhi M. Nasir A. Natarajan J. Nath B. Nauwelaers J. Navarro J. Nebus D. Neikirk B. Nelson A. Neto E. Newman H. Newman M. Ney E. Ngoya C. Nguyen T. Nichols K. Niclas E. Niehenke S. Nightingale Y. Nikawa P. Nikitin A. Niknejad N. Nikolova K. Nikoskinen M. Nisenoff T. Nishikawa G. Niu S. Nogi T. Nojima T. Nomoto A. Nosich B. Notaros K. Noujeim D. Novak T. Nozokido G. Nusinovich E. Nyfors D. Oates J. Obregon J. O’Callahan M. Odyneic H. Ogawa K.-I. Ohata T. Ohira H. Okazaki V. Okhmatovski A. Oki M. Okoniewski G. Olbrich A. Oliner S. Oliver J. Olsson F. Olyslager A. Omar B.-L. Ooi A. Orlandi R. Orta S. Ortiz J. Osepchuk J. Ou W. Ou T. Oxley R. Paglione T. Palenius W. Palmer D.-S. Pan S.-K. Pan C. Panasik R. Panock C. Papanicolopoulos J. Papapolymerou S. Parisi D.-C. Park H. Park D. Parker T. Parker R. Parry D. Pasalic W. Pascher M. Pastorino S. Patel P. Pathak A. Pavio J. Pavio T. Pavio J. Pearce W. Pearson J. Pedro B. Pejcinovic S.-T. Peng R. Pengelly J. Pereda L. Perregrini M. Petelin A. Peterson D. Peterson O. Peverini U. Pfeiffer A.-V. Pham J. Phillips L. Pierantoni B. Piernas J. Pierro P. Pieters B. Pillans M. Pirola W. Platte A. Platzker C. Pobanz A. Podell R. Pogorzelski P. Poire R. Pollard G. Ponchak Z. Popovic M. Pospieszalski V. Postoyalko N. Pothecary D. Pozar S. Prasad D. Prather R. Pregla D. Prescott M. Prigent S. Pritchett Y. Prokopenko S. Prosvirnin J. Pulliainen L. Puranen D. Purdy J. Putz Y. Qian T. Quach D. Quak P. Queffelec R. Quere F. Raab V. Radisic L. Raffaelli M. Raffetto C. Railton O. Ramahi S. Raman J. Randa

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Digital Object Identifier 10.1109/TMTT.2005.845846