Applied Op Amp Circuits: Analysis and Design with NI® Multisim™ (Energy Systems in Electrical Engineering) [1st ed. 2024] 9819938805, 9789819938803

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Applied Op Amp Circuits

Farzin Asadi

Applied Op Amp Circuits Analysis and Design with NI® Multisim™

Farzin Asadi Department of Electrical and Electronics Engineering Maltepe University Istanbul, Türkiye

ISBN 978-981-99-3880-3 ISBN 978-981-99-3881-0 (eBook) https://doi.org/10.1007/978-981-99-3881-0 © The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 This work is subject to copyright. All rights are solely and exclusively licensed by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use. The publisher, the authors, and the editors are safe to assume that the advice and information in this book are believed to be true and accurate at the date of publication. Neither the publisher nor the authors or the editors give a warranty, expressed or implied, with respect to the material contained herein or for any errors or omissions that may have been made. The publisher remains neutral with regard to jurisdictional claims in published maps and institutional affiliations. This Springer imprint is published by the registered company Springer Nature Singapore Pte Ltd. The registered company address is: 152 Beach Road, #21-01/04 Gateway East, Singapore 189721, Singapore

In loving memory of my father Moloud Asadi and my mother Khorshid Tahmasebi, always on my mind, forever in my heart.

Preface

An operational amplifier (Op Amp) is a DC-coupled high-gain electronic voltage amplifier with a differential input and, usually, a single-ended output. Op Amps are small in size, cheap, easy to replace and highly reliable. These advantages make the Op Amps one of the important building blocks of modern analog electronics. This book focuses on the important applications of Op Amps. It has been written for students of electrical and computer engineering and anyone who is interested in Op Amps. The prerequisite for this book is a first course in electric circuits. This book is composed of 13 chapters. Here is a brief summary of each chapters: Chapter 1 is an introduction to Op Amps. Chapter 2 studies the inverting, non-inverting and logarithmic amplifiers. Chapter 3 studies the difference and instrumentations amplifiers. Chapter 4 studies the frequency response of Op Amp-based amplifiers. Chapter 5 studies the input/output impedance of Op Amp-based amplifiers. Chapter 6 studies the Op Amp-based buffer circuit. Chapter 7 studies the Op Amp-based comparators. Chapter 8 studies the Op Amp-based filters. Chapter 9 studies the Op Amp-based oscillators. Chapter 10 studies the Op Amp-based precision rectifiers. Chapter 11 studies the Op Amp-based voltage regulators. Chapter 12 shows how to design a circuit with NI Multisim’s Circuit Wizard. Chapter 13 studies the Monte Carlo and worst case analysis of Op Amp-based circuits. I hope that this book will be useful to the readers, and I welcome comments on the book. Istanbul, Türkiye

Farzin Asadi

vii

Contents

1

An Introduction to Op Amps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Op Amp Basics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Model of the Ideal Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 Model of the Non-ideal Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 Analyzing the Op Amp Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 General Transfer Function for Inverting and Non-inverting Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7 Slew Rate of Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . References for Further Study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1 1 2 3 3 5 9 10 10 11

2

Inverting, Non-inverting and Logarithmic Amplifiers . . . . . . . . . . . . . 2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Inverting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 Nulling the Output DC Offset of Inverting Amplifier . . . . . . . . . . 2.4 Waveform of Current Drawn from the Input Source . . . . . . . . . . . 2.5 Circuit Simulation with Virtual Op Amp Block . . . . . . . . . . . . . . . 2.6 Closer Look to OPAMP_3T_VIRTUAL Block . . . . . . . . . . . . . . . 2.7 Non-inverting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.8 Practical Way for Nulling the Output Offset . . . . . . . . . . . . . . . . . . 2.9 Logarithmic Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.10 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . References for Further Study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13 13 14 44 49 55 62 63 72 74 78 80

3

Differential Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 Difference Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3 Measurement of Common Mode Gain of Difference Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4 Measurement of Differential Mode Gain of Difference Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

81 81 82 86 89 ix

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Contents

3.5 Nulling the Output DC Offset of Difference Amplifier . . . . . . . . . 3.6 Instrumentation Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.7 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . References for Further Study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

92 93 96 96

Frequency Response of Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2 Frequency Response of Inverting Amplifier . . . . . . . . . . . . . . . . . . 4.3 Frequency Response of Non-inverting Amplifier . . . . . . . . . . . . . . 4.4 Frequency Response of Instrumentation Amplifier for Common Mode Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5 Frequency Response of Instrumentation Amplifier for Differential Mode Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.6 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . References for Further Study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

99 99 100 112

5

Input–Output Impedance of Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . 5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2 Input Impedance of Inverting Amplifier . . . . . . . . . . . . . . . . . . . . . . 5.3 Output Impedance of Inverting Amplifier . . . . . . . . . . . . . . . . . . . . 5.4 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . References for Further Study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

135 135 136 148 157 160

6

Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.2 Buffer Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.3 Slew Rate of Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.4 Frequency Response of Buffer Circuit . . . . . . . . . . . . . . . . . . . . . . . 6.5 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . References for Further Study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

161 161 161 165 176 182 183

7

Op Amp Based Comparators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.2 Simple Comparator with Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . 7.3 Simple Comparator with LM 311 Comparator . . . . . . . . . . . . . . . . 7.4 Conversion of Sine Wave to Square Wave . . . . . . . . . . . . . . . . . . . . 7.5 Window Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.6 Schmitt Trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.7 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . References for Further Study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

185 185 185 191 191 193 199 208 209

8

Op Amp Based Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.2 High Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.3 Low Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.4 Cascade Connection of Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.5 Step Response of Filter Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . .

211 211 211 218 224 237

4

114 119 132 133

Contents

xi

8.6 Sallen-Key Active Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244 8.7 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246 9

Op Amp Based Oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.2 Wien-Bridge Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.3 Frequency Counter Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.4 Fourier Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.5 RC Phase Shift Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.6 Square Wave Generators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.7 Triangular Wave Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.8 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . References for Further Study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

247 247 247 251 253 259 262 267 272 273

10 Precision Rectifier and Peak Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . 10.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10.2 Half Wave Precision Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10.3 Improved Half Wave Precision Rectifier . . . . . . . . . . . . . . . . . . . . . 10.4 Transfer Characteristics of Improved Half Wave Rectifier . . . . . . 10.5 Full Wave Precision Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10.6 Peak Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10.7 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . References for Further Study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

275 275 276 283 289 296 302 312 312

11 Voltage Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.2 Series Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.3 Measurement of Average Power and Efficiency . . . . . . . . . . . . . . . 11.3.1 Shunt Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.4 Measurement of Output Ripple . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.5 Transfer Characteristics of the Regulator . . . . . . . . . . . . . . . . . . . . . 11.6 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . References for Further Study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

315 315 315 319 323 326 327 335 335

12 Circuit Design with Circuit Wizard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2 555 Timer Wizard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3 Filter Wizard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.4 Opamp Wizard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.5 CE BJT Amplifier Wizard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . References for Further Study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

337 337 337 343 352 357 373 374

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Contents

13 Monte Carlo and Worst Case Analyses of Op Amp Circuits . . . . . . . 13.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2 Monte Carlo Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.3 Worst Case Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.4 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . References for Further Study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

375 375 376 395 411 412

Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 413

Chapter 1

An Introduction to Op Amps

Abstract An Operational Amplifier, or Op Amp for short, is fundamentally a voltage amplifying device designed to be used with external feedback components such as resistors and capacitors between its output and input terminals. These feedback components determine the resulting function of the amplifier. In this chapter you will learn what an Op Amp is and how to analyze circuits contain Op Amps. Keywords Op Amp · Model of ideal Op Amp · Model of non-ideal Op Amp · Slew rate

1.1 Introduction An Operational Amplifier, or Op Amp for short, is fundamentally a voltage amplifying device designed to be used with external feedback components such as resistors and capacitors between its output and input terminals. These feedback components determine the resulting function or “operation” of the amplifier and by virtue of the different feedback configurations whether resistive, capacitive or both, the amplifier can perform a variety of different operations, giving rise to its name of “Operational Amplifier”. In this chapter you will learn what an Op Amp is and how to analyze circuits contains Op Amps. Chapter 2 of [1] is a very good reference and the reader is encouraged to study it.

© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 F. Asadi, Applied Op Amp Circuits, https://doi.org/10.1007/978-981-99-3881-0_1

1

2

1 An Introduction to Op Amps

1.2 Op Amp Basics An Operational Amplifier is basically a three-terminal device which consists of two high impedance inputs. One of the inputs is called the Inverting Input, marked with a negative or “minus” sign (–). The other input is called the Non-inverting Input, marked with a positive or “plus” sign (+). A third terminal represents the operational amplifiers output port which can both sink and source either a voltage or a current. Figure 1.1 shows the Op Amp symbol.

Fig. 1.1 Symbol of an Op Amp

The electronic circuit inside the Op Amp package requires supply voltage to work. Generally, the Op Amp requires a symmetric voltage to work (Fig. 1.2). For the sake of simplicity many schematics don’t show the supply terminals. However, you must be aware that no Op Amp can work without supply voltage if you want to implement the circuit.

Fig. 1.2 Symbol of an Op Amp with supply terminals

1.4 Model of the Non-ideal Op Amp

3

[ ] Voltage of output node can change from VS− + δ, VS+ − δ . δ is a factor to show how close the output of Op Amp can be to the supply voltage. For instance, purpose Op Amp assume that VS− = −12 V and VS+ = +12 V. Output of a general [ ] with such a supply may generate voltages in the range of VS− + δ, VS+ − δ = [−12 + 1, +12 − 1] = [−11 V, +11 V].

1.3 Model of the Ideal Op Amp Model of an ideal Op Amp is shown in Fig. 1.3. The ideal Op Amp amplifies the voltage difference between the inverting and non-inverting terminals with a high gain A. Note that the current enters to the inverting and non-inverting terminals are zero. In other words, the input impedance is infinite. Gain A is a big number for instance, 100,000. Output impedance of the ideal Op Amp is zero.

Fig. 1.3 Model of an ideal Op Amp

1.4 Model of the Non-ideal Op Amp Model of a non-ideal Op Amp is shown in Fig. 1.4. Similar to the ideal case, the voltage difference between the inverting and non-inverting terminals are amplified. The transfer function of H (s) is H (s) = 1+A s (for instance, A = 105 and ω0 = ω0

2π × 10 = 20π Rad ). The commands shown in Fig. 1.5 produce the Bode diagram s

4

of H (s) =

1 An Introduction to Op Amps A 1+ ωs

0

for A = 105 and ω0 = 2π × 10 = 20π Rad . Output of this code is s

shown in Fig. 1.6. According to Fig. 1.6, the Bode graph has a low pass nature. In Fig. 1.4, the currents enter to the inverting and non-inverting terminals are non-zero but they are very small. In other words the input impedance is not infinite. Output impedance of the non-ideal Op Amp is not zero as well.

Fig. 1.4 Model of non-ideal Op Amp

Fig. 1.5 MATLAB code

1.5 Analyzing the Op Amp Circuits

5

Fig. 1.6 Output of MATLAB code in Fig. 1.5

1.5 Analyzing the Op Amp Circuits Memorize the following golden rules which are used to analyze Op Amps circuits: 1. The Op Amp has infinite open-loop gain ( A → ∞). 2. The input impedance of the + / − inputs is infinite. In other words, no current flows into the + / − inputs of the Op Amp. The output impedance is zero. 3. In a circuit with negative feedback, the output of the Op Amp will try to adjust its output so that the voltage difference between the + and − inputs is zero (VD I F F = 0). By negative feedback in Rule 3 we mean a connection (path) between output and negative input of the Op Amp. Let’s study an example. Consider the circuit shown in Fig. 1.7.

6

1 An Introduction to Op Amps

Fig. 1.7 Inverting amplifier

In this circuit there exist a connection between output and negative terminal. Therefore, we have negative feedback. Since V1 = 0 V, V2 must be equal to 0 V as well (VX = 0 V). This cause the Iin to be Iin = VinRin−0 . Current Iin cannot pass through the negative terminal of the Op Amp. Therefore, Iin = I F = VinRin−0 . According to out out out = 0−V = −V . In other words, Vout = − RRinF Vin . Ohm’s law I F = VinRin−0 = VX −V RF RF RF The circuit is called inverting because of the negative sign in Vout = − RRinF Vin . Let’s study another example. Consider the circuit shown in Fig. 1.8.

Fig. 1.8 Integrator circuit

Let’s analyze the circuit in the frequency domain. Use Table 1.1 to convert the components into the frequency domain.

1.5 Analyzing the Op Amp Circuits Table 1.1 Conversion from time domain to frequency domain

7

Time domain

Frequency domain

R

R

L

L .s

C

1 Cs

The frequency domain equivalent of Fig. 1.8 is shown in Fig. 1.9.

Fig. 1.9 The capacitor is replaced with 1/Cs

In this circuit there exist a connection between output and negative terminal. Therefore, we have negative feedback. VX = 0 V since positive terminal of the Op Amp is grounded. This cause the Iin to be Iin = VinRin−0 . Current Iin cannot pass through the negative terminal of the Op Amp. Therefore, Iin = I F = VinRin−0 . out = 0−V1 out = −V1out = −Vout .C.s. In other According to Ohm’s law I F = VX −V 1 Cs Cs Cs{ words, Vout (s) = − Rin 1.C.S Vin (s) which is equal to − Rin1.C Vin (t)dt in time domain. You can simply show that the transfer function of the circuit shown in Fig. 1.10 is Vout = −R f .C.s.Vin (s) which is equal to −R f .C dVdtin (t) in time domain.

Fig. 1.10 Differentiator circuit

8

1 An Introduction to Op Amps

Let’s study another example. Consider the circuit shown in Fig. 1.11. Fig. 1.11 Non-inverting amplifier

In this circuit there exist a connection between output and negative terminal. So, we R2 Vout . The Op Amp tries to make the voltage have negative feedback and V1 = R2 +R F 2 difference between + and − terminals zero. In other words, Vin = V1 = R2 R+R Vout F ) ( RF or Vout = 1 + R2 Vin . The circuit is called non-inverting since input and output are in phase, i.e. amplifier gain is positive. Let’s study another example. Consider the circuit shown in Fig. 1.12. Fig. 1.12 Another type of inverting amplifier

x x In this circuit I1 = Iin ⇒ VNR−V = VRin1 ⇒ −V = VRin1 ⇒ Vx = − RR21 Vin . R2 2 x x x x I1 +I2 −I3 = 0. This means that VNR−V + VoR−V − VRx4 = 0 ⇒ 0−V + VoR−V − VRx4 = 0 ⇒ R2 2 3 3 −Vx Vo −Vx Vx R3 R4 +R2 R4 +R2 R3 R3 R4 +R2 R4 +R2 R3 + R3 − R4 = 0 ⇒ V O = Vx . Therefore, VO = R2 R2 R4 ( R2 R4 ) R3 R4 +R2 R4 +R2 R3 R2 R2 R3 R3 Vx = × − R1 Vin = − R1 × 1 + R2 + R4 Vin . R2 R4

1.6 General Transfer Function for Inverting and Non-inverting Amplifiers

9

1.6 General Transfer Function for Inverting and Non-inverting Amplifiers Consider the inverting amplifier shown in Fig. 1.13. In this figure Z 1 (s) and Z f (s) Z (s) (s) = − Z 1f (s) . show two impedances. For this circuit VVout in (s) Fig. 1.13 General form of inverting amplifier

Let’s study an example. For instance, consider the circuit shown in Fig. 1.14. In this circuit Z 1 (s) = Rin and Z 2 (s) = Z (s) − Z 1f (s)

1 R1 × Cs 1 R1 + Cs

=

R1 . R1 Cs+1

Therefore,

Vout (s) Vin (s)

=

R1 = − R1 Cs+1 .

Fig. 1.14 Sample circuit with RC feedback network

Now consider the non-inverting amplifier shown in Fig. 1.15. In this figure Z 1 (s) Z (s) (s) = 1 + Z 1f (s) . and Z f (s) show two impedances. For this circuit VVout in (s)

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1 An Introduction to Op Amps

Fig. 1.15 General form of non-inverting amplifier

1.7 Slew Rate of Op Amp The slew rate of an op amp or any amplifier circuit is the rate of change in the output voltage caused by a step change on the input. It is measured as a voltage change in a given time—typically V/µs. For instance, consider the output waveform shown in Fig. 1.16. In this figure the output of Op Amp goes from V1 to V2 in time dT. −V1 . Therefore, slew rate is V2dT Fig. 1.16 Output of an Op Amp can’t change instantaneously

1.8 Exercises 1. Show that for the circuit shown in Fig. 1.17,

Vout (s) Vin (s)

=

L 1 C1 s 2 +(R1 C1 +L 1 )s+R1 . L 1 s+R1

2. Assume that in Fig. ) C1 = 1 F, L1 = 1 H and R1 = 1 Ω. Calculate the output ( 1.17, for Vin (s) = sin t + π4 .

References for Further Study

11

Fig. 1.17 Circuit for Exercise 1

References for Further Study 1. Sedra A., Smith K., Microelectronics Circuits, Oxford University Press, 2015. 2. Asadi F., Essential Circuit Analysis using NI Multisim™ and MATLAB®, Springer, 2022. DOI: https://doi.org/10.1007/978-3-030-89850-2 3. Asadi F., Essential Circuit Analysis Using Proteus®, Springer, 2022. DOI: https://doi.org/10. 1007/978-981-19-4353-9 4. Asadi F., Essential Circuit Analysis using LTspice®, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-09853-6 5. Asadi F., Electric and Electronic Circuit Simulation using TINA-TI®, River Publishers, 2022. DOI: https://doi.org/10.13052/rp-9788770226851 6. Asadi F., Electric Circuit Analysis with EasyEDA, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-00292-2 7. Asadi F., Power Electronics Circuit Analysis with PSIM®, De Gruyter, 2021. DOI: https://doi. org/10.1515/9783110740653 8. Asadi F., Simulation of Power Electronics Circuits with MATLAB®/Simulink®: Design, Analyze, and Prototype Power Electronics, Apress, 2022. DOI: https://doi.org/10.1007/978-14842-8220-5 9. Asadi F., Eguchi K., Electronic Measurement: A Practical Approach, Springer, 2021. DOI: https://doi.org/10.1007/978-3-031-02021-6 10. Asadi F., Eguchi K., Simulation of Power Electronics Converters Using PLECS®, Academic Press, 2019. DOI: https://doi.org/10.1016/C2018-0-02253-7 11. https://www.electronics-tutorials.ws/opamp/opamp_1.html

Chapter 2

Inverting, Non-inverting and Logarithmic Amplifiers

Abstract An amplifier is an electronic device that increases the voltage, current, or power of a signal. In this chapter we will study the most basic type of amplifiers that can be implemented with Op Amps. All of the circuits in this chapter use negative feedback. Negative feedback provides the desired gain accurately despite of factors like temperature changes, output load changes and supply voltage changes. Keywords Inverting amplifier · DC offset · Non-inverting amplifier · Logarithmic amplifier · Virtual Op Amp block

2.1 Introduction An amplifier is an electronic device that increases the voltage, current, or power of a signal. In this chapter we will study the most basic type of amplifiers that can be implemented with Op Amps. All of the circuits in this chapter use negative feedback. Negative feedback provides the desired gain accurately despite of factors like temperature changes, output load changes, supply voltage changes, … In this chapter you will learn how Op Amps can be used to implement inverting, non-inverting and logarithmic amplifiers.

© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 F. Asadi, Applied Op Amp Circuits, https://doi.org/10.1007/978-981-99-3881-0_2

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2.2 Inverting Amplifier An inverting amplifier, i.e., 180° of phase difference exists between input and output of the amplifier, is shown in Fig. 2.1. Gain of this amplifier is Av = − RR21 .

Fig. 2.1 Inverting amplifier

In this section we want to simulate the circuit shown in Fig. 2.2. Gain of this kΩ = −10. amplifier is Av = − RR21 = − 10 1 kΩ

2.2 Inverting Amplifier

15

Fig. 2.2 Sample inverting amplifier

Open the Simulink and click on the Place Analog button (Fig. 2.3). This opens the window shown in Fig. 2.4. Fig. 2.3 Place Analog button

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.4 Select a Component window

Select the 741 Op Amp (Fig. 2.5) and click on the OK button in Fig. 2.5. After clicking the OK button, an Op Amp symbol will be added to the mouse pointer. Click on the schematic to add the Op Amp to it (Fig. 2.6). You can rotate the component by pressing the Ctrl+R before clicking on the schematic.

2.2 Inverting Amplifier

Fig. 2.5 Selection of 741 Op Amp. You can use the Component box to search for a part

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.6 Addition of 741 Op Amp to schematic

Right click on the Op Amp. This opens the menu shown in Fig. 2.7. Now, you can use the flip or rotate commands. Click on the Flip vertically to obtain what shown in Fig. 2.8.

2.2 Inverting Amplifier

19

Fig. 2.7 Flip and rotate commands Fig. 2.8 Op Amp symbol is flipped

Click on the Place Source button (Fig. 2.9). This opens the window shown in Fig. 2.10.

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.9 Place Source button

Fig. 2.10 Select a Component window

Select POWER_SOURCE and GROUND (Fig. 2.11). Then click the OK button in Fig. 2.11 in order to add the ground symbol to the schematic (Fig. 2.12).

2.2 Inverting Amplifier

Fig. 2.11 Ground block Fig. 2.12 Ground block is added to the schematic

Connect the ground to the positive terminal of the Op Amp (Fig. 2.13).

21

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.13 Ground is connected to the positive terminal of the Op Amp

Click the Place Basic button (Fig. 2.14). This opens the window shown in Fig. 2.15. Fig. 2.14 Place Basic button

2.2 Inverting Amplifier

23

Fig. 2.15 Select a Component window

Select the RESISTOR (Fig. 2.16) and add a 1 and 10 kΩ resistors to the schematic (Fig. 2.17).

24

2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.16 Resistor block Fig. 2.17 Addition of two resistors to the schematic

Connect the resistors to the rest of the circuit (Fig. 2.18).

2.2 Inverting Amplifier

25

Fig. 2.18 Resistors are connected to the Op Amp

Click on the Place Source button (Fig. 2.19). This opens the Select a Component window for you. Select the POWER_SOURCES and VEE (Fig. 2.20). Then add the VEE block close to the terminal number 4 (Fig. 2.21). Fig. 2.19 Place Source button

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.20 VEE block Fig. 2.21 Addition of VEE block to the schematic

Connect the terminal number 4 to the VEE block (Fig. 2.22).

2.2 Inverting Amplifier

27

Fig. 2.22 VEE block is connected to the Op Amp

Click the Place Source button (Fig. 2.23) again. This time select the VCC (Fig. 2.24) and add a VCC block close to the terminal number 7 of the Op Amp (Fig. 2.25). Fig. 2.23 Place Source button

28

Fig. 2.24 VCC block

2 Inverting, Non-inverting and Logarithmic Amplifiers

2.2 Inverting Amplifier Fig. 2.25 Addition of VCC block to the schematic

Connect the VCC block to the terminal number 7 (Fig. 2.26).

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.26 VCC block is connected to the Op Amp

Double click on the VEE block and change the Voltage box to − 12 (Fig. 2.27). Now the schematic changes to what shown in Fig. 2.28.

2.2 Inverting Amplifier Fig. 2.27 Settings of VEE block

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.28 VEE is changed to − 12 V

Double click on the VCC block and change the Voltage box to 12 (Fig. 2.29). Now the schematic changes to what shown in Fig. 2.30.

2.2 Inverting Amplifier Fig. 2.29 Settings of VCC block

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.30 VCC is changed to 12 V

Let’s add a signal source to the schematic in order to stimulate the amplifier. Click the Place Source button (Fig. 2.31) in order to open the Select a Component window (Fig. 2.32). Then select the SIGNAL_VOLTAGE_SOURCES and AC_VOLTAGE (Fig. 2.32) and add a AC voltage source to the schematic (Fig. 2.33). Fig. 2.31 Place Source button

2.2 Inverting Amplifier

35

Fig. 2.32 AC Voltage block Fig. 2.33 Completed schematic

Double click on the added AC voltage source. This opens the AC_VOLTAGE window for you and permits you to enter the desired settings for the AC source.

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Enter 10 m to the Voltage (PK) box (Fig. 2.34). This sets the amplitude of the AC source equals to 10 mV. Now the schematic changes to what shown in Fig. 2.35. Fig. 2.34 Settings of AC voltage source V1

Fig. 2.35 Amplitude of V1 is changed to 10 mV

We need a scope block to observe the waveforms. Click the 2 channel oscilloscope block (Fig. 2.36) and connect it to the rest of the circuit (Fig. 2.37). If you can’t see

2.2 Inverting Amplifier

37

the scope block, right click on the Multisim’s toolbar and check the Instruments. Schematic shown in Fig. 2.38 is equivalent to the schematic shown in Fig. 2.37. Fig. 2.36 Oscilloscope block

Fig. 2.37 Addition of oscilloscope block to the schematic

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.38 Negative terminals of oscilloscope are connected to ground

Right click on the wire that connects input signal to Channel A of the oscilloscope and click on the Segment color (Fig. 2.39). Then select the desired color (Fig. 2.40) and press the OK button. Selected color will be used to show the waveform of channel A. Note that after clicking the OK button in Fig. 2.40, color of the wire changes to the selected color (Fig. 2.41).

Fig. 2.39 Changing the color of the waveform shown in the scope block

2.2 Inverting Amplifier

39

Fig. 2.40 Colors window

Fig. 2.41 Color of wire is changed

Now the schematic is ready. Press the Ctrl+S to save it. This opens the Save As window (Fig. 2.42). Enter the desired name to the File Name box (Fig. 2.42) and click the Save button. After clicking the Save button, entered name is shown on the left side of the window (Fig. 2.43).

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.42 Save As window Fig. 2.43 Name of the file shown in the top left corner of the screen

Now click the Run button (Fig. 2.44) or press the F5 key. Ensure that Interactive is selected (Fig. 2.44). For instance, assume that you see DC operating point instead of Interactive (Fig. 2.45). In this case you need to click on DC operating point. This opens the Analysis and Simulation window. Now click on the Interactive Simulation and then click the Save button (Fig. 2.46). Now the Interactive analysis should be seen (Fig. 2.47).

2.2 Inverting Amplifier Fig. 2.44 Run and Interactive buttons

Fig. 2.45 DC operating point analysis is selected

Fig. 2.46 Analysis and Simulation window

41

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.47 Interactive analysis is selected

Run the simulation by clicking the green play button in Fig. 2.47. Then double click the oscilloscope block (Fig. 2.48).

Fig. 2.48 Simulation result with default settings

Change the oscilloscope settings to what shown in Fig. 2.49. These settings permit you to observe the input and output waveforms easily. Input is shown with purple and output is shown with red color. Purple color for channel A is selected in Fig. 2.40. Note that in Fig. 2.49 180° of phase difference exist between input and output, i.e., positive peak of output signal occurs at the negative peak of input signal.

2.2 Inverting Amplifier

43

Fig. 2.49 Simulation result with new settings

You can pause the simulation with the aid of button shown in Fig. 2.50. Pausing the simulation permits you to do the measurements easily. Fig. 2.50 Pause button

You can stop the simulation with the aid of button shown in Fig. 2.51. After stopping the simulation, you will return to the schematic editor environment.

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.51 Stop button

2.3 Nulling the Output DC Offset of Inverting Amplifier If you take a careful look to the output waveform (red waveform in Fig. 2.49) you will see that the output waveform is not symmetric and it is moved up. Let’s use the cursors (Fig. 2.52) to measure the value of positive and negative peak of the output.

Fig. 2.52 Cursors

Move one of the cursors to the positive peak of the output and put the other one in the negative peak of the output (Fig. 2.53). Click on the output waveform as well. This cause the scope block to measure the intersection of cursors with output waveform. According to Fig. 2.53, positive and negative peak of the output waveform occurs at 111.562 mV and − 87.439 mV, respectively. So, the peak-to-peak of output voltage is 111.562 − (− 87.439) = 199.001 mV. Output DC component is 111.562−87.439 = 12.0615 mV. 2

2.3 Nulling the Output DC Offset of Inverting Amplifier

45

Fig. 2.53 Measurement of peak-to-peak of the output signal

Let’s measure the output DC component with a DC voltmeter as well. Click on the Place Indicator button (Fig. 2.54). Then add a vertical voltmeter (Fig. 2.55) to the schematic (Fig. 2.56). Fig. 2.54 Place Indicator button

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.55 Voltmeter block

Fig. 2.56 Addition of voltmeter to the schematic

Run the simulation (Fig. 2.57). According to Fig. 2.57, the output has a 12 mV DC offset.

2.3 Nulling the Output DC Offset of Inverting Amplifier

47

Fig. 2.57 Voltmeter shows 0.012 V

Let’s try to neutralize the DC offset of the output. Remove the input signal source and add the resistor R3 to the positive terminal of the Op Amp (Fig. 2.58). According to Fig. 2.58, for R3 = 1 kΩ, the output DC offset is 11 mV. Increase the value of R3 and see how the output DC offset decreases. According to Fig. 2.59, for R3 = 19.3 kΩ, output DC offset equals to 90 µV. The + and − terminal of the Op Amp draw some bias current and R3 tries to make the potential of + and − terminal equal to each other. This decreases the output DC component.

Fig. 2.58 With R3 = 1 kΩ, the voltmeter measures 0.011 V

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.59 With R3 = 19.3 kΩ, the voltmeter measures 0.09 mV or 0.00009 V

Now add the input signal source V1 to the schematic (Fig. 2.60) and run the simulation. Result is shown in Fig. 2.61. According to Fig. 2.61, the positive and negative peak occurs at 99.780 mV and − 99.443 mV, respectively. So, the output is symmetric right now. Peak-to-peak of input and output voltages are 20 mV and 99.78 − (− 99.443) = 199.223 mV. So, gain of the amplifier is − 199.223/20 = − 9.9611. Negative sign shows the 180° of phase difference between input and output.

Fig. 2.60 Signal source V1 is added to the circuit

2.4 Waveform of Current Drawn from the Input Source

49

Fig. 2.61 Simulation result

2.4 Waveform of Current Drawn from the Input Source In this section you will learn how to use the current controlled voltage source as a current sensor. For instance, assume that we want to observe the current drawn from voltage source V1 in Fig. 2.62.

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.62 Inverting amplifier

Change the schematic to what shown in Fig. 2.63. V2 is a current controlled voltage source. Current controlled voltage source block can be found in the CONTROLLED_ VOLTAGE_SOURCE section (Fig. 2.64).

Fig. 2.63 Current controlled voltage source is used as current sensor

2.4 Waveform of Current Drawn from the Input Source

51

Fig. 2.64 Current controlled voltage source block

Settings of ammeter U2 and current controlled voltage source V2 are shown in Figs. 2.65 and 2.66, respectively. In Fig. 2.66 the Transresistance(H) box is filled with 1. This means that 1 A generates 1 V. In general, if you fill the Transresistance(H) box with value R, then 1 A generates R volts in output. For instance, if you fill the Transresistance(H) box with 2, then 1 A generates 2 V.

52 Fig. 2.65 Settings of ammeter block. When AC is selected it measures the RMS value of the signal

2 Inverting, Non-inverting and Logarithmic Amplifiers

2.4 Waveform of Current Drawn from the Input Source

53

Fig. 2.66 Settings of current controlled voltage source block

Run the simulation. According to Fig. 2.67, 7.07 µA RMS is drawn from the voltage source V1. Current drawn from voltage source V1 is shown in Fig. 2.68. Peak of the current drawn from the source V1 is 10 µA.

54

2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.67 Ammeter reads 7.07 µA

Fig. 2.68 Current and voltage waveforms

2.5 Circuit Simulation with Virtual Op Amp Block

55

2.5 Circuit Simulation with Virtual Op Amp Block In the previous section we used a 741 Op Amp to do the simulation. You can do the Op Amp circuit simulation with the aid of OPAMP_3T_VIRTUAL block (Fig. 2.69) as well. You can set the Op Amp parameters to what you want with the aid of OPAMP_ 3T_VIRTUAL block.

Fig. 2.69 OPAMP_3T_VIRTUAL block

Let’s do a simulation with OPAMP_3T_VIRTUAL block. Open the schematic of previous example (Fig. 2.70).

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.70 Inverting amplifier with OPAMP_3T_VIRTUAL block

Double click on the 741 Op Amp block in Fig. 2.70. This opens the window shown in Fig. 2.71. Click the Replace button and select the OPAMP_3T_VIRTUAL block (Fig. 2.72). After clicking the OK button in Fig. 2.72, the 741 Op Amp will be replaced with a OPAMP_3T_VIRTUAL block (Fig. 2.73).

2.5 Circuit Simulation with Virtual Op Amp Block Fig. 2.71 OPAMP window

57

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.72 Select a Component window

Fig. 2.73 741 Op Amp is replaced with OPAMP_3T_VIRTUAL block

2.5 Circuit Simulation with Virtual Op Amp Block

59

Double click on the OPAMP_3T_VIRTUAL block in Fig. 2.73. This opens the window shown in Fig. 2.74 and permits you to set the parameters to what you want. If you click on the Help button in Fig. 2.74, the window shown in Fig. 2.75 appears and gives more information about each of the parameters shown in Fig. 2.74.

Fig. 2.74 OPAMP_3T_VIRTUAL window

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.75 3-Terminal Virtual Opamp section of Multisim help

Remove the VCC, VEE and R3 from the schematic shown in Fig. 2.73 in order to obtain schematic shown in Fig. 2.76. Don’t change the OPAMP_3T_VIRTUAL block parameters and leave them to be equal to their default values.

2.5 Circuit Simulation with Virtual Op Amp Block

61

Fig. 2.76 VCC and VEE are removed from the schematic

Run the simulation and double click the oscilloscope block to observe the waveforms. Simulation result is shown in Fig. 2.77. Waveforms are as expected. OPAMP_ 3T_VIRTUAL block permits you to simulate an Op Amp circuit without being involved with the part number of the Op Amp.

Fig. 2.77 Simulation result

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2 Inverting, Non-inverting and Logarithmic Amplifiers

2.6 Closer Look to OPAMP_3T_VIRTUAL Block In the previous section we used the OPAMP_3T_VIRTUAL block to simulate an inverting amplifier. Let’s take a closer look to the OPAMP_3T_VIRTUAL block. Settings of OPAMP_3T_VIRTUAL block is reshown in Fig. 2.78 for ease of reference. Equivalent circuit for OPAMP_3T_VIRTUAL block is shown in Fig. 2.79. . Note that V+ − V− shows the voltage drop across the resistor R I and ω0 = 2π FU A For values shown in Fig. 2.78, ω0 = 2π × 500 Rad . PT and NT shows the positive s and negative terminal of the Op Amp. Fig. 2.78 OPAMP_3T_ VIRTUAL settings

2.7 Non-inverting Amplifier

63

Fig. 2.79 Model of OPAMP_3T_VIRTUAL block

2.7 Non-inverting Amplifier = 1 + RR21 . A non-inverting amplifier is shown in Fig. 2.80. In this circuit A V = VVout in In this section we want to simulate the circuit shown in Fig. 2.81. The circuit shown in Fig. 2.81 is a non-inverting amplifier, i.e. there is no phase difference between input = 10. and output of the amplifier. Gain of this amplifier is Av = 1 + RR21 = 1 + 91 kΩ kΩ

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.80 Non-inverting amplifier

Fig. 2.81 Sample non-inverting amplifier

2.7 Non-inverting Amplifier

65

Simulation result is shown in Fig. 2.82. Note that input and output are in phase. Let’s turn off the channel A (input) in order to see the output waveform clearly (Fig. 2.83).

Fig. 2.82 Simulation result

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.83 Waveform of Channel A is not shown

If you take a careful look to the output waveform shown in Fig. 2.84, you will see that it is not symmetrical with respect to the time axis. The waveform is shifted up. In other words, it has a DC component. Let’s use the cursors to measure the positive and negative peak values. According to Fig. 2.84, value of positive and negative peaks are 110.494 mV and − 88.902 mV, respectively. Therefore, the DC = 10.796 mV ≈ 11 mV. In Fig. 2.85 we used a DC component is 110.494−88.902 2 voltmeter to measure the DC component of the output. According to Fig. 2.85, the DC component of the output is 11 mV.

2.7 Non-inverting Amplifier

Fig. 2.84 Measurement of peak-to-peak value of Channel B

67

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.85 The DC voltmeter measures 0.011 V

Let’s try to neutralize the DC offset of the output. Remove the input signal source and add the resistor R3 to the positive terminal of the Op Amp (Fig. 2.86). According to Fig. 2.86, for R3 = 19.3 kΩ, the output DC offset is 72 µV. Similar to the inverting circuit, the + and − terminal of the Op Amp draw some bias current and R3 tries to make the potential of + and − terminal equal to each other. This decreases the output DC component.

2.7 Non-inverting Amplifier

69

Fig. 2.86 The DC voltmeter measures 0.072 mV or 0.000072 V

Now add the input signal source to the circuit (Fig. 2.87) and run the simulation. The output waveform is symmetric (Fig. 2.88). According to Fig. 2.89, peak-topeak value of the output is 199.392 mV. Input signal has peak value of 10 mV and = 9.97 ≈ 10 as expected. peak-to-peak value of 20 mV. Therefore, the gain is 199.392 20

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.87 Voltage source V1 provides the input for non-inverting amplifier

2.7 Non-inverting Amplifier

Fig. 2.88 Simulation result

Fig. 2.89 Measurement of peak-to-peak value of output

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2 Inverting, Non-inverting and Logarithmic Amplifiers

2.8 Practical Way for Nulling the Output Offset In the previous examples we added the resistor R3 in order to decrease the DC offset of the output. Generally, the Op Amp’s have some pins which permits the user to add a potentiometer to it and control the DC offset of the output. For instance, consider the non-inverting amplifier shown in Fig. 2.90. Fig. 2.90 Non-inverting amplifier with gain of 10

According to the 741 datasheet, you can use the circuit shown in Fig. 2.91 to decrease the DC offset of the output. Turn the potentiometer P1 until the milli voltmeter U2 shows a value around 0. Now you can remove the DC milli voltmeter and apply the signal to the amplifier (Fig. 2.92). Note that in Multisim environment you cannot change the output DC offset by addition of a potentiometer connected to pin 1 and 5 of 741 Op Amp. In other words, the circuit shown in Fig. 2.92 doesn’t work in Multisim. The reason is that although pin 1 and 5 are shown on the Op Amp symbol, their duty is not defined in the model given to Multisim.

2.8 Practical Way for Nulling the Output Offset

Fig. 2.91 Potentiometer P1 permits you to make the DC offset of the Op Amp zero

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Fig. 2.92 Voltage source V1 is added to the circuit

2.9 Logarithmic Amplifier Vout is K times the Logarithmic amplifier is an amplifier which the output ) ( voltage Vin natural log of the input voltage Vin , i.e. Vout = K ×ln Vr e f . Vr e f is the normalization constant in volts and K is the scale factor. The circuit Fig. 2.93 is a logarithmic amplifier. In this circuit Vout ≈ ) ( shown V1 −VT × ln R×I S . Is and VT show the saturation current of the diode and thermal voltage, respectively. The thermal voltage is around 25.8 mV for room temperature (27 °C). Logarithmic amplifiers are realized with high performance Op Amps like LM1458, LM771 or LM714.

2.9 Logarithmic Amplifier

75

Fig. 2.93 Logarithmic amplifier

Draw the schematic shown in Fig. 2.94 and run it. Simulation result is shown in Fig. 2.95. According to Fig. 2.95 the output voltage is around − 0.67 V.

Fig. 2.94 Sample logarithmic amplifier

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.95 The DC voltmeter shows − 0.67 V

Stop the simulation and double click on the diode D1. This opens the SWITCHING_DIODE window. Go to the Value tab and click the Edit model button (Fig. 2.96). After clicking the Edit model button, the window shown in Fig. 2.97 appears and shows the parameters of diode D1. Saturation current of the diode is current is equal to written in the first row. According( to Fig. ) 2.97, the saturation ( ) V1 10 = −0.0258 × ln is calcu0.1 pA. Value of Vout ≈ −VT × ln R×I −12 1000×0.1×10 S ) ( 10 lated in Fig. 2.98. According to Fig. 2.98, −0.0258×ln 1000×0.1×10−12 = −0.6535 V which is quite close to simulation result shown in Fig. 2.95.

2.9 Logarithmic Amplifier Fig. 2.96 SWITCHING_ DIODE window

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2 Inverting, Non-inverting and Logarithmic Amplifiers

Fig. 2.97 Edit Model window Fig. 2.98 MATLAB calculations

2.10 Exercises 1. Cascade connection of two non-inverting amplifiers are shown in Fig. 2.99. (a) Use hand calculation to calculate the voltage gain (b) Use Multisim to verify answer of part (a).

2.10 Exercises

79

Fig. 2.99 Cascade connection of two non-inverting amplifiers

2. Cascade connection of three inverting amplifiers are shown in Fig. 2.100. (a) Use hand calculation to calculate the voltage gain (b) Use Multisim to verify answer of part (a).

Fig. 2.100 Cascade connection of three inverting amplifiers

3. Change the diode of Fig. 2.95 to 1N4007 and study the effect of this change on circuit operation.

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References for Further Study 1. Sedra A., Smith K., Microelectronics Circuits, Oxford University Press, 2015. 2. Asadi F., Essential Circuit Analysis using NI Multisim™ and MATLAB®, Springer, 2022. DOI: https://doi.org/10.1007/978-3-030-89850-2 3. Asadi F., Essential Circuit Analysis Using Proteus®, Springer, 2022. DOI: https://doi.org/10. 1007/978-981-19-4353-9 4. Asadi F., Essential Circuit Analysis using LTspice®, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-09853-6 5. Asadi F., Electric and Electronic Circuit Simulation using TINA-TI®, River Publishers, 2022. DOI: https://doi.org/10.13052/rp-9788770226851 6. Asadi F., Electric Circuit Analysis with EasyEDA, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-00292-2 7. Asadi F., Power Electronics Circuit Analysis with PSIM®, De Gruyter, 2021. DOI: https://doi. org/10.1515/9783110740653 8. Asadi F., Simulation of Power Electronics Circuits with MATLAB®/Simulink®: Design, Analyze, and Prototype Power Electronics, Apress, 2022. DOI: https://doi.org/10.1007/978-14842-8220-5 9. Asadi F., Eguchi K., Electronic Measurement: A Practical Approach, Springer, 2021. DOI: https://doi.org/10.1007/978-3-031-02021-6 10. Asadi F., Eguchi K., Simulation of Power Electronics Converters Using PLECS®, Academic Press, 2019. DOI: https://doi.org/10.1016/C2018-0-02253-7

Chapter 3

Differential Amplifiers

Abstract An ideal differential amplifier is a circuit which amplifies the difference between two inputs, i.e., Vout = Ad (V1 − V2 ) where Ad is the differential-mode   gain 2 and V1 and V2 are inputs. In practice, however, Vout = Ad (V1 − V2 ) + Ac V1 +V 2 where Ac the common-mode gain of the amplifier. The common-mode rejection ratio (CMRR), usually defined as the ratio between differential-mode gain and commonmode gain, indicates the ability of the amplifier to accurately cancel voltages that are common to both inputs. In this chapter you will see how differential amplifiers can be implemented with Op Amps. You will learn how to measure the Ad , Ac and CMRR as well. Keywords Difference amplifier · Common mode gain · Differential mode gain · Instrumentation amplifier · Common mode rejection ratio (CMRR)

3.1 Introduction An ideal differential amplifier is a circuit which amplifies the difference between two inputs, i.e., Vout = Ad (V1 − V2 ) where Ad is the differential-mode  and V1  gain 2 and V2 are inputs. In practice, however, Vout = Ad (V1 − V2 ) + Ac V1 +V where 2 Ac the common-mode gain of the amplifier. When V1 = V2 = V is applied to an ideal differential amplifier, the output is 0 V while output of a practical amplifier is Vout = Ac V .

© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 F. Asadi, Applied Op Amp Circuits, https://doi.org/10.1007/978-981-99-3881-0_3

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The common-mode rejection ratio (CMRR), usually defined as the ratio between differential-mode gain and common-mode gain, indicates the ability of the amplifier to accurately cancel voltages that are common to both inputs. The common-mode rejection ratio is defined as 20 log AAdc . CMRR for an ideal differential amplifier is infinite since Ac = 0. In this chapter you will see how differential amplifiers can be implemented with Op Amps. You will learn how to measure the Ad , Ac and CMRR as well.

3.2 Difference Amplifier A difference amplifier is shown in Fig. 3.1. Output voltage for this circuit equals to Vout = RR21 (V2 − V1 ).

Fig. 3.1 Difference amplifier

Draw the schematic shown in Fig. 3.2. This schematic uses two DC_POWER blocks. The DC_POWER block can be found in the POWER_SOURCES section (Fig. 3.3). Settings of the V1 and V2 DC_POWER blocks used in Fig. 3.2 are shown in Figs. 3.4 and 3.5, respectively.

3.2 Difference Amplifier

Fig. 3.2 Sample difference amplifier

Fig. 3.3 DC_POWER block

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Fig. 3.4 Settings of V1

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3.2 Difference Amplifier

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Fig. 3.5 Settings of V2

Run the simulation. Simulation result are shown in Fig. 3.6. Simulation result is quite close to the expected value of Vout = RR21 (V2 − V1 ) = 10k − 3) = 2 V. 1k (2.8

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Fig. 3.6 Simulation result

3.3 Measurement of Common Mode Gain of Difference Amplifier In this section we want to measure the common mode gain of difference amplifier studied in the previous section. Change the circuit to what shown in Fig. 3.7. Peakto-peak value of input voltage source V1 is 20 mv.

Fig. 3.7 Measurement of common mode gain of difference Amplifier. Same input is applied to both inputs

3.3 Measurement of Common Mode Gain of Difference Amplifier

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Run the simulation. Simulation result is shown in Fig. 3.8. Click the AC button (Fig. 3.8) in order to get rid of DC offset of the Op Amp and measure the peak-to-peak value of output. According to Fig. 3.9, peak-to-peak of output voltage is 6.170 µV.

Fig. 3.8 Simulation result

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Fig. 3.9 Measurement of peak-to-peak value of output waveform V

p− p = The common mode gain is Vout, in, p− p   −4 = −70.215 dB. 20 log 3.085 × 10

Fig. 3.10 MATLAB commands

6.170 µ 20 m

= 3.085 × 10−4 (Fig. 3.10) or

3.4 Measurement of Differential Mode Gain of Difference Amplifier

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3.4 Measurement of Differential Mode Gain of Difference Amplifier In this section we want to measure the differential mode gain of the studied difference amplifier. Change the circuit to what shown in Fig. 3.11. Peak-to-peak of input voltage to the difference amplifier is 20 mV.

Fig. 3.11 Measurement of differential mode gain. V1 = − V2

Run the simulation. The simulation result is shown in Fig. 3.12. According to Fig. 3.12, peak-to-peak of output voltage is 399.507 mV. Let’s measure the peak-to-peak of input voltage. Add another oscilloscope block to the schematic (Fig. 3.13) and run the simulation. According to Fig. 3.14, peak-topeak of input voltage is 39.957 mV. Therefore, the differential mode gain is equal to 9.9984 (Fig. 3.15) or around 20 dB.

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Fig. 3.12 Measurement of peak-to-peak value of output waveform (waveform of XSC1 scope)

Fig. 3.13 Two oscilloscopes are added to the schematic

3.4 Measurement of Differential Mode Gain of Difference Amplifier

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Fig. 3.14 Simulation result (waveform of XSC2 scope) Fig. 3.15 MATLAB calculations

Now we can calculate the Common Mode Rejection  (CMRR) of the studied  Ratio . According to Fig. 3.16, difference amplifier. The CMRR is defined as 20 log AAdm cm CMRR is equals to 90.2135 dB.

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Fig. 3.16 MATLAB calculations

3.5 Nulling the Output DC Offset of Difference Amplifier The circuit shown in Fig. 3.17 can be used for decreasing the DC offset of output. Turn the potentiometer P1 until DC milli voltmeter shows a value around zero. After observing a DC output value around zero, you can open the DC milli voltmeter and apply the signal to the inputs. Note that in Multisim environment you cannot change the output DC offset by addition of a potentiometer connected to pin 1 and 5 of 741 Op Amp. In other words circuit shown in Fig. 3.17 doesn’t work in Multisim. The reason is that although pin 1 and 5 are shown on the Op Amp symbol, their duty is not defined in the model given to Multisim.

3.6 Instrumentation Amplifier

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Fig. 3.17 Circuit for nulling the DC offset of output

3.6 Instrumentation Amplifier An instrumentation amplifier in Fig. 3.18. Output voltage of this ampli is shown  fier equals to Vout = RR43 1 + RR21 (V2 − V1 ). Instrumentation amplifier is a more advanced difference amplifier. The input impedance of the instrumentation amplifier shown in Fig. 3.18 is higher than the difference amplifier shown in Fig. 3.1. From theoretical point of view, the current drawn from signal source V1 and V2 in Fig. 3.18 is 0 because they are connected to + and − input terminals of the Op Amps and from theoretical point of view, no current is drawn by input terminals of an ideal Op Amp. So, signal sources V1 and V2 in Fig. 3.18 see input impedance of infinity.

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Fig. 3.18 Instrumentation amplifier

Let’s simulate an instrumentation amplifier in Multisim. Draw the schematic shown in Fig. 3.19.

3.6 Instrumentation Amplifier

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Fig. 3.19 Sample instrumentation amplifier

Run the simulation. Simulation result is shown in Fig. 3.20.  Note  that simulation result is quite close to the expected value Vout = RR43 1 + RR21 (V2 − V1 ) =   4k 1 + 2k − 3) = −0.8 V. 3k 1k (2.8

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Fig. 3.20 The DC voltmeter measures − 0.798 V

3.7 Exercises 1. Measure the differential-mode gain, common mode gain and CMRR for instrumentation amplifier shown in Fig. 3.19.

References for Further Study 1. Sedra A., Smith K., Microelectronics Circuits, Oxford University Press, 2015. 2. Asadi F., Essential Circuit Analysis using NI Multisim™ and MATLAB®, Springer, 2022. DOI: https://doi.org/10.1007/978-3-030-89850-2 3. Asadi F., Essential Circuit Analysis Using Proteus®, Springer, 2022. DOI: https://doi.org/10. 1007/978-981-19-4353-9

References for Further Study

97

4. Asadi F., Essential Circuit Analysis using LTspice®, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-09853-6 5. Asadi F., Electric and Electronic Circuit Simulation using TINA-TI®, River Publishers, 2022. DOI: https://doi.org/10.13052/rp-9788770226851 6. Asadi F., Electric Circuit Analysis with EasyEDA, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-00292-2 7. Asadi F., Power Electronics Circuit Analysis with PSIM®, De Gruyter, 2021. DOI: https://doi. org/10.1515/9783110740653 8. Asadi F., Simulation of Power Electronics Circuits with MATLAB®/Simulink®: Design, Analyze, and Prototype Power Electronics, Apress, 2022. DOI: https://doi.org/10.1007/978-14842-8220-5 9. Asadi F., Eguchi K., Electronic Measurement: A Practical Approach, Springer, 2021. DOI: https://doi.org/10.1007/978-3-031-02021-6 10. Asadi F., Eguchi K., Simulation of Power Electronics Converters Using PLECS®, Academic Press, 2019. DOI: https://doi.org/10.1016/C2018-0-02253-7

Chapter 4

Frequency Response of Amplifiers

Abstract Frequency response of a system describes the steady-state response of a system to sinusoidal inputs of varying frequencies and lets the engineers analyze and design control systems in the frequency domain. In this chapter you will learn how to draw the frequency response of amplifiers implemented with Op Amps. You will learn how to measure the cut-off frequency as well. Keywords Frequency response · Frequency response of inverting amplifier · Frequency response of inverting amplifier

4.1 Introduction Frequency response of a system describes the steady-state response of a system to sinusoidal inputs of varying frequencies and lets the engineers analyze and design control systems in the frequency domain. In this chapter you will learn how to draw the frequency response of amplifier circuits implemented with Op Amps. You will learn how to measure the cut-off frequency based on the obtained graph as well.

© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 F. Asadi, Applied Op Amp Circuits, https://doi.org/10.1007/978-981-99-3881-0_4

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4.2 Frequency Response of Inverting Amplifier V

( j ω)

put Let’s draw the frequency response of inverting amplifier (i.e., out ) shown in V 1( jω) Fig. 4.1 for [1 Hz, 500 kHz] interval. Double click on the voltage source V1 and ensure that AC analysis magnitude and AC analysis phase boxes are filled with 1 and 0, respectively (Fig. 4.2).

Fig. 4.1 Sample inverting amplifier circuit

4.2 Frequency Response of Inverting Amplifier

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Fig. 4.2 AC_VOLTAGE window

Right click on the wire connected to the output of the amplifier (Fig. 4.3), then click the Properties (Fig. 4.4) and give the name “output” to it (Fig. 4.5). After clicking the OK button in Fig. 4.5 the schematic changes to what shown in Fig. 4.6. Note that entered name is shown on the schematic.

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Fig. 4.3 Right click on the wire between R2 and output of the Op Amp Fig. 4.4 Menu appeared after right clicking on the wire

4.2 Frequency Response of Inverting Amplifier

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Fig. 4.5 Name of the node is changed to output

Click on the Interactive button (Fig. 4.7). This opens the Analysis and Simulation window (Fig. 4.8).

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Fig. 4.6 Entered name is shown on the schematic Fig. 4.7 Interactive button

4 Frequency Response of Amplifiers

4.2 Frequency Response of Inverting Amplifier

Fig. 4.8 Analysis and Simulation window

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Select the AC Sweep (Fig. 4.9). We want to observe the frequency response of the system for [1 Hz, 500 kHz] interval. So, Start frequency (FSTART) and Stop frequency (FSTOP) needs to be filled with 1 and 500 k, respectively. Number of points per decade box determines the smoothness of the graph shown on the screen, bigger number means a smoother curve. However, entering a bigger number to this box cause the simulation to take more time to be done. The Vertical scale box determines the nature of vertical axis. Select the Decibel for Vertical scale box (Fig. 4.10).

Fig. 4.9 AC Sweep analysis

4.2 Frequency Response of Inverting Amplifier

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Fig. 4.10 AC Sweep analysis settings

Now click the Output tab and select the V(output). Then click the Add button (Fig. 4.11). After clicking the Add button, V(output) is added to the right list (Fig. 4.12). Addition of V(output) to the right list asks the Multisim to draw the Vout put ( j ω) . V 1( jω)

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Fig. 4.11 Determining the AC Sweep analysis output

4 Frequency Response of Amplifiers

4.2 Frequency Response of Inverting Amplifier

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Fig. 4.12 Output of analysis is determined by the right list (Selected variables for analysis)

Click the Run button in Fig. 4.12. This runs the simulation. Graph of shown in Fig. 4.13.

Vout put ( j ω) V 1( j ω)

is

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Fig. 4.13 Simulation result

Let’s measure the cut-off frequency of the amplifier. By cut-off frequency we mean a frequency which the gain decreases by 3 dB in comparison to its low frequency value. Click the Show cursors button (Fig. 4.14) to add two cursors to the graph.

Fig. 4.14 Show cursors button

4.2 Frequency Response of Inverting Amplifier

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You can read different points of the graph with the aid of cursors. According to Figs. 4.15 and 4.16 the low frequency gain is 19.9995 dB. According to Fig. 4.16, the value of gain decreases to 17.0440 dB at 88.0101 kHz. So, the cut-off frequency is around 88.0101 kHz.

Fig. 4.15 Measurement of cut-off frequency

Fig. 4.16 Cursor window

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4.3 Frequency Response of Non-inverting Amplifier Frequency response of non-inverting amplifier shown in Fig. 4.17 can be found with V put ( jω) the aid of method described before. Graph of out for this circuit is shown in V 1( jω) Fig. 4.18. Value of cut-off frequency for this circuit is 98.192 kHz according to Fig. 4.19.

Fig. 4.17 Sample non-inverting amplifier

4.3 Frequency Response of Non-inverting Amplifier

Fig. 4.18 Simulation result Fig. 4.19 Cursor window

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4.4 Frequency Response of Instrumentation Amplifier for Common Mode Input In this section we want to obtain the frequency response of instrumentation amplifier shown in Fig. 4.20.

Fig. 4.20 Sample instrumentation amplifier

4.4 Frequency Response of Instrumentation Amplifier for Common Mode …

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Let’s start with the common mode frequency response. Draw the schematic shown in Fig. 4.21. Settings of V1 is shown in Fig. 4.22.

Fig. 4.21 Drawing the common mode frequency response of studied instrumentation amplifier

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Fig. 4.22 AC_VOLTAGE window

Settings of AC sweep analysis is shown in Figs. 4.23 and 4.24.

4.4 Frequency Response of Instrumentation Amplifier for Common Mode …

Fig. 4.23 Settings of AC Sweep analysis

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Fig. 4.24 Determining the output variable for AC Sweep analysis

Click the Run button in Fig. 4.24. This generates the graph shown in Fig. 4.25. This is the frequency response form common mode signals.

4.5 Frequency Response of Instrumentation Amplifier for Differential …

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Fig. 4.25 Simulation result

4.5 Frequency Response of Instrumentation Amplifier for Differential Mode Input Frequency response of studied instrumentation amplifier can be found with the aid of the schematic shown in Fig. 4.26. In this schematic voltage controlled voltage source V2 is used to generate the negative version of the signal which is applied to Op Amp U2. In other words, the signals which is applied to U1 and U2 have the same amplitude but there exist 180° of phase difference between them. You can add a voltage controlled voltage source block to the schematic by clicking the Place Source button (Fig. 4.27) and selecting the CONTROLLED_VOLTAGE_SOURCE section (Fig. 4.28). Settings of voltage controlled voltage source block used in Fig. 4.26 is shown in Fig. 4.29.

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Fig. 4.26 Drawing the differential mode frequency response of studied instrumentation amplifier Fig. 4.27 Place Source button

4.5 Frequency Response of Instrumentation Amplifier for Differential …

Fig. 4.28 VOLTAGE_CONTROLLED_VOLTAGE_SOURCE block

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Fig. 4.29 Voltage controlled voltage source settings

Settings of voltage source V1 is shown in Fig. 4.30. Note that AC analysis magnitude is filled with 0.5. This cause the amplitude of differential mode signal applied to the amplifier to be 1 since 0.5 sin(ωt) − (−0.5 sin(ωt)) = sin(ωt).

4.5 Frequency Response of Instrumentation Amplifier for Differential …

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Fig. 4.30 AC analysis magnitude box is changed to 0.5

The AC sweep is run with the settings shown in Figs. 4.31 and 4.32. Simulation result is shown in Fig. 4.33.

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Fig. 4.31 AC Sweep analysis settings

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4.5 Frequency Response of Instrumentation Amplifier for Differential …

Fig. 4.32 Determining the output variable for AC Sweep analysis

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Fig. 4.33 Simulation result

Let’s measure the cut-off frequency. According to Fig. 4.34, the low frequency gain is 12.0406 dB. Gain decreased to 9.0152 dB at 235.7354 kHz. So, the cut-off frequency is around 235.7354 kHz.

4.5 Frequency Response of Instrumentation Amplifier for Differential …

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Fig. 4.34 Cursor window

Let’s rerun the sweep once more with the settings shown in Figs. 4.35 and 4.36. Note that this time linear is selected for vertical scale box. Output of this simulation is shown in Fig. 4.37. Note that vertical axis is not in dB. In Fig. 4.37, the low frequency gain is around 4. Gain of 4 is equals to 20 log(4) = 12.0412 in dB. Note that this number is quite close to the number shown in Fig. 4.34.

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Fig. 4.35 AC Sweep analysis settings

4 Frequency Response of Amplifiers

4.5 Frequency Response of Instrumentation Amplifier for Differential …

Fig. 4.36 Determining the output variable for AC Sweep analysis

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Fig. 4.37 Simulation result

The graph shown in Fig. 4.37 can be used to find the cut-off frequency as well. We need to find the frequency which its gain is √12 = 0.707 of low frequency gain. In this graph low frequency gain is 4. So, we need to find a frequency with gain of √1 × 4 = 2.8285. According to Figs. 4.38 and 4.39, the gain at 239.32 kHz is 2.8. 2 So, cut-off frequency is around 239.32 kHz.

4.5 Frequency Response of Instrumentation Amplifier for Differential …

Fig. 4.38 Measurement of cut-off frequency Fig. 4.39 Cursor window

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4.6 Exercises 1. This exercise shows that the gain bandwidth product for non-inverting amplifier is an almost constant value. (a) Draw the frequency response of the amplifier shown in Fig. 4.40.

Fig. 4.40 Circuit for Exercise 1

(b) Calculate the product of mid-band gain and cut-off frequency. Don’t use the dB, use normal gain. (c) Draw the frequency response of the amplifier shown in Fig. 4.41. (d) Calculate the product of mid-band gain and cut-off frequency. Don’t use the dB, use normal gain. (e) Compare part (b) and (d).

References for Further Study

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Fig. 4.41 Circuit for Exercise 1

2. Replace the 741 Op Amp of Exercise 1 with CA3140E and resolve it. Compare the obtained results with Exercise 1.

References for Further Study 1. Sedra A., Smith K., Microelectronics Circuits, Oxford University Press, 2015. 2. Asadi F., Essential Circuit Analysis using NI Multisim™ and MATLAB®, Springer, 2022. DOI: https://doi.org/10.1007/978-3-030-89850-2 3. Asadi F., Essential Circuit Analysis Using Proteus®, Springer, 2022. DOI: https://doi.org/10. 1007/978-981-19-4353-9 4. Asadi F., Essential Circuit Analysis using LTspice®, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-09853-6 5. Asadi F., Electric and Electronic Circuit Simulation using TINA-TI®, River Publishers, 2022. DOI: https://doi.org/10.13052/rp-9788770226851 6. Asadi F., Electric Circuit Analysis with EasyEDA, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-00292-2 7. Asadi F., Power Electronics Circuit Analysis with PSIM®, De Gruyter, 2021. DOI: https://doi. org/10.1515/9783110740653 8. Asadi F., Simulation of Power Electronics Circuits with MATLAB®/Simulink®: Design, Analyze, and Prototype Power Electronics, Apress, 2022. DOI: https://doi.org/10.1007/978-14842-8220-5 9. Asadi F., Eguchi K., Electronic Measurement: A Practical Approach, Springer, 2021. DOI: https://doi.org/10.1007/978-3-031-02021-6 10. Asadi F., Eguchi K., Simulation of Power Electronics Converters Using PLECS®, Academic Press, 2019. DOI: https://doi.org/10.1016/C2018-0-02253-7

Chapter 5

Input–Output Impedance of Amplifiers

Abstract The input impedance is the impedance seen by stimulating source. The output impedance is the impedance seen from the output when stimulating source is zero. This chapter shows how input and output impedances can be measured. Keywords Input impedance · Output impedance · Input impedance of inverting amplifier · Output impedance of inverting amplifier

5.1 Introduction In the previous chapter you learned how to draw the frequency response of different types of amplifiers. In this chapter you will learn how to draw the input or output impedance of an amplifier. The input impedance is the impedance seen by stimulating source. The output impedance is the impedance seen from the output when stimulating source is zero.

© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 F. Asadi, Applied Op Amp Circuits, https://doi.org/10.1007/978-981-99-3881-0_5

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5.2 Input Impedance of Inverting Amplifier In this section we want to draw the input impedance of the inverting amplifier shown in Fig. 5.1. Draw the schematic shown in Fig. 5.1.

Fig. 5.1 Sample inverting amplifier

Right click on the wire that connects the voltage source V1 to resistor R1 and click on the Properties (Fig. 5.2). Give the name “input” to this wire and click the OK button (Fig. 5.3). Now the schematic changes to what shown in Fig. 5.4. Fig. 5.2 Menu appeared after right clicking on the wire

5.2 Input Impedance of Inverting Amplifier

Fig. 5.3 Name of the node is changed to input

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Fig. 5.4 Entered name is appeared on the schematic

Click the Interactive button (Fig. 5.5). This opens the Analysis and Simulation window shown in Fig. 5.6. Fig. 5.5 Interactive button

5.2 Input Impedance of Inverting Amplifier

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Fig. 5.6 Analysis and Simulation window

Select the AC sweep and do the settings similar to what shown in Fig. 5.7. These settings draw the input impedance for [1 Hz, 500 kHz] interval. Note that Vertical scale is set to Linear.

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Fig. 5.7 Settings for AC Sweep analysis

Click the Add expression button (Fig. 5.8). This opens the window shown in Fig. 5.9.

5.2 Input Impedance of Inverting Amplifier

Fig. 5.8 Output tab of AC Sweep analysis

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Fig. 5.9 Analysis Expression window

Enter the V(input)/− I(V1) to the Expression box and click the OK button (Fig. 5.10). Now the V(input)/− I(V1) expression is added to the right list (Fig. 5.11). Note that − I(V1) shows the current that exit from the positive terminal of V1. Therefore, V(input)/− I(V1) asks the Multisim to draw the graph of impedance seen by voltage source V1.

5.2 Input Impedance of Inverting Amplifier

Fig. 5.10 V(input)/− I(V1) is entered to the Expression box

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Fig. 5.11 Entered expression is added to the right list

Click the Run button in Fig. 5.11. This draws the input impedance graph (Fig. 5.12). Note that Fig. 5.12 has two graphs: Magnitude graph and phase graph.

5.2 Input Impedance of Inverting Amplifier

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Fig. 5.12 Simulation result

You can add two cursors to the graph by clicking on the Show cursors button (Fig. 5.13). Click on the magnitude graph and then click on the Show cursors button. This adds two cursors to the magnitude graph. You can follow the same procedure to add cursors to the phase graph as well. Fig. 5.13 Show cursors button

Click on the magnitude graph, then click on the Show cursors button. This adds two cursors to the magnitude graph. Use the cursors to read the magnitude of input impedance at around 10 Hz and 265 kHz. According to Figs. 5.14 and 5.15, magnitude of input impedance around 10 Hz and 265 kHz are approximately 1 and 3.03 kΩ.

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5 Input–Output Impedance of Amplifiers

Fig. 5.14 Measurement of magnitude graph for 10 Hz and 265 kHz Fig. 5.15 Cursor window

5.2 Input Impedance of Inverting Amplifier

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Now click on the phase graph. Then click on the Show cursors button. This adds two cursors to the phase graph. Use the cursors to read the phase of input impedance at around 10 Hz and 265 kHz. According to Figs. 5.16 and 5.17, phase of input impedance around 10 Hz and 265 kHz are approximately 0.0058° and 56.31°.

Fig. 5.16 Measurement of phase graph for 10 Hz and 265 kHz

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Fig. 5.17 Cursor window

So, the input impedance around 10 Hz and 265 kHz is approximately ◦ ◦ 1000 e j×0.0058 = 1000 + 0.10 j ≈ 1000 Ω and 3300 e j×56.31 = 1830 + 2746 j Ω, respectively.

5.3 Output Impedance of Inverting Amplifier In this section we want to draw the graph of output impedance for inverting amplifier shown in Fig. 5.18.

Fig. 5.18 Sample inverting amplifier

5.3 Output Impedance of Inverting Amplifier

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Output impedance is defined as the impedance seen at the output while the input is zero. So, we need to change the circuit to what shown in Fig. 5.19 and draw the impedance seen by source V1.

Fig. 5.19 Measurement of output impedance

Right click on the wire which connects the positive terminal of the V1 to output of the Op Amp, select the Properties from the appeared menu and give the name output to it (Fig. 5.20).

Fig. 5.20 Name of the output node is changed to “output”

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Now click on the Interactive button (Fig. 5.21). This opens the Analysis and Simulation window (Fig. 5.22). Fig. 5.21 Interactive button

Fig. 5.22 Analysis and Simulation window

Select the AC sweep and do the settings similar to what shown in Fig. 5.23. These settings draw the output impedance for [1 Hz, 500 kHz] interval. Note that Vertical scale is set to Linear.

5.3 Output Impedance of Inverting Amplifier

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Fig. 5.23 Settings for AC Sweep analysis

Click the Add expression button (Fig. 5.24) and enter the V(output)/− I(V1) to the Expression box (Fig. 5.25). Then click the OK button in Fig. 5.25.

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Fig. 5.24 Output tab of AC Sweep analysis

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5.3 Output Impedance of Inverting Amplifier

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Fig. 5.25 V(input)/− I(V1) is entered to the Expression box

Now the V(output)/− I(V1) expression is added to the right list (Fig. 5.26). Note that − I(V1) shows the current that exit from the positive terminal of V1. Therefore, V(output)/− I(V1) asks the Multisim to draw the graph of impedance seen by voltage source V1.

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Fig. 5.26 Entered expression is added to the right list

Click the Run button in Fig. 5.26. This draws the output impedance (Fig. 5.27). You can use the cursors to read the graph. For instance, according to Figs. 5.28, ◦ 5.29 and 5.30, the output impedance at 989 Hz is 0.4161159 e j85.4643 = 0.033 + j0.415 j ≈ j0.415.

5.3 Output Impedance of Inverting Amplifier

Fig. 5.27 Simulation result

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Fig. 5.28 Measurement of output impedance for a sample frequency (989 Hz)

5.4 Exercises Fig. 5.29 Cursor window for magnitude graph

Fig. 5.30 Cursor window for phase graph

5.4 Exercises 1. Draw the input and output impedance for the circuit shown in Fig. 5.31.

157

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5 Input–Output Impedance of Amplifiers

Fig. 5.31 Circuit for Exercise 1

2. Draw the input and output impedance for the circuit shown in Fig. 5.32.

5.4 Exercises

Fig. 5.32 Circuit for Exercise 2

3. Draw the input and output impedance for the circuit shown in Fig. 5.33.

159

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5 Input–Output Impedance of Amplifiers

Fig. 5.33 Circuit for Exercise 3

References for Further Study 1. Sedra A., Smith K., Microelectronics Circuits, Oxford University Press, 2015. 2. Asadi F., Essential Circuit Analysis using NI Multisim™ and MATLAB®, Springer, 2022. DOI: https://doi.org/10.1007/978-3-030-89850-2 3. Asadi F., Essential Circuit Analysis Using Proteus®, Springer, 2022. DOI: https://doi.org/10. 1007/978-981-19-4353-9 4. Asadi F., Essential Circuit Analysis using LTspice®, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-09853-6 5. Asadi F., Electric and Electronic Circuit Simulation using TINA-TI®, River Publishers, 2022. DOI: https://doi.org/10.13052/rp-9788770226851 6. Asadi F., Electric Circuit Analysis with EasyEDA, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-00292-2 7. Asadi F., Power Electronics Circuit Analysis with PSIM®, De Gruyter, 2021. DOI: https://doi. org/10.1515/9783110740653 8. Asadi F., Simulation of Power Electronics Circuits with MATLAB®/Simulink®: Design, Analyze, and Prototype Power Electronics, Apress, 2022. DOI: https://doi.org/10.1007/978-14842-8220-5 9. Asadi F., Eguchi K., Electronic Measurement: A Practical Approach, Springer, 2021. DOI: https://doi.org/10.1007/978-3-031-02021-6 10. Asadi F., Eguchi K., Simulation of Power Electronics Converters Using PLECS®, Academic Press, 2019. DOI: https://doi.org/10.1016/C2018-0-02253-7

Chapter 6

Buffer

Abstract A buffer circuit prevents the signal source to be affected by the load. In this chapter you will learn how to simulate a buffer circuit, measure its slew rate and draw its frequency response. Keywords Buffer circuit · Frequency response of buffer circuit

6.1 Introduction A buffer circuit prevents the signal source to be affected by the load. In this chapter you will learn how to simulate a buffer circuit, how to measure the slew rate of the Op Amp and how to draw the frequency response of buffer circuits.

6.2 Buffer Circuit Buffer circuit (Fig. 6.1) is a current amplifier with voltage gain of around unity (i.e. Vout = Vin). Loading effect can be solved with the aid of buffer block. A buffer circuit can be considered as a non-inverting amplifier with R1 = 0 and R2 = ∞ (Fig. 6.2). Therefore, the voltage gain is A V = 1 + RR21 = 1 + 0 = 1.

© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 F. Asadi, Applied Op Amp Circuits, https://doi.org/10.1007/978-981-99-3881-0_6

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162

Fig. 6.1 Buffer circuit

Fig. 6.2 Non-inverting amplifier

6 Buffer

6.2 Buffer Circuit

163

Let’s study an example. Consider the simple circuit shown in Fig. 6.3. Voltage of 1k × 20 = 10 V. resistor R2 is 1k+1k

Fig. 6.3 Simple voltage divider

Now we connect a load with value of 1 kΩ in parallel to resistor R2 (Fig. 6.4). 1k×1k

1k+1k × 20 = Note that voltage is decreased to 1k×1k 1k+1k +1 words, the load resistor loaded the circuit.

0.5k 0.5k+1k

× 20 = 6.667 V. In other

Fig. 6.4 Voltage divider circuit is loaded

Change the circuit to what shown in Fig. 6.5. As you see the voltage of load resistor is 10 V in this case. In other words, the voltage divider section (Voltage source V2 and resistors R1 and R2) is not loaded in this circuit.

164

6 Buffer

Fig. 6.5 Buffer avoids loading effect

In the schematic shown in Fig. 6.6 the output load is changed to 100 Ω. However, the output voltage is not 10 V, it is 2.53 V. Note that output of the Op Amp can supply a limited current and buffering action continues until the current drawn from the output doesn’t go beyond that value. Keeping 10 V across a 100 Ω resistor requires 100 mA and the 741 cannot supply 100 mA. Because of that buffering is not observed for 100 Ω load.

Fig. 6.6 Buffering is not observed

6.3 Slew Rate of Op Amp

165

6.3 Slew Rate of Op Amp Output of an Op Amp cannot change quicker than a rate called Slew Rate (SR) of the Op Amp. Let’s study an example. Consider the schematic shown in Fig. 6.7. This schematic used a CLOCK_VOLTAGE block to produce the input pulse. You can add a CLOCK_VOLTAGE block to your schematic by clicking the Place Source button (Fig. 6.8) and selecting the SIGNAL_VOLTAGE_SOURCE section (Fig. 6.9). Settings of voltage source V1 is shown in Fig. 6.10.

Fig. 6.7 Buffer circuit stimulated with pulse input

166 Fig. 6.8 Place Source button

Fig. 6.9 CLOCK_VOLTAGE block

6 Buffer

6.3 Slew Rate of Op Amp

Fig. 6.10 Settings of CLOCK_VOLTAGE block

167

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6 Buffer

Run the simulation. Simulation result is shown in Fig. 6.11. Note that the input (voltage produced by voltage source V1) changes quickly however the Op Amp’s output cannot follow this quick change because of the finite slew rate.

Fig. 6.11 Output of simulation

Let’s measure the slew rate of the Op Amp. Use the cursors to measure the time used to go from low level to high level. According to Fig. 6.12, difference between low and high level is 4.941 V and time required to go from low level to high level is V (Fig. 6.13). around 12.5 µs. Therefore, the slew rate is 0.3953 µs

6.3 Slew Rate of Op Amp

169

Fig. 6.12 Measurement of time required to go from low to high Fig. 6.13 MATLAB calculation

Let’s measure the slew rate of the Op Amp for falling edge as well. According to Fig. 6.14, difference between high and low level is − 4.929 V and the time required to go from high level to low level is around 12.5 µs. Therefore, the falling slew rate V (Fig. 6.15). is −0.3943 µs

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6 Buffer

Fig. 6.14 Measurement of time required to go from high to low Fig. 6.15 MATLAB calculation

Let’s see the effect of slew rate on sinusoidal signals. Assume that Asin(ωt) is applied to the input of the Op Amp. So, the output must be Asin(ωt). Derivative of Asin(ωt) is Aωcos(ωt). Maximum of Aωcos(ωt) is Aω. So, the Aω must not exceed the slew rate of Op Amp otherwise it will be distorted. Let’s study some examples. Consider the circuit shown in Fig. 6.16. In this circuit A = 5 V and ω =

6.3 Slew Rate of Op Amp

171

V 2π × 10k = 6.283 × 104 Rad . Therefore, Aω = 0.314 × 106 Vs or Aω = 0.314 µs s V which is smaller than calculated slew rate (0.3953 µs ). Output waveform for Fig. 6.16 is shown in Fig. 6.17. According to Fig. 6.17, the output waveform has a sinusoidal nature.

Fig. 6.16 Buffer circuit with sinusoidal input (Vpeak = 5 V)

172

6 Buffer

Fig. 6.17 Simulation result

Now increase the amplitude of input voltage source to 10 V. In Fig. 6.18, A = 10 V . Therefore, Aω = 0.628 × 106 Vs or and ω = 2π × 10k = 6.283 × 104 Rad s V V Aω = 0.628 µs which is bigger than calculated slew rate (0.3953 µs ). Simulation result is shown in Fig. 6.19. Let’s turn off the Channel A to see the output waveform better (Fig. 6.20). According to Fig. 6.20, the output waveform is distorted and has a triangular nature. Therefore, when derivative of the signal exceeds the slew rate of the Op Amp, distortion happens.

6.3 Slew Rate of Op Amp

Fig. 6.18 Buffer circuit with sinusoidal input (Vpeak = 10 V)

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174

Fig. 6.19 Simulation result

6 Buffer

6.3 Slew Rate of Op Amp

Fig. 6.20 Output waveform

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6 Buffer

6.4 Frequency Response of Buffer Circuit In this section we want to draw the frequency response of a buffer circuit shown in Fig. 6.21. Double click on the voltage source V1 in Fig. 6.21 and ensure that AC analysis magnitude and AC analysis phase are filled with 1 and 0, respectively (Fig. 6.22). Output of the Op Amp (pin number 6) is called output. Remember that you can change the name of any node by right clicking on one of the wires that is connected to it and selecting the Properties from appeared menu. After clicking the Properties, a window appears and permits you to enter the desired name.

Fig. 6.21 Circuit to study the frequency response of the buffer

6.4 Frequency Response of Buffer Circuit

177

Fig. 6.22 Settings of voltage source V1

Click on the interactive button (Fig. 6.23) and select the AC sweep section. Then do the settings similar to Fig. 6.24. These settings draw the frequency response for [1 Hz, 10 MHz] interval.

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6 Buffer

Fig. 6.23 Interactive button

Fig. 6.24 Settings of AC Sweep analysis

Now go to the output tab and select the V(output) from left side and click the Add button to add it to the right list (Fig. 6.25).

6.4 Frequency Response of Buffer Circuit

179

Fig. 6.25 Output variable for AC Sweep analysis

Click the Run button in Fig. 6.25. This runs the simulation. Result is show in Fig. 6.26.

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6 Buffer

Fig. 6.26 Simulation result

Use the cursors to measure the cut-off frequency of the graph. The cut-off frequency is a frequency which the gain decreases by 3 dB in comparison to its low frequency value. According to Figs. 6.27 and 6.28, the low frequency gain is −316μ – 316 µdB (or 10 20 ≈ 1). At 963.9423 kHz the gain is around − 3.0319 dB −3.0319 (10 20 ≈ 0.7054). Therefore, the cut-off frequency is around 963.9423 kHz.

6.4 Frequency Response of Buffer Circuit

Fig. 6.27 Measurement of cut-off frequency

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Fig. 6.28 Cursor window

6.5 Exercises 1. In the circuit of Fig. 6.6 Op Amp was not able to provide the required current for the load. The circuit shown in Fig. 6.29 suggests a solution to increase the current capability of the Op Amp. Simulate the circuit and ensure that it can provide 100 mA for 100 Ω load resistor.

Fig. 6.29 Circuit for Exercise 1

2. Measure the slew rate for CA 3140E and compare it with 741 Op Amp. 3. Replace the 741 Op Amp of Fig. 6.21 with CA 3140E and compare the obtained frequency response with the one shown in Fig. 6.26.

References for Further Study

183

References for Further Study 1. Sedra A., Smith K., Microelectronics Circuits, Oxford University Press, 2015. 2. Asadi F., Essential Circuit Analysis using NI Multisim™ and MATLAB®, Springer, 2022. DOI: https://doi.org/10.1007/978-3-030-89850-2 3. Asadi F., Essential Circuit Analysis Using Proteus®, Springer, 2022. DOI: https://doi.org/10. 1007/978-981-19-4353-9 4. Asadi F., Essential Circuit Analysis using LTspice®, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-09853-6 5. Asadi F., Electric and Electronic Circuit Simulation using TINA-TI®, River Publishers, 2022. DOI: https://doi.org/10.13052/rp-9788770226851 6. Asadi F., Electric Circuit Analysis with EasyEDA, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-00292-2 7. Asadi F., Power Electronics Circuit Analysis with PSIM®, De Gruyter, 2021. DOI: https://doi. org/10.1515/9783110740653 8. Asadi F., Simulation of Power Electronics Circuits with MATLAB®/Simulink®: Design, Analyze, and Prototype Power Electronics, Apress, 2022. DOI: https://doi.org/10.1007/978-14842-8220-5 9. Asadi F., Eguchi K., Electronic Measurement: A Practical Approach, Springer, 2021. DOI: https://doi.org/10.1007/978-3-031-02021-6 10. Asadi F., Eguchi K., Simulation of Power Electronics Converters Using PLECS®, Academic Press, 2019. DOI: https://doi.org/10.1016/C2018-0-02253-7

Chapter 7

Op Amp Based Comparators

Abstract The Op Amp comparator compares one analogue voltage level with another analogue voltage level and produces an output signal based on this voltage comparison. In this chapter you will learn about different types of comparator circuits and how to extract their characteristics. Keywords Comparator · Window comparator · Schmitt trigger

7.1 Introduction The Op Amp comparator compares one analogue voltage level with another analogue voltage level and produces an output signal based on this voltage comparison. In other words, the Op Amp voltage comparator compares the magnitudes of two voltage inputs and determines which is the largest of the two. In this chapter you will learn about different types of comparator circuits and how to extract their characteristics using Multisim.

7.2 Simple Comparator with Op Amp The circuit shown in Fig. 7.1 is a simple comparator circuit. There is no feedback loop in this circuit, i.e., the Op Amp is used in open loop mode. In the schematic shown in Fig. 7.1, V2 is a CLOCK_VOLTAGE block (Fig. 7.2) with settings shown in Fig. 7.3.

© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 F. Asadi, Applied Op Amp Circuits, https://doi.org/10.1007/978-981-99-3881-0_7

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Fig. 7.1 Simple comparator circuit

Fig. 7.2 CLOCK_VOLTAGE block

The circuit works as follows: The voltage applied to the positive terminal of the Op Amp (V2) is compared with the voltage applied to the negative terminal of the

7.2 Simple Comparator with Op Amp

187

Fig. 7.3 Settings of CLOCK_VOLTAGE block

Op Amp (1 V). When V2 is bigger than 1 V, output of the Op Amp is around 12 V. When V2 is less than 1 V, output of the Op Amp is around 0 V. Run the simulation. Simulation result is shown in Fig. 7.4.

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7 Op Amp Based Comparators

Fig. 7.4 Simulation result

Output of an Op Amp cannot change quicker than a rate called Slew Rate (SR) of the Op Amp. Let’s use the cursors to measure the slew rate of the 741 Op Amp used V according to Figs. 7.5 in Fig. 7.1. Slew rate of the Op Amp is around 0.33498 µs and 7.6.

7.2 Simple Comparator with Op Amp

189

Fig. 7.5 Measurement of time required to go from low (882.096 mV) to high (11.033 V) Fig. 7.6 MATLAB calculation

You can measure the slew rate with the falling edge of the waveform as well. Slew V according to Figs. 7.7 and 7.8. rate of the Op Amp is around −0.34794 µs

190

Fig. 7.7 Measurement of time required to go from high to low Fig. 7.8 MATLAB calculation

7 Op Amp Based Comparators

7.4 Conversion of Sine Wave to Square Wave

191

7.3 Simple Comparator with LM 311 Comparator In the previous section we used an Op Amp to make a simple comparator. Op Amp’s are not ideal for comparison purposes since comparison cause the output stage transistors to enter saturation. Saturation of output transistors makes the Op Amps slow comparators. Instead of using general purpose Op Amps for comparison purposes, you can use the IC’s that are designed for comparison purposes. Theses IC’s have a high slew rate. One example is LM 311. Circuit shown in Fig. 7.9 works similar to Fig. 7.1: When V2 > 1 V output is around 5 V and when V2 < 1 V output is around 0. However, the output of circuit shown in Fig. 7.9 has a higher slew rate in comparison to Fig. 7.1. This means that transitions from low to high or high to low are done in a shorter amount of time.

Fig. 7.9 Simple comparator circuit with LM311N

7.4 Conversion of Sine Wave to Square Wave The circuit shown in Fig. 7.10 compares a sine wave with zero level. When sine wave is positive, the output is around + 5 V. When the sine wave is negative the output is around 0 V (Fig. 7.11). Note that the IC is supplied with symmetric voltages.

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7 Op Amp Based Comparators

Fig. 7.10 Comparison with zero permits you to convert a sinusoidal signal into a square wave

Fig. 7.11 Simulation result

7.5 Window Comparator

193

7.5 Window Comparator Window comparators are used to determine whether an unknown input voltage is between two reference voltages (Uref_top and Uref_bot in Fig. 7.12). Window comparators are used to detect over-voltage or under-voltage conditions. Fig. 7.12 Block diagram of a window comparator

The circuit shown in Fig. 7.13 compares an input voltage with two levels determined by V1 and V3. When input voltage is bigger than V1 and smaller than V3, output of AND gate is high. The zener diode and AND gate can be added to the schematic with the aid of Place Diode and Place TTL buttons shown in Fig. 7.14. Location of zener diode, logic gate and variable voltage source blocks are shown in Figs. 7.15, 7.16 and 7.17, respectively. Break down voltage of 1N4733A is around 5.1 V.

Fig. 7.13 Window comparator circuit

194 Fig. 7.14 Place Diode and Place TTL buttons

Fig. 7.15 Selection of 1N4733A zener diode

7 Op Amp Based Comparators

7.5 Window Comparator

Fig. 7.16 Selection of 7408N AND gate

195

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7 Op Amp Based Comparators

Fig. 7.17 Selection of variable voltage source

Let’s study three different scenarios: In Fig. 7.18 the input voltage is 0 V. 0 V is not bigger than 1 V therefore output of comparator U1 is low (around zero volts). 0 V is less than 3 V therefore output of comparator U2 is high. This cause the zener diode D1 to enter the break-down mode. So, a voltage around 5 V will reach the upper input of AND gate. The lower input of the AND gate receives low signal. Therefore, output of AND gate will be low.

7.5 Window Comparator

197

Fig. 7.18 Output is low (0 V) for V2 = 0 V

In Fig. 7.19 the input voltage is 2.4 V. 2.4 V is bigger than 1 V therefore output of comparator U1 is high (around 12 V). 2.4 V is less than 3 V therefore output of comparator U2 is high. This cause the zener diodes D1 and D2 to enter the breakdown mode. So, a voltage around 5 V will reach the upper and lower input of the AND gate. Therefore, output of AND gate will be high.

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7 Op Amp Based Comparators

Fig. 7.19 Output is high (5 V) for V2 = 2.4 V

In Fig. 7.20 the input voltage is 10 V. 10 V is bigger than 1 V therefore output of comparator U1 is high (around 12). This cause the zener diode D2 to enter the break-down mode. So, a voltage around 5 V will reach the lower input of the AND gate. 10 V is not less than 3 V therefore output of comparator U2 is low. The lower input of the AND gate receives low signal. Therefore, output of AND gate will be low.

7.6 Schmitt Trigger

199

Fig. 7.20 Output is low (0 V) for V2 = 10 V

7.6 Schmitt Trigger A Schmitt trigger is a comparator with hysteresis. A simple Schmitt trigger circuit and its transfer function are shown in Figs. 7.21 and 7.22, respectively. In Fig. 7.22, R1 M shows the trigger M shows the saturation voltage of the Op Amp and T = R2 points. Note that Schmitt trigger circuit shown in Fig. 7.21 used positive feedback. Fig. 7.21 Schmitt trigger circuit

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7 Op Amp Based Comparators

Fig. 7.22 Input–output characteristic of Fig. 7.21 (M = saturation voltage of Op R1 Amp and T = R2 .M)

Consider the schematic shown in Fig. 7.23. V1 is a TRIANGULAR_VOLTAGE block (Fig. 7.24) with settings shown in Fig. 7.25. Settings shown in Fig. 7.25 generates the waveform shown in Fig. 7.26.

Fig. 7.23 Sample Schmitt trigger circuit

7.6 Schmitt Trigger

Fig. 7.24 TRIANGULAR_VOLTAGE block

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202

Fig. 7.25 Settings of TRIANGULAR_VOLTAGE block

Fig. 7.26 Waveform generated by settings shown in Fig. 7.25

7 Op Amp Based Comparators

7.6 Schmitt Trigger

203

Let’s take a closer look to the parameters of TRIANGULAR_VOLTAGE block shown in Fig. 7.25: The Voltage amplitude box in Fig. 7.25 determines the voltage difference between point B and A in Fig. 7.27. The Period box in Fig. 7.25 determines the time difference between point A and C in Fig. 7.27. The Fall time box in Fig. 7.25 determines the time difference between point B and C in Fig. 7.27. The Voltage offset box in Fig. 7.25 determines the voltage of point A (or C) in Fig. 7.27. Fig. 7.27 Typical triangular waveform

Let’s obtain the transfer function of given circuit and measure the upper and lower trigger points. Click the Interactive button (Fig. 7.28). Then, select the Transient section and do the settings similar to Figs. 7.29 and 7.30. Fig. 7.28 Interactive button

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7 Op Amp Based Comparators

Fig. 7.29 Transient analysis settings

Click the Run button in Fig. 7.30. After clicking the Run button, the graph shown in Fig. 7.31 appears on the screen.

7.6 Schmitt Trigger

Fig. 7.30 Output of Transient analysis

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Fig. 7.31 Simulation result

Put the cursors at the edges of the output waveform (Fig. 7.32).

Fig. 7.32 Cursors are placed at edges of output waveform

7.6 Schmitt Trigger

207

Turn off the output signal in order to see the input waveform clearly (Fig. 7.33). According to Fig. 7.34, change happens at around − 3.0288 V and + 2.9521 V. We can draw the transfer function shown in Fig. 7.35 for the given circuit. Let’s compare our measurement with theoretical values. Saturation voltage of the Op Amp is 11.11 V, R1 = 1 kΩ and R2 = 4 kΩ. Therefore, trigger level is − RR21 × Vsat = − 41 × 11.11 = −2.78 V and RR21 × Vsat = 41 × 11.11 = +2.78 V.

Fig. 7.33 Input waveform

Fig. 7.34 Cursor window

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Fig. 7.35 Input–output characteristic for circuit shown in Fig. 7.23 (M = 11.11 V and T = 2.78 V)

7.7 Exercises 1. Use Multisim to draw the input–output characteristics for circuit shown in Fig. 7.36.

Fig. 7.36 Circuit for Exercise 1

2. Obtain an expression for lower and upper trigger points of Schmitt trigger circuit shown in Fig. 7.37. D1 and D2 are two similar zener diodes.

References for Further Study

209

Fig. 7.37 Circuit for Exercise 2

References for Further Study 1. Sedra A., Smith K., Microelectronics Circuits, Oxford University Press, 2015. 2. Asadi F., Essential Circuit Analysis using NI Multisim™ and MATLAB®, Springer, 2022. DOI: https://doi.org/10.1007/978-3-030-89850-2 3. Asadi F., Essential Circuit Analysis Using Proteus®, Springer, 2022. DOI: https://doi.org/10. 1007/978-981-19-4353-9 4. Asadi F., Essential Circuit Analysis using LTspice®, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-09853-6 5. Asadi F., Electric and Electronic Circuit Simulation using TINA-TI®, River Publishers, 2022. DOI: https://doi.org/10.13052/rp-9788770226851 6. Asadi F., Electric Circuit Analysis with EasyEDA, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-00292-2 7. Asadi F., Power Electronics Circuit Analysis with PSIM®, De Gruyter, 2021. DOI: https://doi. org/10.1515/9783110740653 8. Asadi F., Simulation of Power Electronics Circuits with MATLAB®/Simulink®: Design, Analyze, and Prototype Power Electronics, Apress, 2022. DOI: https://doi.org/10.1007/978-14842-8220-5 9. Asadi F., Eguchi K., Electronic Measurement: A Practical Approach, Springer, 2021. DOI: https://doi.org/10.1007/978-3-031-02021-6 10. Asadi F., Eguchi K., Simulation of Power Electronics Converters Using PLECS®, Academic Press, 2019. DOI: https://doi.org/10.1016/C2018-0-02253-7

Chapter 8

Op Amp Based Filters

Abstract A filter is a circuit capable of passing (or amplifying) certain frequencies while attenuating other frequencies. Thus, a filter can extract important frequencies from signals that also contain undesirable or irrelevant frequencies. In this chapter you will learn how to implement different types of filters with Op Amps. Keywords High pass filter · Low pass filter · Cascade connection of filters · Sallen-Key active filter

8.1 Introduction A filter is a circuit capable of passing (or amplifying) certain frequencies while attenuating other frequencies. Thus, a filter can extract important frequencies from signals that also contain undesirable or irrelevant frequencies. In this chapter you will learn how to implement different types of filters with Op Amps. In this chapter we will use the frequency response graphs to study the behavior of filters.

8.2 High Pass Filter A first order (high pass ) filter is shown in Fig. 8.1. Transfer function ( of this ) circuit RCs . Pass band gain of this circuit is 1 + RR21 . Cut-off is H (s) = 1 + RR21 RCs+1 frequency of this filter is f c =

1 2π RC

Hz or ωc =

1 Rad . RC s

© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 F. Asadi, Applied Op Amp Circuits, https://doi.org/10.1007/978-981-99-3881-0_8

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8 Op Amp Based Filters

Fig. 8.1 High pass filter

Let’s study an example. Consider the schematic shown in Fig. 8.2. We want to draw the frequency response of this circuit.

8.2 High Pass Filter

213

Fig. 8.2 Sample high pass filter

Click on the Interactive button (Fig. 8.3) and set up an AC sweep analysis (Figs. 8.4 and 8.5). Fig. 8.3 Interactive button

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Fig. 8.4 Settings of AC Sweep analysis

Click the Run button in Fig. 8.5. Simulation result is shown in Fig. 8.6.

8.2 High Pass Filter

Fig. 8.5 Output of AC Sweep analysis

215

216

Fig. 8.6 Simulation result

8 Op Amp Based Filters

8.2 High Pass Filter

217

Let’s use the cursors to measure the cut-off frequency. According to Figs. 8.7 and 8.8, pass band gain and cut-off frequency are 9.0003 dB and 522.0395 Hz, 9.0003 respectively. 9.0003 dB is equal to the gain of 10 20 = 2.8185. These values are R1 15 1 quite close to the 1+ R2 = 1+ 8.2 = 2.83 and f c = 2π1RC = 2π ×5k×62n = 513.40 Hz.

Fig. 8.7 Measurement of cut-off frequency

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8 Op Amp Based Filters

Fig. 8.8 Cursor window

8.3 Low Pass Filter A first order(low pass ) filter is shown in Fig. 8.9. Transfer function ( of this ) circuit R1 R1 1 is H (s) = 1 + R2 RCs+1 . Pass band gain of this circuit is 1 + R2 . Cut-off frequency of this filter is f c =

1 2π RC

Hz or ωc =

1 Rad . RC s

Fig. 8.9 Low pass filter

Let’s study an example. Consider the schematic shown in Fig. 8.10. We want to draw the frequency response of this circuit.

8.3 Low Pass Filter

219

Fig. 8.10 Sample low pass filter

Draw the frequency response of the circuit using the settings shown in Figs. 8.11 and 8.12. Simulation result is shown in Fig. 8.13. You can use the cursors to read the graph. According to Fig. 8.14 the pass band gain and cut-off frequency are around 9.0329 dB and 514.4270 Hz, respectively. 9.0329 dB is equal to the gain of 9.0329 15 = 2.83 and 10 20 = 2.83. These values are quite close to the 1 + RR21 = 1 + 8.2 1 1 f c = 2π RC = 2π×5k×62n = 513.40 Hz.

220

Fig. 8.11 Settings of AC Sweep analysis

8 Op Amp Based Filters

8.3 Low Pass Filter

Fig. 8.12 Output of AC Sweep analysis

221

222

Fig. 8.13 Simulation result Fig. 8.14 Cursor window

8 Op Amp Based Filters

8.3 Low Pass Filter

223

Let’s measure the slope of the transition band of the graph. According to Figs. 8.15 and 8.16 one cursor is placed in 996.3344 Hz and the other one is placed at 10 kHz. 10k = 1.0016 decade. Value of So, the difference between the two cursor is log 996.3344 frequency response at 996.3344 Hz and 10 kHz are 2.2501 dB and − 16.7727 dB, dB = −19 decade . respectively. So, the slope is −16.7727−2.2501 1.0016

Fig. 8.15 Measurement of transition band slope

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Fig. 8.16 Cursor window

8.4 Cascade Connection of Filters You can cascade some filters together in order to obtain better filters. For instance, cascading two filters together make the transition band steeper, therefore the behavior of the filter is closer to ideal case. Let’s cascade two low pass filters together and compare its behavior with a single stage filter. Draw the schematic shown in Fig. 8.17.

Fig. 8.17 Cascaded connection of two low pass filter

8.4 Cascade Connection of Filters

225

Run an AC sweep with settings shown in Figs. 8.18 and 8.19. Obtained frequency response graph is shown in Fig. 8.20.

Fig. 8.18 Settings of AC Sweep analysis

226

Fig. 8.19 Output variable for AC Sweep analysis

8 Op Amp Based Filters

8.4 Cascade Connection of Filters

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Fig. 8.20 Simulation result

Let’s use cursors to read the graph. According to Figs. 8.21 and 8.22 pass band gain and cut-off frequency are around 18.0543 dB and 331.0825 Hz, respectively. 18.0543 18.0543 equals to the gain of 10 20 = 8. From theoretical point of view gain of 8 is expected since pass band gain comes from two stages and each stage has gain of 15 = 2.83. Note that 2.83 × 2.83 = 8. Note that cut-off frequency 1 + RR21 = 1 + 8.2 decreased and it is not the same as with the single stage case.

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Fig. 8.21 Measurement of cut-off frequency Fig. 8.22 Cursor window

Let’s measure the slope of the transition band of the graph. According to Figs. 8.23 and 8.24 one cursor is placed in 996.3344 Hz and the other one is placed at 10 kHz.

8.4 Cascade Connection of Filters

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10k So, the difference between the two cursor is log 996.3344 = 1.0016 decade. Value of frequency response at 996.3344 Hz and 10 kHz are 4.5003 dB and − 33.5453 dB, dB = −37.99 decade . So, the slope of tranrespectively. So, the slope is −33.5453−4.5003 1.0016 sition band is around two times bigger than the slope of transition band for single stage filter.

Fig. 8.23 Measurement of transition band slope

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Fig. 8.24 Cursor window

Let’s use the MATLAB to check the obtained results. The code shown in Fig. 8.25 draws the frequency response of the cascaded filter shown in Fig. 8.17. Output of this code is shown in Fig. 8.26. Note that the horizontal frequency is in Rad/s. Fig. 8.25 MATLAB code

8.4 Cascade Connection of Filters

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Fig. 8.26 Output of code in Fig. 8.25

You can change the unit of horizontal axis into Hz as well. Simply right click on the graph and click the Properties (Fig. 8.27). This opens the window shown in Fig. 8.28.

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Fig. 8.27 Menu appeared after right clicking on the graph

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8.4 Cascade Connection of Filters

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Fig. 8.28 Property Editor: Bode Diagram window

Open the Units tab and change the Frequency to Hz (Fig. 8.29). After clicking the Close button in Fig. 8.29, unit of the horizontal axis will change into Hz.

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Fig. 8.29 Units tab of Property Editor: Bode Diagram window

Let’s continue with Rad/s horizontal axis. You can click on any point of the graph in order to read its coordinates. For instance, according to Fig. 8.30 the low frequency gain is around 18.1 dB.

8.4 Cascade Connection of Filters

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Fig. 8.30 Measurement of low frequency gain

The cut-off frequency is around 2.04 × 103 (Fig. 8.31).

Rad s

or

2.04×103 2π

= 324.67 Hz

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Fig. 8.31 Measurement of cut-off frequency

Let’s measure the slope of curve in the transition band. Let’s measure the coordinate of two points of transition band. According to Fig. 8.32 one cursor is placed in 8.42 krad/s and the other one is placed at 48.3 krad/s. So, the difference between 48.3k = 0.7586 decade. Value of frequency response at in the two cursor is log 8.42k 8.42 and 48.3 krad/s are 0.208 dB and − 29 dB, respectively. So, the slope is dB −29−0.208 = −38.50 decade . 0.7586

8.5 Step Response of Filter Circuits

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Fig. 8.32 Measurement of transition band slope

8.5 Step Response of Filter Circuits In this section we want to study the step response of previous example. Change the schematic to what shown in Fig. 8.33. Voltage source V1 is a CLOCK_VOLTAGE block (Fig. 8.34) and its settings are shown in Fig. 8.35.

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Fig. 8.33 Step response of the cascaded filter

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8.5 Step Response of Filter Circuits

Fig. 8.34 CLOCK_VOLTAGE block

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Fig. 8.35 Settings of CLOCK_VOLTAGE block

Run the simulation. Simulation result is shown in Fig. 8.36.

8.5 Step Response of Filter Circuits

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Fig. 8.36 Simulation result

Click the Pause button (Fig. 8.37) to pause the simulation. Fig. 8.37 Pause button

Now change the oscilloscope settings to what shown in Fig. 8.38. Use the buttons shown with arrow in Fig. 8.38 to move the waveform until you see the jump point. Settling time of the system is 2.027 ms according to Fig. 8.39.

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Fig. 8.38 Simulation result

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8.5 Step Response of Filter Circuits

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Fig. 8.39 Measurement of settling time

You can use MATLAB to check the obtained result. The MATLAB code shown in Fig. 8.40 draws the step response of the system. Output of the code in Fig. 8.40 is shown in Fig. 8.41. Compare this result with Multisim result. Fig. 8.40 MATLAB code

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Fig. 8.41 Output of code in Fig. 8.40

8.6 Sallen-Key Active Filter Different types of Sallen-Key active filters can be designed with the aid of http://sim. okawa-denshi.jp/en/OPseikiLowkeisan.htm.

8.7 Exercises 1. (a) Draw the frequency response of the Sallen-Key low pass filter shown in Fig. 8.42. (b) Measure the pass band gain of the filter. (c) Measure the cut-off frequency of the filter. (d) Measure the slope of the curve at transition band.

8.7 Exercises

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Fig. 8.42 Circuit for Exercise 1

2. A bandpass filter is shown in Fig. 8.43. (a) Use hand calculations to calculate the transfer function of the system. (b) Use MATLAB to draw the frequency response of the transfer function obtained in part (a) (c) Use Multisim to draw the frequency response of the given filter and compare it with result of part (b).

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Fig. 8.43 Circuit for Exercise 2

References 1. Sedra A., Smith K., Microelectronics Circuits, Oxford University Press, 2015. 2. Asadi F., Essential Circuit Analysis using NI Multisim™ and MATLAB®, Springer, 2022. DOI: https://doi.org/10.1007/978-3-030-89850-2 3. Asadi F., Essential Circuit Analysis Using Proteus®, Springer, 2022. DOI: https://doi.org/10. 1007/978-981-19-4353-9 4. Asadi F., Essential Circuit Analysis using LTspice®, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-09853-6 5. Asadi F., Electric and Electronic Circuit Simulation using TINA-TI®, River Publishers, 2022. DOI: https://doi.org/10.13052/rp-9788770226851 6. Asadi F., Electric Circuit Analysis with EasyEDA, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-00292-2 7. Asadi F., Power Electronics Circuit Analysis with PSIM®, De Gruyter, 2021. DOI: https://doi. org/10.1515/9783110740653 8. Asadi F., Simulation of Power Electronics Circuits with MATLAB®/Simulink®: Design, Analyze, and Prototype Power Electronics, Apress, 2022. DOI: https://doi.org/10.1007/978-14842-8220-5 9. Asadi F., Eguchi K., Electronic Measurement: A Practical Approach, Springer, 2021. DOI: https://doi.org/10.1007/978-3-031-02021-6 10. Asadi F., Eguchi K., Simulation of Power Electronics Converters Using PLECS®, Academic Press, 2019. DOI: https://doi.org/10.1016/C2018-0-02253-7

Chapter 9

Op Amp Based Oscillators

Abstract An oscillator is a circuit which produces a continuous, repeated, alternating waveform. In this chapter you will see how different types of periodic waveforms can be generated with Op Amps. You will learn how to measure the Total Harmonic Distortion (THD) and harmonic content of generated output waveform as well. Keywords Wien-bridge oscillator · RC phase shift oscillator · Square wave generators · Triangular wave generator · Fourier analysis · Half wave precision rectifier · Full wave precision rectifier

9.1 Introduction An oscillator is a circuit which produces a continuous, repeated, alternating waveform without any input. In this chapter you will see how different types of periodic waveforms can be generated with Op Amps. You will learn how to measure the Total Harmonic Distortion (THD) harmonic content of generated output waveform as well. THD is defined as the ratio of the sum of the powers of all harmonic components to the power of the fundamental frequency. In sinusoidal oscillators smaller THD is more desirable since it means less harmonic content.

9.2 Wien-Bridge Oscillator Schematic of a Wien-bridge oscillator is shown in Fig. 9.1. This circuit produces sinusoidal waveforms. Frequency of output waveform equals to f = 2π1RC . The Op Amp based Wien-bridge oscillator (with a suitable Op Amp) can be used to generate frequencies up to 1 MHz. RR21 must be a little bit bigger than 2 otherwise no oscillation is generated at the output.

© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 F. Asadi, Applied Op Amp Circuits, https://doi.org/10.1007/978-981-99-3881-0_9

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Fig. 9.1 Wien bridge oscillator

Let’s study an example. Draw the schematic shown in Fig. 9.2. Note that RR21 = 1 2.2k = 2.2 > 2. We expect an output frequency around f = 2π1RC = 2π ×10k×3n = 1k 5.3 kHz.

9.2 Wien-Bridge Oscillator

Fig. 9.2 Sample Wien bridge oscillator

Run the simulation. Simulation result is shown in Fig. 9.3.

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Fig. 9.3 Simulation result

Let’s measure the frequency of output waveform. According to Fig. 9.4, period 1 = of the output waveform is 200.758 µs. Therefore its frequency is f = 200.758μs 4.981 kHz. Obtained value is close to the value predicted by theory.

9.3 Frequency Counter Block

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Fig. 9.4 Measurement of output frequency

9.3 Frequency Counter Block In the previous section we used the cursors to measure the frequency of the signal. You can measure the frequency of a signal with the aid of Frequency counter block (Fig. 9.5). Add a frequency counter block to the schematic (Fig. 9.6). If you can’t see the frequency counter block, right click on the Multisim’s toolbar and check the Instruments.

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Fig. 9.6 Addition of frequency counter block to the schematic

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9.4 Fourier Analysis

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Run the simulation and double click on the Frequency counter block. Now you can read the frequency of the signal easily (Fig. 9.7). If you can’t see the value of frequency, decrease the value of Sensitivity (RMS) box (Fig. 9.7). Fig. 9.7 Frequency counter window

9.4 Fourier Analysis In this section we want to measure the harmonic content of the output waveform. Draw the schematic shown in Fig. 9.8.

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Fig. 9.8 Sample Wien bridge oscillator

Click on the Interactive button (Fig. 9.9). Select the Fourier analysis and do the settings similar to what shown in Fig. 9.10. These settings tell the Multisim to measure the magnitude and phase of first 9 harmonics. Frequency resolution (fundamental frequency) box in Fig. 9.10 tells the frequency of the waveform to Multisim. Remember that output frequency is around 5 kHz (Fig. 9.7). Fig. 9.9 Interactive button

9.4 Fourier Analysis

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Fig. 9.10 Settings of Fourier analysis

Click the Edit transient analysis button in Fig. 9.10. This opens the Transient Analysis window for you. Select the Calculate DC operating point for Initial condition drop down list (Fig. 9.11) and click the OK button.

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Fig. 9.11 Transient analysis window

Go to the Output tab and select the V(output) from left list. Then click the Add button to transfer it from the left list to the right list (Fig. 9.12).

9.4 Fourier Analysis

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Fig. 9.12 Determining the output variable for Fourier analysis

Click the Run button in Fig. 9.12. Output of the simulation is shown in Fig. 9.13. THD is 8.12544% according to Fig. 9.14. Magnitude (amplitude or peak value) of the fundamental harmonic is 12.3027 V. DC component (Fig. 9.14) shows the average T value [i.e. T1 0 f (t)dt, where T shows the period of the signal f (t + T ) = f (t)] of the signal.

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Fig. 9.13 Simulation result

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9.5 RC Phase Shift Oscillator

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Fig. 9.14 THD and magnitude/phase of harmonics for output voltage

9.5 RC Phase Shift Oscillator Frequency of RC phase shift oscillator shown in Fig. 9.15 equals to f = Feedback resistor must be at least 29 times bigger than resistor R.

√1 . 2π 6RC

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Fig. 9.15 RC phase shift oscillator

Let’s study an example. Consider the schematic shown in Fig. 9.16. Output 1 = 5.415 kHz. frequency is around f = 2π √16RC = 2π √6×12k×1n

Fig. 9.16 Sample RC phase shift oscillator

Run the simulation. Simulation result is shown in Fig. 9.17. One full cycle of 1 = 5.33 kHz. This output waveform took 187.5 µs. Therefore the frequency is 187.5μ value is quite close to the value predicted by theory. You can run a Fourier analysis

9.5 RC Phase Shift Oscillator

261

and measure the THD and magnitude of the harmonics of the output waveform. According to Fig. 9.18, the THD is 12.5653%.

Fig. 9.17 Simulation result

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Fig. 9.18 THD and magnitude/phase of harmonics for output voltage

9.6 Square Wave Generators A square wave generator with Op Amp is shown in Fig. 9.19. Output frequency is 1  for this circuit. VU T = R1 +Vsat and VL T = R1 −Vsat . Note that f = Vsat −VL T R1 +R2 R1 +R2 2R f Cln

Vsat −VU T

Vsat shows the saturation voltage of the Op Amp.

9.6 Square Wave Generators

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Fig. 9.19 Square wave generator

Let’s study an example. Consider the schematic shown in Fig. 9.20. Simulation 1 = 50.7692 Hz result is shown in Fig. 9.21. Frequency of output equals to 19.697m according to Fig. 9.22.

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Fig. 9.20 Sample square wave generator

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9.6 Square Wave Generators

Fig. 9.21 Simulation result

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Fig. 9.22 Measurement of frequency

Let’s compare the measured frequency with the value predicted by theory. Figure 9.23 shows that the value predicted by theory (50.9237 Hz) is quite close to measured (50.7692 Hz) value. Fig. 9.23 MATLAB calculations

9.7 Triangular Wave Generator

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9.7 Triangular Wave Generator The circuit shown in Fig. 9.24 can be used to generate triangular waveform. Frequency and peak-to-peak of output waveform are f = 4R1RR32 C1 and V p− p = 2R2 V , respectively. R3 sat

Fig. 9.24 Triangular waveform generator

Let’s study an example. Consider the schematic shown in Fig. 9.25. Simulation result is shown in Fig. 9.26.

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Fig. 9.25 Sample triangular waveform generator

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9.7 Triangular Wave Generator

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Fig. 9.26 Simulation result

Turn off Channel A in order to see the output wave solely (Fig. 9.27). Frequency 1 = 62.12 Hz (Fig. 9.27). of this waveform is 16.098m

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Fig. 9.27 Measurement of frequency

Peak-to-peak of output voltage is 8.861 V according to Fig. 9.28.

9.7 Triangular Wave Generator

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Fig. 9.28 Measurement of peak-to-peak voltage

Let’s compare the measured frequency with the value predicted by theory. Figure 9.29 shows that the values predicted by theory (62.5 Hz and 4.44 Vp) are quite close to the measured values (62.12 Hz and 8.861/2 = 4.43 Vp).

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Fig. 9.29 MATLAB calculations

9.8 Exercises 1. Schematic shown in Fig. 9.30 shows a Wien-bridge oscillator with a limiter used for amplitude control. (a) Measure the output frequency (b) Measure the peak-to-peak of output voltage (c) Measure the THD and amplitude of harmonics up to 5th harmonic

References for Further Study

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Fig. 9.30 Wien-bridge oscillator with a limiter used for amplitude control

References for Further Study 1. Sedra A., Smith K., Microelectronics Circuits, Oxford University Press, 2015. 2. Asadi F., Essential Circuit Analysis using NI Multisim™ and MATLAB®, Springer, 2022. DOI: https://doi.org/10.1007/978-3-030-89850-2 3. Asadi F., Essential Circuit Analysis Using Proteus®, Springer, 2022. DOI: https://doi.org/10. 1007/978-981-19-4353-9 4. Asadi F., Essential Circuit Analysis using LTspice®, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-09853-6 5. Asadi F., Electric and Electronic Circuit Simulation using TINA-TI®, River Publishers, 2022. DOI: https://doi.org/10.13052/rp-9788770226851 6. Asadi F., Electric Circuit Analysis with EasyEDA, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-00292-2 7. Asadi F., Power Electronics Circuit Analysis with PSIM®, De Gruyter, 2021. DOI: https://doi. org/10.1515/9783110740653 8. Asadi F., Simulation of Power Electronics Circuits with MATLAB®/Simulink®: Design, Analyze, and Prototype Power Electronics, Apress, 2022. DOI: https://doi.org/10.1007/978-14842-8220-5 9. Asadi F., Eguchi K., Electronic Measurement: A Practical Approach, Springer, 2021. DOI: https://doi.org/https://doi.org/10.1007/978-3-031-02021-6 10. Asadi F., Eguchi K., Simulation of Power Electronics Converters Using PLECS®, Academic Press, 2019. DOI: https://doi.org/10.1016/C2018-0-02253-7

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11. https://www.electronicshub.org/rc-oscillator/ 12. https://www.eeeguide.com/square-wave-generator-using-op-amp/ 13. https://www.eeeguide.com/triangular-wave-generator-using-op-amp/

Chapter 10

Precision Rectifier and Peak Detector

Abstract This chapter studies the different types of precision rectifier and peak detectors. The precision rectifier is a configuration obtained with an operational amplifier in order to have a circuit behave like an ideal rectifier. It is very useful for high-precision signal processing. Peak detector circuits are used to determine the maximum or minimum peak value of an input signal. Keywords Precision rectifier · Half wave precision rectifier · Full wave precision rectifier · Peak detector

10.1 Introduction The precision rectifier is a configuration obtained with an operational amplifier in order to have a circuit behave like an ideal diode, i.e., a diode with zero voltage drop, and rectifier. It is very useful for high-precision signal processing. In this chapter you will study different types of precision rectifier and peak detectors. Peak detector circuits are used to determine the maximum or minimum peak value of an input signal.

© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 F. Asadi, Applied Op Amp Circuits, https://doi.org/10.1007/978-981-99-3881-0_10

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10.2 Half Wave Precision Rectifier Consider the simple half wave rectifier circuit shown in Fig. 10.1. Input voltage is a sinusoidal voltage with peak value of 1 V and frequency of 1 kHz. Simulation result is shown in Fig. 10.2.

Fig. 10.1 Normal half wave rectifier

10.2 Half Wave Precision Rectifier

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Fig. 10.2 Simulation result

Let’s measure the peak of output voltage. According to Fig. 10.3 peak of output voltage is 422.697 mV. So, drop voltage of the diode is 1 − 0.422697 = 0.5773 V. We can deduce that this rectifier cannot be used if peak value of input voltage is less than 0.5773 V.

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Fig. 10.3 Measurement of peak of output voltage

The precision rectifier is a configuration obtained with an operational amplifier in order to have a circuit behave like an ideal diode and rectifier. It is very useful for high-precision signal processing. With the help of a precision rectifier the highprecision signal processing can be done very easily. A half wave precision rectifier is shown in Fig. 10.4. The input voltage source in Fig. 10.4 has a peak value of 300 mV. Output of this circuit is shown in Fig. 10.5. Note that the output waveform has almost the same peak value as the input (in Fig. 10.3 we had voltage drop of 0.5773 V). Circuit shown in Fig. 10.4 passed the positive half cycles of the input voltage with gain of 1.

10.2 Half Wave Precision Rectifier

Fig. 10.4 Precision half wave rectifier

Fig. 10.5 Simulation result

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Let’s turn off the Channel A in order to see the output waveform easily (Fig. 10.6). According to Fig. 10.7, the output voltage has peak of 299.993 mV which is quite close to the input voltage peak value.

Fig. 10.6 Output waveform

10.2 Half Wave Precision Rectifier

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Fig. 10.7 Measurement of peak of output voltage

Let’s change the direction of the diode (Fig. 10.8) and see what happens. Figure 10.9 shows the simulation result for Fig. 10.8. Note that this time negative peaks are selected (negative half cycles are passed with gain of 1). Output voltage has peak value of 299.036 mV which is quite close to the input voltage peak value.

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Fig. 10.8 Another form of precision half wave rectifier

Fig. 10.9 Simulation result

10.3 Improved Half Wave Precision Rectifier

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10.3 Improved Half Wave Precision Rectifier Figure 10.10 shows an improved half wave precision rectifier circuit. This circuit provides a gain equal to RR21 as well.

Fig. 10.10 Improved half wave precision rectifier circuit

Let’s study an example. Draw the schematic shown in Fig. 10.11. Simulation result is shown in Fig. 10.12. Circuit shown in Fig. 10.11 passed the negative half = −2. cycles of the input voltage with gain of − RR23 = − 20k 10k

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Fig. 10.11 Sample of improved half wave precision rectifier

Fig. 10.12 Simulation result

10.3 Improved Half Wave Precision Rectifier

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Let’s turn off the Channel A and see the output waveform clearly (Fig. 10.13). Output waveform has peak value of 603.425 mV according to Fig. 10.14. Peak of output waveform is around two times bigger than the peak of input waveform.

Fig. 10.13 Output waveform

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Fig. 10.14 Measurement of peak value of output voltage

Let’s change the direction of diodes (Fig. 10.15) and see what happens. Simulation results is shown in Fig. 10.16. This time the positive half cycles of the input voltage = −2. are passed with gain of − RR23 = − 20k 10k

10.3 Improved Half Wave Precision Rectifier

Fig. 10.15 Another form of improved half wave precision rectifier

Fig. 10.16 Simulation result

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Let’s turn off the Channel 1 and observe the output waveform (Fig. 10.17). According to Fig. 10.18, peak value of output waveform is around − 593.898 mV which is around two times bigger than peak of the input voltage.

Fig. 10.17 Output waveform

10.4 Transfer Characteristics of Improved Half Wave Rectifier

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Fig. 10.18 Measurement of peak value of output voltage

10.4 Transfer Characteristics of Improved Half Wave Rectifier In this section we want to obtain the transfer characteristics of studied improved half wave rectifier reshown in Fig. 10.19. By transfer characteristics we mean a graph of Voutput versus V1.

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Fig. 10.19 Sample of improved half wave precision rectifier

Click on the Interactive button (Fig. 10.20). Fig. 10.20 Interactive button

Select the DC sweep and do the settings similar to what shown in Figs. 10.21 and 10.22. Settings shown in Fig. 10.21 asks the Multisim to consider the voltage source V1 in Fig. 10.19 as a DC source and change its value from − 12 V toward + 12 V with steps of 0.1 V. Settings shown in Fig. 10.22 asks the Multisim to draw the graph of V(output) versus V1.

10.4 Transfer Characteristics of Improved Half Wave Rectifier

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Fig. 10.21 Settings of DC Sweep analysis

Click the Run button in Fig. 10.22. Simulation result is shown in Fig. 10.23. This graph shows that positive inputs are not transferred to the output since output is zero for positive inputs.

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Fig. 10.22 Determining the output variable for DC Sweep analysis

10.4 Transfer Characteristics of Improved Half Wave Rectifier

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Fig. 10.23 Simulation result

According to Figs. 10.24 and 10.25, slope of the curve for negative inputs is − 2.

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Fig. 10.24 Measurement of slope Fig. 10.25 Cursor window

According to Figs. 10.26 and 10.27 the linear region of graph is [− 5.2684 V, 0 V]. When input voltage is bigger than − 5.2687 V and less than 0 V, Vout = − 2 × V1. The Op Amp enters saturation for V1 < − 5.2684 and output is almost constant with value of 10.42 V.

10.4 Transfer Characteristics of Improved Half Wave Rectifier

Fig. 10.26 Cursors are put in the saturation region Fig. 10.27 Cursor window

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10.5 Full Wave Precision Rectifier A full wave precision rectifier circuit is shown in Fig. 10.28. In this circuit V out = |V 1|.

Fig. 10.28 Full wave precision rectifier circuit

You can change the direction of diodes (Fig. 10.29) and obtain a circuit with V out = −|V 1|.

Fig. 10.29 Another form of full wave precision rectifier circuit

10.5 Full Wave Precision Rectifier

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Let’s study an example. Consider the circuit shown in Fig. 10.30. Simulation result is shown in Fig. 10.31.

Fig. 10.30 Sample of full wave precision rectifier circuit

Fig. 10.31 Simulation result

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Let’s turn off Channel A and observe the output (Fig. 10.32). The output has peak value of 302.341 mV according to Fig. 10.33. Note that peak value of output is almost equal to the peak value of input.

Fig. 10.32 Output waveform

10.5 Full Wave Precision Rectifier

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Fig. 10.33 Measurement of peak value of output

Let’s change the direction of diodes (Fig. 10.34). Output of this circuit is shown in Fig. 10.35.

Fig. 10.34 Direction of diodes are reversed

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Fig. 10.35 Simulation result

Let’s turn off the input channel and observe the output waveform (Fig. 10.36). According to Fig. 10.37 peak value of output voltage is − 297.734 mV which is almost equal to peak value of input voltage.

10.5 Full Wave Precision Rectifier

Fig. 10.36 Output waveform

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Fig. 10.37 Measurement of peak value of output voltage

10.6 Peak Detector Peak detector circuits are used to detect the peak value of a signal. A positive peak detector circuit is shown in Fig. 10.38. In this circuit the capacitor is charged up to the maximum positive value of the input signal V1 and the capacitor keeps that voltage until the input signal V1 reaches a value higher than the current stored one. A negative peak detector circuit is shown in Fig. 10.39. In this circuit the capacitor is charged up to the minimum negative value of the input signal V1 and the capacitor keeps that voltage until the input signal V1 reaches a value lower than the current stored one.

10.6 Peak Detector

Fig. 10.38 Positive peak detector circuit

Fig. 10.39 Negative peak detector circuit

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Let’s study an example. Consider the circuit shown in Fig. 10.40. The voltage source V1 is an AM_VOLTAGE block. You can add an AM_VOLTAGE block to your schematic by clicking the Place Source button (Fig. 10.41) and selecting the SIGNAL_VOLTAGE_SOURCE section (Fig. 10.42). Settings of AM voltage source V1 is shown in Fig. 10.43.

Fig. 10.40 Sample of positive peak detector circuit

Fig. 10.41 Place Source button

10.6 Peak Detector

Fig. 10.42 AM_VOLTAGE block

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Fig. 10.43 Settings of AM_VOLTAGE block

Run the simulation. Output of simulation is shown in Fig. 10.44. According to Fig. 10.45, the capacitor is charged up to 1.932 V and stays there. Maximum value of the input signal is 1.983 V. Therefore, the obtained value is 51 mV smaller than the correct value.

10.6 Peak Detector

Fig. 10.44 Simulation result

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Fig. 10.45 Measurement of output voltage

Note that the studied circuit cannot detect the negative peaks. For instance, consider the circuit shown in Fig. 10.46. In this circuit the voltage applied to the positive terminal of the Op Amp is negative all the times. Simulation result is shown in Fig. 10.47. Output voltage is zero all the times.

10.6 Peak Detector

Fig. 10.46 Voltage applied to the positive terminal of the Op Amp is negative all the time

Fig. 10.47 Simulation result (output is zero)

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If you add a resistor in parallel to the capacitor (Fig. 10.48), the output waveform changes to what shown in Fig. 10.49.

Fig. 10.48 Addition of a resistor in parallel with capacitor C1

10.6 Peak Detector

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Fig. 10.49 Simulation result

Let’s turn off the Channel A and see the output waveform (Fig. 10.50). When a finite resistor exists in parallel to the capacitor, the capacitor discharge becomes faster and the circuit detects positive peaks which are smaller than the biggest positive peak as well.

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Fig. 10.50 Waveform of output

10.7 Exercises 1. Use Multisim to draw the input–output characteristics of full wave rectifier shown in Fig. 10.30.

References for Further Study 1. Sedra A., Smith K., Microelectronics Circuits, Oxford University Press, 2015. 2. Asadi F., Essential Circuit Analysis using NI Multisim™ and MATLAB® , Springer, 2022. DOI: https://doi.org/10.1007/978-3-030-89850-2 3. Asadi F., Essential Circuit Analysis Using Proteus® , Springer, 2022. DOI: https://doi.org/10. 1007/978-981-19-4353-9 4. Asadi F., Essential Circuit Analysis using LTspice® , Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-09853-6 5. Asadi F., Electric and Electronic Circuit Simulation using TINA-TI® , River Publishers, 2022. DOI: https://doi.org/10.13052/rp-9788770226851

References for Further Study

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6. Asadi F., Electric Circuit Analysis with EasyEDA, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-00292-2 7. Asadi F., Power Electronics Circuit Analysis with PSIM® , De Gruyter, 2021. DOI: https://doi. org/10.1515/9783110740653 8. Asadi F., Simulation of Power Electronics Circuits with MATLAB® /Simulink® : Design, Analyze, and Prototype Power Electronics, Apress, 2022. DOI: https://doi.org/10.1007/978-14842-8220-5 9. Asadi F., Eguchi K., Electronic Measurement: A Practical Approach, Springer, 2021. DOI: https://doi.org/10.1007/978-3-031-02021-6 10. Asadi F., Eguchi K., Simulation of Power Electronics Converters Using PLECS® , Academic Press, 2019. DOI: https://doi.org/10.1016/C2018-0-02253-7

Chapter 11

Voltage Regulators

Abstract A voltage regulator is a system designed to automatically maintain a constant voltage despite of disturbances like input voltage changes or output load changes. This chapter studies the series and parallel voltage regulators. You will learn how to measure the output voltage ripple and how to draw the transfer characteristic for a given regulator. Keywords Series voltage regulator · Shunt regulator · Output voltage ripple

11.1 Introduction In this chapter we will study the Op Amp based voltage regulator circuits. A voltage regulator is a system designed to automatically maintain a constant voltage despite of disturbances like input voltage changes or output load changes. You will learn how to simulate a series or parallel voltage regulator circuit, how to measure the output voltage ripple and how to draw the transfer characteristic for a given regulator.

11.2 Series Voltage Regulator In series voltage regulators the transistor is placed in series with the load. Figure 11.1 shows a sample series regulator. Input voltage of this circuit is 20 + 3sin(2π × 50t). Resistor R1 and diode D2 makes the reference voltage for positive terminal of the 3 × Vload . Op Amp. Resistor R2 and R3 makes the feedback network. V f b = R3R+R 2 V f b and Vload shows the feedback voltage (i.e. voltage reached the negative terminal of the Op Amp) and load voltage respectively. The Op Amp force the transistor to 3 × Vload . V p is the voltage make such an output voltage which satisfy V p = R3R+R 2 applied to the positive terminal of the Op Amp. In this example positive terminal of the Op Amp is connected to the zener diode D2. 1N4733A is 5.1 V zener diode. 3 × Vload or Vload = 6.8 V. Therefore, 5.1 = 3+1

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Fig. 11.1 Sample of series voltage regulator

Run the simulation. Simulation result is shown in Fig. 11.2. Turn off the Channel A to observe the output waveform easily (Fig. 11.3). Output waveform is a clear DC voltage despite of input voltage ripples. Use the cursors to measure the value of output. According to Fig. 11.4, output voltage value is 6.757 V which is quite close to the value predicted by theory.

11.2 Series Voltage Regulator

Fig. 11.2 Simulation result

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Fig. 11.3 Output waveform

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11.3 Measurement of Average Power and Efficiency

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Fig. 11.4 Measurement of output voltage

11.3 Measurement of Average Power and Efficiency In this section we want to measure the efficiency of the circuit. Put the Wattmeter block (Fig. 11.5) to on the input sources, transistor and output load (Fig. 11.6). Wattmeter block permits you to measure the average power dissipated in the circuit elements. Fig. 11.5 Wattmeter block

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Fig. 11.6 Connect a Wattmeter block onto the components that you want to measure their power

If you can’t see the Wattmeter block, right click on an empty point of the toolbar (Fig. 11.7) and check the Place probe (Fig. 11.8).

Fig. 11.7 Toolbar of Multisim

11.3 Measurement of Average Power and Efficiency

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Fig. 11.8 Check the Place probe to see the Wattmeter block

Run the simulation. Simulation result is shown in Fig. 11.9. According to Fig. 11.10, power drawn from V1 and V2 are 5.76 mW and 13.7 W, respectively. So the total power drawn from the source is –13.7 + − 0.00576 − 13.7 W (Negative sign shows that the element supply power). According to Fig. 11.11, power dissipated in the transistor and output load is 8.88 W and 4.57 W, respectively (Positive sign shows that the element absorbs power). Therefore the efficiency is 4.57 × 100 = 33.36%. 13.7

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Fig. 11.9 Simulation result Fig. 11.10 Power dissipated by V1 and V2 sources

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Fig. 11.11 Power dissipated by transistor Q1 and resistor RLoad

11.3.1 Shunt Regulator In shunt regulator the transistor is connected in parallel to the load. Figure 11.12 shows a sample shunt regulator. Input voltage of this circuit is 20 + 3sin(2π × 50t). Resistor R1 and diode D2 makes the reference voltage for negative terminal of the 4 × Vload . Op Amp. Resistor R3 and R4 makes the feedback network. V f b = R4R+R 3 V f b and Vload shows the feedback voltage (i.e. voltage reached the positive terminal of the Op Amp) and load voltage respectively. The Op Amp force the transistor to 4 × Vload . VN is the voltage make such an output voltage which satisfy VN = R4R+R 3 applied to the negative terminal of the Op Amp. In this example negative terminal of the Op Amp is connected to the zener diode D2. BZX79-A5V1 is 5.1 V zener diode. 10 × Vload or Vload = 7.65 V. Therefore, 5.1 = 10+5

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Fig. 11.12 Sample of shunt regulator

Run the simulation. Simulation result is shown in Fig. 11.13. Note that output voltage is constant despite of input voltage ripples.

11.3 Measurement of Average Power and Efficiency

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Fig. 11.13 Simulation result

Let’s turn off the Channel A to see the output waveform solely (Fig. 11.14). Output voltage is 7.705 V according to Fig. 11.14. Measured value is quite close to the value predicted by theory.

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Fig. 11.14 Measurement of output voltage

11.4 Measurement of Output Ripple In this section we want to measure the output voltage ripple of studied shunt regulator. After running the simulation, click the AC button of Channel B (Fig. 11.15). Clicking the AC button removes the DC component of the waveform and permits you to observe the ripple only. According to Fig. 11.15, the peak-to-peak of output voltage ripple is 70.975 mV.

11.5 Transfer Characteristics of the Regulator

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Fig. 11.15 Measurement of peak-to-peak of output voltage ripple

11.5 Transfer Characteristics of the Regulator In this section we want to use the DC sweep analysis to obtain the input–output characteristic of studied shunt regulator (Fig. 11.16).

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Fig. 11.16 Shunt regulator studied in Sect. 11.4

Setup a DC sweep with settings shown in Figs. 11.17 and 11.18. These settings ask the Multisim to sweep the voltage source V2 from 0 V up to 20 V with 0.5 V steps and draws the graph of voltage of output node versus input voltage source V2.

11.5 Transfer Characteristics of the Regulator

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Fig. 11.17 Settings of DC Sweep analysis

Click the Run button in Fig. 11.18. Transfer characteristics of the circuit is shown in Fig. 11.19.

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Fig. 11.18 Determining the output variable for DC Sweep analysis

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Fig. 11.19 Simulation result

Let’s use the cursors to read important points of the graph. According to Figs. 11.20 and 11.21, the circuit output voltage is almost constant for input voltages bigger than 17.1564 V. According to Fig. 11.21, the output voltage changes from 7.6515 to 7.6976 V when 17.1564 < V2 < 19.4945.

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Fig. 11.20 Cursors are used to read important points of the graph Fig. 11.21 Cursor window

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Use the Zoom in area button (Fig. 11.22) to zoom into the constant portion (i.e., [17.1564 V, 20 V] interval) of the graph (Fig. 11.23). Fig. 11.22 Zoom in area button

Fig. 11.23 Close up of saturation region of the graph

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Put the cursors to measure the slope of the line. According to Figs. 11.24 and 11.25, slope of the line is 3.3926 m. This means that increase of input voltage by 1 V cause an increase of 3.3926 mV in the output voltage.

Fig. 11.24 Measurement of slope of the line

References for Further Study

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Fig. 11.25 Cursor window

11.6 Exercises 1. Measure the peak-to-peak of output voltage ripple for sample series regulator studied in this chapter. 2. Measure the efficiency of sample shunt regulator studied in this chapter.

References for Further Study 1. Sedra A., Smith K., Microelectronics Circuits, Oxford University Press, 2015. 2. Asadi F., Essential Circuit Analysis using NI Multisim™ and MATLAB® , Springer, 2022. DOI: https://doi.org/10.1007/978-3-030-89850-2 3. Asadi F., Essential Circuit Analysis Using Proteus® , Springer, 2022. DOI: https://doi.org/10. 1007/978-981-19-4353-9 4. Asadi F., Essential Circuit Analysis using LTspice® , Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-09853-6 5. Asadi F., Electric and Electronic Circuit Simulation using TINA-TI® , River Publishers, 2022. DOI: https://doi.org/10.13052/rp-9788770226851 6. Asadi F., Electric Circuit Analysis with EasyEDA, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-00292-2 7. Asadi F., Power Electronics Circuit Analysis with PSIM® , De Gruyter, 2021. DOI: https://doi. org/10.1515/9783110740653 8. Asadi F., Simulation of Power Electronics Circuits with MATLAB® /Simulink® : Design, Analyze, and Prototype Power Electronics, Apress, 2022. DOI: https://doi.org/10.1007/978-14842-8220-5 9. Asadi F., Eguchi K., Electronic Measurement: A Practical Approach, Springer, 2021. DOI: https://doi.org/10.1007/978-3-031-02021-6 10. Asadi F., Eguchi K., Simulation of Power Electronics Converters Using PLECS® , Academic Press, 2019. DOI: https://doi.org/10.1016/C2018-0-02253-7 11. https://circuitdigest.com/electronic-circuits/half-wave-and-full-wave-precision-rectifier-cir cuit-using-op-amp

Chapter 12

Circuit Design with Circuit Wizard

Abstract Multisim™ has a powerful tool that permits you to design different types of circuits quickly and easily. In this chapter you will learn how to use this tool to design what you want. Keywords 555 timer wizard · Filter wizard · Op Amp wizard · CE BJT amplifier wizard

12.1 Introduction Multisim™ has a powerful tool that permits you to design different types of circuits quickly and easily. In this chapter you will learn how to use this tool to design what you want.

12.2 555 Timer Wizard You can use the Tools > Circuit wizard > 555 timer wizard (Fig. 12.1) to design astable and monostabe circuits based on the 555 timer IC. After clicking the 555 timer wizard, the window shown in Fig. 12.2 appears.

© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 F. Asadi, Applied Op Amp Circuits, https://doi.org/10.1007/978-981-99-3881-0_12

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Fig. 12.1 Tools > Circuit wizards > 555 timer wizard

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12.2 555 Timer Wizard

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Fig. 12.2 555 Timer Wizard

Assume that we want to generate a square wave similar to what shown in Fig. 12.3 with A = 12 V, T = 1 ms and f = T1 = 1 kHz. Duty cycle is defined as the ratio of duration of High portion of the pulse to the period. For instance, in Fig. 12.3, duration of High portion is T/2. Ratio of High portion to the period is T/2/T = 0.5 or 50%.

Fig. 12.3 Typical square waveform

Select the Astable operation for Type box and enter the values shown in Fig. 12.4 (Vs = 12, Frequency = 1 k and Duty = 50). Note that the wizard gives a warning to you. Change the value of C to satisfy the requested condition (Fig. 12.5).

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Fig. 12.4 Astable operation is selected

Fig. 12.5 Value of capacitor C is decreased to 1 nF

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12.2 555 Timer Wizard

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Click the Build circuit button in Fig. 12.5 in order to add the designed circuit to the schematic (Fig. 12.6).

Fig. 12.6 Designed circuit

Let’s see whether the circuit works as expected. Add an oscilloscope to the circuit output (Fig. 12.7) and run the simulation. Result is shown in Fig. 12.8. According 1 = 987.1668 Hz to Fig. 12.8 frequency of the generated waveform is around 1.013m which is quite close to 1kHz. You can measure the duty ratio and amplitude with the aid of cursors and ensure that they are quite close the wanted values.

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Fig. 12.7 An oscilloscope is connected to the output of the circuit

12.3 Filter Wizard

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Fig. 12.8 Simulation result

12.3 Filter Wizard You can use the Tools > Circuit wizard > Filter wizard to design different types of filters (i.e., low pass, high pass, band pass and band reject). After clicking the Tools > Circuit wizard > Filter wizard, the window shown in Fig. 12.9 appears on the screen.

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Fig. 12.9 Filter wizard window

Use the Type drop down list to select the desired type of filter (Fig. 12.10). The Filter load box in Fig. 12.10 determines the output load of the filter (Load resistor shown in Fig. 12.11). The Topology section determines whether the filter is realized with active (Op Amp) or passive (R, L and C) components. The picture shown in Fig. 12.10 clearly defines the pass band gain, pass frequency, stop frequency, ….

12.3 Filter Wizard

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Fig. 12.10 Different parts of Filter wizard Fig. 12.11 Value of load resistor is determined by the filter load box in Fig. 12.10

Let’s design a low pass active Butterworth filter. Butterworth filters are well known for their peak free frequency response. Filter load box in Fig. 12.12 is filled with 100 Ω therefore output load (Load resistor shown in Fig. 12.11) equals to 100 Ω. In Fig. 12.12, Resistance in LP box is filled with 1000 Ω. So, 1000 Ω resistors will be used to design the filter block.

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Fig. 12.12 Settings for a sample low pass filter

Click the verify button in Fig. 12.12. When your design is error-free, a “Calculation successful” message displays and Build circuit button becomes active (Fig. 12.13). Click the Build circuit button. After clicking the Build circuit button, the warning shown in Fig. 12.14 may appear. Click the Yes button to continue. After clicking the Yes button, click on the schematic to paste the designed circuit to it (Fig. 12.15).

12.3 Filter Wizard

Fig. 12.13 Build circuit button is activated Fig. 12.14 Warning message

Fig. 12.15 Designed circuit

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Add an AC voltage source to the input of the filter (Fig. 12.16).

Fig. 12.16 Voltage source V1 is connected to input of the circuit

Add a 100 Ω resistor to the output of the filter and give the name output to the output node (Fig. 12.17).

Fig. 12.17 100 Ω load resistor is connected to the output of the circuit

Now we can use the AC sweep in order to ensure that frequency response of designed circuit is what we need. Click the Interactive button (Fig. 12.18) and set up an AC sweep with settings shown in Figs. 12.19 and 12.20.

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Fig. 12.18 Interactive button

Fig. 12.19 Settings of AC Sweep analysis

Run the simulation by clicking on the Run button in Fig. 12.20. Frequency response of the filter is shown in Fig. 12.21. Now you can decide whether this circuit is what you need. According to Fig. 12.22, passband gain of the filter is around 0 dB and − 3 dB frequency of the filter is around 1 kHz.

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Fig. 12.20 Determining the output of AC Sweep analysis

12.3 Filter Wizard

Fig. 12.21 Simulation result

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Fig. 12.22 Cursor window

12.4 Opamp Wizard You can use the Tools > Circuit wizard > Opamp wizard to design different types of Op Amp amplifiers. Opamp wizard is shown in Fig. 12.23.

Fig. 12.23 Opamp wizard

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Use the Type drop down list to select the type of amplifier that you want (Fig. 12.24).

Fig. 12.24 Selection of type of the amplifier

For instance, assume that we want to design a non-inverting (summing) amplifier with 3 inputs and input–output relation of vout = 20vave = 20 × v1 +v32 +v3 . Settings shown in Fig. 12.25 make such an input–output relation. After entering the settings, click the verify button (Fig. 12.25). Then click the Build circuit button (Fig. 12.25) to design the circuit. Designed circuit is shown in Fig. 12.26. Note that values of feedback resistor Rf (resistor between output and negative terminal of the Op Amp), R1, R2 and R3 is determined by the value entered to the Feedback resistor value (Rf) box in Fig. 12.25.

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Fig. 12.25 Design of non-inverting summer amplifier with three inputs

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Fig. 12.26 Designed circuit

Let’s give input to the designed circuit and ensure that it works as expected. Click the Place Source button (Fig. 12.27) and add V_REF 1, V_REF 2 and V_REF 3 (Fig. 12.28) to the schematic. Double click on V_REF 1, V_REF 2 and V_REF 3 and set their voltages to 0.2 V, 0.4 V and 0.6 V, respectively (Fig. 12.29). Fig. 12.27 Place Source button

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Fig. 12.28 V_REF1, V_REF2 and V_REF3 blocks

Fig. 12.29 V_REF1, V_REF2 and V_REF3 blocks are connected to the inputs

Simulation result is shown in Fig. 12.30. result ) ( is quite )close to the ( Simulation = 8 V. expected value of vout = 20vave = 20 × v1 +v32 +v3 = 20 × 0.2+0.4+0.6 3

12.5 CE BJT Amplifier Wizard

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Fig. 12.30 Simulation result

12.5 CE BJT Amplifier Wizard You can use the Tools > Circuit wizard > CE BJT amplifier wizard to design Common Emitter single stage amplifiers. CE BJT amplifier wizard is shown in Fig. 12.31.

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Fig. 12.31 BJT common emitter amplifier wizard

Let’s design an amplifier with CE BJT amplifier wizard. Assume that we need an amplifier with lower cut-off frequency of 20 Hz. Enter 20 to the Cutoff frequency (fcmin) box (Fig. 12.32).

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Fig. 12.32 Cutoff frequency (fcmin) box is used to set the lower cut-off frequency

Let’s assume our supply voltage is 12 V. Enter 12 to the Power supply voltage (Vcc) box (Fig. 12.33). Let’s keep other values unchanged.

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Fig. 12.33 Power supply voltage (Vcc) box is used to set the value of power supply (VCC)

Click the Verify button in Fig. 12.33. For Collector current (Ic) of 6 mA, the small signal voltage gain is 101.275319 V/V (Fig. 12.34). You can obtain the desired voltage gain by changing the collector current. Note that collector current is directly related to the amplifier voltage gain: Higher collector current means bigger voltage gain and lower collector current means smaller voltage gain. For instance, if you decrease the collector current to 5 mA, the small signal voltage gain decreases to 86.390785 V/V (Fig. 12.35). If you increase the collector current to 7 mA, the small signal voltage gain increases to 114.517693 V/V (Fig. 12.36).

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Fig. 12.34 Collector current (Ic) is used to set the collector current. Small signal voltage gain is around 101.27 for collector current of 6 mA

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Fig. 12.35 Small signal voltage gain is around 86.39 for collector current of 5 mA

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Fig. 12.36 Small signal voltage gain is around 114.52 for collector current of 7 mA

You can build the circuit by clicking the Build circuit button. For instance, Fig. 12.37 shows the designed circuit for collector current of 6 mA.

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Fig. 12.37 Designed circuit

Figure 12.38 shows the frequency response of designed circuit. Note that magnitude graph is flat even up to 10 MHz. Let’s change the transistor and see what happens. Double click on transistor Q1 and click the Replace button.

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Fig. 12.38 Simulation result

Let’s use the cursors to measure the low frequency − 3 dB cut-off frequency. According to Figs. 12.39 and 12.40, the mid-band voltage gain is 39.8268 dB which 39.8268 equals to gain of 10 20 = 98.0257 V . Low frequency − 3 dB cut-off frequency V is around 59.4762 Hz. So, the cut-off frequency is bigger than what we expected. ≈ 3. Fig. 12.41 shows the frequency Increase the C1, C2 and Ce by factor of 59.4762 20 response of the circuit for new values of capacitors. According to Fig. 12.42, the low frequency − 3 dB cut-off frequency is around 20 Hz. Note that mid-band gain is not affected from this capacitor value changes.

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Fig. 12.39 Measurement of lower cut-off frequency

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12.5 CE BJT Amplifier Wizard Fig. 12.40 Cursor window

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Fig. 12.41 Frequency response with new capacitor values

12.5 CE BJT Amplifier Wizard Fig. 12.42 Cursor window

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Let’s replace the transistor in Fig. 12.37 with a 2N2222 and see what happens to the frequency response. Double click the transistor in Fig. 12.37. This opens the BJT_NPN window (Fig. 12.43).

Fig. 12.43 BJT_NPN window

Click the Replace button in Fig. 12.43 and after that select the 2N2222 (Fig. 12.44). Now the schematic changes to what shown in Fig. 12.45.

12.5 CE BJT Amplifier Wizard

Fig. 12.44 2N2222 transistor

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Fig. 12.45 Designed circuit with 2N2222 transistor

Frequency response of Fig. 12.45 is shown in Fig. 12.46. Note that the magnitude graph starts to fall around 1 MHz.

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Fig. 12.46 Frequency response with 2N2222 transistor

12.6 Exercises 1. Use the circuit wizard to design a band reject filter which rejects frequencies in the [5 kHz, 8 kHz] range. 2. Use the circuit wizard to design a common emitter amplifier with gain of 50. Output load and VCC are 1 kΩ and 12 V, respectively. 3. Use the Multisim to draw the frequency response of the circuit shown in Fig. 12.47 and measure the lower and upper cut-off frequencies. Cp shows the parasitic capacitance between the collector-emitter.

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Fig. 12.47 Circuit for Exercise 3

References for Further Study 1. Sedra A., Smith K., Microelectronics Circuits, Oxford University Press, 2015. 2. Asadi F., Essential Circuit Analysis using NI Multisim™ and MATLAB® , Springer, 2022. DOI: https://doi.org/10.1007/978-3-030-89850-2 3. Asadi F., Essential Circuit Analysis Using Proteus® , Springer, 2022. DOI: https://doi.org/10. 1007/978-981-19-4353-9 4. Asadi F., Essential Circuit Analysis using LTspice® , Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-09853-6 5. Asadi F., Electric and Electronic Circuit Simulation using TINA-TI® , River Publishers, 2022. DOI: https://doi.org/10.13052/rp-9788770226851 6. Asadi F., Electric Circuit Analysis with EasyEDA, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-00292-2 7. Asadi F., Power Electronics Circuit Analysis with PSIM® , De Gruyter, 2021. DOI: https://doi. org/10.1515/9783110740653 8. Asadi F., Simulation of Power Electronics Circuits with MATLAB® /Simulink® : Design, Analyze, and Prototype Power Electronics, Apress, 2022. DOI: https://doi.org/10.1007/978-14842-8220-5 9. Asadi F., Eguchi K., Electronic Measurement: A Practical Approach, Springer, 2021. DOI: https://doi.org/10.1007/978-3-031-02021-6 10. Asadi F., Eguchi K., Simulation of Power Electronics Converters Using PLECS® , Academic Press, 2019. DOI: https://doi.org/10.1016/C2018-0-02253-7

Chapter 13

Monte Carlo and Worst Case Analyses of Op Amp Circuits

Abstract Monte Carlo Analysis is a statistical technique to see how changing component properties affects circuit performance. This chapter shows how to do Monte Carlo and Worst Case analyses of Op Amp circuits in Multisim™. Keywords Monte Carlo Analysis · Worst Case Analysis

13.1 Introduction Monte Carlo Analysis is a statistical technique to see how changing component properties affects circuit performance. It can be used in combination with DC Operating Point, AC Sweep or Transient analyses. Let’s study a simple example. Consider a low pass RC circuit. Cut-off frequency of RC circuit is calculated using the f c = 2π1RC formula. Assume the resistor and the capacitor tolerances are 5% and 10%, respectively. This means that 0.95R0 ≤ R ≤ 1.05R0 and 0.90C0 ≤ C ≤ 1.1C0 where R0 and C0 show the nominal values of resistor and capacitor, respectively. In this case nominal cut-off frequency is f c,nom = 1 and cut-off frequency may take any value in the 2π ×1.05R1 0 ×1.1C0 < f c < 2π R0 C0 1 ⇒ 0.87 f c,nom < f c < 1.17 f c,nom interval. Effect of resistor and 2π ×0.95R 0 ×0.90C0 capacitor changes on the frequency response can be studied with the aid of Monte Carlo Analysis. Worst Case Analysis is a statistical technique that tells you what will be the worst possible effects of variations in component parameters. The user can define the worst case as minimum or maximum. Worst Case Analysis can be used in combination with DC Operating Point and AC Sweep analyses. For instance, for the studied low-pass RC circuit, the worst case cut-off frequency may be 0.87 f c,nom or 1.17 f c,nom based on the definition of worst case. This chapter shows how to do Monte Carlo and Worst Case analyses of Op Amp circuits in Multisim.

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13.2 Monte Carlo Analysis In this example we want to study the effect of resistor’s tolerances on the gain of the amplifier shown in Fig. 13.1. Let’s get started.

Fig. 13.1 Sample inverting amplifier

Double click on the Op Amp in Fig. 13.1. This opens the OPAMP window (Fig. 13.2). Click on the Edit model button to open the SPICE model of the Op Amp.

13.2 Monte Carlo Analysis

Fig. 13.2 OPAMP window

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The SPICE model of the 741 Op Amp appears after clicking the Edit model button (Fig. 13.3). The SPICE model is copied to Notepad (Fig. 13.4). For instance, the command in line 20 of Fig. 13.4 tells that the terminals of resistor Rcc are connected to node 0 and 13 and its value is 2.20906 × 10−5 Ω. Therefore, the schematic shown in Fig. 13.1 is composed of external components connected to the Op Amp and components inside the Op Amp itself. Generally, we are interested in the tolerances of external components. In this section we will study the tolerances of external resistors R1, R2 and R3. You can use the same technique to study the effect of Op Amp’s internal component tolerances. It is assumed that resistors R1, R2 and R3 have 5% tolerances.

Fig. 13.3 Edit Model window

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Fig. 13.4 SPICE model of 741 Op Amp

It’s time to set up the Monte Carlo simulation. Click the Interactive button (Fig. 13.5).

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Fig. 13.5 Interactive button

Go to the Monte Carlo section and click the Add tolerance button (Fig. 13.6). This opens the Tolerance window (Fig. 13.7). We will use this window to enter the components tolerances.

Fig. 13.6 Monte Carlo analysis

13.2 Monte Carlo Analysis

Fig. 13.7 Tolerance window

Select the Resistor from the Device type drop down list (Fig. 13.8).

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Fig. 13.8 Selection of resistor for Device type

The components with :xu1 postfix belongs to the Op Amp. For instance, rcc:xu1 shows the resistor RCC in Op Amp U1. According to Fig. 13.9 value of rcc:xu1 is 2.20906 × 10−5 Ω. This value equals to the value shown in line 20 of Fig. 13.4.

13.2 Monte Carlo Analysis

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Fig. 13.9 Properties of RCC resistor

Select the resistor R1, give a 5% tolerance to it and click the OK button (Fig. 13.10). After clicking the OK button, tolerance of R1 is added to the Tolerance list (Fig. 13.11).

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13 Monte Carlo and Worst Case Analyses of Op Amp Circuits

Fig. 13.10 Properties of R1 resistor

13.2 Monte Carlo Analysis

Fig. 13.11 Tolerance of R1 is added to Tolerance list

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Use the same procedure to add the tolerance of resistor R2 and R3 (Fig. 13.12).

Fig. 13.12 Tolerances of R2 and R3 are added to the Tolerance list

Now click the Analysis parameters tab (Fig. 13.13). We are interested to see V put the effect of components tolerances on the amplifier gain, i.e., Vout . Check the input Expression box (Fig. 13.14) and enter V(output)/V(input) to the Output variable box (Fig. 13.14). Then increase the number of runs to 20 and click the Edit analysis button (Fig. 13.14).

13.2 Monte Carlo Analysis

Fig. 13.13 Analysis parameters tab of Monte Carlo simulation

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13 Monte Carlo and Worst Case Analyses of Op Amp Circuits

Fig. 13.14 Output variable and Number of runs are entered

After clicking the Edit analysis button in Fig. 13.14, the Transient Analysis window appears. Change the settings to what shown in Fig. 13.15 and click the OK button.

13.2 Monte Carlo Analysis

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Fig. 13.15 Transient analysis window

The above settings ask the Multisim to select random values for resistors R1, R2 and R3 (within the allowed range) and draw the V(output)/V(input) function for [0.01 s, 0.02 s] interval. This process is repeated 20 times. Drawing the output is started from 0.01 s instead of 0. This delay permits the circuit to reach steady state. After clicking the Run button in Fig. 13.14, the result shown in Fig. 13.16 appears. As shown in Fig. 13.16, the gain roughly changed from − 9.5 up to − 10.4. If you rerun the simulation once again, a different result comes out since the simulation is done with different random values.

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Fig. 13.16 Output of simulation

13 Monte Carlo and Worst Case Analyses of Op Amp Circuits

13.2 Monte Carlo Analysis

391

You can see the values which created a specific curve as well. In order to do so, right click on the curve and click the Trace properties (Fig. 13.17). This opens the Graph Properties window and shows the run number of the trace (Fig. 13.18). Now you scroll the bottom of the page to see given run number is done with which values (Fig. 13.19). According to Fig. 13.20, value of resistors for the upper trace (i.e. the one with gain of around −9.5) is R1 = 1016.93 Ω, R2 = 9763.52 Ω and R3 = 18,902.6 Ω.

Fig. 13.17 The menu appeared after right clicking

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13 Monte Carlo and Worst Case Analyses of Op Amp Circuits

Fig. 13.18 Graph Properties window

13.2 Monte Carlo Analysis

Fig. 13.19 8th run is selected

Fig. 13.20 Values of parameters for 8th run

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13 Monte Carlo and Worst Case Analyses of Op Amp Circuits

You can use the Monte Carlo analysis to study the gain of an amplifiers with AC input as well (Fig. 13.21). In this case you need to draw the graph of rms [V(output))/ rms(V(input)] (Fig. 13.22).

Fig. 13.21 Inverting amplifier with AC input

13.3 Worst Case Analysis

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Fig. 13.22 Analysis parameters settings for Fig. 13.21

13.3 Worst Case Analysis Worst case analysis has some limitations. Click the Help > Multisim help (Fig. 13.23) and search for “worst case limitation” (Fig. 13.24) to see the worst case analysis limitations.

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Fig. 13.23 Help > Multisim help

Fig. 13.24 Search tab of Multisim window

Let’s study a simple circuit to see how worst case analysis works. Consider the simple voltage divider circuit shown in Fig. 13.25. Resistor R1 and R2 have tolerances of 5% and 10%, respectively. In other words 0.95 kΩ < R 1 < 1.05 kΩ and 0.9 kΩ < R 2 < 1.1 kΩ. The minimum and maximum of output voltage are: Vout,min =

0.9 R2,min × 12 = 5.5385 V × V1 = R1,max + R2,min 1.05 + 0.9

Vout,max =

1.1 R2,max × 12 = 6.4390 V × V1 = R1,min + R2,max 0.95 + 1.1

13.3 Worst Case Analysis

397

Fig. 13.25 Simple voltage divider

Let’s see whether Multisim could reach to these results. Select a Worst Case analysis and click the Add tolerance button (Fig. 13.26). Then enter the resistor tolerances (Figs. 13.27, 13.28 and 13.29).

Fig. 13.26 Worst case analysis

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13 Monte Carlo and Worst Case Analyses of Op Amp Circuits

Fig. 13.27 Entering the tolerance of R1

13.3 Worst Case Analysis

Fig. 13.28 Entering the tolerance of R2

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Fig. 13.29 Tolerance of R1 and R2 are added to the Tolerance list

Now go to the Analysis parameters tab and select the DC Operating Point analysis. Select the V(output) as output variable. What we mean by worst case is determined by the Direction box. When Direction box is set to High, maximum of selected output variable is calculated. When Direction box is set to Low, minimum of selected output variable is calculated. Figure 13.31 shows the output of simulation with settings shown in Fig. 13.30. According to Fig. 13.31 the worst case (maximum) output is 6.43902 V as expected.

13.3 Worst Case Analysis

Fig. 13.30 Settings to determine the maximum of output voltage

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Fig. 13.31 Output of simulation

Change the Direction box to Low (Fig. 13.32) and rerun the simulation. Figure 13.33 shows the output of simulation with settings shown in Fig. 13.32. According to Fig. 13.33 the worst case (minimum) output is 5.53846 V as expected.

13.3 Worst Case Analysis

Fig. 13.32 Settings to determine the minimum of output voltage

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Fig. 13.33 Output of simulation

The worst case analysis can be used to study the frequency response of circuits as well. Let’s study a simple example. Consider the simple circuit shown in Fig. 13.34. Resistor R1 and Capacitor C1 have tolerances of 5% and 20%, respectively. Therefore, 0.95 kΩ < R 1 < 1.05 kΩ and 0.8 µF < C 1 < 1.2 µF. − 3 dB Cut-off frequency for this simple RC filter equals to f c = 2π R11 C1 . Therefore, 1 1 = 209.4144 Hz and f c,max = 2π R1,min = 126.3134 Hz. f c,min = 2π R1,max C1,max C1,min Fig. 13.34 Simple RC circuit

13.3 Worst Case Analysis

405

We want to study the frequency response of the circuit shown in Fig. 13.34 for the [100 Hz, 500 Hz] range with the given tolerances. Let’s get started. Select the Worst Case analysis and enter the tolerances (Fig. 13.35).

Fig. 13.35 Tolerances are entered to the Tolerance list

Click the Analysis parameters and do the settings similar to Fig. 13.36. Explanation of Collating function and Direction boxes are shown in Fig. 13.37. Click the Edit analysis button in Fig. 13.36, do the settings similar to Fig. 13.38 and click the OK button.

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13 Monte Carlo and Worst Case Analyses of Op Amp Circuits

Fig. 13.36 Settings of analysis parameters tab

13.3 Worst Case Analysis

Fig. 13.37 Explanation for Collating function, Direction and Group all traces

Fig. 13.38 AC Sweep window

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13 Monte Carlo and Worst Case Analyses of Op Amp Circuits

The settings shown in Fig. 13.36 attempts to find the case that produces the lowest peak value in the magnitude graph. Output of simulation with these settings is shown in Fig. 13.39. The calculated worst case graph (blue) falls bellows the nominal (green) graph. According to Fig. 13.39, the worst case graph obtained for R1 = 1050 Ω and C1 = 1.2 µF.

Fig. 13.39 Output of simulation

Let’s measure − 3 dB for worst case graph. According to Fig. 13.40, the − 3 dB for worst case graph is around 127.6694 Hz.

13.3 Worst Case Analysis

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Fig. 13.40 Measurement of cut-off frequency for the worst case graph

Let’s use the worst case analysis to find the maximum DC offset of the inverting amplifier shown in Fig. 13.41. Resistors R1, R2 and R3 have tolerance of 5%. Fig. 13.41 Inverting amplifier

Settings of Analysis parameters tab are shown in Fig. 13.42. Output of this simulation is shown in Fig. 13.43. According to Fig. 13.43, the maximum of output DC offset is 724.89825 µV.

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13 Monte Carlo and Worst Case Analyses of Op Amp Circuits

Fig. 13.42 Settings of analysis parameters tab

13.4 Exercises

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Fig. 13.43 Output of simulation

13.4 Exercises 1. The resistor R1 and R2 in Fig. 13.44 have 5% tolerance. Use the Monte Carlo analysis to see the effect of resistors on the pass band gain of the amplifier. 2. Use the worst case analysis to calculate the maximum DC offset of the output for Fig. 13.44.

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13 Monte Carlo and Worst Case Analyses of Op Amp Circuits

Fig. 13.44 Circuit for Exercise 1 and 2

References for Further Study 1. https://bit.ly/3okfcN7 2. Sedra A., Smith K., Microelectronics Circuits, Oxford University Press, 2015. 3. Asadi F., Essential Circuit Analysis using NI Multisim™ and MATLAB® , Springer, 2022. DOI: https://doi.org/10.1007/978-3-030-89850-2 4. Asadi F., Essential Circuit Analysis Using Proteus® , Springer, 2022. DOI: https://doi.org/10. 1007/978-981-19-4353-9 5. Asadi F., Essential Circuit Analysis using LTspice® , Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-09853-6 6. Asadi F., Electric and Electronic Circuit Simulation using TINA-TI® , River Publishers, 2022. DOI: https://doi.org/10.13052/rp-9788770226851 7. Asadi F., Electric Circuit Analysis with EasyEDA, Springer, 2022. DOI: https://doi.org/10. 1007/978-3-031-00292-2 8. Asadi F., Power Electronics Circuit Analysis with PSIM® , De Gruyter, 2021. DOI: https://doi. org/10.1515/9783110740653 9. Asadi F., Simulation of Power Electronics Circuits with MATLAB® /Simulink® : Design, Analyze, and Prototype Power Electronics, Apress, 2022. DOI: https://doi.org/10.1007/978-14842-8220-5 10. Asadi F., Eguchi K., Electronic Measurement: A Practical Approach, Springer, 2021. DOI: https://doi.org/10.1007/978-3-031-02021-6 11. Asadi F., Eguchi K., Simulation of Power Electronics Converters Using PLECS® , Academic Press, 2019. DOI: https://doi.org/10.1016/C2018-0-02253-7

Index

B Buffer circuit, 161

Instrumentation amplifier, 93 Inverting amplifier, 14

C Cascade connection of filters, 224 Common mode gain, 86 Common Mode Rejection Ratio (CMRR), 91 Comparator, 185

L Logarithmic amplifier, 74 Low pass filter, 218

D DC offset, 44 Difference amplifier, 82 Differential mode gain, 89

F Filter wizard, 343 555 timer wizard, 337 Fourier analysis, 253 Frequency response of buffer circuit, 176 Frequency response of inverting amplifier, 100 Frequency response of non-inverting amplifier, 112 Full wave precision rectifier, 296

H Half wave precision rectifier, 276 High pass filter, 211

I Input impedance of inverting amplifier, 136

M Model of ideal Op Amp, 3 Model of non-ideal Op Amp, 3 Monte Carlo analysis, 376

N Non-inverting amplifier, 63

O Operational Amplifier (Op Amp), 2 Output impedance of inverting amplifier, 148

P Peak detector, 302

R RC phase shift oscillator, 259

S Sallen-Key active filter, 244 Schmitt trigger, 199 Series voltage regulator, 315

© The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 F. Asadi, Applied Op Amp Circuits, https://doi.org/10.1007/978-981-99-3881-0

413

414 Shunt regulator, 323 Slew rate, 10 Square wave generators, 262 T Triangular wave generator, 267

Index W Wien-bridge oscillator, 247 Window comparator, 193 Worst case analysis, 395