Volume 10, Number 2, June 2023 IEEE Power Electronics Magazine

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pelsmagazine.ieee.org

Vol. 10, No. 2 June 2023

For your engineering success

Features Inverter Interactions With Electric Grids  20 ALeodvanced Casey, Johan H. Enslin, Géza Joós, Mark Siira, Bogdan Borowy, and Chase Sun

28 H 2-Orange: Finding Energy Storage Solutions for Decarbonizing Generation

Thomas Koeppe, Johan H. Enslin, Tony Putman, Mark Johnson, and Peter Hoeflich

110 Departments & Columns        4 From the Editor Enhancing the Reliability of Electric Grid Ashok Bindra       10 President’s Message IEEE PELS: Making an Impact on Society and Its Members Brad Lehman       16 PSMA Corner EnerHarv Workshop Facilitates IoT Ecosystem Renee Yawger       86 Women in Engineering Diverse Future Leadership Insight From Successful Managers Stephanie Watts Butler       88 Industry Pulse WSTS Introduces New Category: WBG Discrete Power Products Stephanie Watts Butler and Kristen Parrish       92 Students and Young Professionals Rendezvous  The Revival of SYPS and Recent YP Activities Houssam Deboucha, Chen Xu, Anshuman Sharma, Haifah Sambo, Nayara Brandão de Freitas, and Joseph P. Kozak       96 Society News   114 Event Calendar

34 Energy-Storage Enhanced STATCOMs for Wind Power Plants

Fangzhou Zhao, Xiongfei Wang, Zichao Zhou, Lexuan Meng, Jean-Philippe Hasler, Jan R. Svensson, Lukasz Kocewiak, Haofeng Bai, and Hongyang Zhang

40 V oltage Controlled Magnetic Components for

Power Electronics: Technologies and Applications

An Overview Marco Liserre, Yoann Pascal, Jeffrey McCord, Thiago Pereira, Rainer Adelung, Lukas Zimoch, S. Kaps, Xiaxin Li, and Nian X. Sun

49 Reliability Evaluation of SiC MOSFETs Under Realistic Power Cycling Tests

Masoud Farhadi, Bhanu Teja Vankayalapati, and Bilal Akin

57 Industrial Adoption of Energy Harvesting: Challenges and Opportunities

Thomas Becker, Michail E. Kiziroglou, Maeve Duffy, Bahareh Zaghari, and Eric M. Yeatman

65 Optimizing PCB Layout for HV GaN Power Transistors

Eric Persson

79 A PEC 2023 Returns to Orlando to Display Latest Advances in WBG and Si Devices

Ashok Bindra

On the cover This issue focuses on eGrid and storage. IMAGE LICENSED BY INGRAM PUBLISHING

  124 White Hot IEEE APEC 2023 Rocked! Robert V. White

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IEEE Power Electronics Magazine Editor-in-Chief Ashok Bindra Austin, TX, USA +1 631 672-2875 [email protected] Deputy Editors-in-Chief Stephanie Watts Butler (Industry) WattsButler LLC USA [email protected] Leon M. Tolbert (Academic) Min H. Kao Professor Electrical Engineering and Computer Science The University of Tennessee 520 Min H. Kao Bldg Knoxville, TN, 37996-2250, USA +1 865 974-2881 [email protected] Magazine Advisory Board Leon M. Tolbert MAB Cochair Chairman The University of Tennessee, TN, USA Stephanie Watts Butler MAB Cochair WattsButler LLC USA Robert N Guenther, Jr GPEM LLC Marysville, Ohio, USA Jennifer Vining University of Washington Seattle, WA, USA Annette Mutze Graz University of Technology, Graz, Austria Soma Essakiappan University of North CarolinaCharlotte, NC, USA Tony O’Gorman PESC Inc. San Diego, CA, USA Yingying Kuai Caterpillar Inc. Mossville, IL, USA Alpha J. Zhang Delta Electronics Shanghai, China IEEE Power Electronics Society Officers Brad Lehman President [email protected] Liuchen Chang Immediate Past President Nominations Committee Chair [email protected]

Frede Blaabjerg Senior Past President Long Range Planning Committee Chair [email protected] Mario Pacas VP Global Relations [email protected] Pat Wheeler VP Technical Operations [email protected] Yunwei (Ryan) Li VP Products [email protected] Johan Enslin VP Industry and Standards [email protected] Jian Sun VP Conferences [email protected] Mark Dehong Xu VP Membership [email protected] Pradeep Shenoy Treasurer [email protected] Katherine Kim Constitution and Bylaws [email protected] Kevin L. Peterson Division II Director 2023 Members-at-Large Noriko Kawakami Toshiba Mitsubishi-Electric Industrial Systems Corp., Japan Yan-Fei Liu Queen’s University, Canada Yunwei (Ryan) Li University of Alberta, Canada Pedro Rodriguez University Loyola Andalusia, Spain Jennifer Vining University of Washington, USA Navid R. Zargari Rockwell Automation, Canada 2024 Members-at-Large Stephanie Watts Butler WattsButler LLC USA Shinzo Tamai Toshiba Mitsubishi-Electric Industrial Systems Corp., Japan Ulrike Grossner ETH Zurich, Switzerland Giovanna Oriti Naval Postgraduate School, USA

Axel Mertens Leibniz Universität Hannover, Germany Maryam Saeedifard Georgia Tech, USA 2025 Members-at-Large Vivek Agarwal Indian Institute of Technology Bombay, India Mahshid Amirabadi Northeastern, USA Christina DiMarino Virginia Tech, USA Philip Carne Kjaer Vestas, Denmark Hong Li Beijing Jiaotong University, China Sudip K. Mazumder University of Illinois Chicago, USA Technical Committee Chairs Luca Corradini TC 1: Control and Modeling of Power Electronics Hanh-Phuc Le TC 2: Power Components, Integration, and Power ICs [email protected] Ali Bazzi TC 3: Electrical Machines, Drives and Automation [email protected] Mahesh Krishnamurthy TC 4: Electrical Transportation Systems [email protected] Juan Balda TC 5: Sustainable Energy Systems [email protected] Khurram Khan Afridi TC 6: Emerging Power ElectronicTechnologies [email protected] Alexis Kwasinski TC 7: Critical Power and Energy Storage Systems [email protected] Marco Liserre TC 8: Electric Power Grid Systems [email protected] Grant Covic TC 9: Wireless Power Transfer Systems [email protected] Kevin Hermanns TC 10: Design Methodologies [email protected]

Tao Yang TC 11: Aerospace Power Sanjib Kumar Panda TC 12: Energy Access and Off-Grid Systems [email protected] Advertising Sales Kathy Naraghi WelComm, Inc., [email protected] +1 858 279-2100 IEEE Power Electronics Society Staff Mike Kelly Executive Director [email protected] Jane Celusak Project Manager [email protected] Becky Boresen Technical Community Program Specialist [email protected] Megan Cichocki Program Specialist [email protected] Mary Beth Schwartz Publications Administrator [email protected] Jessica Uherek Editorial Assistant/News Editor [email protected] IEEE Periodicals Magazines Department 445 Hoes Lane, Piscataway, NJ 08854 USA Brian Johnson Journals Production Manager Katie Sullivan Senior Manager, Journals Production Janet Dudar Senior Art Director Gail A. Schnitzer Associate Art Director Theresa L. Smith Production Coordinator Mark David Sr. Manager Advertising and Business Development Felicia Spagnoli Advertising Production Manager Peter M. Tuohy Production Director Kevin Lisankie Editorial Services Director Dawn M. Melley Senior Director, Publishing Operations

IEEE prohibits discrimination, harassment, and bullying. For more information, visit http://www.ieee.org/nondiscrimination. IEEE Power Electronics Magazine (ISSN 2329-9207) (IPEMDG) is published quarterly by the Institute of Electrical and Electronics Engineers, Inc. Headquarters: 3 Park Avenue, 17th Floor, New York, NY 10016-5997 USA, Telephone: +1 212 419 7900. Responsibility for the content rests upon the authors and not upon the IEEE, the Society or its members. IEEE Service Center (for orders, subscriptions, address changes): 445 Hoes Lane, Piscataway, NJ 08855-1331 USA. Telephone: +1 732 981 0060. Individual copies: IEEE members US$20.00 (first copy only), nonmembers US$109 per copy. Subscription rates: Annual subscription rates included in IEEE Power Electronics Society member dues. Subscription rates available on request. Copyright and reprint permission: Abstracting is permitted with credit to the source. Libraries are permitted to photocopy beyond the limits of U.S. Copyright law for the private use of patrons 1) those post-1977 articles that carry a code at the bottom of the first page, provided the per-copy fee indicated in the code is paid through the Copyright Clearance Center, 222 Rosewood Drive, Danvers, MA 01923 USA; 2) pre-1978 articles without a fee. For other copying, reprint, or republication permission, write Copyrights and Permissions Department, IEEE Service Center, 445 Hoes Lane, Piscataway, NJ 08854. Copyright © 2023 by the Institute of Electrical and Electronics Engineers Inc. All rights reserved. Canadian GST #125634188 PRINTED IN THE U.S.A. Digital Object Identifier 10.1109/MPEL.2023.3278180

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MISSION STATEMENT: To educate, inform, and entertain our community of IEEE Power Electronics Society members on technology, events, industry news, and general topics relating to all electronic power conversions in any application or market and to further serve and support our Members in professional career development through delivering educational content and raising awareness of engineering tools and technologies.

From the Editor

by Ashok Bindra

Enhancing the Reliability of Electric Grid

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ver the years, the deployment of distributed energy resources (DER) has risen rapidly with the explosive growth in renewable energy sources (RES), especially using the solar photovoltaic (PV) systems and the wind power, as well as the battery storage. While the early deployments of DER were enabled by synchronous generators (SGs), typically driven by diesel or natural gas engines, the recent growth in DER and RES is made possible by advances in grid connecting inverters. Primarily, there are two types of grid connecting inverters, namely grid-following (GFL) inverters, and grid-forming (GFM) inverters. Although inverters provide the interface between the grid and energy sources like solar panels, wind turbines, and energy storage, there is some difference between GFL and GFM inverters. I n t he f i r st cover a r ticle “Advanced Inverter Interactions with Electric Grids” by Leo Casey, Johan Enslin, Geza Joos, Mark Siira, Bogdan Borowy, and Chase Sun, the authors suggest that new standards and guides may be required for inverter-based resources (IBR) operation, and help specify the respective roles of GFL and GFM operating modes. This will reduce inverterbased system events experienced by power utilities world-w ide a nd increase the adoption rate of renewable energy, according to the article. Digital Object Identifier 10.1109/MPEL.2023.3273890 Date of publication: 27 June 2023

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Plus, the article explains the transition of the IBR from GFL mode to GFM mode to enhance the reliability of the electric grid. Some standards already implicitly define GFL and GFM modes of operation in a limited number of applications. Such is the case for a microgrid. While the IBR operates in GFL mode in a grid-connected microgrid, it can also be operated in GFM mode in an islanded microgrid. This IBR defines the microgrid voltage and frequency reference for islanded mode. However, the operation of IBR in future grids, either in GF L mode or GF M mode, w i l l depend upon grid operating requirements as more RES are deployed, concludes the article. I n t he second cover a r t icle “H2-Orange: Finding Energy Storage Solutions for Decarbonizing Generation” by Thomas Koeppe, Johan Enslin, Tony Putman, Mark Johnson, and Peter Hoeflich, the authors argue that hydrogen as an energy carrier and storage technology in hybrid networks have a very bright future in the quest to decarbonize fossil fuel generation. The role of power electronics as the interface between these different hydrogen (H2) production and storing technologies, as well as connecting different energy networks, will be more important in the future. In this article, the authors describe the objectives and key results from a feasibility study about using H2 generation and storage in a co-firing project sponsored by the U.S. Department of

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Energy (DOE) named H2 Orange. In fact, in this collaborative industryuniversity team, with Duke Energy as the asset owner and local utility, Siemens Energy as the technology owner, and Clemson University as academia, site owner, and beneficiary of the steam, is a unique arrangement allowing for a comprehensive understanding of the application of H 2 energy storage systems. This study indicates a critical H2 utilization point occurring around 2040 with increased electrolyzer activity triggered by 80% CO2 reduction. This work strongly supports the reduced and zero carbon goals which all three partners share along with most utilities, universities, and industries in the nation. While several control and hardware solutions have been developed to address the stability and power quality issues with large-scale wind power plants (WPPs), the energystorage enhanced static synchronous compensator (E-STATOM), among others, recently emerged as an attractive solution, according to the third cover feature “EnergyStorage Enhanced STATCOMs for Wind Power Plants” by Fangzhou Zhao, Xiongfei Wang, Zichao Zhou, Lexuan Meng, Jean-Philippe Hasler, Jan R. Svensson, Lukasz Kocewiak, Haofeng Bai, and Hongyang Zhang. The E - STATCOM integrates the energy storage system, e.g., supercapacitor or battery, into STATCOM, and is equipped with the GFM control, thereby offering several benefits to WPPs.

The fourth feature “Voltage Controlled Magnetic Components for Power Eelectronics Tchnologies and Applications: An Overview” by M. Liserre, Y. Pascal, J. McCord, T. Pereira, R. Adelung, L. Zimoch, S. Kaps, X. Liu, and N. X. Sun, describes technologies that can be used to create controlled magnetics, including emerging technologies with high potential. Furthermore, a list of possible applications is proposed, where these components can provide a significant advantage in terms of effic i e n c y, s i z e r e d u c t i o n , o r controllability. Special emphasis is laid on a use case: a 20 kW multiport dc–dc converter in which power flow control is achieved using voltage controlled inductors based on partially saturable magnetic cores. The next feature “Reliability Evaluation of SiC MOSFETs Under Realistic Power Cycling Tests” by Masoud Farhadi, Bhanu Teja Vankayalapati, and Bilal Akin investigates the

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long-term reliability of SiC MOSFETs using accelerated lifetime tests (ALTs). ALTs accelerate the aging mechanisms by amplifying the thermal and electrical stresses. The data from ALTs serve a crucial function for evaluating the sustained reliability of SiC MOSFETs through assessment of their lifespan, identification of breakdown causes, and continuous monitoring of their performance. This article introduces an ac power cycling test setup for SiC MOSFETs and discusses the correlation of aging precursors to different failure mechanisms. Also, the study identifies and presents patterns of common precursor shifts. In the “Industrial Adoption of Energy Harvesting: Challenges and Opportunities” by Thomas Becker, Michail. E. Kiziroglou, Maeve Duffy, Bahareh Zaghari, and Eric M. Yeatman, the authors provide an overview of energy harvesting, ranging from the state-of-art technology

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research, through barriers in developing commercial off-the-shelf products, to a critical assessment of several EH powered wireless sensor case studies. This is followed by “PCB Design and Layout for WBG Power Circuits” by Eric Persson of Infineon Technologies. The fastswitching capability of GaN transistors can make PCB layout more challenging. In this article, Persson discusses several key concepts to help understand the PCB layout challenges, and strategies to help solve these challenges and optimize the layout for best overall electrical and thermal performance. Following these “tips” will help designers obtain optimal performance from high performance GaN technology, according to the article. Finally, the last article “APEC 2023 Returns to Orlando to Display Latest Advances in WBG and Si Devices” by yours truly focuses on the keynote talks presented at the

plenary session and reveals latest trends in SiC, GaN, and silicon transistors and ICs.

News, Columns, and More In the column President’s Message, Brad Lehman presents PELS initiatives and activities around the world that is having a profound impact on the society and its members. Likewise, in the PSMA Corner, Renee Yawger describes the international energy harvesting workshop, EnerHarv 2022, that was focused on building an ecosystem for powering the internet of things (IoT). While Stephanie Watts Butler discusses the career paths of successful managers, both female and male, in business and academia in the WIE column. Diversity in the career was also a major topic of discussion in this column. Similarly, the Industry Pulse, written by Stephanie Watts Butler and

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Kristen Parrish, announces that WSTS will now track WBG discrete power products revenue as of January 2023. As a result, WSTS’ monthly statistics will now include WBG power transistors and rectifiers. In the White Hot column, the author wrote that APEC 2023 rocked and, quite frankly, if you were not there you missed it. While the “Students and Young Professionals Rendezvous” column highlights the initiatives that S&YP is supporting, including the 2023 IEEE PELS SYPS symposium, and encourages students and YPs worldwide to get more involved with PELS. A s u su a l, t he S ociet y New s brings activities from PELS chapters and student branches around the world, and highlights an all women plena r y session at ECCE2023 in Nashville, TN, USA. Plus, it discloses winners of EBL II

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competition. Finally, the “Event Calendar” provides a year’s listing of conferences and workshops. Thank you for your support. The magazine has been growing for the last ten years. Both, print and digital versions of the magazine are healthy and delivered on time to our readers. Advertisers are coming back. The commitment to bringing timely articles, columns and news items of interest and value to practicing power electronics engineers worldwide is getting stronger year over year. To serve you better and keep this magazine a valuable resource for working power electronics engineers around the world, we look forward to your feedback and suggestions. Now we have a website (https://pelsmagazine.ieee.org/) which offers more than what is in the print, and where you can easily provide your feedback. Stay safe and healthy!

President’s Message

by Brad Lehman

IEEE PELS: Making an Impact on Society and Its Members

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re you tired of building circuits without considering the impact it has on the world? Don’t forget that you have the power to make a difference! IEEE Power Electronics Society’s (PELS) core mission is to promote power electronics technological innovation and excellence for the benefit of humanity. So, whether you’re improving power conversion efficiency, building electric vehicles (EVs) and microgrids, or revolutionizing renewable energy, you’re helping to reduce carbon emissions or maybe even bringing electricity to impoverished communities. To foster this impact, IEEE PELS strives to mentor its members, provide lifelong learning opportunities for growth, and foster technical innovation and entrepreneurship. And the h ig h l ig ht of t h i s i s t he I EEE Empower a Billion Lives (EBL) competition—where innovation meets impact. The competition aims to provide clean, reliable energy solutions that can improve people’s lives, while also protecting the environment and promoting sustainable practices. The most recent EBL II competition, held at the IEEE Applied Power Electronics Conference and Exposition (APEC) in March 2023, wa s i n s pi r i ng, i n nov at ive a nd impactful! Twenty five teams from around the world competed, and the

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winning teams were awarded a total prize of US$475,000. The grand prize of US$150,000 went to team Nanoé from Madagascar who had already installed 1550 nanogrids to provide affordable electricity to more than 6500 end-users in 350 v illages. Thanks to the tireless work of 50 employees and 100 locally recruited and trained entrepreneurs (Figure 1), they were able to make a significant impact in improving access to electricity in under-resourced communities. With the EBL prize, they plan to replicate and scale up the model with the development of dc microgrids interconnecting neighboring nanogrids to improve the electrical services delivered and enable productive use of energy. Additional prizes were awarded to teams from Kenya, Zambia, Myanmar, Nigeria, Cameroon, Jordan, India, and

the U.S., showing the broad global involvement and impact of the EBL program. The teams included operating companies, start-ups, and student teams. For more details on all the EBL teams and prizes, or to find out more about EBL or to get involved in the Energy Access community, please visit www.empowerabillionlives.org . The next round of IEEE PELS EBL is expected to begin in 2025. However, that’s not all. IEEE PELS is offering other competitions too! At the same IEEE APEC conference, 10 undergraduate teams presented their progress on their solution for a single phase solid-state-transformer during the IEEE International Future Energy Challenge (IFEC’23) semifinals. Seven teams were selected for the final round that will be held between 26 and 28 July in Hanover, Germany. Most of the undergraduates

FIG 1 Team Nanoé from Madagascar won the EBL II grand prize. Source: Lucas Richard; Nanoé.

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took the chance to visit the APEC conference and exhibition and the student job fair. The topic for IFEC’24 will be covering an audio-amplifier. Further information will be published soon on http://energychallenge.weebly.com/. Plus, in the ongoing MagNet challenge, global student teams will develop machine learning software models to more accurately model the behavior of different shaped and different materials in magnetic cores when they are used in power converter systems. For years, many of us have been relying on 100-year old Steinmetz equations to predict power losses in cores, even though we know they are not accurate. With machine learning, and the training data provided by the competition, PELS members can be a part of developing the next generation models and understandings of magnetics. https://www. princeton.edu/~minjie/magnet.html. However, IEEE PELS is not just about competitions. We are also a bout l i felong lea r n i ng a nd

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mentoring. PELS has been expanding our “Ph.D. Schools”—multi-day workshops throughout the world that try to cross-fertilize research and discussions among Ph.D. students by bringing local industry and academic experts to their region. PELS especially likes to sponsor Ph.D. schools in regions that do not have great financial resources or the ability to send many participants to international conferences. The advantages of such an event are: ■■All interested doctoral students can participate regardless of the acceptance of a paper. ■■Ph.D. students can face the criticism of other Ph.D. students and also the industry in an atmosphere of mutual support and friendship. ■■There is a lively intensive direct exchange of experiences with valuable tips on how to achieve specific goals, along with recommendations for software and hardware tools and on many other specific aspects of research in power electronics.

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■■Industry

participation is an incentive for Ph.D. students, who can learn firsthand about industry needs and requirements. ■■Also, for the supervising professors, the Ph.D. school represents a unique opportunity to discuss the research topics of the upcoming period and also the supervision of the Ph.D. students. Our most recent Ph.D. school was held in Colombia, hosted by the Universidad Nacional de Colombia. It was a successful event for the Ph.D. students, and evidenced the strong commitment of many professors in the local organization. We hope to expand this activity to dozens of Ph.D. schools in the future each year. Maybe some readers have interest in helping organization of a local event? Please let PELS know. The 2023 IEEE APEC had a major success with its inaugural student job fair, which attracted over 250 job seekers, mostly Ph.D. graduates, and provided them with the opportunity to meet with more than 50 potential

employers and exhibitors. This is a relatively new initiative for PELS, as IEEE recently modified its policy in February 2022, allowing individual conferences to organize recruiting activities at their discretion. The 2022 IEEE Energy Conversion Congress & Expo (ECCE) was the first to implement this policy and received positive feedback from exhibitors who appreciated the access to specialized job applicants. The student job fair will also be held at the 2023 IEEE ECCE in Nashville, taking place from 30

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October to 2 November. It is anticipated that more than 300 student job seekers will attend this conference, which promises to be exceptional with its all-women plenary session featuring CEO/CTO level speakers in the power electronics field: ■■Riona Armesmith, CTO, magniX ■■Susan Hubbard, Deputy Lab Director for Science and Technology, Oak Ridge National Laboratory ■■ Elif Balkas, CTO, Wolfspeed ■■Annette Clayton, CEO, Schneider Electric, North America.

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The 2023 ECCE in Nashville is the largest version of our ECCE series of conferences. Each year PELS cosponsors three ECCE conferences: the largest of the three is this year’s Nashville in North America (www. ieee-ecce.org). But also in late summer 2023, there will be EPE 2023 ECCE Europe in Aalborg, Denmark f rom 4 to 8 September (w w w. epe2023.com). The ICPE 2023 ECCE Asia was 22–25 May in Jeju, Korea. Every ECCE event is more than just technical research presentations; it also features a wide range of professional development programs, including tutorials, women in engineering events, young professional and mentoring events, and sometimes outreach events for the public. With such a diverse range of activities, these PELS sponsored conferences are an unmissable opportunity. If PELS harbored a futuristic vision of outreach, it would entail launching an outreach program directed towards pre-college students. One way PELS could accomplish this is by developing lab demonstrations or experimental kits aimed at stimulating young people’s interest in the fields of power electronics and their applications. We have generated several ideas, such as designing wireless or solar cell phone chargers, constructing solar energy kits, powering and programming robots. Concurrently, we are also soliciting any input from our PELS memb er s t o g i ve u s ide a s a nd suggestions. In essence, IEEE PELS is committed to creating a positive impact on its members and on the world through the use of its time, expertise, and resources. Consequently, we invite you to consider joining and volunteering with IEEE PELS to help contribute to this important cause. You will have the opportunity to make a meaningful difference in the field of power electronics. Who knows, you might even win a prize or two along the way! Contact Brad at brad.pels@ ieee.org 

PSMA Corner

by Renee Yawger

EnerHarv Workshop Facilitates IoT Ecosystem

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he Power Sources Manufacturers Association (PSMA) (www.psma.com) strives to identify and increase awareness and knowledge of trends that impact the power sources and conversion devices community. Several PSMA committees are focused on emerging technologies. The Energy Harvesting Committee (EHC) (https:// www.psma.com/technical-forums/ energy-harvesting) is focused on building an ecosystem for powering the internet of things (IoT). The committee hosts the biennial EnerHarv workshop (http://www.EnerHarv.com/) to bring together experts working on all technical areas relevant to energy harvesting, energy storage, power management, and its applications in the IoT along with several other related markets (i.e., medical wearables, ubiquitous selfpowered sensor networks, etc.).

International Energy Harvesting Workshop Following a two-year COVID-related deferral, EnerHarv 2022 was held at the ASSIST Center (https://assistcenter.org/) in North Carolina State University (https://www.ncsu.edu/) from 5 to 7 April 2022. Each day of the workshop offered a combination of technical sessions, functional demonstrations, posters, panel Digital Object Identifier 10.1109/MPEL.2023.3271622 Date of publication: 27 June 2023

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FIG 1 Functional demonstrations of energy-harvesting technologies.

sessions, and networking opportunities to cultivate education and relationship building. Each of the three days opened with a keynote address from industry and academia. The University of San Diego opened the proceedings with insight on the development a nd integration of miniatur ized energy harvesting, wireless power transfer and related components, and the advantages of integration at semiconductor and module levels. The ASSIST Center provided an overview of their activities related to the development of technologies and demonstrators for wearables including their rapid prototyping group to drive technologies to higher tech nolog y rea d i nes s level s (TRLs) (Figure 1). The final keynote from Analog Devices gave a perspective on the challenges and opportunities of powering the IoT.

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The keynote included some examples of ADI’s roadmap incorporating disruptive technologies in the wearables and Industry 4.0 sectors for sensors, power management, and wireless communications. ADI is also evaluating sustainability aspects in design, including reliability in ter ms of both per formance and lifetime. Four technical sessions were offered including transducer, system integration, energy storage, and power management. Two panel se s sion s i ncluded pa r t icipa nt s from a variety of backgrounds. The panel “Powering the Next-generation WSN Experience” spawned a fruitful discussion on the challenges, gaps, and opportunities associated with bringing the ubiquitous sensor a nd IoT deploy ments to m a i n s t r e a m a ppl ic a t ion s . T he “Power IoT E co s y s t em” pa nel

promoted the benefits of creating synerg i e s a n d fo s t e r i n g c o l l a b o r a t i o n s between stakeholders thinking about power from the onset amongst stakeholders to deliver resilient, long-battery-life, and application-oriented solutions. A key feature of EnerHarv is the functional demonstrations, where attendees can touch and see the work in person. The demonstrations covered the use of transducers, energy storage, PMICs, and sensor telemetry data from various WSN implementations. Supporting aspects of the ecosystem, such as battery characterization, were demonstrated along with some realworld (shipping and proof-of-concept) products and applications. The PSMA EHC expects EnerHarv 2024 to be held in Europe and is actively recruiting interested participants to help plan, sponsor, and participate. To get involved please contact the PSMA office at power@ psma.com.

Conclusion PSMA sponsored workshops, such as EnerHarv, provide an opportunity to identify and increase awareness and knowledge of emerging trends that impact the power sources and conversion devices community. For a current listing of upcoming events visit the PSMA website at https://www. psma.com/news/Calendar-of-events. To become a PSM A member v isit h t t p s : // w w w. p s m a . c o m / w e b f o r m s / psma-membership-application.

About the Author Renee Yawger (renee.yawger@epc-co. com) is the Director of Marketing at Efficient Power Conversion Corporation (EPC) and the Director of Corporate Marketing at EPC Space. She has over 25 years of sales and marketing experience within the semiconductor industry. Prior to joining EPC, she was at Vishay Siliconix for nearly 15 years in various positions in sales support, customer service, and regional marketing. At EPC, she is responsible for the product marketing and marketing communication functions globally. She is also the Vice President of the Board of Directors at PSMA.



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Advanced Inverter Interactions With Electric Grids by Leo Casey, Johan H. Enslin, Géza Joós, Mark Siira, Bogdan Borowy, and Chase Sun

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he evolution of advanced inverter-based resources (IBR) is closely coupled with the growth of their applications in electric power networks. Most applications of inverters during this transition were grid-following (GFL) inverters. As IBRs gradually displaced rotating synchronous generators in electric power grid applications, issues such as the behavior of low-inertia grids, local needs for voltage support, and ride-though requirements led to the first interconnection requirements. The initial DER standard, IEEE Std 1547-2003, had to be adapted to the new context and led to the revised standard, IEEE  Std  15472018 and later the IEEE Std 2800-2022 for transmission IBR systems. In this article, the various inverter operating modes and functions of modern

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inverters are described. A focus on the comparison of GFL and grid-forming (GFM) inverters based on a more comprehensive white paper developed by the SCC-21 Task Force on Advanced Inverters supporting industry standards is needed in the next few years to reduce system-wide IBR events on the electric system.

Introduction Large inverter-based system events have been experienced by power utilities world-wide. The Odessa events [1] resulted in an instantaneous loss of 1,116 MW of IBRs associated with photovoltaic (PV) and the ERCOT system frequency went down from 60 to 59.2 Hz in a matter of cycles (Figure 1) on 4 June 2022 during midday with high solar PV power generation. These events may limit the wide-scale adoption of IBRs and thus the integration of renewable energy generation. It is therefore important for the power community to address the concerns with IBRs. This article describes the concepts of advanced inverters as they apply to various applications that in turn determine the inverter(s) functional characteristics. Inverter applications include the following: ■■Inverters in distribution grids: inverters used as distributed energy resource (DER) interfaces, including wind, solar PV, and battery energy storage systems (BESS) (IEEE Std 1547-2018). ■■Inverters in grid-connected and islanded microgrids (IEEE Std 2030.7-2021). ■■Inverters in standalone distribution grids: uninterruptible power supplies (UPS), islanded systems (islanded microgrids), and isolated/remote grids (IEEE 1562-2019, IEEE Std 2030.7-2017). ■■Inverters in larger transmission grids: IBR used in wind and solar farms, and static synchronous compensators (STATCOMs) (IEEE Std 2800-2022, IEEE Std 1052-2018). ■■Aggregated DER/IBR for grid services (IEEE Std 2030.11-2021).

Inverter Operating Modes Apart from limitations on the inverter’s short-circuit and over-current capability, the operation of the inverter is defined by control loops implemented to realize the required grid functions. In its simplest formulation, these are the pulse-width modulator, current limiters and reference voltage amplitude and frequency control. The resulting standard control loops include the following, as shown in Figure 2: a) Current or Power Control—This mode of operation allows independent control of active and reactive current/power, or P-Q control, as found in GFL inverters. This mode requires synchronization [typically using a phase-locked loop (PLL)] with the electric grid to which the inverter is connected so that power can be exchanged between the two synchronous sources, the inverter and the grid. This operation is like that of a synchronous machine synchronized to the grid and feeding active and reactive power into the grid. b) Voltage Amplitude and Angle/Frequency Control— This mode allows V-f control, as found in GFM inverters. This mode of operation requires an internal oscillator to set the frequency of inverter voltage and control of the amplitude of the inverter voltage. This operation is similar to a standalone synchronous generator (SG).

Inverter Control—Historical Note The concepts of P-Q, i.e., GFL, and V-f, i.e., GFM, control have been developed since inverters were first developed. From force-commutated thyristors to controllable devices, including the gate turn-off thyristor (GTO) and integrated gate-commutated thyristor (IGCT), the IGBT, and the newer silicon carbide (SiC) based MOSFETs and IGBTs. The terms grid-following and grid-forming inverter have been coined recently but are not new functions [2]. Several groups are developing roadmaps and design improvements to make IBRs more robust for integrating renewables into the grid [3].

FIG 1 ERCOT system frequency during Odessa-2022 fault [1].



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Inverter Interconnection For the entire history of the grid, SGs have been the interface between prime movers and the ac electric grid. SGs have two attributes: ■■Direct control of the voltage (E) and frequency (ω) and/or the phase angle (δ) of the internal voltage (electromagnetic force EMF), interconnected through the equivalent synchronous reactance XL as shown in Figure 3. ■■Inertia of the rotating generators—The presence of inertia, which allows rotational energy to be stored as a flywheel, is key from the grid control and stability perspectives. In the early 2000s, IBRs showed minimal concerns since IBRs represented a small fraction of the total energy resources. As the penetration of inverter-interfaced systems increased, undesirable effects became a concern: ■■Intermittency and variability of the energy produced, which is not dispatchable. ■■Lack of inertia and inertial response capability. ■■Need for voltage and frequency reference sources for inverter synchronization.

Modes of Operation of Inverters Grid-Connected Inverters As described above, two modes of operation exist for inverters, as shown in Figure 2: ■■GFL mode, with inverter current or power control, and independent control of active and reactive current/power, or P-Q control, and grid synchronization.

■■GFM

mode, with inverter voltage amplitude and angle/ frequency control, or V-f control, to mimic closely the SG control modes shown in Figure 3. The inverter should be able to transition from one mode of operation to the other as required based on changing grid conditions.

Standalone and Islanded Power Systems A standalone system is a power system that is capable of generating or storing electric power to serve the ac and dc loads of the facility. By its nature, it cannot rely on, or synchronize with, an external distribution network to provide electric power. It uses only the power it generates and stores to supply loads. In this mode, the inverters will operate in the GFM mode to regulate voltage and frequency.

Microgrid Operation Microgrids have two steady-state modes of operation, as per IEEE Std 2030.7-2017: a) Grid-Connected Mode—In this mode, the microgridgenerating assets are directly connected to the electric grid to which the microgrid is connected; the inverters within the microgrid are operated in GFL mode with grid-connected. b) Islanded Mode—In this mode, the microgrid-generating assets alone supply the microgrid loads. At least one of the inverters within the microgrid is operated in GFM mode, typically the BESS inverter, in order to define the microgrid voltage and frequency and serve as a reference bus. It should be noted that if an inverter serves as the reference bus, SGs are synchronized to this bus and operated in P-Q mode, equivalent to the GFL mode.

Future Grid Requirements As the penetration of IBRs increases, particularly at the transmission level, there may be a need to transition more inverters from the GFL to the GFM modes to ensure the stability of the transmission grid under contingency operating conditions, particularly under momentary loss of generation or transmission. The requirements of the percentage of GFM versus GFL converters are not specified and may vary based on system configuration.

FIG 2 GFL and GFM inverter control modes.

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FIG 3 Synchronous generator control mode.

Inverter GFL and GFM Control Modes GFL and GFM Operation The answer to the following question regarding GFM versus GFL is fundamental: Can the inverter create/support the voltage and frequency of the grid (or microgrid)? If it can, then the inverter is GFM and generally has the characteristic of a voltage source typically accompanied with a droop characteristic in frequency. As the load increases, this control attribute is often referred to as frequency-watt control. If, on the other hand, the inverter derives phase, frequency, and voltage from the grid (or from the microgrid, i.e., from external signals), then the inverter is GFL and has characteristics of a current source. It may be valuable in this discussion to revisit SG operation. SGs are considered as having relatively high inertia and low impedance. The impedance of the machine is relatively high, typically between 0.2 and 1 per unit or higher, depending on the time frame considered (subtransient, transient, or steady state), and it can provide high fault currents. Considering fault currents from SGs and transformers in the conventional grid, from a short in the low-voltage section of the distribution system, the limiting impedance for fault currents is the substation transformer impedance, which is typically 10%, or approximately 0.1  per unit, based on the power rating of the transformer. Faults within facilities on the low-voltage system are typically limited by a network transformer impedance of approximately 4% of the local (transformer) rating. In both cases, the dominant series impedance is reactive; therefore, the fault current is reactive. Conversely, inverters have low output impedance, at least on a dynamic/transient basis; therefore, they could/should be able to source a high fault current. However, inverter thermal time constants are relatively short, typically less than 1 s; therefore, the impact of the fault on the inverter is an I2t effect, and the fault currents must be kept low (typically 1.1–1.4 per unit and only for a second or so). This level of fault current is not typically compatible with the fuses, breakers, and relays that make up the vast majority of protection systems today. IBR-based microgrids therefore require faster protection, such as solid-state protection. Inverter operation with regard to grid interactions, including behavior under stressed conditions and grid support (ancillary services), is largely determined by applicable standards. These standards extend the operating requirements beyond the basic GFM and GFL functions and are expected to be applicable to both. A few characteristics of operating profiles are defined in the most recent standards relevant to inverters. For inverters connected to distribution systems, IEEE Std 15472018 and UL 1741 define a range of requirements including active and reactive power support, frequency response with active power, and ride-through for both high- and low-voltage events. Similar operating requirements are proposed for inverters connected at the transmission level of electrical grids

in IEEE Std 2800-2022. This standard also defines fast frequency response (in lieu of inertia emulation) and operation under phase unbalance.

GFL and GFM Inverter Implementation The dc source of the inverter is assumed to have a constant voltage. The control is of the vector type and conducted in the dq(0) plane of the Park transformation of the threephase voltages and currents. The reference angle of the Park transformation applies to both the GFM and GFL functions of the inverter. For both GFM and GFL functions, a current controller is implemented. It controls the flow through the ac line according to a reference created either by a voltage controller (GFM) or by active and reactive power controllers (GFL). The output is a voltage signal driving the modulation of the inverter power switches. For GFM inverters, there exists a voltage controller for the voltage on the PCC side of the filter. Its reference is sourced from power controllers. The output is a reference current for the current loop controller. Active and reactive power controllers generate reference signals either for the voltage controller of GFM inverters or for the current controller of GFL inverters. The active power controllers for GFL inverters are defined by the availability of the primary power source, while the power controllers for GFL are driven by controllers using frequency and voltage at the PCC. For GFM inverters, the active power controller defines the angle of the inverse Park transformation for the modulation of the inverter power switches, while a PLL serves for GFL inverters. For the power controllers, there might be additional control loops defining specific operating paradigms. The voltage and current controllers are proportional-integral controllers, while the power controllers are proportional controllers.

Grid Interconnection Requirements General Inverter Features and Requirements Inverter Control Power systems balance generation and load in real time. Currently, conventional power generation units are used to balance the intermittent and variable output of RES to meet load demand and maintain power stability. However, if all of the conventional units are retired and replaced by RES due to climate concerns and the new IBRs cannot meet the dynamic load demand, the grid may be difficult to operate. However, meeting dynamic load demand is not an intrinsic function of an inverter. The backup and solution for intermittency is an energy source.

Transitions in Inverter Connection Status When the transition from grid-connected to standalone modes is considered, the basic role of the inverter changes. June 2023

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Some commercial inverters need to pause to change modes. The functional changes in inverter operation include the following: ■■From managing and optimizing power and energy on the grid to managing voltage and frequency when off-grid. ■■Island detection function used to transition to off-grid mode, replaced by a “grid returns” sensing function.

Fault Currents in Inverters Fault current operation of inverters is characterized by the following: a) Short-Circuit Capability—Typically, the short-circuit current of an inverter is in the range of 1.5 pu based on the inverter rating; this current is limited by the inverter switching device’s current ratings and is a short-time rating. Therefore, either the protection system needs to be changed to become more sensitive and activate at lower currents, or other mechanisms need to be employed to achieve higher fault currents than the inverters can naturally supply. b) Nature of the Fault Currents—The inverter can produce only positive sequence voltage and, when feeding a balanced grid, positive sequence current. Under unbalanced fault conditions, the inverter cannot supply negative sequence current as an SG can. It can be equipped with a current control loop that can provide some negative sequence current if required.

equipment recalls and recertifications of wind and PV inverters in leading renewable grids such as Germany, China, and Australia over the past 15 years. Forensics have revealed that many of the issues relate to problems with following phase (and frequency) during transient events and often the setting of parameters related to voltage and frequency ranges, which incorrectly result in the tripping of substantial resources. The Blue Cut, Canyon, and Odessa grid events are all hailed by many in the GFM community as fundamental GFM events. In truth they were all ride-through trip events related to frequency and/ or phase deviations. Ride-through standards began as no-trip standards from FERC Order 661 for wind power in the bulk power system. Ride-through, or no-trip, requirements typically defined in grid codes include the following as shown in IEEE 2800-2022 (Figures 4 and 5) [12]:

Grid Support Functions

Many functions can be programmed in the inverter control system to take advantage of the independent control of the active and reactive power control of the inverter. The more useful functions include the following: a) Reactive Power Control—Volt-Var Function—This function implements voltage regulation and support by injecting inductive or capacitive power as the voltage rises above, or drops below, set values. b) Active Power Control—Volt-Watt Function—This function implements active power reductions, as the voltage Grid Code Requirements for Inverters varies outside the allowable range. In particular, it allows active power curtailment as the voltage at the Ride-Through Requirements inverter terminal increases. If this function is active, the The codes and standards that relate to these ride-through MPPT function must be disabled. issues have evolved over time, and there have been major c) Active Power Control—Frequency-Watt Function— This function implements active power increase, as the frequency drops below a set value, in support of the frequency, or reductions, as the frequency increase above a set value. Another function requested in recent grid codes is the capability for inverters to inject negative sequence current components in proportion to the amount of unbalance in grid voltages. These are typically the result of unbalanced short circuits in the grid, mostly single-phase to ground faults. Negative sequence current injection is implemented to allow the use of conventional sequence component relays to detect faults. FIG 4 Voltage ride-through requirements for IBRs (voltages below 500 kV) [12].

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Advanced Functions Other advanced functions include the following: a) Fast Frequency Response—This function can be implemented to support the frequency in the event of a contingency by fast injection-controlled amounts of active power in support of the frequency and reducing the rate of change and depth of change of frequency. b) Power System Stabilization—This function can be used to damp oscillation in power grids between different generating stations and areas (inter-area oscillations). c) Active Harmonic Filtering—This function can be used to reduce large low-frequency harmonics flowing in the power grid. It assumes that the inverter rating allows this function to be implemented.

voltages changes significantly: an overcurrent in the line results.

Requirements for Connecting Inverters to the Same AC Bus If inverters are connected in parallel, there needs to be a reference bus, which defines the voltage and frequency. This reference bus today is provided by the grid voltage typically defined by a large dispatchable central power plant, with a stable voltage and frequency output, to which all inverters are synchronized and operated in GFL mode. The central power plant could be an IBR, operated in GFM mode.

Methods of Paralleling Inverters Black Start Capabilities IBRs can be used as reference generators and define a grid voltage (using a voltage regulator) and frequency (using an internal clock), independently of the presence of any electric grid. Known as the IBR GFM mode, this mode is the principle of operation for UPS operated in emergency conditions. However, to supply loads, sufficient energy needs to be available, e.g., a BESS or an IBR fed from renewable sources balanced by means of a BESS. Power system restoration is achieved by resynchronizing generators, rotating or IBR, to the restored grid.

Inverter Power Exchange Considerations Relation Between the Voltages of AC Sources Exchanging Active Power

The conventional means of paralleling IBRs is the same as paralleling SGs: a droop method (frequency droop for active power sharing and voltage for reactive power sharing) can be implemented if communications systems are not used. However, it should be noted that the droop method may result in unacceptable frequency and voltage variations as the load changes. In addition, setting the droop values may be difficult, given that RES generators are not dispatchable. An alternate means of paralleling is to operate rotating generators in isochronous mode, at constant speed or frequency regardless of the load. The isochronous method requires communication between generators and a centralized control system for sharing active power. The same approach is implemented with IBRs in microgrids. A control system is required in microgrids operating in grid-connected mode.

For two ac sources to exchange active power, the phase angle between the two sources, combined with Inverter Synchronization Mechanisms and PLL Operation the reactance of the line connecting these sources, When two voltage sources are connected to the same along with the magnitude of the voltages, defines the ac bus, and assuming one is setting the reference amount of power that can be transferred. Any frequency change translates into an angle change and changes the instantaneous amount of power exchanged. If the angle difference exceeds a maximum value, synchronism is lost, there is no longer any power exchange, and the two sources are isolated. If any of the two sources co ntinue s t o prod u c e power, an overvoltage or an overspeed results, unless power production is reduced to zero. A similar phenomenon occurs i f o n e o f t h e s o u r c e FIG 5 Frequency ride-through requirements for IBRs [12].

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voltage, the second source needs to be synchronized to the first for active power exchange to be initiated. Synchronization requires that the voltage, frequency, and phase angle of the second source be made equal to those of the first source before the second source can be connected to the first. For the second source to synchronize to the first one, the second source must know the frequency, phase, and magnitude of the voltage of the first source. In its simplest form, this knowledge can be obtained from a zero crossing of voltage produced by the first source. However, this zero crossing is difficult to determine when the voltage is distorted or has gaps and interruptions. A better approach is the use of a circuit that tracks and locks on to the voltage waveform, a phase locked loop (PLL). The PLL uses an integrator to ensure that the phase error is zero. During a voltage or frequency event, the shift in the source voltage results in an improper phase relationship between the currents injected by the second source and therefore incorrect values of active and reactive power injections. While an incorrect power injection does not result in an unstable system, it may lead to large undesirable active and reactive power swings and oscillations.

Impact of Grid Phase Angle Jumps A phenomenon that transiently generates a change in voltage angle and possibly voltage magnitude in one of the ac sources is the phase angle jump. It impacts both the instantaneous phase angle and the voltage differences between the two connected sources. It may result in large variations of power exchanges between the two sources and of the current flowing between the two sources.

System Strength If the electric grid is spread over a wide area, the system strength (or capacity to maintain a constant voltage) or short-circuit capacity decreases. The instantaneous voltage and frequency, particularly in the farthest removed areas, may differ from those of the reference generator in the larger area. The issues then are whether the remote IBR have a strong enough reference bus to which to synchronize and whether a hybrid operation, i.e., a combination GFL and GFM modes, can be devised.

Advanced Inverter Challenges Meeting System Ramping Requirements The transient response, or ramping rate, of the active power regulator of an IBR can be made much faster than that of an SG. The SG limitations are associated with the prime mover governor response. The fast response of the IBR can be used to better track load changes and variations and to provide fast frequency response. The same fast inverter response can be obtained from the reactive

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power regulator. Fast reactive power injection allows closer tracking of the voltage variations at the node to which the IBR is connected.

Implementing Inertial Response With Inverters Although the lack of inertia for IBRs can be compensated to some extent by fast active power response, the speed of response may be limited by the speed at which the energy can be extracted from the source feeding the IBR. RES, such solar PV generators, cannot provide fast active power injection or absorption. In wind turbine generators, power can be momentarily extracted from rotating masses, but the amount of power is dependent on the speed of rotation of the turbine (wind speed). Absorbing and storing energy in the rotating masses of wind turbines may be difficult, as storing energy requires an increase in the turbine speed. Virtual inertia may be added by the IBR with adequate control and DC-link energy storage.

Transitioning From GFL to GFM SGs are capable of switching from GFL to GFM mode because the prime mover defines the generator frequency and the field excitation defines the magnitude of the generated voltage, independently of whether a grid connection exists. In the absence of a grid for synchronization, the generator naturally produces a voltage with a frequency corresponding to the speed of the prime mover and a voltage proportional to the applied excitation voltage and speed of rotation. In addition, the mechanical energy stored in rotating masses can provide the required energy to balance load and generation under transient loading conditions until the generator governor adjusts its excitation and power level to supply the additional load. SGs therefore naturally achieve the transition from GFL in grid-connected mode to GFM in islanded mode and use their inertial energy to provide power balance during the transitions. One instance where the transition of an IBR from GFL to GFM is straightforward is for microgrids transitioning from grid-connected mode to islanded mode. When this transition occurs, the signal initiating the transition is provided by the grid operator or the islanding detection relay and the opening of the breaker feeding the microgrid. This transition command is used to change the mode of operation from GFL to GFM for an IBR used as the reference generator in islanded mode. The transition can occur in a seamless manner or require a black start of the microgrid. The last option is easier to implement.

Conclusion New standards and guides may be required for IBR operation and to specify the respective roles of GFL and GFM operating modes. This will reduce inverter-based system events experienced by power utilities world-wide and

increase the adoption rate of renewable energy. This will define transition of the IBR from GFL mode to GFM mode to enhance the reliability of the electric grid. Some standards already implicitly define GFL and GFM modes of operation in a limited number of applications. Such is the case for a microgrid. The IBR operate in GFL mode in a grid-connected microgrid, and one IBR can be operated in GFM in an islanded microgrid. This IBR defines the microgrid voltage and frequency reference for islanded mode. The operation of IBR in future grids, either in GFL mode or GFM mode, will depend upon grid operating requirements as more RES are deployed.

About the Authors Leo Casey, Ph.D. (Fellow, IEEE) is the Power Systems Lead Engineer at Google X. Prior to that, he was Satcon’s Chief Technology Officer and EVP of Engineering. He has over 35 years of experience in power electronics and power engineering, including ultimate responsibility for the design and commercialization of numerous utility scale power conversion products. He received the B.S. degree from the University of Auckland, Auckland, New Zealand, and the M.S. and Ph.D. degrees from the Massachusetts Institute of Technology, Cambridge, MA, USA. He is a member of IEEE SCC21Task Force on Advanced Inverters. Johan H. Enslin, Ph.D. ([email protected]) (Fellow, IEEE) is the Duke Energy Endowed Chaired Professor in Smart Grid at Clemson University, North Charleston, SC, USA. He has combined a 40-year career with leadership in industry and academia, in the US, Europe, and South Africa. He is a life-long leader in the IEEE and CIGRÉ working groups and committees and serves currently as the VicePresident Industry and Standards at the IEEE Power Electronics Society. He is a member of IEEE SCC-21Task Force on Advanced Inverters. Géza Joós, Ph.D. (Fellow, IEEE) is a Professor of electrical and computer engineering at McGill University, Montreal, QC, Canada, where he holds the NSERC/Hydro-Quebec Industrial Research Chair on the Integration of Renewable Energies and Distributed Generation into the Electric Distribution Grid. He held positions in industry (ABB Canada), and academia (Concordia University, Canada). He is active in IEEE Standards Development and CIGRE working groups. He is a member of IEEE SCC-21Task Force on Advanced Inverters. Mark Siira is the Chairperson of IEEE Standards Coordinating Committee (Sponsor for IEEE 1547, IEEE 2800, and IEEE 2030 standards) IEEE-SA. The IEEE SC21 oversees the development of standards in the areas of smart grid interoperability, fuel cells, photovoltaics (PVs), dispersed generation, and energy storage. SC21 reports directly to the



IEEE-SA Standards Board. He received the M.B.A. degree from Harvard and the B.S.M.E. degree from Kettering University. He is a member of IEEE SCC-21Task Force on Advanced Inverters. Bogdan Borowy, Ph.D. is the Senior Chief Engineer at Eaton Research Labs, Milwaukee, WI, USA. He has more than 35 years of corporate and academic research and development experience with a Ph.D. degree from the University of Massachusetts, USA. He has domain expertise combining power electronics, power converters, motor drives, power systems, modeling and simulations, dynamic control, automated reasoning, optimization, design of embedded systems, artificial intelligence, and robotics. He is a member of IEEE SCC-21Task Force on Advanced Inverters. Chase Sun, P.E. is a Retired Principal Engineer with PG&E, San Francisco, CA, USA. He joined PG&E in 1977 and worked in various departments including, distribution planning, switchyard engineering, alternative energy engineering, power plant engineering, station construction, project management, substation asset management, distribution protection, substation maintenance, and transmission planning. He was on the IEEE-929, and Rule 21 standard working groups. He received the B.S.E.E. degree from UC Berkeley and a licensed Electrical Engineer in California, since 1981. He is a member of IEEE SCC21Task Force on Advanced Inverters.

References

[1] NERC, “2022 Odessa disturbance—Texas event: June 4, 2022,” North Amer. Electr. Reliability Corp., Atlanta, GA, USA, Tech. Rep. NERC-2022, Dec. 2022. [2] D. Pattabiraman, R. H. Lasseter, and T. M. Jahns, “Comparison of grid following and grid forming control for a high inverter penetration power system,” in Proc. IEEE Power Energy Soc. Gen. Meeting (PESGM), Portland, OR, USA, Aug. 2018, pp. 1–5. [3] Y. Lin et al., “Research roadmap on grid-forming inverters,” IEEE-SA Standards Board, Tech. Rep. NREL/TP-5D00-73476, Nov. 2020. [4] FERC Order 661, Final Rule on Interconnection for Wind Energy, IEEE-SA Standards Board, 2005. [5] IEEE Recommended Practice for Utility Interface of Photovoltaic (PV) Systems, IEEE Standard 929-2000, Jan. 2000. [6] IEEE Recommended Practice for Testing the Performance of Photovoltaic Systems, IEEE Standard 1526-2020, Dec. 2020. [7] IEEE Standard for Interconnection and Interoperability of Distributed Energy Resources With Associated Electric Power Systems Interfaces, IEEE Standard 1547-2018, Feb. 2018. [8] IEEE Recommended Practice for Sizing of Stand-Alone Photovoltaic (PV) Systems, IEEE Standard 1562-2021, Jun. 2021. [9] IEEE Standard for the Specification of Microgrid Controllers, IEEE Standard 2030.7-2017, Jan. 2017. [10] IEEE Standard for the Testing of Microgrid Controllers, IEEE Standard 2030.8-2018, Jun. 2018. [11] IEEE Guide for Distributed Energy Resources Management Systems (DERMS) Functional Specification, IEEE Standard 2030.11-2021, Apr. 2021. [12] IEEE Standard for Interconnection and Interoperability of InverterBased Resources Interconnecting With Associated Transmission Systems, IEEE Standard 2800-2022, Feb. 2022. [13] Inverters, Converters, Controllers and Interconnection System Equipment for Use With Distributed Energy Resources, Standard UL 1741, 3rd ed, Sep. 2021.

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H2-Orange: Finding Energy Storage Solutions for Decarbonizing Generation by Thomas Koeppe, Johan H. Enslin, Tony Putman, Mark Johnson, and Peter Hoeflich

T

his article describes the objectives and key results from a feasibility study about using hydrogen (H2) generation and storage in a co-firing project sponsored by the U.S. Department of Energy (DOE) named H2 Orange. The work includes a conceptual design, including a technoeconomic study, technology gap assessment, maturation plan, and commercialization plan of a nominal 50-megawatt hours (MWh) electrolysisbased hydrogen energy storage system. The project investigated optimal sizing,

Digital Object Identifier 10.1109/MPEL.2023.3271200 Date of publication: 27 June 2023

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or various industries and applications. When hydrogen is burned, it When utilized in an produces thermal energy, primarily appropriate emitting water vapor as a byproduct. When utilized in an appropriate generating asset such generating asset such as a gas turas a gas turbine, bine, hydrogen can be a zero carbonemitting load following resource hydrogen can be a (“ZELFR”), enabling more grid-conzero carbon-emitting nected renewable resources in gridtied and microgrid operations. With load following appropriate modifications to the gas resource (“ZELFR”), turbines using known available technologies and the development of a enabling more gridrobust hydrogen supply chain, hydroconnected renewable gen has the potential to become an economically viable resource in elecresources in grid-tied tric power systems. In doing this, and microgrid hydrogen could reduce the use of Introduction operations. fossil fuels in electric power generaIn the essential journey to decarbonize tion through the integration of more the electric power supply, more renewables for power generation and renewable energy is being deployed, using non-carbon emitting baseload representing 22% of the annual U.S. generating assets for load following. electricity share in 2022 [1]. To maintain a reliable and resilSince early 2021, Clemson University, Duke Energy, ient grid, energy storage and dispatchable generation, and and Siemens Energy have collaborated on a DOE project controllable load assets are required to balance the intermit[4] to explore the use of electrolysis based hydrogen for tent renewable power generation. Although various individgrid-level electric energy storage and as a low/no carual battery and hydroelectric energy storage technologies bon fuel source for a CHP as a way to cost effectively are available today, economically viable solutions for disdecarbonize a university size facility as shown in Figtributed, long duration storage approaches that are resilient ure 1. The project, called H 2 -Orange, evaluated hydroand dispatchable need to be further developed. Although, a hydrogen economy is not a new concept [2], it is of renewed gen production, storage, and co-firing with natural gas. interest due to the improved electrolyzer technologies proThe team studied the use of Siemens’ Silyzer electrolyzer viding a pathway to cost reduction for hydrogen production technology to produce hydrogen fuel to help power the to less than $1/kg [2] in one decade [3]. This motivates the existing SGT-400 natural gas turbine at the Duke Energy need to explore the mitigation challenges with integrating operated Clemson based CHP plant. The Silyzer can use large levels of non-dispatchable and variable renewable electricity from renewable and clean energy sources to energy (i.e., offshore wind and solar PV) to the power grid. produce hydrogen without carbon emissions. The straAs an energy carrier and storage technology, hydrogen tegic project unites all three organizations in helping to in hybrid networks, including electrical, gas, and hydroachieve respective decarbonization goals: Duke Energy gen have a very bright future in the quest to decarbonize aiming to cut carbon emissions by 50% by 2030 and fossil fuel generation. The role of power electronics as the attaining net-zero by 2050, Siemens Energy supporting interface between these different hydrogen production customers in transitioning to a more sustainable world, and storing technologies, as well as connecting different and the university striving to achieve net neutrality of energy networks, will be more important in the future. Sevcarbon emissions by 2030. eral medium and high voltage (MV & HV) power electronic converters are required in the PV and wind energy converDecarbonizing University Campus sion systems, H2 electrolyzers, battery storage and variable In 2019, Duke Energy completed construction and speed CHP generating plants, and even interconnecting started operating a state-of-the-art 14.3-MW CHP plant at electrical transmission with H2 networks in the future. the Clemson University campus in South Carolina. The CHP plant produces electricity and utilizes residual heat Hydrogen and hydrogen-based fuels are showing promto provide steam to the 1,400-acre campus, with an ise as zero- or low-carbon alternatives to carbon-based enrolled student body of about 25,000 students. Duke fuels. Hydrogen can be produced by electrolysis from Energy continues to own and operate the CHP asset, diswater and electricity, stored over long durations even tributing energy to the grid, and supplying steam directly for months in the form of chemical bond enthalpy, and to Clemson University. utilized for either subsequent electric power generation design, and integration of a hydrogen energy storage system with an existing 14.3-megawatt (MW) gas turbine supplying both electricity and thermal power at the Clemson University combined heat and power (CHP) plant. It is anticipated that the integration of H2 storage with CHP will be able to provide the Clemson campus with backup capability (power and steam) that includes on-site solar photovoltaic (PV) arrays and separate battery energy storage. Power electronic conversion technologies are of key relevance to hydrogen storage for decarbonizing fossil fuel generators at all levels of this project.



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FIG 1 Clemson University 14.3 MW CHP plant.

determine the most cost-effective pathway to decarbonUsing Siemens Energy’s multi-model energy system optiizing the Clemson University campus, an additional five mization software, the various electric, heating, and cooling scenarios were analyzed with 20%, 40%, 60%, 80%, and energy demands were analyzed for the entire campus. The 100% reduction of CO2 levels from the reference scenario optimization model was formulated as a mixed-integer linear program based on an energy superstructure approach, as a model constraint. In this model, H2 is assumed to be considering both the existing energy assets along with the available whenever needed with two scenarios assuming following new assets under consideration: an on-campus either $4.50/kg or $2.00/kg as shown in Figure 2 [4]. PV array, solar power purchase agreement (PPA), Li-ion To decarbonize the campus, the least-cost solutions battery energy storage, chilled water storage, and thermal consist of a combination of various technologies and storage as well as the ability to co-fire H2 in the on-campus assets. The operating (OPEX) and capital costs (CAPEX) described here as TOTEX. Scenarios above 60% CO2 reduccombined-cycle CHP facility. The optimization problem was formulated for a refertion see a significant TOTEX costs that increase greater ence year using a model that assumes perfect foresight than 2×. With a hydrogen price of $2.00/kg, hydrogen is (with forecasted referenced data) selected for 40% CO2 reduction scewith an hourly resolution which nario in combination with Li-Ion batallowed the model to capture intrateries. For deep decarbonization, it’s Technology day fluctuations in energy supply not hydrogen “or” battery energy storand demand while still allowing for age systems (BESS) but rather hydroadvancements and optimization over a typical year. The gen “and” BESS to address both the cost reductions will be optimization model solves for the heat and electricity demand for short required before lowest net present cost of supplying and longer term. the required energy demands under Although, using hydrogen in rehydrogen storage can varying CO2 emissions constraints. electrification or CHP applications become a viable longdoes not provide least cost generaA reference scenario was solved tion today, it is a deep decarbononly considering the existing camduration storage ization technology for the future. pus assets without a CO2 constraint option. Technology advancements and cost to establish a baseline for comreductions will be required before parison to further scenarios. To

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FIG 2 Totex of Clemson campus decarbonization scenarios[4].

electrolyzer, >20 MWh of hydrogen storage, and a 14.3 MW hydrogen storage can become a viable long-duration gas turbine with hydrogen cofiring capability as shown in storage option. Much of this required technological Figure 4.    development is identical to that needed for the broader Co-location of hydrogen production and consumption adoption of hydrogen as a fuel, including improved introduces synergies, reducing the initial investment hydrogen production efficiencies, reduced costs and with limited hydrogen transportation infrastructure scaling. In addition, hydrogen storage technologies must needed. In the case of the Clemson project, a CAPEX be improved including non-geological storage (e.g., comsavings could be achieved by utilizing the demineralized pressed hydrogen, liquified hydrogen, metal hydride water and instrument air from the existing CHP plant storage, ammonia storage, and others) to improve the and implementing a water-cooling tower compared to a viability of large-scale use. typical fin-fan cooler. Additional savings are foreseen by Advancements in hydrogen technologies and comutilizing a common control room and personnel with the mercial demonstrations are needed to address current CHP plant. hydrogen limitations. The industrial SGT-400 gas turUsing hydrogen in CHP applications has benefits and bine at Duke Energy’s CHP located on Clemson Univerchallenges. With CHP plants offering 80%–90% efficiensity’s campus offers a unique opportunity to evaluate cies, the energy content of the fuel is effectively converted hydrogen as a dispatchable low-carbon fuel for decarto electricity and thermal energy. High-capacity factors bonization of the campus steam and grid generation. and seasonal operating steam profiles are challenges for The industrial combustion turbine with a 14.3 MW hydrogen CHP applications, since a significant amount of output has a similar design and uses similar technolostorage is required. Green hydrogen offers an alternative gies to larger combustion turbines which will allow for feedstock that is non-fossil based, learnings at Clemson to be scaled. serving as an additional fuel or backTo achieve similar hydrogen blends up fuel improving overall reliability at a typical utility-scale combusCo-location of and resiliency. tion turbine would require larger It was recently projected that hydrogen process equipment, piphydrogen production Duke Energy’s Carolina Combined ing and combustion turbine scope and consumption Cycles units could experience a and significantly higher demon>3× increase in starts mainly due stration costs. introduces synergies, to the increased amount of interThe proposed 8 MW demonstrareducing the initial mittent renewable generation. It is tion concept is summarized below investment with expected that the operating profile in Figure 3 [5]. of fossil fuel assets will be posilimited hydrogen tively impacted through the flexDemonstration Project transportation ibility, starting, and fast ramp-up The proposed H2-Orange demonstracapability (10% power rating per tion project is a hydrogen energy storinfrastructure second) of PEM electrolyzers by coage system integrated with the CHP needed. locating a hydrogen storage system plant, consisting of an advanced 8 MW with a fossil asset. These operating proton exchange membrane (PEM)

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FIG 3 The 8 MW hydrogen storage system concept.

FIG 4 H2-Orange 8 MW demonstration plant rendering.

profiles will be evaluated as part of the project where the H 2 storage system will be co-located on campus with the CHP plant and several PV generating assets. It is projected that 25% of the global power sector is expected to be fueled by hydrogen by 2050. Development, demonstration, and deployment of this technology today is necessary to ensure our deep decarbonization goals will be met in the future, with the H 2 -Orange project uniquely addressing multiple aspects including hydrogen storage, combustion, and system integration. Hydrogen storage can leverage existing assets for storage

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Hydrogen storage can leverage existing assets for storage while simultaneously reducing the assets impacts from flexible operation resulting from the increased capacity of variable renewable energy (VRE) resources.

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while simultaneously reducing the assets impacts from flexible operation resulting from the increased capacity of variable renewable energy (VRE) resources. The advancement of hydrogen combustion in a gas turbine is integral to this work and provides significant benefits as an option to achieve a zero-carbon future. The Duke Energy CHP at Clemson brings all these aspects together with its 14.3 MW size and corresponding availability of hydrogen technology, plans of local PV installation, and alignments with Clemson’s, Duke Energy’s, and Siemens Energy’s decarbonization goals.

Summary The collaborative industry-university team, with Duke Energy as the asset owner and local utility, Siemens Energy as the technology owner, and Clemson University as academia, site owner, and beneficiary of the steam, is a unique arrangement allowing for a comprehensive understanding of the application of hydrogen energy storage systems. The study indicates a critical hydrogen utilization point occurring around 2040 with increased electrolyzer activity triggered by 80% CO2 reduction. This work strongly supports the reduced and zero carbon goals which all three partners share along with most utilities, universities, and industries in the nation.

About the Authors Thomas Koeppe is the Head of business development and innovation with Siemens Energy. In this role, he is responsible for driving the development of new business strategies as part of the energy industry’s transition. He has over 18 years of experience in the energy industry, including the development of the SGT-9000HL product line with key responsibilities for the modularization strategy, product architecture, hydrogen, and portfolio business development. He is also active in decarbonization initiatives for both hydrogen and BESSs. He is serving on the board of directors for Southeast Hydrogen Energy Alliance and the project lead for H 2 -Orange. He received the B.Sc. degree in mechanical engineering from the University of Waterloo, Canada. Johan H. Enslin, Ph.D. ([email protected]) is the Duke Energy Endowed Chaired Professor in Smart Grid at Clemson University, North Charleston, SC, USA. He has combined a 40-year career with leadership in industry and academia, in the US, Europe, and South Africa. He served as an Executive for private business operations and a Professor in electrical engineering. He authored and co-authored more than 350 technical journal articles and conference papers for IEEE and other organizations and has written several chapters in scientific books. He is a Life-Long Leader in the IEEE and CIGRÉ working groups and committees and serves currently as the PELS Vice-President Industry and Standards. He holds more than 30 provisional and final patents. He received the 2014 Charlotte Business Journal Energy Leadership Award. He is a Registered Professional Engineer in South Africa, Fellow of the SAIEE, and Fellow of IEEE. Tony Putman is the Executive Director of Utility Services with Clemson University Facilities. He leads the Utilities and Energy Department, which is



responsible for energy management, electrical and water distribution, energy and wastewater treatment plant operations, and operational sustainability initiatives for the university. He is a Registered Professional Engineer, certified educational facilities professional with over 35 years of professional experience, holds a B.S.M.E. degree from Clemson University, and the masters’ degree from Augusta University and University of South Carolina. Mark Johnson, Ph.D. is a Professor of materials science and engineering and the Director of the Center for Advanced Manufacturing, Clemson University, where he holds the Thomas F. Hash Endowed Chair in sustainable development. His research focuses on the investigation of clean-energy technologies and innovation in advanced manufacturing, new materials, and semiconductor technologies. In his career, he has been an Entrepreneur, an Academician, and a Government Official. Prior to joining Clemson, he was the Director of the advanced manufacturing office for the U.S. Department of Energy (DOE) and was one of the earliest Program Directors in establishing ARPA-E. He received the B.S. degree from MIT and the Ph.D. degree from NC State, both in materials science and engineering. Peter Hoeflich is the Director of generation technology in Duke Energy’s Generation and Transmission Strategy Organization. In his role, he evaluates emerging generation and long duration storage technologies. Additionally, his group works with appropriate internal and external organizations to determine regulatory, policy, and business implications related to the potential implementation of these technologies. He has over 30 years of experience in the energy and power generation industries. During that time, he has served in various leadership and technical roles. He received the bachelor of science degree in mechanical engineering from Grove City College and the master of business administration degree from Ohio State.

References

[1] STEO. (May 2023). EIA: Short-Term Energy Outlook. [Online]. Available: https://www.eia.gov/outlooks/steo/pdf/steo_full.pdf [2] J. Enslin and F. Profurmo, “Role of power electronics in distributed power and the hydrogen economy,” in Proc. FEPPCON, Aeolian Islands, Italy, May 2004, pp. 1–7. [3] (Sep. 2022). DOE National Clean Hydrogen Strategy and Roadmap. [Online]. Available: https://www.energy.gov/eere/fuelcells/hydrogen-shot [4] (Feb. 27, 2023). DOE National Clean Hydrogen Strategy and Roadmap, Draft—September 2022. [Online]. Available: https://www.hydrogen.energy. gov/pdfs/clean-hydrogen-strategy-roadmap.pdf [5] T. Koeppe, “Clemson hydrogen combined heat and power storage system,” Siemens Energy, Charlotte, NC, USA, DOE Award, Final Rep. DE-FE0032006, May 2022. 

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Energy-Storage Enhanced STATCOMs for Wind Power Plants by Fangzhou Zhao, Xiongfei Wang, Zichao Zhou, Lexuan Meng, Jean-Philippe Hasler, Jan R. Svensson, Lukasz Kocewiak, Haofeng Bai, and Hongyang Zhang

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he past years have seen a rapid increase in the deployment of largescale wind power plants (WPPs) in transmission grids. The dynamic interactions between wind turbines (WTs), power transmission cables, and other electrical infrastructure of WPPs pose challenges to the stability and quality of electricity supply, particularly under

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when it comes to providing active diverse grid conditions. The interacpower-related grid services, such as tions tend to be worsened with lonIn real applications, inertial response. ger transmission cables [1]. A the available services Recently, the energy-storage harmonic instability issue that feaenhanced STATCOM (E-STATOM) tures a 451 Hz resonance is maniof E-STATCOM often emerges as a promising alternative fested in an offshore WPP located in needs to be prioritized solution [7], [8]. The E-STATCOM the North Sea [2]. During a submarine integrates the energy storage syscable outage, an offshore WPP situin different scenarios tem, e.g., supercapacitor or battery, ated in England encountered instabilto comply with the into STATCOM, and is equipped ity due to sub-synchronous with the grid-forming (GFM) conresonance at around 8.5 Hz [3]. specific requirements trol, therefore offering multiple Several control and hardware outlined in local grid benefits to WPPs: 1) securing stasolutions are thus developed to ble operations of WPPs under varyaddress the stability and power qualcodes due to the ing grid conditions, 2) supporting ity issues with large-scale WPPs [4], limitations of capacity WPPs to comply with the evolving [5]. One conventional solution is to grid-code requirements [9], e.g., the use a static synchronous compensaand cost of black-start capability and islanded tor (STATCOM) with grid-following E-STATCOM. operation requirement, and 3) pro(GFL) control to provide reactive viding ancillary services for addipower and shape voltage profile, tional revenue [5], [8]. For ease of which can improve offshore WPP reading, the main abbreviations used in this article is performance. However, this approach is insufficient to summarized in Table 1. stabilize the system when connected to an ultra-weak grid. In such cases, a grid-forming (GFM) control solution is more effective in enhancing voltage stiffness [6], but E-STATCOM for WPP note that both GFL and GFM STATCOM have limitations Figure 1 depicts a simplified system diagram of an offshore WPP, where the E-STATCOM is deployed at the point of interconnection (POI) of onshore grid. The WPP comprises fifty 8 MW WTs that are equipped with standard grid-follow–– Table 1. Abbreviations. ing control and is connected via a 160-kilometer-long transmission cable (220 kV) to the onshore grid (400 kV). Table 2 Energy-storage enhanced static E-STATCOM lists the potential services of E-STATCOM that are enabled synchronous compensator by the integrated energy storage system. The services are GFM Grid-forming explained in more detail in capability of Table 2, which furMMC Modular multilevel converter ther categorizes them based on operation modes of WPP. POI Point of interconnection Grid-connected mode of a WPP is illustrated in Figure 1, RoCoF Rate of change of frequency WPP Wind power plant while the islanded mode refers to the state where the WPP WT Wind turbine is disconnected from the onshore main grid and operates as STATCOM Static synchronous compensator a self-sustained power system. For example, the black start SCR Short circuit ratio service in islanded mode of WPP is a process of restoring a portion of the power system to operation without relying on

FIG 1 A simplified system diagram of an offshore WPP equipped with the E-STATCOM.



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––Table 2. Potential services/capabilities of E-STATCOM that are enabled by the energy storage for WPPs.

Battery

SuperService capacitor (E-STATCOM)

Capability (E-STATCOM)

Actively stabilize WPPs under varying grid strengths and Active sub-synchronous enhance the voltage stiffness to prevent adverse interactions resonance damping or oscillations Selective harmonic damping

Selectively dampen harmonic voltages at the POI of WPP with enhanced passivity-based design of harmonic resistances

Inertial response

Use the energy storage system to provide inertial response for slow down the rate of change of frequency (RoCoF)

System strength support

Provide grid strength support by limiting the consequences of power system events

Imbalance arbitrage

Provide additional capacity to compensate/balance wind forecast error and to address ramping issues

Frequency response

High- and low-frequency response to support the grid and the islanded WPP without the need for partial de-loading of WTs

Black start

Charge the local transmission system and enable the WPP to operate in the islanded mode with block loads

Soft-charging

Energize the cable network within WPP and provide the auxiliary power supply in the event of grid outage

the external power network, in the event of a total or partial shutdown. Two energy storage systems—battery and supercapacitor—are also considered for different services in Table 2. The battery is needed for WPPs operating in islanded mode and providing frequency services. Yet, for the inertial response, the E-STATCOM needs to react fast with the active power that is sustained over several seconds. Compared to batteries, supercapacitors are more suitable for inertial support, due to their high-power density which leads to a more compact footprint [7]. Further, supercapacitors have long cycle-life, low maintenance cost, and minimal power loss, which makes them a preferred energy storage for E-STATCOM to provide active power support on a timescale of seconds. In real applications, the available services of E-STATCOM often needs to be prioritized in different scenarios to comply with the specific requirements outlined in local grid codes due to the limitations of capacity and cost of E-STATCOM.

System Configuration of E-STATCOM Figure 2 depicts the system configuration of E-STATCOM, which employs a modular multilevel converter (MMC) and a centralized supercapacitor energy storage system at the dc link [8]. The MMC technology is based on the use of modular submodules, which are connected in series to create a multilevel voltage waveform. The use of multiple levels can effectively reduce harmonic distortion. Additionally, the cascaded submodule design of MMC enables low switching loss and reduces the voltage rating requirements for power semiconductors. These features make MMCs particularly well-suited for medium- and high-voltage power applications.

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Operation Mode (WPP) Grid-connected mode

Islanded mode

The MMC in Figure 2 employs full-bridge submodules [10], allowing for flexible control of the centralized energy storage system at dc-link. The separation of MMC and energy storage furnishes several benefits: 1) customized design specifications for MMC valve room and energy storage room with increased reliability, 2) being able to operate it as a traditional STATCOM by using only the MMC, and 3) high flexibility for the maintenance and safety. Supercapacitors can be operated across the full voltage range, facilitating efficient charging/discharging. Figure 3 illustrates the conceptual GFM control diagram of E-STATCOM. The GFM control has two basic properties [11]: 1) The GFM controlled converter operates as a voltage source behind an impedance. This is realized by the voltage control in Figure 3, where Vref is the voltage reference and ZV(s) represents the virtual impedance that is emulated through the control. Under grid disturbances, the voltage-source behavior prompts the E-STATCOM to provide a proper level of reactive current spontaneously to return the voltage to its nominal operating level. 2) The GFM controlled converter mimics the swing equation of synchronous machine. Therefore, the grid-synchronization of E-STATCOM is realized by the active power control to generate the angle as shown in Figure 3, which allows for more flexible design of the inertial response and system damping than legacy synchronous machines. A significant advantage of using GFM control is the high stability robustness in ultra-weak grids where the short circuit ratio (SCR) approaches 1 [5], [6]. The SCR is often used as a measure to determine the grid strength to maintain

stability. The system is seen as a weak grid when SCR is lower than 2.0 [12], while SCR approaching to 1.0 indicates an ultra-weak grid that can destabilize the WPP. The GFM control used in the E-STATCOM allows it to act like a voltage source, which helps to strengthen the voltage stability at the POI of the WPP. This, in turn, improves the equivalent SCR and helps to reduce the negative effects that the WPP might have on the power grid. Further, the E-STATCOM can be controlled to selectively dampen low-order (5th, 7th, …) harmonic voltages at the POI of WPP [13]. The general idea is to shape the output impedance of E-STATCOM, ZVh(s), as a resistance at harmonic frequencies of concern. To prevent adverse

interactions between harmonic control and the WPP, the passivity-based design is reported in [13]. Thus, the lossy passive filters and the harmonic stability issues induced by passive filters can be avoided.

Performance Demonstration of E-STATCOM 1) Active Sub-Synchronous Resonance Damping A comparison of conventional STATCOM and E-STATCOM is given as follows to demonstrate the active damping capability of the latter. A step response test (0.045 p.u.) of active power output of the WPP is performed under a weakgrid condition, where the SCR is 1.63 at the collector bus (B1) of WPP. Three cases are evaluated—1) no STATCOM is

FIG 2 Main power circuit and system configuration of E-STATCOM.

FIG 3 Block diagram of GFM control and equivalent circuit of E-STATCOM.



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with a flywheel (SC-FW) storage sysused, 2) conventional STATCOM with tem, both with identical inertia conGFL control, and 3) E-STATCOM with Moreover, the GFM stants. The WPP is not involved in the GFM control [14]. control allows for inertial response. The grid frequency Figure 4 shows the simulation in Figure 5(a) changes linearly with a waveforms, where the active power flexibly designing the RoCoF of −1 Hz/s. The E-STATCOM output of WPP and the voltage magdamping effect of the exhibits similar inertial response to nitudes at the POI of WPP are given the SC-FW within the first tens of milin Figure 4 (a) and (b), respectively. E-STATCOM, thereby liseconds as depicted in Figure 5(b) In case 1, the POI voltage is severely smoothening the [5]. This fast response is critical to degraded due to inadequate reactive mitigate the RoCoF and reduce the power compensation, which confrequency variations. frequency nadir. Moreover, the GFM travenes grid codes and limits the control allows for flexibly designing active power output of WPP. Furthe damping effect of the E-STATther, both voltage and active power COM, thereby smoothening the frequency variations. present obvious oscillations around 35 Hz (lower than 3) Selective Harmonic Damping synchronous frequency 50/60 Hz), i.e., sub-synchronous Figure 6 presents a comparison of the performances resonance, which sustains over 300 ms, indicating insuffiwithout and with the selective harmonic voltage damping cient damping in the WPP when connected to a weak grid. function of E-STATCOM under an ultra-weak grid condition In case 2, the conventional STATCOM effectively regulate [13]. The harmonics injected by the offshore WPP are emuthe POI voltage through the provision of reactive power lated by a paralleled harmonic current source, according to support. Yet, the improvement of dynamic performance the IEC harmonic model of WT [15]. The injected harmonics is limited. The WPP still lacks damping. Unlike the previare 5th, 7th, 11th, and 13th. ous cases, in case 3, the E-STATCOM not only improves The voltages at POI are clearly distorted when the voltage stiffness (as evidenced by the significantly lower selective harmonic damping function is disabled, and voltage variation shown in Figure 4b), but it also actively the total harmonic distortion (THD) is 4.3%, as shown provides the desired damping through GFM control to in the fast Fourier transform (FFT) result in Figure 6(a). mitigate resonance (only small oscillations) and stabilize Yet, when the selective harmonic damping control is the WPP under weak grid interconnection conditions. enabled, the concerned harmonic voltages are dampened 2) Inertial Response effectively. The voltage THD at POI is reduced to 1.2%, as Figure 5 gives a comparison between the inertial shown in Figure 6(b). responses of an E-STATCOM and a synchronous condenser

FIG 4 Comparison of step responses [14]. (a) Active power output of WPP. (b) Voltage magnitude at POI.

FIG 5 Comparison of inertial response [7]. (a) Linear change of grid frequency. (b) Active power output of E-STATCOM.

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FIG 6 Comparison of active harmonic damping [13]. (a) Voltages at POI without active damping. (b) Voltages at POI with active damping.

Conclusion This paper has introduced the energy-storage enhanced STATCOM as an all-in-one solution to address the stability and power quality challenges with grid integration of large-scale WPPs. With the energy storage system at the dc-link and GFM control, the E-STATCOM can effectively support the system by offering 1) adequate damping to system oscillations, which features reduced power overshoot and desired settling time of step response of active power of WPP; 2) inertial response with the improved RoCoF; and 3) selective harmonic damping with the enhanced voltage THD. Building on the proven MMC technology, E-STATCOMs exhibit high scalability, compact design, enhanced efficiency, and ease of maintenance, making it an advantageous solution for the high-power (100 MVA and above) applications.

About the Authors Fangzhou Zhao ([email protected]) is an Assistant Professor at the Department of Energy, Aalborg University, Aalborg, Denmark. Xiongfei Wang ([email protected], [email protected]) is a Professor at the Division of Electric Power and Energy Systems, KTH Royal Institute of Technology, Sweden, and a Part-time Professor at the Department of Energy, Aalborg University, Aalborg, Denmark. Zichao Zhou ([email protected]) is currently pursuing the Ph.D. degree at the Division of Electric Power and Energy Systems, KTH Royal Institute of Technology, Sweden. Lexuan Meng ([email protected]) is a Senior Engineer at Hitachi Energy, Västerås, Sweden. Jean-Philippe Hasler ([email protected]) is a Senior Principal Engineer at Hitachi Energy, Västerås, Sweden. Jan R. Svensson ([email protected]) is a Research Fellow at Hitachi Energy, Västerås, Sweden. Lukasz Kocewiak ([email protected]) is a Lead Power System Specialist at Ørsted, Copenhagen, Denmark.

Haofeng Bai ([email protected]) is a Senior Scientist at Hitachi Energy, Västerås, Sweden. Hongyang Zhang ([email protected]) is a Senior Engineer at Hitachi Energy, Västerås, Sweden.

References

[1] Ł. Kocewiak et al., “Overview status and outline of stability analysis in converter-based power systems,” in Proc. Wind Integr. Workshop, Nov. 2020, pp. 1–10. [2] C. Buchhagen et al., “Harmonic stability-practical experience of a TSO,” in Proc. Wind Integr. Workshop, 2016, pp. 1–6. [3] L. Shuai et al., “Eigenvalue-based stability analysis of sub-synchronous oscillation in an offshore wind power plant,” in Proc. 17th Int. Workshop Large-Scale Integr. Wind Power Power Syst. Transmiss. Netw. Offshore Wind Power Plants, Stockholm, Sweden, Oct. 2018, pp. 16–18. [4] Ł. Kocewiak et al., “Practical aspects of small-signal stability analysis and instability mitigation,” in Proc. 21st Wind Sol. Integr. Workshop (WIW), Sep. 2022, pp. 1–13. [5] F. Zhao et al., “Control interaction modeling and analysis of grid-forming battery energy storage system for offshore wind power plant,” IEEE Trans. Power Syst., vol. 37, no. 1, pp. 497–507, Jan. 2022. [6] L. Zhang, L. Harnefors, and H.-P. Nee, “Interconnection of two very weak AC systems by VSC-HVDC links using power-synchronization control,” IEEE Trans. Power Syst., vol. 26, no. 1, pp. 344–355, Feb. 2011. [7] L. Meng et al., “Energy storage enhanced STATCOM for secure and stable power grids,” in Proc. CIGRE, Sep. 2022, pp. 1–12. [8] Hitachi Energy. (2023). SVC Light Enhanced. [Online]. Available: https:// www.hitachienergy.com/ [9] National Grid ESO. (Feb. 2022). GC0137: Minimum Specification Required for Provision of GB Grid Forming (GBGF) Capability (Formerly Virtual Synchronous Machine/VSM Capability). [Online]. Available: https://www.nationalgrideso.com/ [10] Hitachi Energy. (2022). STATCOM—SVC Light. [Online]. Available: https://www.hitachienergy.com/ [11] L. Harnefors et al., “Generic PLL-based grid-forming control,” IEEE Trans. Power Electron., vol. 37, no. 2, pp. 1201–1204, Feb. 2022. [12] L. Zhang, “Modeling and control of VSC-HVDC links connected to weak AC systems,” Ph.D. dissertation, School Elect. Eng., Stockholm, Sweden, 2011. [13] Z. Zhou et al., “Selective harmonic voltage control for STATCOMs in wind power plants,” IEEE Trans. Power Del., early access, Feb. 7, 2023, doi: 10.1109/TPWRD.2023.3243137. [14] F. Zhao et al., “Comparative study of battery-based STATCOM in gridfollowing and grid-forming modes for stabilization of offshore wind power plant,” Electr. Power Syst. Res., vol. 212, Nov. 2022, Art. no. 108449. [15] Ł. H. Kocewiak et al., “Wind turbine harmonic model and its application—Overview, status and outline of the new IEC technical report,” in Proc. Wind Integr. Workshop, Oct. 2015, pp. 1–6. 

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Voltage Controlled Magnetic Components for Power Electronics Technologies and Applications by Marco Liserre, Yoann Pascal, Jeffrey McCord, Thiago Pereira, Rainer Adelung, Lukas Zimoch, S. Kaps, Xiaxin Li, and Nian X. Sun

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oltage controlled magnetic components, which consist of dynamically controllable inductances and transformers, are a promising yet understudied technology of growing interest. In fact, these components offer circuit designers an additional degree of freedom to achieve multi-objective optimization with improved Pareto fronts. This article provides a review of some technologies that can be used to create controlled magnetics, including emerging technologies with high potential. Furthermore, a list of possible applications are proposed, where these components can provide a significant advantage in terms of efficiency, size reduction, or controllability. Special emphasis is laid on a use case: a 20  kW multiport dc–dc converter in which power flow control is achieved using voltage-controlled inductors based on partially saturable magnetic cores.

Introduction Magnetic components constitute one of the basic devices in power electronics systems. As a matter of fact, inductors and transformers can be used for short-term energy storage, filtering, and to transfer power while providing galvanic isolation between circuits [1]. Nonetheless, they remain amongst the bulkiest parts and account for a significant share of the losses [2], [3]. Magnetic component design results from trade-offs between a variety of parameters. For instance, in a filter, a higher inductance value will improve the filtering, which is related to pulse width modulation choice, but also increases the response time and, often, the losses [4]. In some power converter topologies, inductance values result from a trade-off between power lost in the active

and reactive devices. Capability to bear higher currents, which are dictated by fault conditions, will also translate to higher volume [5]. In general, inductance and conduction losses are positively correlated. Furthermore, magnetic component selection, either custom or off-the-shelf, results from trade-offs between several variables such as cost, losses, and size. Dynamically controlled magnetics [6], which have the capability to change their values online based on an external control signal, constitute an opportunity for power electronics, by bringing an additional degree of freedom in finding a compromise among minimal size, minimal losses, maximum filtering, limiting current rise without compromising dynamic response, etc. After a brief introduction on magnetics and reluctance modeling, this article gives an overview of technologies and physical phenomena used to create tunable magnetics. In addition, it also provides a list of relevant possible applications, while a use case is also detailed later on. Finally, a conclusion closes the article.

Basis of Magnetics Design Figure 1(a) shows a schematic of a generic inductor, composed of the winding, a magnetic core, and an air gap. Its equivalent reluctant model, analyzed using basic circuit theory, can be derived by replacing the core and the air gap by reluctances R . The winding is replaced by a magnetomotive force (MMF) source—calculated as shown in Figure 1(b). lg is the length of the air-gap, l is the average length of the magnetic core, A its cross-sectional area, N the number of turns, and the magnetic material has a relative permeability µ r —which characterises its ability to increase or channel the magnetic flux φ .

FIG 1 (a) Physical schematics of an inductor, (b) equivalent reluctant model, and (c) inductance calculation.



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The inductance, which links the magnetic flux and the electric current (Figure 1c), can be expressed as

 l  L = N 2 Aµ0 ⋅  + lg  µ  r 

−1

.

The rms current through the coil imposes that large wires and few turns be used to limit losses. On the other hand, the peak current through the coil dictates that a large number of turns (small due to the limited window area) be used to avoid magnetic saturation which would result in a drop in permeability—and therefore inductance. As a matter of fact, unwanted saturation may lead to over currents, increased losses, and control issues. The device must be designed such that, given the peak current Iˆ , the peak magnetic flux density Bˆ , given by ˆ IL Bˆ = , NA



remains below the saturation flux density Bsat of the material of the core. In practice, this means selecting a core of sufficient size. When considering dynamically tunable magnetics, the models must be updated to account for the energy stored through the inductance-tuning mechanism, and that may sometimes be recovered. In particular, the relation between the voltage vL and the current iL reads



vL ( t ) = N ⋅

dL dφ d ( L ⋅ iL ) di = = L ⋅ L + iL ⋅ , dt dt dt dt

where L is a function of time. However, most applications currently operate the tunable magnetics in quasistatic conditions, whereby the second term can be neglected. When considering tunable technics with low enough response time, this effect could nonetheless be leveraged, for instance for active filtering. The following section highlights how these variables can be tuned online to achieve dynamic inductance control.

values. Practical use in power applications remains limited to voltage regulating distribution transformers due to the high cost and complexity of discrete implementations [7]. On-chip integration of both the winding and the tap-changer (MEMS- or solid-state-based) have been demonstrated for low-value inductances, benefiting from the high-density integration enabled by waferlevel technology [8]. Magnetic cores are usually used in their linear region, where they exhibit constant permeability. However, when increasing the field and approaching saturation, the permeability drops (Figure 2). This is exploited to create tunable inductances, whereby a magnetic core is submitted to a biasing field by means of an auxiliary winding, that polarizes the material on its B-H curve around the target operating point. This technology has, in particular, been used to regulate power converters [9]. The main shortcoming of this approach is the significantly increased power loss in the dc-biased portion of the core. An application is detailed in the section “use case” below [10]. Mechanical variability of the inductance is achieved by various types of micromanipulators that vary the length of the air gap (Figure 3) or move a magnetic shunt into or out of it. Due to the large influence of the air gap on the inductance, this allows efficient and wide tunability. Other concepts rely on modifying the coil dimensions. Yet, the use of mechanical means results in high response times and is also considered a critical reliability issue. This, added to the high cost and potentially high power consumption, limits the practical applicability of the concept. If piezoelectric materials can be used as actuators for voltage-controlled mechanical adjustment of the air gap, they offer another way to tune the inductance. In combination with magnetostrictive core materials,

Physical Effects and Technologies for Inductance Control The basic model presented in the previous section provides guidance on how the inductance can be dynamically tuned by changing the number of turns, the length of the air gap, the permeability of the magnetic core, and the overall shape of the inductor. Tapped coils with tap changers (mechanical or solid-state) constitute tunable inductances that can take discrete

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FIG 2 First quadrant magnetization curve of a typical ferrite for power electronics (N87): (BH) curve (blue) and incremental permeability µr,i , (red). External biasing allows to move the operation point along the (BH) curve and thereby tune the inductance, which is inversely proportional to µr,i .

voltage-tunable magnetoelectric composite inductors have been realized, which allows voltage adjustment of the effective permeability of the inductors. In this case, a possible increase in core losses must be avoided [11]. For this purpose, magnetoelectric components have been integrated into the inductor or part of the inductor as variable permeability magnetic flux valves. This approach has been the subject of much research, including magnetic thin film and MEMS devices. Figure 4 shows the results obtained with voltage-controlled magnetoelectric inductors, reaching a 450% tunability in the kHz-band. For power electronics applications, electric field modulation of permeabilities has been achieved for

ferromagnetic bulk and wound cores, ferrite cores, and magnetic piezoelectric material composites [11], [12], resulting in significant inductance changes. The magnetic material of choice is defined by magnetoelastic properties (magnetic anisotropy and relative permeability) and resistivity versus thickness. All these parameters must be specifically tuned in terms of inductance and operating frequency for the intended variable inductor applications. By transferring the concepts to high-power, bulk material-based applications, the aforementioned limitations for the mechanical approaches in response time and energy consumption could be overcome. Other methods of tunable inductors rely on the use of ferrofluids in the air gap of the inductors or as a variable separation material in a pancake coil arrangement, or the use of deformable magnetic composites. Although permeability is an intrinsic property of a material, shielding by eddy currents may lead to some additional frequencydependence [14], which could be exploited for inductance dynamic tuning. These methods are still at the proof-ofconcept stage at best and are also subject to similar reliability issues as discussed above.

Applications—Brief Overview and Simple Calculation of Gains

FIG 3 Mechanically adjustable inductor in which the length of the air gap lg can be tuned by moving the cores using an actuator (in blue).

Tunable inductances have long been used as controlled impedances, e.g., to adjust lighting intensity or for arc welding. Nonetheless, the wide spreading of power electronics will greatly benefit from online adjustable magnetics, which will further push optimal Pareto fronts. This will bring

FIG 4 (a) Measured inductance and (b) Q-factor of the integrated tunable inductor at voltage tuning with applied electric field from 0 to 12 kV/cm. (c) Schematic of the magnetoelectric inductor with a multiferroic composite core (reproduced from [13]).



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reduction offered by soft switching. significant improvements in the operaHowever, LC-circuits have resonant tion of a wide set of circuits and appliMagnetic designs are frequencies with low initial accucations. This section describes some constrained by traderacy, and possibly significant shift of these, summarized in Table I. due to ageing and temperature. This Magnetic designs are constrained offs, making it is an issue when matching tanks are by trade-offs, making it impossible impossible to achieve required, such as in multiport conto achieve optimal operation over verters or wireless power transfer. a wide range of operating points optimal operation over The ability to dynamically tune tanks with conventional components. a wide range of is then of great interest to maximize For instance, in phase-shifted fullpower delivery and efficiency—as bridge (PSFB) and dual active bridge operating points with showcased in section “use case.” (DAB) converters, a high inductance conventional New topologies of power conis required to achieve soft switchverter could further benefit from ing—and thereby high efficiency—at components. controllable magnetics. For instance, low load, but this increases the copcritical conduction mode converters, per loss and limits power transfer. and more generally hysteretic conDynamically adjusting the inductrollers, suffer from complex control and EMI managetance therefore offers an additional degree of freedom ment due to their variable switching frequency. Online to track the maximum efficiency point. For example, the tunable inductors would solve this issue by enabling such energy saving considering a lithium-ion battery charging converters to run at constant frequency. cycle using a PSFB would reach 10%. The output filtering inductance of an inverter is limited Although, switching energies of wide-bandgap semiby the voltage drop across it at fundamental frequency conductor-based devices can fall to a few percent of and nominal load. However, under reduced loading, the their silicon counterparts, full potential of SiC and GaN inductance could be increased to keep the voltage-drop is achieved in resonant topologies, owing to the loss constant. This would allow the switching frequency to be reduced proportionally without power quality degradaTable– 1. Summary of the gain expected from the use tion, resulting in a proportional reduction in switching of tunable magnetics for some applications. power loss. Under this control strategy, the analysis of HVDC circuit breaker −45% breaking current the annual production profile of a wind turbine located in northern France and equipped with an IGBT inverter Wind generator inverter −20% inverter loss shows that the potential average power loss reduction Battery charger −10% loss reaches 20%, assuming a tunability of ±30%.

FIG 5 Current rise after load-side short-circuit of a HVDC transmission line: constant versus tunable line inductance. Simulation performed with VDC = 400 kV, I0 = 2 kA, L 0 = 20 mH.

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In dc networks, minimal parasitic inductance is required to create a strong grid with good controllability. On the other hand, the line inductance limits the rate of current rise during short circuit, thereby limiting the constraints on the circuit breaker. In such application, the use of a low inductance value in normal operation, which is then increased in case of fault, would enable a reduction in the circuit breaker rating (−45% breaking current in a typical HVDC network, assuming ±30% inductance tunability (Figure 5), while maintaining controllability. Although, today’s electric network is exclusively either exploiting a single spectral component (typically 50 or 60  Hz) or dc, tomorrow’s networks may exploit a wide spectrum to transfer power: not only the fundamental, but also the harmonics would be used to convey energy between sources and loads in a targeted manner (Figure 6). In such multi-frequency network, tunable magnetics would enable power routing based on spectral content [6].

Use Case: Self-Tunable Multiport Resonant Converter Several isolated dc–dc topologies have been proposed in the literature for interconnecting multiple energy storage

systems (ESS) with different capabilities. Nevertheless, resonant multiport isolated converters, in particular those based on a multiwinding transformer (MWT), have been receiving more attention in applications where multiple dc sources and/or loads must be integrated (Figure 7). This results from their reduced number of conversion stages, which leads to an increased power density and efficiency. On the other hand, the increased number of windings at the same magnetic core makes the resonant MWT-based (RES-MTB) topologies more susceptible to parameter deviations on the MWT and multiple reactive networks, which can lead to power flow control issues.  Thus, the multiple resonant tanks must be properly tuned to reduce these parameter deviations and unbalance. In this context, the integration between actively controlled passive elements and the RES-MTB converter can be used as an additional degree of freedom to tune individually the values of the resonant inductors. Hence, it allows not only the self-tuning of the multiple resonant tanks against parameter deviations but also the power flow control among the ports. The concept of integrating a variable inductor into the RES-MTB converter is experimentally validated with a prototype of 20 kW (Figure 8), cf. [10], [15].

FIG 6 Structure and spectrum of a multi-frequency grid in which the spectral components supplying each load or sub-network can be dynamically selected by tuning the inductance of the respective filter.

FIG 7 RES-MTB converter embedded with actively controlled inductors (ACI) for multi-source integration (left); Power distribution in function of the load frequencies considering the different ESSs (right) [15].



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The structure of the variable inductor is based on the gapped E-core, cf. Figure 9(a). The control winding, which is responsible for changing the inductance value, is divided into two identical parts with the number of turns equal to N dc . The control winding is mounted on the outer legs of the E-cores, cf. Figure 9(a) and (b), while the main winding is placed on the air-gapped center leg [16]. The control and generation of the dc bias current can be realized, for example, via a non-isolated switched mode dc–dc converter for optimal efficiency. By increasing the dc bias current up to the point where the magnetic flux density enters the saturation region, the increased reluctance of the core reduces the inductance value (Figure 9c). Experimental results were obtained under two conditions: unbalanced and balanced operations, cf. Figure 10. In

the first condition, the resonant tanks RT I and RT III are configured with the same inductance value to ensure the resonance frequency of 20 kHz, while RT II is configured with the maximum inductance to reduce the processed power cf. Figure 10(a). In the second case, all tanks are matched so as to ensure balanced power transfer (Figure 10b).

Conclusion Tunable magnetics bring an additional degree of freedom to circuit designers, enabling to further push Pareto fronts in online multi-objective optimizations. A wide variety of physical phenomena and technologies have already been investigated to create such devices. Further research should investigate the limitations of each technology in terms of upscaling, bandwidth, response time, complexity, failure rate, etc. Future work should also focus on

FIG 8 Hardware prototype of the RES-MTB converter [10].

FIG 9 (a) Concept of actively controlled inductors considering the control and main windings; (b) picture of the prototype; and (c) measured inductance as a function of bias current [10], [15]

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FIG 10 Experimental results considering the steady-state operation: under (a) unbalanced and (b) balanced conditions [10].

innovative topologies and control strategies to better understand the full potential of this new family of components. Although, this article focuses on tunable inductances, the same phenomena can be and have been applied to designing transformers with tunable coupling coefficients, leakage, and magnetizing inductances. A dramatic leap forward in tunable magnetics design for the next generation of power electronics is expected from the combination of circuit design and magnetic materials expertise.

About the Authors Marco Liserre ([email protected]) received the M.Sc. and Ph.D. degrees in electrical engineering from Bari Technical University, Bari, Italy, in 1998 and 2002, respectively. He has been an Associate Professor at Bari Technical University and a Professor in reliable power electronics at Aalborg University, Aalborg, Denmark, from 2012. From 2013, he is a Full Professor and he holds the Chair of Power Electronics at Kiel University, Kiel, Germany. He got offered and declined Professorships at the Technical Universities of Ilmenau, Munich and Hamburg. He has published more than 600 technical papers (1/3 of them in international peer-reviewed journals), a book and two granted patents, with more under evaluation, some of them involving companies. These works have received more than 50,000 citations. He is listed in ISI Thomson report “The world’s most influential scientific minds” from 2014. In 2022, he joined part-time Fraunhofer ISIT as the Deputy Director and the Director of a new Center for “Electronic Energy Systems” funded for 5 million Euro. He is a member of IAS, PELS, PES, and IES. He has been serving all these societies in different capacities. At PELS, he is an AdCom Member (second mandate), a Co-editor of the IEEE Open Access Journal in Power Electronics, an Associate Editor of TPEL and JESTPE, a Guest Editor of several special issues of JESTPE, the Technical Committee Chairman of the new Committee on Electronic Power Grid Systems, and a Member of the IEEE Digital Committee, IES-Liaison Responsible, eGrid 2021 Workshop Co-chairman, and PEDG 2022 Co-chairman and Organizer in Kiel. He has received the IES 2009 Early Career Award, the IES 2011 Anthony J. Hornfeck Service Award, the 2014 Dr. Bimal Bose Energy Systems

Award, the 2017 IEEE PELS Sustainable Energy Systems Technical Achievement Award, the 2018 IEEE-IES Mittelmann Achievement Award, and six IEEE Journal Awards. He is a Fellow of the IEEE. Yoann Pascal ([email protected]) received the engineering degree from École polytechnique, Paris, France, and the Ph.D. degree from École normale supérieure Paris-Saclay, France, in 2015 and 2019, respectively. His Ph.D. research was focused on PCB-embedding of power electronics dies and magnetic components. From 2020 to 2022, he was a postdoctoral researcher at the Chair of Power Electronics of Kiel University, Kiel, Germany. Since 2022, he has been a postdoc at the Fraunhofer ISIT—Institute for Silicon Technology, Kiel. His research activities include thermal management and reliability, magnetic components, and wide bandgap transistor-based power conversion. Jeffrey McCord is a Professor with the Department of Materials Science, Kiel University, Kiel, Germany. He received the Dipl.-Ing. degree in materials science from the University of Erlangen-Nuremberg, Erlangen, Germany, where he also received the Ph.D. degree, working on magnetic thin films and magnetic domains. From 1997 to 2001, he was with the IBM Storage Division, San Jose, CA, USA, where he was responsible for the development of magnetic recording heads. From 2002 to 2009, he was a Research Scientist and the Group Leader at IFW Dresden, until he accepted a position as the Head of the Nanomagnetism Department, Helmholtz-Zentrum Dresden-Rossendorf. He is the Cofounder and the Former Managing Director with evico magnetics GmbH. In 2011, he was appointed as the Heisenberg Professor for “Nanomagnetic Materials and Magnetic Domains” at the Department of Materials Science, Kiel University. He has authored more than 180 articles in peerreviewed journals in the field of magnetic films and magnetic domains and has given more than 80 invited talks. He holds several patents related to magnetic thin film technology. He has been involved in the organization of several conferences, including serving as the Program Co-chair for Intermag 2017. Thiago Pereira (S’14) received the B.S. degree in mechatronics from the Federal Institute of Santa Catarina (IFSC), and the B.S. and M.S. degrees in electrical

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engineering from the Power Electronics Institute (INEP), Federal University of Santa Catarina (UFSC), Florianopolis, SC, Brazil, in 2011, 2016, and 2018, respectively. Since 2019, he has been working toward the Ph.D. degree in electrical engineering with the Chair of Power Electronics, Christian-Albrechts-Universität of Kiel, Kiel, Germany, and since 2023 with Fraunhofer ISIT, Kiel. His research interests include dc–dc converters, power converter topologies, reliability in power electronics, high-power converter systems, and wide bandgap semiconductor devices. Rainer Adelung is a Professor with the Department of Materials Science, Kiel University, Kiel, Germany. He received his doctoral degree in physics from Kiel University in the year 2000. After spending a year in the Materials Science Department, Case Western Reserve University, USA, he returned to Kiel as a Habilitation Candidate and obtained his venia legend in 2007. Initiated with a Heisenberg Professorship award in 2007, his research group on functional nanomaterials became the Chair for functional nanomaterials in 2010. Since then, he has continuously participated in collaborative initiatives such as collaborative research centers funded by the German Science Foundation on magnetostrictive materials and magnetic composites. He has been a Professor of materials science (Heisenberg Professorship) at Christian-Albrechts-Universität, since July 2007. He has published more than 250 peer-reviewed journals on functional nanomaterials. Lukas Zimoch received the B.Sc. degree in materials science and engineering and the M.Sc. degree in materials science and engineering from the Christian-Albrechts-University of Kiel, Kiel, Germany, in 2017 and 2019, respectively. Since 2020, he is pursuing the Ph.D. degree at the Faculty of Engineering, Kiel and is currently working with magnetostrictive polymer composites in the field of magnetoelectric and pressure sensors. Other research interests include tunable inductors, gas sensors for H2 and volatile organic compounds, as well as superparamagnetic aero-magnets. Soren Kaps is a Senior Researcher at Christian Albrechts University Kiel (CAU), Kiel, Germany, in the Chair for “Functional Nanomaterials.” He received the Ph.D. degree from CAU in 2015. His primary research revolves around porous materials and the application of additive manufacturing techniques. His work primarily aims to develop innovative design for memristive devices and magnetic field sensors. Additionally, he has a keen interest in surface interface-related materials science and actively explores advancements in this field. Xiaxin Li received the B.E. degree in electronic science and technology from Xi’an Jiaotong University, Xi’an, China, and the M.S. degree in electrical and computer engineering from Northeastern University, Boston, MA, USA, in 2020 and 2023, respectively, where he is currently pursuing the Ph.D. degree in electrical engineering. His research interests include new magnetoelectric antennas and sensors. Nian X. Sun is a College of Engineering Distinguished Professor of electrical and computer engineering and

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bioengineering, the Director of the W.M. Keck Laboratory for Integrated Ferroics, Northeastern University, and the Founder and the Chief Technology Advisor of Winchester Technologies, LLC. He received the Ph.D. degree from Stanford University. Prior to joining Northeastern University, he was a Scientist at IBM and Hitachi Global Storage Technologies. He was the recipient of the Humboldt Research Award, NSF CAREER Award, ONR Young Investigator Award, the Søren Buus Outstanding Research Award, Outstanding Translational Research Award, etc. His research interests include novel magnetic, ferroelectric and multiferroic materials, devices and microsystems, novel gas sensors and systems, etc. He has over 300 publications and over 30 patents and patent applications. One of his papers was selected as the “ten most outstanding full papers in the past decade (2001–2010) in Advanced Functional Materials.” He has given over 200 plenary/keynote/invited presentations and seminars. He is an Elected Fellow of the IEEE, and an Editor of Sensors and IEEE Transactions on Magnetics.

References

[1] V. Valchev and A. Van den Bossche, Inductors and Transformers for Power Electronics, 1st ed. Boca Raton, FL, USA: CRC Press, 2005. [2] R. Chen et al., “Efficiency-oriented parameter design and comparison of medium voltage isolated bidirectional DC/DC converters,” IEEE Open J. Power Electron., vol. 4, pp. 14–23, 2023. [3] R. Guan et al., “A medium voltage input multiport isolated output DC transformer with power self-balancing and output fault isolation,” IEEE Trans. Power Electron., vol. 38, no. 4, pp. 4771–4786, Apr. 2023. [4] M. Liserre, F. Blaabjerg, and S. Hansen, “Design and control of an LCLfilter-based three-phase active rectifier,” IEEE Trans. Ind. Appl., vol. 41, no. 5, pp. 1281–1291, Sep. 2005. [5] L. Camurca, M. Langwasser, and M. Liserre, “Design approach of inductive components in medium voltage modular multilevel converter considering DC side fault protection conditions,” in Proc. IEEE Appl. Power Electron. Conf. Expo. (APEC), Mar. 2020, pp. 2617–2624. [6] A. Boyajian, “Theory of D-C. Excited iron-core reactors and regulators,” Trans. Amer. Inst. Elect. Eng., vol. 43, pp. 919–936, 1924. [7] M. Sojer, “Voltage regulating distribution transformers as new grid asset,” Proc. Eng., vol. 202, pp. 109-120, Jan. 2017. [8] P. Park et al., “Variable inductance multilayer inductor with MOSFET switch control,” IEEE Electron Device Lett., vol. 25, no. 3, pp. 144–146, Mar. 2004. [9] S. Brandt et al., “A survey on adjustable inductances for power electronic circuits,” in Proc. PCIM Eur., 2022, pp. 1–9. [10] T. Pereira et al., “Self-tuning multiport resonant DC/DC converter based on actively-controlled inductors for hybrid storage system integration,” IEEE Trans. Power Electron., vol. 38, no. 4, pp. 4787–4804, Apr. 2023. [11] Y. Yan et al., “High-power magnetoelectric voltage tunable inductors,” IEEE Trans. Ind. Electron., vol. 68, no. 6, pp. 5355–5365, Jun. 2021. [12] J. Cui, L. Qu, and W. Qiao, “A three-phase adjustable-voltage-ratio transformer based on magnetic flux valves,” in Proc. IEEE Energy Convers. Congr. Expo. (ECCE), Sep. 2018, pp. 758–762. [13] J. Lou et al., “Electrostatically tunable magnetoelectric inductors with large inductance tunability,” Appl. Phys. Lett., vol. 94, no. 11, Mar. 2009, Art. no. 112508. [14] W.-T. Franke et al., “Characterization of differential-mode filter for gridside converters,” in Proc. 35th Annu. Conf. IEEE Ind. Electron., Nov. 2009, pp. 4080–4085. [15] T. Pereira et al., “Multiport resonant DC–DC converter using activelycontrolled inductors for hybrid energy storage system integration,” in Proc. IEEE Appl. Power Electron. Conf. Expo. (APEC), Mar. 2022, pp. 1154–1161. [16] D. Medini and S. Ben-Yaakov, “A current-controlled variable-inductor for high frequency resonant power circuits,” in Proc. IEEE Appl. Power Electron. Conf. Expo. (ASPEC), vol. 1. Orlando, FL, USA, 1994, pp. 219-225, doi: 10.1109/APEC.1994.316396. 

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Reliability Evaluation of SiC MOSFETs Under Realistic Power Cycling Tests by Masoud Farhadi, Bhanu Teja Vankayalapati, and Bilal Akin

T

he past decade has witnessed increasing migration from silicon (Si) to silicon carbide (SiC) in power electronics applications. This is due to the unique advantages of SiC over Si counterparts, like higher breakdown field, higher band gap, and higher thermal conductivity [1], [2]. Therefore, SiC devices can operate at faster switching

Digital Object Identifier 10.1109/MPEL.2023.3271621 Date of publication: 27 June 2023

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changes negatively affect the performance, efficiency, and lifetime of the By conducting ALTs, device. To mitigate the effects of gate manufacturers and oxide degradation, it is essential to use high-quality gate oxide materiengineers observe als and minimize extrinsic defects changes in device and impurities during the fabrication process. parameters and B. Package Degradation: Package characteristics and degradation refers to the gradual deterioration of the physical and electrical make necessary properties of a power device package improvements in device over time. The package plays a critical role in protecting the power device structure to enhance and facilitating the transfer of heat reliability or develop and electrical signals between the device and the external circuit. Packcondition monitoring age degradation can cause changes tools for field in the dimensions and physical propapplications. erties of the package, as well as lead to the formation of defects and impurities. Die attachment and wire bond solder are the dominant parts of the package, which are subject to degradation due to temperature cycling and mechanical stress [7], [8]. Accelerated Lifetime Tests C. Body Diode Degradation: Body diode degradation Accelerated lifetime tests are used to simulate the aging refers to a gradual deterioration in the intrinsic p-n junction mechanisms that power semiconductor devices experidiode that is formed between the source and drain termience in the field by exposing them to a controlled envinals of the MOSFET. Over time, the performance of the body ronment with elevated levels of electrical and thermal diode can degrade due to factors such as exposure to high stresses [3]. By conducting ALTs, manufacturers and engitemperature and high reverse-bias voltage and the accumuneers observe changes in device parameters and characlation of impurities in the p-n junction. This degradation teristics and make necessary improvements in device causes an increase in the reverse-recovery time and forstructure to enhance reliability or develop condition monward voltage drop of the diode, increases reverse recovery itoring tools for field applications. Additionally, ALTs help losses, reduces its efficiency, increases the reverse-leakage manufacturers to provide accurate lifetime estimates. The current, and eventually reduces the device’s lifetime. most common degradation mechanisms that SiC power A number of accelerated lifetime tests have been sugdevices can experience include: 1) gate oxide degradagested to assess the aforementioned failure mechanisms. tion, 2) package degradation (including die attach degraHigh-temperature gate bias (HTGB) and high-temperature dation and wire bond degradation), and 3) body diode reverse bias (HTRB) tests accelerate gate oxide aging by degradation. These degradation mechanisms can have a exposing the gate and drain to high temperatures and a significant impact on the performance and reliability of steady voltage, respectively. The main purpose of this test SiC power devices. Therefore, it is essential to underis to verify the stability of the gate oxide integrity over stand and control them through rigorous testing and time and temperature. In the HTGB test, the drain and design optimization. source are connected, subjecting the channel and JFET A. Gate Oxide Degradation: The gate oxide is a thin regions to an electric field. As a result, TDDB and BTI are insulating layer of silicon dioxide (SiO2) that plays a critianticipated to contribute to the aging of the oxide [6]. The cal role in current flow control through the device, controls HTRB test involves applying a negative bias to the gate the flow of current, and helps to prevent short circuits. Its and a positive voltage to the drain-source terminals. This integrity is crucial for ensuring reliable performance and test subjects the gate oxide to static stress. HTRB can preventing device failure. Gate oxide degradation can cause an increase in the electric field across the oxideoccur due to a variety of mechanisms, including hot carinsulating layer of the MOS transistor, leading to oxide rier injection (HCI) [4], bias temperature instability (BTI) breakdown and the formation of defects in the oxide [5], and time-dependent dielectric breakdown (TDDB) [6]. layer. The high-temperature gate switching (HTGS) test When gate oxide degradation occurs, it leads to an increase provides a more realistic simulation of the device’s behavin the gate leakage current, a reduction in the breakdown ior by applying high-frequency pulses to the gate-source, voltage, and an increase in the gate capacitance. These frequencies, higher power density, and with exceptional thermal performance. However, as this technology progressively becomes mature, questions still arise regarding its long-term reliability. These questions can be answered proactively using accelerated lifetime tests (ALTs). ALTs accelerate the aging mechanisms by amplifying the thermal and electrical stresses. The data from ALTs serve a crucial function for evaluating the sustained reliability of SiC MOSFETs through assessment of their lifespan, identification of breakdown causes, and continuous monitoring of their performance. This article introduces an ac power cycling test setup for SiC MOSFETs and discusses the correlation of aging precursors to different failure mechanisms. Also, the study identifies and presents patterns of common precursor shifts.

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whereas HTGB and HTRB tests do not involve switching effects. However, there are some limitations to the HTGS test. One limitation is that the testing duration is relatively lengthy, which can be a disadvantage in situations where a fast evaluation of device reliability is required. Additionally, the channel is not sufficiently stressed in the HTGS test, which means that it may not accurately reflect the long-term reliability of the device. The thermal cycling and dc power cycling tests expedite package degradation by exposing the device to repeated passive and active thermal cycles. The thermal cycling test can be performed using programmable hot plates or ovens with varying thermal profiles. This test lacks channel conduction and disregards the effects of wire bond selfheating and electro-migration. In contrast, the dc power cycling test generates thermo-mechanical stress due to injected dc current to control thermal cycles. The dc power cycling also causes degradation of the gate oxide through the applied gate-source voltage. The dc power cycling test targets different parts of the device package based on test conditions such as heating and cooling times, and the mean junction temperature. As a disadvantage, this test ignores the effects of switching transients and high dc bus voltage. Die attach degradation and wire bond degradation are the potential reliability issues that the dc power cycling test can identify. The chopper mode bias (CMB) test expedites the degradation of the internal PiN diode through body diode conduction. The device is switched off by applying a negative voltage to ensure complete shut-off of the channel and reverse conduction. The described tests concentrate on specific failure modes and do not fully mimic actual converter operation. To address these limitations, the ac power cycling test can be used, which creates thermal stress during actual converter operation. The ac power cycling helps

to identify potential failure mechanisms in a realistic manner that may not be revealed by other reliability tests. The ac power cycling test allows for the simulation of various converter operating conditions by adjusting the power factor (PF), frequency, dc bus voltage, and gate voltages. To optimize the results of the ac power cycling test, the test conditions should be chosen to provide a range of conditions that represents field operations. In the ac power cycling test, an ac current is applied to the device, which can simulate hot carrier injection and the effect of electro-migration. Also, ac power cycling test applies both positive and negative gate voltage, which can expedite BTI and TDDB. Table 1 summarizes the different accelerated lifetime tests and their associated aging mechanisms for SiC MOSFETs.

AC Power Cycling of SiC MOSFETs In Figures 1 and 2, a reconfigurable 120 KVA ac power cycling test setup is shown that has been designed to assess power train switches and modules with a 62 mm package in electric vehicles. It is expected that a highpower test setup should be efficient to minimize power consumption yet provide programmable losses to accelerate aging processes. To meet this objective, two 3-phase back-to-back inverters have been utilized in the ac power cycling test setup to recirculate power effectively (the setup draws power for losses only). The required heat for thermal cycling is controlled by precisely adjusting the switching and conduction losses under high voltage and high load conditions. Even though it is a high-power setup, the input power supply only provides the losses of the inverter, with most of the power being recirculated internally. The design consists of three separate full-bridge inverters, each of which is connected directly to the dc bus. The three-phase configuration

Table 1. Summary of accelerated aging mechanisms in different lifetime tests for SiC MOSFETs.

–

Aging Aging Test

Time-Dependent Dielectric Breakdown

Bias Temperature Instability

Package-Related

Body DiodeRelated

Hot Carrier Injection

Die Attach Degradation

Wire Bond Degradation

Body Diode Degradation

High-Temperature Gate Bias

Very high

Very high

×

×

×

×

High-Temperature Reverse Bias

High

High

Very Low

×

×

×

High-Temperature Gate Switching

Medium

Medium

×

×

×

×

Thermal Cycling

×

×

×

Medium

Medium

×

3rd Quadrant Chopper Mode Bias

Low

×

Low

×

×

Very high

Low

Very Low

×

Very high

High

×

Medium

Medium

Medium

High

Very high

×

DC Power Cycling AC Power Cycling



Gate Oxide-Related

PF = 1 PF = −1

Medium

Medium

Medium

Medium

Medium

Very high

PF = 0

Medium

Medium

Medium

High

High

High

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facilitates a consistent power flow and optimizes the utilization of the high dc voltage. In this setup, one of the inverters serves as the load, while the other inverter serves as the inverter under test (IUT). The power factor can be adjusted by modifying the magnitude and

FIG 1 The ac power cycling test setup for reliability assessment of SiC devices.

direction of the dq-axis reference values. Figure 3 shows the phasor diagram of the ac power cycling test setup for positive and negative power factors. Where VL represents the voltage of the load converter, VDUT is the voltage of the test inverter and iXL is the voltage drop in the load. In addition to power factor, modulation index, switching frequency, fundamental frequency, dc-link voltage, and current amplitudes are all programable to mimic various operating points. This feature enables the examination of each factor on device degradation. Advanced gate driver boards communicate with the main controller board through the SPI interface, and each gate driver is capable of measuring aging indicators such as threshold voltage, on-resistance, and body diode voltage for condition monitoring. Figure 4 presents the circuit diagram of the measurement circuit to monitor the aforementioned precursors. The gate driver board has the capability to modify the gate turn-on and turn-off voltages, which in turn allows for the adjustment of the electric field across the gate oxide and, as a result, the rate of gate oxide degradation. Additionally, the gate driver board provides several protective features, such as DESAT protection, drain-source voltage clamping, and an active Miller clamp.

FIG 2 (a) Block diagram of the overall system with complete condition monitoring features. (b) Control diagram.

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DESAT protection is used to protectively prevent MOSFETs from entering the drain-to-source saturation region. By providing DESAT protection, the gate driver board helps to ensure that the MOSFETs are operated within safe voltage and power limits. The drain-source voltage clamping feature helps to prevent the MOSFETs from being damaged by high voltage spikes or transients. Additionally, the active Miller clamp is employed to avoid the Miller capacitance effect, which occurs when the voltage across the gatesource capacitance (CGS) changes during the transition from the on-state to the off-state. This change can cause a high-frequency current to flow through the CGS, which can cause ringing, shoot-through, and other undesirable effects in the MOSFET. Three 700 µH, and 400 A inductors are custom-designed FIG 3 Phasor diagram of ac power cycling test setup. (a) Motor for power cycling and low current ripple. Two laminated mode. (b) Generator mode. busbars with a horizontal bussing layout connect the dc link capacitors and power modules. This results in a busbar assembly without bends or standoffs and, therefore, a low-inductance power loop. In addition to modules, the module-size board in Figure 5 can be used to test parallel discrete devices. Figure 6 shows the operating principle of ac power cycling. Initially, the setup is turned on to heat up the devices. Once the devices in the IUT reach the predetermined maximum temperature, the setup is turned off, and the cooling system is activated to cool down the devices. Having a high cooling capacity is vital for shortening the overall duration of a thermal cycle as the cooling phase takes up the most time during the cycle. Two vacuum-brazed cooling plates cool down the 62 mm power modules or discrete devices. Each cooling plate has the capability to transfer 1.5 KW of heat with a fluid flow rate of 4 liters per FIG 4 Circuit diagram for precursor monitoring (on-resistance and body minute and a maximum pressure drop diode voltage) in ac power cycling test. of 2.2  psi. As a high-power converter, this setup can experience significant electromagnetic interference (EMI), and proper grounding techniques, use of EMI filters, and careful layout of components and wiring is essential to minimize EMI/EMC issues.

Precursor Evaluation for SiC MOSFETs In this test, third-generation SiC MOSFETs are utilized for the evaluation of aging precursors. Systematic static parameter evaluation of each device is

FIG 5 Various DUT which can be used with the ac power cycling setup: (a) power module with a 62 mm package, (b) ten parallel discrete devices with a module-size board (top view), and (c) bottom view.

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FIG 7 Threshold voltage change (ΔVth) over power cycles (at ID = 2 mA). FIG 6 Operating principle of ac power cycling.

carried out using the Keysight B1506A curve tracer during each 300 cycles interval when the cycling is halted. The following subsections demonstrate the changes in static parameters for all devices under test (DUT), which can be used as precursors for onboard condition monitoring. In an ideal scenario, an aging precursor should exhibit changes with aging that are independent of operating conditions and easily measurable. However, such a precursor with all these attributes simultaneously does not currently exist. Given these considerations, the on-resistance, body diode voltage, and threshold voltage are chosen to be monitored in this test setup. The selected precursors can accurately monitor degradations related to the package, body diode, and gate oxide with sufficient precision.

Threshold Voltage (Vth) The threshold voltage is one of the main precursors to monitor the gate oxide degradation in MOSFETs. Gate oxide degradation can occur due to various factors, such as high electric fields, high temperatures, and voltage spikes. As the gate oxide degrades, the threshold voltage can shift up, which can lead to changes in the MOSFET’s performance and reliability. The shift in threshold voltage is primarily attributed to the presence of interface-trapped charges (Qit) and oxide-trapped charges (Qot). The threshold voltage is theoretically calculated according to [9] and [10]:



∆Vth = Vth, aged − Vth, fresh =

Vth, fresh

Qit − Qot (1) COX

N  4ε S KT j N A ln  A   ni  + 2 KT j ln  N A  (2) =   COX q  ni 

These equations give the theoretical calculation for the threshold voltage with oxide-trapped charge and interface traps, where Vth,fresh represents the threshold voltage of a fresh device, Cox is the gate oxide capacitance per unit area, S is the dielectric constant of oxide layer, K is the Boltzmann constant, Tj is the junction temperature, NA is the doping

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concentration in the p-type well, ni is the intrinsic carrier concentration, and q is the electric charge. The aging effect on the threshold voltage of SiC MOSFETs is shown in Figure 7. Throughout the aging process, it is apparent from Figure 7 that the threshold voltages of all devices experience an increase. The main cause of the positive shift in the threshold voltage is primarily attributed to the high density of traps at the SiC/SiO2 interface (located between the SiC channel and the SiO2 gate oxide layer), which accumulates interface-trapped charges. ∂Vth 1 = > 0 (3) ∂Qit COX



On-Resistance (Rds,on) The on-resistance is another parameter frequently cited as an aging precursor for SiC MOSFETs. In power MOSFET, the sum of individual resistances in each layer and region determines the total on-resistance. This can be mathematically expressed as:

Rds, ON = Rch + RJFET + R A + RD + RSub (4)

where Rch is the channel resistance, RJFET is the JFET region resistance, RA is the accumulation resistance, RD is the drift region resistance, and RSub is the n+ substrate resistance. The channel resistance is a significant contributor to the onresistance in SiC MOSFETs, accounting for approximately half of the total on-resistance. This is primarily attributed to the lower mobility of inversion carriers at the SiC/SiO2 interface [11]. The following equation gives the expression for the channel resistance of a MOSFET, which is calculated based on the channel width Wch, channel length Lch, channel mobility μn, elementary charge q, and inversion charge density ninv at the interface [12].

RCh =

Lch Lch ≈ (5) Wch µ n qninv Wch µ nCOX (Vgs − Vth )

With aging, the threshold voltage drift causes a decrease in the overdrive voltage (Vgs – Vth) in the denominator. This reduction leads to an increase in the channel resistance of

the MOSFET, which is a dominant part of the on-resistance in SiC MOSFETs. As a result, the pattern of the on-resistance shift is relatively similar to the Vth shift pattern. In addition to Vth shift due to gate oxide degradation, there are other failure modes related to the package, such as wire bond liftoff, heal crack, and surface reconstruction, which can also cause a sudden change in the on-resistance shift pattern. Figure 8 shows the on-resistance change over the power cycles. After conducting a comparison between the ac power cycling test and dc power cycling test, it can be observed that the ac power cycling test leads to a greater change in on-resistance for a given threshold voltage shift. Furthermore, the dc power cycling test indicates a relatively smaller threshold voltage shift. The reason for this is that, during the ac power cycling test, hot carrier injection occurs due to the switching transients in addition to the bias temperature effect, resulting in a negative threshold voltage shift. Nevertheless, the bias temperature effect remains the dominant factor, leading to an overall positive shift in the threshold voltage.

the voltage drop across the package interconnection becomes remarkable, and therefore, the body diode voltage is a reliable indicator of package degradation. Nevertheless, self-heating can cause a significant impact on junction temperature at high currents. At zero gate voltage, the body diode voltage can serve as an indicator for both gate oxide and package degradations. This is a consequence of the conduction of both the channel and the PiN diode at zero voltage in SiC MOSFETs, known as the “body diode effect” [13]. Negative gate bias can eliminate the body diode effect, and the body diode voltage change can be used as a precursor of gate oxide degradation at negative gate voltage and low current. To be specific, at a negative voltage, the current flow occurs exclusively through the PiN diode without the involvement of the

Body Diode Characteristics (IS-VSD) Another suitable precursor for aging monitoring in MOSFET is the reverse voltage drop (VSD). At higher currents,

FIG 8 On-resistance change over power cycles (at VGS = 15 V, ID = 20 A).

FIG 9 Body diode characteristic change over power cycles (at VGS = 0 V TCASE = 30 °C).



FIG 10 Parasitic capacitances change over power cycles (at f = 1 MHz, VAC = 30 mV). (a) Input capacitance. (b) Output capacitance. (c) Reverse transfers capacitance.

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channel. Consequently, any potential drift in the threshold voltage will not have an impact on the voltage drop of the body diode [14]. Body diode characteristic change over power cycles at zero gate voltage and small drain currents is shown in Figure 9.

Parasitic Capacitances The changes in parasitic capacitances over power cycles are depicted in Figure 10. The parasitic capacitance monitoring can provide valuable insights into the physical mechanisms responsible for the gate oxide degradation and help in the development of more reliable and robust MOSFETs. One can observe that the parasitic capacitances of the MOSFET do not change significantly over package degradation. To be precise, the parasitic capacitances experience a minor change due to the nominal positive gate voltage required for switching on the MOSFETs during the power cycling test and are not significantly affected by package degradation.

Bilal Akin ([email protected]) received the Ph.D. degree in electrical engineering from the Texas A&M University, College Station, TX, USA, in 2007. From 2005 to 2008, he was a Research and Development Engineer with Toshiba Industrial Division, Houston, TX, USA. From 2008 to 2012, he was a Research and Development Engineer with C2000 DSP Systems, Texas Instruments Inc. Since 2012, he has been with The University of Texas at Dallas, Richardson, TX, USA, as a Faculty Member. His research interests include design, control and diagnosis of electric motors and drives, digital power control and management, and fault diagnosis and condition monitoring of power electronics components and ac motors. He was a recipient of NSF CAREER 2015 Award, IEEE T ransactions on Industry Applications First Place Prize Paper Award and Top Editors Recognition Award from IEEE TVT Society, and two Jonsson School Faculty Research Awards. He is currently an Area Editor of IEEE T ransactions on Vehicular Technology. He is a Fellow of IEEE.

Conclusion In this article, an extensive assessment of accelerated lifetime tests and their relative failure mechanisms is provided for SiC MOSFETs. The article provides a detailed discussion on the configuration and control methodology of the ac power cycling test setup. The key parameters of the power devices are measured at specific intervals during ac power cycling using a semiconductor curve tracer. The results show changes in electrical parameters with respect to aging cycles, and common precursors’ shift patterns are identified and presented.

About the Authors Masoud Farhadi received the B.Sc. degree (Hons.) in electrical engineering and the M.Sc. degree (Hons.) in power engineering (power electronics and systems) from the Department of Electrical Engineering, University of Tabriz, Tabriz, Iran, in 2013 and 2016, respectively. He is currently working toward the Ph.D. degree at the University of Texas at Dallas, Richardson, TX, USA. His current research interests include analysis and control of power electronic converters, reliability of power electronic systems, wide bandgap semiconductor device reliability, and renewable energy conversion systems. He received the 2020 Jonsson School Industrial Advisory Council Fellowship, 2021 OK Kyun Kim and Youngmoo Cho Kim Graduate Fellowship, and 2022 Excellence in Education Doctoral Fellowship from the University of Texas at Dallas. Bhanu Teja Vankayalapati received the M.Tech. degree in power electronics from the Indian Institute of Technology (BHU), Varanasi, India, and the Ph.D. degree from UT Dallas, in 2017 and 2022, respectively. He is currently working as Systems Engineer at Texas Instruments, Dallas, TX, USA. His research interests include WBG device applications, WBG reliability, converter design, and embedded control. He is a member of IEEE.

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References

[1] M. Farhadi et al., “Gate-oxide degradation monitoring of SiC MOSFETs based on transfer characteristic with temperature compensation,” IEEE Trans. Transport. Electrific., early access, 2023, doi: 10.1109/ TTE.2023.3265386. [2] B. T. Vankayalapati et al., “A practical switch condition monitoring solution for SiC traction inverters,” IEEE J. Emerg. Sel. Topics Power Electron., vol. 11, no. 2, pp. 2190–2202, Apr. 2023. [3] M. Farhadi, M. Abapour, and M. Sabahi, “Failure analysis and reliability evaluation of modulation techniques for neutral point clamped inverters—A usage model approach,” Eng. Failure Anal., vol. 71, pp. 90–104, Jan. 2017. [4] L. C. Yu et al., “Channel hot-carrier effect of 4H-SiC MOSFET,” Mater. Sci. Forum, vols. 615–617, pp. 813–816, Mar. 2009. [5] A. J. Lelis et al., “Basic mechanisms of threshold-voltage instability and implications for reliability testing of SiC MOSFETs,” IEEE Trans. Electron Devices, vol. 62, no. 2, pp. 316–323, Feb. 2015. [6] D. A. Gajewski et al., “SiC power device reliability,” in Proc. IEEE Int. Integr. Rel. Workshop (IIRW), South Lake Tahoe, CA, USA, Oct. 2016, pp. 29–34. [7] B. T. Vankayalapati et al., “A highly scalable, modular test bench architecture for large-scale DC power cycling of SiC MOSFETs: Towards data enabled reliability,” IEEE Power Electron. Mag., vol. 8, no. 1, pp. 39–48, Mar. 2021. [8] B. T. Vankayalapati et al., “Investigation and on-board detection of gateopen failure in SiC MOSFETs,” IEEE Trans. Power Electron., vol. 37, no. 4, pp. 4658–4671, Apr. 2022. [9] N. Stojadinovic et al., “Effects of electrical stressing in power VDMOSFETs,” in Proc. IEEE Conf. Electron Devices Solid-State Circuits, vol. 45, Dec. 2003, pp. 291–296. [10] M. Farhadi et al., “Temperature-independent gate-oxide degradation monitoring of SiC MOSFETs based on junction capacitances,” IEEE Trans. Power Electron., vol. 36, no. 7, pp. 8308–8324, Jul. 2021. [11] M. Hauck et al., “Quantitative investigation of near interface traps in 4H-SiC MOSFETs via drain current deep level transient spectroscopy,” in Proc. Eur. Conf. Silicon Carbide Rel. Mater. (ECSCRM), Halkidiki, Greece, 2016, p. 1. [12] B. J. Baliga, Fundamentals of Power Semiconductor Devices. New York, NY, USA: Springer, 2008, pp. 278–500. [13] J. A. O. González and O. Alatise, “A novel non-intrusive technique for BTI characterization in SiC MOSFETs,” IEEE Trans. Power Electron., vol. 34, no. 6, pp. 5737–5747, Jun. 2019. [14] E. Ugur et al., “A new complete condition monitoring method for SiC power MOSFETs,” IEEE Trans. Ind. Electron., vol. 68, no. 2, pp. 1654–1664, Feb. 2021.



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Industrial Adoption of Energy Harvesting: Challenges and Opportunities by Thomas Becker, Michail E. Kiziroglou, Maeve Duffy, Bahareh Zaghari, and Eric M. Yeatman

T

he Energy Harvesting Committee of the Power Supply Manufacturers Association (PSMA) recently published a white paper on Energy Harvesting (EH) for a green internet of things (IoT) [1]. In that paper, the potential for converting ambient energy into electrical energy to enable green power supplies of IoT key components,

Digital Object Identifier 10.1109/MPEL.2023.3271199 Date of publication: 27 June 2023

2329-9207/23©2023IEEE

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such as autonomous sensor nodes is evaluated. The white paper provides an overview of energy harvesting, ranging from state-of-art technology research, through barriers in developing commercial off-the-shelf products, to a critical assessment of several EH powered wireless sensor case studies. Issues in cost-benefit and life-cycle impacts

are identified. For these issues, a concerted strategy in research and technology is recommended, incorporating disruptive industrial product developments, and innovations to ensure that the advantages of EH are utilized in widespread future IoT deployment. Building on the findings of that work, this article provides a brief overview of key innovation and emerging research needs in order to  increase the suitability and  readiness of energy harvesting technology for industrial applications.

Introduction

FIG 1 Evolution of number of IoT devices per person at worldwide scale, calculated from publicly available data [2].

FIG 2 Cost of energy from various sources and in various forms, from publicly available statistics and prices [2].

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EH devices have gathered attention in the IoT community, including public funding bodies and various industry sectors in recent years. The central objective is to address the power autonomy challenges of the dramatically increasing number of interconnected devices. Indicatively, the global number of IoT devices per person is expected to rise beyond 10 in the short term, as shown in Figure 1 [2]. These challenges are especially important because the cost of portable power is over three orders of magnitude higher than that of the electrical grid. An indicative cost comparison is illustrated in Figure 2 [2]. Many valid technologies have been investigated, leading to a substantial set of state-of-the-art devices. In [3] and [4] a wide range of underlying principles and concepts are described. These concepts are usually at technology readiness level (TRL) 2 or TRL 3 [5]. Over the years, these components have been integrated and successfully tested in use case scenarios, reaching TRL 3 or even 4. However, the validation of energy harvesting power supplies in industrially relevant environments often fails due to insufficient matching to operational system requirements. Even though

some examples of successful validation in relevant environments are reported [6], validation attempts at TRL 5 or TRL 6 typically lack sufficient advance knowledge of device performance in realistic operating scenarios. Despite these current technology limitations, energy autonomy remains vital for wireless systems that involve several edge nodes especially in remote or difficult to access locations. Key benefits, such as reduced sensor maintenance and battery replacement/recharging costs, and increased sensor spatial resolution, are clearly visible in using autonomous wireless monitoring. This becomes even more emphatic when life cycle assessments from cradle to grave are considered, either at power supply or integrated autonomous wireless sensor level. To leverage these benefits, further research and development in energy autonomous microsystems is needed, which will contribute to a greener IoT ecosystem by tackling the above-mentioned challenges [7]. EH does not consist of a single technology; therefore, a research strategy (and support ecosystem of stakeholders) must deal with many aspects of the various technologies and methodologies. The research agenda discussed here focuses on developments with direct impact on innovation and availability of EH devices.

Technology Research

light, heat flow or vibration at a narrow frequency range. Hence, customized device designs are employed for each specific application. ■■Reliability of durable assets; such as cars, machinery, or aircraft; must not be compromised by the harvesting devices. ■■In most cases, energy storage is required in addition to the energy harvester itself. Batteries or supercapacitors are often seen as a burden, which restrict applicability to mild environmental conditions and require additional hazard management. They can also suffer from limitations in number of lifetime charge cycles and/or self-discharge. ■■Adequate energy supply and endurance in non-standard operations; such as during maintenance, repair, and overhaul (MRO); is a key challenge as EH devices are typically designed to operate in specific environments. ■■Obsolescence management is another key challenge. In the emerging dynamic market of energy harvesting, the provision of spare parts is critical. Lack of standards and the dominance of start-ups in the market make long-term supply chain sustainability unclear. Increasing device functionality to more sporadic and broadly occurring conditions is now a common objective among EH research efforts. Examples of proposed solutions for EH from motion include broadband, impulse and frequency up-conversion mechanical oscillators [8], bistable structures, and frequency up-conversion circuits. As an example, an impulse motion energy harvested integrated into a wireless sensor platform is shown in Figure 3. In heat harvesters, advanced heat flow designs (including dynamic thermoelectric harvesting) and the employment of

Beyond the state-of-the-art and the roadmap of evolution for transduction materials, which is key for increasing the efficiency of individual harvesting components, recent and imminent technology advances offer opportunities for overcoming some of the key issues identified at overall device level. EH offers many advantages over batteries or wires, but end-user perspectives may differ dramatically from an individual technology provider. Commercial user expectations are clearly focused on the overall efficiency enhancement instead of individual technology improvements. For successful implementation in future applications, several limitations must be addressed: ■■System integrators are accustomed to specifying a device as a black box with defined interfaces for input and output parameters. EH still requires engineering advancements for standardization of its interfaces to ambient energies and the energy use. ■■Most EH solutions rely on the availability of very specific environmental condi- FIG 3 Electrostatic impulse motion harvester integrated with pH sensing and wireless communitions, such as direct sun- cation, from [11].

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FIG 4 Dynamic thermoelectric energy harvester, from [12].

heat storage units with phase change materials [9], provide access to significant ΔT on the transducer from realistic environments (Figure 4). The power from weak lighting conditions of indoor environments can be enhanced by employing semiconductors with bandgaps covering the spectrum of indoor LED sources, and by employing light concentration architectures initially proposed for increasing the output power per unit mass of active material [10]. Functionality expansion can also be achieved by combining more than one transduction mechanism into hybrid energy harvesters, in which several types of environmental energy can be harvested by single or multiple active materials [13], [14]. This can increase power density in certain conditions, but more critically, it can make the autonomous power supply less dependent on the environment. More generally, focusing the input environmental power (or energy) on the transducing material is advantageous because it directly increases power density by reducing active material mass as well as by increasing efficiency, which often increases with the intensity of the power source. In addition, higher intensity typically leads to higher output voltage levels, which can be handled more efficiently by power management circuitry. An example is the magnetic field focusing technique for inductive EH from distributed structural currents (Figure 5) [15]. Such devices can also be designed for installation onto power lines using modular, retrofitting, and compact device designs (Figure 6). The light concentration technique [10] is an application of this concept to solar harvesting. The concept of power focusing could also be considered for motion energy harvesting devices within

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a more general motiontranslation and compliancematching framework, or for radio frequency and acoustic energy harvesting devices, as well as for wireless power transfer transceivers. In the case of energy focusing, the near-linear scaling of thermo-electric generators (TEG) efficiency with ΔT means that the performance of thermoelectric harvesters can be drastically enhanced by accumulating thermal energy before passing it through a TEG, so that a given amount of heat energy is converted at a higher ΔT [16]. The combination of EH devices and wireless power transfer is also interesting, especially for uncertain environments. An EH source normally transduces environmental energy, but may also be designed to receive transmitted power on occasions, such as system installation, priming and testing, diagnostics and maintenance operations, or scheduled supplementary power support for more intense operating scenarios, e.g., a full-capability sampling of a wireless sensor network that usually operates with a low duty cycle [15]. Examples of such sources include: ■■A vibrational harvester driven to resonance by deliberately induced vibrations, or acoustic waves to initiate or fully charge the target system. ■■A solar harvester illuminated with intense lighting on necessary occasions. ■■A thermal harvester artificially provided with heat; an inductive harvester excited by an inductive power transfer transmitter. ■■A far-field RF harvester receiving a deliberately transmitted signal. ■■An inductive power line energy harvester, used as a receiver for inductive wireless power transfer from a charging wand, for testing, initiation or activation of more intensive data acquisition. The combination of EH with wireless power transfer, including RFID (Figure 7), is expected to offer critical features, including testability, and to enhance the reliability of power autonomy for IoT, both during the early stages of industrial adoption and in the long term. At the power management level, integrated circuit solutions are available with sub-μW quiescent power consumption, offering impedance matching, cold-starting, voltage boosting/bucking, battery and super-capacitor management, and rectification. A block diagram of

a typical power management architecture is shown in Figure 8. The challenge of efficient cold-starting, especially in combination with low-voltage rectification, offers an open opportunity for enhancing state-of-theart EH power supplies. The additional exploitation of ambient energy, such as motion as a direct switching mechanism, has shown significant potential for expanding the applicability of EH to weaker energy sources [20]. Furthermore, actively driving the EH transducers by techniques such as piezoelectric pre-biasing [21] and synchronized switch-on inductor [22], has been shown to improve power density and should be considered further. Super-capacitors are increasingly favored as buffer energy stores in harvester systems due to their high power density and number of charge cycles; howFIG 5 Flux funneling inductive energy harvester, from [17]. ever, their relatively high leakage currents are a barrier to wider adoption, which needs to be addressed in further research [23]. Another advantage of energy harvesters over batteries for wireless applications is the time extension between maintenance events. For this advantage to be realized, harvester devices must achieve high mean-timebetween-failure (MTBF) values, ideally of many years. Significant work remains in this area. For example, long-term degradation of piezoelectric material (PZT) performance has been shown, but there is promise in using prestress to keep the active material always in compression [24]. The advantage of EH over batteries will be absolute in cases where the operating environment prevents the use of FIG 6 Modular design for flux funnelling inductive harvesting from power lines [18]. electrolytic components due to excess temperatures. Therefore, development of harvesting solutions fully compatible with such extreme environments is an attractive topic for future work. Since batteries will also be excluded as storage in such cases, alternatives will be needed, for example, mechanical energy storage. As discussed, energy harvesters tend to require specific designs for each application scenario. The lack of universal devices, particularly compared to batteries and radio FIG 7 RFID like Flexible Tag Microlab, a 2D foil integrated system, from [19].

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actuation, communication, mechanical support, and protection. As such, energy harvesting devices can be developed at system integration level, offering several opportunities including 1) joint sensing and harvesting from a common transducer, 2) combined harvesting and harsh-environment protection, e.g. by mechanical shockdamping, smoothing temperature transients [25], radiation, and field shielding [15], 3) joined power and data (Figure 9) reception [26], and 4) a complimentary multidimensional design space in which energy harvesting can support the power autonomy of portable systems.. Such functional integration would be particularly valuable for applications with stricter size or weight constraints. The availability of modular building blocks currently Development and Sustainability drives the use case development. As pointed out above, sysIn an integrated system, EH lies at the interface between a tem integrators do not want too many iterative steps in the wireless system and the environment. It can be considered development of low level components. Therefore, system as part of an interactive package, along with sensing, design software, such as web-based development tools, could provide a key medium for communicating principles and performance of EH to the end users in a comprehensive manner, including during early development stages. Such software may help foster the FIG 8 Power management architecture of a typical energy harvesting power supply [2]. acceptance of harvesting devices by industrial users. Software can also provide a key role in predicting and optimizing system-level performance of parts and predicting overall battery life in advance of deployments. This can guide developers towards optimization and provide an effective medium of communication and collaboration for stakeholders in the power IoT ecosystem fostering interdisciplinary collaborations [1]. Furthermore, recyclability and compliance with current and f u t u r e  le g i s l a t io n s towards green initiatives and international sustainable developFIG 9 Developing (a) energy harvesting and (b) wireless power transfer systems. (c) The concept of ment goals is of utmost designing for dual, harvesting/transfer functionality, from [15]. interfaces, limits the ability to manufacture energy harvesters in high volume at low cost. This lack of universality can be tackled in various ways. One possibility is to increase the use of modularization. For example, vibration harvesters could combine a use-specific motion adaptation module with a standard mechanical-to-electrical transduction module. Standard thermoelectric modules could be combined with low-cost thermal conductors for geometric transformation to adapt to source characteristics to maximize efficiency. Such modular approaches should be closely tied to standardization and inter-operability efforts, as discussed below.

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importance to industrial applications. In this perspective, energy autonomy is a key requirement for IoT technology to achieve the reliability and sustainability objectives of the global environmental roadmap. This includes private and public industrial, network, and civil infrastructure (including communication) as well as data acquisition, analysis, and exploitation infrastructure.

Innovation and Outlook for Industrial Deployment Beyond device- and system-level research and development, innovation towards easy-to-install devices and fast transfer into industrial products is required and will need additional support, because start-ups or small and medium enterprises are often the technology drivers. This is also true for obsolescence management in dynamic technology areas. Making commercial off-the-shelf (COTS) devices available for a broad range of power/ energy requirements is a first step on which many companies are working. However, as customized components and fabrication are often required in the production of energy harvesting devices, supply chains must be supported by public bodies and industry to help small companies enter the market in a sustainable way. Standardization is another step towards market acceptance. EH is currently constrained between wireless communications standards and measurement rules for dedicated monitoring tasks. A more determined step towards standardization is strongly recommended to support, shape, coordinate, and guide research efforts at the component and device level, prioritizing restrictions, and accounting for future challenges. There are many opportunities for EH beyond the inherent self-powering aspect. The vision of IoT deployment, high-speed wireless networking, and potential applications is currently obscured by powering limitations, and addressing them may open unforeseen opportunities in fields like pervasive/autonomous sensing, computing, intelligence, and virtual sensing. As EH is reaching a technology mutation point, its combination with wireless power transfer, fast and low-power communication and computation, and smart multi-functional interfacing and integration will provide true wireless, maintenance-free, and green IoT nodes for several applications. As an example, an integrated and industrialized aircraft strain sensor powered by dynamic thermal energy harvesting, certified for flight tests is shown in Figure 10. Standardization could bridge the yet-unshaped new capabilities offered by energy harvesting to the requirements of industrial users, avoid compatibility and divergence issues, and provide a harmonized research and investment framework for forecastable, sustainable growth. Turning the power autonomy technology from a collection of niche opportunities and singular inventions to a reliable research and development platform would offer benefits analogous to those of Moore’s-law in microelectronics.



FIG 10 The heat-powered STRAINWISE aircraft sensor node, from [27].

Acknowledgment The authors would like to thank the Power Supply Manufacturers Association (PSMA) and the Energy Harvesting Committee of PSMA for supporting this work.

About the Authors Thomas Becker received the M.Sc. degree in microelectronics and the Ph.D. degree in microsystems for the work on micro reactor technologies at the University of Bremen, Bremen, Germany. Between 1994 and 2000, he was working at DAIMLER-BENZ (Mercedes) Research, Munich, Germany, as a Research Fellow on various aspects of sensor technologies for automotive applications. From 2000 to 2017, he was working for AIRBUS (EADS) Research, Munich and Hamburg, Germany, as the Manager of the chemical sensors laboratory, as the Key Technology Area Manager for microsystems, electronics, and microelectronics, and as an Expert for wireless communications, autonomous sensor systems, and energy harvesting (EH) for aerospace applications. From 2003 to 2019, he was a Professor for micro and nano technologies at the Physics Department, NTA University of Applied Sciences, Isny, Germany. He is the Founder of THOBECORE Consulting and Research, Bremen, Germany, supporting public organizations, companies, and institutes in research and innovation or as a Member of advisory boards. He is the author and co-author of about 150 publications in textbooks, scientific journals, and conferences (h-index 26) and he holds about 100 patents or pending patents. Moreover, he is acting as a Guest Editor and a Reviewer for various scientific journals. He also served as the Chairman for several international conferences. Michail E. Kiziroglou received the diploma degree in electrical and computer engineering from the Aristotle University of Thessaloniki, Thessaloniki, Greece, and the master’s degree in microelectronics and nanoelectronics from the Democritus University of Thrace, Thrace, Greece, in 2000 and 2003, respectively. He received the Ph.D. degree in microelectronics and spintronics awarded by the University of Southampton, Southampton, U.K., in 2007. He is a Research Fellow with the Optical and Semiconductor Devices Group of Imperial College London and an Associate June 2023

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Professor at the Department of Industrial Engineering and Management, International Hellenic University, Thermi, Greece. His research interests include energy harvesting (EH) devices, microengineering, and energy autonomous wireless sensors. He is a Senior Member of IEEE. Maeve Duffy received the Ph.D. degree in electronic engineering at the Power Electronics Research Centre, NUI Galway, Ireland, in 1997. She spent over four years as a Research Assistant with PEI Technologies, National Microelectronics Research Centre (now Tyndall National Institute), Cork, Ireland, where she worked on several industry and EU funded projects on the design of planar magnetic components for integration in different packaging technologies, including thinfilm, thick-film, and PCB. She returned to NUI Galway in 2001, where she is currently a Senior Lecturer in electrical and electronic engineering. Bahareh Zaghari received the M.Sc. degree (Hons.) in electromechanical engineering from the University of Southampton, Southampton, U.K., in 2012. She received the Ph.D. degree in dynamic analysis of a nonlinear parametrically excited system using electromagnets from the Institute of Sound and Vibration (ISVR), University of Southampton, in 2017. She was a Research Fellow at the School of Electronics and Computer Science, University of Southampton, and she was working on the design of smart systems, such as the next generation of jet engines and smart cities. She is currently a Lecturer in propulsion integration with Canfield University, Canfield, U.K. Eric M. Yeatman received the B.Sc. degree from Dalhousie University, Halifax, Canada, and the Ph.D. degree from Imperial College London, London, U.K., in 1983 and 1989, respectively. He is currently a Professor of micro-engineering and the Head of the Electrical and Electronic Engineering Department, Imperial College London. His research interests include motion and thermal energy harvesting (EH) for wireless devices, pervasive sensing, and sensor networks. He is a Fellow and Silver Medalist of the Royal Academy of Engineering, and is the Cofounder and the Director of Microsaic Systems, which develops and markets miniature mass spectrometers for portable chemical analysis. He is a Fellow of IEEE.

References

[1] T. Becker et al., “Energy harvesting for a green Internet of Things,’’ Power Supply Manufacturers Assoc., Mendham, NJ, USA, White Paper, 2021. [2] M. E. Kiziroglou and E. M. Yeatman, “Energy harvesters and power management,” in More-Than-Moore Devices and Integration for Semiconductors, F. Iacopi and F. Balestra, Eds. Cham, Switzerland: Springer, 2023, pp. 1–45. [3] D. Briand, E. Yeatman, and S. Roundy, Micro Energy Harvesting. Weinheim, Germany: Wiley-VCH, 2015. [4] M. Belleville and C. Condemine, Energy Autonomous Micro and Nano Systems. Hoboken, NJ, USA: Wiley, 2012.

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[5] I. Tzinis. (2012). NASA, Technology Readiness Level. [Online]. Available: https://www.nasa.gov/directorates/heo/scan/engineering/technology/technology_readiness_level [6] D. Samson et al., “Flight test results of a thermoelectric energy harvester for aircraft,” J. Electron. Mater., vol. 41, no. 6, pp. 1134–1137, Jun. 2012. [7] M. Hayes et al., “EnABLES: European infrastructure powering the Internet of Things,” in Proc. Smart Syst. Integr., 13th Int. Conf. Exhib. Integr. Issues Miniaturized Syst., Apr. 2019, pp. 1–8. [8] H. Jiang et al., “A motion-powered piezoelectric pulse generator for wireless sensing via FM transmission,” IEEE Internet Things J., vol. 2, no. 1, pp. 5–13, Feb. 2015. [9] A. Elefsiniotis et al., “Investigation of the performance of thermoelectric energy harvesters under real flight conditions,” J. Electron. Mater., vol. 42, no. 7, pp. 2301–2305, Jul. 2013. [10] E. C. Warmann et al., “An ultralight concentrator photovoltaic system for space solar power harvesting,” Acta Astronaut., vol. 170, pp. 443–451, May 2020. [11] C. He et al., “A MEMS self-powered sensor and RF transmission platform for WSN nodes,” IEEE Sensors J., vol. 11, no. 12, pp. 3437–3445, Dec. 2011. [12] M. E. Kiziroglou et al., “Milliwatt power supply by dynamic thermoelectric harvesting,” presented at the PowerMEMS, Daytona Beach, FL, USA, Dec. 2018. [13] Y. K. Tan and S. K. Panda, “Energy harvesting from hybrid indoor ambient light and thermal energy sources for enhanced performance of wireless sensor nodes,” IEEE Trans. Ind. Electron., vol. 58, no. 9, pp. 4424–4435, Sep. 2011. [14] H. Liu et al., “Hybrid energy harvesting technology: From materials, structural design, system integration to applications,” Renew. Sustain. Energy Rev., vol. 137, Mar. 2021, Art. no. 110473. [15] M. E. Kiziroglou, S. W. Wright, and E. M. Yeatman, “Coil and core design for inductive energy receivers,” Sens. Actuators A, Phys., vol. 313, Oct. 2020, Art. no. 112206. [16] M. E. Kiziroglou et al., “Design and fabrication of heat storage thermoelectric harvesting devices,” IEEE Trans. Ind. Electron., vol. 61, no. 1, pp. 302–309, Jan. 2014. [17] M. E. Kiziroglou, S. W. Wright, and E. M. Yeatman, “Power supply based on inductive harvesting from structural currents,” IEEE Internet Things J., vol. 9, no. 10, pp. 7166–7177, May 2022. [18] S. W. Wright, M. E. Kiziroglou, and E. M. Yeatman, “Inductive power line harvester with flux guidance for self-powered sensors,” IEEE Sensors J., early access, Dec. 2, 2022, doi: 10.1109/JSEN.2022.3225050. [19] B. Zahnstecher et al., “Integrated power electronics,” in Heterogeneous Integration Roadmap 2021 Edition. Piscataway, NJ, USA: IEEE EPS, 2021, ch. 10. [20] G. Lombardi et al., “A piezoelectric self-powered active interface for AC/ DC power conversion improvement of electromagnetic energy harvesting,” Smart Mater. Struct., vol. 29, no. 11, Nov. 2020, Art. no. 117002. [21] A. D. T. Elliott and P. D. Mitcheson, “Implementation of a single supply pre-biasing circuit for piezoelectric energy harvesters,” Proc. Eng., vol. 47, pp. 1311–1314, Jan. 2012. [22] D. Guyomar et al., “Toward energy harvesting using active materials and conversion improvement by nonlinear processing,” IEEE Trans. Ultrason., Ferroelectr., Freq. Control, vol. 52, no. 4, pp. 584–595, Apr. 2005. [23] G. V. Merrett and A. S. Weddell, “Supercapacitor leakage in energyharvesting sensor nodes: Fact or fiction?’’ in Proc. 9th Int. Conf. Netw. Sens. (INSS), Jun. 2012, pp. 1–5. [24] P. Pillatsch et al., “Degradation of bimorph piezoelectric bending beams in energy harvesting applications,” Smart Mater. Struct., vol. 26, no. 3, Mar. 2017, Art. no. 035046. [25] M. E. Kiziroglou and E. M. Yeatman, “Protection of electronics from environmental temperature spikes by phase change materials,” J. Electron. Mater., vol. 44, no. 11, pp. 4589–4594, Nov. 2015. [26] M. E. Kiziroglou et al., “Acoustic power delivery to pipeline monitoring wireless sensors,” Ultrasonics, vol. 77, pp. 54–60, May 2017. [27] L. V. Allmen et al., “Aircraft strain WSN powered by heat storage harvesting,” IEEE Trans. Ind. Electron., vol. 64, no. 9, pp. 7284–7292, Sep. 2017. 

©SHUTTERSTOCK.COM/SPAINTER_VFX

Optimizing PCB Layout for HV GaN Power Transistors by Eric Persson

P

rinted circuit board (PCB) layout has been an integral aspect of power electronic design since the first switching power supplies appeared more than 40 years ago. Regardless of the transistor technology, the parasitic impedances added to the circuit by the PCB layout must be understood and managed for the circuit to function correctly, reliably, and without causing undue electromagnetic interference (EMI). Even though modern wide bandgap (WBG) power semiconductors do not suffer the severe reverse-recovery problems of older silicon (Si) technologies,

Digital Object Identifier 10.1109/MPEL.2023.3275311 Date of publication: 27 June 2023

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Since design of the power loop their much faster switching transiincludes thermal as well as electrical tions result in even more extreme Depending on the path optimization, the options and commutation dv/dt and di/dt than geometric relationship tradeoffs of top versus bottom-side their silicon predecessors. The comcooled transistor packages are covmon advice offered by generic applibetween source and ered. Finally, the design, layout and cation notes on power electronic return current, the routing of the gate drive circuit, along PCB layout is to “minimize parasitic with its “hidden” current paths are inductance as much as possible.” mutual inductance can explained. However, the best way to do that is change the sign not always clear. Moreover, not all conductive paths necessarily need What Problem are We Trying to resulting in subtraction to be lowest possible inductance: Solve? rather than addition. consider the interconnection to an The physical layout and packaging of inductor—clearly there will already power electronic circuits adds “parabe inductance in that path. sitic” circuit elements R Parasitic , It is of course impossible to minimize all interconCParasitic, and LParasitic. These parasitic elements can cause nect inductance, and simultaneously eliminate all nodeunexpected behavior and unintended consequences, circuit to-node capacitance on a PCB. The key to successful malfunction, EMI, oscillations, and in severe cases, crossPCB layout is therefore to understand where the impedconduction or “shoot-through” that can lead to transistor ances really matter in switch-mode power electronics, failures. Resistive parasitics are comparatively easy to and how to mitigate any undesired consequences of this understand—especially for dc current. The solution to miniinevitable impedance. mize parasitic resistance is to use more copper—increase An additional complicating factor is that PCB layout not the total current-carrying cross-section. With high-frequency only involves optimizing the electrical interconnection, but ac currents, the situation is more complex due to skin often requires thermal pathways that conflict with electrieffect. For PCB integrated magnetics, the skin and proximcal optimization goals. Even mechanical structures like ity effects need to be carefully considered, but that is outheatsinks, when applied to the PCB, and separated only by side of the scope of this article. a thin thermal interface material (TIM) can behave like an The concept of parasitic capacitance is also straightadditional electrical plane of the PCB assembly, and interforward. Especially in a structure like a PCB, where the act with the switching nodes of the circuit. copper layers form parallel plates with thin dielectric layThis article begins by explaining the fundamentals: ers in between. We can use simple 2D tools to estimate what is really happening during a switching transition, the C ≈ ε 0 ε R (area / spacing) and we can easily estimate what is the cause versus effect of the transient voltages capacitance per area for a given layer-stackup. As we and currents we see, and where exactly is the current will see later, sometimes the capacitive coupling paths flowing. When we think about current flow, we often forare through components rather than the PCB itself. How get to consider the return path, which is critically impormany pFs are too much versus acceptable? This will be tant. An additional key concept is how we think about covered later as well. inductance: it is often viewed as individual inductive Parasitic inductance is different: basic circuits classes elements that all add-up around a loop. But they don’t teach us to think of inductors as discrete elements that necessarily all add-up: depending on the geometric relasum like resistors in series. However, in more advanced tionship between source and return current, the mutual magnetics courses, we learn they interact with each other inductance can change the sign resulting in subtraction through mutual inductance, which can either increase or rather than addition. The concepts of loop, partial and decrease the total inductance, depending on the geometry mutual inductance help us to explain and understand and direction of current flow. Also, we often don’t have a this interaction. good estimate of layout inductance, or know the magniNext, different power stage layout options are pretude of di/dt to expect from our switching circuit—how sented, along with the tradeoffs involved with each. The much will cause problems? overall goal here is to understand the best ways to miniThese layout issues are not new to power electronics, mize power-loop inductance. With traditional throughbut GaN transistors with low charge and no reverse-recovhole transistors mounted perpendicular to the PCB, the ery make switching transitions even shorter. Fast-switchinductance of the transistor package is independent of ing transistors primarily cause two inter-related issues. The the PCB layout because they are at right angles. For surhigh transconductance of GaN, combined with its low gateface-mounted packages (SMT), the package inductance charge, can result in extremely fast switching dID/dt. The itself is a function of how the return-path is routed, so fast dID/dt leads to high peak currents as the capacitance there are more layout options and alternatives to improve of the switch-node is rapidly discharged—the resulting overall performance. C dVDS/dt adds to the load current. And high peak switching

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current combined with the low QOSS of GaN power transistors causes those fast dVDS/dt edges at turn-on. Why are fast dI/dt and dV/dt problematic? On the one hand, fast turn-on dI/dt reduces switching time and therefore loss, so it should be desirable. But the problems that occur are primarily due to the L dI/dt reaction voltage that appears across parasitic inductive elements. Most commonly the undesirable effects occur in the main commutation loop, or in the gate-drive loop. Voltage overshoot in the power-loop can increase EMI issues, and create higher voltage stress on the transistors, leading to reduced reliability. In the gate loop, L dI/dt reaction voltage will slow switching speed by subtracting from the applied gate voltage, but can also lead to ringing and overshoot of VGS, or even oscillatory behavior which can quickly destroy the transistor. In the next sections we will analyze various layouts, estimate the inductive impedance, and calculate the resulting overshoot voltages.

A Detailed Look at the Half-Bridge in Hard-Switching

“which is the cause versus effect?” For hard-switching transistors, current is the forcing function. During switching, the transistor acts as a transconductance amplifier—driving current in response to the gate signal. How quickly the transistor turns-on (dI/dt) is limited by how quickly the gate can be fully enhanced. dV/dt on the other hand, is an effect: it is the result of how rapidly the applied current can charge the node capacitances. Now consider the switching transients in the half-bridge. Figure 2 shows a half-bridge set-up for pulse-testing: Q2 is the active switch, and Q1 serves as a synchronous rectifier. The switching diagram shows the hard-switched turn-on of Q2, followed by its turn-off (which is essentially ZVS). This emulates the typical circuit operation of a totem-pole PFC operating CCM. In both cases, the initial inductor current is 10 A, and the bus voltage is 400 V. Note that when Q2 turns-on, its drain current far surpasses the 10 A inductor current, peaks at 28 Amps, then returns and settles down to the 10 A inductor current after the resonances damp-out. This waveform looks suspiciously like reverse-recovery, but the key is to look at the timing of vDS versus iD. Reverse recovery prevents the high-side diode (Q1) from blocking voltage—so it essentially remains on (conducting), until the peak of the iD waveform—then vDS begins to change. That is the classic signature of reverse recovery. But here, vDS is clearly beginning to move as soon as the drain current exceeds the inductor current, indicating that the response is purely capacitive with no reverse recovery. The area under the 28 A peak, above the 10 Amp inductor current line represents charge that Q2 has to discharge. It is the sum of Q1 QOSS plus the parasitic PCB capacitance represented by CP. These currents are very difficult to accurately measure on the PCB unless a dedicated widebandwidth current-shunt is added to the circuit. Here we use simulation to estimate the current, and a value for CP is added to the simulation circuit. But even with this simulation, what we don’t see is the internal self-discharge current of Q2 QOSS. While it does contribute to hard-switched losses, the discharge path is entirely contained on the

The half-bridge topology is widely used in power electronics. It is the basis of “totem-pole” bridgeless PFC, full-bridge dc–dc converter, LLC converter, inverters, and many others. Because GaN has low output charge and no body-diode recovery, it is an ideal transistor candidate to use in a halfbridge, and it can be used interchangeably in either hard or soft-switching. Consider the half-bridge as a two-port network as shown in Figure 1. The left-side of the circuit is a voltage port that represents a dc bus. The dc bus voltage should remain steady despite the current transients that occur when the transistors switch. It doesn’t matter if the power flow is to the left or right, in either case, the bus should remain fixed. The right-hand side of the circuit is a current-port. Here, the inductor current should remain steady despite the voltage transients on the switch-node. This is an important distinction, because it indicates that parasitic inductance is important for the loop on the left-side—to minimize L dI/dt transient voltages from appearing across the transistors. But the right-side is already an inductive path— so here it really doesn’t matter if some extra parasitic inductance is added—it will be insignificant compared to the intended inductor. Another useful concept to help understand switching behavior, is to think about “what is the forcing-function?” Rapidly changing currents cause a reaction voltage v = L dI/dt, and rapidlychanging voltage induces current i = C dV/dt, but FIG 1 The half-bridge topology is a two-port network.

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transistor die, so the effect of this added capacitive current is not seen in the PCB layout. Note: the transient current during switching is difficult to measure, and simulation requires adding accurate parasitic elements. In this case, the peak current is 18 A above inductor current, and the slew-rate is about 9 A/ ns at turn-on. This represents a typical value measured on dedicated GaN test setups and characterization platforms, where the turn-on dI/dt is typically measured in the range from 4 to 16 A/ns. This typical value will be used in various layouts to assess what the resulting transient voltages could be.

Mutual and Partial Inductance Before addressing how to minimize parasitic inductance on a PCB layout, a few inductance concepts will be reviewed. Consider a piece of wire formed into a single-layer loop 100 mm in diameter. Measuring the inductance of that loop with an impedance analyzer would indicate about 250 nH. You could make a piecewise linear model of this by connecting a series of n small inductors in series around a loop as shown in Figure 3(a). In this example, n = 8 for simplicity. Knowing that inductors in series sum just like resistors, each of the 8 elements represent a 31 nH segment of the circle. This

FIG 2 Hard-switched turn-on and turn-off of a GaN half-bridge.

FIG 3 (a) Model of inductances around a circular loop and (b) same loop flattened.

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doesn’t hold true if we take the same piece of wire and flatten-out the loop as shown in Figure 3(b): now the measured inductance drops by a factor of 4 or more (depending on the insulation thickness). The change is explained by the concept of partial inductance [1]. The value of each segment L n is equal to its intrinsic inductance in free-space (its partial inductance), plus the effect of mutual inductance M from nearby segments. Note that mutual inductance has both a magnitude and a sign, so it can add-to or subtractfrom the intrinsic inductance. In this example from Figure 3(b), the direction of current flow in L1 and L8 is opposite, thus the mutual inductance subtracts from the partial inductance of each segment. The same holds true for all pairings shown. Power electronic engineers commonly think about mutual inductance when specifically designing a transformer for example, but it seems much less obvious when simply thinking about conductive tracks on a PCB. Another equally valid way to consider Figure 3 round versus flat-loop inductance change is to apply Ampere’s law and note that the loop area has been reduced, and thus the flux linked is also reduced, leading to the inductance reduction. These are simply two different ways to think about the same situation. Consider the same wire-loop experiment in the context of a PCB layout as shown in Figure 4. The loop begins at Cbus+ and ends at Cbus- (the +BUS and GND power-loop). The individual inductive elements represent the wirebonds in the transistor package, the leadframe, copper segments on the PCB and so on. Comparing the two different layer spacings shown in Figure 4(a) and 4(b), it should be clear that the mutual inductance will be greatest when the spacing between the surface-current and the return-path current is smallest. This is also consistent with the smallest loop-area.

Package Inductance—Is It a Fixed Value, or Layout Dependent? Generally, the calculated transistor package inductance is simply the partial inductance—no mutual inductance is presumed external to the package. In other words, the specified package inductance assumes the return-path is infinitely far away and does not affect the partial inductance. For through-hole packages like the TO-220 and TO-247, this assumption is valid, since the package is commonly mounted perpendicular to the PCB and the current paths are orthogonal (thus no mutual inductance). But for surface-mounted packages, an optimized current returnpath will significantly reduce the effective inductance of the in-situ package. To illustrate this, consider a simple half-bridge layout as shown in Figure 5. The power loop runs from the +BUS pad, through Q1 and Q2, from right-to-left through the transistor packages and on the surface layer (gold color). Then the current drops to the second layer (violet color) through vias below Q2 source. The return current then flows the opposite direction back to the GND on the far right. This is like the flattened-loop in Figure 3(b), where each of the parasitic inductances (a bondwire for example) has a corresponding segment in the ground return plane. The mutual inductance (or small loop-area) makes the total loop inductance quite small. In fact, using 3D finite element analysis, the calculated loop inductance of the geometry shown is only 2.8 nH. However, the total package inductance in the transistor models, shows 2.1 nH per transistor. This is a perfect example of how the package partial inductance can be misleading, because it ignores the effect of the return-path as discussed earlier. The explanation is that—the 2.1 nH package inductance is reduced by the mutual inductance of the return-path when laid-out as shown here. While the loop inductance of this example is impressively low, there is a fundamental problem in

FIG 4 (a) Power loop with small spacing between layers maximizes mutual inductance. (b) Increased layer spacing reduces mutual inductance, resulting in a higher overall total power-loop inductance.



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trying to use this layout in a real power converter. There is no space to insert a thermal via field to remove heat from Q1 without creating a big hole in the ground return path under Q1. Figure 6 illustrates the problem. Adding a cutout for thermal vias will redirect the returncurrent under Q1, and this will not only reduce the mutual inductance, but it will create a lateral-loop with additional inductance. Figure 7 shows the addition of the thermal via field, and the cutout necessary for clearance around the voltage of the switch-node. The current-path through the transistors (in red) is essentially the same as before. But now the ground return

path (in blue) is not directly below the red path, and thus a lateral loop is formed, and this reduces mutual inductance, increasing the total loop inductance. Comparing the two otherwise identical layouts: in Figure 5 with no cutout, the loop inductance was 2.8 nH; in Figure 7 with the cutout, the loop inductance more than triples to 8.8 nH. The single-sided return in Figure 7 does leave the gate pads open and easy to connect on either side of the PCB. What if a second, parallel ground return-path were added on the gate side of the transistors? This example is shown in Figure 8. Now there are two lateral loops in parallel, so the parallel combination should reduce the

FIG 5 Low power-loop inductance using surface-mounted “TOLL”-packaged GaN transistors. L = 2.8 nH.

FIG 6 The need for Q1 thermal path will make optimum electrical layout challenging.

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lateral-loop inductance—and it does. The double-sided return-path of Figure 8 has a total loop-inductance of 6.2 nH. This is still more than double compared to Figure 5, but a significant improvement over the single-sided return-path.

The Advantage of Topside-Cooled Transistor Packages The previous layout options using bottom-side cooled packages all require compromises in electrical layout to accommodate the thermal vias necessary to remove heat from the transistor(s). Adding 100 or more thermal vias per transistor not only compromises the electrical layout, but vias cost money: every drill operation (especially for small-diameter drills) adds cost to the PCB manufacturing process.

Another option to consider is using topside-cooled transistor packages. Sometimes these are simply the same bottom-side cooled devices with a flipped lead-bend. But in most cases, the topside-cooled transistors are packages specifically designed to optimize both thermal and electrical performance of GaN transistors. Figure 9 shows an example of the same half-bridge layout, but this time using a TOLT package. The big difference here is that, compared to the previous layouts, there are NO thermal via fields required below the transistors. This saves cost, and allows electrical layout optimization independent of the thermal path. An additional benefit is that the ground and +Bus planes, which are electrically “quiet” equipotential planes, serve as Faraday shields between the noisy switch-node and any other

FIG 7 The ground-plane clearance around via-field creates a lateral-loop in the return-path. L = 8.8 nH.

FIG 8 Double-sided return-path around thermal via field helps to minimize lateral-loop inductance. L = 6.2 nH.



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circuits on the bottom-side of the board. In this example, the high-frequency bus capacitors C1 and C2 are located on the bottom-side of the board. This is sometimes necessary, depending on the height of the capacitors, and the geometry of the heatsink, to avoid interference and enable proper creepage and clearance for the heatsink on top of the transistors. This option does leave a loop above the capacitors, that increases loop inductance, but using a thinner board (0.8 versus 1.6 mm thick for example) will help reduce that added loop inductance. As another option, if there is room to locate C1 and C2 on the same side of the PCB as the transistors, then the layout in Figure 10 can provide an excellent low-inductance power loop. Even though the return path is extended longer than Figure 9 laterally, the spacing between layers is much

thinner (0.18 mm for example), making the overall loop slightly better than Figure 9. The example topside-cooled packages shown here do not have an electrically-isolated heatslug—it is a part of the source leadframe, so it is electrically connected to source potential. The metal is solderable, so individual copper heatsinks could be directly soldered to each transistor. Alternatively, thermal interface materials can be used with many other heatsink options as well.

Summary of Power-Loop Layout Options and Results All of these SMT layout options can be compared to a standard TO-247 package to see the overall loop inductance and estimate what the overshoot voltage would be for a halfbridge assuming 9 A/ns dI/dt as previously discussed. The

FIG 9 Topside-cooled transistors enable optimization of both electrical and thermal paths results in 5.8 nH loop inductance.

FIG 10 Moving capacitors to same side as transistors for lowest overall inductance provides 4.9 nH loop inductance.tance.

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best-case TO-247 layout results in about 15 nH of total loop inductance as shown in Figure 11. Applying this knowledge to the expected di/dt, we see that the resulting overshoot voltage would peak at 135 V. This may exceed the design limits: for example, if the nominal bus voltage is 400 V, and the design rules mandate that peak voltages are ≤80% of rated voltage, then the 535 V peak will exceed that even for a 650 V rated transistor. This suggests that the solution for using TO-247 packages and keeping overshoot voltage below 480 V is to slow-down the switching, by increasing the turn-on and turn-off gatedrive impedances for example. Slowing down switching will of course also increase switching loss—which takes-away from the benefit of using GaN transistors in the first place. The surface-mount TOLL with single-sided returnpath is the next-best option for low power-loop inductance. Figure 11 shows that its layout inductance with 9 A/ ns applied would result in an 81 V overshoot—just at the design goal of 480 V peak assuming a 400 V bus. By adding the parallel return-path on the gate-side (the TOLL dual return-path), the loop inductance is now low enough that the overshoot voltage is 54 V, providing some additional margin so that even if the bus is pumped-up to 420 V, the added 54 V overshoot will stay below the 480 V design goal. All three of the bottom layouts in Figure 11 have sufficiently low loop inductance, providing suitable options for either top or bottom-side cooled packages.

Considerations for Gate-Drive Layout GaN transistors have low threshold voltages, typically in the range of 1–2 V. In addition, the fully-ON VGS is in the range of 3.5–5 V (depending on the gate technology), and the transconductance of the transistor, as well as its gain-bandwidth,

are quite high in the active region. This set of characteristics makes it imperative that the gate-drive loop must be lowimpedance, otherwise CGD dVDS / dt current injected through the “Miller” capacitance (CGD) will influence the gate voltage, resulting in ringing, overshoot, potentially high-frequency oscillation, and spurious turn-on leading to potentially destructive cross-conduction or “shoot-through.” One of the biggest challenges is keeping the gate off when a fast-rising dV/dt appears on its drain voltage. It is all but impossible to make the gate-drive loop low enough impedance with separately-packaged transistor and driver. This is primarily why negative gate-bias is used in discrete designs: to provide sufficient margin so that gate bounce voltage does not exceed the threshold during switching transients. We can use the concepts discussed earlier regarding power-loop inductance to optimize the gate-loop as well. Figure 12 shows an example layout of a gate-drive IC connected to a TOLL packaged transistor. Just like in the optimized power-loop, the concept here is to use a pair of over/under PCB layers with close-spacing to maximize the mutual inductance (minimize loop area and gate drive loop inductance). This example includes the RC network used with the gate injection transistor (GIT) version of the GaN HEMT, including separate RON and ROFF for the separate source and sink pins on the driver. The 6-pin gate-driver package U1 is on the far right with its supply bypass capacitor C3. The 4 RC components are in-line to the gate pin of the GIT, all on the surface-layer (red). The Kelvin Source (KS) pin of the GIT is the reference point for the return-path, which is defined by the copper-pour polygon on layer 2 (dark brown color). The return-path terminates back at the “GND” connection of

FIG 11 Summary of power-loop inductance and implications.



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FIG 12 Example gate-drive layout with return-plane directly below the drive circuit.

U1 and C3. Figure 13 shows the routing more clearly without the component bodies including the vias that connect the KS pin as well as GND for the driver to the plane. This method of placement and routing for gate drive provides the best overall performance for designs using discrete gate-drive components (not integrated into the transistor package). Note that the gate-drive return-plane uses layer 2, the same as the power-loop return-plane to the left. Thus, implementation of this gate-drive layout can be used only with the single-sided return-path of the power loop earlier described (because the gate-drive returnplane occupies the same space needed for the additional power-loop return-path). If I need the lower inductance power loop layout using the double-sided return, an alternate layout of the gate driver is necessary.

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To keep the gate-drive circuit on the top layer next to Q1 and use the double-sided power-loop return-path from Figure 8, there are two problems: first, since layer 2 for the return-plane can’t be used, a lateral gate-drive loop—all on the top layer—must be used as shown in Figure 14. Note that in this example, the gate drive circuit has only turn-on and turn-off resistance for the Schottkygate HEMT, instead of the RC network of the previous GIT example. To keep the loop as small as possible, the return-path is routed right next to the drive path (follow how the KS pin connects to the driver pin 2). The second problem is much more challenging: the high-side gate-drive circuit is located right on top of the ground-plane for the dc bus. Even though the capacitance may be relatively small, the ΔV is large—the full

bus voltage. Moreover, the dv/dt across this capacitance is the fast dv/dt of the switch-node. The simplified parasitic PCB capacitance is drawn in red on the schematic in Figure 14. This type of layout will most likely experience problems due to the charge injected into the gate-drive circuit on every switching edge. This is an example of one of the compromises or tradeoffs that often must be made during a PCB layout: optimizing the gate driver layout results in a less-optimal power-loop. Conversely, optimizing the power-loop produces gate drive layout problems. There is another approach to the gate-drive layout to consider: keep the double-sided return-path for the power-loop and move the gate-drive circuit to the back-side of the PCB. The gate drive loop would then need to include

FIG 13 A more detailed look at the gate-drive loop routing from Figure 12.

vias to connect to the transistor. Side-by-side vias provide a reasonably low-impedance, and the back-side of the board is farther away from the ground-plane. This seems like a promising approach, but there is still another layer to work with that can provide a unique solution.

Using a Driven Faraday Shield With the gate-drive circuit on the back-side of the PCB as shown in Figure 15, layer 3 is available as a return-plane. The goal here is to minimize the effect of the common-mode capacitance between the gate-drive circuit and the bus ground plane. If I add a local plane on layer 3 (cyan color), and connect that to the switch-node, the value of the capacitance changes and also where the current comes from to charge and discharge that capacitance. The switch-node is the “local ground” for the highside. Adding the plane on layer 3 is really no different than the return-plane added to the gate-drive circuit in Figure 12, the capacitance between the circuit and the plane will be the same. However, the layer 3 plane shields the gate drive circuit from the problematic capacitance to bus ground. The capacitance to bus ground doesn’t go away, but it is now between two lowimpedance planes rather than coupling to the gate-drive circuit and its components. Thus, the gate-drive circuit only “sees” capacitance to its own local common, not to the bus ground plane. The current necessary to charge and discharge the inter-plane capacitance therefore comes directly from the low-impedance switch-node, completely bypassing the gate-drive circuit [2].

FIG 14 Double-sided return-path interferes with gate-driver routing and adds common-mode capacitance—not recommended.



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Avoid driving the Faraday shield from the actual gate driver ground—the Kelvin source (KS), rather than the switch-node. While the small voltage bounce between S and KS is insignificant compared to the other problem this connection would cause, connecting the shield to KS would cause all of the transient charge/discharge current to flow through the KS bondwire(s). This would result in a v = L di/dt reaction voltage that would appear as a differential gate-drive signal. This can be a problem not only for shield capacitances like this, but even for “unintentional” capacitances, like the capacitance across any component connecting the high-side circuit to bus ground. Figure 16 depicts a typical example. The high-side gatedrive circuit is capacitively-coupled to the low-side ground through a signal isolator, and a dc–dc transformer (or alternatively the junction capacitance of a bootstrap diode). While these are typically only a few pF, there are examples of dc–dc converters for gate drive that have more than 50 pF of capacitance across the isolation barrier. As shown on the right of Figure 16, when the half-bridge is capable of switching 400 V in a few ns, every pF is important. At 100 V/ns switching slew-rate, each pF results in 100 mA peak common-mode current. The injected current spike then has to return to bus ground through the low-side circuits, and along that path, it could cause glitches in the logic or other circuits. There is really no way to completely eliminate this capacitance, so the best approach is to think about where the return current will flow, and to minimize any effect— make sure the return current has a low-impedance path back to bus ground. Note that these capacitive effects can be just as much a problem for integrated driver + transistor as a discrete design—it all depends on the interconnection inside the integrated driver + transistor.

To better understand the problem caused by the parasitic capacitance charge/discharge current, consider the system shown in Figure 17. The switch-node is the low-impedance driving-point (driving the fast switching transition), shown in red. In addition, everything in orange is also connected to this node. The difference is that everything in orange is driven indirectly—through the KS pin of the transistor. The KS pin is only intended to be a part of the differential gatedrive loop, and it is commonly just a single bondwire like the gate. Due to the proximity inside the transistor package, G and KS bondwires have low loop area and mutual inductance helping to minimize overall gate-loop inductance. However, when the current through the KS bondwire is NOT common to the gate bondwire, there is no mutual inductance cancelation and therefore a differential-mode voltage will be generated within the gate-loop. As the switch-node voltage rises, the voltage drop across KS bondwire subtracts from the applied gate driver voltage, and thus slows-down the switching transition. This effect can essentially cancel the benefit of the Kelvin source package by slowing switching speed much in the same way that common-source inductance slows switching speed in a conventional 3-pin transistor package. An additional concern illustrated in Figure 17 is spreading out the switch-node. It is best to keep the switch-node compact to: 1) keep the capacitance minimized, and 2) prevent it from radiating and capacitively coupling to other parts of the circuit. Rather than placing the gate-drive dc–dc converter on a separate board, it is best to put that function right next to the power stage— on the same PCB as the half-bridge. The situation in Figure 17 should be avoided. Routing the orange traces all over the system causes distributed

FIG 15 Driven Faraday shield to mitigate the common-mode capacitance problem.

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FIG 16 “Unintentional” pathways for common-mode current.

FIG 17 Common-mode currents can cause differential-mode gate-loop voltage.



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by a spring-clip (not shown). This half-bridge circuit is the highfrequency leg of an active frontend rectifier (bi-directional PFC), which can deliver 3.4 kW continuously to/from 240 V ac line. Operating at full-power, the voltage overshoot of this PCB is less than 50 V on top of a 400 V dc bus.

Summary FIG 18 Example of a 3.4 kW complete GaN half-bridge measuring 32 × 39 mm.

Table–– 1. Tips for optimizing performance from high speed GaN transistors. A summary of the key points discussed in this article. Tip

Further Consideration(s)

Consider where current will flow during switching transitions.

Be sure to include parasitic elements, and the complete return-path of current in that assessment and analysis.

Layout inductance is more critical in some areas than others.

Recall the “half-bridge as a 2-port network” section.

Take advantage of PCB layer-pairs to minimize loop inductance

Route the outbound and return currents along the same path, but on adjacent parallel layers in opposite directions.

The fast-switching capability of GaN transistors can make PCB layout more challenging. This article discussed several key concepts to help understand the layout challenges, and strategies to help solve these challenges and optimize the layout for best overall electrical and thermal performance. Following these “Tips” will help designers obtain optimal performance from high performance GaN technology.

About the Author

Eric Persson ([email protected]) is a 42-year veteran of the power electronic industry. His Remember that SMT package inductance Datasheet values or circuit models may only career spans 19 years of hands-on value may depend on the current returnprovide the partial inductance. power converter and inverter path design, followed by 23 years in Use topside-cooled SMT transistor packages This will also reduce the cost compared to applications engineering in the to independently optimize both the adding many thermal vias electrical and thermal paths semiconductor industry at Infineon Technologies (formerly InternationReturn gate drive current on a plane-layer And connect it to the Kelvin source pin directly below the gate drive circuit al Rectifier), El Segundo, CA, USA. He is a Senior Principal Engineer Minimize un-necessary capacitive currents From switch-node to ground flowing through the KS pin for wide bandgap semiconductor applications. He has presented Keep ground-referenced circuits away from Use a driven Faraday-shield if necessary high-side gate-drive circuit more than 90 tutorials and papers at various international conferences. Keep the switch-node compact To avoid radiation into other parts of the circuit He is a Regular Lecturer for power electronic short-courses at the University of Wisconsin–Madison, Madison, WI, USA, for 22 years. He is a Member of the Executive capacitive coupling all along the path, and it radiates onto Committee of the CPES Industrial Advisory Board, and on several PCB paths. On the aux supply card, there is the the APEC Steering Committee. He holds 15 patents, and is a additional capacitance across the transformer isolation— recipient of the IEEE Third Millennium Medal. He received so that injected current will then travel back to ground the B.S.E.E. degree from the University of Minnesota, Minthrough the main PCB—potentially causing noise and neapolis, MN, USA. interference along the way. An example of a good GaN half-bridge layout is shown in Figure 18. This is a half-bridge “daughtercard” that References [1] C. Paul, Inductance: Loop and Partial. Hoboken, NJ, USA: Wiley, 2010. includes the two GaN transistors, high-frequency bus [2] E. Persson, “PCB layout techniques for optimizing performance of surcapacitors, isolated high and low-side gate drivers, and the face-mounted wide-bandgap power electronic circuits,” in Proc. IEEE APEC Seminar S02, Mar. 2022, p. 50. isolated dc–dc supply for both high and low side. A single  heatsink is attached through a thermal interface material Avoid deviations from the “over/under same path” that will result in lateral loops.

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©SHUTTERSTOCK.COM/SCOTT PROKOP

APEC 2023 Returns to Orlando to Display Latest Advances in WBG and Si Devices by Ashok Bindra

A

s the premier event in applied power electronics, IEEE Applied Power Electronics Conference & Exposition (APEC) 2023 returned to Orlando, FL, USA for the first time since 2012 to fully recover to pre-COVID era with record number of attendance (5006) and exhibitors displaying their latest wares. Cosponsored by the IEEE Power Electronics Society (PELS), Power Sources Manufacturers Association

Digital Object Identifier 10.1109/MPEL.2023.3275312 Date of publication: 27 June 2023

2329-9207/23©2023IEEE

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(PSMA), and the IEEE Industry Applications Society (IAS), the 38th annual global event in power electronics was an exciting time to bring power engineers, researchers, and other professionals from around the world to a common venue for presenting their latest advances in the field. Prior to the start of the plenary session on Monday 20 March, general chair Pradeep Shenoy welcomed the attendees and extended his heartfelt gratitude to hundreds of volunteers who served on the organizing committees to make APEC a successful event. He also introduced the three presidents of sponsoring organizations to the audience. They included Brad Lehman, president of PELS, Trifon Liakopoulos, president of PSMA, and Tomy Sebastian, past president of IAS. Shenoy further acknowledged the contributions of general chairs from the past three years for their dedicated efforts during COVID-19—Omer C. Onar (2022), Conor Quinn (2021), and José A. Cobos (2020).

Plenary Session The program chair Tim McDonald kicked off the plenary session with a presentation from Patrick Chapman, vice president of electrical engineering at Redwood Materials. His presentation “Recycling, Refining, and Remanufacturing Battery Materials,” hinted that Lithium-ion (Li-ion) battery supply is constrained due to limited availability of critical materials for both anode and cathode components. To address this problem, Redwood Materials will remanufacture these battery-grade materials, such as nickel, cobalt, lithium, and copper, from recycled batteries and create a circular supply chain, thereby reducing their cost and environmental footprint. He further added

that recycling of consumer batteries will reduce the forced extraction of precious minerals and create a domestic supply that will meet government’s and automakers’ EV goals. Towards that goal, the company had secured a US$2 billion Department of Energy (DoE) loan to expand its campus and scale domestic battery cell production in the U.S., stated the keynoter. The second plenary talk was on “Developing the Tools of Tomorrow: Efficient and Effective Power Electronics for Power Tools” by Brandon Verbrugge, senior vice president of Cordless Systems and Technology at Milwaukee Tools. This presentation indicated that the power tool industry has been revolutionized by significant advances in power electronics and digitalization. According to the speaker, “cordless battery-operated tools are rapidly displacing corded power tools and products with small gas engines.” He further noted that significant advances in power devices and embedded electronics helped fuel this conversion as most power tools now utilize high performance Li-ion and brushless motors with advanced control algorithms. Through these advances, the construction space has naturally benefited from products with significantly higher capability, more user functionality, and much higher energy conversion efficiency. Looking forward, the journey will continue to achieve a completely digital and green jobsite fueled by higher capability energy conversion devices and microelectronics. “Designing for Manufacturability with Software-Based Constraints: Shortening the Iterative Design Cycle” by Grant Pitel, CTO at Magna-Power Electronics, was the focus of the third keynote. “With a small diverse team of engineers,

FIG 1 Redwood’s recycling process for battery materials. Source: Redwood Materials

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this context, she added, “inverter efficiency has become a Magna-Power Electronics offers over 365,0000 different critical performance parameter, and semiconductors with programmable power supplies and electronic loads, spanlow loss switching losses, such as SiC and GaN are getning ratings up to 10,000 Adc, 10,000 Vdc, and 3,000 kW,” said ting into the spotlight.” Highlighting the benefits of GaN the keynoter. Pitel added that such a high mix of products over SiC and Si devices, the keynoter described the sucis supported by parameterizing design inputs, creating cessful development of a three-phase GaN-based inverter frameworks, and platforming hardware whenever possible reference design with 400 V bus voltage and 400 Arms cur(Figure 3). According to Pitel, key factors helping the comrent (Figure 4). Plus, she presented the measured results pany to launch new products faster are hardware reuse and of this reference design (Figure 5). According to this prelimiting new complexity to ensure prototypes are manusentation, VisIC Technologies has proven that its direct facturable with reduced costly revisions. He further noted drive D-Mode GaN (D3GaN) semiconductor technology that constraints based on physics, machinery tolerances, is well-suited even for the most challenging high-power and human error were discovered, and programmed into automotive application. Concerns about parallelization software as a way to consistently and continuously improve and oscillations caused by fast-switching transients have designs and processes over the company’s 42-year history. been addressed, said Baksht. The keynoter also described the advanced features available in commercial software packages leveraged by Magna-Power engineers to achieve work efficiency, as well as custom tools it has developed independently. Additionally, the talk focused on areas of PCB design, electronic packaging, and largescale embedded software development utilized for taking prototypes to production. Thus, illustrating the impact rules/recipes/ platforms have on machinery, testing, and staff, said Pitel. Finally, Pitel emphasized the need for software FIG 2 With advances in power electronics, cordless battery operated tools are now more powerful. Source: Milwaukee Tools tools and workflow that would facilitate co-design with cross team collaboration, which is essential for prototyping with high accuracy and production. The next speaker was Tamara Baksht, CEO and cofounder of VisIC Technologies, who started the talk by asking the question “Is GaN for passenger car inverter possible?” And the short answer was yes. While society and governments are looking for zero-emission transport, the car makers are seeking the most efficient way to manufacture low-cost and long-distance electric FIG 3 High mix of products at Magna-Power is supported by parameterizing design inputs, creating frameworks, cars, stated Baksht. In and platforming hardware. Source: Magna-Power.

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Major factors contributing to this success include development of robust high current (>100 A) 650 V GaN FET die, development of GaN module, ability to drive 4 dies in parallel with equal current sharing, and generating smooth waveform at needed current and obtaining low voltage overshoots on the gate and on the drain. The fifth speaker of the session was Victor Veliadis, executive director and CTO, PowerAmerica, USA. In his talk “Silicon Carbide Mass Commercialization and Future Trends,” Veliadis first noted that Si devices are currently dominating the power electronics arena due to their excellent starting material quality, streamlined fabrication, low-cost volume production, proven reliability and ruggedness, and design/circuit legacy. Although, he added, Si power devices will continue to make progress, they

FIG 4 A three-phase GaN based inverter reference design. Source: VisIC Technologies.

are approaching their operational limits primarily due to their relatively low bandgap and critical electric field that result in high conduction and switching losses, and poor high temperature performance. On the other hand, he continued, SiC power devices offer compelling system benefits including high efficiency, high voltage/temperature operation, and low weight and volume. According to the talk, SiC is key in addressing environmental concerns and is gaining significant market share boosted by volume insertion in EVs (Figure 6). “Vehicle electrification is the mass commercialization opportunity for SiC power electronics,” asserted Veliadis. Also, his presentation indicated that the 400 V–800 V vehicle battery transition leverages the competitive advantages of 1200 V SiC power devices. Key benefits include longer range (higher efficiency), faster charging, and cost reduction. For market projection, the speaker suggested that SiC is projected to reach $6.3 B by 2027, representing >20% of the power device market. These numbers were based on data provided by market and technology analyst Yole Développement. Additionally, Veliadis presentation also identified key barriers to overcome for SiC commercialization, which include high device cost, defects and scalability of device area, reliability/ruggedness concerns, and the need for workforce training. Speaking of workforce training, the last topic of the session was “Developing the Power Electronics Workforce Through MOOC Degree Programs and Public Educational Videos,” presented by Robert W. Erickson, professor in the Department of Electrical, Computer, and Energy Engineering, University of Colorado Boulder, USA, and Katherine A. Kim, associate professor of Electrical Engineering at National Taiwan University, Taiwan. According to the speakers, online education has opened the doors to broader accessibility of power electronics education. The keynoters discussed a massively open online course (MOOC) degree program and other public educational videos developed for power electronics workforce, including survey results, successes, and challenges.

RAP Sessions

FIG 5 Wave forms of phase voltage and currents of inverter output. Source: VisIC Technologies

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Three high-energy industry topics were debated by experts in an environment of contention. Professionals, researchers and engineers from both sides, pros and cons, debated

on the topics in a charged atmosphere on Tuesday 23 March afternoon. The topics were as follows: 1) “Batteries Versus Fuel Cells for Future Electrification Applications” with Sheldon Williamson of Ontario Tech University, Canada as chair. The panelists included Vivek Sujan—Oak Ridge National Laboratory (OR N L),  D e e a n a Ahmed—Our Next Energy (ONE), Uday Deshpa nde —D&V FIG 6 All electric vehicle. Source: PowerAmerica Electronics, and inductor current capability is advancing rapidly. The paper Rick Szymczyk—Upstartz Energy. by Indumini on 2000 Amp datacenter CPU power supply ICs While discussing the opportunities and challenges and other industry designs with high power discretes were posed by both batteries and fuel cells for electrified quoted as examples for both approaches. transportation and e-mobility of the future, the panelists 3) “Where Does High Impact Innovation in Power Electronalso investigated the inherent differences in the current ics Come From: Academia or Industry?” with Eric Persstate of batteries and hydrogen fuel cell technologies as son of Infineon Technologies as chair. The Panelists it relates to e-propulsion and related charging infrastrucincluded Christina DiMarino—Virginia Tech, Center for ture. Some of the key technological barriers for current Power Electronics Systems, Johann W. Kolar—ETH and future batteries, as well as fuel cells, was debated Zurich, Power Electronic Systems Laboratory, Thomas based on topics such as driving range, powertrain effiByrd—Lockheed Martin, Power Electronics and Power ciency, well-to-wheels efficiency, practicality of impleSystems, and Laszlo Balogh—Texas Instruments. mentation, charging/refueling facilities, durability, This RAP session featured a panel of academic versus sustainability, and availability. A quick survey conducted industry research leaders, who covered a range of topics by the chair at the end of the session indicated that the including which institutions are better suited for different participants were equally divided in their views on battertypes of research, the role of government funding, how ies versus fuel cells for future electrification applications. intellectual property rights are handled, and how to struc2) Topologies and Circuits for Power Supply on Chip ture research partnerships that deliver the best results for (PwrSoC) versus Discrete Implementations with Induboth parties. mini Ranmuthu from Texas instruments as chair. The While DiMarino and Kolar represented the Academic panelists included Alex Prodic—University of Toronto, side, Byrd and Balogh represented the Industry. Initially, Canada, Edward S. Rogers Sr. - Department of Electrical according to Persson, there was a lot of discussion defin& Computer Engineering, University of Toronto, Canada, ing what is even meant by the word “Innovation” - does it Santosh Kulkarni—Renesas Electronics Corporation, mean fundamental research discoveries, or clever design Dragan Maksimovic—University of Colorado Boulder, using existing technologies? Another key point was made USA, Robert Pilawa-Podgurski—Electrical Engineering by DiMarino, noted the chair. She said that the core funcand Computer Sciences, University of California at Berktion of the Universities is really teaching fundamentals ley, USA. of power electronics, but industry often wants to use According to the session chair, both the approaches University grad students as “job-shops” to do paid projwere intensely debated. However, one of the main points ect work for them. This does not really fit the definition of debate was the difference in power level each approach of Innovation.” In the end, added Persson, “the audience can support. Proponents of the discrete implementations remained split about 50/50 as to where the innovation claimed that PwrSoC is inherently limited in the power level really comes from, but there was general agreement that it can support. Proponents of PwrSoC claimed that the level fundamental research and related innovation more often of integration and complexity of PwrSoC far exceeds the comes from Universities. capability of the discrete implementation while integrated



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FIG 7 PI’s new GaN power IC with 900 V GaN FET. Source: Power Integrations

The Exposition The exhibition floor was filled with activity as 289 exhibitors from around the world displayed their latest advances in semiconductors devices, passive components, test and measurement equipment, including simulation and modeling tools, and thermal management and packaging technologies, setting new trends in performance, efficiency, density, cost, and more. While wide bandgap (WBG) semiconductor devices and modules promised to keep the momentum going, silicon IGBTs and MOSFETs continue to keep the bar high and dominate the power electronics arena, as indicated by plenary speaker Veliadis. Si will continue to make progress and dominate the scene as it approaches its physical limits. Meanwhile, SiC power devices are exploiting the situation and offering compelling system benefits, including high efficiency, high voltage/temperature operation, and low weight and volume to gain significant market share boosted by volume adoption in EVs.

Latest in SiC Developments SiC’s progress and rapid rise was evident on the exhibit floor with the presence of makers like Wolfspeed, GeneSiC (now part of Navitas Semiconductor), Infineon Technologies, Microchip, Onsemi, ROHM Semiconductor, Mitsubishi, STMicroelectronics, and UnitedSiC. These players revealed new developments and advances in SiC to stay ahead in the race. Wolfspeed, for example, demonstrated a 22 kW three-phase bidirectional high efficiency active front-end (AFE) converter reference design for EV on-board charger, off-board fast charging, and other industrial applications such as energy storage systems and three phase PFC power supplies. The design uses Wolfspeed’s 1200 V, 32-m´Ω SiC MOSFETs in a TO- 247-4

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package. Meanwhile, the company continues to expand capacity worldwide to meet global demand for SiC devices. The latest addition in this race include a 200-mm semiconductor fab in Saarland, Germany, the world’s largest, manufacturing facility, according to Wolfspeed. Likewise, ROHM Semiconductor announced that precision power analog company Apex Microtechnology is adopting its 1200 V SiC MOSFETs and 650 V SiC Schottky barrier diode (SBD), supplied in bare die form, for a new line of power modules, which includes the three-phase SA310 module, ideal for driving high-voltage brushless dc motors, as well as two half-bridge devices, SA110 and SA111, ideal for a wide range of high-voltage applications. The new line of power modules also use ROHM’s tightly matched BM60212FV-C gate drivers in bare die format, contributing to high-efficiency operation of high-voltage motors and power supplies. With rapid proliferation of SiC devices across market segments like e-mobility, sustainability and other industrial applications, Microchip has readied a new simulation tool for engineers to quickly evaluate the company’s SiC power devices and modules across various topologies before committing a design to hardware. Called MPLAB, Microchip’s SiC power simulator is a PLECS-based software environment designed in collaboration with Plexim to provide an online complimentary tool that eliminates the need to purchase a simulation license. While Qorvo displayed its Gen4 5.4 mΩ 750 V SiC FET in new surface-mount TO-leadless (TOLL) package, which is 30% smaller in footprint and at 2.3 mm height. This is the first product in a family of 750 V SiC FETs that is released in the TOLL package with on-resistance ranging from 5.4 mΩ to 60 mΩ. These devices are designed for use in space-constrained applications such as ac-dc power supplies ranging from several 100s of watts to multiple kilowatts, as well as solid-state relays and circuit breakers up to 100 A.

Advances in GaN FETs and ICs Likewise, gallium nitride (GaN) FETs and ICs were in spotlight on the exhibit floor as makers began to unwrap their advances and developments in front of attendees who were in large numbers from around the world. From 900 V FETs to 100 A devices, and more

integration in smaller packages were some of the trends being revealed by the GaN vendors. Speaking of high voltage, power integrations unveiled a 900 V GaN extension to the company’s InnoSwitch3 family of flyback switcher ICs. The new ICs, which feature the company’s proprietary PowiGaN technology, deliver up to 100 W with better than 93% efficiency, eliminating the need for heat sinks and streamlining design of spacechallenged applications. InnoSwitch3 designs also offer exceptional light-load efficiency making them ideal for providing auxiliary power in electric vehicles (EVs) during low-power sleep modes. The AEC-Q100-qualified InnoSwitch3-AQ family is particularly suitable for EVs based on 400 V bus systems where the 900 V PowiGaN switch provides more power and increased design margin. The new 900 V InnoSwitch3-EP and InnoSwitch3AQ off-line CV/CC flyback switcher ICs employ synchronous rectification, a valley switching discontinuous conduction mode (DCM) and continuous conduction mode (CCM) flyback controller. FluxLink communication technology enables the IC package to bridge the isolation barrier, optimizing efficiency and eliminating the need for optocouplers. Flaunting its portfolio of JEDEC and AEC-Q101 qualified 650 V and 900 V GaN FETs, with 1200 V devices in development, Transphorm unveiled a 3 kW evaluation inverter board with Microchip’s digital signal controller and the company’s 650 V 50 mΩ SuperGaN FET in a TO-247 package. It is intended for developing vehicle-to-grid (V2G) charging system, solar or photovoltaic (PV) inverters, uninterruptible power supplies (UPSes), and other high voltage power applications. Other vendors displaying their latest GaN devices include Cambridge GaN Devices (CGD), Efficient Power Conversion Corp. (EPC), GaN Systems, Innoscience Technologies, Navitas Semiconductor, STMicroelectronics, and Tagore Technology amongst others. While EPC announced expansion of its family of footprint compatible ePower stage ICs to boost power density and simplify design for different power requirements in dc–dc applications, motor drives, and class-D audio amplifiers, Navitas launched a new family of GaNSense control ICs that deliver unprecedented levels of performance and integration. An array of integrated protection features include 800 V transient voltage, 2 kV ESD, over-voltage, over-current, and over-temperature protection. Likewise, CGD demonstrated that its ICeGaN GaN HEMT is more reliable and robust than other GaN platforms. An experimental evidence was presented that showed that ICeGaN HEMTs, enabled by smart protection circuitry, offers exceptionally high over-voltage margin of over 70 V, which is comparable



to state-of-the-art traditional silicon devices, according to CGD. Similarly, GaN Systems (to be acquired by Infineon) introduced a new 11 kW, 800 V on-board charger (OBC) reference design with 36% greater power density and 15% lower BOM cost than SiC based OBC. Exploiting its 8-inch GaN-on-Si process, Innoscience debuted a new product labeled SolidGaN, which integrates two 100 V low Rdson GaN devices in half-bridge and a gate driver into one compact surface mount package.

Si on the Move Si is not slowing was evident with numerous new product introductions in the Si arena. For example, onsemi, a major supplier of intelligent power and sensing technologies, announced a new range of ultra-efficient 1200 V insulated-gate bipolar transistors (IGBTs) that minimize conduction and switching losses at a performance level that is industry-leading in the market. Intended to enhance efficiency in fast switching applications, the new devices will be primarily used in energy infrastructure applications like solar inverters, uninterruptible power supplies (UPS), energy storage and EV charging power conversion. “As efficiency is extremely critical in all high switching frequency energy infrastructure applications, we focused on reducing turn-off switching losses and providing the best switching performance in this new range of IGBTs,” said Asif Jakwani, senior vice president and general manager of the Advanced Power Division, which is part of the Power Solutions Group at onsemi. Other Si proponents displaying their Si products include ADI, Amber Semiconductor, Alpha & Omega, Empower Semiconductor, Infineon Technologies, Nexperia, Silanna Semiconductor, Taiwan Semiconductor, and Texas Instruments to name a few. In summary, 2023 APEC was a memorable event with exciting activities and sessions throughout the five days of the conference and exposition. In the words of the general chair, it was an impactful week!

About the Author Ashok Bindra ([email protected]) received the M.S. degree from the Department of Electrical and Computer Engineering, Clarkson College of Technology (now Clarkson University), Potsdam, NY, USA, and the M.Sc. degree in physics from the University of Bombay, India. He is the Editor-in-Chief of IEEE Power Electronics Magazine and a member of the IEEE. He is a veteran writer and editor with more than 40 years of editorial experience covering power electronics, analog/radio-frequency technologies, and power semiconductors. He is a member of IEEE and PELS. 

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Women in Engineering

by Stephanie Watts Butler

Diverse Future Leadership Insight From Successful Managers

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Diverse Future Leadership event was held 6 September 2022 as part of the 2022 European Power Electronics (EPE) Energy Conversion Congress and Expo (ECCE) Europe held in Hannover, Germany. The Diverse Future Leadership event, sponsored by IEEE Power Electronics Society’s (PELS) Women in Engineering (WIE) committee, featured successful managers, both male and female, talking about their career paths in business and academia in an interactive panel discussion. Diversity in the career was also a major topic of discussion. Approximately 60 participants engaged with the panelists who represented a wide range of fields and careers: ■■Dr. Silvia Bardi (Typhoon HIL) ■■Prof. Drazen Dujic (EPFL) ■■Dr. Tobias Geyer (ABB) ■■Prof. Regine Mallwitz (TU Braunschweig) The panel began with the speakers briefly introducing themselves and their career. Next, an interactive discussion on the selected four topics was held (Figure 1). Rebecca (Dierks) Himker (University of Hannover) and Alina Dinc (Wolfspeed) skillfully moderated the panel event (seen in Figure 2). The four topics were: ■■Academic and industrial career paths

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■■Modern

management and leadership ■■Diversity and equality in the workplace ■■Work-life integration. The moderators directed questions to the speakers, a nd the

audience had the opportunity to ask questions. This led to a very lively discussion in which the speakers discussed with each other, while also the audience brought in their views. The whole event benefited from the fact that the speakers had different

FIG 1 Professor Mallwitz and Dr. Geyer respond during Q&A.

FIG 2 Rebecca Himker and Alina Dinc moderating Q&A with the panelist.

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specializations (industry and/or academic) and considerable job and life experience. The most discussed topic was managing a very demanding job and the integration of private life (family, hobbies, …). A fter the panel, a casual networking session between panelists and audience members with food and drinks occurred. This was the first time the WIE event held with EPE ECCE Europe was in this format. Based upon feedback from organizers, speakers, and participants, one source of the success wa s t he a c t ive en ga gement of a t t endee s. A n a t t endee a t t he event, Nayara Brandao de Freitas, a s sist a nt resea rcher at INESC, made this reflection on the event: “The Diverse Future Leadership was a lively panel discussion in which the attendees learned about the career path of the panelists a nd a sked impor ta nt questions. The cha llenges of industr y a nd a c a dem i a wer e d i s c u s s e d a nd compa red. The pa nelists ta lked about how to keep a work-life balance and be successful.” A panelist, Dujic Drazen, commented “The event prov ided an opportunity for the exchange and reflections on the different career development paths of speakers, coming both from industry and academia. In a direct exchange with young professionals, mainly Ph.D students, one could understand the common fears and perhaps m isconcept ion s t hat they have about choices ava ilable a f ter thei r studies. Those could be ea si ly rec t i f ied a nd illustrated by d irect examples from speakers.” Another panelist, Silv ia Ba rdi, commented in a LinkedIn Post about “Much food for thoughts yesterday”



and thanked the participants for their questions [1]. Another engaging event will be sponsored by WIE at ECCE 2023 in Nashville, TN (USA) on 30 October involv ing some of the ECCE 2023 Plenary speakers, leader s i n t hei r re s pec t ive f ield s. Annette Clayton, CEO, Schneider Electric North America, is looking for wa rd t o enga g i ng w it h t he extended WIE ECCE community. The ECCE 2023 Plenary, consisting of keynotes from CEO, CTO, and national laboratory executives, covers a broad swath of technologies and application areas. The Plenary is also the first ECCE with an entire lineup of women keynotes. To learn how you can participate in the WIE events at ECCE 2023, please see https://www.ieee-ecce.org/2023/conference/wie/.

of power and CMOS process and package technology, processing equipment, materials, reliability, research and development management, manufacturing science, control, fault detection, metrology, and new product development generating 17 U.S. patents. She is the CoFounder and the Past-Chair of JEDEC’s JC-70 wide bandgap standards committee, the Co-Convenor of IEC’s TC47/WG8. She is the Industry Deputy Editor-in-Chief of IEEE Power Electronics Magazine, a PELS Member-at-Large (ADCOM), the Chair of the PELS Industry Committee, and a WIE Committee Member. She also serves on the APEC Planning Committee and the PSMA Board of Directors and the Semiconductor Committee. She is a Fellow of the AVS and an IEEE Senior Member.

About the Author

Reference

Stephanie Watts Butler, Ph.D., P.E. ([email protected]) is the President of WattsButler LLC, an innovation services company focused on the power semiconductor industry. During her previous career at Texas Instruments, she produced innovations in the areas

[1] LinkedIn. Silvia Bardi. Accessed: Apr. 16,

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2023. [Online]. Available: https://www.linkedin. com/posts/silvia-bardi-b007bb11_hannover-epeieee-activity-6972817404607262720-DAii?utm_ source=share&utm_medium=member_desktop



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Industry Pulse

by Stephanie Watts Butler and Kristen Parrish

WSTS Introduces New Category: WBG Discrete Power Products

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he World Semiconductor Trade Statistics (WSTS) is a non-profit organization that collects shipments data directly from its 42 semiconductor company members, and provides market analysis and reports back to its membership. Integrated device manufacturers (IDM) and fabless semiconductor companies who design and market semiconductors, either discrete or integrated circuits, are eligible for membership with WSTS. Semiconductor contract manufacturers, such as a foundry, may obtain a subscription for reports directly with WSTS. Non-semiconductor manufacturers can subscribe for reports through direct subscription with one of their 5 regional distribution channels provided by regional semiconductor industry associations. For example, the Semiconductor Industry Association (SIA), based in the United States, is the distribution channel for the Americas. The SIA also utilizes statistics provided by WSTS in some of their public reports and news releases [1]. WSTS provides 4-year forecasts updated twice a year. Additionally, WSTS statistics and categorizations can indicate trends in the semiconductor industry as they are continually updating product categories to accurately reflect the market. WSTS tracks more tha n 150 different Digital Object Identifier 10.1109/MPEL.2023.3269987 Date of publication: 27 June 2023

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products in 5 world regions / countries. For 2023, WSTS only made one major product category update – the ability to track Wide Bandgap (WBG) products in discrete power products. For years, WSTS had experience with wide bandgap (WBG) technologies data for optoelectronics products. However, in the past WSTS did not separately track revenue from WBG discrete power products. As of January 2023, WSTS announced on LinkedIn [2] that WBG semiconductors for power transistors and rectifiers would be included in their monthly statistics for 2023 (Figure 1). We recently spoke with Mr. Tobias Proettel (Germany), administrator for the WSTS organization, to learn what drove the decision to start tracking WBG products separately, and to obtain more insight into what data WSTS will collect. Mr. Proettel said that WSTS members are the ones that wanted the new category, and it was discussed as part of their annual meeting. He noted their members recognized that WBG products including

silicon carbide (SiC) and gallium nitride (GaN) are becoming more important in the “silicon world” and decided in early 2022 to implement this new product category. During 2022, WSTS members drafted definitions for WSTS’s product classification 2023, in order to structure data collection starting in 2023. Beginning this year, WSTS has started reporting on WBG shipment revenues and units in two categories within the Discretes hierarchy: in Field-Effect General Purpose Power Transistors (sometimes reported as MOSFET Power Transistors) and in Rec t i f ier s ( Power Diode s). A s shown in Figure 2, Power Transistors and Rectifiers combined had a compou nd a n nua l g row t h rate (CAGR) of approximately 20%. Mr. Proettel said the categories of FieldEffect General Purpose Power Transistors and Rectifiers were selected for the split into Silicon and WBG

FIG 1 WSTS announcement on LinkedIn of the new wide bandgap power product category [2].

FIG 2 WSTS revenue data for Power Transistors & Rectifiers shows significant growth.

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because they expected WBG products to have the highest impact to these categories’ CAGR. Currently, WSTS collects revenue and unit shipment data at the associated encapsulated (package) level. Note that WSTS neither tracks non-semiconductor product wafers, nor substrates (sometimes called starting wafer material). Under the WSTS hierarchy of Power Transistors, the category Field-Effect General Purpose Powe r T r a n s i s t o r s , w h ic h includes JFETS, has three new subcategories: ■■SiC Transistors ≤ 1000 V ■■SiC Transistors > 1000 V ■■GaN Transistors. The existing categories were clarified to be silicon only. Furthermore, power transistor modules are not a new category; however, they are now explicitly defined to encompass power transistors made from silicon (Si), SiC, and GaN materials. The Field-Effect General Purpose Power Transistors and Modules combined are referred to as MOSFET Power Tra nsistors product group. The hierarchical organization of the MOSFET Power Transistors product group is shown in Figure 3. The IGBT classifications, which are also within the Power Transistors category, are shown in Figure 3 for completeness of high voltage power transistors categorization. I n t he Recti f ier s (Power Diodes) hierarchy, three new categories were added to track WBG Rectifiers by voltage range. The t h ree ex ist i ng categor ies remained unchanged: Si and W BG Rect i f ier s by a mpere ranges. WBG Rectifiers assembled with different types of semiconductor devices such as IGBTs or MOSFETs will not be included in WBG Rectifiers but as IGBT Modules or Field-Effect General Purpose Power Transistor Modules (Figure 3). The additional

rectifiers (power diodes) subcategories are now: ■■WBG Rectifiers < 1200 V ■■WBG Rectifiers 1200 V – 1700 V ■■WBG Rectifiers ≥ 1700 V. WSTS provides reports based on monthly revenue a nd unit shipments collected directly from semic o nd u c t o r m a nu f a c t u r e r s . B y combining revenue and unit sales,

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the average sales price (ASP) can be calculated. WSTS classifies their member s w it h i n fou r d i f ferent regions [3]. WSTS emphasizes that their information is generated by semiconductor companies, specifically for semiconductor companies, but it also holds significant value for industry organizations, government off ices, a nd other related

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FIG 3 Field-Effect General Purpose Power Transistors subcategories, along with their modules, and IGBT categories by voltage, demonstrating how technologies will be separately tracked in 2023.

entities. The data quality improves with an increasing number of member companies. As a result, WSTS actively encourages non-member semiconductor companies to join the organization. To ensure the security of company data, WSTS implements a multi-tiered process. No i nd iv idua l compa ny data is shared; only aggregated market figu res a re relea sed for a na lysis. WSTS sta r ted prov iding results with the new WBG categories to their members in February 2023.

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At this time, WSTS is not tracking a separate subcategory for WBG in Power Management IC categories. However, as member companies continue to contribute feedback, WSTS will be considering proposals to update this. WSTS reviews and discusses existing structure at their bi-annual meetings and decides on changes for the coming year with a big focus on the WBG area. WSTS’s inclusion of new categories to specifically address the WBG power market marks another forward leap

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in the wider acceptance and utilization of WBG power semiconductors.

About the Authors Stephanie Watts Butler, Ph.D., P.E., ([email protected]) is the President of WattsButler LLC, an innovation services company focused on the power semiconductor industry. During her previous career at Texas Instruments, she produced innovations in the areas of power and CMOS process and package technology, processing equipment, materials, reliability, research and development management, manufacturing science, control, fault detection, metrology, and new product development, generating 17 U.S. patents. She is the CoFounder and the Past-Chair of JEDEC’s JC-70 WBG Standards Committee and the Co-Convenor of IEC’s TC47/WG8. She is the Industry Deputy Editor-in-Chief of IEEE Power Electronics M a g a z i n e , a PELS M e m b e r- a t - L a r g e (ADCOM), the Chair of the PELS Industry

Committee, and a WIE Committee Member. She also serves on the APEC Planning Committee and the PSMA Board of Directors and the Semiconductor Committee. She is a Fellow of the AVS and an IEEE Senior Member. Kristen Parrish (kristen@ieee. o r g ) ( S e n i o r M e m b e r, I E E E ) received the bachelor’s degree from the Rose-Hulman Institute of Technology, Terre Haute, IN, USA, and the master’s and Ph.D. degrees from The University of Texas at Austin, TX, USA, before embarking on a career spanning multiple fields, ultimately working in power electronics at both Texas Instruments, Dallas, TX, USA and Wolfspeed, Durham, NC, USA. Her work experience includes Research and Development Engineer, a Systems Engineer, and most recently as an Applications Engineer with projects in packaging, magnetics, and silicon carbide. During her career, she has been involved with IEEE at the local section level, serving as the Eastern North Carolina Vice-Chair, the Women in Engineering (WIE) Chair, and the Webmaster, and also at the society level on the PELS WIE Steering Committee. She became a Senior Member of IEEE in 2020. She has also created a mentoring program that connected mentors and YP mentees in IEEE Region 3 during the early days of the COVID-19 pandemic, which was nominated for the MGA Young Professionals Achievement Award. She is passionate about mentoring and career development of women in engineering.



References

Accessed: Apr. 12, 2023. [Online]. Available:

[1] Semiconductor Industry Association. (Apr. 6,

https://www.linkedin.com/posts/wsts-world-

2023). Global Semiconductor Sales Decrease 4%

semiconductor-trade-statistics_semiconduc-

Month-to-Month in February. Accessed: Apr.

tors-wsts-semiconductormarket-activity-

17, 2023. [Online]. Available: https://www.semi-

7022134579536781312-m485

conductors.org/global-semiconductor-sales-

[3] WSTS Member Companies. Accessed: Apr.

decrease-4-month-to-month-in-february/

14, 2023. [Online]. Available: https://www.wsts.

[2] LinkedIn. W S T S A n n o u n c i n g N e w

org/75/Member-Companies

Wide Bandgap Semiconductor Categories.



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Students and Young Professionals Rendezvous

by Houssam Deboucha, Chen Xu, Anshuman Sharma, Haifah Sambo, Nayara Brandão de Freitas, and Joseph P. Kozak

The Revival of SYPS and Recent YP Activities

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he IEEE Power Electronics Society (PELS) Students and Young Professionals (S&YP) is a subgroup within the largest IEEE PELS community that supports and promotes S&YP who are interested in the field of power electronics. PELS S&YP is an excellent platform that provides resources and networking opportunities for S&YP, it offers many activities, such as conferences, webinars, and FIG 1 A plenary session breaktime at APEC 2023. workshops. expecting to create a global, profesOne of the initiatives that S&YP is sional, and interesting offline comsupporting includes the 2023 IEEE munication platform with the young PELS S&YP Symposium (SYPS). This professionals and students in the symposium will be held in Shanghai, field of power electronics from all China, on 27–29 August, and orgaover the world.  nized by IEEE PELS Membership In addition to SYPS 2023 planCom m it t ee - Ch i n a , I EEE PEL S ning, the S&YP committee has been Shanghai Chapter, and Shanghai Unibusy supporting events globally, versity. It will be the first time that with the most recent being APEC the SYPS becomes an in-person 2023. For well over three decades, event, free from the impact of the IEEE Applied Power Electronics COVID-19. Inherited from SYPS 2021, Conference and Exposition, poputhe three focal pillars of the 2023 larly known as APEC, has emerged SYPS include “worldwide connecas a tier one conference for power tion,” “meet industry leaders,” and electronics professionals across the “have some fun.” Preparations for globe. As a flagship conference of SYPS 2023 are underway, and we are the IEEE PELS, the conference has enjoyed an outpouring of success Digital Object Identifier 10.1109/MPEL.2023.3271630 Date of publication: 27 June 2023 over the years largely due to the fact

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that the APEC program addresses a broad range of topics in the use, design, manufacturing, and marketing of all kinds of power electronics devices, components, and equipment. In addition, the combination of high-quality professional education seminars, a full program of referred papers showcasing state-ofthe-art power electronics research and an exposition that has significantly grown over the years has become an integral part of the conference and consistently provides an invaluable education each year. The conference features a number of sessions i nclud i ng t he plena r y (Figure 1), industrial and RAP sessions aimed to address the key areas of technical interest for  the

FIG 2 APEC 2023 general chair, Pradeep Shenoy of Texas Instruments, a former S&YP volunteer, greets attendees at the S&YP reception. Source: APEC 2023.

practicing power electronics professiona l. The A PEC 2023 held in Orlando, FL, USA from 19–23 March 2023 hosted a number of these sessions over the course of the week. 

The PELS S&YP committee was well represented throughout the conference and several events hosted by the PELS S&YP leadership committee saw an increased participation by

the attendees. The “PELS-IAS-PSMA Sponsored Young Professiona ls Reception” (Figure 2) took place on 21st March 2023. The 2-hour event hosted over 150 attendees and presented a great opportunity for young professionals and students alike to network and engage with fellow students, young professionals, and leaders of the societies in a casual atmosphere over food and drinks.  The second S&YP sponsored event, the “WIE, YP and You, How to become involved with IEEE, PELS and PSMA, too” took place on 22 March 2023. The event, an hour-long breakfast discussion, effectively showcased all the different ways one can potentially engage with PELS, and PSMA as well. The mission was to network and engage with volunteers and officers and unravel all the exciting opportunities behind these acronyms. An added perk to attend the event was the drawing off a raffle that gave two vouchers for a complimentary IEEE and PELS membership, making it a win-win situation. Wrapping up the conference, the

PELS S&Y P com m it tee saw a n encouraging involvement of students and young professions at the APEC 2023, thereby successfully achieving its core objective of providing students and young professional members with networking opportunities within the power electronics community. Thus, enabling mentorship and other unique growth opportunities for PELS S&YP. The S&YP committee is poised for an exciting future as it plans to organize and chalk out a number of these events at SYPS and other upcoming conferences. To stay updated with IEEE PELS and its S&YP committee, follow us on Twitter (@ieeepels), Instagram (@ ieeepels) and LinkedIn (IEEE PELS). The S&YP committee is always seeking motivated volunteers. If interested in volunteering, please contact the S&YP committee chair, Naya ra Bra ndão de F reita s, at [email protected].

About the Authors Houssam Deboucha is a Research Assistant Professor at the Department of Technology, University of Bejaia, Bejaia, Algeria. He is currently a member of the IEEE PELS SYP Committee. Chen Xu is an Associate Professor at the Department of Electrical Engineering, School of Mechatronic Engineering and Automation, Shanghai University, Shanghai, China. He is currently a member of the IEEE PELS Shanghai Chapter. Anshuman Sharma received the M.A.Sc. and B.Eng. degrees from the University of Ontario Institute of Technology, Oshawa, ON, Canada. He is presently employed as a Hardware Engineer at Hitachi Astemo, Farmington Hills, MI, USA. He also serves as the Vice-Chair of the IEEE Power Electronics/Consumer Electronics Chapter at the IEEE Toronto Section and is a member of the IEEE PELS S&YP Committee.

Haifah Sambo is currently pursuing the Ph.D. degree with the Electrical Engineering and Computer Sciences Department, University of California, Berkeley, CA, USA. She is a Research Fellow with the Electrical Engineering and Computer Sciences Department, University of California. She is currently a member of the IEEE PELS SYP Committee. Nayara Brandão de Freitas is an Assistant Researcher at the Institute for Systems and Computer Engineering, Technology, and Science (INESC TEC), Porto, Portugal. She is also the Current Chair of the IEEE PELS S&YP Committee. Joseph P. Kozak is a Senior Electrical Engineer at the Johns Hopkins University Applied Physics Lab (JHU-APL), Laurel, MD, USA. He is currently the Vice-Chair of the IEEE PELS S&YP Committee. 

Society News

by Ashok Bindra

ECCE: First Ever All Women Keynotes

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his year, the 14th IEEE Energy Conversion Congress and Expo (ECCE 2023), from 29 October to 2 November 2023 will be held in Nashville, TN, USA. It is IEEE’s flagship conference on energy conversion systems and technologies, and is cosponsored by the IEEE Power Electronics Society (PELS) and Industrial Application Society (IAS). Besides featuring technical presentations and tutorials from some of the top experts in the field, revealing latest advances and research trends in all aspects of electrical energy conversion, ECCE will also present a lively exposition and job fair. Offering both industry-driven and application-oriented technical sessions, ECCE 2023 has launched several exciting new initiatives this year. They include: ■■An all-female keynote opening session—a historic milestone for IEEE at any major power electronics/ renewable energy conference. ■■A major expansion in its exhibit hall programs and sponsorship opportunities for better industry engagement. ■■Two-page late-breaking research papers in addition to their usual full-length papers. Digital Object Identifier 10.1109/MPEL.2023.3273888 Date of publication: 27 June 2023

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■■Public

outreach events and partnerships with local community organizations. ■■Subsidized daycare for attendee families. Speaking of keynotes, there are four women speakers at this year’s plenary session. In fact, ECCE organizers are announcing the first all women keynote in ECCE history! They are Riona Armesmith, chief technology officer (CTO) at magniX, Elif Balkas, CTO at Wolfspeed, Annette Clayton, chief executive officer at Schneider Electric North America, and Susan Hubbard, deputy laboratory director for science and technology at Oak Ridge National Laboratory (ORNL). While Armesmith of magniX will talk about her company powering the electric aviation revolution with ele c t r ic pr opu l s ion s olut ion s , Balkas will focus on advances in SiC technology and its impact on power conversion systems. Likewise, the third speaker Clayton will dive into sustainability, decarbonization, and renewables to further the mission toward an all-electric world. Finally, the fourth speaker Hubbard will discuss advances in physical and materials sciences, i nclud i ng energ y science s a nd related technologies. She will also highlight the transfer of ORNL technologies into the marketplace, while

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FIG 1 ECCE 2023 will be held at the Nashville Convention Center, TN, USA. Source: ECCE2023.

working closely with key partners to advance regional innovation. Hubbard’s presentation will also examine topics such as advanced mobility and decarbonization. “This is a must-attend event for anyone in the field of power electronics, renewable energy, electric machines, a nd electr ic vehicles and we promise it will be a stimulat i ng a nd educ at ion a l ex per ience,” stated Prof. Brad Lehman, ECCE 2023 general chair and president of IEEE PELS. The five-day conference will be held at the Nashville Convention Center, TN, USA (F igure 1), 29 October–2 November 2023. It will br i ng toget her practici ng eng ineers, researchers, and other profe s sion a l s for i nt er a c t ive a nd multidisciplinary discussions on the latest advances in various areas related to energy conversion.

by Ali Husain

EBL II Global Finals

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n Tuesday, 21 March 2023, the winners of the second Empower A Billion Lives (EBL II) competition were awarded a total of US$475,000 in cash prizes to help them scale up their novel

Digital Object Identifier 10.1109/MPEL.2023.3273891 Date of publication: 27 June 2023



business models and cutting-edge, high-impact solutions to extreme poverty and lack of access to energy in the developing world. EBL is an IEEE Power Electronics Society (PELS) sponsored program with the mission to bring the benefits of electric power to the nearly 800 million people without energy access and the 3 billion who

June 2023

do not have a reliable grid connection. EBL has just completed its second competition where companies, NGOs, and student teams submit, refine, field test, and share their energy access solutions to provide economically viable and scalable solutions for communities with average incomes of lower than US$2 per day.

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FIG 1 Global grand prize winner Nanoé from Madagascar.

From more than 200 applicants from 43 countries, 25 finalists were invited to present to the EBL judges on 19–20 March 2023 at the IEEE Applied Power Electronics Conference and Exposition (APEC), held in Orlando, FL, USA. The winners presented their solutions on the follow i ng d ay a t t he I EEE PEL S Energy Access Workshop, a workshop dedicated to bringing together the energy access community. The workshop was broadcast on live and is now available for viewing on IEEE.tv. The global grand prize winner, Nanoé from Madagascar (Figure 1), was awarded US$150,000 for their innovative method to interconnect separate “nano-grids” into a larger dc microgrid, which allows greater energy sharing within a community and increased the overall system resiliency. In addition to the grand prize, smaller awards were given to teams excelling in five tracks, as well as prizes for student teams. The Automation Centric Track winner was Green Empowerment, operating in Malaysia and the Philippines, for their technique to maximize

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utilization of the generated energy of hydro-based microgrids. The Centralized Model Track winner was Standard Microgrid which is br i n g i n g r u g ge d , s c a l a ble a c microgrids to communities in Zambia. SolarWorx’s consumer and prosumer model for dc microgrids in Cameroon was awarded the Decentralized Model Track prize. The End-Use Energy Track winner, D-Olivette of Nigeria, sells low cost biodigesters which are fed with local bio-waste and generate enough bio-gas to supply the energy for clean cooking in a typical household and can be converted to electricity. Awarded the Enabling Technology Track prize for Impact, Atutu operates in Myanmar. A notable aspect of their efforts is working in very difficult conditions—a civil war with rival militias and shifting political landscape—by developing a local network which is unaligned and has credibility within the communities impacted. The Student Team First Prize was shared between two team from Jordan—PSUT Engineering 2 and R2P Cube. PSUT Engineering is

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exploring using discarded batteries from cell phones to reduce the cost of energy storage, while R2P Cube developed and field tested a solar rechargeable battery for use in agricultural needs such as water pumping. The student team third prize went to IITK Smart Grid of India for their solution to upgrade digital meters to smart meters by adding intelligence and connectivity. Three honorable mentions were also awarded. Solar freeze and scalable solar ice maker, both from Kenya, were recognized for their solutions to bring refrigeration to fishermen, farmers, and shopkeepers. Living Energy Farm’s demonstration project in Puerto Rico shows that strict voltage regulation of a dc microgrid is not necessary for productive use of solar dc microgrids. I ndeed, “ product ive u se” of energy was a greater focus of the second EBL contest after learning from the first competition. Providing electric power to communities is only the f irst step; using it to increase the income of the community members improves their standard of liv ing and pays for the infrastructure and energy. If businesses cannot make profit from providing energy, then the model cannot scale without continuous outside funding. The teams of EBL II demonstrated an impressive knowledge of what their customers value. Besides the contests and prize money, EBL seeks to create connections within the energy access community, which includes multi-lateral organizations like the UN, technology organizations like IEEE and countless small companies on the ground testing, refining, and scaling solutions for the people who would most benefit from electrification. The global finals were organized by the tireless work of the EBL Steering Committee and organizational support from IEEE PELS. The competition was conceptualized by the IEEE PELS and its volunteers and staff, with notable support from the IEEE Standards Association and the

IEEE Control Systems Society. Other contributors to the competition include IEEE sister societies Industrial Electronics and Power & Energy as well as Schneider Electric, the Georgia Research Alliance, and Vicor. The Center for Distributed Energy at the Georgia Institute of Technology provided significant

logistical, planning, and in-kind support and the EBL competition is an IEEE Foundation Partner. For more details on all the EBL teams and prizes, or to find out more about EBL or to get involved in the Energy Access community, please visit www.empowerabillionlives.org.

The next round of IEEE PELS EBL is expected to begin in 2025.

About the Author Ali Husain ([email protected]) is the Director of product management at Enphase Energy in Fremont, CA, USA.

by K. Deepa

Insights into IEEE PELS

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n online talk on “Insights into IEEE PELS” was organized by the IEEE Power Electronics Society (PELS) Bangalore Chapter on 11th April 2023 from 6:00 Digital Object Identifier 10.1109/MPEL.2023.3275295 Date of publication: 27 June 2023



to 7:00 pm (Indian Standard Time). This event was open to all IEEE PELS members from all over India. Ms. Chaitanya L., secretary IEEE PELS Bangalore Chapter started the event with a warm welcome followed by Dr. Kaushik Basu, past c h a i r, I E E E P E L S B a n g a l o r e

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Ch apt er who i nt roduced P rof. Liuchen Chang, immediate past president of IEEE PELS and chair of ITRD. The audience were provided with insights on the benefits of IEEE, as well as PELS Student Membership and the free membership code for the first year. PELS Student

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FIG 1 IEEE PELS Bangalore Chapter organizes an online event.

Membership wa s a nnounced by Prof. Chang. Mr. Vishal introduced Prof. Dehong Xu, PELS vice president of membership and chapter Development, who then addressed the attendees with the benefits of IEEE, along with Student Membership opportunities.

Dr. Manitha, SAAC Chair, IEEE PELS Bangalore Chapter, introduced Regional Chair, Prof. Sanjib K. Panda (National University of Singapore) who addressed the audience with the benefits of IEEE PELS student membership, funding opportunities, and membership strategies.

Finally, Dr. Shefali, EXECOM member, IEEE PELS Bangalore Chapter, introduced Prof. Srinivas Karanki who highlighted the India PELS happening-IEEE PELS Country Liaison (India). A detailed discussion helped students get a deeper understanding about the IEEE Society linked Student Branch Chapter and think about their interests and opportunities. Dr. Deepa, Chair, IEEE PELS Bangalore Chapter, discussed the highlights of PELS Bangalore Chapter 2022 and various events conducted by the Chapter. The session ended with an interactive questions and answers session by the active participants. The meeting was a boon for all the IEEE student members who will be able to utilize the forum and the community for their growth and betterment and contribute towards an ever-growing chapter. The positive comments and feedback along with appreciation from nearly 246 participants gave the committee a motivation to conduct even better insightful events in the future. Finally, this talk was concluded with vote of thanks by Ms. Chaitanya L.

by C. Harinatha Reddy

Dr. Singh on a Lecture Tour in India

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s an IEEE Power Electronics Society (PELS) Distinguished Lecturer (DL), last December, John Deere Technical Fellow Dr. Brij N. Singh, also an IEEE Fellow, was on a lecture tour of India, invited by joint IEEE Power & Energy Society/Industry Applications Society/Power Electronics Society (PES/IAS/PELS) Chapters at BomDigital Object Identifier 10.1109/MPEL.2023.3275092 Date of publication: 27 June 2023

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bay, Hyderabad, Bangalore, and Delhi sections, India.

The Bombay Section Dr. Singh’s lecture tour started on 13 December 2022 with the first lecture delivered at IIT Bombay (Figure 1) where he interacted with faculty and students, followed by the lab tour on 14 December. Majority of the questions were on the silicon carbide (SiC) inverter development project, which Dr. Singh has been leading at

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the Deere & Company since 2015. Additionally, there were questions related to the switching frequency  selection of the SiC MOSFETs that is suitable for a heavy-duty vehicle application in its traction control. Also, there were several questions related to packaging and thermal management of the 200 kW SiC inverter and capacitor cooling for the power-dense (43 kW/L) WBG power electronics cooled with the 115 °C water-ethylene glycol (WEG) for con-

tinuous 150 kW traction power. Master and Ph.D. students enrolled in the power electronics degree program were satisfied with numerous advice and suggestions provided by Dr. Singh during his visit to IIT Bombay, a PELS chapter. 

The Hyderabad Section The next stop was Hyderabad. In the joint PES/IAS/PELS Chapter of the IEEE Hyderabad section, the post COVID-19 period is being effectively utilized through off-line activities that were conducted regularly in the year 2022. Since August 2022, the joint chapter has started to organize various off-line physical events with focus on IEEE-DL programs. As a result, Dr. Singh was invited to present six DL talks to students and

FIG 1 Dr. Singh delivering PELS DL lecture at IIT Bombay, India.



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faculty of engineering colleges in Hyderabad section from 20 to 23 December 2022. The Hyderabad section IEEE-DL program was kicked off with the first event held at MVSR Engineering College with the topic “Career Opportunities: Electrical Engineering-Power Electronics.” About 95 students, faculty, and other members of the community participated in this event (Figure 2). During Q&A, the majority of the questions were related to core engineering study versus students opting for the computer science field with focus on data analytics, data science, AI,

and machine learning, etc. Dr. Singh briefly narrated his career journey and concluded by stating that core engineering know-how and expertise would be always in need for the economic well-being of a country like India. Furthermore, he added, if someone is a power electronics expert that person would be always in demand for solving challenging problems in processes of developing unique and differentiating solutions used in engineering designs. Additionally, for a decarbonized economy, ten s of t hou sa nd s power ele c t r on ic s ex p er t s wou ld b e needed for many decades. Power

FIG 2 Dr. Singh’s picture drawn by young artist Chandana who is aspiring to become a power electronics engineer.

electronics discipline, which is a specialized field within core electrical engineering, is very critical for 21st century engineering solutions to the many societal problems and challenges including successful realization of a clean energy transportation system. Interestingly, the first event was attended by a young artist named Chandana, who is enrolled in an undergraduate EE program at a school which is quite a distance aw ay f r om Hyde r a b a d , I nd i a . According to the lecturer, “when Chandana came to know that a PELS DL program was being organized in the MVSR Engineering College, she sketched Dr. Si ng h’s picture and came to the PELS DL event.” At the end of lecture, she gifted this picture to Dr. Singh (Figure 2). “I think this girl is likely to become a great artist and an excellent power electronics engineer,” stated Dr. Singh. This was followed by the second t a lk g iven by Dr. Si ng h at Bharat Heav y Electrical Limited (BHEL), Hyderabad, Tela nga na , India. The topic was “Wideband Gap Power Electronics Systems for Heavy Duty Vehicles.” Per the organizers, about 22 professionals pa r ticipated i n t h is event w it h

FIG 3 Dr. Singh at Vardaman College of Engineering with many female students in attendance, indicating inclusion, diversity, equity, and access (IDEA) to knowledge.

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excellent interaction between the speaker and the attendees. The third event by Dr. Singh was at Sri Nidhi Institute of Science and Technology, Hyderabad, India on 21 December and the topic was “Improved Control Algorithm for Power Quality Controlled Converter.”   The fourth event was held in the afternoon of 21 December at Vardhaman College of Engineering Hyderabad (Figure 3). And the students interacted with the speaker. At Vardhaman, the questions were similar to those asked in MVSR and Sri Nidhi. Additionally, Dr. Singh had requests from students and faculty to guide them in their efforts to navigate graduate school admission in universities in the U.S. The fifth talk by Dr. Singh was held in the morning of 22 December at the JNTUA, College of E n g i ne er i n g, A n a nt h a pu r a mu , A nd h ra P ra desh, I nd ia . T he topic wa s “Power Electronics for Precision Farming with the Sustainable and Cleaner Environment.” There were about 105 participants in this event. Lastly, the sixth event of this series was held at Sri Krishna Devaraya College of Hor ticultural Sciences, A nanthapuramu, India on 22 December afternoon. The talk was on “Precision Farming with the Sustainable and Cleaner Environment.”  According to the organizers of DL events, Dr. Singh’s visit benefited the people from industry, academia, and students across PELS joint chapter of IEEE Hyderabad section and impacted many professionals in electrical engineering related fields. Concurrently, it also resulted in the PELS membership growth in the Hyderabad section. During this lecture, Dr. Singh as a life members of IEEE PELS narrated his success story and how IEEE gave him access to power electronics experts and professionals for mentorship and technical guidance for fulfilment and career advances. Dr. Singh stated that he meets many PELS members at ECCE, APEC, ITEC and carries out mutually beneficial and knowledge sharing discussions. As the chairman of PES joint chapter of IEEE Hyderabad section, Dr. C. Harinatha Reddy expressed his sincere thanks to Dr. P. V. Rajagopal, immediate past chair of PES joint chapter of Hyderabad section for supporting the events and making it a grand succe s s . A l s o, my si ncer e t h a n k s t o t he chairman of IEEE Hyderabad section for supporting the PES joint chapter and facilitating the success of chapter events during January to December 2022.

confidence.” Dr. Singh encouraged students to regularly read technical literature, practice balanced life, and exercise regularly. These practices will help in coping-up with challenges and in overcoming disappointments in the aftermath of failures.

The Delhi Section

FIG 4 Dr. Singh at Amrita College of Engineering with diverse group of students and all female faculty.

The Bangalore Section On 23 December 2022, Dr. Singh delivered a lecture at Amrita College of Engineering in Bangalore with two topics covered (Figure 4), 1)  Improved Control Algorithm for Power Quality Controlled Converter and 2) Career Opportunities: Electrical Engineering-Power Electronics. While the attendees asked several questions related to graduate study in

the U.S., a very intriguing and unusual question that was somewhat unexpected was related to “how to overcome disappointments in the aftermath of failures and challenges in life.” Dr. Singh’s reply was “try to decompose big and insurmountable problems into small pieces and go after low hanging and easier ones first followed by next level of difficulty. This practice should allow re-gaining

On 12 January 2023, Dr. Singh delivered a talk on “Wide Bandgap Power Electronics for Heavy-Duty Vehicles” at the Netaji Subhas University of Technology, New Delhi, India. According to Dr. Singh, this presentation covered publicly known information on the 200 kW 1050 VDC SiC inverter technology development project at Deere & Company. The SiC inverter converts vehicle engine power into electrical power needed for the permanent-magnet-motorbased electric powertrain used in heavy-duty construction and mining vehicles. Dr. Singh’s presentation covered the design, development, and test verification of WBG technology deployed in the successful realization of a power-dense (43 kW/Litter) hightemperature (suitable for 115 °C WEG coolant) high-efficiency (>98% over the entire range of coolant) SiC dualinverter. Total number of participants were 40, including 11 IEEE members.

by Jian Sun

IEEE Southern Power Electronics Conference is Back to an In-Person Event

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he IEEE Southern Power Electronics Conference (SPEC) is the only society-level conference that is 100% owned by IEEE Power Electronics Society (PELS). Initiated in 2015 for the global power electronics community, SPEC offers a unique forum for researchers, engineers, academics, Digital Object Identifier 10.1109/MPEL.2023.3275290 Date of publication: 27 June 2023

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FIG 1 Indigenous cultural events during the opening ceremony of SPEC 2022. Source: SPEC 2022.

and students from all over the world. While bringing the latest technological advances and applications to the southern regions, it also fosters networking, and promotes the discipline to strengthen the interchanges amongst industry, academia, and professionals. The conference is held towards the end of the year, usually in late November and early December when there are no other major



conferences sponsored by PELS. Following the inaugurating event in Brazil, SPEC has been held in New Zealand (2016), Chile (2017), Singapore (2018), Brazil (2019), and Rwanda (2021). The 2020 event was cancelled due to the pandemic, and the 2021 conference was virtual. SPEC 2022, the first in-person event after 2019, was held from 5 to 7 December 2022 in Sheraton

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Fiji Golf & Beach Resort, Fiji. The conference attracted ~100 attendees from around the world, includi ng bot h prom i nent ex per t s i n power electronics and young professiona ls a s well a s Ph.D. students. Highlights of the conference program included: ■■Half-day tutorials presented by Dushan Boroyevich, Robert PilawaPodgurski, Spasoje Miric, Josep Pou, and Johann Kolar. ■■Keynote speeches by Frede Blaabjerg, Johann Kolar, Mark Xu, Josep Gurrerro, and Faz Rahman. ■■Invited talks by Andreas Liske and Sheldon Williamson. ■■PELS Young Professional Cocktail and Women in Engineering Breakfast. ■■Indigenous cultural events during the opening ceremony and the conference banquet (Figure 1). SPEC 2022 papers and tutorials can be viewed at https://spec-ieee. org/program/.

SPEC 2023 and 2024 SPEC 2023 will take place on 26–29 November at the Oceania Convention Center, Florianopolis, Brazil, in collaboration with COBEP, the

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FIG 2 SPEC 2023 will take place in modern Florianopolis, Brazil.

Brazilian Power Electronics Conference. Digest submission is open and will close on 22 May. Please visit https://spec-ieee.org/ for details of the conference. Florianopolis is the capital of the state of Santa Catarina, in the South region of Brazil. The city has some of Brazil’s most beautiful beaches with about 100 registered beaches, making it one of the most popular destinations in Brazil for people looking for fun, beautiful scener y, interesting culture and friendly people. The city of Florianopolis is quite modern (Figure 2), w it h l a rge shoppi ng m a l l s, cha in a nd high- end restaura nts a nd m a ny g la morou s ba r s a nd nightclubs. SPEC 2024 will come to Brisba ne, Aust ra l ia . P rof. Ma h i nda Vilathgamuwa of the Queensland University of Technology will be t he ge ne r a l c h a i r. He c a n b e r e a c h e d a t m a h i n d a .v i l a t h [email protected] if you would like to get involved.

by S. L. Patil

Prof. Panda Delivers Distinguished Lecture at COEP Technological University Pune

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n 9 March 2023, Prof. Sanjib K. Panda, associate professor and area director, power and energy research group, Department of Electrical EngineerDigital Object Identifier 10.1109/MPEL.2023.3275328 Date of publication: 27 June 2023

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ing, National University of Singapore (NUS), delivered a distinguished lecture (DL) on “SinglePhase Inverter Control Techniques for Interfacing Renewable Energy Sources with Microgrid.” This DL talk was presented at COEP Technological University Pune, India (Fig-

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ure 1). Prof. Panda’s is also IEEE Power Electronics Society (PELS) membership and chapter coordinator for IEEE Region 10, as well as chair for PELS TC-12: Energy Access & Off-grid systems. His DL lecture was well apprecia t e d by t he a t t ende e s , wh ich

included students and faculty members from engineering institutes in and around Pune. As a result, there were 140 in-person participants, along with 15 online participants. According to the organizers, the lecture is also available on Yo u T u b e ( h t t p s : / / w w w.y o u t u b e . c o m / watch?v=i8oOyaj0rwk). Prof. Panda was felicitated by Mr. Mandar Khurjekar, chairman of IEEE Instrumentation and Measurement Society (IMS) chapter. During his talk, Prof. Panda discussed his students Ph.D. research area and related work in the domain of inverter control with emphasis on single-phase p-q theory and Lyapunov function based controller. Some of the peculiar findings are as follows: The single-phase p-q theory based approach ensures easy control on grid active and reactive power flow. ■■The suggested and value added LF based controller is simpler than conventional d-q frame PI + multiple PR controllers. ■■The suggested controller provides better tracking enabling single inverter doing both power flow control and PFC operation. The controller was implemented in dSPACE 1104 and experimental results demonstrated. Besides the talk on single-phase inverter control techniques, Prof. Panda also spent some time in explaining to the attendees the importance of IEEE student membership, and also the activities carried out by IEEE and IEEE PELS. The objective of the event was to explore the prospects of control techniques for power elect ron ics a nd renewable energ y f ield / domain. In addition, Prof. Panda also had separate meeting with faculty members and Ph .D. s chol a r s of COEP Te ch nolog y t o explore possible ways of collaboration and advancing forward, both academically and on the research front. During the meeting, Prof. Panda also discussed various collaborative fields. Although, few domains are overlappi ng, they ca n be adva nced f u r ther w ith mutual interest, stated Prof. Panda. “We can allot the control theory for power electronics as topic for graduate students and the same ca n be ex plored for student’s excha nge,” added Prof. Panda. Few graduate students are interested and motivated to work in the control theory for power electronics applications, and have started exploring niche problem definition for unmet needs.



FIG 1 Prof. Sanjib K. Panda giving the DL lecture at COEP Technological University Pune.

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by Chandrasekhar Perumalla

IEEE PELS Joint Chapter in Kolkata Hosts Multiple In-Person Events

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ecently, the IEEE Power Electronics Society (PELS) joint chapter in the IEEE Bhubaneswar Subsection/Kolkata Section hosted multiple events in-person. On 22 December 2022, the joint chapter organized for a lecture to be presented by Prof. Sanjib Kumar Panda (IEEE Fellow, IEEE PELS Asia Pacific Region Chair) at the Indian Institute of Technology (IIT) in Bhubaneswar (Figure 1). The lecture covered different technical aspects of power electronics, such as the status of Singapore’s grid and its future plans, future grid scenarios, different aspects and control scenarios of plug and play microgrids, and advantages of the developed and proposed controls over state-of-the-art controls. About 35 professionals attended the distinguished lecture and appreciated the interactive and informative presentation. The joint chapter would like to thank Prof. Panda for taking the time to give his lecture to the attendees. From 27 to 28 January 2023, the joint chapter co-sponsored the 3rd National Workshop on Recent Developments in Smart-Grid Technolog ies (NWSGT ) at IIT i n Bhubaneswar. The theme of the workshop wa s “Microgr ids a nd Electric Vehicles” and had sessions that were delivered by va r ious speakers from India across different reputable institutions (Figure 2). Some of the major topics included were design and operational issues of power electronic converters for Digital Object Identifier 10.1109/MPEL.2023.3275093 Date of publication: 27 June 2023

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FIG 1 Prof. Panda giving his presentation at IIT in Bhubaneswar, India.

FIG 2 Speakers who had sessions at the 3rd NWSGT.

electric vehicles, control and integration of microgrids, various issues phasor measurement unit and widea rea mon it or i ng i n m icrog r id, advanced protection systems for hybrid ac-dc and dc microgrids, and coordinated protection and control in smart microgrids. In addition to these events, the joint chapter also co-organized the International Conference on Power Elect ron ics a nd Energ y a nd

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organized a technical talks series that featured presentations from Dr. Alexandros Paspatis ad Ms. Alkistis Kontou from the National Technical University of Athens, Greece, and Dr. Mazher Syed from the University of Strathclyde, Scotland that took place from 15 to 16 February 2023. The joint chapter would like to thank all who helped with these events and is looking forward to organizing more events in the future.

by Amrutha Nair

IEEE IES/PELS Joint SBC at MACE Coordinate “Light the Lives”

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ast year, the IEEE Industrial Electronics Society (IES)/Power Electronics Society (PELS) joint student branch chapter (SBC) at the Mar Athanasius College of Engineering (MACE) collaborated with the IEEE SIGHT AG MACE SB, National Service Scheme (NSS), MACE at Kothamangalam, IEEE Humanitarian Activities Committee (HAC), and Lions Club at Kothamangalam to organize the event “Light the Lives” (Figure 1). This event was created after noticing the lack of energy resources that faced the Kuttampuzha’ Gram Panchayat. When this need was recognized, an application was submitted to the IEEE HAC/ SIGHT projects call for proposals focused on pressing community needs. Once the application was accepted, arrangements were made a nd over 4 0 volu nt e er s worked tirelessly to install solar off-grid systems in five homes and a mother-child care centre in the Uriyanpet t y t r iba l colon ie s i n

FIG 1 Participants of the “Light the Lives” event.

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Kerala’s Kuttampuzha village (Figure 2). This project allowed the students at MACE in Kothamangalam to gain first-hand technical knowledge and develop leadership skills while facilitating a beacon of hope and happiness for multiple families and the community.

FIG 2 Volunteers installing a solar panel.

by Jane Celusak

IEEE PELS EBL Chair Presents Democratization of Energy at the UN Global Solutions Summit 2023

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n 5 May 2023, The IEEE Power Electronics Society’s (PELS) Past President and Global Steering Chair for the PELS Energy Access Committee and the Empower a Billion Lives (EBL) program, Prof. Deepakraj Divan, John E. Pippin Chair, and Director of the Center for Distributed Energy at the Georgia Institute of Technology, Atlanta, GA, presented “Democratization of Energy Technology Needs and Roadmap” at the United Nations (UN) Global Solu-

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tions Summit 2023 at the UN headquarters in New York (Figure 1) 1. The UN Global Solutions Summit (GSS) was co-located with the Science, Technology, and Innovation Forum for the Sustainable Development Goals 2030. GSS2023 assembled a roster of thoughtful doers—women and men who are actively working in the field to surmount these development challenges. Toward that goal, Prof. Divan’s presentation showed a 1Please access the recording of the event at https://media.un.org/en/asset/k1r/k1rv0ul8hs with Prof. Divan’s presentation starting at 1:47:00.

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roadmap and technology needs for ensuring that the energy transition does not leave the least developed cou nt r ie s ( L DC s) beh i nd once again. He showed that the PELS sponsored Empower a Billion Lives (EBL) recurring global competition to foster interdisciplinary solutions for energy access can be a key component in developing, demonstrating, and derisking viable solutions that can scale, are regionally relevant, holistic, and leverage 21st century technologies with exponentially declining prices. He concluded with specific guidance for policy makers on how to make

FIG 1 Prof. Deepak Divan presenting at the UN global solutions summit 2023. Source: Prof. Deepak Divan.



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fast-moving technologies an integral part of the roadmap. The EBL competition crowdsou rces solutions to ta rget the issue that more than 700 million people live with no electricity, and 3 billion live with extreme energy poverty (