Recent Advances in Power Electronics and Drives: Select Proceedings of EPREC 2023, Volume 2 (Lecture Notes in Electrical Engineering, 1139) [2024 ed.] 9819994381, 9789819994380

Citation preview

Lecture Notes in Electrical Engineering 1139

Krishna Murari Bhim Singh Vijay Kumar Sood   Editors

Recent Advances in Power Electronics and Drives Select Proceedings of EPREC 2023, Volume 2

Lecture Notes in Electrical Engineering Volume 1139

Series Editors Leopoldo Angrisani, Department of Electrical and Information Technologies Engineering, University of Napoli Federico II, Napoli, Italy Marco Arteaga, Departament de Control y Robótica, Universidad Nacional Autónoma de México, Coyoacán, Mexico Samarjit Chakraborty, Fakultät für Elektrotechnik und Informationstechnik, TU München, München, Germany Jiming Chen, Zhejiang University, Hangzhou, Zhejiang, China Shanben Chen, School of Materials Science and Engineering, Shanghai Jiao Tong University, Shanghai, China Tan Kay Chen, Department of Electrical and Computer Engineering, National University of Singapore, Singapore, Singapore Rüdiger Dillmann, University of Karlsruhe (TH) IAIM, Karlsruhe, Baden-Württemberg, Germany Haibin Duan, Beijing University of Aeronautics and Astronautics, Beijing, China Gianluigi Ferrari, Dipartimento di Ingegneria dell’Informazione, Sede Scientifica Università degli Studi di Parma, Parma, Italy Manuel Ferre, Centre for Automation and Robotics CAR (UPM-CSIC), Universidad Politécnica de Madrid, Madrid, Spain Faryar Jabbari, Department of Mechanical and Aerospace Engineering, University of California, Irvine, CA, USA Limin Jia, State Key Laboratory of Rail Traffic Control and Safety, Beijing Jiaotong University, Beijing, China Janusz Kacprzyk, Intelligent Systems Laboratory, Systems Research Institute, Polish Academy of Sciences, Warsaw, Poland Alaa Khamis, Department of Mechatronics Engineering, German University in Egypt El Tagamoa El Khames, New Cairo City, Egypt Torsten Kroeger, Intrinsic Innovation, Mountain View, CA, USA Yong Li, College of Electrical and Information Engineering, Hunan University, Changsha, Hunan, China Qilian Liang, Department of Electrical Engineering, University of Texas at Arlington, Arlington, TX, USA Ferran Martín, Departament d’Enginyeria Electrònica, Universitat Autònoma de Barcelona, Bellaterra, Barcelona, Spain Tan Cher Ming, College of Engineering, Nanyang Technological University, Singapore, Singapore Wolfgang Minker, Institute of Information Technology, University of Ulm, Ulm, Germany Pradeep Misra, Department of Electrical Engineering, Wright State University, Dayton, OH, USA Subhas Mukhopadhyay, School of Engineering, Macquarie University, Sydney, NSW, Australia Cun-Zheng Ning, Department of Electrical Engineering, Arizona State University, Tempe, AZ, USA Toyoaki Nishida, Department of Intelligence Science and Technology, Kyoto University, Kyoto, Japan Luca Oneto, Department of Informatics, Bioengineering, Robotics and Systems Engineering, University of Genova, Genova, Genova, Italy Bijaya Ketan Panigrahi, Department of Electrical Engineering, Indian Institute of Technology Delhi, New Delhi, Delhi, India Federica Pascucci, Department di Ingegneria, Università degli Studi Roma Tre, Roma, Italy Yong Qin, State Key Laboratory of Rail Traffic Control and Safety, Beijing Jiaotong University, Beijing, China Gan Woon Seng, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, Singapore Joachim Speidel, Institute of Telecommunications, University of Stuttgart, Stuttgart, Germany Germano Veiga, FEUP Campus, INESC Porto, Porto, Portugal Haitao Wu, Academy of Opto-electronics, Chinese Academy of Sciences, Haidian District Beijing, China Walter Zamboni, Department of Computer Engineering, Electrical Engineering and Applied Mathematics, DIEM—Università degli studi di Salerno, Fisciano, Salerno, Italy Junjie James Zhang, Charlotte, NC, USA Kay Chen Tan, Department of Computing, Hong Kong Polytechnic University, Kowloon Tong, Hong Kong

The book series Lecture Notes in Electrical Engineering (LNEE) publishes the latest developments in Electrical Engineering—quickly, informally and in high quality. While original research reported in proceedings and monographs has traditionally formed the core of LNEE, we also encourage authors to submit books devoted to supporting student education and professional training in the various fields and applications areas of electrical engineering. The series cover classical and emerging topics concerning: • • • • • • • • • • • •

Communication Engineering, Information Theory and Networks Electronics Engineering and Microelectronics Signal, Image and Speech Processing Wireless and Mobile Communication Circuits and Systems Energy Systems, Power Electronics and Electrical Machines Electro-optical Engineering Instrumentation Engineering Avionics Engineering Control Systems Internet-of-Things and Cybersecurity Biomedical Devices, MEMS and NEMS

For general information about this book series, comments or suggestions, please contact [email protected]. To submit a proposal or request further information, please contact the Publishing Editor in your country: China Jasmine Dou, Editor ([email protected]) India, Japan, Rest of Asia Swati Meherishi, Editorial Director ([email protected]) Southeast Asia, Australia, New Zealand Ramesh Nath Premnath, Editor ([email protected]) USA, Canada Michael Luby, Senior Editor ([email protected]) All other Countries Leontina Di Cecco, Senior Editor ([email protected]) ** This series is indexed by EI Compendex and Scopus databases. **

Krishna Murari · Bhim Singh · Vijay Kumar Sood Editors

Recent Advances in Power Electronics and Drives Select Proceedings of EPREC 2023, Volume 2

Editors Krishna Murari Department of Electrical Engineering and Computer Science The University of Toledo Toledo, OH, USA

Bhim Singh Department of Electrical Engineering Indian Institute of Technology Delhi New Delhi, Delhi, India

Vijay Kumar Sood Department of Electrical, Computer and Software Engineering Ontario Tech University Oshawa, ON, Canada

ISSN 1876-1100 ISSN 1876-1119 (electronic) Lecture Notes in Electrical Engineering ISBN 978-981-99-9438-0 ISBN 978-981-99-9439-7 (eBook) https://doi.org/10.1007/978-981-99-9439-7 © The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 This work is subject to copyright. All rights are solely and exclusively licensed by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use. The publisher, the authors, and the editors are safe to assume that the advice and information in this book are believed to be true and accurate at the date of publication. Neither the publisher nor the authors or the editors give a warranty, expressed or implied, with respect to the material contained herein or for any errors or omissions that may have been made. The publisher remains neutral with regard to jurisdictional claims in published maps and institutional affiliations. This Springer imprint is published by the registered company Springer Nature Singapore Pte Ltd. The registered company address is: 152 Beach Road, #21-01/04 Gateway East, Singapore 189721, Singapore Paper in this product is recyclable.

Preface

The Electric Power and Renewable Energy Conference (EPREC-2023) was organized by the Department of Electrical Engineering, National Institute of Technology Jamshedpur, India, from May 25 to 27, 2023. We thank all the contributors for maintaining the high standard and making EPREC-2023 a huge success. Out of total 234 valid submissions, only 95 were selected for publication in four different volumes, i.e., an acceptance rate of nearly 40%. This volume, i.e., Recent Advances in Power Electronics and Drives is one of four volumes to be published by Springer in the book series Lecture Notes in Electrical Engineering (LNEE). It contains 25 high quality papers. This book entitled Recent Advances in Power Electronics and Drives—Select Proceedings of EPREC 2023 provides rigorous discussions, case studies, and recent developments in the emerging areas of power electronics, especially, power inverter and converter, electrical drives, regulated power supplies, electric vehicle and its charging infrastructure, etc. The readers would be benefitted in enhancing their knowledge and skills in the domain areas. Also, this book may help the readers in developing new and innovative ideas. The book can be a valuable reference for beginners, researchers, and professionals interested in advancements in power electronics and drives. We thank all the authors, organizing committee members, technical program committee members, reviewers, and student coordinators for their valuable contributions and volunteer work. We also appreciate the role of session chairs/co-chairs and thank the series editors of LNEE and Ms. Kamiya Katter, Associate Editors, Springer for their help and quick responses during the preparation of the volume. Toledo, USA New Delhi, India Oshawa, Canada

Krishna Murari Bhim Singh Vijay Kumar Sood

v

Contents

Hardware-In-Loop Test for Electronic Control Unit . . . . . . . . . . . . . . . . . . Bhupendra Teriya and Sushma Gupta High Efficient Single Phase Active LED Driver with Reduced Power Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ramesh Babu Pallapati, Ramulu Chinthamalla, Sindhu Vutturi, D. V. K. Abhinay, and Chandra Kiran Kumba Implementation of Model Predictive Current Control Technique for Single Phase Four Level Grid Connected Asghar Inverter . . . . . . . . . . Dipty Chandrakar, Bhagwan K. Murthy, and Aratipamula Bhanuchandar A Low Voltage Stress Switched-Capacitor Based 7-Level Boost Multilevel Inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gangadhar Dhal, Kasinath Jena, Lipika Nanda, Pradeep Ku. Sahu, Kumaresh Pal, and Aditya Prasad Padhy

1

11

27

39

Design and Investigation of Solar PV-Fed PMSM Motor Drive . . . . . . . . . Irfan Qureshi and Vikas Sharma

51

Scheming of Four-Phase IBC for Fast Charging of EV Battery . . . . . . . . . Abhishek Singh, Pooja Kumari, and Niranjan Kumar

65

Speed Control of a Brushless DC Motor Using Hall Sensor . . . . . . . . . . . . Manoj Kumar Kar, Shejal Sanjay Waghmare, Simeen Mujawar, and Sreerekha Vadi

77

Implementation of Multifunctional Electric Vehicle Charger Based on ANFIS with Solar PV Array . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Othuru Baba, S. Hussain Vali, Vempalle Rafi, and R. Kiranmayi

89

Axial Flux Motors for Suspension, Levitation and Propulsion System of Hyperloop-A Review . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 Richa Dewangan, Suresh Kumar Gawre, and Shailendra Kumar

vii

viii

Contents

A Generalized Symmetrical and Asymmetrical Multilevel Inverter Topology with Reduced Number of Components . . . . . . . . . . . . . . . . . . . . . . 123 Ragul Duraisamy and Thiyagarajan Venkatraman Comprehensive Analyses of Control Techniques in Dual Active Bridge DC–DC Converter for G2V Operations . . . . . . . . . . . . . . . . . . . . . . . 135 Sudipta Baidya and Akanksha Shukla DBSCAN-Based Cascaded Inductively Coupled DSTATCOM for PQ Improvement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153 Praveen Kumar Yadav Kundala, Mrutyunjaya Mangaraj, Suresh Kumar Sudabattula, Jogeswara Sabat, and Rohan Thakur EV Charger Using Modified DAB Converter . . . . . . . . . . . . . . . . . . . . . . . . . 173 Payel Show, R. L. Josephine, and Sai Harsha Naidu Overview of SOC Estimation Strategies for Battery Management in Electric Vehicles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193 Anupam Singh and Arvind Yadav Comprehensive Review of Switched-Capacitor Boost Single-Source Nine-Level Inverters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207 Haresh Nanda and Himanshu Sharma Design, Simulation and Analysis of DC–DC Cuk LED Drivers . . . . . . . . . 221 B. Lakshmi Praba, V. Vidhu Priya, and R. Seyezhai PV Partial Shading for Interleaved Quadratic High-Gain DC–DC Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237 M. Premchand and Swati Devabhaktuni Investigation on Modified Bridgeless SEPIC PFC Converter Topology for Battery Charging Application . . . . . . . . . . . . . . . . . . . . . . . . . . 251 Sridhar Makkapati, N. Chitrapavai, and Seyezhai Ramalingam The Improved vµ LMS-Based Grid Connected Solar PV System Power Flow with Abnormal Grid and Non-linear Load Conditions . . . . . 261 Pavan Prakash Gupta, Ramesh Kumar Tripathi, and Shailendra Kumar Predictive Torque Control of Five-Phase Open-Ended Winding Induction Motor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279 Naresh Rayavarapu, Swati Devabhaktuni, and C. Venkata Subba Reddy Grid-Integrated EV Charging Infrastructure . . . . . . . . . . . . . . . . . . . . . . . . 297 Sugunakar Mamidala and Arvind Kumar Prajapati Modified Multi-inductor-Based Cell Balancing in Electric Vehicles . . . . . 325 Utsab Bhattacharya and Pradeep Kumar

Contents

ix

Design and Hardware Implementation of Fuzzy Logic Controller for Boost Converter for Battery Charging Using dSPACE . . . . . . . . . . . . . 343 K. S. V. Phani Kumar, Vishwanatha Siddhartha, Kalluri Deepika, and Sonnati Venkateshwarlu A Modified Direct Torque Control of a Five-Phase Induction Motor for Harmonic Current Elimination and Reduction of Common Mode Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 353 C. Venkata Subbareddy and Swati Devabhaktuni A Novel Approach Towards Performance Analysis of Three Phase Two Level Inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 367 Papia Ray, Shreya Mohanty, and Arvind R. Singh

About the Editors

Krishna Murari received a B.Tech. degree in electrical engineering from WBUT, India, in 2010, an M.E. degree in power systems from Thapar University, India in 2014, and a Ph.D. degree in electrical engineering from the Indian Institute of Technology Roorkee, India in 2019. Currently, he is working as a Research Assistant Professor at the Electrical Engineering and Computer Science Department, The University of Toledo, Toledo, Ohio, USA. Prior to this, he worked as a Research Associate at Clarkson University, Potsdam, New York. He has also worked as a Postdoctoral Fellow with the Energy Production, and Infrastructure Center (EPIC), University of North Carolina at Charlotte, North Carolina, USA. He is a member of IEEE and has published 11 Journals, 10 conferences, 01 Book, and 02 book chapters. He is serving as a reviewer in several international journals and conferences. He is the recipient of the best-prized paper by The Industrial Automation and Control Committee of the IEEE Industry Application Society among the research articles presented in 2021. He is a reviewer in journals, such as IEEE, IET, MDPI, and Taylor Francis journal. His research interests include power system analysis, AC–DC power flow studies, demand-side management, optimization and control of DERs, optimal power flow, distribution network pricing, and smart grid. Dr. Bhim Singh (Fellow, IEEE) was born in Rahamapur, Bijnor (UP), India, in 1956. He received a B.E. degree in electrical engineering from the University of Roorkee (now IIT Roorkee), Roorkee, India, in 1977, the M.Tech. degree in power apparatus and systems, and a Ph.D. degree in electrical engineering from the IIT Delhi, India, in 1979 and 1983, respectively. In 1983, he joined the Department of Electrical Engineering, University of Roorkee, as a Lecturer. He became a Reader there in 1988. In December 1990, he joined the Department of Electrical Engineering, IIT Delhi, India, as an Assistant Professor, where he became an Associate Professor in 1994 and a Professor in 1997. He has been the Head of the Department of Electrical Engineering at IIT Delhi from July 2014 to August 2016. He has been the Dean, of Academics at IIT Delhi, from August 2016 to August 2019. He is a JC Bose Fellow of DST, Government of India since December 2015. He has been CEA Chair Professor since January 2019. Professor Singh has guided 84 Ph.D. dissertations and xi

xii

About the Editors

168 M.E./M.Tech./M.S.(R) theses. He has filed 58 patents. He has executed more than 80 sponsored and consultancy projects. His areas of interest include solar PV grid interface systems, microgrids, power quality monitoring and mitigation, solar PV water pumping systems, and improved power quality AC–DC converters. Dr. Vijay Kumar Sood was a Senior Researcher with the Research Institute of Hydro-Québec (IREQ), Montreal, QC, Canada, for many years. Currently, he is a Professor in the Electrical Engineering Department, at Ontario Tech University, Oshawa, ON, Canada where he joined in 2007. He is also a registered Professional Engineer in Ontario. Dr. Sood received his Ph.D. degree from the University of Bradford, UK in 1977. He has authored over 160 articles and written two books on HVDC and FACTS transmission systems. He was an Editor of the IEEE Transactions on Power Delivery, Associate Editor of the IEEE Canadian Journal of Electrical and Computer Engineering, and Editor of the IEEE Canadian Review quarterly magazine. Currently, he is the Editor-in-Chief of the Distributed Generation and Alternative Energy Journal. His current research interests include the monitoring, control, and protection of power systems. Dr. Sood is a Life Fellow of the Institute of Electrical and Electronics Engineers, a Fellow of the Engineering Institute of Canada, and an Emeritus Fellow of the Canadian Academy of Engineers.

Hardware-In-Loop Test for Electronic Control Unit Bhupendra Teriya and Sushma Gupta

Abstract The vehicle’s electronic control unit (ECU) to be validated and verified in accordance with client specifications. Adequate prototyping and testing are essential, in order to speed up assembly cycle time, automation in testing replaces manual testing by human operators on an ongoing basis. Before installing the ECU in the vehicles, the hardware-in-loop (HiL) environment is used to test it. The HiL setup for testing ECU to find the driving warning, which is a critical failure, is the main topic of this study. The failure data is recorded in the memory together with the failure’s date, time, and cause. The problem in the ECU is further diagnosed using the stored data. The history data storage (HDS) feature in non-volatile memory (NVM) will save various data for each major failure. The HiL makes it possible to test the ECU in real-time conditions in the lab. Additionally, it offers a setting that is similar that of a car. In HiL ECUs communicate with one another using the CAN communication protocol. Keywords Electronic control unit · Hardware in the loop system · Electric vehicle · Real-time simulation · History data storage

1 Introduction The implementation and testing processes used by the automotive industry today have changed; industries are adopting a new method to test the system in a lab setting, which offers real-world experience. The implementation of these similar rapid prototyping ideas for car and other component testing or validation, known as Hardware in the loop or HiL Simulation, may, however, represent the most significant advance [1]. The HiL setup is a technique that substitutes a real-time environment with all the components for the actual vehicle in order to test the operation of the ECU and failure outcomes before assembling it into a vehicle. A real-time virtual environment made up of a central controller known as the host computer with the B. Teriya (B) · S. Gupta Maulana Azad National Institute of Technology, Bhopal, India e-mail: [email protected] © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 K. Murari et al. (eds.), Recent Advances in Power Electronics and Drives, Lecture Notes in Electrical Engineering 1139, https://doi.org/10.1007/978-981-99-9439-7_1

1

2

B. Teriya and S. Gupta

install vector tools like vector CANOe and vTESTstudio is used to substitute the engine and other components. The simplest method to test the ECU is to use these tools and setup. Real-time simulation can be accelerated and improved with HiL [2]. Software that uses simulation has a few drawbacks; Hardware in the loop is the only solution to bridge the gap between simulation and real-time simulation because software simulation cannot imitate natural behavior or operational conditions [3]. If we can identify the ECU fault before applying it in the actual vehicle, the cost of correcting error is greatly reduced. Instead of testing an ECU with the entire system, the Hardware in Loop arrangement offers this capability to lower testing error. The increasing demand from consumers for electric vehicles with more electric control units or engine control units with enhanced functionality and operating range is driving the need for significant advancements in the field [4]. The use of inexpensive cars is not necessary because the hardware in a loop testing environment can imitate the vehicles, provides the diagnostic capability, shortens the time needed for development and testing, and can emulate several vehicles. The application of real-time simulation to testing the vehicle’s engine control unit is expanded [5]. To integrate the real Hardware into the loop system while simulating mechanical and electrical models of the system. The vehicle electronic control unit is interfaced with the simulator during the HiL controller testing to test the control and protection techniques. The configuration of hardware and software tools creates the HiL simulation [6]. Since the operation of the electronic control unit (ECU) is a very high frequency for transmitting the control area network (CAN) signal between the ECU nodes, a real-time simulation is crucial for testing. CAN is a multi-master communication. The CAN protocol is used in vehicles for diagnostic services between the ECU and the tester and wiring harness diagnosis, since it has a message transfer rate of one megabit per second and a range of forty meters [7]. For highly automated vehicles, HiL testing is performed to ensure the accuracy and verification of the automation project. Three crucial elements make up the strategy outlined for the Validation and Verification (V&V) methodology. Validating an autonomous vehicle, coming up with a safety concept, and making sure it complies with the standards of the vehicle [8]. Laboratory testing methods sparked an interest in reducing the developer and testers’ time while improving the product’s quality. The HiL set-up offers a regulated, repeatable, and economical method of testing embedded systems. Input–output diagnostics, regulated algorithm performance factoring input–output functionality of the ECU processor, and RAM utilization are all provided by the HiL simulation [9].

Hardware-In-Loop Test for Electronic Control Unit

3

1.1 Objective Following are the objectives of the work: • Understanding of hardware-in-loop set-up to test vehicle electronic control unit. • Trigration of Warning for the driver after fault injection in the ECU and Identify the stored data in NVM.

2 Hardware-In-Loop Set-Up The hardware-in-loop arrangement consists of electrical sensors, actuators, electrical and electronics loads (eLoad), and tools for automation. The interface between the test unit and the plant simulation is provided by these electrical emulations [10]. The value of each electrical component and load is controlled by the plant simulation and is read by the simulation tools vector CANOe. It is also important to secure input– output interferences with the test system in order to test an ECU; this is independent of connecting the communication network to the test system. Figure 1 shows the block diagram for hardware-in-loop set-up. The information exchange between the ECU and the test system is handled by the Vector Test system (VT System), which also has access to the input–output of the hardware that is the subject of the test. All test system components are integrated into the validation and verification (VV) system and connected in one module to check for input–output interference. The VT system is completely linked with the vector CANOe and vTESTstudio scripts, requiring little to no wire to set up the test, connect the relay, add load for the actuation simulation, and add vehicle load [11–13]. The

Fig. 1 Hardware-in-loop set-up block diagram

4

B. Teriya and S. Gupta

comprehensive software package CANOe is used to test and analyze a single node or a node network. Vector: vTESTstudio is used to automate test case scripts for ECU to boost reliability and shorten simulation time. It offers test engineers a variety of capabilities, including reusability. It can be used to validate and verify the ECU test in the HiL configuration during all phases of product development. Direct access to the HiL test environment is available. The CANOe is the sole tool that offers us a wide range of possibilities for development and testing jobs. Simulation in the vector CANOe tool also offers the capability for graphics and test-based result evaluation. At a single HiL setup desk, it may analyze the multi-node network connectivity of the ECU and the entire test system. All bus activity can be messaged through the CANOe Trace window, and all frames and graphics windows display the message sent and the graphics image of that message. The EPS, iBooster, ESP, and other eLoads are utilized to examine the ECU’s response for a failure in one of the loads. These loads are ASIL loads. All these weights that were used in the vehicle are crucial in terms of safety. A failure in the load occurs when the requirement of the load does not match the specification. A calibrated XCP variable was employed to simulate these failures in the load. We can modify the location of the internal switches of the loads using these XCP variables. The test object for the test setup is the actual or real ECU. To analyze the failure information, check whether the data and cause will be stored correctly or not in the ECU memory, once internal controls fail. The ECU stores the information in ASCII format. The Hardware in the Loop setup’s most important component is the ECU. Based on the test’s requirements, the signal processor is chosen. The processor has a sensor and actuators for efficiently processing signals supplied when the vehicle’s ECU fails and for diagnostic services. Because of advances in power electronics, various types of signal processors are used for signal processing. A signal processor’s main goal is to offer a user interface, such as a set of data. For vTESTstudio to prepare the test cases, the standard CANOe license is required, and an additional remote permission is given for a remote computer with the HiL configuration. This central PC is set up with the default license and is used to produce the anticipated test result. The hardware used for the HiL setup’s work is quite similar to the hardware used for the department’s routine testing. The department’s hardware is mostly unchanged from the ECU under test; the software products offered by vector are connected to various hardware items via licenses.

3 Driver Warning Data Storage The data storage feature records details of numerous ECU resets, major errors, and failures. Its main goal is to offer enough details so that the events can be replicated, analyzed, or at the very least, the cause may be determined at the service garage, during the study of the return warranty, or during the development test. Reason of failure in the ECU are as follows:

Hardware-In-Loop Test for Electronic Control Unit

• • • • •

5

Resets that are generally not happening, like watchdog. Over current, over voltage and under voltage. Short circuit in the ECU. Software failures. Communication failure.

Driver warning test scenario is entirely dependent on the ECU issue. The red warning lap illuminates whenever the electronic control unit experiences undesirable changes or something dangerous, and alert the driver to the issue and reduce the vehicle speed so that no new issues arise. Here, it is important to note that there are some instances of degradation, the car has an issue if the degradation does not take place. A separate DTC is received from the ECU if the primary switch, for example, is not closing or opening properly. The HiL test system is affordable, adaptable, and efficient. The brain of the HiL is the host computer or desktop. Only the host computer is the center of all ongoing activity. The host computer presents all the simulated results in the report in one location for additional analysis.

3.1 Test Case Simulation in CANOe Under HiL Environment Tools—hardware and software—are needed to prepare a test case for real-time simulation of an automotive electronic control unit. Hardware in a loop system consists of four main parts for the real time simulation: • • • •

Host computer Loads Real ECU Signal processor.

A command-based editor application called vTESTstudio creates test case scripts using Communication Access Programming Language (CAPL) code. Making an independent test module that can be added to any generic testing environment is one of the main assignments for the CANOe. The test suit for the test scripts implemented in CANOe was created in the first step of the assignment in vTESTstudio. The vTESTstudio integrated with CANOe by taking a script file in order to reproduce the test case in Vector CANOe. The remote desktop is used to attach the file to CANOE. The most recent hardware or electronic control unit is connected to the HiL configuration that can be shown as a node in CANOe; Fig. 2 shows the simulating node in CANOe. The setting makes vTESTstudio and Vector CANOe HiL software test environment possible. The supply board and all necessary components are connected in a lab where the HiL simulator is located. The HiL used in test configuration receives a remote-control power supply that it can control during the simulation. The HiL system relates to the ignition system’s on/off functionality as well. If the ECU is

6

B. Teriya and S. Gupta

working fine, we will get positive response by adding 40 in the request service id. Figure 3 shows the positive response from ECU. An extra current is provided through the vector CANOe panel. When the current limit reaches the upper limit of the expected range a warning lamp will trigger. Figure 4 shows the warning lamp indication. If the current limit of the fault is not decrease in the specified time duration the ECU itself open the main switch to diagnose the fault and save the passenger live. For a particularly complicated electrical powertrain control system, the HiL system automates testing and collects the test results in one location. To test the ECU under various conditions, external Hardware, such as a debugger, can be connected

Fig. 2 Node panel of ECU for simulation in CANOe

Fig. 3 Positive response received from ECU

Hardware-In-Loop Test for Electronic Control Unit

7

Fig. 4 Warning lamp and control switch position

to a HiL system. HiL loads can controlled in accordance with the specifications of the system test.

3.2 Simulation to Check the History of the Fault The test setup should be connected to the most recent hardware sample running with the proper software. The ECU testing standards are all up to date. After starting the engine, the real-time simulation is activated. The car is now in running condition, and all parameters have been established, including the date, time, speed, and supply values (PS 0 and PS 1) (Fig. 5).

Fig. 5 Setting of parameters to start the simulation

8

B. Teriya and S. Gupta

Fig. 6 Opening of main switch after fault

PS 0 = 14 V, Load current = 3 A PS 1 = 12.5 V, Ignition = ON Vehicle speed = 2 km per second Distance travelled = 333,333 km Date = 03-03-2022 (dd/mm/yy) Time = 03-03-03 (h/min/s) These numbers are utilized to satisfy the HiL simulation precondition stages in order to use the diagnostics services to check the data that has been saved in the ECU. All the things that will be tested are simulated during the simulation process. Now the current pulse is given in the ECU node to cause a failure in the circuit’s main switch (open the switch) for a specific amount of time in order to generate the failure in the ECU. If the main switch of the ECU opens the red warning lamp (kombi) status went to 2. It suggests that an ECU must be diagnosed and that there is a problem with the vehicle. Now we can check the history data for driver warnings using UDS service id (UDS id—22). Check the saved data using the unified diagnosis service id (UDS) after a failure; Fig. 6 shows the kombi status 2 for warning, and the main switch status 6 which indicate that the main switch is opened.

4 Result The outcome of real-time simulation is compiled in a CANOe report that includes information of all the simulated values and the cause of failures. The stored data actual size is 2003 byte where first three byte indicate the positive response and service id. The reason id 2 shows an overcurrent condition in the ECU. Figure 7 shows all the data related to the failures, and this data is stored in NVM for the further analysis.

Fig. 7 CANOe report for driver warning with reason id

Hardware-In-Loop Test for Electronic Control Unit

9

5 Discussion HiL innovation and HiL simulation has quickly evolved into the most potent and common method for desktop ECU testing. Today, sophisticated real-time models, quick processors, and specialized HiL I/O are readily available on the open market. Engine control, automated gearbox, vehicle dynamics control, and various other vehicle modules are included in the HiL scope. The HiL system described in this paper runs driver warning test case on ECU node. Additionally, it offers the ability for diagnostics between the tester and the ECU.

6 Conclusion In this paper the Driver warning is checked by triggering the short circuit in the ECU using vector CANOe and HiL Environment. In Vector CANOe, an input panel is present, and the connected ECU can access the node attributes and properly transmit CAN messages to nodes with node attributes, including all types of CAN signals like vehicle speed, distance travelled, date, and time. The driver warning saved data is 2000 bytes in size and contains all the simulate values with reason id of the event to identify the cause for the main switch operation.

References 1. Lu B, Wu X, Figueroa H, Monti A (2007) A low-cost real-time hardware-in-the-loop testing approach of power electronics controls. IEEE Trans Industr Electron 54(2):919–931. https:// doi.org/10.1109/TIE.2007.892253 2. Omar Faruque MO, Dinavahi V (2010) Hardware-in-the-loop simulation of power electronic systems using adaptive discretization. IEEE Trans Ind Electron 57(4):1146–1158. https://doi. org/10.1109/TIE.2009.2036647 3. Mouzakitis A, Nayak A, Puthiyapurayil S (2010) Automated fault diagnostics testing for automotive electronic control units deploying hardware-in-the-loop. In: UKACC international conference on control 2010, pp 1–6. https://doi.org/10.1049/ic.2010.0377 4. Taixiong Z, Yage Z (2012) Development of hardware-in-loop and virtual reality co-simulation platform for automotive anti-lock braking system. In: IET International Conference on Information Science and Control Engineering 2012 (ICISCE 2012), pp 1–6. https://doi.org/10.1049/ cp.2012.2278 5. Teši´c V, Pap M, Ili´c V, Nedeljkovi´c M (2015) Automated testing of electronic control units in a hardware-in-the-loop simulation environment. In: 2015 23rd Telecommunications Forum Telfor (TELFOR), pp 1012–1015. https://doi.org/10.1109/TELFOR.2015.7377637 6. Kwak S-k, Lee S-J, Jung J-H, Jeon H-J (2017) Control hardware-in-the-loop simulation testbed of power management system for ship’s power system applications. In: 2017 IEEE 3rd International Future Energy Electronics Conference and ECCE Asia (IFEEC 2017 - ECCE Asia), pp 1241–1245. https://doi.org/10.1109/IFEEC.2017.7992220

10

B. Teriya and S. Gupta

7. Kharche P, Murali M, Khot G (2018) UDS implementation for ECU I/O testing. In: 2018 3rd IEEE International Conference on Intelligent Transportation Engineering (ICITE), pp 137–140. https://doi.org/10.1109/ICITE.2018.8492642 8. Isermann R, Schaffnit J, Sinsel S (1999) Hardware-in-the-loop simulation for the design and testing of engine-control systems, Control Eng Pract 7(5). ISSN 0967-0661 9. Kluge T, Allen J, Dhaliwal A (2005) Advantages and challenges of closed-loop HIL testing for commercial and off-highway vehicles. No. 2009-01-2841. SAE technical paper, 2009.Köhl, Susanne, and Dirk Jegminat. How to do hardware-in-the-loop simulation right. No. 2005-011657 10. Shruthi TS, Naz Mufeeda KH (2016) Using VT system for automated testing of ECU. Int Organ Sci Res J Comput Eng 18(3) 11. Espfors N (2018) CANoe-simulink integration of vehicle model in existing test environment. CODEN: LUTEDX/TEIE 12. Ul Alam MdS et al (2019)Securing vehicle ECU communications and stored data. In: ICC 2019–2019 IEEE International Conference on Communications (ICC). IEEE 13. Deshpande V, George L, Badis H (2019) SaFe: a blockchain and secure element based framework for safeguarding smart vehicles. In: 2019 12th IFIP Wireless and Mobile Networking Conference (WMNC), Paris, France, pp 181–188. https://doi.org/10.23919/WMNC.2019.888 1408

High Efficient Single Phase Active LED Driver with Reduced Power Processing Ramesh Babu Pallapati, Ramulu Chinthamalla, Sindhu Vutturi, D. V. K. Abhinay, and Chandra Kiran Kumba

Abstract This paper presents a single-stage active LED driver circuit with power factor correction, reduced power processing, and constant current output. This paper tries to achieve the advantages of many two-stage driver solutions, which offer power factor correction and constant output current regulation, with a single-stage approach. Input power distribution can be done without extra switches. With a simple ripple cancellation control logic, DC power and AC ripple power can be effectively matched, allowing electrolytic capacitors to be replaced with long-life film capacitors for increased LED driver lifespan. Reduced power processing design ensures that only a part of the input power is processed twice rather than the entire amount as in the case of two-stage driver circuits, thereby reducing the cost and size of the circuit. A single input, two-output power factor correction converter configuration has been discussed in this paper. On PSIM, a 30W simulation model is built and the results are validated. Keywords LED driver · Power factor · DC-DC converter · Reduced power processing · Ripple power

R. B. Pallapati (B) · R. Chinthamalla · S. Vutturi · D. V. K. Abhinay · C. K. Kumba Department of Electrical Engineering, National Institute of Technology Warangal, Warangal 506004, Telangana, India e-mail: [email protected] R. Chinthamalla e-mail: [email protected] S. Vutturi e-mail: [email protected] D. V. K. Abhinay e-mail: [email protected] C. K. Kumba e-mail: [email protected] © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 K. Murari et al. (eds.), Recent Advances in Power Electronics and Drives, Lecture Notes in Electrical Engineering 1139, https://doi.org/10.1007/978-981-99-9439-7_2

11

12

R. B. Pallapati et al.

1 Introduction Light-emitting diodes (LEDs) have become very popular in the past few decades because of their long life span, high efficacy, low cost, compact size, and ability to deliver constant current output (COC). These light-emitting sources have replaced conventional lightning devices in many applications, ranging from household to industrial areas [1]. Their usage is also found in smart phones, LCD displays, street lights, etc. Some research shows that LEDs can glow for 50,000–100,000 h while maintaining 70% of their initial light output, which is almost 5 years. Since light output is highly dependent on the input DC current fed to it, they need a currentregulating circuit. And also, a rectification circuit is required to convert the sinusoidal voltage to DC voltage when operated with the line supply. From this, it has been concluded that LEDs must have a driver circuit providing constant current regulation. These driver circuits can consist of active or passive components or a non-linear regulator like a switched-mode power supply. Further limitations imposed on the driver circuit by connecting to the line voltage are power factor correction (PFC) with low input harmonics and rectification as specified by IEC 61000-3-2 standards [2]. As LEDs are DC loads and are fed from an AC supply, there is an imbalance between input AC power and output DC power [3, 4]. To compensate for the power imbalance, a storage element like a large inductor or capacitor is incorporated [5]. The most common approach is to use bulk electrolytic capacitors, which filter out the ripple in the voltage and are designed with respect to the mains frequency and load supplied. But the use of electrolytic capacitors can deteriorate LEDs life span because, through ageing, capacitors equivalent series resistance increases and causes self-heating of the material [6]. Even a high-quality electrolytic capacitor has an overall life time of 10 kh at operating temperatures [7]. Consequently, designing driver circuits without electrolytic capacitors has gained much importance. At present, optimising circuit topologies and enhancing control methods are the only other options available except electrolytic capacitors [8, 9]. Various single stage circuits are proposed to achieve unity power factor, constant output current, and low input harmonics with greater efficiency. For many decades, researchers have been trying to come up with different LED driver solutions to meet the LED requirements. Various solutions, such as singlestage, multiple-stage drivers have been proposed and implemented. It has been observed that single-stage drivers are easy to work on as they are of low cost, have a low component count, and are easy to install, especially where there is a space constraint [10]. But single-stage converter topologies cannot be optimised to achieve unity power factor, long life span, and low output ripple altogether. Later, multistage drivers have been proposed that are designed to perform all the above tasks. Multi stage drivers can be independent or integrated. The overall efficiency of these drivers is dependent on the individual efficiencies of the converters employed. As it involves multiple stages, each converter can be designed to perform multiple requirements together. Independent multistage drivers are able to reduce the bus capacitance by allowing a high PFC bus voltage. Figure 1a shows a two-stage cascaded circuit,

High Efficient Single Phase Active LED Driver with Reduced Power Processing

13

Fig. 1 a Cascaded driver configuration b bidirectional power processing driver configuration c unidirectional power processing driver configuration d driver with two output PFC

where stage 1 is designed to perform PFC and stage 2 is for current regulation [11]. A buffer capacitor buffers the ripple power. But this architecture has low efficiency as power is reprocessed at each stage. Besides that, due to the increase in number of components, the driver is expensive and requires a dedicated control circuit for each converter, which could increase switching losses. Another architecture with a bidirectional converter is proposed to increase the efficiency, as illustrated in Fig. 1b. This circuit employs a PFC stage and a bidirectional DC-DC converter placed parallel to the output. This bidirectional converter produces the compensating power to reduce double line frequency ripple [12, 13]. This ripple power is almost 32% of total power,

14

R. B. Pallapati et al.

Fig. 2 Proposed topology diagram with two output PFC and DC-DC regulation

therefore decreasing the power to be processed and increasing efficiency. Another driver circuit having a unidirectional converter is proposed in [14–16], as shown in Fig. 1c. Here, the ripple power is only processed once, making it more efficient than a bidirectional scheme. However, the use of switches and diodes for power distribution incurs additional losses. All the above power processing schemes use two stages for power processing, leading to the use of an extra storage element. Another power processing scheme using a unidirectional converter was proposed earlier, as shown in Fig. 1d, which has two output ports at the PFC stage. Many schemes were designed using inductances for power distribution. However, analogue controllers are required to reprocess power. There are several reduced power processing-stage driver configurations addressed in the literature [17, 18]. This paper proposes a single-stage topology with two converters integrated to achieve a unity power factor, as shown in Fig. 2. The proposed topology consists of two output PFC stage and a DC-DC stage. The distribution of output PFC power is carried out using series capacitors, which will be explained in the following sections. This paper discusses a single-stage driver solution where a buffer capacitor is connected in series with one of the converters. This paper is organised as follows: The principles of operation and operating modes are explained in Sect. 2. Section 3 discusses the design and control mechanisms for the considered converter configuration. In Sect. 4, results from the simulation are discussed, and Sect. 5 concludes the paper.

2 Principle of Operation Considered topologies for PFC and power control using fly-back and buck-boost converters are shown in Fig. 3. It has an input port, which is an AC supply, a diode bridge rectifier, which connects the input to a fly-back converter, which acts as a PFC circuit, which is connected in series to the source..Cdc and.Co are two output channels

High Efficient Single Phase Active LED Driver with Reduced Power Processing

15

Fig. 3 Proposed topology of flyback and buck-boost converters

of the PFC stage. Buck-boost converter acts as a power control converter, processing energy from the DC bus capacitor to the load. As per this configuration, total input power is processed by the fly-back converter, which in turn is split between the buffer capacitor and the output capacitor. Part of the power is directly connected to the load, whereas the other part is further processed by a buck-boost converter for constant output current regulation and then supplied to the load. In this design, the entire power is processed once by the PFC stage, and only some part of the power is reprocessed by the PC converter. Overall, a maximum of 50% power is processed twice, which improves efficiency when compared to a cascaded configuration. In order to avoid the complexity of the hardware system for the division of power to the load and DC-DC stage, two capacitors are connected in series at the output of PFC converter, which distributes the power to be processed. Capacitor .Cdc acts as the source for the buck-boost converter, performing the DC-DC regulation, and at the same time, it is also part of the output capacitor of the fly-back converter, whereas capacitor .Co acts as an output capacitor for a buck-boost converter and another output of a PFC converter. The amount of power to be shared by two capacitors is to be designed accordingly to meet the efficiency requirements. To improve efficiency, reduce the reprocessed power through the buck-boost converter, as this power is processed twice. So, the power transfer through this converter must be kept as low as possible. But at the same time, it must supply the losses occurring during the DC-DC regulation, and the sum of the output power of both converters must nullify the AC component, so a constant DC power is expected. Keeping all the limitations in consideration, it is suggested to split the power in half across capacitors. That is, half of the output power of the fly-back converter is directly fed to the load through .Co , and the other 50% is fed to the buck-boost converter. The important task of the LED driver is to have constant DC output power to be given to the load. This is achieved using DC-DC regulation. Fly-back converter develops current .i p f c (t) and the other converter develops current .i pc (t). These two currents, when added across the load, produce a constant current without any ripple.

16

R. B. Pallapati et al.

The fly-back output power has the same wave shape as its input power and varies at double frequency as the power factor is nearly equal to unity. Out of which some part is directly fed to load, let’s say . pd (t) , and other part . pdc (t) is fed to buck-boost converter. The addition of the power output of the DC/DC converter. pc (t) (cancelling power) and direct power gives the overall load power, which is nearly constant.

2.1 Operating Modes and Waveforms Based on the operating principle and possible converter configurations, a topology using a fly-back converter as a PFC and a bust-boost converter as a DC-DC converter is chosen in DCM mode. There are four operating modes, as shown in Fig. 4, along with their waveforms given in Fig. 5. Mode I (.t0 - .t1 ): In this mode, both switches on both converters are turned on at .t0 as shown in the Fig. 4a. The primary winding inductance of a fly-back converter gets charged by the input voltage. The . L p c is charged by DC bus voltage. .Co supplies to the load. This mode ends when the switch . S2 is opened. Mode II (.t1 - .t2 ): Current flows through the primary winding inductance of the fly-back converter . L m1 p f c continues charging. Stored energy in . L pc is fed to .Co and to the load through diode . Db as shown in the Fig. 4b. Switch . S1 is turned off at . D1 Ts and the peak current through . L m1 p f c that is .i L m1 peak (t) in this mode can be estimated as follows: Vm | sin ωt|D1 .i inpk = (1) L m1 p f c f sw where . D1 is the duty cycle of . S1 and . f sw is the switching frequency when . S1 is turned off, Input current and primary inductor current are equal to “0”. Therefore, the average input current during a switching cycle is given as: i

. inavg

=

Vm | sin ωt|D12 2L m1 p f c f sw

(2)

From this equation, Input current and input voltage are proportional to each other. High power factor is easily achieved with constant duty cycle. Mode III (.t2 - .t3 ): As shown in Fig. 4(c), in this mode both switches are in the off state, and stored energy in the secondary of fly-back is discharged through diode . Da . Both capacitors go through the charging phase. And the inductor . L pc continues discharging energy to the load. Mode IV (.t3 - .Ts ): In this mode as shown in the Fig. 4d, both inductors are completely discharged. .Cdc has no path to discharge, whereas .Co starts delivering energy to the load.

High Efficient Single Phase Active LED Driver with Reduced Power Processing

17

Fig. 4 Operating modes of considered topology

2.2 Analysis of Power Processing The output power of the PFC fly-back converter is distributed between the load and the Buck-Boost converter. The overall efficiency of the driver is dependent on the amount of reprocessed power. Distribution has an effect on achieving constant output power. If . pop f c (t) is fly-back output power, .Co and .Cdc are two capacitor channels for distribution. Let .Vo and .Vdc be the output voltage and DC bus voltage, respectively, and power is shared in the ratio p and (1-p) across the DC-DC converter and load,

18

R. B. Pallapati et al.

Fig. 5 Wave forms of driver circuit

respectively. Then, .

p=

Vdc Vo + Vdc

(3)

Similarly, where . pdc (t) is power fed to the buck-boost and . pd (t) is power sent to the load, it is required to lower the reprocessed power through the buck-boost converter to enhance efficiency. As a result, the power split via buck-boost must be kept as low as feasible. However, it must also supply the losses that occur during the DCDC conversion. The sum of the output power of both converters must cancel out the ripple component, and a constant DC power is expected as shown in the Fig. 6. Based on the above constraints, half of the output power of the fly-back converter is fed directly to the load via .Co , while the other half is fed to the buck-boost converter. Therefore, if “p” is the conversion ratio defined, where, .

p=

pdc (t) pdc (t) + pd

(4)

Now p must be close to 0.5. Reprocessing power should be greater than the power directly fed to the load to balance the losses in regulation.

High Efficient Single Phase Active LED Driver with Reduced Power Processing

19

Fig. 6 Power flow diagram in line period

.

pdc (t) > pd (t)

(5)

The PFC fly-back converter’s voltage gain is .V f b. .

Vfb =

Vo + Vdc Vm | sin ωt|

(6)

The PC buck boost converter’s voltage gain is .Vb /b. .

Vb/b =

Vo Vdc

(7)

The driver circuit’s voltage gain is .Vd . .

Vd =

V f b Vb/b 1 + Vb/b

(8)

As a function of voltage gain, “p” is expressed as .

p=

1 1 + Vb/b

(9)

Based on the value of p, PFC fly-back converter output can be divided into two parts. The p times power is stored by DC bus capacitor, and the (1-p) times input power is transmitted to the LED load. The driver’s total .η can be obtained as: η = pη f b ηb/b + (1 − p)η f b

.

(10)

20

R. B. Pallapati et al.

substituting (9) in (10), η=

.

1 1 η f b ηb/b + (1 − )η f b1 1 + Vb/b 1 + Vb/b η = ηfb

.

ηb/b + V f b2 1 + Vb/b

(11)

(12)

where .η f b is the PFC fly-back converter’s efficiency, and .ηb/b is the PC buck boost converter’s efficiency. According to (12), the proposed method is more efficient than the cascaded method, i.e. .η f b ηb/b . The output power of a DC-DC converter that cancels the direct power is denoted as the cancelling power . pc (t), which is equal to .

pc (t) = Po − pd (t)

(13)

where . Po is the LED load power.

3 Control Logic 3.1 Control Scheme Switching of converters is done using PID controllers, as shown in Fig. 7. The average DC capacitor voltage must be constant. Fly-back converter switching operation is controlled by comparing the voltage across the DC bus capacitor with a reference value. The error signal generated is given to the PI controller, which, when compared with the carrier frequency signal, produces the duty cycle . D1 of the PFC converter to control switch. S1 . Similarly, buck-boost converter switching is controlled by comparing load current with the required output current as a reference value, as this converter

Fig. 7 Design of control loop for a fly-back converter and b buck-boost converter

High Efficient Single Phase Active LED Driver with Reduced Power Processing

21

is designed for constant output current regulation. The PI controller receives an error signal and then generates the buck-boost converter’s duty cycle,. D2 . PI control values are chosen accordingly.

4 Simulation Results The considered topology is tested for 30 W output power of LED operated at the following specifications shown in Table 1. Figure 8 shows the input voltage .vin (t) and current .i ac (t). It is noted that the input power factor of 0.99 is achieved with input current harmonics of 9%, which satisfy the IEC 6100-3-2 standards. The input voltage, DC bus capacitor voltage, and

Table 1 30 W prototype design parameters Parameter Input voltage .vin (t) Supply frequency, f PFC inductor, . L mp f c PC inductor, . L pc Output capacitor, .Co Output capacitor, .Co DC bus capacitor, .Cdc Output current, . Io Output voltage, .Vo Switching frequency, . f sw

Specification 110 V RMS AC 50 Hz 300 .µH 150 .µH 20 .µF 20 .µF 20 .µF 0.33 A 90 V 50 kHz

Fig. 8 Input AC voltage .vin (t) waveform, AC current .i in (t) waveform

22

R. B. Pallapati et al.

Fig. 9 Input AC voltage .vin (t), Dc bus voltage .vdc (t), and output DC voltage .vo (t)

Fig. 10 Over view of PFC transformer current .i Lm1 p f c (t), and PC inductor current .i L pc (t)

output voltage are shown in Fig. 9. The overview of PFC inductor current and PC inductor current is shown in Fig. 10. The primary current .i Lm1 p f c (t) and secondary current .i Lm2 p f c (t) of PFC inductor are shown in Fig. 11. The current .i L pc (t) of the PC inductor is shown in Fig. 12. The voltage across the switch . S1 , .vds1 (t) and current

High Efficient Single Phase Active LED Driver with Reduced Power Processing

23

Fig. 11 Primary winding current of PFC transformer .i Lm1 p f c (t), and secondary current of PFC transformer .i Lm2 p f c (t)

Fig. 12 PC inductor current .i L pc (t)

flowing through the switch . S1 , .i ds1 (t) are shown in Fig. 13. It is observed from the waveform that zero-voltage switching is achieved. The voltage across the switch . S2 , .vds2 (t) and current flowing through the switch . S2 , .i ds2 (t) are shown in Fig. 14. It is observed from the waveform that the zero voltage switching is achieved. The output voltage .vo (t), and current .i o (t) are shown in Fig. 15. The output current is constant with a peak to peak ripple of 1.84%. The simulation results showed that, at full power, the driver achieved a peak efficiency of 98%.

24

R. B. Pallapati et al.

Fig. 13 Voltage across switch . S1 during turn off .vds1 (t), and current flowing through the switch during turn on .i ds1 (t)

. S1

Fig. 14 Voltage across switch . S2 during turn off .vds2 (t), and current flowing through the switch during turn on .i ds2 (t)

. S2

5 Conclusion An active single-stage LED driver circuit is proposed in this paper. It has the advantages of improved efficiency and low size over single-stage approaches. A reduced power processing scheme improved the overall efficiency. Because only some part of the power is processed twice by the regulation converter and the other part is directly fed to the load, the complexity of designing a converter for power division is eliminated by employing two series capacitors, thereby reducing the switching

High Efficient Single Phase Active LED Driver with Reduced Power Processing

25

Fig. 15 Output DC voltage .vdc (t), and output DC current .i o (t)

losses. The size of the entire converter is small, as the DC/DC converter processes only 50% of power. A 30W PSIM simulation was built and tested. The driver had a peak efficiency of 98% and a power factor of 0.99 at full power.

References 1. Wang Y, Alonso JM, Ruan X (2017) A review of LED drivers and related technologies. IEEE Trans Ind Electron 64(7):5754–5765. https://doi.org/10.1109/TIE.2017.2677335 2. Li S, Tan S-C, Lee CK, Waffenschmidt E, Hui SY, Tse CK (2016) A survey, classification, and critical review of light-emitting diode drivers. IEEE Trans Power Electron 31(2):1503–1516. https://doi.org/10.1109/TPEL.2015.2417563 3. Tse CK, Chow MHL, Cheung MKH (2001) A family of PFC voltage regulator configurations with reduced redundant power processing. IEEE Trans Power Electron 16(6):794–802. https:// doi.org/10.1109/63.974377 4. Garcia O, Cobos JA, Alou P, Prieto R, Uceda J, Ollero S (1997) A new family of single stage AC/DC power factor correction converters with fast output voltage regulation. In: PESC97: Record 28th annual IEEE power electronics specialists conference. Formerly power conditioning specialists conference 1970–71. Power processing and electronic specialists conference 1972, vol 1. St. Louis, MO, USA, pp 536–542. https://doi.org/10.1109/PESC.1997.616774 5. Camponogara D, Ferreira GF, Campos A, Dalla Costa MA, Garcia J (2013) Offline LED driver for street lighting with an optimized cascade structure. IEEE Trans Ind Appl 49(6):2437–2443. https://doi.org/10.1109/TIA.2013.2263631 6. Almeida PS, Camponogara D, Dalla Costa M, Braga H, Alonso JM (2015) Matching LED and driver life spans: a review of different techniques. IEEE Ind Electron Mag 9(2):36–47. https:// doi.org/10.1109/MIE.2014.2352861 7. Castro I, Vazquez A, Arias M, Lamar DG, Hernando MM, Sebastian J (2019) A review on flicker-free AC-DC LED drivers for single-phase and three-phase AC power grids. IEEE Trans Power Electron 34(10):10035–10057. https://doi.org/10.1109/TPEL.2018.2890716 8. Shan Z, Chen X, Jatskevich J, Tse CK (2019) AC-DC LED driver with an additional active rectifier and a unidirectional auxiliary circuit for AC power ripple isolation. IEEE Trans Power Electron 34(1):685–699. https://doi.org/10.1109/TPEL.2018.2812223

26

R. B. Pallapati et al.

9. Fang P, Sheng B, Webb S, Zhang Y, Liu Y-F (2019) LED driver achieves electrolytic capacitor-less and flicker-free operation with an energy buffer unit. IEEE Trans Power Electron 34(7):6777–6793. https://doi.org/10.1109/TPEL.2018.2876337 10. Pinto RA, Cosetin MR, Campos A, Dalla Costa MA, do Prado RN (2012) Compact emergency lamp using power LEDs. IEEE Trans Ind Electron 59(4):1728–1738. https://doi.org/10.1109/ TIE.2011.2159352 11. Zhang F, Ni J, Yu Y (2013) High power factor AC-DC LED driver with film capacitors. IEEE Trans Power Electron 28(10):4831–4840. https://doi.org/10.1109/TPEL.2012.2233498 12. Qiu Y, Wang L, Wang H, Liu Y-F, Sen PC (2015) Bipolar ripple cancellation method to achieve single-stage electrolytic-capacitor-less high-power LED driver. IEEE J Emerg Sel Top Power Electron 3(3):698–713. https://doi.org/10.1109/JESTPE.2015.2433918 13. Wang S, Ruan X, Yao K, Tan S-C, Yang Y, Ye Z (2012) A flicker-free electrolytic capacitor-less AC-DC LED driver. IEEE Trans Power Electron 27(11):4540–4548. https://doi.org/10.1109/ TPEL.2011.2180026 14. Wu H, Wong S-C, Tse CK, Hui SYR, Chen Q (2018) Single-phase LED drivers with minimal power processing, constant output current, input power factor correction, and without electrolytic capacitor. IEEE Trans Power Electron 33(7):6159–6170. https://doi.org/10.1109/ TPEL.2017.2739125 15. Pallapati RB, Chinthamalla R, Guddanti LP (2021) Single-phase active LED driver with common cathode DC-DC buck cell with constant output current without electrolytic capacitor. In: National power electronics conference (NPEC). Bhubaneswar, India, pp 01–06. https://doi. org/10.1109/NPEC52100.2021.9672518 16. Pallapati RB, Chinthamalla R, Verma V, Karampuri R (2022) Electrolytic capacitor-less minimal power processing single-phase active LED driver with constant output current. In: IEEE international conference on power electronics, drives and energy systems (PEDES), Jaipur, India, pp 1–6. https://doi.org/10.1109/PEDES56012.2022.10080030 17. Pallapati RB, Chinthamalla R (2023) Electrolytic capacitor-less reduced power processing single-phase LED driver with power decoupling using split capacitor. Int J Circ Theor Appl:1– 28. https://doi.org/10.1002/cta.3585 18. Pallapati RB, Chinthamalla R (2023) Reduced power processing LED driver with constant output current. IEEE J. Emerg. Sel. Top. Power Electron. https://doi.org/10.1109/JESTPE. 2023.3263632

Implementation of Model Predictive Current Control Technique for Single Phase Four Level Grid Connected Asghar Inverter Dipty Chandrakar , Bhagwan K. Murthy , and Aratipamula Bhanuchandar

Abstract This paper presents a Model Predictive Current Control (MPCC) technique for 1-phase 4-level Grid Connected Asghar Inverter (GC-AI) and basically it consists of four unidirectional switches, two discrete diodes, four capacitors, and one dc source. It offers self-balancing of capacitors, boosting ability, and well suitable for photovoltaic applications. In grid connected operation, to inject the grid current conventional dq-frame current control technique requires more number of transformation blocks, complicated tuning proportional-integral parameters, modulation stage and finally it produces sluggish transient response. To curtail the complexity of control, a simple MPCC technique with needless modulator stage has been implemented without consideration of weighting factors, and it also provides an excellent dynamic performance. The objective of tracking reference current along with balancing of capacitor voltages have been explained vividly using predictive algorithm in both RL-load and grid-connected cases through PLECS platform. Keywords Model predictive current control · Asghar inverter · Dq-frame current control · Modulation stage · Grid connected inverter

1 Introduction In the power electronics technology, the Reduced Device Count (RDC) Multilevel Inverters (MLI) are commonly employed in solar, wind energy applications. Generally MLI creates staircase waveform that mimic the sinusoidal wave [1]. In literature, D. Chandrakar (B) · B. K. Murthy · A. Bhanuchandar Electrical Engineering Department, NIT Warangal, Hanamkonda, Telangana, India e-mail: [email protected] B. K. Murthy e-mail: [email protected] A. Bhanuchandar e-mail: [email protected] © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 K. Murari et al. (eds.), Recent Advances in Power Electronics and Drives, Lecture Notes in Electrical Engineering 1139, https://doi.org/10.1007/978-981-99-9439-7_3

27

28

D. Chandrakar et al.

there are three types of conventional MLIs that have been existed which are Neutral point clamped (NPC), Flying Capacitor (FC), and Cascaded H-Bridge (CHB). In order to determine the size of the inverter, it is typically important to consider the number of switches, gate drivers, discrete diodes, capacitors, DC sources, and Total Standing Voltage (TSV). Generally, switching device costs are usually set by TSV. For producing 4-level output voltage, the NPC requires more number of discrete diodes and the FC requires more number of floating capacitors. In FC-MLI, the capacitors must be pre-charged to operate in traction applications [2]. In conventional MLIs, CHB has more modular structure but it needs more isolated DC sources [3, 4]. The topology [5] produces 4-level output voltage with one DC source but it requires more number of power electronics switches and provides no voltage gain. The topology [6] needs separate backend H-bridge in respective three phase operation thereby the TSV become more. The topology [7] is based on the switched capacitors (SC) and produces 4-evels in output with single DC source. It provides voltage boosting and self-voltage balance but TSV is high. Four levels are produced by the topology [8] using only one DC source and three DC link capacitors. The capacitor voltages in this configuration are balanced but provides unity voltage gain. In topology [9], the basic unit generates five level output and by combining number of such units it is possible to generate more number of levels but back-end full H-Bridge is required for negative level production thereby TSV value is very high. The topology [10] produces 13-levels with single DC source and 12 switches. It offers six times boosting potential and self-balancing of SCs but TSV is 36V dc . The topology [11] produces nine levels with single DC source and two SCs. It provides two time boosting ability and capacitors are self-balanced but TSV is high which is 20V dc . The AI topology [12, 13] consists of four unidirectional switches, two diodes, one DC source, and four capacitors. They produce four levels in the output, provides more than unity voltage gain and self-balancing of capacitors. In literature [10– 12], for grid connected system authors are utilized conventional dq-frame current control technique along with PWM modulation. But this control technique requires more number of transformation blocks, complicated tuning proportional-integral parameters, modulation stage and finally it produces sluggish transient response. To diminish the complexity of control, a simple MPCC technique with needless modulator has been implemented without consideration of weighting factors. The main objective of this paper is track the reference current along with balancing of capacitor voltages have been explained clearly using MPCC technique in both standalone and Grid-Connected Cases (GCC) for AI topology. The employment of a MPCC technique improves transient response and grid current regulation in accordance with reference current. In this paper, Sect. 2 describes brief operation of Asghar Inverter, Sect. 3 describes implementation of MPCC, Sect. 4 represents simulation results, Sect. 5 represents comparative study between dq-frame and MPCC control technique then finally, and Sect. 6 represents conclusions.

Implementation of Model Predictive Current Control Technique …

29

2 Brief Description and Operation of Asghar Inverter (AI) The Asghar Inverter-AI [12] synthesis staircase four level waveform in the output and provides boosting factor as 1.5. AI consist one DC source, four unidirectional switches, two diodes, and four capacitors from which two are dc link capacitors (C dc1 , C dc2 ) and other two are switched capacitors (C 1 , C 2 ). Schematic of AI is shown in Fig. 1. Here, switches (S 1 , S 2 ) and (S 3 , S 4 ) are of complementary nature. Switching operation of AI is divided into four modes which are listed in Table 1. In this, ‘1’ represents ON state of Switch, ‘0’ represents OFF state of switch, ‘C’ represents charging of capacitor, and ‘D’ represents discharging of capacitor. Capacitors are self-balanced by series–parallel technique with the dc source and eliminates sensors requirement. In this topology, boosting factor is 1.5 with single source, so this topology can be used for low voltage application like PV application etc. Normally, TSV is the sum of maximum standing voltage of all the switches. The standing voltage of (S 1 , S 2 ) are 2 × V dc , (S 3 , S 4 ) are 2 × 2V dc , and standing voltage of (D1 , D2 ) are 2 × V dc . So TSV becomes 8V dc and finally per unit TSV is 5.33 pu. Due to the continuous charging and discharging of SC, high inrush current is present in SC based MLIs but in this topology, inrush current is low by applying MPCC technique and that small inrush current further can be reduced by inserting very small value of inductor (in terms of µH) in series with two diodes. Fig. 1 Single-phase 4-level-grid connected Asghar inverter

D1 Cdc1

S1

C1

S3

Vdc

R S2

C2

S4

D2

Table 1 Switching table

S. No

[S 1 , S 2 , S 3 , S 4 ]

L

Grid

Cdc2

C1, C2

Level output

1

[1 0 1 0]

D, C

1.5V dc

2

[0 1 1 0]

C, NE

0.5V dc

3

[1 0 0 1]

NE, C

−1.5V dc

4

[0 1 0 1]

C, D

−0.5V dc

30

D. Chandrakar et al.

3 Implementation of MPCC Technique-Standalone (RL-Load) and Grid Connected Cases (GCC) MPCC has number of benefits including multivariable control, applicability to a variety of systems, simple constraint treatment, dead time compensation, and easy of understanding and implementation even though the quality of the controller is directly influenced by the system model [14]. Moreover, once proper system modelling is done, MPCC is reliable and simple to implement. One of the best known uses of these controllers is to command the current in accordance with the reference current [15]. The MPCC predicts the behaviour of the system based on its current dynamics. In order to control the load current, the inverter and the load are modelled, and the next switching state is then anticipated based on the current output load current [16]. According to the cost function, the switching states are anticipated so that the difference between the reference value and the forecast value is as little as possible. The cost function describing the future behavior of the system taking into account references, upcoming actuations, and states [17, 18].

3.1 MPCC Technique: RL-Load Case The flowchart for standalone (RL-load) is same as Fig. 2 but only grid term ‘V g (k)’ term as zero. Here, io (k) represents the inverter output current, T s represents the sampling time, ‘R’ is the load resistance, ‘L’ is the inductor, and ‘g’ represents the cost function. In MPCC technique, firstly load and inverter are modelled then to control the load current, load model is should be discretized by “Forward Euler approximation” method. After modelling is completed, the load current is sensed then according to the load current, and next sampling interval current has been predicted. Then predicted current is subtracted with the reference current and result is stored. Now, the same process has been repeated for all the states and which state having low value of cost function has been selected as optimized state and applied to the inverter. By utilizing MPCC technique, it is possible to get an excellent transient response with an excellent tracking capability. However, only the problem with MPCC technique is that it is operating under variable switching frequency of operation inherently. But this problem also can eliminate easily by utilizing continuous control set optimization [19].

3.2 MPCC Technique: GCC Whenever inverter is connected to the grid, some specifications should follow that is called as “grid-code” requirements. Respective MPCC flowchart for grid connected

Implementation of Model Predictive Current Control Technique …

31

Fig. 2 Flowchart: MPCC technique

mode is shown in Fig. 2. Here, V g represents grid voltage which is completely sinusoidal with frequency of 50 Hz. By using flowchart, firstly grid current is sensed, then according to sensed current next sampling interval current has been predicted using discrete load model equation. Next, the reference current has been subtracted to the predicted grid current and result is stored. This process is repeated for each switching state and which switching state having low value of cost function is selected as optimum switching state. Above process comes under inner loop, then after selection of optimum state actuation is applied to the inverter and this process shown in outer loop. In the sampling interval, all of these loop process has been finished. Generally, as number of switching states will increases then computation for selection of optimize state will also be increase. In AI, only four switching states are present then computational burden becomes very low while using MPCC technique.

32 Table 2 Parameters for simulation: RL-load case

D. Chandrakar et al.

S. No

Specifications

Value

1

V dc

266.66 V

2

Boosting Factor (BF)

1.5

3

R

100 Ω

4

L

80 mH

5

C 1 , C 2 , C dc1 , C dc2

2200 µF

6

Reference peak currents

3.5 A and 1.5 A

4 Simulation Results-MPCC Technique 4.1 RL-Load Case: Simulation Results The respective simulation parameters with consideration of RL-load is listed in Table 2. To get peak value of 400 V in the output of AI, the value of V dc has taken 266.66 V. MPCC control scheme has been used to the AI. Simulation results for RL load with step change of reference peak value of current from 3.5 A to 1.5 A at t = 0.12 s has been shown in Fig. 3. In Fig. 3a red colour represents the actual output current and yellow colour represents the reference current. Figure 3b shows selfbalancing characteristics of SCs, and it is balanced almost at 266.66 V. By changing the reference current, inverter is producing four levels in the output with changed width of levels which is shown in Fig. 3c. In this control scheme, automatically output voltage level has been produced according to the peak reference current. Figure 3d, e shows capacitor current, and Fig. 3f shows input current of the inverter. Figure 4 shows the zoomed view of reference and actual currents. From results conclusion can be drawn that actual current is following the trajectory of reference current, inrush current is also low, SCs are self-balanced, and transient response is also excellent.

4.2 Grid Connected Case- Simulation Results Table 3 displays the simulation parameters taking the grid into account. MPCC technique has been used with step change of Power Factor (PF). Simulation results for step change of PF from unity to 0.9 lagging at t = 0.06 s is shown in Fig. 5. In Fig. 5a and Fig. 6a green colour shows grid voltage, red colour shows actual grid current, and yellow colour shows reference current. Peak value of the reference current is considered as 10A and in this, outside gain block value 10 is used for visibility purpose then peak value become 100A. Self-balancing features of SCs are shown in Fig. 5b, and they are almost balanced at 266.66 V. Figure 5c shows output voltage with four levels for unity and lagging PF. Figure 6 shows simulation results for step change of PF from unity to 0.9 leading at t = 0.06 s. The self-balancing

Implementation of Model Predictive Current Control Technique … 4 2 0 -2 -4 267.0 266.8 266.6 266.4 266.2

33

(a) Reference(3.5A to 1.5A) and Actual Currents

(b) Vc1(Volts) and Vc2(Volts):Self-Balanced

(c) Inverter Output Voltage(V) 500 0 -500 (d) Idc(A) 20 0 (e)Ic1(A) 20 0 (f)Ic2(A) 20 0 0.06

0.08

0.10

0.12

0.14

Time(Seconds)

Fig. 3 Step change in reference current peak value: RL-load case

features of SCs are shown in Fig. 6b, here it is almost balanced at 266.66 V. Inverter output voltage is displayed in Fig. 6c with four levels for unity and leading PF. The harmonic spectrum of the grid current and inverter output voltage in GCC is displayed in Fig. 7. The maximum value of Inverter Output Voltage (IOV) at fundamental frequency is 326.1 V and THD is 50.47%. Similarly, 9.92 A is the maximum grid current at

34

D. Chandrakar et al.

Inverter Output Current(A)

3.6

3.4 Reference Current (A)

3.2

Actual Current (A)

3

Inverter Output Voltage(V)

400 200 0 -200 -400 Time (seconds)

Fig. 4 Zoomed view of reference and actual currents-RL load case

Table 3 Parameters for simulation-GCC

S. No

Specifications

Value

1

V dc

266.6 V

2

Grid voltage (peak)

325 V

3

Ts

10 µs

4

Grid frequency

50 Hz

5

Rgrid

0.01 Ω

6

L-filter

3 mH

7

Injected grid current (peak)

10 A

8

Capacitors

4700 µF

fundamental frequency has been obtained, and THD is 0.32% which meets IEEE1547 standards. From results, it is concluded that MPCC technique is working fine for all power factor and having very good transient response. Here, UPF means, injecting active power into the grid. Similarly, leading/lagging PF means reactive power support also has been obtained. Finally, it satisfies the grid code requirements.

Implementation of Model Predictive Current Control Technique …

35

(a) Vgrid(V) and Igrid(A)-Ref. and Actual Currents 400 200 0 -200 -400 (b) Vc1(V) and Vc2(V):Self-Balanced 268

267

266 (c) Inverter Output Voltage(V)

500

0

-500 0.00

0.02

0.04

0.06 Time(Seconds)

0.08

0.10

0.12

Fig. 5 Step change in PF from unity to 0.9 lagging-GCC results

5 Comparative Study Between Conventional dq-Frame Current Control and MPCC Techniques Table 4 shows comparison between conventional dq-frame current control and MPCC technique. Generally, in dq frame technique more transformations, PI controllers and modulation stage are needed while going to grid connection. While using PI controllers, transient response is not generally good and tuning also inherently makes complex to meet the desired value. However, only advantage of this dq-frame is it provides fixed switching operation but computational burden is more. In literature, many other linear control techniques are available but these are complex. To alleviate this complexity, a simple and intuitive MPCC has been used in this manuscript. It provides an excellent transient response without any weighting factors and modulator. In both standalone and GCC, the AI given an excellent results in dynamic operation. From the below table, it is concluded that MPCC is more advantageous than conventional current control technique. But, MPCC technique’s key issue is changeable switching frequency operation.

36

D. Chandrakar et al. 400

(a) Vgrid(V) and Igrid(A)-Ref. and Actual Currents

200 0 -200 -400 (b) Vc1(V) and Vc2(V):Self-Balanced 267.5 267.0 266.5

(c) Inverter Output Voltage(V)

500

0

-500 0.00

0.02

0.04

0.06 Time(Seconds)

0.10

0.08

0.12

(a) IOV-Volts

0.2 0.15

Fundamental (50Hz) = 326.1V , THD= 50.47% @MPCC

0.1 0.05 0

0

20 60 80 40 Harmonic order

100

Mag(% of Fundamental)

Mag(% of Fundamental)

Fig. 6 Step change in PF from unity to 0.9 leading-GCC results (b) Grid Current(A) 1 0.8 Fundamental (50Hz) = 9.92A , 0.6 THD= 0.32% @MPCC 0.4 0.2 0 0 10 20 30 40 50 60 70 80 90 100

Fig. 7 Harmonic spectrum of IOV and injected grid current–GCC

Harmonic order

Implementation of Model Predictive Current Control Technique …

37

Table 4 Comparative study between conventional dq-frame control and MPCC technique S. No

dq-frame current control

MPCC technique

1

Nature of controller is linear

Nature of controller is non linear

2

PI controller is used for error control

Cost function is used for error control

3

Implementation platform can be analog or digital

Implementation platform is digital only

4

PWM modulation technique is required

No modulation technique is required

5

‘F sw ’ is fixed in linear control

‘F sw ’ is variable in MPCC

6

Constraints inclusion is not possible

Constraints inclusion is possible

7

Linear control is complex due to presence of Simple and intuitive PI controller, PLL block, transformation block and gate pulse generating circuit

8

Transient performance is moderate

Transient performance is excellent

6 Conclusion In this paper, a MPCC technique has been applied to 1-phase 4-level AI and explained thoroughly both RL-load and GCC. A comparative study is also done between conventional current control technique and MPCC technique. Explanation of simulation results in RL-load case and GCC is done with step change of peak reference current and step change of power factors respectively. The SCs are self-balanced without use of the additional circuits, sensors, complicated control schemes, and capacitors having less ripple voltage. From results conclusion can be drawn that dynamic response of the system is excellent. The GC-system with MPCC technique is supporting all power factor cases, and actual current is well followed the trajectory of reference current. But, MPCC technique key issue is variable switching frequency of operation. This difficulty can be avoided by adopting continuous control set technique, which is the future scope of work.

References 1. Kumar KB, Bhanuchandar A, Supriya B, Vamshy D, Palle K, Sakile R (2021) A unipolar phase disposition pulse width modulation technique for an asymmetrical multilevel inverter topology. In: 2021 IEEE International Conference on Intelligent Systems, Smart and Green Technologies (ICISSGT), Visakhapatnam, India, pp 156–161. https://doi.org/10.1109/ICISSG T52025.2021.00041 2. Sakile R, Bhanuchandar A, Kumar KB, Vamshy D, Supriya B, Palle K (2021) A nearest level control scheme for reduced switch count cascaded half-bridge based multilevel DC link inverter topology. In: 2021 8th international conference on Signal Processing and Integrated Networks (SPIN), Noida, India, pp 287–292. https://doi.org/10.1109/SPIN52536.2021.9566056 3. Tammali K, Vangala SS, Vattikonda S, Palle K, Bhanuchandar A, Kumar KB (2022) An asymmetric source configuration of single-phase CHB-MLI topology with a generalized reducedcarrier modulation technique. In: 2022 International Conference on Intelligent Controller and

38

4.

5.

6.

7.

8.

9. 10.

11.

12.

13.

14.

15.

16.

17. 18.

19.

D. Chandrakar et al. Computing for Smart Power (ICICCSP), pp 1–5. https://doi.org/10.1109/ICICCSP53532.2022. 9862515 Palle K, Vattikonda S, Vangala SS, Tammali K, Bhanuchandar A, Mohandas A (2022) A generalized non-carrier modulation technique for an asymmetric source configuration of singlephase CHB-MLI topology using PLECS tool. In: 2022 IEEE 2nd international conference on Sustainable energy and Future electric Transportation (SeFeT), pp 1–5. https://doi.org/10.1109/ SeFeT55524.2022.9909071 Yaramasu V, Wu B (2014) Model predictive decoupled active and reactive power control for high-power grid-connected four-level diode-clamped inverters. IEEE Trans Industr Electron 61(7):3407–3416. https://doi.org/10.1109/TIE.2013.2278959 Kumar KB, Bhanuchandar A, Mahesh C (2021) A novel control scheme for symmetric seven level reduced device count Multi-Level DC Link (MLDCL) inverter. In: 2021 international conference on Sustainable Energy and Future Electric Transportation (SEFET), Hyderabad, India, pp 1–4. https://doi.org/10.1109/SeFet48154.2021.9375714 Khan SA et al (2021) Topology, modeling and control scheme for a new seven-level inverter with reduced DC-link voltage. IEEE Trans Energy Convers 36(4):2734–2746. https://doi.org/ 10.1109/TEC.2021.3075964 Llor AM, Kouro S, Reusser C, Yaramasu V, Wu B (2017) Medium voltage 4-level doublestar multilevel converter using model predictive control. IEEE International Conference on Industrial Technology (ICIT) 2017:136–140. https://doi.org/10.1109/ICIT.2017.7913072 Babaei E, Gowgani SS (2014) Hybrid multilevel inverter using switched capacitor units. IEEE Trans Industr Electron 61(9):4614–4621. https://doi.org/10.1109/TIE.2013.2290769 Bhanuchandar A, Murthy BK (2021) Switched capacitor based 13-level boosting grid connected inverter with LCL filter. In: 2021 National Power Electronics Conference (NPEC), pp 01–06. https://doi.org/10.1109/NPEC52100.2021.9672544 Bhanuchandar A, Murthy BK (2021) Single phase nine level switched capacitor based grid connected inverter with LCL filter. In: 2020 3rd international conference on energy, power and environment: towards clean energy technologies, pp 1–5. https://doi.org/10.1109/ICEPE5 0861.2021.9404491 Jahan HK (2020) A new transformerless inverter with leakage current limiting and voltage boosting capabilities for grid-connected PV applications. IEEE Trans Industr Electron 67(12):10542–10551. https://doi.org/10.1109/TIE.2019.2960728 Ye Y, Chen S, Sun R, Wang X, Yi Y (2021) Three-phase step-up multilevel inverter with selfbalanced switched-capacitor. IEEE Trans Power Electron 36(7):7652–7664. https://doi.org/10. 1109/TPEL.2020.3047198 Hamedani P, Garcia C, Flores-Bahamonde F, Sadr S, Rodriguez J (2022) Predictive control of 4-level flying capacitor inverter for electric car applications. In: 2022 13th Power Electronics, Drive Systems, and Technologies Conference (PEDSTC), pp 224–229. https://doi.org/10.1109/ PEDSTC53976.2022.9767266 Karamanakos P, Geyer T (2020) Guidelines for the design of finite control set model predictive controllers. IEEE Trans Power Electron 35(7):7434–7450. https://doi.org/10.1109/TPEL.2019. 2954357 Kouro S, Cortes P, Vargas R, Ammann U, Rodriguez J (2009) Model predictive control-a simple and powerful method to control power converters. IEEE Trans Industr Electron 56(6):1826– 1838. https://doi.org/10.1109/TIE.2008.2008349 Chen J, Wang C (2020) Dual t-type four-level converter. IEEE Trans Power Electron 35(6):5594–5600. https://doi.org/10.1109/TPEL.2019.2957699 Garcia C et al (2021) FCS-MPC based pre-filtering stage for computational efficiency in a flying capacitor converter. IEEE Access 9:111039–111049. https://doi.org/10.1109/ACCESS. 2021.3103070 Yang Y et al (2023) A novel continuous control set model predictive control for LCfiltered three-phase four-wire three-level voltage-source inverter. IEEE Trans Power Electron 38(4):4572–4584. https://doi.org/10.1109/TPEL.2023.3233995

A Low Voltage Stress Switched-Capacitor Based 7-Level Boost Multilevel Inverter Gangadhar Dhal, Kasinath Jena, Lipika Nanda, Pradeep Ku. Sahu, Kumaresh Pal, and Aditya Prasad Padhy

Abstract This study represents a 7-level DC-to-AC converter with an increase in output voltage. The output voltage can be increased through the use of Switched capacitor technologies, such as the series connection of charged capacitors and a DC source. The significant features of the proposed design include the capacitors’ voltage self-balancing and ability to boost the output voltage and reduced voltage stress on the switching components. Without an H-bridge circuit at the back end, the proposed inverter can provide bipolar voltage. A detailed comparison with existing switched capacitor topologies is used to elucidate the benefits of the proposed design. The proposed design’s loss analysis has been studied in detail. The effectiveness of this design is 97.32%. The effectiveness of the proposed 7-level design in both steady state and transient conditions is validated by extensive simulation testing using MATLAB/ Simulation software. Keywords Bipolar inverter · Multilevel inverter · Switched-capacitor · Gain

G. Dhal · L. Nanda · P. Ku. Sahu School of Electrical Engineering, KIIT University, Bhubaneswar, India e-mail: [email protected] P. Ku. Sahu e-mail: [email protected] K. Jena (B) · K. Pal · A. P. Padhy Department of Electrical and Electronics Engineering, ARKA JAIN University, Jamshedpur, Jharkhand, India e-mail: [email protected] K. Pal Department of Electrical Engineering, N.I.T., Jamshedpur, Jharkhand, India © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 K. Murari et al. (eds.), Recent Advances in Power Electronics and Drives, Lecture Notes in Electrical Engineering 1139, https://doi.org/10.1007/978-981-99-9439-7_4

39

40

G. Dhal et al.

1 Introduction Multilevel inverters (MLIs) play an important role in the wind, solar, fuel cell, and electric vehicle energy conversion systems [1]. The combination of direct current (DC) sources, active switches, and power diodes in these converters allows for the generation of a staircase voltage waveform with little Total Harmonic Distortion (THD). In general, switches in MLIs can endure lower voltage stress than their 2-level counterparts [2]. Additionally, MLIs benefit from a smaller output filter and lower total losses [3]. However, when the number of layers rises, common MLIs like Flying Capacitor (FC) and Neutral Point Clamped (NPC) face difficulties with capacitors’ voltage balance [4, 5]. Cascaded H-bridge (CHB) MLIs necessitate individual DC supplies [6]. Many applications necessitate high AC voltage yet can only connect to low-input DC sources. For many topologies, a transformer or inductor is used when the input voltage is less than the output voltage. This is the case in applications like grid-connected DG systems [7], electric vehicles [8], and renewable sources [9]. However, the aforementioned systems converters are cumbersome and heavy due to the use of transformers and inductors [10]. In order to generate a greater AC voltage in a stair-like pattern, researchers look for MLI structures that utilize a mix of DC sources and capacitors connected to a variety of power semiconductors. Because of this need, inductor-less and transformerless topologies have emerged. The total standing voltage (TSV ) and the number of DC sources used in these inverters must be kept low to protect the semiconductors. In order to enhance the voltage levels, new converters based on a switched-capacitors structure have been developed [11–14], but they place a significant amount of stress on the switching components due to the high voltage. Although [15] presents a generalized MLI with self-balancing capabilities and the large number of components required makes this solution impractical. Higher-frequency uses of this switchedcapacitor inverter are described in [16]. Due to the H-bridge, the inverter cannot be used for applications requiring high voltage. To get a voltage gain of two, the authors of [17] employ a nine-tier design with eleven switches and two capacitors. Additionally, the topology in [18] may improve the gain. However, more switching components are needed in generalized SC architectures. According to [19], a five-level flying capacitor structure requires ten switches and four capacitors. Since there are more switches, it’s less desirable in practice. A topology that has been proposed in [20] has the capability of synthesizing a 13-level voltage waveform with a boosting factor of six. The topology is distinguished by a number of distinctive characteristics, including its inherent capacity for self-balancing, a high boosting factor.

A Low Voltage Stress Switched-Capacitor Based 7-Level Boost …

41

Significant characteristics of the suggested architecture include the ability to generate bipolar multi-level voltages, the capacity to raise the voltage, and the inherent self-balancing of capacitors’ voltage and reduced voltage stresses.

2 Proposed SC Design Figure 1 depicts the proposed inverter circuit. Two capacitors (C1 , C2 ), and eleven switches (S1a , S2a , S1b , S2b , S1c, ∼ S4c , S1d , S2d , S5e ,) comprise the proposed architecture. The proposed design consists of two kinds of switches IGBT with an antiparallel diode and IGBT without any series or antiparallel diode. The switch S5e , presents a bidirectional switch. Based on Fig. 1, the suggested inverter can transition between eight different modes. The γ x switching states are shown in Table 1 where x= (0:1:2:3:4:5:6). Each switching state is associated with a different level of output voltage Vo that has been generated by the inverter. Table 2 depicts the voltage stress on switching components. S1c

S1b

S1a

S 3c

+ VDC _

S4

c

S2b

S2a

V0 Load

_

+ _

C1

S1d

+ _

C2

S2d

S2c +

Fig. 1 Proposed 7-level boost switched-capacitor MLI

Table 1 γ x switching states γx

S1a

S2a

S1b

S2b

S1c

S2c

S3c

S4c

S1d

S2d

S5e

C1

C2

Vo

0

0

1

1

0

0

1

0

0

0

1

1

–

C

0

0

1

0

0

1

1

0

0

0

1

0

1

C

–

0

1

0

1

0

1

1

0

0

0

1

0

1

C

–

+V DC

2

0

1

1

0

0

1

0

0

1

0

1

D

C

+2V DC

3

0

1

1

0

0

0

0

1

1

0

0

D

D

+3V DC

4

1

0

1

0

0

1

0

0

0

1

1

–

C

−1V DC

5

1

0

0

1

1

0

0

0

0

1

1

C

D

−2V DC

6

1

0

0

1

0

0

1

0

0

1

0

D

D

−3V DC

S2a

+V DC

S1a

+V DC

Switch

Str ess

+V DC

S1b +V DC

S2b

Table 2 Voltage stresses on switching commoners +2V DC

S1c +2V DC

S2c +V DC

S3c +V DC

S4c +2V DC

S1d

+2V DC

S2d

+2V DC

S5e

–

C1

C

C2

0

Vo

42 G. Dhal et al.

A Low Voltage Stress Switched-Capacitor Based 7-Level Boost …

43

2.1 Description of Switching States This section provides a detailed description of the different switchable states: (a) γ 0 : (V0 = 0) The inverter generates V0 = 0 with the switches S2a , S2c , S2d on. It is feasible to charge capacitors C2 with a magnitude of VDC by the way of one separate path established by the switches S1b S5e shown in Fig. 2. (b) γ 0 : (V0 = 0) Voltage at the output, V0 = 0, is produced when switches S1a , S1c and S1d are activated. Capacitor C1 have their voltages adjusted via the connections S2b and S5e , yielding the results VC1 =VDC . S1c

S1c

S1b

S1a VDC

S 3c

S5e

+ _

+ _

C1

S1d

S1b

S1a VDC

S4

c

S2b

S2a _

V0 Load

+ _

C2

S2d

+ _ S2b

S2a

S2c +

V0 Load

_

(a)

VDC

S 3c

S5e

+ _

C1

S1d

S4

c

S2b

_

V0 Load

+ _

C2

S2d

S2c +

_

S 3c S4

c

S2b

_

V0 Load

+ _

+ _

C1

S1d

V0 Load

VDC C2

S2d

_

VDC

_

V0 Load

(g)

+ _

C2

S2d

+ _

C1

S1d

c

+ _

C2

S2d

V0 Load

+ _

C1

S1d

+ _

C2

S2d

S2c +

S1c

S 3c

S5e S2b

S1d

(f)

S1b

S2a

S4

S2b

S2a

S2c +

S 3c

S5e

+ _

S1c

+ _

C1

S2c +

S1b

S1a

(e)

S1a

c

+ _

S1c

S5e

S2a

S2d

(d)

S1b VDC

C2

S4

S2b

S2a

S1c

+ _

+ _

S 3c

S5e

+ _

(c)

S1a

S1d

S2c +

S1b

S1a VDC

S2a

c

C1

S1c

S1b + _

S4

+ _

(b) S1c

S1a

S 3c

S5e

S4

c

S2c +

+ _

+ _

C1

S1d

S1b

S1a VDC

C2

S2d

S 3c

S5e

+ _ S2b

S2a _

V0 Load

S4

c

S2c +

(h)

Fig. 2 a V0 = 0 b V0 = 0 c V0 = +1V dc d V0 = +2V dc e V0 = +3V dc f V0 = −1V dc e V0 = −2V dc f V0 = −3V dc

44

G. Dhal et al.

(c) Aγ 1 : (V0 = +1V DC ) The output voltage is V0 =+1V DC , and the switches S2a , S1c , and S1d , are all activated. By switching power through S5e andS2b , the voltages on capacitors C1 can be changed to VC1 = VDC . (d) γ 3 : (V0 = +2V DC ) In this configuration, V0 =+2V DC , while switches S2a , S1b , and S1d are all turned on. The output voltage in this switching condition is supplied by VDC and capacitor C1 i.e. V0 = (V DC + VC1 ) = +2V DC . By switching power through S2c the voltages on capacitors C2 can be changed to VC2 =VDC . (e) γ 4 : (V0 = +3V DC ) In this configuration, V0 = +3V DC , while switches S1b ,S4c ,S1d , and S2a are all turned on. The output voltage in this switching condition is supplied by VDC and capacitor C1 and C2 i.e. V0 = (V dc + VC1 + VC2 ) = +3V DC . (f) γ 2 : (V0 = −1V DC ) The output voltage is V0 = −1V DC , and the switchesS1a , S2c and S2d , are all activated. By switching power throughS1b ,S5e the voltages on capacitors C2 can be changed to VC2 =VDC . (g) γ 3 : (V0 = −2V DC ) In this configuration, V0 =−2V DC , while switches S1a , S2d , S2b , and S5e are all turned on. The output voltage in this switching condition is supplied by VDC and capacitor C2 i.e. V0 = −(V dc + VC2 ) = −2V dc . By switching power through S1c the voltages on capacitors C1 can be changed to VC1 = VDC . (h) γ 4 : (V0 = −3V DC ) In this configuration, V0 = −3V DC , while switchesS1a ,S2b , S3c and S2d are all turned on. The output voltage in this switching condition is supplied by VDC and capacitor C2 C1 i.e. V0 = −(V dc + VC1 + VC2 ) = −3V dc .

3 Results and Discussions 3.1 Simulation Outcomes In the following part, the Simulation analysis of proposed 7-level SCMLI architectures is shown in Fig. 3. Table 3 details the simulation inputs. Figure 3a displays the waveforms for the inverter’s output voltage V0 and load current I0 when the inverter is fed an R-L load (R = 30 Ω and L = 40 mH). Output (V0 ) waveform consists of seven distinct voltage levels. Each step of the output voltage has same magnitude. Rapid load increases or decreases have no effect on the operating voltages. The voltages across capacitor are self-balanced under transient load. The effect of varying the modulation index is illustrated in Fig. 3b. The MLI generate seven levels at 0.95 MI and when the MI changes from 0.95 to 0.75 and 0.75 to 0.25 the proposed design generates 5 and 3 levels respectively. The output voltage waveform shifts as the modulation index are adjusted. There is evidence that once a change is made, the inverter design stabilizes rapidly. Figure 3c, d depicts the voltage stresses experienced by the switching components. These voltage wave form of different switches proof the stresses are less than the load voltage.

A Low Voltage Stress Switched-Capacitor Based 7-Level Boost … 150

45

V0

0 -150 3

I0

0 -3 50 VC1 48 50 VC2

48

Time(s)

0.1

0

0.2

(a) 150

M=0.95

M=0.75

V0

M=0.25

0 -150 3

I0

0 -3 50 VC1 48 50

VC2 Time(s)

48 0.1

0

0.2

(b) 50 S1a

0 50

S2a

0 50

S1b

0 50

S2b

0 100 0

S1c 0

0.1

Time(s)

0.2

(c) Fig. 3 Simulation outputs: a RL-load shift b switching frequency c, d switch stresses e, f THD analysis voltage and current at 0.95 and 0.5 modulation index

46

G. Dhal et al. 100

S3c

0 100

S5e

0 100

S4c

0 100 S1d 0 100 S2d 0 0

0.1

Time(s) 0.2

Mag(% of Fundamental

(d) Fundamental(50Hz)=139.6,THD=20.87% 1.5

100

Mag(% of Fundamental

0 Fundamental(50Hz)=1.724,THD=2.92%

1.2

0

100

Mag(% of Fundamental

(e) THD at a Modulation index of 0.95 Fundamental(50Hz)=74.57,THD=30.92% 2

100

Mag(% of Fundamental

0 Fundamental(50Hz)=0.92,THD=1.92%

2

100

0

(f) THD at a Modulation index of 0.5

Fig. 3 (continued)

A Low Voltage Stress Switched-Capacitor Based 7-Level Boost …

47

Table 3 Details of simulation inputs Parameters

Range

Supply source

50 V

MI

0.95, 0.75, 0.25

Load

R = 30 Ω and L = 40 mH

Table 4 Comparative analysis References

ns

nl

nc

nd

n dri

T SV pu

Gain

Fc/l

Efficiency

[13]

14

7

2

2

12

4.6

3

4.28

97.12

[15]

16

7

2

–

14

5.3

3

4.57

96.45

[16]

12

7

4

4

12

5.3

3

4.57

96.81

[P]

12

7

2

–

11

5.3

3

3.57

97.32

nl = no. of level, n s = no. of switch, n c = no. of capacitor, n d = no. of diode, TSV pu = Per unit total standing voltage, P = Proposed topology

4 Comparative Analysis The advantages of the proposed circuit are made clearer by contrasting it with other MLIs on a variety of metrics, including: n s ,n d , n c , and the voltage gain (see Table 4). The overall component per level can be evaluated as [14]: Fc/l =

n s + n c + n d + n dri nl

(1)

The proposed architecture is able to achieve the five-level and booster output. Compared to [13, 15, 16], the proposed design has fewer switches on each level, as shown in Table 4.

5 Loss Analysis The section follows discusses the proposed topology’s losses, including switching losses, conduction losses, and capacitor ripple losses. (a) Switching losses (Ps ) These kinds of losses occur when a switch is turned on and off. Mathematically, the switching power losses can be written as [20]. Ps =

1 f V [Ion ton + Ioff toff ], 6

(2)

48

G. Dhal et al.

where V : blocking voltage. Ion , Ioff : The amount of current passing through the switches immediately following and immediately preceding their activation. ton , toff : times at which the switch is turned on and off. f : indicates fundamental frequency. (b) Conduction losses (P c ) When the power switches and the diode are operating in the conduction mode, the internal resistance of the device causes power to be lost, which is referred to as conduction losses. The losses that are caused by the power switches and diodes can be stated as [21] in this way. 2 Pc,sw = V s,on Is,avg + Is,rms Rs,on

(3)

2 Pc,d = V d,on Id,avg + Id,rms Rd,on

(4)

where Vs,on ,Vd.on ; on-state voltage of switch and diode respectively. Is,avg , Id,avg Is,rms , Id,rms : average and rms current of switch and diode, respectively. (c) Ripple losses (Pr ) The ripple loss in a switched-capacitor inverter is caused by the potential difference that exists between the input power source and the capacitor during the charging and discharging intervals. Each of these can be stated using the following format: [5]. Ripplelosses (PR .) =

2 ) f ∑( 2 Cn ΔV Cn 2 n=1

(5)

ΔVc : Capacitor’s voltage ripple.

6 Conclusion In this study, a new 7-Level boost inverter with the capacity to perform self-voltage equalization is presented. The proposed SC inverter architecture may amplify a single dc input source by three times, allowing for the generation of a multistep waveform. The advantages of the proposed design are explained by making comparisons to other switched capacitor topologies. The results of the simulations verify the theoretical analysis and show that the proposed topology can handle dynamic variations in loading conditions without altering the voltage of the capacitors.

A Low Voltage Stress Switched-Capacitor Based 7-Level Boost …

49

References 1. Emadi A et al (2006) Power electronics intensive solutions for advanced electric, hybrid electric, and fuel cell vehicular power systems. IEEE Trans Power Electron 21(3):567–577 2. Rodriguez J et al (2002) Multilevel inverters: a survey of topologies, controls, and applications. IEEE Trans Ind Electron 49(4):724–738 3. Franquelo LG et al (2008) The age of multilevel converters arrives. IEEE Ind Electron Mag 2(2):28–39 4. Dargahi V et al (2015) A new family of modular multilevel converter based on modified flying-capacitor multicell converters. IEEE Trans Power Electron 30(1):138–147 5. Ozdemir E et al (2009) Fundamental-frequency-modulated six-level diode-clamped multilevel inverter for three-phase stand-alone photovoltaic system. IEEE Trans Ind Electron 56(11):4407–4415 6. Mokhberdoran A et al (2014) Symmetric and asymmetric design and implementation of new cascaded multilevel inverter topology. IEEE Trans Power Electron 29(12):6712–6724 7. Rahim NA et al (2011) Single-phase seven-level grid-connected inverter for photovoltaic system. IEEE Trans Ind Electron 58(6):2435–2443 8. Saeedian M et al (2018) A five-level step-up module for multilevel inverters: topology, modulation strategy, and implementation. IEEE J Emerg Sel Top Power Electron 6(4):2215–2226 9. Jang M et al (2013) A single-phase grid-connected fuel cell system based on a boost-inverter. IEEE Trans Power Electron 28(1):279–288 10. Tseng K-C et al (2013) A high step-up converter with a voltage multiplier module for a photovoltaic system. IEEE Trans Power Electron 28(6):3047–3057 11. Jena K et al (2021) A single-phase step-up 5-level switched-capacitor inverter with reduced device count. In: 2021 1st International Conference on Power Electronics and Energy (ICPEE), Bhubaneswar, India, pp 1–6 12. Jena K et al (2022) A generalized transformerless switched-capacitor inverter for photovoltaic application. Electr Eng 104(5):3435–3444 13. Taghvaie A et al (2018) A self-balanced step-up multilevel inverter based on switched-capacitor structure. IEEE Trans Power Electron 33(1):199–209 14. Jena K et al (2022) A 6X-voltage-gain 13-level inverter with self-balanced switched-capacitors. CPSS Trans Power Electron Appl 7(1):94–102 15. Lee SS (2018) A single-phase single-source 7-level inverter with triple voltage boosting gain. IEEE Access 6:30005–30011 16. Fong YC et al A modular concept development for resonant soft-charging step-up switchedcapacitor multilevel inverter for high-frequency ac distribution and applications. IEEE J Emerg Sel Top Power Electron. https://doi.org/10.1109/JESTPE.2020.3043126 17. Bhatnagar P et al (2019) Switched capacitors 9-level module (SC9LM) with reduced device count for multilevel DC to AC power conversion. IET Electr Power Appl 13(10):1544–1552 18. Jena K et al (2022) Generalized switched-capacitor multilevel inverter topology with selfbalancing capacitors. J Power Electron 22(9):1617–1626 19. Panda KP et al (Early Access) A switched-capacitor self-balanced high-gain multilevel inverter employing a single DC source. IEEE Trans Circuits Syst II: Express Briefs 20. Jena K et al (2022) A new design self-balanced 13-level switched-capacitor inverter. Int J Circuit Theory Appl 50(4):1216–1234

Design and Investigation of Solar PV-Fed PMSM Motor Drive Irfan Qureshi and Vikas Sharma

Abstract This paper presents a constant-speed Permanent Magnet Synchronous motor (PMSM) drive system fed by solar PV. The Speed is almost constant throughout the period. The presented scheme contains a solar panel, boost converter, three-phase inverter, and three-phase PMSM Motor. The control scheme includes Perturb and Observe algorithm for maximum power point tracking (MPPT) and an improved modified space vector modulation (IMSVM) controller for the three-phase inverter. Perturb and observe algorithm is implemented to extract the most amount of power from PV panels and IMSVM is used to control voltage for the three-phase inverter. The IMSVM has simple usage, has fewer harmonic contents, requires fewer computational calculations, has low switching losses, and most efficient technique. The MPPT algorithm is easy to practice, proficient, and adopted widely in commercial industries. PMSM motor is widely used in EVs water pumping, and other industrial applications. The proposed scheme has been simulated and results have been verified in MATLAB/Simulink environment and analyzed its performance characteristics. Keywords PV array · Perturb and observe algorithm · Boost converter · PMSM · IMSVM inverter

1 Introduction Solar energy is a non-convention source and plentiful and has been verified to be a demanding resource of energy. This is due to its nature to constantly provide energy [1]. By making utilization of renewable energy sources, we can reduce environmental pollution or we can say minimize ecological harms such as the greenhouse effect. The non-convention energy resources such as solar, wind, ocean thermal, hydro, biogas, I. Qureshi (B) · V. Sharma Government Engineering College Bikaner, Bikaner, Rajasthan, India e-mail: [email protected]; [email protected] V. Sharma e-mail: [email protected] © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 K. Murari et al. (eds.), Recent Advances in Power Electronics and Drives, Lecture Notes in Electrical Engineering 1139, https://doi.org/10.1007/978-981-99-9439-7_5

51

52

I. Qureshi and V. Sharma

tidal, etc. are used to produce electrical energy. Out of these, solar energy is the most well-known, cheaper, efficient, and economically beneficial, easily distinguishable, and gives a consistent performance. Kumar and Singh have presented a single-ended primary inductor SEPIC converter in the PV fed water pumping system [2]. Kumar and Singh have designed an easy, cost-effective, and efficient PV-fed PMBLDC drive water pumping system [3]. Kalla et al. [4] presented a capable controller for a PV array-controlled BLDC drive electric vehicle scheme in MATLAB software. The system model and Simulink of the PV system and PMBLDC drive have been presented and MATLAB results are also depicted. PV fed trapezoidal back Emf PMSM drives have been proposed in [5–16]. Murshid and Singh [17] have presented the sensorless PMSM Drive fed by a solar PV panel for a water pumping system. PV-fed PMSM drive is also presented in [17–20]. Parbhakaran et al. [21] have investigated PV-fed standalone single-stage PMSM drives. PV fed PMSM driven systems have been also depicted in [22–28]. Murshid and Singh et al. [29] developed an improved double-step PV array-fed PMSM motor water pump system with protection capabilities. Kalla et al. [30] have presented a PV array fed IMD driven water pumping scheme. Kashif and Singh [31] have designed a water pumping system PV-fed PMSM drive with a hybrid ANF scheme and self-sensing scheme and also compared both schemes in MATLAB/Simulink. Mishra et al. [32] have presented a synchronous motor drive fed by a solar battery system. The scheme has been simulated in MATLAB and results have been verified by testing in the lab also. Kashif and Singh [33] have investigated a PV-fed PMSM-based water pumping system with reduced sensor control. The scheme is simulated as well as results have been verified by the lab. Kumar et al. [34] have described Solar battery-fed PMSM motors for electrical vehicle applications. The scheme has been simulated and results have been verified by MATLAB/ Simulink. This paper proposed a PMSM Drive system integrated with solar PV panels as depicted in Fig. 1. The control technique used for the control of the inverter is IMSVM and P&O algorithm is used to get the utmost amount of power from PV IMSVM that provides gate pulses to the inverter to achieve the constant speed at the desired torque. The described scheme is simple to apply, proficient, and adopted widely in industries and causes reduction in the sensors. PMSM motor driven system has been widely used PV Array

Boost Converter

Inverter

PMSM

P&O Algo

IMSVM

PUMP

Fig. 1 Proposed scheme representation

Design and Investigation of Solar PV-Fed PMSM Motor Drive Boost Converter Ipv Solar insolation G

53 VSI

IL VL L

D

PV panel

S1

S3

S5

PMSM

Vpv C

S

Cd Vdc

ia ib ic

Cell temperature Tc

S4

MPPT P&O

PWM generator

S6

S2

Speed Sensor

S1 to S6 IMSVM generator

Vdc* PI controller

Fig. 2 Proposed scheme of solar PV fed PMSM drive system

and PMSM motor is highly implemented and efficient to fan, EV, water pumping, and other industrial applications.

2 Scheme and Working Principle Figure 2 shows the proposed scheme of the PV-fed PMSM drive. The presented system contains a solar panel and a boost converter IMSVM PMSM motor. The solar PV panel is coupled with the boost converter. The P&O algo is working to extract the maximum quantity of energy from the PV array. The boost converter is then fed to the 3-φ IMSVM inverter. The inverter is connected to a PMSM drive.

3 Control Schemes The SVM technique has been used to generate gate signals for the inverter. The technique is as follows.

3.1 Space Vector Modulation Scheme A vector space representation is shown in Fig. 3.

54

I. Qureshi and V. Sharma

Fig. 3 Representation of primary space vectors

β'-âxis V’1 (0,1,0)

V6(0,1,1)

V’2 (1,1,0)

V7(0,0,0)

V3(1,0,0)

V8(1,1,1)

V5(0,0,1)

α-axis

V4(1,0,1)

The process of SVM is somewhat different from other PWM techniques. It’s a way to change the type of digital. The main motive of this scheme is to make the loads of the load line equal to the dimensions of the reference line. This can be done by properly selecting the MOSFET inverter switch at the right time. This can be achieved by modifying the vector space. The SVM method has a low current ripple, the scheme uses 15% less DC input voltage than other techniques, is consistent and simple to execute, and has noise reduction in Motor Drives. Space rotation: In a double space, three time-related functions are satisfactory, xa (t) + xb (t) + xc (t) = 0

(1)

Links are provided as to vector [xa 00]t corresponds x-axis, vector [0xb 0]t is along the y-axis and vector [0xc 0]t is beside the z˙ -axis. In a more composite way, it’s presented as x(t) =

 2 2 2 xa + xb ej( 3 )π + xc e−j( 3 )π 3

(2)

i.e., 2/3 is the multiplier. The number is described as a real and imaginary way u(t) = ux + juy

(3)

In the standard form, the 3-φ voltages in the way of xa , xb and xc are specified by xa = Vm sin(ωt)

(4)

xb = Vm sin(ωt − 120◦ )

(5)

Design and Investigation of Solar PV-Fed PMSM Motor Drive

55

xc = Vm sin(ωt − 240◦ )

(6)

The 3-φ inverter output voltage vector is unchanged during operation, so the current of the 3-φ inverter and as a result, PMSM drive currents can be stable by selecting the suitable voltage vector.

4 System Design and Modeling We know that solar power is transformed into electricity with the use of PV panels that provide high emissions during the day and low emissions in the dawn and the dark. Energy output relies on sunlight and heat. Therefore, we have designed the system control system to make it more efficient.

4.1 PV Panel Design A PV array equivalent circuit is displayed in Fig. 4. Several PV panels are termed PV cells or arrays. In the system, we use the special arrangement of solar PV arrays in series and parallel arrangement. Rating of the PV panel has been given in Table 1. ip = ide + isn + is

(7)

is = ip − ide − isn

(8)

Vot + is Rsn − 1) aVT     Vot + is Rsn Vot + is Rsn −1 − is = ip − IO exp aVT Rsn ∵ ide = Io (

(9) (10)

The above equations are standard mathematical forms to explain the I-V performance features of the solar array. Where Io = reverse-saturation current. Vot = Voltage corresponding to temp. Fig. 4 Equivalent circuit of the ideal PV array

is ide ip

Di

isn Rsn

Rse Vot

56 Table 1 PV panel rating

I. Qureshi and V. Sharma

Symbol

Name

Values

Ppv

Power rating

4.4 KW

Ns

No. of series string

27

Np

No. of parallel string

1

V ocn

Open circuit voltage

32.9 V

I scn

Short circuit current

8.21 A

Fig. 5 I-V and P-V curve of an idyllic solar array

MPP (Voc, 0)

(Vmp, Imp)

P[W] I[A]

(0, Isc) V[Ʋ]

The idyllic I-V and P-V curve of the PV array is presented in Fig. 5. Its variations depend on the temperature and irradiance values. Selection of inductor and capacitor of Boost Converter. A small amount of inductor makes a quick temporary response; and causes a large current explosion, resulting in a high loss of conductors in the switch, inductor, and parasitic resistance. A small inductor also requires a large capacitor filter to reduce power outages. For the Boost converter it is given as follows. lcr =

dki (1 − dki )2 R 2fswt

dki = dutyratio =

vot − vinp vinp

(11) (12)

where, vinp isinputvoltage, vot isoutputvoltage, RisResistance, fswt is switching frequency. For the Boost converter, the peak-to-peak ripple voltage is, ∂v cr =

vin dk 8lcr Cf 2sw

where Ciscapacitance and lcr is Critical inductance.

(13)

Design and Investigation of Solar PV-Fed PMSM Motor Drive

57

Perturb and Observe Technique. The control algorithm to attain maximum power point is given below. It is mainly implied due to its simplicity and reliable nature and non-difficult implementation. ‘P = 0 and V = 0, at MPP ‘P > 0andV > 0, leftofMPPonP − V curve ‘P < 0andV < 0, rightofMPPonP − V curve The duty ratio D is attuned as described, Dnew = Dold , if‘P = 0andV = 0, Dnew = Dold − D, if ‘P > 0andV > 0,

else ‘P < 0andV < 0

Dnew = Dold + D, if ‘P > 0andV < 0,

58

I. Qureshi and V. Sharma

Vdc

Vref

+

DC to ABC dq And clarke Transformation

PI -

Gate timings Compare

Demux Generate signals

θ

To 3-phase inverter

Repeating sequance

Fig. 6 Proposed scheme of generating pulse

else ‘P > 0andV > 0. where D denotes the perturbing duty ratio and Dnew andDold are the latest and previous quantity of the duty cycle. Control Technique Explained for PMSM Drive. Figure 6 depicted the schematic Visio diagram of the proposed system for generating gate signals. Here Vdc and Vref are the coupling capacitor voltage and reference voltage correspondingly. Proportional-Integral reduces the error values. Then these signals are compared with repeating sequence signals and are given to the demultiplexer which generates the six voltage signals. The depicted scheme has been molded and simulated in MATLAB. The PV system is coupled to a boost converter. The boost converter is then connected to the 3-φ inverter via a dc link capacitor. Gate pulses to the inverter are given by the IMSVM technique and the inverter is connected to the PMSM motor drive which starts the drive. These gate signals are given to the 3-φ inverter. This dc voltage is then converted into Vα and Vβ which is then converted into ABC by using a 2-phase to 3-phase transformation.

5 Simulation Results and Discussions The results have been obtained at time-varying isolation levels of 1000, 800, and 600 W/m2 and a temperature of 25 °C. The value of G is 800 W/m2 at step time 0–5 s. At the step time of 5 s the value of irradiance is 1000 W/m2 until the step time of 8 s. At step time between 8 and 10 s, the value of irradiance is 600 W/m2 as shown in Fig. 7. Values of PV current Ipv and power Ppv varies with variation in G as shown in Fig. 7. PV Array Power i.e. Ppv is 1400 W at G 800 W/m2 , 1800 W at G 1000 W/m2 and 1000 W at G 600 W/m2 . Dc link voltage i.e. Vdc is around 400 V and slightly changes with change in isolation level G is shown in Fig. 7. PV Array Current Ipv are values 6, 7.5, and 4.4 A respectively. The rotor speed ωm is constant by nearly

Design and Investigation of Solar PV-Fed PMSM Motor Drive

59

Fig. 7 Dynamic performance of the system when isolation level changes from 800, 1000, to 600 W/m2

200 rps but changes with change in irradiance as shown in Fig. 7. The steady-state performance of the drive has been depicted in Fig. 8. All the quantities are constant at steady-state conditions as shown in Fig. 8. Results have been taken at G 600 W/ m2 , PV Array Power Ppv is 1000 W DC link voltage i.e. Vdc is 400 V, Output VSC Current i.e. Iabc 25A, Rotor Speed ωm is 200rps and Electromagnetic Torque Te is 5 N*m. Figure 9 demonstrates the load change dynamic performance of the system at isolation level G 800 W/m2 . PV Array Power is 1400 W. When there is a variation load at a step time of 3 s, torque changes from 10 to 5 N * m. speed is slightly changed at that point and then again back to constant i.e. 200 rps so the system gains its stability very fast as depicted in Fig. 9. The Speed of the PMSM drive is constant. So the speed of the PMSM drive has not been affected by the load change. We can say that the PMSM has a constant speed drive at any load.

60

I. Qureshi and V. Sharma

Fig. 8 Steady-state performance of the system at 600 W/m2 isolation level

6 Conclusions A PV-driven PMSM scheme has been analyzed in this paper using the space vector modulation control technique and P&O algorithm. The results are obtained at 25 °C. The speed of the drive is constant irrespective of load torque. We can say that the PMSM has a constant speed drive at any load. SVM has lesser harmonics than any other technique of modulation so the noise reduction is motor, also it has the advantage to use 15% less DC voltage than the other techniques. The maximum power point has been attained without any oscillations. The proposed scheme is costeffective and eliminates the current sensor savings on the drive side, providing high performance and consistent performance. The performance of the entire scheme is found to be adequate in most operating systems as well as water pumping in irrigation and industrial areas in dynamic and steady-state conditions.

Design and Investigation of Solar PV-Fed PMSM Motor Drive

61

Fig. 9 Dynamic performance of the system when load change at a step time of 3 s

References 1. Feyzi MR, Mozaffari Niapour SAK, Nejabatkhah F, Danyali S, Feizi A (2011) Brushless DC motor drive based on multi-input DC boost converter supplemented by hybrid PV/FC/battery power system. In: 2011 24th Canadian Conference on Electrical and Computer Engineering (CCECE), Niagara Falls, ON, pp 000442–000446 2. Kumar R, Singh B (2014) Solar PV array fed water pumping system using SEPIC converter based BLDC motor drive. In: 2014 eighteenth National Power Systems Conference (NPSC), Guwahati, pp 1–5 3. Kumar R, Singh B (2016) BLDC motor-driven solar PV array-fed water pumping system employing zeta converter. IEEE Trans Ind Appl 52(3):2315–2322 4. Kalla UK, Gurjar D, Rathore KS, Dixit P (2016) An efficient controller for PV operated PMBLDC drive based electric vehicle system. In: 2016 IEEE 7th Power India International Conference (PIICON), Bikaner 5. Singh B, Bist V (2012) Reduced sensor based improved power quality CSC converter fed BLDC motor drive. In: 2012 IEEE international conference on Power Electronics, Drives and Energy Systems (PEDES), Bengaluru, pp 1–6 6. Singh B, Bist V (2013) A PFC based switched-capacitor buck-boost converter fed BLDC motor drive. In: 2013 annual IEEE India Conference (INDICON), Mumbai, pp 1–6 7. Singh B, Bist V (2013) A PFC based BLDC motor drive using a bridgeless zeta converter. In: IECON 2013 - 39th annual conference of the IEEE industrial electronics society, Vienna, pp 2553–2558 8. Singh B, Bist V, Chandra A, Al-Haddad K (2013) Power quality improvement in PFC bridgeless-Luo converter fed BLDC motor drive. In: 2013 IEEE industry applications society annual meeting, Lake Buena Vista, FL, pp 1–8

62

I. Qureshi and V. Sharma

9. Bist V, Singh B (2014) A brushless DC motor drive with power factor correction using isolated zeta converter. IEEE Trans Ind Inform 10(4):2064–2072 10. Bist V, Singh B (2014) A PFC-based BLDC motor drive using a canonical switching cell converter. IEEE Trans Ind Inform 10(2):1207–1215 11. Bist V, Singh B (2014) A PFC based bridgeless Sheppard-Taylor converter fed brushless DC motor drive. In: 2014 innovative applications of Computational Intelligence on Power, Energy and Controls with their impact on Humanity (CIPECH), Ghaziabad, pp 262–267 12. Bist V, Singh B (2014) A PFC based isolated Sheppard-Taylor converter feeding brushless DC motor drive. In: 2014 9th International Conference on Industrial and Information Systems (ICIIS), Gwalior, pp 1–6 13. Singh B, Bist V (2014) A unity power factor NI-BIBRED converter fed brushless DC motor drive. In: 2014 eighteenth National Power Systems Conference (NPSC), Guwahati, pp 1–6 14. Bist V, Singh B (2014) An adjustable-speed PFC bridgeless buck–boost converter-fed BLDC motor drive. IEEE Trans Ind Electron 61(6):2665–2677 15. Hou H, Yao W, Zhang W (2016) Vector control of single phase brushless DC motor. In: 2016 19th International Conference on Electrical Machines and Systems (ICEMS), Chiba, pp 1–5 16. Gujjar MN, Kumar P (2017) Comparative analysis of field oriented control of BLDC motor using SPWM and SVPWM techniques. In: 2017 2nd IEEE international conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT), Bangalore, pp 924–929 17. Murshid S, Singh B (2018) A PV array fed BESS supported speed sensor-less PMSM driven water pumping system. In: 2018 IEEE Transportation Electrification Conference and Expo (ITEC), Long Beach, CA, USA, pp 63–68 18. Karthikeyan A, Prabhakaran KK, Abhilash Krishna DG, Nagamani C (2018) Standalone single stage PV fed reduced switch inverter based independent control of two PMSM drive. In: 2018 IEEE International Telecommunications Energy Conference (INTELEC), Turino, Italy, pp 1–6 19. Dubey M, Saxena R, Sharma S (2019) Control of solar-power based PMSM drive for compressor unit. In: 2019 IEEE 1st International Conference on Energy, Systems and Information Processing (ICESIP), Chennai, India, pp 1–5 20. Karthikeyan A, Prabhakaran KK, Varsha S, Venkatesa Perumal B, Mishra S (2018) Single stage PV fed reduced inverter based PMSM for standalone water pumping application. In: 2018 IEEE international conference on Power Electronics, Drives and Energy Systems (PEDES), Chennai, India, pp 1–6 21. Prabhakaran KK, Karthikeyan A, Varsha S, Perumal BV, Mishra S (2020) Standalone single stage PV-fed reduced switch inverter based PMSM for water pumping application. IEEE Trans Ind Appl 56(6):6526–6535 22. Murshid S, Singh B (2018) Utility grid interfaced solar water pumping system using PMSM drive. In: 2018 IEEE international conference on Power Electronics, Drives and Energy Systems (PEDES), Chennai, India, pp 1–6 23. Kashif M, Murshid S, Singh B (2019) Continuous control set model predictive controller for PMSM driven solar PV water pumping system. In: 2019 IEEE International Conference on Environment and Electrical Engineering and 2019 IEEE Industrial and Commercial Power Systems Europe (EEEIC/I&CPS Europe), Genova, Italy, pp 1–6 24. Kashif M, Murshid S, Singh B (2018) Standalone solar PV array fed SMC based PMSM driven water pumping system. In: 2018 IEEMA Engineer Infinite Conference (eTechNxT), New Delhi, India, pp 1–6 25. Murshid S, Singh B (2018) A novel control scheme for solar PV fed PMSM driven energy efficient water pumping system. In: 2018 8th IEEE India International Conference on Power Electronics (IICPE), Jaipur, India, pp 1–6 26. Singh B, Murshid S (2018) A grid-interactive permanent-magnet synchronous motor-driven solar water-pumping system. IEEE Trans Ind Appl 54(5):5549–5561 27. Murshid S, Singh B (2020) Reduced sensor-based PMSM driven autonomous solar water pumping system. IEEE Trans Sustain Energy 11(3):1323–1331

Design and Investigation of Solar PV-Fed PMSM Motor Drive

63

28. Murshid S, Singh B (2020) Utility grid interfaced solar WPS using PMSM drive with improved power quality performance for operation under abnormal grid conditions. IEEE Trans Ind Appl 56(2):1052–1061 29. Murshid S, Singh B (2021) Double stage solar PV array fed water pump driven by permanent magnet synchronous motor. IEEE Trans Ind Appl 57(2):1736–1745 30. Kalla UK, Bhati N, Chariya K, Qureshi I (2021) Design and analysis of solar PV fed IMD water - pumping system. In: 2021 international conference on Sustainable Energy and Future Electric Transportation (SEFET), Hyderabad, India, pp 1–6 31. Kashif M, Singh B (2022) Solar PV-fed reverse saliency spoke-type PMSM with hybrid ANFbased self-sensing for water pump system. IEEE J Emerg Sel Top Power Electron 10(4):3927– 3939. https://doi.org/10.1109/JESTPE.2021.3084129 32. Mishra S, Varshney A, Singh B, Parveen H (2022) Driving-cycle-based modeling and control of solar-battery-fed reluctance synchronous motor drive for light electric vehicle with energy regeneration. IEEE Trans Ind Appl 58(5):6666–6675. https://doi.org/10.1109/TIA.2022.318 1224 33. Kashif M, Singh B (2023) Reduced-sensor-based multistage model reference adaptive control of PV-fed PMSM drive for water pump. IEEE Trans Ind Electron 70(4):3782–3792. https:// doi.org/10.1109/TIE.2022.3176279 34. Kumar M, Deosarkar P, Tayade N, Yenare S (2023) Design and control of solar-battery fed PMSM drive for LEVs. In: 2023 IEEE international Students’ Conference on Electrical, Electronics and Computer Science (SCEECS), Bhopal, India, pp 1–9. https://doi.org/10.1109/SCE ECS57921.2023.10063001

Scheming of Four-Phase IBC for Fast Charging of EV Battery Abhishek Singh, Pooja Kumari, and Niranjan Kumar

Abstract In today’s world, the Automobile industry is shifting rapidly from conventional ICE Vehicles to EVs. As the name suggests, EVs use electric motors instead of gasoline engines. Increase in demand of EV leads to increase in demand of power electronic converters to make electrical circuitry more and more efficient. Efficiency during battery charging can be enhanced by shrinking the losses and ripples in the output voltage of converters. The interleaving concept comes into the picture to reduce the losses along with ripples in output voltage, the reduction in the size of components, and faster response. This paper focuses on working of a four-phase interleaved boost converter for the rapid charging of EV batteries. The simulation of the proposed circuit is executed in MATLAB/SIMULINK and the results are validated. The result compares a conventional boost converter with an interleaved boost converter. The simulation outcomes highlight how the interleaved boost converter (IBC) boosts the input voltage. Keywords Simulation · Interleaving · Ripples · Electric vehicle · Output voltage · Four-phase IBC

1 Introduction We all know that EVs [1] are the future of means of transport in the world. It is not only clean and eco-friendly but also highly efficient relative to our conventional internal combustion engine (ICE) vehicles. An EV has countless advantages [2] over an ICE but the only drawback it has is its charging time. Generally, a conventional vehicle takes around 2 min in refuelling the tank whereas an EV takes 30 min to 12 h to get fully charged depending on its level of charging rate. A. Singh (B) · P. Kumari · N. Kumar Department of Electrical Engineering, NIT Jamshedpur, Jamshedpur, India e-mail: [email protected] N. Kumar e-mail: [email protected] © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 K. Murari et al. (eds.), Recent Advances in Power Electronics and Drives, Lecture Notes in Electrical Engineering 1139, https://doi.org/10.1007/978-981-99-9439-7_6

65

66

A. Singh et al.

Level 1 charging [3] takes around 10–12 h to fully charge a discharged battery once whereas, Level 2 charging [3] takes around 4–6 h. These time durations are very high and push us to move on Level 3 chargers or DC fast chargers which take less than an hour to charge the battery. In Level 3 chargers [3], various power electronic converters are used to get high voltage and current. Since these batteries charge on DC but our supply is AC so, in almost all of them, different types of DC–DC converters [4] are being used with a rectifier. DC–DC converters [5], also called choppers, are having DC parameters at both the source and load end. The four-ϕ IBC [6] is also a boost-type DC–DC converter. This type of converter is generally used to step up the input voltage. It generally uses a diode, inductor, filter capacitors, and other semiconductor switches like MOSFET or BJT, depending on the type of application in its circuit. Battery technology has improved over the years, and with the increased use of portable devices, the demand for fast charging has increased. Fast charging allows devices to be charged quickly, reducing downtime, and increasing productivity. The traditional charging methods are slow, and this has resulted in the emergence of new technologies such as the IBC. A boost converter (BC) operates in a manner that during the turn-on of the switch, the inductor stores energy, and during the turnoff of the switch, the combined energy of the source and the inductor eventually boosts the input voltage. There is a filter capacitor connected in parallel with the load resistor to maintain the constant output voltage. Generally, a conventional BC is not preferred for battery charging purposes because of its high content of ripples. By using the concept of interleaving, the ripples of both output voltage along with input current get reduced. Also, to serve the increase in energy demand, interleaving allows us to handle larger loads. With proper switching in IBC, we can get all the above-mentioned advantages. A further advantage of IBC [7] is that at any time at least one of the converters is supplying the load. Some of the works of the authors are addressed in the literature review. The literature survey has demonstrated that the use of multiple phases in a converter can improve efficiency, reduce component stress, and increase power density. In [8] the author presents a promising solution for efficient and reliable solar power conversion. The proposed converter topology has several advantages over conventional boost converters, including reduced ripple current and voltage, improved efficiency, and increased power density. The simulation outcomes verify that the suggested converter is capable of efficiently converting low-voltage, high-current solar panel output to a higher voltage suitable for grid-connected applications. The interleaving algorithm in a parallel power converter is proposed in [9]. These converters consist of two to four analogous BC connected in parallel and are regulated by interleaved switching signals having the same frequency and some phase shift. By sharing the input current among the cell phases, this design achieves large consistency and efficiency in power electronic systems, as well as improved maintenance and low heat dissipation. The authors designed and experimentally verified a 1.2 kilo-watt converter model with a switching frequency of 25 kHz, which is related to a PEM fuel cell system (1.2 kW, 46-A) in a laboratory. The results validate higher system performance by reducing the ripple current to nearly zero. In the context of

Scheming of Four-Phase IBC for Fast Charging of EV Battery

67

applications involving renewable energy sources, a similar study on interleaved BC and conventional BC has been presented in [10]. In this study, a comparative performance analysis of 3-ϕ uncoupled and directly coupled IBC for renewable energy sources was conducted. When evaluated with a traditional BC, it has been discovered that the proposed IBC results in a lower level of current ripple. As a result of the comparative study, it has been determined that three-phase IBC is an advantageous topology for use in applications involving renewable energy. In [11] the performance of the PEM fuel cell current is proposed in a well-written and well-organized study that provides valuable insights into the use of a 4-ϕ IBC and a novel control strategy to improve the performance of the PEM fuel cell current. The results demonstrate the effectiveness of the proposed approach by highlighting its potential for future applications in fuel cell systems. Similarly, the efficacy of 2-ϕ and 3-ϕ IBC for applications involving renewable energy sources is investigated in [12]. By utilizing an IBC with three stages, it is possible to effectively reduce the overall ripple of the current, which in turn lengthens the lifetime of renewable sources. The traditional 2-ϕ IBC that is stated in the literature is contrasted with a 3-ϕ IBC that is discussed in this particular piece of work. Input current ripple is significantly reduced, thanks to the use of three Phase IBCs as opposed to two-phase models. Comparisons are made between the ripples of the two different types of converters, output voltage, input current, and inductor current for a variety of duty cycles. MATLAB/SIMULINK is the software that is utilized for simulation. The outcomes are analyzed and compared to the theoretical parameters to ensure their accuracy. The analysis of four phase IBC has not been considered in the proposed scheme. The ripples present in the output voltage can be reduced with the help of the interleaved boost DC–DC converter that is suggested in [13]. The converter has a high voltage ratio and a low ripple. The low DC voltage produced by the fuel cell is converted by this converter to the high DC voltage produced by the DC link. The developed model is applied for fuel cell applications. In [14], an analysis of the performance of IBC with multiple phases is presented. MATLAB/ SIMULINK is used for the simulation analysis of an IBC with multiple phases (two/ three/four). However, in the aforementioned scheme, none has considered the usage of IBC in the fast charging of EV batteries. Therefore, the designed model explains the application of IBC in the charging of EV batteries [15]. The rest of the manuscript is presented as follows. Section 2 describes the scheming of the original BC. The working of IBC is explained in Sect. 3. Section 4 summarizes the designing and implementation part of the proposed IBC simulation model and the conclusion has been drawn in Sect. 5.

2 Scheming of Conventional Boost Converter Let us first see the conventional BC which is shown in Fig. 1. The Duty Cycle (D) of the above converter can be calculated by the following equations:

68

A. Singh et al.

Fig. 1 Conventional BC

Vo =

Vi 1− D

(1)

Vi V0

(2)

D =1−

Vo and Vi are output and input voltage. Now, from the above equations, we can see that the output voltage depends on the duty cycle. It means that if the duty cycle has a high value, then it gets reflected as a higher value of output voltage. For the designing of an inductor, we have an equation as follows, L=

Vi ∗ D I L ∗ f s

(3)

where L is the Inductance, I L is the Inductor ripple current, and f s is the Switching frequency. The size of the inductor depends f s on and the inductor ripple current. As the f s increases, the size of the inductor will reduce, and vice-versa. For designing the value of the capacitor, we have an equation as follows, C=

Vi ∗ D R ∗ f s ∗ Vo

(4)

where C is the Capacitance, R is the Load resistor, and V o is the Output voltage ripple. The size of the capacitor depends on the ripple of the output voltage and f s . As f s increases, the size of the capacitor will reduce and vice-versa.

Scheming of Four-Phase IBC for Fast Charging of EV Battery

69

3 Working of Interleaved Boost Converter (IBC) The IBC is a type of DC–DC [16] converter that uses multiple converters in parallel to provide a higher current output. This results in faster charging times, making it an ideal method for charging batteries. This paper presents an overview of IBC and its application in battery charging. The converters are interleaved, meaning that the switching signals of the converters are staggered, resulting in a smoother output. The interleaved boost converter operates in two phases; the first phase involves the charging of the inductor, and the second phase involves the discharge of the inductor. During the initial phase, the switches are turned on, and the current flows through the inductor. In the next phase, the switches are turned off, and the inductor discharges, resulting in higher voltage output. The interleaved boost converter is an efficient method of charging batteries, and it is used in various applications, including renewable energy, electric vehicles, and portable devices.

4 Design and Implementation of the Proposed IBC Model The simulation is executed to evaluate the robustness of IBC. The simulation results show that the converter is efficient and can charge the battery within a short period. The circuit diagram of the 4-ϕ IBC is depicted in Fig. 2. It is the parallel connection of four boost converters with each phase having a 90-degree shift from the other. Since these inductor currents are out of phase, they help to reduce the ripples [17] by scrapping their effect. At any instant in time, at least one of the phases is supplied to the load. The division of current into four parts helps in the reduction of power loss.

Fig. 2 Four-phase IBC circuit diagram

70

A. Singh et al.

The gate pulses for this converter have some phase shift which is calculated based on the following equation, θ=

360◦ n

(5)

where n is the number of the phases of IBC. The value of inductors L 1 , L 2 , L 3 , and L 4 are calculated based on the following equation, L1 = L2 = L3 = L4 =

Vi ∗ (Vo − Vi ) I L ∗ f s ∗ Vo

(6)

The inductor current and current through the diode is illustrated in Figs. 3 and 4 respectively. iLA, iLB, iLC, and iLD represent the inductor current across all four phases. The currents iA, iB, iC, and iD represent current through the diode across all the phases. Since there are four phases in the proposed circuit, therefore the switching pulses are shifted 90° from each other which is shown in Fig. 5. These switching signals are provided with the help of pulse generators which is having a frequency of 25 kHz. When the diode becomes a forward bias then, it allows the inductor current to flow and the magnitude of the inductor current that is flowing in the proposed circuit per phase is around 331.2 A as shown in Figs. 3 and 4, which is the same as the magnitude of the diode current.

Fig. 3 Inductor current across all the four phases

Scheming of Four-Phase IBC for Fast Charging of EV Battery

Fig. 4 Current through diode across all the four phases

Fig. 5 Switching pattern for four-phase IBC

71

72

A. Singh et al.

The value of the capacitor is computed by implementing the below equation, C=

D ∗ Vo f s ∗ R ∗ V o

(7)

where Vo is the Ripple in the output voltage. MATLAB simulation of battery charging with four-phase IBC is shown in Fig. 6. The Output voltage of the IBC is calculated by using the equation (8). Vo =

Vi 1−D

(8)

There are mainly four blocks in the proposed IBC model as illustrated in Fig. 7. The AC voltage source provides the required supply voltage. The rectifier converts AC–DC voltage. Further, a filter circuit is designed consisting of an inductor and capacitor. The inductor mainly smoothens out the current waveform and the capacitor filter smoothens the output DC voltage. Then the purely rectified DC voltage is fed to the battery which acts as a load in our case. The proposed IBC model is applied for fast charging of the battery. The simulation was run and the charging curve of the battery and output current is illustrated in Fig. 8. It can be observed that the SOC [18] of the battery increases during the charging mode of operation. The output current of the battery is maintained at around 8A. The battery specifications and the circuit parameters have been provided in Table 1. The waveforms of input and output voltage are depicted in Fig. 9. The IBC boosts the input voltage from 204.8 to 389.40 V as there is a duty cycle of 50%. The value of inductances and capacitance is calculated around 0.01 mH & 800 μF respectively.

5 Conclusion The IBC is an efficient and effective method of fast-charging batteries. The converter uses multiple converters in parallel to provide a higher current output, resulting in faster charging times. This paper presents an overview of IBCs and their application in battery charging. The design and implementation of an IBC for fast charging of a lithium-ion battery are presented, and the results show that the converter is efficient and can charge the battery within a short period. The proposed model designed in MATLAB/SIMULINK environment can charge the battery rapidly. This circuit takes around 30 min to charge a battery of 400 V and 50 Amperes per hour capacity from 0 to 90% and charges to 100% in less than 40 min. So, we can say that the charging rate of this circuit is slightly around 2C. For future scope, we can add a power factor improvement circuit at the input side and, we can add a control circuit based on the state of charge level so that we can make it more compatible with all types of EVs.

Fig. 6 MATLAB simulation of battery charging with four-phase IBC

Scheming of Four-Phase IBC for Fast Charging of EV Battery 73

74

A. Singh et al.

Fig. 7 Block diagram of proposed IBC

Fig. 8 SOC and output current Table 1 Simulation parameters

Parameters

Values

Vi

204.8 V

Vo

389.40 V

fs

25 kHz

L1 = L2 = L3 = L4

0.01 mH

C

800 μF

θ

90°

D

50%

Scheming of Four-Phase IBC for Fast Charging of EV Battery

75

Fig. 9 Plot illustrating input voltage (V i ) and output voltage (V o ) of IBC

References 1. Chan CC (2007) The state of the art of electric, hybrid, and fuel cell vehicles. Proc IEEE 95:704–718. https://doi.org/10.1109/JPROC.2007.892489 2. Tirunagari S, Gu M, Meegahapola L (2022) Reaping the benefits of smart electric vehicle charging and vehicle-to-grid technologies: regulatory, policy technical aspects. IEEE Access 10:114657–114672. https://doi.org/10.1109/access.2022.3217525 3. Mastoi MS, Zhuang S, Munir HM, Haris M, Hassan M, Usman M, Bukhari SSH, Ro JS (2022) An in-depth analysis of electric vehicle charging station infrastructure, policy implications, and future trends. Energy Rep 8:11504–11529. https://doi.org/10.1016/j.egyr.2022.09.011 4. Nakajima A, Masukawa S (2018) Study of boost type DC-DC converter for single solar cell. In: Proceedings of IECON 2018 - 44th annual conference of IEEE ındustrial electronics society, pp 1946–1951. https://doi.org/10.1109/IECON.2018.8591436 5. Wang J, Wang B, Zhang L, Wang J, Shchurov NI, Malozyomov BV (2022) Review of bidirectional DC-DC converter topologies for hybrid energy storage system of new energy vehicles. Green Energy Intell Transp 1:100010. https://doi.org/10.1016/j.geits.2022.100010 6. Laoprom I, Tunyasrirut S, Permpoonsinsup W, Puangdownreong D (2019) Simulation of four phases interleaved boost converter. In: iEECON 2019 - 7th ınternational electrical engineering congress proceedings 1–4. https://doi.org/10.1109/iEECON45304.2019.8938855 7. Modabbir, Khalid MR (2021) Design and evaluation of IBC for EV applications. In: 2021 ınternational conference on ıntelligent technologies CONIT 2021, pp 1–7. https://doi.org/10. 1109/CONIT51480.2021.9498498 8. Ritu, Verma N, Mishra S, Shukla S (2016) Implementation of solar based PWM fed twophase interleaved boost converter. International Conference on Communication, Control and Intelligent Systems CCIS 2015, pp 470–476. https://doi.org/10.1109/CCIntelS.2015.7437962

76

A. Singh et al.

9. Thounthong P, Davat B (2010) Study of a multiphase interleaved step-up converter for fuel cell high power applications. Energy Convers Manag 51:826–832. https://doi.org/10.1016/j. enconman.2009.11.018 10. Newlin DJS, Ramalakshmi R, Rajasekaran S (2013) A performance comparison of the interleaved boost converter and conventional boost converter for renewable energy application. In: 2013 ınternational conference on green high performance computing ICGHPC 2013. https:// doi.org/10.1109/ICGHPC.2013.6533924 11. Hao X, Salhi I, Laghrouche S, Ait-Amirat Y, Djerdir A (2021) Robust control of four-phase interleaved boost converter by considering the performance of PEM fuel cell current. Int J Hydrog Energy 46:38827–38840. https://doi.org/10.1016/j.ijhydene.2021.09.132 12. Chitra P, Seyezhai R (2014) Basic design and review of two-phase and three-phase interleaved boost converter for renewable energy systems. Int J Appl Sci 1:1–26 13. Chang LY, Chao KH, Chang TC (2012) A high voltage ratio and low ripple interleaved DC-DC converter for fuel cell applications. Sci World J. https://doi.org/10.1100/2012/896508 14. Nahar S, Bashir Uddin M (2019) Analysis of the performance of interleaved boost converter. In: 4th International Conference on Electrical Engineering and Information & Communication Technology iCEEiCT 2018, vol 8, pp 547–551. https://doi.org/10.1109/CEEICT.2018.8628104 15. Fichtner M (2022) Recent research and progress in batteries for electric vehicles. Batter Supercaps 5. https://doi.org/10.1002/batt.202100224 16. Rafiq U, Murtaza AF, Sher HA, Gandini D (2021) Design and analysis of a novel high-gain DC-DC boost converter with low component count title. Electronics 10. https://doi.org/10. 3390/electronics10151761 17. Salehi S, Zahedi N, Babaei E (2018) An interleaved high step-up DC-DC converter with low input current ripple. In: 9th annual ınternational Power Electronic and Drive Systems and Technologies Conference PEDSTC 2018. January 2018, pp 437–442. https://doi.org/10.1109/ PEDSTC.2018.8343837 18. Zhou W, Zheng Y, Pan Z, Lu Q (2021) Review on the battery model and SOC estimation method. Processes 9:1–24. https://doi.org/10.3390/pr9091685

Speed Control of a Brushless DC Motor Using Hall Sensor Manoj Kumar Kar, Shejal Sanjay Waghmare, Simeen Mujawar, and Sreerekha Vadi

Abstract Speed control using a Brushless DC (BLDC) motor typically involves adjusting the amplitude and frequency of the power supplied to the motor. A BLDC motor outperforms a brushed DC motor because it replaces the mechanical commutation unit with an electronic one, which improves dynamic characteristics, increases efficiency, and reduces noise levels slightly. Hall sensors are used to provide feedback to the motor controller. BLDC motors can operate more efficiently and accurately by using Hall sensors to detect the position of the rotor. There are typically three Hall sensors positioned around the stator. The sensors detect the position of the rotor’s magnetic poles as they pass by, and send a signal to the motor controller indicating which coil to energize next. The motor controller then switches the current to the appropriate coil, causing the rotor to continue turning. MATLAB/SIMULINK is used to examine the dynamic properties of BLDC motors, including speed, current, and back EMF. Keywords BLDC motor · Hall sensor · PI controller · Speed control · MATLAB/ Simulink

1 Introduction Speed control of an Induction motor is required for many reasons such as improved efficiency, process control, safety, reduce mechanical stress and noise, and to extend the life of the motor and connected equipment. Speed control using Brushless DC (BLDC) motors has several benefits such as high efficiency, high power density, low M. K. Kar (B) Tolani Maritime Institute, Pune 410507, India e-mail: [email protected] S. S. Waghmare · S. Mujawar · S. Vadi AISSMS College of Engineering, Pune 411001, India e-mail: [email protected] S. Vadi e-mail: [email protected] © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 K. Murari et al. (eds.), Recent Advances in Power Electronics and Drives, Lecture Notes in Electrical Engineering 1139, https://doi.org/10.1007/978-981-99-9439-7_7

77

78

M. K. Kar et al.

maintenance, smooth and precise control, wide speed range etc. over other types of motors. For these reasons, BLDC motors are becoming increasingly popular in many applications, including automotive, aerospace, industrial automation, and consumer electronics. There are several ways to control the speed of a BLDC motor: pulse width modulation, current control, voltage control, sensor less control etc. The method used for speed control of a BLDC motor depends on the specific application and the requirements for speed control accuracy, efficiency, and cost. Both BLDC and permanent magnet synchronous motors (PMSM) are commonly used in various applications such as electric vehicles, industrial automation, and robotics. However, there are some advantages of BLDC motors over PMSM that make them a preferred choice in certain scenarios. (i) One of the main advantages of BLDC motor is their simple control structure. BLDC motors are driven by a simple trapezoidal or sinusoidal current waveform, which can be generated using a relatively simple and inexpensive motor controller. In contrast, PMSM requires a more complex control algorithm to regulate the current in the motor’s winding to maintain a constant magnetic field, which can increase the cost and complexity of the system. (ii) Another advantage of BLDC motors is their ability to operate over a wide speed range, including low speeds. PMSM motors typically require a high-speed operation to maintain the magnetic field, which can limit their performance in applications where low speeds are required. (iii) BLDC motors are also generally more robust and reliable than PMSM motors. BLDC motors have a simpler rotor structure and do not require the use of rareearth magnets, which can be expensive and prone to demagnetization. This can make BLDC motors more cost-effective and reliable in certain applications. The author proposed a fuzzy logic-based speed control method for a BLDC motor [1]. The method is tested using MATLAB/Simulink and the results demonstrate that the proposed method provides excellent speed control performance. In paper [2], the authors investigate the use of pulse width modulation technique for speed control of a BLDC motor. The method is implemented using a microcontroller and the results show that the method is effective in controlling the speed of the motor. The authors proposed an artificial neural network (ANN) and PSO based speed control method in [3] for a BLDC motor. The method is tested using MATLAB/ Simulink and the results show that the proposed method provides good speed control performance. In [4], the authors investigate the use of extended Kalman filter (EKF) for sensor less speed control of a BLDC motor. The method is implemented using a microcontroller and the results show that the method provides accurate speed control performance. The authors proposed a Model Predictive Control (MPC) based speed control method for BLDC motor in [5]. PMSM motors have a higher power density and efficiency than BLDC motors, which can make them more suitable for highperformance applications such as electric vehicles or aerospace applications. By simulating the speed control of a BLDC motor under various load situations, a PID and fuzzy based controller is used [6] to validate the control. Here, regulated voltage from an inverter is used to control the motor’s speed. For BLDC motor speed control,

Speed Control of a Brushless DC Motor Using Hall Sensor

79

a modified DE algorithm-based proportional integral (PI) controller is suggested [7]. The approach for BLDC motor speed control using DSP and Hall effect sensors is provided [8]. Artificial Neural Network (ANN) controller and PID controller are used in [9] to control the speed of brushless DC motor. By reducing the high values of overshoot and steady-state error and raising the value of rise-time, the stability indicator has been improved [10]. For the BLDC motor system, a speed control system based on ANFIS and low-resolution Hall-effect sensors is used [11]. The results of tuning a PID controller using the GWO and PSO techniques are compared, and it is clear from the findings that the proposed GWO strategy produces better dynamic performance for BLDC motors [12]. In [13, 14], the authors suggested speed control of PMSM which has a sinusoidal back-EMF waveform and requires a more complex control scheme to maintain constant torque and speed. BLDC motors, with their trapezoidal waveform, can be controlled more easily. Overall, the literatures demonstrate that there are several effective methods for speed control of BLDC motors, including fuzzy logic, PWM, ANN, Kalman filters, and model predictive control. These methods can be implemented using microcontrollers and provide excellent speed control performance, making BLDC motors an ideal choice for many applications. In this work, the speed control of BLDC motor has been accomplished using PI controller.

2 Mathematical Modeling of BLDC Motor A BLDC motor can be modeled mathematically for control and simulation purposes. The BLDC motor consists of a rotor with permanent magnets, and a stator with windings that produce a magnetic field when energized. The stator windings are typically arranged in three phases. The following equations can be used to model the motor: 1. Electromotive force (EMF) equation: e = kω

(1)

where e is the EMF generated in each phase, k is a constant that depends on the motor construction, and ω is the rotor angular velocity. 2. Torque equation: T = kτ I

(2)

T is the torque produced by the motor, kτ is a constant that depends on the motor’s construction, and I is the current flowing through the stator windings. 3. Voltage equation:

80

M. K. Kar et al.

V = RI + e

(3)

where, V is the voltage applied to the stator windings, R is the winding resistance, and e is the EMF generated in each phase. 4. The dynamics of the motor can also be included by adding a first-order differential equation for the rotor angular velocity. Rotor dynamics equation: J

dω = T − Bω − TL dt

(4)

where, J is the rotor’s moment of inertia, B is a damping coefficient, TL is the is the angular acceleration of the rotor. external load torque, and dω dt By combining these equations and simulating them, the behaviour of the BLDC motor can be modelled and its response to different control inputs and load conditions can be predicted. This model can also be used to design and optimize control algorithms for the motor, such as PID controllers or model predictive controllers. The Simulink model of the BLDC motor with Hall sensor is shown in Fig. 1.

3 Hall Sensor A Hall sensor is a device that measures magnetic fields. The Hall effect is a phenomenon where a magnetic field applied perpendicular to a current-carrying conductor generates a voltage across the conductor. A Hall sensor consists of a thin strip of semiconducting material with current passing through it. When a magnetic field is applied perpendicular to the strip, the Hall effect causes the voltage to develop across the strip. This voltage is proportional to the strength of the magnetic field. Hall sensors are used for speed sensing. Hall sensors are often used in BLDC motors to provide feedback to the motor controller about the position of the rotor. BLDC motors require a way to determine the position of the rotor in order to switch the current to the coils at the appropriate time. Hall sensors are typically installed in the motor in a way that allows them to detect the position of the rotor’s magnetic poles. There are usually three sensors spaced evenly around the stator. As the rotor rotates, the Hall sensors detect the position of the magnetic poles and send signals to the motor controller. The motor controller uses these signals to determine when to switch the power to the motor. Based on the signals from the Hall sensors, the motor controller adjusts the power supplied to the motor to maintain the desired speed. The motor controller switches the power to the motor at the correct timing to keep the rotor rotating at the desired speed. To further control the speed of the motor, a speed controller can be used. The speed controller adjusts the power supplied to the motor based on the desired speed set by the user.

81

Fig. 1 Simulink diagram of BLDC motor with Hall sensor

Speed Control of a Brushless DC Motor Using Hall Sensor

82

M. K. Kar et al.

Generally, SPWM method is used to generate PWM signal [15, 16]. But, generating a PWM signal using a Hall sensor can offer several advantages over SPWM, including higher accuracy, simplicity, reduced harmonic distortion [17, 18], and better efficiency. The Hall sensor signals are shown in Fig. 2. Figure 3 shows the Hall sensor signals for 3-phases.

4 Simulation Result and Discussion The speed response of a BLDC motor with the Hall sensor is shown in Fig. 4. The response depends on various factors, including the motor design, the quality of the Hall sensors, the motor controller’s capabilities, and the load on the motor. Generally, the response should be fast and stable, with minimal overshoot or delay in reaching the desired speed. After using Hall sensors, the speed response of a BLDC motor should be precise and consistent which is 3000 rpm. Figure 5 shows the electromagnetic torque response of a BLDC motor. The electromagnetic torque of a BLDC motor with the Hall sensor is the torque generated by the interaction between the magnetic fields of the stator and rotor. When current flows through the stator windings, it creates a magnetic field that interacts with the permanent magnets on the rotor, producing a torque that rotates the rotor. The Hall sensors provide feedback to the motor controller about the position of the rotor, allowing the controller to adjust the current and voltage to the motor’s coil in a timely and accurate manner to maintain the desired speed and torque output. The electromagnetic torque generated by a BLDC motor with Hall sensors depends on various factors, including the motor design, the number and arrangement of the stator windings and magnets, and the current and voltage applied to the motor’s coil. The torque output can be optimized through control algorithms that adjust the current and voltage to the motor’s coils to maximize the electromagnetic torque output while minimizing losses due to flux leakage and eddy currents. The electromagnetic torque of a BLDC motor with Hall sensors is an essential factor in determining the motor’s performance, efficiency, and suitability for a particular application. Figure 6 shows the response of the stator current. The current control techniques that adjust the current to the motor’s coils based on the Hall sensor feedback, such as pulse-width modulation (PWM) or current regulation. The quality of Hall sensors and the motor controller’s capabilities also play a crucial role in determining the stator current response of a BLDC motor with Hall sensors. Figure 7 shows the response of stator back EMF of a BLDC motor with the Hall sensor. The stator back EMF is generated by the interaction between the magnetic fields of the stator and rotor, which changes as the rotor rotates and the magnetic fields vary. The response of the stator back EMF of a BLDC motor with Hall sensors is important for determining the motor’s speed and position. As the rotor rotates, the Hall sensors provide feedback to the motor controller about the position of the rotor, which allows the controller to adjust the current and voltage to the motor’s coil in a timely and accurate manner. This adjustment allows the motor to maintain a consistent speed and position, with minimal variation in the stator back EMF.

Fig. 2 Hall sensor signals ((i ) h a (ii ) h b , (iii ) h a ∗ h b , (i v) h a , ∗ h b )

Speed Control of a Brushless DC Motor Using Hall Sensor 83

Fig. 3 Hall sensor signal for 3-phases ((i ) Ha − Ha , (ii ) Hb − Hb , (iii ) Hc − Hc ,)

84 M. K. Kar et al.

Speed Control of a Brushless DC Motor Using Hall Sensor

Fig. 4 Rotor speed response

Fig. 5 Electromagnetic torque (N-m) response

85

86

Fig. 6 Response of stator current

Fig. 7 Response of stator back EMF

M. K. Kar et al.

Speed Control of a Brushless DC Motor Using Hall Sensor

87

5 Conclusion The speed control of the BLDC motor using Hall sensor is achieved using MATLAB/ SIMULINK environment. This allows them to be used in a wide range of applications, from small hobby motors to large industrial equipment. Different motor parameters such as rotor speed, electromagnetic torque, stator current, and stator back EMF waveform are observed. It is clear from the obtained result that the use of the Hall sensor enhances the performance of the BLDC motor. The advantages of using a BLDC motor with Hall sensors include high efficiency, low maintenance, high torque-to-weight ratio, smooth and quiet operation, precise speed and position control, wide speed range application etc. Overall, the use of Hall sensors in BLDC motors provides many advantages over brushed DC motors, making them a popular choice for a wide range of applications.

References 1. Sriram J, Sureshkumar K (2014) Speed control of BLDC motor using fuzzy logic controller based on sensorless technique. In: 2014 International Conference on Green Computing Communication and Electrical Engineering (ICGCCEE), March 2014. IEEE, pp 1–6 2. Lin YK, Lai YS (2011) Pulsewidth modulation technique for BLDCM drives to reduce commutation torque ripple without calculation of commutation time. IEEE Trans Ind Appl 47(4):1786–1793 3. Ramya A, Balaji M, Kamaraj V (2019) Adaptive MF tuned fuzzy logic speed controller for BLDC motor drive using ANN and PSO technique. J Eng 2019(17):3947–3950 4. Terzic B, Jadric M (2001) Design and implementation of the extended Kalman filter for the speed and rotor position estimation of brushless DC motor. IEEE Trans Ind Electron 48(6):1065–1073 5. Xia K, Ye Y, Ni J, Wang Y, Xu P (2019) Model predictive control method of torque ripple reduction for BLDC motor. IEEE Trans Magn 56(1):1–6 6. Suganthi P, Nagapavithra S, Umamaheswari S (2017) Modeling and simulation of closed loop speed control for BLDC motor. In: 2017 Conference on Emerging Devices and Smart Systems (ICEDSS), March 2017. IEEE, pp 229–233 7. Jigang H, Hui F, Jie W (2019.) A PI controller optimized with modified differential evolution algorithm for speed control of BLDC motor. Automatika: cˇ asopis za automatiku, mjerenje, elektroniku, raˇcunarstvo i komunikacije 60(2):135–148 8. Wu HC, Wen MY, Wong CC (2016) Speed control of BLDC motors using hall effect sensors based on DSP. In: 2016 International Conference on System Science and Engineering (ICSSE), July 2016. IEEE, pp 1–4 9. Mamadapur A, Mahadev GU (2019) Speed control of BLDC motor using neural network controller and PID controller. In: 2019 2nd International Conference on Power and Embedded Drive Control (ICPEDC), August 2019. IEEE, pp 146–151 10. Anshory I, Hadidjaja D, Sulistiyowati I (2021) Measurement, modeling, and optimization speed control of BLDC motor using fuzzy-PSO based algorithm. J Electr Technol UMY 5(1):17–25 11. Wang MS, Chen SC, Shih CH (2018) Speed control of brushless DC motor by adaptive networkbased fuzzy inference. Microsyst Technol 24:33–39 12. Dutta P, Nayak SK (2021) Grey wolf optimizer based PID controller for speed control of BLDC motor. J Electr Eng & Technol 16:955–961

88

M. K. Kar et al.

13. Yadav R, Kar MK, Singh AK (2022) Speed control of a three-phase IM with closed-loop control scheme. In: Recent advances in power electronics and drives: select proceedings of EPREC 2021. Springer Nature Singapore, Singapore, pp 43–55 14. Yadav R, Kar MK, Singh AK (2021) Controlling speed of a permanent magnet synchronous machine using closed loop control scheme. In: 2021 emerging trends in industry 4.0 (ETI 4.0), May 2021. IEEE, pp 1–6 15. Tripathi SS, Kar MK, Singh AK (2022) Comparative THD analysis of multilevel inverter using different multicarrier PWM schemes. In: Recent advances in power electronics and drives: select proceedings of EPREC 2021. Springer Nature Singapore, Singapore, pp 69–79 16. Tripathi SS, Kar MK, Singh AK (2022) Comparative THD analysis of multi-level inverter using SPWM scheme. In: Smart structures in energy infrastructure: proceedings of ICRTE 2021, vol 2. Springer Singapore, pp 41–47 17. Kar MK, Kumar S, Singh AK (2022) Power quality improvement of an interconnected grid system using PWM technique of D-STATCOM. In: Recent advances in power electronics and drives. Lecture notes in electrical engineering, vol 852. Springer, Singapore. https://doi.org/ 10.1007/978-981-16-9239-0_3 18. Kar MK, Rout B, Moharana JK (2014) Improvement of power factor of a grid connected load system using a static compensator. J Found Appl Phys 1(1):5–10

Implementation of Multifunctional Electric Vehicle Charger Based on ANFIS with Solar PV Array Othuru Baba, S. Hussain Vali, Vempalle Rafi, and R. Kiranmayi

Abstract This article describes the development of a grid-connected, home-based electric vehicle (EV) charger that meets the demands of an EV, household loads, and the grid. The charger is powered by solar photovoltaic (PV) arrays. The charger is built inside a solar panel array so it may operate independently while providing uninterruptible power and charging home loads. Nonetheless, the grid linked mode of operation is possible if there is no or inadequate PV array generation. Synchronization and smooth mode switching management assist the charger, enabling automatic grid connection and disengagement without interfering with household supplies or EV charging. In order to maintain local loads, the charger also offers active/reactive power assistance from V2G and power transfer from V2H. Moreover, the charger is set to operate as an active power filter, keeping the grid current’s total harmonic distortion (THD) to less than 5% and maintaining a unity power factor (UPF). An adaptive neuro-fuzzy inference system (ANFIS) is utilised to regulate the dc-link voltage as part of an energy management method that is based on dc-link voltage regulation. The sinusoidal reference grid current is supplied by a second-order generalised integrator frequency locked loop with dc offset rejection (SOGI-FLL-DR) for efficient operation under distorted voltage settings. Keywords ANFIS · Electric vehicle · Solar PV generation · Power quality · Active power · Reactive power

O. Baba · S. H. Vali · V. Rafi (B) Department of Electrical Engineering, JNTUA College of Engineering, Pulivendula, Andhra Pradesh 516390, India e-mail: [email protected] R. Kiranmayi Department of Electrical Engineering, JNTUA College of Engineering, Anantapuramu, Andhra Pradesh, India e-mail: [email protected] © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 K. Murari et al. (eds.), Recent Advances in Power Electronics and Drives, Lecture Notes in Electrical Engineering 1139, https://doi.org/10.1007/978-981-99-9439-7_8

89

90

O. Baba et al.

1 Introduction Electric vehicle (EV) is gaining traction as viable alternative for nonrenewable fuel-powered autos. However, charging infrastructure for EVs is critical. Electricity required to charge electric vehicles is particularly energy-intensive and is frequently generated by coal- and gas-fired power plants. As a result, EVs may be the pollution free alternative to today’s transportation provided the required energy to charge them comes from flow resources such as solar, wind and other comparable sources. The fact that this sort of charging station uses solar power that is generating and using locally is advantageous. As a consequence, no upgrades to transmission lines are required to accommodate the enormous power. When energy prices are high, the charging station is not required to utilize the grid. It has been recommended that solar PV panels be installed on office buildings and parking lots. Removing the dc–dc converter step decreases the number of power stages by one, simplifies the circuit, and lowers the price of converter reduces without decreasing the solar PV performance. The converter must be utilised for other reasons in order to boost the charger’s working efficiency while the EV battery is not placed for charge. However, the available literature employs a number of converters and controllers for a range of operating modes. Furthermore, the charger’s operational capacity is limited by the grid’s accessibility, how modes are switched between them, and other aspects that affect the charger’s operational efficacy [1–4]. The promptness and precision of the dc-link voltage controller, on the other hand, affect how effectively the energy management strategy works. Using an ANFIS controller, unified control maintains the dc-link voltage in a three-phase power converter. In many other publications, PI controller used to manage the dc bus voltage in a manner similar to this. As a result, tuning the ANFIS controller to accommodate unforeseen disturbances while it is operational is difficult. The dc-link voltage control in this research employs an adaptive neuro-fuzzy inference method to improve the system’s dynamic and steady-state performances (ANFIS). ANFIS is well-known for its exceptional resistance to disruptions and unpredictability, such as unexplained dissimilarity in control variables and system characteristic [5–10]. Figure 1 depicts the circuit architecture of the given charging mechanism. This gadget integrates a solar PV array into the VSC’s de-link, transforming it into a 1phase two directional EV charger. The system feeds solar PV and EV battery power onto the grid while also charging the EV battery with grid and solar PV power. In this charger’s two-stage design, a two way ac-dc conversion step is follows by a two way dc–dc conversion stage. When sending PV power and EV electricity to the grid, the ac-dc conversion stage acts as the inverter, converting the dc voltage to the ac voltage. While charging the EV battery, it also converts the input ac voltage to dc voltage. The output of the two directional dc–dc converter is linked to the EV battery (BDDC). The charger’s dc–dc converter does all of the necessary operations [11–17]. When the EV battery is being drained, the dc converter functions in boost mode, and when it is being recharged, it operates in buck mode.

Implementation of Multifunctional Electric Vehicle Charger Based …

91

Vpv

vg

S1 vs is

ih

igg L Rf Cf

PCC

S5 Iev

RfLc Cf

E

230V,50Hz Single Phase Supply

S3

Vd S2

S4

Cdc S6

Lb

cb

Bidirectional AC-DC Bidirectional DC-DC Converter Converter

Fig. 1 Charger circuit topology

PV array ipv Additionally, it controls the dc bus voltage and maximizes the power provided by the solar PV array. The coupling inductor connects the charger to the grid (Lc). Harmonics be required to remove in order to smooth the grid current. To stop switching harmonics produced by the VSC from being injected to the grid, a ripple filter is additionally attached at Point of Common Coupling.

2 Problem Formation Figure 2 depicts an energy management flowchart under various working states expressed. In the grid-connected mode, steady-state energy management is as follows: PP V ± PB ± Pg − Ph = 0

(1)

Power from the PV array, EV, household load and the grid are represented as PPV , PEV , Ph , and Pg , respectively. The positive power in this phrase indicates generation of power, whereas the negative power indicates power utilization. That the grid and the EV may both create and consume energy. As a result of fluctuations in the solar irradiance, home load and the current for EV charging the charger suffers a transient in the grid mode operation. The change in PV array power should have no effect on EV battery charging/discharging or residential supply because it only impacts grid power. As a result, a number of things happen in order to reach the system’s energy equilibrium during an irradiance shift. Irradiance ↑↓→ PP V ↑↓→ dc - link power ↑↓

92

O. Baba et al.

Fig. 2 Flowchart of energy management and operation strategy

→ Vdc ↑↓→ Vdc regulation → I P ↑↓→ i g∗ ↑↓→ i g ↑↓

(2)

In standalone mode, the energy management is provided as, PP V ± PE V − Ph = 0

(3)

The change in home demand and solar irradiation both affect the energy balance in standalone mode, just like they do in grid-connected operation. However, because dc-link voltage is modified by EV battery, it adjusts for any power interruptions. Energy management is achieved under household load changes is given as, i h ↑↓→ dc - link power PP V ↑↓→ Vdc ↑↓ → Vdc regulation → I E V ↑↓→ I E V ↑↓

(4)

3 Methodology To maintain uninterrupted electricity to the house while the electric car is being charged. Control is therefore designed in a way that permits multifunctional operation. The control is primarily bifurcated as islanded and grid linked modes, as in Fig. 3 (GCM). The active and reactive powers, along with the V2H and V2G modes,

Implementation of Multifunctional Electric Vehicle Charger Based …

93

Fig. 3 VSC in combined control

are all covered by two main controllers. Methods for integrated bi-directional control of islanded and grid connected dc–dc converters are investigated. A. Grid connected mode To regulate the flow of active and reactive power and produce pulsating pulses for the VSC the GCM mode controls the dc link voltage and grid current. ANFIS is used in this project to balance the MPPT and dc-link voltage of a PV array. The expression for voltage error is, ∗ e = Vdc − Vdc

(5)

The expected current is given as using the sliding surface as, P + ,S>0

Id = { Pdc− ,S0.1V δ = {.1,ve 1

(9)

9-level Symmetrical and 21-Level Asymmetrical MLI The two-module generalized MLI is considered for analysis purposes. It consists of 10 switches, 2 sources, and 2 diodes. Based on the generalized equation, it is

A Generalized Symmetrical and Asymmetrical Multilevel Inverter …

127

Fig. 3 Current flow path: a 2 V mode; b V mode; c 4 V mode; d 3 V mode

able to generate 9 level and 21 level under symmetrical and asymmetrical sources respectively. The current flow path through the proposed topology for symmetrical source is shown in Figs. 3 and 4. For V voltage level, the one source is connected to the load through the current path V-S 1 -L-S 6 -S 4 -S 2 -D3 -S 1 -V. Similarly, for 2 V voltage level, two voltage sources are connected through the switches to the load (V-S 1 -L-S 6 -S 4 -S 2 -S 3 -V-S 1 -V ). Then the current flow path for other voltage levels is shown in Fig. 4. Based on the analysis, the switching signals are provided for both symmetrical and asymmetrical topologies in Tables 1 and 2, respectively. Figure 5 shows the current flow path for different levels under the asymmetrical mode. The 4 V voltage level is achieved by connecting the V 3 source across the load through the current path V 1 -S 1 -L-S 6 -S 4 -V 3 -V 1 . Similarly, 6 V voltage level is connected through the load by the path (V 1 -S 1 -L-S 5 -V 2 -D4 -S 4 -V 3 -V 1 ). Comparison Analysis. The comparative analysis of the proposed MLI topology with recently introduced circuit to prove its novelty configuration. The component count per level is the

128

R. Duraisamy and T. Venkatraman

Fig. 4 Current flow path: a −V mode; b −2 V mode; c −3 V mode; d −4 V mode Table 1 Switching states for 9-level symmetrical topology Levels

Switches S1

S2

S3

S4

S5

S6

S7

S8

S9

S 10

+4 V

1

0

0

1

1

0

1

1

1

1

+3 V

1

0

0

1

1

0

1

1

1

0

+2 V

1

0

0

1

0

1

1

0

0

0

+V

1

0

0

1

0

1

1

0

0

0

0

1

0

1

0

1

0

0

0

0

0

−V

0

1

1

0

1

0

1

0

0

0

−2 V

0

1

1

0

1

0

1

0

1

0

−3 V

0

1

1

0

0

1

1

1

1

0

−4 V

0

1

1

0

0

1

1

1

1

0

A Generalized Symmetrical and Asymmetrical Multilevel Inverter …

129

Table 2 Switching states for 21-level asymmetrical topology Levels

Switches S1

S2

S3

S4

S5

S6

S7

S8

S9

S 10

+10 V

1

0

0

1

1

0

1

1

1

1

+9 V

1

0

0

1

1

0

0

1

1

1

+8 V

1

0

0

1

1

0

1

0

1

1

+7 V

1

0

0

1

1

0

0

0

1

1

+6 V

1

0

0

1

1

0

0

1

0

1

+5 V

1

0

0

1

1

0

1

0

0

1

+4 V

0

1

0

1

1

0

0

0

0

1

+3 V

1

0

0

1

0

1

0

0

1

0

+2 V

0

1

0

1

1

0

0

1

0

0

+V

1

0

0

1

0

1

1

0

0

0

0

0

1

0

1

0

1

0

0

0

0

−V

0

1

1

0

1

0

1

0

0

0

−2 V

1

0

1

0

0

1

0

1

0

0

−3 V

0

1

1

0

1

0

0

0

1

0

−4 V

1

0

1

0

0

1

0

0

0

1

−5 V

0

1

1

0

0

1

1

0

0

1

−6 V

0

1

1

0

0

1

0

1

0

1

−7 V

0

1

1

0

0

1

0

0

1

1

−8 V

0

1

1

0

0

1

1

0

1

1

−9 V

0

1

1

0

0

1

0

1

1

1

−10 V

0

1

1

0

0

1

1

1

1

1

generalized critical parameter used to compare its effectiveness. So, the mathematical equation is ComponentCountperLevel(CCpL) =

N SW + N S + N D + NC L

(10)

N sw —number of switches N s —number of sources N D —number of diodes N c —number of capacitors. Table 3 shows the proposed topology has the least components compared to other research papers; therefore, its size, cost, and complexity are reduced.

130

R. Duraisamy and T. Venkatraman

Fig. 5 Current flow path: a V mode; b 4 V mode; c 6 V mode; d 10 V mode; e −6 V mode; f − 4 V mode

A Generalized Symmetrical and Asymmetrical Multilevel Inverter …

131

Table 3 Comparison of proposed topology with other configurations Parameters

[13]

[12]

[11]

[10]

[9]

[8]

[7]

[6]

Proposed

Level

13

11

13

11

15

15

17

17

21

No. of switches

11

9

14

10

9

10

14

10

10

No. of diodes

0

0

0

0

0

0

0

2

2

No. of sources

2

1

1

1

3

3

4

3

4

No. of capacitors

2

2

3

2

0

0

4

0

0

Total no. of component

15

12

18

13

12

13

22

15

16

CCpL

1.153

1.09

1.385

1.18

0.792

0.866

1.294

0.882

0.761

3 Simulation Results The two-module generalized topology is considered for simulation purpose. It consists of 10 unidirectional switches, four sources, and two diodes. The performance of topology is verified by MATLAB/Simulink in both symmetrical and asymmetrical cases. In symmetrical MLI, the voltage sources are equal (V1 , V2 , V3 and V4 are 10 V). The nine-level staircase sinusoidal waveform is generated with the help of symmetrical sources. The circuit is tested under resistive and inductive loads (R = 20 Ω and L = 10 mH) to prove its topology suitable for electric drive applications. The 9-level voltage and current waveforms are shown in Figs. 6 and 7. In asymmetrical MLI, the voltage sources are selected in the ratio of 1:2:3:4 (V1 = 10 V, V2 = 20 V, V3 = 30 V, V4 = 40 V). The 21-level staircase output is produced with the help of asymmetrical sources. The corresponding waveform is depicted in Figs. 8 and 9. The control signals for the switches are generated by the Nearest Level Control (NLC) algorithm technique as per the switching table. As per the FFT

Fig. 6 9-level MLI: a voltage waveform for R = 20 Ω; b current waveform for R = 20 Ω

132

R. Duraisamy and T. Venkatraman

Fig. 7 a Current waveform of 9-level MLI for R = 20 Ω and L = 10mH; b FFT analysis for 9-level MLI

analysis, the Total Harmonic Distortion (THD) for 9-level voltage output has 9.35% while 21-level output has 3.90%. In the above discussion, the THD is reduced drastically due to increase in levels under the asymmetrical case and satisfy IEEE 519 standards, therefore the quality of waveform is improved. Then the filter is not needed which leads to reduction in size and decrease in cost.

Fig. 8 21-level MLI: a voltage waveform for R = 20 Ω; b current waveform for R = 20 Ω

Fig. 9 a Current waveform of 21-level MLI for R = 20 Ω and L = 10mH; b FFT analysis for 21-level MLI

A Generalized Symmetrical and Asymmetrical Multilevel Inverter …

133

4 Conclusion A compact generalized multilevel inverter topology has been proposed in this paper. The effectiveness has been proved by simulating two-module 9-level symmetrical and 21-level asymmetrical MLI in the MATLAB/Simulink environment. The generalized equations are derived to calculate the number of switches, sources, diodes, and levels for extended module MLI. The THD analysis of voltage waveform for 9-level MLI and 21-level MLI are simulated. By comparing the number of switching devices, sources, capacitors, and CCpL with recently introduced topologies to prove its superiority. Based on the analysis, it perfectly fits renewable energy and electrical drive applications.

References 1. Panda A, Panda G (2023) Modular multilevel inverter configuration with lesser switch counts. In: 4th International Conference on Energy, Power and Environment (ICEPE). IEEE 2. Thiyagarajan V (2020) Simulation analysis of 51-level inverter topology with reduced switch count. Mater Today: Proc 33:3870–3876 3. Radha, Bhargava V, Singh B (2021) 21-level CSD based solar multilevel inverter fed induction motor drive. In: 4th international conference on Recent Development in Control, Automation and Power Engineering (RDCAPE). IEEE, pp 269–275 4. Raval KY, Ruvavara VJ (2018) Novel multilevel inverter design with reduced device count. In: Proceeding of 2018 IEEE international conference on current trends toward converging technologies. IEEE, Coimbatore, pp 1–4 5. Duraisamy R, Venkatraman T (2022) Modified modular multilevel inverter topology for photovoltaic applications. In: 2022 International Conference on Computer, Power and Communications (ICCPC), IEEE, Chennai, pp 531–536 6. Dhanamjayulu C, Meikandasivam S (2017) Implementation and comparison of symmetric and asymmetric multilevel inverters for dynamic loads. IEEE Access 6:738–847 7. Dhanamjayulu C, Padmanaban S (2021) Design and implementation of seventeen level inverter with reduced components. IEEE Access 9:746–760 8. Dhanamjayulu C, Padmanaban S (2020) Design and implementation of a single-phase 15-level inverter with reduced components for solar PV applications. IEEE Access 9:581–595 9. Abbas Q, Majid A (2017) Design and analysis of 15-level asymmetric multilevel inverter with reduced switch count using different PWM techniques. In: 2017 international conference on frontiers of information technology. IEEE, pp 333–339 10. Ali M, Chakrabortty RK (2021) 11-level operation with voltage-balance control of WE-type inverter using conventional and DE-SHE techniques. IEEE Access 9:317–428 11. Kim K-M, Han J-K, Moon G-W (2021) A high step-up switched-capacitor 13-level inverter with reduced number of switches. IEEE Trans Power Electron 36:2505–2510 12. Ali M, Sarwar A (2022) A 13-, 11-, and 9-level boosted operation of a single-source asymmetrical inverter with hybrid PWM scheme. IEEE Trans. Ind. Electron 69:817–830 13. Samadaei E, Kaviani M, Bertilsson K (2019) A 13-levels module (K-type) with two DC sources for multilevel inverters. IEEE Trans. Ind. Electron 66:5186–5200

Comprehensive Analyses of Control Techniques in Dual Active Bridge DC–DC Converter for G2V Operations Sudipta Baidya and Akanksha Shukla

Abstract Power conversion via high-frequency link (HFL) using DC–DC converters is gaining gradual popularity in Electric Vehicles (EVs) and the power sector due to their high power density, lightweight, cost-effectiveness, and reliability without conciliatory efficiency. One such promising DC–DC converter that combines bidirectional ability with energy storage and isolation is the dual active bridge (DAB). This paper presents the outcome of various control methodologies on the peak inductor current, primary and secondary side voltage of the HF transformer, and output power of a DAB converter. This converter regulates power flow in both directions by employing phase shift techniques. The traditional control techniques can be categorized as single-phase shift (SPS), dual-phase shift (DPS), and triplephase shift (TPS). Closed-loop controlling and simulation results for all three control techniques are presented here along with a comparative analysis. It is observed that with an increase in the degree of freedom of control, both peak inductor current and switching stress reduce. As the degree of control increases, so does the overall performance of the DAB converter. Keywords DC–DC converters · Bidirectional · Dual active bridge · Control techniques · Efficiency · Power conversion · Single-phase shift · Dual-phase shift · Triple-phase shift

1 Introduction Transportation is essential in today’s world for connecting people from one location to another. As a result, vehicles are needed to assist with daily transportation. On the other hand, internal combustion engine (ICE) vehicles are the main sources of air S. Baidya (B) · A. Shukla Department of Electrical Engineering, SVNIT, Surat 395007, India e-mail: [email protected] A. Shukla e-mail: [email protected] © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 K. Murari et al. (eds.), Recent Advances in Power Electronics and Drives, Lecture Notes in Electrical Engineering 1139, https://doi.org/10.1007/978-981-99-9439-7_11

135

136

S. Baidya and A. Shukla

pollution. Electric vehicles are becoming more and more popular with customers, researchers, and engineers as a solution to the growing environmental problems and over-dependence on crude oil as a replacement for a transportation system based on petroleum, automobile firms are now concentrating on creating electric automotive infrastructure [1]. Further, with the increased penetration of renewables like solar and wind of which solar is the prominent one, the requirement of DC–DC power electronic converters is also increasing. Isolated and non-isolated converters with a wide range of uses in renewable energy generation systems are currently available. However, when it comes to performance and efficiency, isolated DC–DC converters outperform non-isolated converters. Other advantages include galvanic isolation, a high conversion ratio, energy storage ability, and circuit protection. The bidirectional nature of such converters validates their use in DC microgrids [2], electric vehicles [3], battery charging and discharging, aircraft [4], UPS, photovoltaic systems [5], and other applications. The DAB converter is the most used isolated bidirectional DC topology to interface EV and fuel-cell applications [6]. DAB is a bidirectional DC–DC converter that was first described by De. Doncker in 1988 [7]. A typical dual active bridge consists of an HF transformer and Hbridges on both the high-voltage (primary) and low-voltage (secondary) sides of the transformer. All power switch generally considers a duty ratio of 0.5 and has the capability to produce two square voltages, both on the primary and secondary sides. The transformer keeps the two H-bridges separate and makes sure that their voltages remain the same. The instantaneous energy storage element is the transformer’s leakage inductance. Power flow can be possible in both directions. and the side can be considered as the primary or secondary one [8]. The HF transformer used in a dual active bridge contributes to the converter’s small size in applications such as those proposed in [9]. A dual active bridge is suitable for energy storage systems, EVs, and renewable integration to the grid due to the advantages of energy storage capability, isolation, bidirectional power transfer, high power density, and the easy soft-switching execution without the use of extra passive components [10]. The control mechanisms used here range from basic to complicated. Three different control types are available, i.e. single-phase shift, dual-phase shift, and triple-phase shift. SPS provides the simplest control mechanism of the three methods, having just one degree of freedom [11]. SPS control has become quite popular as a result of its advantages, such as high dynamic response, low inertia, and simplicity of implementation of soft-switching control [12]. When the primary and secondary voltages are the same, the converter is capable of achieving high efficiency [13]. DPS modulation with D1 and D2 has two degrees of freedom. It has various advantages in terms of Zero Voltage Switching (ZVS) range, circulating reactive power drop, and increased efficiency, particularly at light loads [14, 15]. Additionally, it is observed that reducing reactive power can increase the DAB converter’s efficiency even more, which inspired the development of the TPS control method. With this strategy, each of the three degrees of freedom D1 , D2 , and D3 can individually regulate the three degrees of freedom. It is the most complex method of controlling a dual active bridge converter. The primary goal is to minimize reactive power as well as transformer current since we must develop

Comprehensive Analyses of Control Techniques in Dual Active Bridge …

137

the power equations. The performance seen here is superior to both SPS and DPS control; however, TPS control implementation is exceedingly difficult [16, 17]. The literature presents different techniques to select the optimum phase shift for all the aforementioned control methodologies. The Lagrange Multiplier Method (LMM) is used to find the best value for the phase shifts in the DPS technique. The phase shift optimal values of D1 , D2, and D3 are obtained using the Karush–Kuhn–Tucker (KKT) method [18]. Transformer voltage and its harmonic components are analyzed by Generalized Average Modeling (GAM) for a DAB converter [19]. Many researchers have also established the inductor current and phase shift equations for the reduction of reactive power. However, the researchers have attempted to determine the optimal phase shift values for different objectives like minimization of reactive power and the leakage inductor current. However, there is still the requirement to establish a general method for determining the phase shifts as per the desired objective. The objectives of the study carried out are detailed below • Description of single-phase shift, dual-phase, and triple-phase shift techniques with efficient closed-loop control to find the optimum phase shifts. • Development of closed-loop control methodology with an objective to achieve constant-voltage charging. • Comparative analysis of the three techniques to better comprehend their benefits and drawbacks. The closed-loop control employs a proportional–integral (PI) controller to achieve optimum phase shifts for all three techniques. The controller also ensures to obtain reduced switching stress, peak inductor current, and ripples in the output voltage of the converter. Dynamic simulations are carried out to demonstrate the efficacy of the developed control mechanism. The paper is structured as follows: In Sect. 2, the basic principle of the DAB converter is described followed by the description of the control methodology in Sect. 3. In Sect. 4, closed-loop operation is discussed. Results and discussions for three control techniques are presented in Sects. 5 and 6 concludes the work.

2 DAB Converter DAB converter is shown in Fig. 1a. It consists of two H-bridge circuits (H bridge-1 and H bridge-2), a filter inductor, and an HF transformer. Both H-bridges comprise four self-commutating power semiconductor switches (IGBTs/MOSFETs). The filter inductor reflects the input side transformer equivalent leakage inductance. This element L is important for power transfer through the converter. Other advantages of this converter include a high-voltage transfer ratio, galvanic isolation, high power density, and high efficiency. The first DC input (V in ) is applied to H-Bridge-1 of the DAB converter, which converts it into square-waveform with high conversion voltage ratio V ab by switching the switches (S 1 , S 4 ) for half of the switching cycle (T s ) and the other switches (S 2 ,

138

S. Baidya and A. Shukla

Fig. 1 DAB converter a topology and b equivalent power system analogy

S 3 ) for the other half. Through HFT and the filter inductor, this voltage V ab is shifted to the secondary side of the H-bridge. Galvanic isolation is a feature a of single-phase high-frequency transformers. The voltage is scaled at a turn ratio of N:1 and voltage gain (d) is defined as NV 2 /V 1 . The required DC supply is provided by H-bridge-2 on the secondary side [20]. The active power is controlled by varying the D3 value of two H-bridges. Reactive power is controlled by changing the values of D1 and D2 between the H 1 Bridge and the H2 Bridge. So, the DAB converter can be controlled in three different ways. Equation (1) provides the inductor voltage at various switching instants. Table 1 presents a generalized equation for the inductor voltage for these different switching instants. This table helps understand how the inductor voltage changes at specific points in time, aiding in the analysis and design of the circuit. Vlm = Vpri − Vsec , = Vab − Vcd ,

(1)

where Vsec , denotes the secondary voltage on the primary side. The relationship between input and output voltage at boundary condition (V 1 = NV 2 ) is given by

Comprehensive Analyses of Control Techniques in Dual Active Bridge …

139

Table 1 DAB switching sequence Mode

Interval

Active switches

Inductor current waveform

Governing equation

Mode I

[t 0 , t 1 ]

S 1 , S 4 and S 6 , S 7

Both positive and negative

di dt

=

Mode II

[t 1 , t 2 ]

S 1 , S 4 and S 5 , S 8

Positive

di dt

=

Mode III

[t 2 , t 3 ]

S 2 , S 3 and S 5 , S 8

Both positive and negative

di dt

=

Mode IV

[t 3 , t 4 ]

S 2 , S 3 and S 6 , S 7

Negative

di dt

=

V2 =

V1 +N V2 L lk V1 −N V2 L lk V2 − V1 +N L lk V2 − V1 −N L lk

V1 (1 − 2D) N

(2)

The most important parameter choice of leakage inductor is given by Eq. 3 L lk =

N V1 V2 φ(π − φ) 2π 2 f s P0

(3)

The required phase shift to transfer power is given by / ( ) π 8 × f s × L lk × P0 φ = × 1− 1− 2 N × V1 × V2

(4)

The value of capacitance to maintain the voltage ripple within the desired range by Eq. 5. C

) ( V1 V2 dV2 φ = − φ 1− dt XL π R

(5)

3 Control Strategies 3.1 SPS Control The most popular DAB control mechanism is SPS control. The associated switches S 1 –S 4 and S 5 –S 8 produce square-wave gate signals with a duty ratio of 50%. Fullbridges H1 and H2 have a corresponding alternating voltage of V ab and V cd , correspondingly, while the current through inductor L is iL . Only one phase-shift ratio (ϕ or D3 ) is controlled here. The inductor voltage can be changed by modifying the ϕ value between V ab and V cd . The phase shift ratio ϕ can easily control the power flow’s direction and its amplitude, where the +ve value of ϕ indicates the charging of the battery and −ve value of ϕ is for discharging of the battery [21]. The complete voltage and current waveforms are shown in Fig. 2. When the voltage magnitude of

140

S. Baidya and A. Shukla

Fig. 2 Inductor current (iL ), primary voltage (V pri ), secondary voltage (V sec ), and waveform in SPS control

the primary side and secondary sides is mismatched, both the peak and RMS inductor current rise [17]. Furthermore, in this case, the converter cannot work within ZVS range. Therefore, the power loss rises intensely, and efficiency decreases [22]. The output power is expressed as P0(SPS) =

N V1 V2 D(1 − D) 2 f s L lk

(6)

3.2 DPS Control This control algorithm has two phase shifts, i.e. an identical phase shift between halfbridge (D1 or D2 ) and phase shift between the primary and secondary sides of the HF transformer (D3 ). This provides the flexibility of using two control parameters to control the state variables, which was not possible in SPS. To minimize the circulating current in addition to D3 , another degree of freedom is present. There are two possible approaches: one is to control D1 or D2 based on the voltage gain, and another option is to control both D1 and D2 but with an imposed condition that is D1 = D2 . This phase shift value is defined by D1 and D2 ranges varying from 0 to 1. The dual-phase shift control can be converted to single-phase shift control by simply changing the value of D1 = D2 = 1and output power can be obtained.

Comprehensive Analyses of Control Techniques in Dual Active Bridge …

141

Fig. 3 Inductor current (iL ), primary voltage (V pri ), secondary voltage (V sec ), waveform in DPS control

As shown in Fig. 3, the switching loss is reduced when the zero voltage is matched or three levels of voltage (+V 1 , 0 and −V 1 ) reach the high-voltage side compared to the SPS mode. The only source of the output fluctuations in the DAB converter may be reactive power. DC-link capacitor is necessary to withstand these fluctuations. The losses in a transformer directly change with the square of the inductor current RMS value [15]. The output power is expressed as (0 < D1 < D2 < 1) P0(DPS) =

N V1 V2 D2 (1 − D2 − 0.5D12 ) 2 f s L lk

(7)

3.3 TPS Control Circulating current (or reactive power) is a major concern for dual active bridge converters. In DPS control, D1 = D2 = 1 and D3 is controlled to achieve the desired output voltage. Over a period of time, iL approaches a negative value. Inductor current

142

S. Baidya and A. Shukla

contributes to reactive power or reverse power in a dual active bridge converter, and iL must maintain its position in the positive cycle. In the case of triple-phase shift, each variable D1 , D2 , and D3 is controlled independently. TPS control is capable of eliminating reactive power to a degree. It is extremely challenging to control all three variables in this situation. These variables must be selected so that the power factor is maximized and the inductor current is minimized. As shown in Fig. 4, both the primary and secondary side voltage has three levels of voltage (+V 1 , 0 and −V 1 ) along with some phase shifts in terms of D1 , D2 , and D3 . The optimal values of D1 , D2 , and D3 are obtained by minimizing the amplitude of the fundamental component of current through the inductor iL [23], or minimizing fundamental reactive power. TPS control allows for full soft switching across the entire load range while reducing peak current through an inductor. At low loads, this modulation scheme also results in the minimum amount of copper and conduction losses, thus the converter achieves high efficiency. The output power is given as P0(TPS) =

Fig. 4 Inductor current (iL ), primary voltage (V pri ), and secondary voltage (V sec ) waveform in TPS control

N V1 V2 2 (D − D1 D2 + 2D1 − 2D1 D3 ) 4 f s L lk 1

(8)

Comprehensive Analyses of Control Techniques in Dual Active Bridge …

143

Fig. 5 Closed-loop control strategy of DAB

4 Closed-Loop Control The dual active bridge converter working in charging mode is shown in Fig. 5. In closed-loop operation, the output voltage V 2 is controlled in constant voltage (CV) mode by generating the switching pulse. The load voltage V 2 is maintained at a fixed value using a proportional–integral (PI) controller. Df is regarded as the main control parameter, which is the phase difference between the fundamental components of Vab and Vcd. The fundamental phase shift Df = D3 + D2 /2 – D1 /2 and phaseshifted delay is generated for the SPS, DPS, and TPS techniques. Df is also used to determine which switching mode is used [24]. The optimized modulation outline is used to calculate the inner degree of freedom D1 and D2 . The inner duty ratio calculation is accomplished in the simplest form by regulating D1 and D2 to achieve optimal values by slow control loops. Each switch has a duty ratio of 0.5. In the case of the SPS technique, the phase shift D1 = D2 = 1 is considered, and only D3 is varied to generate pulses for secondary side switches. In the DPS technique, two phase shifts (D1 or D2 and D3 ) are generated to give the switching pulses to switch S 5 and S 8 .

5 Simulation Results The simulation of a dual active bridge is performed on a resistive load and is simulated by using MATLAB/Simulink R2016a on a computer with 4 GB RAM and Intel i3 processor. The proper calculation of output resistance, output capacitance, input voltage, output voltage, and inductor values are taken into consideration. The MATLAB Simulink program provides the output voltage, inductor current, inductor voltage, and transformer’s primary and secondary voltage waveforms. DAB key system parameters are provided in Table 2.

144 Table 2 DAB key system parameters

S. Baidya and A. Shukla

Parameter

Index

Ratings

Input voltage

V1

96 V

Output voltage

V2

48 V

Total leakage inductance

L lk

50 μH

Output power rating

Po

500 W

Switching frequency

fs

20 kHz

Turns ratio

N

1:1

Output current

I0

10 A

Load resistance

R

4.8 Ω

Output voltage ripple

Δ V

μmax μ(n + 1) > μmin else

(10)

In the above-mentioned equations, 0 < α < 1, γ > 0, 0 < β < 1. The parameter γ may adjust the time of convergence and maladjustment of the algorithm. To regulate the convergence time, the β which is exponential weight coefficient parameter can also be used. In order to offer the fastest convergence speed, μmax is typically chosen in such a manner so that it is close to the non-stationary step point of the standard LMS algorithm. In the steady state, a decision is made in accordance with the expected maladjustment and algorithm convergence rate. The μmax range can be derived as, 0 < μmax