Design of high-speed communication circuits / editor, Ramesh Harjani 9812565906, 9789812565907
MOS technology has rapidly become the de facto standard for mixed-signal integrated circuit design due to the high level
172 97 374KB
English Pages 233 Year 2006
Table of contents :
CONTENTS......Page 10
Preface......Page 6
1 Introduction......Page 11
2 Transistor Mismatch......Page 12
3 Methods of Achieving Yield......Page 16
4 Alternative Techniques for Nanometer CMOS......Page 27
References......Page 30
1 Introduction......Page 33
2 Self-Induced Noise-Injection and Sensing Mechanisms......Page 35
3 Extraction of Substrate Parasitics......Page 37
4 Conclusions......Page 49
References......Page 50
1 Introduction......Page 53
2 Single-Loop AE Modulator Topologies......Page 54
3 Time-Interleaved AE Modulators......Page 60
4 Continuous-Time AE Modulators......Page 64
References......Page 71
1 Introduction......Page 75
2 LC Tank-based VCO Design......Page 76
3 Design Examples......Page 97
4 Summary and Conclusions......Page 102
References......Page 105
1 Introduction......Page 109
2 Interpreting Specifications......Page 110
3 Types of Frequency Synthesizers......Page 115
4 Phase Locked Loop (PLL) Design......Page 118
5 Recent Progress in Frequency Synthesizer Design Techniques......Page 125
References......Page 128
1 Introduction......Page 133
2 Radio Receiver Architectures......Page 134
3 Low Noise Amplifiers......Page 145
4 Mixers......Page 155
5 Voltage-controlled Oscillators......Page 166
References......Page 182
1 Introduction......Page 185
2 Channel Modeling......Page 186
3 Performance Metrics......Page 189
5 Transmit Equalizers......Page 192
6 Receive Equalizers......Page 195
7 Transmit and Receive Equalizers......Page 208
8 Adaptation......Page 210
References......Page 211
1 Introduction......Page 215
2 Crosstalk Cancellation Technique......Page 217
3 Transceiver Design......Page 220
4 Receive Front-End Equalizer Design......Page 224
5 Circuit Implementation......Page 226
7 Conclusions......Page 229
References......Page 231
CONTENTS......Page 10
Preface......Page 6
1 Introduction......Page 11
2 Transistor Mismatch......Page 12
3 Methods of Achieving Yield......Page 16
4 Alternative Techniques for Nanometer CMOS......Page 27
References......Page 30
1 Introduction......Page 33
2 Self-Induced Noise-Injection and Sensing Mechanisms......Page 35
3 Extraction of Substrate Parasitics......Page 37
4 Conclusions......Page 49
References......Page 50
1 Introduction......Page 53
2 Single-Loop AE Modulator Topologies......Page 54
3 Time-Interleaved AE Modulators......Page 60
4 Continuous-Time AE Modulators......Page 64
References......Page 71
1 Introduction......Page 75
2 LC Tank-based VCO Design......Page 76
3 Design Examples......Page 97
4 Summary and Conclusions......Page 102
References......Page 105
1 Introduction......Page 109
2 Interpreting Specifications......Page 110
3 Types of Frequency Synthesizers......Page 115
4 Phase Locked Loop (PLL) Design......Page 118
5 Recent Progress in Frequency Synthesizer Design Techniques......Page 125
References......Page 128
1 Introduction......Page 133
2 Radio Receiver Architectures......Page 134
3 Low Noise Amplifiers......Page 145
4 Mixers......Page 155
5 Voltage-controlled Oscillators......Page 166
References......Page 182
1 Introduction......Page 185
2 Channel Modeling......Page 186
3 Performance Metrics......Page 189
5 Transmit Equalizers......Page 192
6 Receive Equalizers......Page 195
7 Transmit and Receive Equalizers......Page 208
8 Adaptation......Page 210
References......Page 211
1 Introduction......Page 215
2 Crosstalk Cancellation Technique......Page 217
3 Transceiver Design......Page 220
4 Receive Front-End Equalizer Design......Page 224
5 Circuit Implementation......Page 226
7 Conclusions......Page 229
References......Page 231
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