Circuits and Electronics: Lecture Notes

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6.002

CIRCUITS AND ELECTRONICS

Introduction and Lumped Circuit Abstraction

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

ADMINISTRIVIA Lecturer: Prof. Anant Agarwal Textbook: Agarwal and Lang (A&L) Readings are important! Handout no. 3 Web site —

http://web.mit.edu/6.002/www/fall00

Assignments — Homework exercises Labs Quizzes Final exam

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

Two homework assignments can be missed (except HW11). Collaboration policy Homework You may collaborate with others, but do your own write-up. Lab You may work in a team of two, but do you own write-up. Info handout Reading for today — Chapter 1 of the book

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

What is engineering? Purposeful use of science

What is 6.002 about? Gainful employment of Maxwell’s equations From electrons to digital gates and op-amps

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

6.002

Nature as observed in experiments V

3

6

9

12

…

I

0.1

0.2

0.3

0.4

…

Physics laws or “abstractions” Maxwell’s abstraction for Ohm’s tables of data V=RI Lumped circuit abstraction +– R V C L M Simple amplifier abstraction Digital abstraction Operational amplifier abstraction abstraction Combinational logic +

-

S

f

Filters

Clocked digital abstraction

Analog system components: Modulators, oscillators, RF amps, power supplies 6.061

Instruction set abstraction Pentium, MIPS 6.004 Programming languages Java, C++, Matlab 6.001 Software systems 6.033 Operating systems, Browsers

Mice, toasters, sonar, stereos, doom, space shuttle 6.455 6.170

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

Lumped Circuit Abstraction

Consider

The Big Jump from physics to EECS I

V

? Suppose we wish to answer this question: What is the current through the bulb?

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

We could do it the Hard Way… Apply Maxwell’s Differential form ∂B Faraday’s ∇× E = − ∂t ∂ρ Continuity ∇ ⋅ J = − ∂t Others

ρ ∇⋅E = ε0

Integral form ∂φ B ∫ E ⋅ dl = − ∂t ∂q J ⋅ dS = − ∫ ∂t q E ⋅ dS = ∫

ε0

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

Instead, there is an Easy Way… First, let us build some insight: Analogy F

a?

I ask you: What is the acceleration? You quickly ask me: What is the mass? I tell you:

m

F You respond: a = m Done !! !

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6.002 Fall 2000

Lecture 1

Instead, there is an Easy Way… First, let us build some insight: Analogy

F a? In doing so, you ignored the object’s shape its temperature its color point of force application Point-mass discretization

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

The Easy Way… Consider the filament of the light bulb. A B We do not care about how current flows inside the filament its temperature, shape, orientation, etc. Then, we can replace the bulb with a

discrete resistor

for the purpose of calculating the current.

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

The Easy Way… A B Replace the bulb with a

discrete resistor

for the purpose of calculating the current. A I V + and I = V R R – B

In EE, we do things the easy way…

R represents the only property of interest! Like with point-mass: replace objects F with their mass m to find a = m Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

The Easy Way…

A + V –

I R

and

B

I=

V R

In EE, we do things the easy way…

R represents the only property of interest! R relates element v and i

V I= R

called element v-i relationship

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

R is a lumped element abstraction for the bulb.

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

R is a lumped element abstraction for the bulb. Not so fast, though … I A + S A

V B

–

SB

black box Although we will take the easy way using lumped abstractions for the rest of this course, we must make sure (at least the first time) that our abstraction is reasonable. In this case, ensuring that V I are defined for the element Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

A

+

I SA

V

V B

–

I

must be defined for the element

SB

black box

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6.002 Fall 2000

Lecture 1

I

must be defined. True when

= I out of S B ∂q True only when = 0 in the filament! ∂t ∫ J ⋅ dS I into S A

SA

∫ J ⋅ dS SB

∫ J ⋅ dS − ∫ J ⋅ dS = SA

from ell w x a M

SB

IA

∂q ∂t

IB

∂q =0 I A = I B only if ∂t So let’s assume this

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

V

Must also be defined. see A&L

So let’s assume this too

∂φ B =0 ∂t outside elements

VAB defined when

So

VAB = ∫AB E ⋅ dl

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

Lumped Matter Discipline (LMD) Or self imposed constraints:

More in Chapter 1 of A & L

∂φ B = 0 outside ∂t ∂q = 0 inside elements ∂t bulb, wire, battery

Lumped circuit abstraction applies when elements adhere to the lumped matter discipline.

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

Demo only for the sorts of questions we as EEs would like to ask!

Demo

Lumped element examples whose behavior is completely captured by their V–I relationship.

Exploding resistor demo can’t predict that! Pickle demo can’t predict light, smell

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

So, what does this buy us? Replace the differential equations with simple algebra using lumped circuit abstraction (LCA). For example —

a R1

V

+ –

b

R3

R4

d R2

R5

c What can we say about voltages in a loop under the lumped matter discipline?

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

What can we say about voltages in a loop under LMD?

a R1

V

b

+ –

R4

R3

d R2

R5

c ∂φ B under DMD ∫ E ⋅ dl = − ∂t 0 ∫ E ⋅ dl + ∫ E ⋅ dl + ∫ E ⋅ dl = 0 ca

ab

bc

+ Vca + Vab + Vbc

= 0

Kirchhoff’s Voltage Law (KVL): The sum of the voltages in a loop is 0. Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 1

What can we say about currents? Consider

I ca

S a

I da

I ba

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6.002 Fall 2000

Lecture 1

What can we say about currents? I ca

S a

I da

I ba ∂q ∫S J ⋅ dS = − ∂t

under LMD 0

I ca + I da + I ba = 0 Kirchhoff’s Current Law (KCL): The sum of the currents into a node is 0. simply conservation of charge

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6.002 Fall 2000

Lecture 1

KVL and KCL Summary KVL:

∑ jν j = 0 loop

KCL:

∑jij = 0 node

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6.002 Fall 2000

Lecture 1

6.002

CIRCUITS AND ELECTRONICS

Basic Circuit Analysis Method (KVL and KCL method)

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6.002 Fall 2000

Lecture 2

Review Lumped Matter Discipline LMD:

Constraints we impose on ourselves to simplify our analysis

∂φ B =0 ∂t ∂q =0 ∂t

Outside elements Inside elements wires resistors sources

Allows us to create the lumped circuit abstraction

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 2

Review

LMD allows us to create the lumped circuit abstraction i

+

v

Lumped circuit element

power consumed by element = vi

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6.002 Fall 2000

Lecture 2

Review Review Maxwell’s equations simplify to algebraic KVL and KCL under LMD! KVL:

∑ jν j = 0 loop

KCL:

∑jij = 0 node

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 2

Review a R1

+ –

b

R4

R3

R2

d R5

c

DEMO

vca + vab + vbc = 0

KVL

ica + ida + iba = 0

KCL

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 2

Method 1: Basic KVL, KCL method of Circuit analysis Goal: Find all element v’s and i’s 1. write element v-i relationships (from lumped circuit abstraction) 2. write KCL for all nodes 3. write KVL for all loops

lots of unknowns lots of equations lots of fun solve

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 2

Method 1: Basic KVL, KCL method of Circuit analysis

Element Relationships For R,

V = IR

For voltage source, V = V0

R +–

V0 For current source, I = I 0 J Io 3 lumped circuit elements

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6.002 Fall 2000

Lecture 2

KVL, KCL Example a +

ν1 +

ν 0 = V0 –

R3

b +

ν2 –

ν4

R1

–

+ –

+

+ν 3 – R2

–

R4

d +

ν5 –

R5

c The Demo Circuit

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6.002 Fall 2000

Lecture 2

Associated variables discipline i

+ ν

Element e

Current is taken to be positive going into the positive voltage terminal

Then power consumed by element e

= νi is positive

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6.002 Fall 2000

Lecture 2

KVL, KCL Example a +

+

ν 0 = V0 –

ν1

i0

L1

+ –

–

+

ν2 –

i4 i1 L 2 + R1 ν 4 R4 – R3 b i3 d +ν 3 – i2 i5 + R2 ν 5 R5 L3 –

c The Demo Circuit

L4

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 2

Analyze ν 0 …ν 5 ,ι0 …ι5 1. Element relationships (v, i ) given v3 = i3 R3 v0 = V0 v4 = i4 R4 v1 = i1 R1 v5 = i5 R5 v2 = i2 R2

12 unknowns 6 equations

2. KCL at the nodes a: i0 + i1 + i4 = 0 3 independent b: i2 + i3 − i1 = 0 equations d: i5 − i3 − i4 = 0 e: − i0 − i2 − i5 = 0 redundant 3. KVL for loops L1: − v0 + v1 + v2 = 0 3 independent equations L2: v1 + v3 − v4 = 0 s L3: v3 + v5 − v2 = 0 n o L4: − v0 + v4 + v5 = 0 redundant ati s n w u no k eq n u 2 2 1 1

/

ugh @#! Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 2

Other Analysis Methods Method 2— Apply element combination rules

A B

C

R1

R2 R3

G1

G2

V1

V2

+–

+–

…

RN

GN

⇔

+ RN

+ GN

V1 + V2 +–

J

J

J

I2

G1 + G2

1 Gi = Ri

⇔

D I1

⇔

⇔

R1 + R2 +

I1 + I 2

Surprisingly, these rules (along with superposition, which you will learn about later) can solve the circuit on page 8 Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 2

Other Analysis Methods Method 2— Apply element combination rules

I =?

Example

R1

V + –

R3

R2

I

I V + –

R1

V + –

R2 R3 R2 + R3 R = R1 +

R R2 R3 R2 + R3

V I= R Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 2

Method 3—Node analysis Particular application of KVL, KCL method 1. Select reference node ( ground) from which voltages are measured. 2. Label voltages of remaining nodes with respect to ground. These are the primary unknowns. 3. Write KCL for all but the ground node, substituting device laws and KVL. 4. Solve for node voltages. 5. Back solve for branch voltages and currents (i.e., the secondary unknowns)

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 2

Example: Old Faithful plus current source

V0

R2

R5

J

e2

+ V e1 – 0

Step 1

R4

R1 R 3

I1

Step 2

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 2

Example: Old Faithful plus current source

V0

+ V e1 – 0 R2

R4 e2

R5

J

R1 R 3

for I1 convenience, write 1 Gi = Ri

KCL at e1 (e1 − V0 )G1 + (e1 − e2 )G3 + (e1 )G2 = 0

KCL at e2 (e2 − e1 )G3 + (e2 − V0 )G4 + (e2 )G5 − I1 = 0 Step 3

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 2

Example: Old Faithful plus current source

V0

e2

R2

R5

+ V e1 – 0

J

R4

R1 R 3

I1

1 Gi = Ri

KCL at e1 (e1 − V0 )G1 + (e1 − e2 )G3 + (e1 )G2 = 0

KCL at l2 (e2 − e1 )G3 + (e2 − V0 )G4 + (e2 )G5 − I1 = 0 move constant terms to RHS & collect unknowns

e1 (G1 + G2 + G3 ) + e2 (−G3 ) = V0 (G1 ) e1 (−G3 ) + e2 (G3 + G4 + G5 ) = V0 (G4 ) + I1 2 equations, 2 unknowns (compare units)

Solve for e’s Step 4

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 2

In matrix form: − G3 ⎡ G1V0 ⎤ ⎡G1 + G2 + G3 ⎤ ⎡ e1 ⎤ = ⎢G V + I ⎥ ⎢ G3 + G4 + G5 ⎥⎦ ⎢⎣e2 ⎥⎦ − G3 ⎣ 4 0 1⎦ ⎣

conductivity matrix

sources

unknown node voltages

Solve G3 ⎡G3 + G4 + G5 ⎤ ⎡ G1V0 ⎤ G3 G1 + G2 + G3 ⎥⎦ ⎢⎣G4V0 + I1 ⎥⎦ ⎡ e1 ⎤ ⎢⎣ ⎢e ⎥ = (G1 + G2 + G3 )(G3 + G4 + G5 ) − G3 2 ⎣ 2⎦

(

)(

) ( )(

)

G +G +G G V + G G V + I 3 4 5 1 0 3 4 0 1 e = 1 G G +G G +G G +G G +G G +G G +G 2 +G G +G G 1 3 1 4 1 5 2 3 2 4 2 5 3 3 4 3 5 e2 =

(G3 )(G1V0 ) + (G1 + G2 + G3 )(G4V0 + I 1 ) G1G3 + G1G4 + G1G5 + G2G3 + G2G4 + G2 G5 + G3 + G3G4 + G3G5 2

(same denominator)

Notice: linear in V0 , I1 , no negatives in denominator Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 2

Solve, given G1 ⎫ 1 = ⎬ G5 ⎭ 8.2 K

G2 ⎫ 1 ⎬= G4 ⎭ 3.9 K

1 G3 = 1.5 K

I1 = 0

(

)(

)

G G V + G +G +G G V + I e = 3 10 1 2 3 40 1 2 G + G + G + G + G + G −G 2 1 2 3 3 4 5 3 1 1 1 G +G +G = + + =1 1 2 3 8.2 3.9 1.5

(

G3 + G4 + G5 =

)(

)

1 1 1 + + =1 1.5 3.9 8.2

1 1 1 × + 1× 3.9 V e2 = 8.2 1.5 0 1 1− 2 1.5

Check out the DEMO

e2 = 0.6V0

If V0 = 3V , then e2 = 1.8V0 Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 2

6.002

CIRCUITS AND ELECTRONICS

Superposition, Thévenin and Norton

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 3

Review Circuit Analysis Methods z KVL:

∑Vi = 0

loop

KCL: ∑ Ii = 0

VI

node

z Circuit composition rules z Node method – the workhorse of 6.002

KCL at nodes using V ’s referenced from ground (KVL implicit in “ (ei − e j ) G ”)

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 3

Linearity R1

V

+ –

R2

e J

Consider

I

Write node equations –

e −V e + −I =0 R1 R2 Notice: linear in e,V , I No eV ,VI terms

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 3

Linearity

R1

Consider

V

+ –

J

R2

Write node equations -e −V e + −I =0 R1 R2 Rearrange -⎡1 1⎤ ⎢ R + R ⎥e ⎣ 1 2⎦ conductance matrix

G

=

I

linear in e,V , I

V + I R1

node linear sum voltages of sources

e

=

S

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 3

Linearity Write node equations -e −V e + −I =0 R1 R2 Rearrange -⎡1 1⎤ ⎢ R + R ⎥e ⎣ 1 2⎦ conductance matrix

G or

=

linear in e,V , I

V + I R1

node linear sum voltages of sources

e

=

S

R2 R1 R2 e= V+ I R1 + R2 R1 + R2 e = a1V1 + a2V2 + … + b1 I1 + b2 I 2 + …

Linear! Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 3

Linearity

⇒

Homogeneity Superposition

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 3

Linearity

⇒

Homogeneity Superposition

Homogeneity x1 x2 . ..

y

⇓ αx1 αx2 .. .

αy

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 3

Linearity

⇒

Homogeneity Superposition

Superposition

x1a x2 a . ..

ya

x1b x2 b . ..

yb

⇓ x1a + x1b x2 a + x2 b . ..

y a + yb

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6.002 Fall 2000

Lecture 3

Linearity

⇒

Homogeneity Superposition

Specific superposition example:

V1 0

0 V2

y1

y2

⇓ V1 + 0 0 + V2

y1 + y2

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6.002 Fall 2000

Lecture 3

Method 4: Superposition method The output of a circuit is determined by summing the responses to each source acting alone. s e c r u so t n e nd e p e i nd only

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6.002 Fall 2000

Lecture 3

i

V =0 + –

i + v

+ v

-

short

I =0

J

i

i + v

+ v

-

-

open

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6.002 Fall 2000

Lecture 3

Back to the example Use superposition method

V

+ –

e

R2

J

R1

I

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6.002 Fall 2000

Lecture 3

Back to the example Use superposition method V acting alone e

R1

V

I = 0 eV =

R2

+ –

I acting alone

R2 V R1 + R2

e

R2

V =0

sum

J

R1

I

R1 R2 eI = I R1 + R2

superposition

R2 R1 R2 e = eV + eI = V+ I R1 + R2 R1 + R2

Voilà ! Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 3

Demo salt water

constant + –

?

+ –

output shows superposition

sinusoid

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6.002 Fall 2000

Lecture 3

Yet another method…

Consider

By superposition v =

∑ α mVm + ∑ β n I n + Ri m

n

no resistance units units By setting ∀n I n = 0, ∀mVm = 0, i = 0 i = 0

i

+ v -

J

y network r a r t i N Arb resistors Vm In + – J

i

also independent of external excitement & behaves like a resistor

All ∀n I n = 0, ∀mVm = 0

independent of external excitation and behaves like a voltage “ vTH ” Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 3

Or

v = vTH + RTH i

As far as the external world is concerned (for the purpose of I-V relation), “Arbitrary network N” is indistinguishable from: RTH Thévenin equivalent network

vTH RTH

+ vTH –

+ v

J

N

i

-

open circuit voltage at terminal pair (a.k.a. port) resistance of network seen from port ( Vm ’s, I n ’s set to 0)

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 3

Method 4: The Thévenin Method J

i

N + –

+ –

+ v -

E

+ v

E

Thévenin equivalent RTH

+ vTH –

i

-

Replace network N with its Thévenin equivalent, then solve external network E. Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 3

Example: + V –

R2

J

i1 R1

I

i1 R1 RTH

+ V –

VTH

i1 =

+ I –

V − VTH R1 + RTH

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6.002 Fall 2000

Lecture 3

VTH : VTH = IR2

RTH : RTH = R2

+ VTH -

R2

+ RTH -

R2

J

Example:

I

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6.002 Fall 2000

Lecture 3

Graphically,

v = vTH + RTH i

i

1 RTH

v vTH

“V ” OC

− I SC

Open circuit (i ≡ 0)

v = vTH

Short circuit (v ≡ 0)

− vTH i = RTH

VOC − I SC

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6.002 Fall 2000

Lecture 3

in recitation, see text

Method 5:

The Norton Method

J + –

+ –

+ v -

IN

J

i

RTH = RN

Norton equivalent

IN =

VTH RTH

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6.002 Fall 2000

Lecture 3

Summary „Discretize matter LMD Physics

LCA EE

„

R, I, V

Linear networks

„

Analysis methods (linear) KVL, KCL, I — V Combination rules Node method Superposition Thévenin Norton

„

Next Nonlinear analysis Discretize voltage

…

101100

…

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 3

6.002

CIRCUITS AND ELECTRONICS

The Digital Abstraction

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6.002 Fall 2000

Lecture 4

Review z Discretize matter by agreeing to

observe the lumped matter discipline

Lumped Circuit Abstraction zAnalysis tool kit: KVL/KCL, node method, superposition, Thévenin, Norton (remember superposition, Thévenin, Norton apply only for linear circuits)

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 4

Today

Discretize value

Digital abstraction

Interestingly, we will see shortly that the tools learned in the previous three lectures are sufficient to analyze simple digital circuits

Reading: Chapter 5 of Agarwal & Lang Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 4

But first, why digital? In the past … Analog signal processing R1 V0

R2

V1 + –

and V2 might represent the outputs of two sensors, for example.

V1

+ –

V2

By superposition, V0 =

R2 R1 V1 + V2 R1 + R2 R1 + R2

If R1 = R 2 ,

V1 + V2 V0 = 2

The above is an “adder” circuit. Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 4

Noise Problem

t

add noise on this wire

Receiver: huh?

…

noise hampers our ability to distinguish between small differences in value — e.g. between 3.1V and 3.2V.

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6.002 Fall 2000

Lecture 4

Value Discretization Restrict values to be one of two HIGH

LOW

5V

0V

TRUE

FALSE

1

0

…like two digits

0 and 1

Why is this discretization useful? (Remember, numbers larger than 1 can be represented using multiple binary digits and coding, much like using multiple decimal digits to represent numbers greater than 9. E.g., the binary number 101 has decimal value 5.) Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 4

Digital System sender

noise VN

VS

VR

VN = 0V

receiver

VS

VR

5V “0” “1” “0” HIGH

“0” “1” “0” 5V

t

2.5V

0V

LOW

0V

t

2.5V

With noise

VS

VN = 0.2V

“0” “1” “0” 5V

“0” “1” “0”

0.2V

t t

2.5V

VS

2.5V

t

0V Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 4

Digital System

Better noise immunity Lots of “noise margin” For “1”: noise margin 5V to 2.5V = 2.5V For “0”: noise margin 0V to 2.5V = 2.5V

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6.002 Fall 2000

Lecture 4

Voltage Thresholds and Logic Values

5V

1

1

sender 0

1 2.5V receiver

0

0 0V

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6.002 Fall 2000

Lecture 4

But, but, but … What about 2.5V? Hmmm… create “no man’s land” or forbidden region For example, 5V

1 sender

3V 2V

0

1

VH

forbidden region

receiver

VL

0

0V

“1”

V

“0”

0V

H

5V V

L

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6.002 Fall 2000

Lecture 4

But, but, but …

Where’s the noise margin? What if the sender sent 1:

VH ?

Hold the sender to tougher standards! 5V 1

V 0H

1 V IH

sender

V IL

0

receiver 0

V 0L

0V

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6.002 Fall 2000

Lecture 4

But, but, but …

Where’s the noise margin? What if the sender sent 1:

VH ?

Hold the sender to tougher standards! 5V 1

V 0H

1

sender

Noise margins

V IH

receiver

V IL

0

0

V 0L

0V “1” noise margin: V

- V IH 0H “0” noise margin: VIL - V 0L

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6.002 Fall 2000

Lecture 4

5V V 0H V IH V IL V 0L 0V

5V V 0H V IH V IL V 0L 0V

0

1

0

1

sender

t

0

1

0

1

receiver

t

Digital systems follow static discipline: if inputs to the digital system meet valid input thresholds, then the system guarantees its outputs will meet valid output thresholds. Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 4

Processing digital signals Recall, we have only two values —

1,0

Map naturally to logic: T, F Can also represent numbers

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6.002 Fall 2000

Lecture 4

Processing digital signals Boolean Logic If X is true and Y is true Then Z is true else Z is false. Z = X AND Y

X, Y, Z are digital signals “0” , “1”

Z = X • Y Boolean equation X Y

AND gate

Z

Truth table representation: X Y Z 0 0 1 1

0 1 0 1

0 0 0 1

Enumerate all input combinations Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 4

Combinational gate abstraction „ Adheres to static discipline „ Outputs are a function of

inputs alone.

Digital logic designers do not have to care about what is inside a gate.

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6.002 Fall 2000

Lecture 4

Demo

X

Y

Z Noise X Y

Z

Z = X • Y Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 4

Examples for recitation X

t Y

t Z

t Z = X • Y Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 4

In recitation… Another example of a gate If (A is true) OR (B is true) then C is true else C is false C = A + B A B

Boolean equation OR C

OR gate

More gates B

B Inverter

X Y

Z NAND

Z = X • Y Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 4

Boolean Identities X X X X

• 1 = X • 0 = X + 1 = 1 +0 = X

1 = 0 0 = 1 AB + AC = A • (B + C)

Digital Circuits Implement: B C

output = A + B • C B•C output

A

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 4

6.002

CIRCUITS AND ELECTRONICS

Inside the Digital Gate

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6.002 Fall 2000

Lecture 5

Review The Digital Abstraction z Discretize value 0, 1 z Static discipline

meet voltage thresholds sender VOH VOL

receiver VIH VIL

forbidden region

Specifies how gates must be designed

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6.002 Fall 2000

Lecture 5

Review Combinational gate abstraction outputs function of input alone satisfies static discipline

A B

C NAND

A 0 0 1 1

B 0 1 0 1

C 1 1 1 0

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6.002 Fall 2000

Lecture 5

For example: a digital circuit

Demo

A⋅ B

A B

D

C D = (C ⋅ (A ⋅ B )) 3 gates here

„ A Pentium III class microprocessor is a circuit with over 4 million gates !! „ The RAW chip (http://www.cag.lcs.mit.edu/raw) being built at the Lab for Computer Science at MIT has about 3 million gates. Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 5

How to build a digital gate Analogy l ike power supply

A

(li taps

s) e h c t i ke sw

B C

if A=ON AND B=ON C has H20 else C has no H20 Use this insight to build an AND gate.

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6.002 Fall 2000

Lecture 5

How to build a digital gate

OR gate

A C B

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6.002 Fall 2000

Lecture 5

Electrical Analogy C B

A

V + –

Bulb C is ON if A AND B are ON, else C is off Key: “switch” device

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6.002 Fall 2000

Lecture 5

Electrical Analogy equivalent ckt

Key: “switch” device

control

in

C =0

in

out

C

in

out

C=1

3-Terminal device if C = 0 else

out

short circuit between in and out open circuit between in and out

For mechanical switch, control mechanical pressure Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 5

Consider VS RL

RL

VOUT

+ VS –

VOUT

IN

C

VS =

C

“1”

OUT

VS

VOUT C =0

Truth table for C VOUT 0 1 1 0

VS

VOUT C =1 Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 5

What about? VS

Truth table for c1 c2 VO 0 0 1 0 1 1 1 0 1 1 1 0

VOUT

c1 c2

Truth table for

VS

VOUT c1

c2

c1 c2 VO 0 0 1 0 1 0 1 0 0 1 1 0

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6.002 Fall 2000

Lecture 5

What about? can also build compound gates

VS D A

C

D = (A ⋅ B) + C

B

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6.002 Fall 2000

Lecture 5

The MOSFET Device Metal-Oxide Semiconductor Field-Effect Transistor

drain D

G gate

≡ S source

3 terminal lumped element behaves like a switch

G : control terminal D, S : behave in a symmetric manner (for our needs) Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 5

The MOSFET Device Understand its operation by viewing it as a two-port element —

out k k c e Ch extboo l the t s interna for it ture. iG c u r t s

D

iDS

G

+ vGS –

vDS S

–

D off

G vGS < VT

G vGS ≥ VT

S

+

D iDS on S

VT ≈ 1V typically

“Switch” model (S model) of the MOSFET Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 5

Demo

Check the MOS device on a scope. i DS

+ vDS

+ vGS –

–

iDS vGS ≥ VT

vGS < VT

vDS

iDS vs vDS Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 5

A MOSFET Inverter VS = 5V RL vOUT

A

B

IN

A

B

Note the power of abstraction. The abstract inverter gate representation hides the internal details such as power supply connections, RL, GND, etc. (When we build digital circuits, the and are common across all gates!) Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 5

Example vOUT

5V

vOUT

vIN

v IN

0V V T =1V

5V

The T1000 model laptop desires gates that satisfy the static discipline with voltage thresholds. Does out inverter qualify?

1:

VOL = 0.5V

VIL = 0.9V

VOH = 4.5V

VIH = 4.1V

sender 5 4.5 V OH

receiver

5 4.1

0.9 0.5 VOL 0: 0 0 Our inverter satisfies this.

1 VIH VIL

0

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 5

E.g.: Does our inverter satisfy the static discipline for these thresholds: VOL = 0.2V

VIL = 0.5V

VOH = 4.8V

VIH = 4.5V

yes

x VOL = 0.5V

VIL = 1.5V

VOH = 4.5V

VIH = 3.5V

no

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 5

Switch resistor (SR) model of MOSFET …more accurate MOS model D

D

G

G

G S

D

vGS < VT

S

RON

vGS ≥ VT S e.g. RON = 5 KΩ

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 5

SR Model of MOSFET D

D

G

G

G

vGS < VT

S

S

MOSFET S model

RON

vGS ≥ VT S

MOSFET SR model

vGS ≥ VT

vGS ≥ VT iDS

D

iDS vGS < VT

1 RON

vGS < VT

vDS

vDS

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 5

Using the SR model VS RL

RL

vOUT

+ VS –

vOUT

IN

C

VS =

C

“1”

OUT

Truth table for

VS RL

vOUT

C VOUT 0 1 1 0

RON C =0

VS

RL C =1

vGS ≥ VT

vOUT

RON

Choose RL, RON, VS such that: V R v = S ON ≤ V OL OUT R +R L ON

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 5

6.002

CIRCUITS AND ELECTRONICS

Nonlinear Analysis

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6.002 Fall 2000

Lecture 6

Review Discretize matter t LCA m1 X KVL, KCL, i-v m2 X Composition rules m3 X Node method m4 X Superposition m5 X Thévenin, Norton

any circuit linear circuits

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 6

Review Discretize value t Digital abstraction X Subcircuits for given “switch” setting are linear! So, all 5 methods (m1 – m5) can be applied

VS

VS

A =1 B =1

RL

RL

C A

C RON

B

RON

SR MOSFET Model

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6.002 Fall 2000

Lecture 6

Today Nonlinear Analysis X Analytical method based on m1, m2, m3 X Graphical method X Introduction to incremental analysis

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6.002 Fall 2000

Lecture 6

How do we analyze nonlinear circuits, for example: Hypothetical nonlinear D device (Expo Dweeb ☺) iD

V

+ vD -

+ –

+ vD -

D iD iD

iD = aebvD

a vD

0,0

(Curiously, the device supplies power when vD is negative) Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 6

Method 1: Analytical Method Using the node method,

(remember the node method applies for linear or nonlinear circuits)

vD − V + iD = 0 R iD = aebvD

2 unknowns

1 2

2 equations

Solve the equation by trial and error numerical methods

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6.002 Fall 2000

Lecture 6

Method 2: Graphical Method Notice: the solution satisfies equations 1 and 2 iD

2

iD = aebvD

a vD

iD

V vD 1 iD = − R R

V R

1 slope = − R vD

V Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 6

Combine the two constraints iD

V 1 R ~ 0 .4 a ¼

called “loadline” for reasons you will see later vD

~ 0.5

e.g.

V =1 R =1 1 a= 4 b =1

V 1 vD = 0.5V iD = 0.4 A

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6.002 Fall 2000

Lecture 6

Method 3: Incremental Analysis Motivation: music over a light beam Can we pull this off? iD

+ vD LED light intensity I D ∝ iD vI music signal

iR

vI (t ) + –

t

vI (t )

iD (t )

light

AMP iR ∝ I R light intensity IR in photoreceiver LED: Light Emitting expoDweep ☺

iR (t )

sound

nonlinear

linear problem! will result in distortion

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6.002 Fall 2000

Lecture 6

Problem:

The LED is nonlinear

distortion iD

iD vD vD = vI

t vD t

iD

vD t

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6.002 Fall 2000

Lecture 6

If only it were linear … iD

iD

vD

vD t

it would’ve been ok.

What do we do? Zen is the answer … next lecture! Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 6

6.002

CIRCUITS AND ELECTRONICS

Incremental Analysis

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6.002 Fall 2000

Lecture 7

Review

Nonlinear Analysis X Analytical method X Graphical method Today X Incremental analysis Reading: Section 4.5

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6.002 Fall 2000

Lecture 7

Method 3: Incremental Analysis Motivation: music over a light beam Can we pull this off? iD

+ vD LED light intensity I D ∝ iD vI music signal

iR

vI (t ) + –

t

vI (t )

iD (t )

light

AMP iR ∝ I R light intensity IR in photoreceiver LED: Light Emitting expoDweep ☺

iR (t )

sound

nonlinear

linear problem! will result in distortion

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6.002 Fall 2000

Lecture 7

Problem:

The LED is nonlinear

distortion iD

iD vD vD = vI

t vD t

iD

vD t

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6.002 Fall 2000

Lecture 7

Insight:

iD

small region looks linear (about VD , ID)

ID

VD

vD

DC offset or DC bias

Trick: vi (t ) + – vI VI

+ –

iD = I D + id + vD LED vD = VD + vd VI

vi

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6.002 Fall 2000

Lecture 7

Result iD

id ID

vD

VD

vd

very small

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6.002 Fall 2000

Lecture 7

Result

vD = vI

vd

vD

VD

t

iD

id

iD

~linear!

ID

t

Demo Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 7

The incremental method: (or small signal method)

1. Operate at some DC offset or bias point VD, ID . 2. Superimpose small signal vd (music) on top of VD . 3. Response id to small signal vd is approximately linear. Notation:

iD = I D + id

total DC small variable offset superimposed signal

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6.002 Fall 2000

Lecture 7

What does this mean mathematically? Or, why is the small signal response linear? nonlinear iD = f (vD )

We replaced

vD = VD + ΔvD

large DC

vd

increment about VD

using Taylor’s Expansion to expand f(vD) near vD=VD :

iD = f (VD ) + +

df (vD ) ⋅ ΔvD dvD vD =VD 1 d 2 f (v D ) 2! dvD 2 v

2

⋅ ΔvD + " D =VD

neglect higher order terms because ΔvD is small Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 7

iD ≈ f (VD ) + constant w.r.t. ΔvD

d f (v D ) ⋅ ΔvD d vD vD =VD constant w.r.t. ΔvD slope at VD, ID

We can write X : I D + ΔiD ≈ f (VD ) +

d f (v D ) ⋅ Δ vD d vD vD =VD

equating DC and time-varying parts, I D = f (VD )

operating point

d f (v D ) ΔiD = ⋅ ΔvD d vD vD =VD constant w.r.t. ΔvD so, Δ iD ∝ ΔvD

By notation, Δ iD = id Δ v D = vd

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6.002 Fall 2000

Lecture 7

In our example,

iD = a e

bv D

From X : I D + id ≈ a e bVD + a e bVD ⋅ b ⋅ vd Equate DC and incremental terms,

I D = a ebVD

operating point aka bias pt. aka DC offset

id = a ebVD ⋅ b ⋅ vd id = I D ⋅ b ⋅ vd constant

small signal behavior linear!

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6.002 Fall 2000

Lecture 7

Graphical interpretation operating point

I D = a ebVD

id = I D ⋅ b ⋅ vd A

slope at VD, ID

iD ID

id

B

VD

operating point vd vD

we are approximating A with B Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 7

graphically mathematically now, circuit

We saw the small signal Large signal circuit: ID

VI

+ LED VD -

+ –

I D = a ebVD

Small signal reponse: id = I D b vd + vd -

behaves like:

id

R=

small signal circuit:

1 ID b

id vi

+ –

+ vd -

1 I Db Linear!

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6.002 Fall 2000

Lecture 7

6.002

CIRCUITS AND ELECTRONICS

Dependent Sources and Amplifiers

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6.002 – Fall 2002: Lecture 8

Review

„

Nonlinear circuits — can use the node method

„

Small signal trick resulted in linear response

Today „

Dependent sources

„

Amplifiers

Reading: Chapter 7.1, 7.2

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6.002 – Fall 2002: Lecture 8

Dependent sources Seen previously + i

Resistor Independent Current source

+ i

v

–

R v – I

v i= R

i=I

2-terminal 1-port devices New type of device: Dependent source iI i O

+ control port

vI

f ( vI )

–

+

vO

output port

– 2-port device

E.g., Voltage Controlled Current Source Current at output port is a function of voltage at the input port

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6.002 – Fall 2002: Lecture 8

Dependent Sources: Examples

Example 1: Find V + R V –

independent current source

I = I0

V = I0R

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6.002 – Fall 2002: Lecture 8

Dependent Sources: Examples Example 2: Find V voltage controled current source

+ R V –

K I = f (V ) = V

iI +

+ R V –

f (vI ) =

K vI

iO +

vI

vO

–

–

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6.002 – Fall 2002: Lecture 8

Dependent Sources: Examples Example 2: Find V voltage controled current source

+ R V –

K I = f (V ) = V e.g. K = 10-3 Amp·Volt R = 1kΩ

K V = IR = R V or V 2 = KR or V = KR = 10 −3 ⋅ 10 3 = 1 Volt

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6.002 – Fall 2002: Lecture 8

Another dependent source example

RL iIN

vI + –

iD

+

+

vIN

vO

–

–

e.g.

VS + –

iD = f (vIN ) iD = f (vIN ) K 2 = (vIN − 1) for vIN ≥ 1 2 iD = 0 otherwise

Find vO as a function of vI .

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6.002 – Fall 2002: Lecture 8

Another dependent source example VS RL iIN

vI + –

iD

+

+

vIN

vO

–

–

iD = f (vIN ) e.g.

iD = f (vIN ) K 2 = (vIN − 1) for vIN ≥ 1 2 iD = 0 otherwise

Find vO as a function of vI .

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6.002 – Fall 2002: Lecture 8

Another dependent source example VS RL vI vI

+ –

vO K 2 iD = (vIN − 1) for vIN ≥ 1 2 iD = 0 otherwise

Find vO as a function of vI .

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6.002 – Fall 2002: Lecture 8

Another dependent source example VS RL vI vI

+ –

vO K 2 iD = (vIN − 1) for vIN ≥ 1 2 iD = 0 otherwise

KVL

− VS + iD RL + vO = 0 vO = VS − iD RL K 2 vO = VS − (vI − 1) RL 2 vO = VS

for vI ≥ 1 for vI < 1

Hold that thought Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 – Fall 2002: Lecture 8

Next, Amplifiers

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6.002 – Fall 2002: Lecture 8

Why amplify? Signal amplification key to both analog and digital processing. Analog: AMP IN

Input Port

OUT

Output Port

Besides the obvious advantages of being heard farther away, amplification is key to noise tolerance during communcation

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6.002 – Fall 2002: Lecture 8

Why amplify? Amplification is key to noise tolerance during communcation No amplification

useful signal

1 mV

e nois

10 mV

huh?

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6.002 – Fall 2002: Lecture 8

Try amplification e nois

AMP

not bad!

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6.002 – Fall 2002: Lecture 8

Why amplify? Digital: Valid region 5V

5V

VIH IN VIL 0V

5V

OUT Digital System

IN

5V

VOL

OUT

V OH

VIH VIL

0V

0V

VOH

t

V OL

0V

t

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6.002 – Fall 2002: Lecture 8

Why amplify? Digital:

Static discipline requires amplification! Minimum amplification needed: VIH VIL

VOH VOL

VOH − VOL VIH − VIL

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6.002 – Fall 2002: Lecture 8

An amplifier is a 3-ported device, actually Power port Input port

iO

iI

+v – I

Amplifier

+ v Output – O port

We often don’t show the power port. Also, for convenience we commonly observe “the common ground discipline.” In other words, all ports often share a common reference point called “ground.”

POWER IN OUT

How do we build one? Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 – Fall 2002: Lecture 8

Remember? VS RL vI vI

+ –

vO K 2 iD = (vIN − 1) for vIN ≥ 1 2 iD = 0 otherwise

KVL

− VS + iD RL + vO = 0 vO = VS − iD RL K 2 vO = VS − (vI − 1) RL 2 vO = VS

for vI ≥ 1 for vI < 1

Claim: This is an amplifier Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 – Fall 2002: Lecture 8

So, where’s the amplification? Let’s look at the vO versus vI curve. mA e.g. VS = 10V , K = 2 2 , RL = 5 kΩ V K 2 vO = VS − RL (vI − 1) 2 2 −3 2 3 = 10 − ⋅10 ⋅ 5 ⋅ 10 (vI − 1) 2 vO = 10 − 5 (vI − 1) vO VS

2

ΔvO

1 ΔvO >1 Δv I

ΔvI

vI

amplification

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6.002 – Fall 2002: Lecture 8

Plot vO versus vI vO = 10 − 5 (vI − 1)

2

0.1 change in vI

Demo

vI

vO

0.0 1.0 1.5 2.0 2.1 2.2 2.3 2.4

10.00 10.00 8.75 5.00 4.00 2.80 1.50 ~ 0.00

1V change in vO

Gain!

Measure vO .

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6.002 – Fall 2002: Lecture 8

One nit … vO

What happens here? 1

vI

Mathematically, K 2 vO = VS − RL (vI − 1) 2 So

is mathematically predicted behavior

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6.002 – Fall 2002: Lecture 8

One nit … vO

K 2 vO = VS − RL (vI − 1) 2 What happens here? vI

1 However, from

K 2 iD = (vI − 1) 2 VS

for vI ≥ 1

RL vO

VCCS

iD

For vO>0, VCCS consumes power: vO iD For vO vI − VT vO = vI − VT vO < vI − VT

1V

vI

VT

1V

2V

“interesting” region for vI . Saturation discipline satisfied.

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6.002 Fall 2000

Lecture 10

But… 5V

VS

vO

vO = vI − VT vO 1V

vI VT 1V

Demo

vI

2V

Amplifies alright, but distorts

vI vO t

Amp is nonlinear … / Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 10

Small Signal Model vO

~ 5V VS

Focus on this line segment

(VI , VO )

~ 1V vI

VT 1V

~ 2V 2 K (vI − VT ) vO = VS − RL 2 Amp all right, but nonlinear! Hmmm … So what about our linear amplifier ???

Insight: But, observe vI vs vO about some point (VI , VO) … looks quite linear ! Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].

6.002 Fall 2000

Lecture 10

Trick ΔvO

vo VO

vi

(VI ,VO )

looks linear

VI ΔvI ™

Operate amp at VI , VO Æ DC “bias” (good choice: midpoint of input operating range)

™ Superimpose small signal on top of VI ™ Response to small signal seems to be approximately linear

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6.002 Fall 2000

Lecture 10

Trick ΔvO

vo VO

vi

(VI ,VO )

looks linear

VI ΔvI

™

Operate amp at VI , VO Æ DC “bias” (good choice: midpoint of input operating range)

™ Superimpose small signal on top of VI ™ Response to small signal seems to be approximately linear Let’s look at this in more detail — I graphically II mathematically III from a circuit viewpoint

next week

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6.002 Fall 2000

Lecture 10

I Graphically We use a DC bias VI to “boost” interesting input signal above VT, and in fact, well above VT .

VS RL

interesting input signal

ΔvI + – VI + –

vO

Offset voltage or bias

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6.002 Fall 2000

Lecture 10

Graphically

VS RL

interesting input signal

vO

ΔvI + – VI + –

VS

vO

operating point

VO

0

VI , VO

vO = vI − VT vI

VT

Good choice for operating point: midpoint of input operating range

VI

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6.002 Fall 2000

Lecture 10

Small Signal Model aka incremental model aka linearized model

Notation — Input:

vI = VI + vi

total DC small variable bias signal (like ΔvI) bias voltage aka operating point voltage Output: vO = VO + vo Graphically, vI

vO

vi

vo

VI

VO

0

t

0

t

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6.002 Fall 2000

Lecture 10

II Mathematically

(… watch my fingers)

RL K 2 vO = VS − (vI − VT ) VO = VS − RL K (VI − VT )2 2 2 “ substituting vI = VI + vi vi